diff --git a/src/chipset/sis_85c50x.c b/src/chipset/sis_85c50x.c index 9e50ef3c9..1cfb432f7 100644 --- a/src/chipset/sis_85c50x.c +++ b/src/chipset/sis_85c50x.c @@ -6,405 +6,365 @@ * * This file is part of the 86Box distribution. * - * Implementation of the SiS 85c501/85c503 chip. + * Implementation of the SiS 85C50x Chipset. * * * - * Authors: Sarah Walker, - * Miran Grca, + * Authors: Tiseno100, * - * Copyright 2019 Miran Grca. + * Copyright 2020 Tiseno100. */ + +#include #include #include #include #include #include +#define HAVE_STDARG_H #include <86box/86box.h> -#include <86box/mem.h> -#include <86box/io.h> -#include <86box/rom.h> -#include <86box/pci.h> #include <86box/device.h> -#include <86box/keyboard.h> +#include <86box/io.h> +#include <86box/timer.h> + +#include <86box/apm.h> +#include <86box/mem.h> +#include <86box/smram.h> +#include <86box/pci.h> #include <86box/port_92.h> + #include <86box/chipset.h> -typedef struct sis_85c501_t +#ifdef ENABLE_SIS_85C50X_LOG +int sis_85c50x_do_log = ENABLE_SIS_85C50X_LOG; +static void +sis_85c50x_log(const char *fmt, ...) { - /* 85c501 */ - uint8_t turbo_reg; + va_list ap; - /* 85c503 */ + if (sis_85c50x_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } +} +#else +#define sis_85c50x_log(fmt, ...) +#endif - /* Registers */ - uint8_t pci_conf[2][256]; - /* 85c50x ISA */ - uint8_t cur_reg, - regs[39]; +typedef struct sis_85c50x_t +{ + uint8_t index, + pci_conf[256], pci_conf_sb[256], + regs[256]; + + smram_t * smram; + port_92_t * port_92; } sis_85c50x_t; static void -sis_85c501_recalcmapping(sis_85c50x_t *dev) +sis_85c50x_shadow_recalc(sis_85c50x_t *dev) { - int c, d; - uint32_t base; + uint32_t base, i, can_read, can_write; - for (c = 0; c < 1; c++) { - for (d = 0; d < 4; d++) { - base = 0xe0000 + (d << 14); - if (dev->pci_conf[0][0x54 + c] & (1 << (d + 4))) { - switch (dev->pci_conf[0][0x53] & 0x60) { - case 0x00: - mem_set_mem_state(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); - break; - case 0x20: - mem_set_mem_state(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - break; - case 0x40: - mem_set_mem_state(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - break; - case 0x60: - mem_set_mem_state(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_EXTANY); - break; - } - } else - mem_set_mem_state(base, 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - } + can_read = (dev->pci_conf[0x53] & 0x40) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; + can_write = (dev->pci_conf[0x53] & 0x20) ? MEM_WRITE_EXTANY : MEM_WRITE_INTERNAL; + if (!can_read) + can_write = MEM_WRITE_EXTANY; + + mem_set_mem_state_both(0xf0000, 0x10000, can_read | can_write); + shadowbios = 1; + shadowbios_write = 1; + + for (i = 0; i < 4; i++) { + base = 0xe0000 + (i << 14); + mem_set_mem_state_both(base, 0x4000, (dev->pci_conf[0x54] & (1 << (7 - i))) ? (can_read | can_write) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); + base = 0xd0000 + (i << 14); + mem_set_mem_state_both(base, 0x4000, (dev->pci_conf[0x55] & (1 << (7 - i))) ? (can_read | can_write) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); + base = 0xc0000 + (i << 14); + mem_set_mem_state_both(base, 0x4000, (dev->pci_conf[0x56] & (1 << (7 - i))) ? (can_read | can_write) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY)); } flushmmucache(); - shadowbios = 1; } static void -sis_85c501_write(int func, int addr, uint8_t val, void *priv) +sis_85c50x_smm_recalc(sis_85c50x_t *dev) { - sis_85c50x_t *dev = (sis_85c50x_t *) priv; + /* NOTE: Naming mismatch - what the datasheet calls "host address" is what we call ram_base. */ + uint32_t ram_base = (dev->pci_conf[0x64] << 20) | + ((dev->pci_conf[0x65] & 0x07) << 28); - if (func) + smram_disable(dev->smram); + + if ((((dev->pci_conf[0x65] & 0xe0) >> 5) != 0x00) && (ram_base == 0x00000000)) return; - if ((addr >= 0x10) && (addr < 0x4f)) - return; + switch ((dev->pci_conf[0x65] & 0xe0) >> 5) { + case 0x00: + if (!(dev->pci_conf[0x54] & 0xc0)) + smram_enable(dev->smram, 0xe0000, 0xe0000, 0x8000, (dev->pci_conf[0x65] & 0x10), 1); + break; + case 0x01: + smram_enable(dev->smram, 0xb0000, ram_base, 0x10000, (dev->pci_conf[0x65] & 0x10), 1); + break; + case 0x02: + smram_enable(dev->smram, 0xa0000, ram_base, 0x10000, (dev->pci_conf[0x65] & 0x10), 1); + break; + case 0x04: + smram_enable(dev->smram, 0xa0000, ram_base, 0x8000, (dev->pci_conf[0x65] & 0x10), 1); + break; + case 0x06: + smram_enable(dev->smram, 0xb0000, ram_base, 0x8000, (dev->pci_conf[0x65] & 0x10), 1); + break; + } +} + + +static void +sis_85c50x_write(int func, int addr, uint8_t val, void *priv) +{ + sis_85c50x_t *dev = (sis_85c50x_t *)priv; + uint8_t valxor = (val ^ dev->pci_conf[addr]); switch (addr) { - case 0x00: case 0x01: case 0x02: case 0x03: - case 0x08: case 0x09: case 0x0a: case 0x0b: - case 0x0c: case 0x0e: - return; - - case 0x04: /*Command register*/ - val &= 0x42; - val |= 0x04; + case 0x04: /* Command - low byte */ + dev->pci_conf[addr] = (dev->pci_conf[addr] & 0xb4) | (val & 0x4b); break; - case 0x05: - val &= 0x01; + case 0x07: /* Status - high byte */ + dev->pci_conf[addr] = ((dev->pci_conf[addr] & 0xf9) & ~(val & 0xf8)) | (val & 0x06); + break; + case 0x50: + dev->pci_conf[addr] = val; + break; + case 0x51: /* Cache */ + dev->pci_conf[addr] = val; + cpu_cache_ext_enabled = (val & 0x40); + cpu_update_waitstates(); + break; + case 0x52: + dev->pci_conf[addr] = val; + break; + case 0x53: /* Shadow RAM */ + case 0x54: + case 0x55: + case 0x56: + dev->pci_conf[addr] = val; + sis_85c50x_shadow_recalc(dev); + if (addr == 0x54) + sis_85c50x_smm_recalc(dev); + break; + case 0x57: case 0x58: case 0x59: case 0x5a: + case 0x5c: case 0x5d: case 0x5e: case 0x61: + case 0x62: case 0x63: case 0x67: case 0x68: + case 0x6a: case 0x6b: case 0x6c: case 0x6d: + case 0x6e: case 0x6f: + dev->pci_conf[addr] = val; + break; + case 0x5f: + dev->pci_conf[addr] = val & 0xfe; + break; + case 0x5b: + dev->pci_conf[addr] = val; + if (valxor & 0xc0) + port_92_set_features(dev->port_92, !!(val & 0x40), !!(val & 0x80)); + break; + case 0x60: /* SMI */ + if ((dev->pci_conf[0x68] & 0x01) && !(dev->pci_conf[addr] & 0x02) && (val & 0x02)) { + dev->pci_conf[0x69] |= 0x01; + smi_line = 1; + } + dev->pci_conf[addr] = val & 0x3e; + break; + case 0x64: /* SMRAM */ + case 0x65: + dev->pci_conf[addr] = val; + sis_85c50x_smm_recalc(dev); + break; + case 0x66: + dev->pci_conf[addr] = (val & 0x7f); + break; + case 0x69: + dev->pci_conf[addr] &= ~(val); + break; + } + + sis_85c50x_log("85C501: dev->pci_conf[%02x] = %02x\n", addr, val); +} + + +static uint8_t +sis_85c50x_read(int func, int addr, void *priv) +{ + sis_85c50x_t *dev = (sis_85c50x_t *)priv; + + sis_85c50x_log("85C501: dev->pci_conf[%02x] (%02x)\n", addr, dev->pci_conf[addr]); + + return dev->pci_conf[addr]; +} + + +static void +sis_85c50x_sb_write(int func, int addr, uint8_t val, void *priv) +{ + sis_85c50x_t *dev = (sis_85c50x_t *)priv; + + switch (addr) { + case 0x04: /* Command */ + dev->pci_conf_sb[addr] = val & 0x0f; + break; + case 0x07: /* Status */ + dev->pci_conf_sb[addr] &= ~(val & 0x30); + break; + case 0x40: /* BIOS Control Register */ + dev->pci_conf_sb[addr] = val & 0x3f; + break; + case 0x41: case 0x42: case 0x43: case 0x44: + /* INTA/B/C/D# Remapping Control Register */ + dev->pci_conf_sb[addr] = val & 0x8f; + if (val & 0x80) + pci_set_irq_routing(PCI_INTA + (addr - 0x41), PCI_IRQ_DISABLED); + else + pci_set_irq_routing(PCI_INTA + (addr - 0x41), val & 0xf); + break; + case 0x48: /* ISA Master/DMA Memory Cycle Control Register 1 */ + case 0x49: /* ISA Master/DMA Memory Cycle Control Register 2 */ + case 0x4a: /* ISA Master/DMA Memory Cycle Control Register 3 */ + case 0x4b: /* ISA Master/DMA Memory Cycle Control Register 4 */ + dev->pci_conf_sb[addr] = val; + break; + } + + sis_85c50x_log("85C503: dev->pci_conf_sb[%02x] = %02x\n", addr, val); +} + + +static uint8_t +sis_85c50x_sb_read(int func, int addr, void *priv) +{ + sis_85c50x_t *dev = (sis_85c50x_t *)priv; + sis_85c50x_log("85C503: dev->pci_conf_sb[%02x] (%02x)\n", addr, dev->pci_conf_sb[addr]); + + return dev->pci_conf_sb[addr]; +} + + +static void +sis_85c50x_isa_write(uint16_t addr, uint8_t val, void *priv) +{ + sis_85c50x_t *dev = (sis_85c50x_t *)priv; + + switch (addr) { + case 0x22: + dev->index = val; break; - case 0x06: /*Status*/ - val = 0; - break; - case 0x07: - val = 0x02; - break; - - case 0x54: /*Shadow configure*/ - if ((dev->pci_conf[0][0x54] & val) ^ 0xf0) { - dev->pci_conf[0][0x54] = val; - sis_85c501_recalcmapping(dev); + case 0x23: + switch (dev->index) { + case 0x80: + dev->regs[dev->index] = val & 0xe7; + break; + case 0x81: + dev->regs[dev->index] = val & 0xf4; + break; + case 0x84: case 0x88: case 0x9: case 0x8a: + case 0x8b: + dev->regs[dev->index] = val; + break; + case 0x85: + outb(0x70, val); + break; } break; } - dev->pci_conf[0][addr] = val; + sis_85c50x_log("85C501-ISA: dev->regs[%02x] = %02x\n", addr, val); } -static void -sis_85c503_write(int func, int addr, uint8_t val, void *priv) +static uint8_t +sis_85c50x_isa_read(uint16_t addr, void *priv) { - sis_85c50x_t *dev = (sis_85c50x_t *) priv; + sis_85c50x_t *dev = (sis_85c50x_t *)priv; + uint8_t ret = 0xff; - if (func > 0) - return; - - if (addr >= 0x0f && addr < 0x41) - return; - - switch(addr) { - case 0x00: case 0x01: case 0x02: case 0x03: - case 0x08: case 0x09: case 0x0a: case 0x0b: - case 0x0e: - return; - - case 0x04: /*Command register*/ - val &= 0x08; - val |= 0x07; - break; - case 0x05: - val = 0; + switch (addr) { + case 0x22: + ret = dev->index; break; - case 0x06: /*Status*/ - val = 0; - break; - case 0x07: - val = 0x02; - break; - - case 0x41: - if (val & 0x80) - pci_set_irq_routing(PCI_INTA, PCI_IRQ_DISABLED); + case 0x23: + if (dev->index == 0x85) + ret = inb(0x70); else - pci_set_irq_routing(PCI_INTA, val & 0xf); - break; - case 0x42: - if (val & 0x80) - pci_set_irq_routing(PCI_INTC, PCI_IRQ_DISABLED); - else - pci_set_irq_routing(PCI_INTC, val & 0xf); - break; - case 0x43: - if (val & 0x80) - pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED); - else - pci_set_irq_routing(PCI_INTB, val & 0xf); - break; - case 0x44: - if (val & 0x80) - pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED); - else - pci_set_irq_routing(PCI_INTD, val & 0xf); + ret = dev->regs[dev->index]; break; } + + sis_85c50x_log("85C501-ISA: dev->regs[%02x] (%02x)\n", dev->index, ret); - dev->pci_conf[1][addr] = val; -} - - -static void -sis_85c50x_isa_write(uint16_t port, uint8_t val, void *priv) -{ - sis_85c50x_t *dev = (sis_85c50x_t *) priv; - - if (port & 1) { - if (dev->cur_reg <= 0x1a) - dev->regs[dev->cur_reg] = val; - } else - dev->cur_reg = val; -} - - -static uint8_t -sis_85c501_read(int func, int addr, void *priv) -{ - sis_85c50x_t *dev = (sis_85c50x_t *) priv; - - if (func) - return 0xff; - - return dev->pci_conf[0][addr]; -} - - -static uint8_t -sis_85c503_read(int func, int addr, void *priv) -{ - sis_85c50x_t *dev = (sis_85c50x_t *) priv; - - if (func > 0) - return 0xff; - - return dev->pci_conf[1][addr]; -} - - -static uint8_t -sis_85c50x_isa_read(uint16_t port, void *priv) -{ - sis_85c50x_t *dev = (sis_85c50x_t *) priv; - - if (port & 1) { - if (dev->cur_reg <= 0x1a) - return dev->regs[dev->cur_reg]; - else - return 0xff; - } else - return dev->cur_reg; -} - - -static void -sis_85c50x_isa_reset(sis_85c50x_t *dev) -{ - int mem_size_mb, i = 0; - - memset(dev->regs, 0, sizeof(dev->regs)); - - dev->cur_reg = 0; - for (i = 0; i < 0x27; i++) - dev->regs[i] = 0x00; - - dev->regs[9] = 0x40; - - mem_size_mb = mem_size >> 10; - switch (mem_size_mb) { - case 0: case 1: - dev->regs[9] |= 0; - break; - case 2: case 3: - dev->regs[9] |= 1; - break; - case 4: - dev->regs[9] |= 2; - break; - case 5: - dev->regs[9] |= 0x20; - break; - case 6: case 7: - dev->regs[9] |= 9; - break; - case 8: case 9: - dev->regs[9] |= 4; - break; - case 10: case 11: - dev->regs[9] |= 5; - break; - case 12: case 13: case 14: case 15: - dev->regs[9] |= 0xB; - break; - case 16: - dev->regs[9] |= 0x13; - break; - case 17: - dev->regs[9] |= 0x21; - break; - case 18: case 19: - dev->regs[9] |= 6; - break; - case 20: case 21: case 22: case 23: - dev->regs[9] |= 0xD; - break; - case 24: case 25: case 26: case 27: - case 28: case 29: case 30: case 31: - dev->regs[9] |= 0xE; - break; - case 32: case 33: case 34: case 35: - dev->regs[9] |= 0x1B; - break; - case 36: case 37: case 38: case 39: - dev->regs[9] |= 0xF; - break; - case 40: case 41: case 42: case 43: - case 44: case 45: case 46: case 47: - dev->regs[9] |= 0x17; - break; - case 48: - dev->regs[9] |= 0x1E; - break; - default: - if (mem_size_mb < 64) - dev->regs[9] |= 0x1E; - else if ((mem_size_mb >= 65) && (mem_size_mb < 68)) - dev->regs[9] |= 0x22; - else - dev->regs[9] |= 0x24; - break; - } - - dev->regs[0x11] = 9; - dev->regs[0x12] = 0xFF; - dev->regs[0x23] = 0xF0; - dev->regs[0x26] = 1; - - io_removehandler(0x22, 0x0002, - sis_85c50x_isa_read, NULL, NULL, sis_85c50x_isa_write, NULL, NULL, dev); - io_sethandler(0x22, 0x0002, - sis_85c50x_isa_read, NULL, NULL, sis_85c50x_isa_write, NULL, NULL, dev); + return ret; } static void sis_85c50x_reset(void *priv) { - sis_85c50x_t *dev = (sis_85c50x_t *) priv; + sis_85c50x_t *dev = (sis_85c50x_t *)priv; - uint8_t val = 0; + /* North Bridge (SiS 85C501/502) */ + dev->pci_conf[0x00] = 0x39; + dev->pci_conf[0x01] = 0x10; + dev->pci_conf[0x02] = 0x06; + dev->pci_conf[0x03] = 0x04; + dev->pci_conf[0x04] = 0x04; + dev->pci_conf[0x07] = 0x04; + dev->pci_conf[0x09] = 0x00; + dev->pci_conf[0x0a] = 0x00; + dev->pci_conf[0x0b] = 0x06; - val = sis_85c501_read(0, 0x54, priv); /* Read current value of 0x44. */ - sis_85c501_write(0, 0x54, val & 0xf, priv); /* Turn off shadow BIOS but keep the lower 4 bits. */ + sis_85c50x_write(0, 0x51, 0x00, dev); + sis_85c50x_write(0, 0x53, 0x00, dev); + sis_85c50x_write(0, 0x54, 0x00, dev); + sis_85c50x_write(0, 0x55, 0x00, dev); + sis_85c50x_write(0, 0x56, 0x00, dev); + sis_85c50x_write(0, 0x5b, 0x00, dev); + sis_85c50x_write(0, 0x60, 0x00, dev); + sis_85c50x_write(0, 0x64, 0x00, dev); + sis_85c50x_write(0, 0x65, 0x00, dev); + sis_85c50x_write(0, 0x68, 0x00, dev); + sis_85c50x_write(0, 0x69, 0xff, dev); - sis_85c50x_isa_reset(dev); -} - - -static void -sis_85c50x_setup(sis_85c50x_t *dev) -{ - memset(dev, 0, sizeof(sis_85c50x_t)); - - /* 85c501 */ - dev->pci_conf[0][0x00] = 0x39; /*SiS*/ - dev->pci_conf[0][0x01] = 0x10; - dev->pci_conf[0][0x02] = 0x06; /*501/502*/ - dev->pci_conf[0][0x03] = 0x04; - - dev->pci_conf[0][0x04] = 7; - dev->pci_conf[0][0x05] = 0; - - dev->pci_conf[0][0x06] = 0x80; - dev->pci_conf[0][0x07] = 0x02; - - dev->pci_conf[0][0x08] = 0; /*Device revision*/ - - dev->pci_conf[0][0x09] = 0x00; /*Device class (PCI bridge)*/ - dev->pci_conf[0][0x0a] = 0x00; - dev->pci_conf[0][0x0b] = 0x06; - - dev->pci_conf[0][0x0e] = 0x00; /*Single function device*/ - - dev->pci_conf[0][0x50] = 0xbc; - dev->pci_conf[0][0x51] = 0xfb; - dev->pci_conf[0][0x52] = 0xad; - dev->pci_conf[0][0x53] = 0xfe; - - shadowbios = 1; - - /* 85c503 */ - dev->pci_conf[1][0x00] = 0x39; /*SiS*/ - dev->pci_conf[1][0x01] = 0x10; - dev->pci_conf[1][0x02] = 0x08; /*503*/ - dev->pci_conf[1][0x03] = 0x00; - - dev->pci_conf[1][0x04] = 7; - dev->pci_conf[1][0x05] = 0; - - dev->pci_conf[1][0x06] = 0x80; - dev->pci_conf[1][0x07] = 0x02; - - dev->pci_conf[1][0x08] = 0; /*Device revision*/ - - dev->pci_conf[1][0x09] = 0x00; /*Device class (PCI bridge)*/ - dev->pci_conf[1][0x0a] = 0x01; - dev->pci_conf[1][0x0b] = 0x06; - - dev->pci_conf[1][0x0e] = 0x00; /*Single function device*/ - - dev->pci_conf[1][0x41] = dev->pci_conf[1][0x42] = - dev->pci_conf[1][0x43] = dev->pci_conf[1][0x44] = 0x80; + /* South Bridge (SiS 85C503) */ + dev->pci_conf_sb[0x00] = 0x39; + dev->pci_conf_sb[0x01] = 0x10; + dev->pci_conf_sb[0x02] = 0x08; + dev->pci_conf_sb[0x03] = 0x00; + dev->pci_conf_sb[0x04] = 0x07; + dev->pci_conf_sb[0x05] = 0x00; + dev->pci_conf_sb[0x06] = 0x00; + dev->pci_conf_sb[0x07] = 0x02; + dev->pci_conf_sb[0x08] = 0x00; + dev->pci_conf_sb[0x09] = 0x00; + dev->pci_conf_sb[0x0a] = 0x01; + dev->pci_conf_sb[0x0b] = 0x06; + sis_85c50x_write(0, 0x41, 0x80, dev); + sis_85c50x_write(0, 0x42, 0x80, dev); + sis_85c50x_write(0, 0x43, 0x80, dev); + sis_85c50x_write(0, 0x44, 0x80, dev); } static void sis_85c50x_close(void *priv) { - sis_85c50x_t *dev = (sis_85c50x_t *) priv; + sis_85c50x_t *dev = (sis_85c50x_t *)priv; + smram_del(dev->smram); free(dev); } @@ -412,30 +372,31 @@ sis_85c50x_close(void *priv) static void * sis_85c50x_init(const device_t *info) { - sis_85c50x_t *dev = (sis_85c50x_t *) malloc(sizeof(sis_85c50x_t)); + sis_85c50x_t *dev = (sis_85c50x_t *)malloc(sizeof(sis_85c50x_t)); + memset(dev, 0x00, sizeof(sis_85c50x_t)); - pci_add_card(0, sis_85c501_read, sis_85c501_write, dev); - pci_add_card(5, sis_85c503_read, sis_85c503_write, dev); + /* 501/502 (Northbridge) */ + pci_add_card(PCI_ADD_NORTHBRIDGE, sis_85c50x_read, sis_85c50x_write, dev); - sis_85c50x_setup(dev); - sis_85c50x_isa_reset(dev); + /* 503 (Southbridge) */ + pci_add_card(PCI_ADD_SOUTHBRIDGE, sis_85c50x_sb_read, sis_85c50x_sb_write, dev); + io_sethandler(0x0022, 0x0002, sis_85c50x_isa_read, NULL, NULL, sis_85c50x_isa_write, NULL, NULL, dev); - device_add(&port_92_pci_device); + dev->smram = smram_add(); + dev->port_92 = device_add(&port_92_device); + + sis_85c50x_reset(dev); return dev; } -const device_t sis_85c50x_device = -{ - "SiS 85c501/85c503", +const device_t sis_85c50x_device = { + "SiS 85C50x", DEVICE_PCI, 0, - sis_85c50x_init, - sis_85c50x_close, - sis_85c50x_reset, - { NULL }, - NULL, - NULL, + sis_85c50x_init, sis_85c50x_close, + sis_85c50x_reset, { NULL }, + NULL, NULL, NULL }; diff --git a/src/chipset/via_apollo.c b/src/chipset/via_apollo.c index ccb2d4a59..fbceb2fd8 100644 --- a/src/chipset/via_apollo.c +++ b/src/chipset/via_apollo.c @@ -134,7 +134,7 @@ via_apollo_setup(via_apollo_t *dev) dev->pci_conf[0x57] = 0x01; } - if (dev->id >= VIA_693A) + if (dev->id >= VIA_694) dev->pci_conf[0x58] = 0x40; else if (dev->id >= VIA_585) dev->pci_conf[0x58] = 0x05; @@ -211,7 +211,7 @@ via_apollo_host_bridge_write(int func, int addr, uint8_t val, void *priv) return; if (((addr == 0x78) || (addr >= 0xad)) && (dev->id == VIA_597)) return; - if (((addr == 0x67) || ((addr >= 0xf0) && (addr < 0xfc))) && (dev->id != VIA_691)) + if (((addr == 0x67) || ((addr >= 0xf0) && (addr < 0xfc))) && (dev->id < VIA_691)) return; switch(addr) { @@ -298,9 +298,9 @@ via_apollo_host_bridge_write(int func, int addr, uint8_t val, void *priv) dev->pci_conf[0x53] = (dev->pci_conf[0x53] & ~0xf0) | (val & 0xf0); break; case 0x54: - if(dev->id == VIA_585) + if (dev->id == VIA_585) dev->pci_conf[0x54] = val; - else + else dev->pci_conf[0x54] = (dev->pci_conf[0x54] & ~0x07) | (val & 0x07); break; diff --git a/src/codegen/codegen_ops.c b/src/codegen/codegen_ops.c index d1410346f..e398ad16a 100644 --- a/src/codegen/codegen_ops.c +++ b/src/codegen/codegen_ops.c @@ -15,9 +15,9 @@ #include "codegen.h" #include "codegen_ops.h" -#ifdef __amd64__ +#if defined __amd64__ || defined _M_X64 #include "codegen_ops_x86-64.h" -#elif defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86 || defined _M_X64 +#elif defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86 #include "codegen_ops_x86.h" #endif diff --git a/src/codegen/codegen_ops_x86-64.h b/src/codegen/codegen_ops_x86-64.h index aa8feb8cc..2cc15d6db 100644 --- a/src/codegen/codegen_ops_x86-64.h +++ b/src/codegen/codegen_ops_x86-64.h @@ -57,7 +57,7 @@ static inline void call_long(uintptr_t func) static inline void load_param_1_32(codeblock_t *block, uint32_t param) { -#if WIN64 +#if _WIN64 addbyte(0xb9); /*MOVL $fetchdat,%ecx*/ #else addbyte(0xbf); /*MOVL $fetchdat,%edi*/ @@ -66,7 +66,7 @@ static inline void load_param_1_32(codeblock_t *block, uint32_t param) } static inline void load_param_1_reg_32(int reg) { -#if WIN64 +#if _WIN64 if (reg & 8) addbyte(0x44); addbyte(0x89); /*MOV ECX, EAX*/ @@ -82,7 +82,7 @@ static inline void load_param_1_reg_32(int reg) static inline void load_param_1_64(codeblock_t *block, uint64_t param) { addbyte(0x48); -#if WIN64 +#if _WIN64 addbyte(0xb9); /*MOVL $fetchdat,%ecx*/ #else addbyte(0xbf); /*MOVL $fetchdat,%edi*/ @@ -93,7 +93,7 @@ static inline void load_param_1_64(codeblock_t *block, uint64_t param) static inline void load_param_2_32(codeblock_t *block, uint32_t param) { -#if WIN64 +#if _WIN64 addbyte(0xba); /*MOVL $fetchdat,%edx*/ #else addbyte(0xbe); /*MOVL $fetchdat,%esi*/ @@ -102,7 +102,7 @@ static inline void load_param_2_32(codeblock_t *block, uint32_t param) } static inline void load_param_2_reg_32(int reg) { -#if WIN64 +#if _WIN64 if (reg & 8) addbyte(0x44); addbyte(0x89); /*MOV EDX, EAX*/ @@ -117,7 +117,7 @@ static inline void load_param_2_reg_32(int reg) static inline void load_param_2_64(codeblock_t *block, uint64_t param) { addbyte(0x48); -#if WIN64 +#if _WIN64 addbyte(0xba); /*MOVL $fetchdat,%edx*/ #else addbyte(0xbe); /*MOVL $fetchdat,%esi*/ @@ -128,7 +128,7 @@ static inline void load_param_2_reg_64(int reg) { if (reg & 8) { -#if WIN64 +#if _WIN64 addbyte(0x4c); /*MOVL EDX,reg*/ addbyte(0x89); addbyte(0xc0 | REG_EDX | ((reg & 7) << 3)); @@ -140,7 +140,7 @@ static inline void load_param_2_reg_64(int reg) } else { -#if WIN64 +#if _WIN64 addbyte(0x48); /*MOVL EDX,reg*/ addbyte(0x89); addbyte(0xc0 | REG_EDX | ((reg & 7) << 3)); @@ -156,7 +156,7 @@ static inline void load_param_3_reg_32(int reg) { if (reg & 8) { -#if WIN64 +#if _WIN64 addbyte(0x45); /*MOVL R8,reg*/ addbyte(0x89); addbyte(0xc0 | ((reg & 7) << 3)); @@ -168,7 +168,7 @@ static inline void load_param_3_reg_32(int reg) } else { -#if WIN64 +#if _WIN64 addbyte(0x41); /*MOVL R8,reg*/ addbyte(0x89); addbyte(0xc0 | ((reg & 7) << 3)); @@ -183,7 +183,7 @@ static inline void load_param_3_reg_64(int reg) { if (reg & 8) { -#if WIN64 +#if _WIN64 addbyte(0x4d); /*MOVL R8,reg*/ addbyte(0x89); addbyte(0xc0 | ((reg & 7) << 3)); @@ -195,7 +195,7 @@ static inline void load_param_3_reg_64(int reg) } else { -#if WIN64 +#if _WIN64 addbyte(0x49); /*MOVL R8,reg*/ addbyte(0x89); addbyte(0xc0 | ((reg & 7) << 3)); diff --git a/src/codegen/codegen_x86-64.c b/src/codegen/codegen_x86-64.c index 44e4ffa00..b295c251e 100644 --- a/src/codegen/codegen_x86-64.c +++ b/src/codegen/codegen_x86-64.c @@ -1,4 +1,4 @@ -#ifdef __amd64__ +#if defined __amd64__ || defined _M_X64 #include #include @@ -24,7 +24,7 @@ #include #include #endif -#if WIN64 +#if _WIN64 #include #endif @@ -70,7 +70,7 @@ void codegen_init() long pagemask = ~(pagesize - 1); #endif -#if WIN64 +#if _WIN64 codeblock = VirtualAlloc(NULL, BLOCK_SIZE * sizeof(codeblock_t), MEM_COMMIT, PAGE_EXECUTE_READWRITE); #else codeblock = malloc(BLOCK_SIZE * sizeof(codeblock_t)); @@ -295,7 +295,7 @@ void codegen_block_start_recompile(codeblock_t *block) block_pos = BLOCK_GPF_OFFSET; #ifdef OLD_GPF -#if WIN64 +#if _WIN64 addbyte(0x48); /*XOR RCX, RCX*/ addbyte(0x31); addbyte(0xc9); diff --git a/src/codegen/codegen_x86.c b/src/codegen/codegen_x86.c index 31b3202e6..beb245963 100644 --- a/src/codegen/codegen_x86.c +++ b/src/codegen/codegen_x86.c @@ -36,7 +36,7 @@ * Boston, MA 02111-1307 * USA. */ -#if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86 || defined _M_X64 +#if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86 #include #include diff --git a/src/codegen_new/codegen_allocator.c b/src/codegen_new/codegen_allocator.c index 9f46a8354..259cd4046 100644 --- a/src/codegen_new/codegen_allocator.c +++ b/src/codegen_new/codegen_allocator.c @@ -112,10 +112,14 @@ uint8_t *codeblock_allocator_get_ptr(mem_block_t *block) void codegen_allocator_clean_blocks(struct mem_block_t *block) { -#if defined __ARM_EABI__ || defined _ARM_ || defined __aarch64__ +#if defined __ARM_EABI__ || defined _ARM_ || defined __aarch64__ || defined _M_ARM || defined _M_ARM64 while (1) { +#ifndef _MSC_VER __clear_cache(&mem_block_alloc[block->offset], &mem_block_alloc[block->offset + MEM_BLOCK_SIZE]); +#else + FlushInstructionCache(GetCurrentProcess(), &mem_block_alloc[block->offset], MEM_BLOCK_SIZE); +#endif if (block->next) block = &mem_blocks[block->next - 1]; else diff --git a/src/codegen_new/codegen_allocator.h b/src/codegen_new/codegen_allocator.h index 3b57de166..6cd42258b 100644 --- a/src/codegen_new/codegen_allocator.h +++ b/src/codegen_new/codegen_allocator.h @@ -13,7 +13,7 @@ Due to the chaining, the total memory size is limited by the range of a jump instruction. ARMv7 is restricted to +/- 32 MB, ARMv8 to +/- 128 MB, x86 to +/- 2GB. As a result, total memory size is limited to 32 MB on ARMv7*/ -#if defined __ARM_EABI__ || _ARM_ +#if defined __ARM_EABI__ || defined _ARM_ || defined _M_ARM #define MEM_BLOCK_NR 32768 #else #define MEM_BLOCK_NR 131072 diff --git a/src/codegen_new/codegen_backend.h b/src/codegen_new/codegen_backend.h index 931939004..56884c84b 100644 --- a/src/codegen_new/codegen_backend.h +++ b/src/codegen_new/codegen_backend.h @@ -1,13 +1,13 @@ #ifndef _CODEGEN_BACKEND_H_ #define _CODEGEN_BACKEND_H_ -#if defined __amd64__ +#if defined __amd64__ || defined _M_X64 #include "codegen_backend_x86-64.h" #elif defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86 #include "codegen_backend_x86.h" -#elif defined __ARM_EABI__ || defined _ARM_ +#elif defined __ARM_EABI__ || defined _ARM_ || defined _M_ARM #include "codegen_backend_arm.h" -#elif defined __aarch64__ +#elif defined __aarch64__ || defined _M_ARM64 #include "codegen_backend_arm64.h" #else #error Dynamic recompiler not implemented on your platform diff --git a/src/codegen_new/codegen_backend_arm.c b/src/codegen_new/codegen_backend_arm.c index 06a06b78e..794a16525 100644 --- a/src/codegen_new/codegen_backend_arm.c +++ b/src/codegen_new/codegen_backend_arm.c @@ -1,4 +1,4 @@ -#if defined __ARM_EABI__ || defined _ARM_ +#if defined __ARM_EABI__ || defined _ARM_ || defined _M_ARM #include #include @@ -327,9 +327,13 @@ printf("block_pos=%i\n", block_pos); block_write_data = NULL; //fatal("block_pos=%i\n", block_pos); +#if !defined _MSC_VER || defined __clang__ asm("vmrs %0, fpscr\n" : "=r" (cpu_state.old_fp_control) ); +#else + cpu_state.old_fp_control = _controlfp(); +#endif if ((cpu_state.old_fp_control >> 22) & 3) fatal("VFP not in nearest rounding mode\n"); } diff --git a/src/codegen_new/codegen_backend_arm64.c b/src/codegen_new/codegen_backend_arm64.c index 5f2550e23..fab1a310d 100644 --- a/src/codegen_new/codegen_backend_arm64.c +++ b/src/codegen_new/codegen_backend_arm64.c @@ -1,4 +1,4 @@ -#ifdef __aarch64__ +#if defined __aarch64__ || defined _M_ARM64 #include #include @@ -332,9 +332,13 @@ void codegen_backend_init() codegen_allocator_clean_blocks(block->head_mem_block); +#if !defined _MSC_VER || defined __clang__ asm("mrs %0, fpcr\n" : "=r" (cpu_state.old_fp_control) ); +#else + cpu_state.old_fp_control = _controlfp(); +#endif } void codegen_set_rounding_mode(int mode) diff --git a/src/codegen_new/codegen_backend_arm64_ops.c b/src/codegen_new/codegen_backend_arm64_ops.c index 3f64b8d4e..a33062299 100644 --- a/src/codegen_new/codegen_backend_arm64_ops.c +++ b/src/codegen_new/codegen_backend_arm64_ops.c @@ -1,4 +1,4 @@ -#ifdef __aarch64__ +#if defined __aarch64__ || defined _M_ARM64 #include #include <86box/86box.h> diff --git a/src/codegen_new/codegen_backend_arm64_uops.c b/src/codegen_new/codegen_backend_arm64_uops.c index 5710b8902..7e26cdcf1 100644 --- a/src/codegen_new/codegen_backend_arm64_uops.c +++ b/src/codegen_new/codegen_backend_arm64_uops.c @@ -1,4 +1,4 @@ -#ifdef __aarch64__ +#if defined __aarch64__ || defined _M_ARM64 #include #include <86box/86box.h> diff --git a/src/codegen_new/codegen_backend_arm_ops.c b/src/codegen_new/codegen_backend_arm_ops.c index 65e48cd46..43d1ea090 100644 --- a/src/codegen_new/codegen_backend_arm_ops.c +++ b/src/codegen_new/codegen_backend_arm_ops.c @@ -1,4 +1,4 @@ -#if defined __ARM_EABI__ || defined _ARM_ +#if defined __ARM_EABI__ || defined _ARM_ || defined _M_ARM #include #include <86box/86box.h> diff --git a/src/codegen_new/codegen_backend_arm_uops.c b/src/codegen_new/codegen_backend_arm_uops.c index fd17e78d8..eff83a6f8 100644 --- a/src/codegen_new/codegen_backend_arm_uops.c +++ b/src/codegen_new/codegen_backend_arm_uops.c @@ -1,4 +1,4 @@ -#if defined __ARM_EABI__ || defined _ARM_ +#if defined __ARM_EABI__ || defined _ARM_ || defined _M_ARM #include #include diff --git a/src/codegen_new/codegen_backend_x86-64.c b/src/codegen_new/codegen_backend_x86-64.c index 10abe3c72..b9919e899 100644 --- a/src/codegen_new/codegen_backend_x86-64.c +++ b/src/codegen_new/codegen_backend_x86-64.c @@ -1,4 +1,4 @@ -#ifdef __amd64__ +#if defined __amd64__ || defined _M_X64 #include #include <86box/86box.h> @@ -22,6 +22,8 @@ #include #endif +#include + void *codegen_mem_load_byte; void *codegen_mem_load_word; void *codegen_mem_load_long; @@ -51,7 +53,7 @@ host_reg_def_t codegen_host_reg_list[CODEGEN_HOST_REGS] = host_reg_def_t codegen_host_fp_reg_list[CODEGEN_HOST_FP_REGS] = { -#if WIN64 +#if _WIN64 /*Windows x86-64 calling convention preserves XMM6-XMM15*/ {REG_XMM6, 0}, {REG_XMM7, 0}, @@ -123,7 +125,7 @@ static void build_load_routine(codeblock_t *block, int size, int is_float) *misaligned_offset = (uint8_t)((uintptr_t)&block_write_data[block_pos] - (uintptr_t)misaligned_offset) - 1; host_x86_PUSH(block, REG_RAX); host_x86_PUSH(block, REG_RDX); -#if WIN64 +#if _WIN64 host_x86_SUB64_REG_IMM(block, REG_RSP, 0x20); //host_x86_MOV32_REG_REG(block, REG_ECX, uop->imm_data); #else @@ -155,7 +157,7 @@ static void build_load_routine(codeblock_t *block, int size, int is_float) host_x86_CALL(block, (void *)readmemql); host_x86_MOVQ_XREG_REG(block, REG_XMM_TEMP, REG_RAX); } -#if WIN64 +#if _WIN64 host_x86_ADD64_REG_IMM(block, REG_RSP, 0x20); #endif host_x86_POP(block, REG_RDX); @@ -221,7 +223,7 @@ static void build_store_routine(codeblock_t *block, int size, int is_float) *misaligned_offset = (uint8_t)((uintptr_t)&block_write_data[block_pos] - (uintptr_t)misaligned_offset) - 1; host_x86_PUSH(block, REG_RAX); host_x86_PUSH(block, REG_RDX); -#if WIN64 +#if _WIN64 host_x86_SUB64_REG_IMM(block, REG_RSP, 0x28); if (size == 4 && is_float) host_x86_MOVD_REG_XREG(block, REG_EDX, REG_XMM_TEMP); //data @@ -248,7 +250,7 @@ static void build_store_routine(codeblock_t *block, int size, int is_float) host_x86_CALL(block, (void *)writememll); else if (size == 8) host_x86_CALL(block, (void *)writememql); -#if WIN64 +#if _WIN64 host_x86_ADD64_REG_IMM(block, REG_RSP, 0x28); #else host_x86_ADD64_REG_IMM(block, REG_RSP, 0x8); @@ -317,7 +319,7 @@ void codegen_backend_init() build_loadstore_routines(&codeblock[block_current]); codegen_gpf_rout = &codeblock[block_current].data[block_pos]; -#if WIN64 +#if _WIN64 host_x86_XOR32_REG_REG(block, REG_ECX, REG_ECX); host_x86_XOR32_REG_REG(block, REG_EDX, REG_EDX); #else @@ -340,11 +342,7 @@ void codegen_backend_init() block_write_data = NULL; - asm( - "stmxcsr %0\n" - : "=m" (cpu_state.old_fp_control) - ); - cpu_state.trunc_fp_control = cpu_state.old_fp_control | 0x6000; + cpu_state.trunc_fp_control = _mm_getcsr() | 0x6000; } void codegen_set_rounding_mode(int mode) diff --git a/src/codegen_new/codegen_backend_x86-64_ops.c b/src/codegen_new/codegen_backend_x86-64_ops.c index 89d065498..784bfa03d 100644 --- a/src/codegen_new/codegen_backend_x86-64_ops.c +++ b/src/codegen_new/codegen_backend_x86-64_ops.c @@ -1,4 +1,4 @@ -#ifdef __amd64__ +#if defined __amd64__ || defined _M_X64 #include #include <86box/86box.h> diff --git a/src/codegen_new/codegen_backend_x86-64_ops_sse.c b/src/codegen_new/codegen_backend_x86-64_ops_sse.c index 00ffb2db3..e2a4e7044 100644 --- a/src/codegen_new/codegen_backend_x86-64_ops_sse.c +++ b/src/codegen_new/codegen_backend_x86-64_ops_sse.c @@ -1,4 +1,4 @@ -#ifdef __amd64__ +#if defined __amd64__ || defined _M_X64 #include #include <86box/86box.h> diff --git a/src/codegen_new/codegen_backend_x86-64_uops.c b/src/codegen_new/codegen_backend_x86-64_uops.c index 9ce20590a..8ac9251e5 100644 --- a/src/codegen_new/codegen_backend_x86-64_uops.c +++ b/src/codegen_new/codegen_backend_x86-64_uops.c @@ -1,4 +1,4 @@ -#ifdef __amd64__ +#if defined __amd64__ || defined _M_X64 #include #include <86box/86box.h> @@ -803,7 +803,7 @@ static int codegen_FP_ENTER(codeblock_t *block, uop_t *uop) host_x86_TEST32_REG_IMM(block, REG_ECX, 0xc); branch_offset = host_x86_JZ_long(block); host_x86_MOV32_ABS_IMM(block, &cpu_state.oldpc, uop->imm_data); -#if WIN64 +#if _WIN64 host_x86_MOV32_REG_IMM(block, REG_ECX, 7); #else host_x86_MOV32_REG_IMM(block, REG_EDI, 7); @@ -822,7 +822,7 @@ static int codegen_MMX_ENTER(codeblock_t *block, uop_t *uop) host_x86_TEST32_REG_IMM(block, REG_ECX, 0xc); branch_offset = host_x86_JZ_long(block); host_x86_MOV32_ABS_IMM(block, &cpu_state.oldpc, uop->imm_data); -#if WIN64 +#if _WIN64 host_x86_MOV32_REG_IMM(block, REG_ECX, 7); #else host_x86_MOV32_REG_IMM(block, REG_EDI, 7); @@ -852,7 +852,7 @@ static int codegen_LOAD_FUNC_ARG0(codeblock_t *block, uop_t *uop) if (REG_IS_W(src_size)) { -#if WIN64 +#if _WIN64 host_x86_MOVZX_REG_32_16(block, REG_ECX, src_reg); #else host_x86_MOVZX_REG_32_16(block, REG_EDI, src_reg); @@ -888,7 +888,7 @@ static int codegen_LOAD_FUNC_ARG3(codeblock_t *block, uop_t *uop) static int codegen_LOAD_FUNC_ARG0_IMM(codeblock_t *block, uop_t *uop) { -#if WIN64 +#if _WIN64 host_x86_MOV32_REG_IMM(block, REG_ECX, uop->imm_data); #else host_x86_MOV32_REG_IMM(block, REG_EDI, uop->imm_data); @@ -897,7 +897,7 @@ static int codegen_LOAD_FUNC_ARG0_IMM(codeblock_t *block, uop_t *uop) } static int codegen_LOAD_FUNC_ARG1_IMM(codeblock_t *block, uop_t *uop) { -#if WIN64 +#if _WIN64 host_x86_MOV32_REG_IMM(block, REG_EDX, uop->imm_data); #else host_x86_MOV32_REG_IMM(block, REG_ESI, uop->imm_data); @@ -928,7 +928,7 @@ static int codegen_LOAD_SEG(codeblock_t *block, uop_t *uop) if (!REG_IS_W(src_size)) fatal("LOAD_SEG %02x %p\n", uop->src_reg_a_real, uop->p); #endif -#if WIN64 +#if _WIN64 host_x86_MOV16_REG_REG(block, REG_CX, src_reg); host_x86_MOV64_REG_IMM(block, REG_EDX, (uint64_t)uop->p); #else diff --git a/src/cpu/386_common.c b/src/cpu/386_common.c index 062926e0a..a62ac4f04 100644 --- a/src/cpu/386_common.c +++ b/src/cpu/386_common.c @@ -1023,12 +1023,6 @@ enter_smm(int in_hlt) if (!is_am486 && !is_pentium && !is_k5 && !is_k6 && !is_p6 && !is_cx6x86) return; - if (cpu_iscyrix) { - if (!cyrix.smhr & SMHR_VALID) - cyrix.smhr = (cyrix.arr[3].base + cyrix.arr[3].size) | SMHR_VALID; - smram_state = cyrix.smhr & SMHR_ADDR_MASK; - } - x386_common_log("enter_smm(): smbase = %08X\n", smbase); x386_common_log("CS : seg = %04X, base = %08X, limit = %08X, limit_low = %08X, limit_high = %08X, access = %02X, ar_high = %02X\n", cpu_state.seg_cs.seg, cpu_state.seg_cs.base, cpu_state.seg_cs.limit, cpu_state.seg_cs.limit_low, diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c index fe5e1f1ae..e9757668d 100644 --- a/src/cpu/cpu.c +++ b/src/cpu/cpu.c @@ -375,40 +375,40 @@ cpu_is_eligible(const cpu_family_t *cpu_family, int cpu, int machine) if (cpu_s->cpu_flags & CPU_FIXED_MULTIPLIER) { return 1; /* don't care about multiplier compatibility on fixed multiplier CPUs */ } else if (cpu_family->package & CPU_PKG_SOCKET5_7) { - if ((multi == 1.5) && (cpu_s->cpu_type & CPU_5K86) && (machine_s->cpu_min_multi > 1.5)) /* K5 5k86 */ + if ((multi == 1.5) && (cpu_s->cpu_type == CPU_5K86) && (machine_s->cpu_min_multi > 1.5)) /* K5 5k86 */ multi = 2.0; else if (multi == 1.75) /* K5 5k86 */ multi = 2.5; else if (multi == 2.0) { - if (cpu_s->cpu_type & CPU_5K86) /* K5 5k86 */ + if (cpu_s->cpu_type == CPU_5K86) /* K5 5k86 */ multi = 3.0; - else if (cpu_s->cpu_type & (CPU_K6_2P | CPU_K6_3P)) /* K6-2+ / K6-3+ */ + else if (cpu_s->cpu_type == CPU_K6_2P || cpu_s->cpu_type == CPU_K6_3P) /* K6-2+ / K6-3+ */ multi = 2.5; - else if ((cpu_s->cpu_type & (CPU_WINCHIP | CPU_WINCHIP2)) && (machine_s->cpu_min_multi > 2.0)) /* WinChip (2) */ + else if ((cpu_s->cpu_type == CPU_WINCHIP || cpu_s->cpu_type == CPU_WINCHIP2) && (machine_s->cpu_min_multi > 2.0)) /* WinChip (2) */ multi = 2.5; } else if (multi == (7.0 / 3.0)) /* WinChip 2A - 2.33x */ multi = 5.0; else if (multi == (8.0 / 3.0)) /* WinChip 2A - 2.66x */ multi = 5.5; - else if ((multi == 3.0) && (cpu_s->cpu_type & (CPU_Cx6x86 | CPU_Cx6x86L))) /* 6x86(L) */ + else if ((multi == 3.0) && (cpu_s->cpu_type == CPU_Cx6x86 || cpu_s->cpu_type == CPU_Cx6x86L)) /* 6x86(L) */ multi = 1.5; else if (multi == (10.0 / 3.0)) /* WinChip 2A - 3.33x */ multi = 2.0; else if ((multi == 3.5) && (machine_s->cpu_min_multi < 3.5)) /* standard set by the Pentium MMX */ multi = 1.5; else if (multi == 4.0) { - if (cpu_s->cpu_type & (CPU_WINCHIP | CPU_WINCHIP2)) { /* WinChip (2) */ + if (cpu_s->cpu_type == CPU_WINCHIP || cpu_s->cpu_type == CPU_WINCHIP2) { /* WinChip (2) */ if (machine_s->cpu_min_multi >= 1.5) multi = 1.5; else if (machine_s->cpu_min_multi >= 3.5) multi = 3.5; else if (machine_s->cpu_min_multi >= 4.5) multi = 4.5; - } else if (cpu_s->cpu_type & (CPU_Cx6x86 | CPU_Cx6x86L)) /* 6x86(L) */ + } else if (cpu_s->cpu_type == CPU_Cx6x86 || cpu_s->cpu_type == CPU_Cx6x86L) /* 6x86(L) */ multi = 3.0; } - else if ((multi == 5.0) && (cpu_s->cpu_type & (CPU_WINCHIP | CPU_WINCHIP2)) && (machine_s->cpu_min_multi > 5.0)) /* WinChip (2) */ + else if ((multi == 5.0) && (cpu_s->cpu_type == CPU_WINCHIP || cpu_s->cpu_type == CPU_WINCHIP2) && (machine_s->cpu_min_multi > 5.0)) /* WinChip (2) */ multi = 5.5; else if ((multi == 6.0) && (machine_s->cpu_max_multi < 6.0)) /* K6-2(+) / K6-3(+) */ multi = 2.0; diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h index f21c4822f..ead6eca6b 100644 --- a/src/cpu/cpu.h +++ b/src/cpu/cpu.h @@ -32,58 +32,58 @@ enum { }; enum { - CPU_8088 = (1ULL << 0), /* 808x class CPUs */ - CPU_8086 = (1ULL << 1), + CPU_8088, /* 808x class CPUs */ + CPU_8086, #ifdef USE_NEC_808X - CPU_V20 = (1ULL << 2), /* NEC 808x class CPUs - future proofing */ - CPU_V30 = (1ULL << 3), + CPU_V20, /* NEC 808x class CPUs - future proofing */ + CPU_V30, #endif - CPU_286 = (1ULL << 4), /* 286 class CPUs */ - CPU_386SX = (1ULL << 5), /* 386 class CPUs */ - CPU_386DX = (1ULL << 6), - CPU_IBM386SLC = (1ULL << 7), - CPU_IBM486SLC = (1ULL << 8), - CPU_IBM486BL = (1ULL << 9), - CPU_RAPIDCAD = (1ULL << 10), - CPU_486SLC = (1ULL << 11), - CPU_486DLC = (1ULL << 12), - CPU_i486SX = (1ULL << 13), /* 486 class CPUs */ - CPU_Am486SX = (1ULL << 14), - CPU_Cx486S = (1ULL << 15), - CPU_i486SX2 = (1ULL << 16), - CPU_Am486SX2 = (1ULL << 17), - CPU_i486DX = (1ULL << 18), - CPU_i486DX2 = (1ULL << 19), - CPU_Am486DX = (1ULL << 20), - CPU_Am486DX2 = (1ULL << 21), - CPU_Cx486DX = (1ULL << 22), - CPU_Cx486DX2 = (1ULL << 23), - CPU_iDX4 = (1ULL << 24), - CPU_Am486DX4 = (1ULL << 25), - CPU_Cx486DX4 = (1ULL << 26), - CPU_Am5x86 = (1ULL << 27), - CPU_Cx5x86 = (1ULL << 28), - CPU_P24T = (1ULL << 29), - CPU_WINCHIP = (1ULL << 30), /* 586 class CPUs */ - CPU_WINCHIP2 = (1ULL << 31), - CPU_PENTIUM = (1ULL << 32), - CPU_PENTIUMMMX = (1ULL << 33), - CPU_Cx6x86 = (1ULL << 34), - CPU_Cx6x86MX = (1ULL << 35), - CPU_Cx6x86L = (1ULL << 36), - CPU_CxGX1 = (1ULL << 37), - CPU_K5 = (1ULL << 38), - CPU_5K86 = (1ULL << 39), - CPU_K6 = (1ULL << 40), - CPU_K6_2 = (1ULL << 41), - CPU_K6_2C = (1ULL << 42), - CPU_K6_3 = (1ULL << 43), - CPU_K6_2P = (1ULL << 44), - CPU_K6_3P = (1ULL << 45), - CPU_CYRIX3S = (1ULL << 46), - CPU_PENTIUMPRO = (1ULL << 47), /* 686 class CPUs */ - CPU_PENTIUM2 = (1ULL << 48), - CPU_PENTIUM2D = (1ULL << 49) + CPU_286, /* 286 class CPUs */ + CPU_386SX, /* 386 class CPUs */ + CPU_386DX, + CPU_IBM386SLC, + CPU_IBM486SLC, + CPU_IBM486BL, + CPU_RAPIDCAD, + CPU_486SLC, + CPU_486DLC, + CPU_i486SX, /* 486 class CPUs */ + CPU_Am486SX, + CPU_Cx486S, + CPU_i486SX2, + CPU_Am486SX2, + CPU_i486DX, + CPU_i486DX2, + CPU_Am486DX, + CPU_Am486DX2, + CPU_Cx486DX, + CPU_Cx486DX2, + CPU_iDX4, + CPU_Am486DX4, + CPU_Cx486DX4, + CPU_Am5x86, + CPU_Cx5x86, + CPU_P24T, + CPU_WINCHIP, /* 586 class CPUs */ + CPU_WINCHIP2, + CPU_PENTIUM, + CPU_PENTIUMMMX, + CPU_Cx6x86, + CPU_Cx6x86MX, + CPU_Cx6x86L, + CPU_CxGX1, + CPU_K5, + CPU_5K86, + CPU_K6, + CPU_K6_2, + CPU_K6_2C, + CPU_K6_3, + CPU_K6_2P, + CPU_K6_3P, + CPU_CYRIX3S, + CPU_PENTIUMPRO, /* 686 class CPUs */ + CPU_PENTIUM2, + CPU_PENTIUM2D }; enum { diff --git a/src/cpu/x87_ops.h b/src/cpu/x87_ops.h index 2d56de6b6..93df6daff 100644 --- a/src/cpu/x87_ops.h +++ b/src/cpu/x87_ops.h @@ -46,6 +46,12 @@ static int rounding_modes[4] = {FE_TONEAREST, FE_DOWNWARD, FE_UPWARD, FE_TOWARDZ #define STATUS_ZERODIVIDE 4 +#if defined(_MSC_VER) && !defined(__clang__) +# define X87_INLINE_ASM defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86 +#else +# define X87_INLINE_ASM defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86 || defined _M_X64 || defined __amd64__ +#endif + #ifdef FPU_8087 #define x87_div(dst, src1, src2) do \ { \ @@ -311,7 +317,7 @@ static __inline void x87_stmmx(MMX_REG r) static __inline uint16_t x87_compare(double a, double b) { -#if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86 || defined _M_X64 +#if X87_INLINE_ASM uint32_t result; double ea = a, eb = b; const uint64_t ia = 0x3fec1a6ff866a936ull; @@ -325,7 +331,7 @@ static __inline uint16_t x87_compare(double a, double b) ((a == INFINITY) || (a == -INFINITY)) && ((b == INFINITY) || (b == -INFINITY))) eb = ea; -#ifndef _MSC_VER +#if !defined(_MSC_VER) || defined(__clang__) /* Memory barrier, to force GCC to write to the input parameters * before the compare rather than after */ __asm volatile ("" : : : "memory"); @@ -373,10 +379,10 @@ static __inline uint16_t x87_compare(double a, double b) static __inline uint16_t x87_ucompare(double a, double b) { -#if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86 || defined _M_X64 || defined __amd64__ +#if X87_INLINE_ASM uint32_t result; -#ifndef _MSC_VER +#if !defined(_MSC_VER) || defined(__clang__) /* Memory barrier, to force GCC to write to the input parameters * before the compare rather than after */ asm volatile ("" : : : "memory"); diff --git a/src/device/clock_ics9xxx.c b/src/device/clock_ics9xxx.c index 37e534e2f..96e1544e4 100644 --- a/src/device/clock_ics9xxx.c +++ b/src/device/clock_ics9xxx.c @@ -117,7 +117,6 @@ static const ics9xxx_model_t ics9xxx_models[] = { {0} } ICS9xxx_MODEL_END() -#if 0 ICS9xxx_MODEL(ICS9248_39) .max_reg = 5, .regs = {0x00, 0x7f, 0xff, 0xbf, 0xf5, 0xff}, @@ -125,6 +124,7 @@ static const ics9xxx_model_t ics9xxx_models[] = { .hw_select = {0, 3}, .frequencies_ref = ICS9250_08 ICS9xxx_MODEL_END() +#if 0 ICS9xxx_MODEL(ICS9248_81) .max_reg = 5, .regs = {0x82, 0xfe, 0x7f, 0xff, 0xff, 0xb7}, diff --git a/src/device/hwm_lm78.c b/src/device/hwm_lm78.c index db2b70bb0..e65002acb 100644 --- a/src/device/hwm_lm78.c +++ b/src/device/hwm_lm78.c @@ -563,7 +563,7 @@ const device_t lm78_device = { }; -/* Winbond W83781D (or ASUS AS97127F) on ISA and SMBus. */ +/* Winbond W83781D on ISA and SMBus. */ const device_t w83781d_device = { "Winbond W83781D Hardware Monitor", DEVICE_ISA, diff --git a/src/disk/hdc_ide_cmd640.c b/src/disk/hdc_ide_cmd640.c index 53500f52a..a958eebdf 100644 --- a/src/disk/hdc_ide_cmd640.c +++ b/src/disk/hdc_ide_cmd640.c @@ -378,6 +378,7 @@ cmd640_init(const device_t *info) dev->regs[0x01] = 0x10; dev->regs[0x02] = 0x40; /* PCI-0640B */ dev->regs[0x03] = 0x06; + dev->regs[0x04] = 0x01; /* Apparently required by the ASUS PCI/I-P5SP4 AND PCI/I-P54SP4 */ dev->regs[0x07] = 0x02; /* DEVSEL timing: 01 medium */ dev->regs[0x08] = 0x02; /* Revision 02 */ dev->regs[0x09] = info->local; /* Programming interface */ @@ -395,7 +396,7 @@ cmd640_init(const device_t *info) dev->regs[0x3c] = 0x14; /* IRQ 14 */ dev->regs[0x3d] = 0x01; /* INTA */ - device_add(&ide_vlb_2ch_device); + device_add(&ide_pci_2ch_device); dev->slot = pci_add_card(PCI_ADD_IDE, cmd640_pci_read, cmd640_pci_write, dev); dev->irq_mode[0] = dev->irq_mode[1] = 0; @@ -410,7 +411,7 @@ cmd640_init(const device_t *info) ide_board_set_force_ata3(0, 1); ide_board_set_force_ata3(1, 1); - ide_pri_disable(); + // ide_pri_disable(); } else if (info->flags & DEVICE_VLB) { if ((info->local & 0xffff) == 0x0078) dev->regs[0x50] |= 0x20; /* 0 = 178h, 17Ch; 1 = 078h, 07Ch */ @@ -418,9 +419,9 @@ cmd640_init(const device_t *info) accessing the configuration registers */ dev->in_cfg = 1; /* Configuration register are accessible */ - device_add(&ide_pci_2ch_device); + device_add(&ide_vlb_2ch_device); - io_sethandler(0x0078, 0x0008, + io_sethandler(info->local & 0xffff, 0x0008, cmd640_vlb_read, cmd640_vlb_readw, cmd640_vlb_readl, cmd640_vlb_write, cmd640_vlb_writew, cmd640_vlb_writel, dev); diff --git a/src/include/86box/clock.h b/src/include/86box/clock.h index 003b58b1a..b1a3df478 100644 --- a/src/include/86box/clock.h +++ b/src/include/86box/clock.h @@ -21,8 +21,8 @@ enum { ICS9xxx_xx, ICS9150_08, -#if 0 ICS9248_39, +#if 0 ICS9248_81, ICS9248_95, ICS9248_98, diff --git a/src/include/86box/machine.h b/src/include/86box/machine.h index 380aacaf8..a20cc2379 100644 --- a/src/include/86box/machine.h +++ b/src/include/86box/machine.h @@ -376,6 +376,12 @@ extern int machine_at_vectra54_init(const machine_t *); extern int machine_at_powermate_v_init(const machine_t *); extern int machine_at_acerv30_init(const machine_t *); +#if defined(DEV_BRANCH) && defined(USE_SIS_85C50X) +extern int machine_at_p5sp4_init(const machine_t *); +extern int machine_at_p54sp4_init(const machine_t *); +extern int machine_at_sq588_init(const machine_t *); +#endif + #ifdef EMU_DEVICE_H extern const device_t *at_endeavor_get_device(void); #define at_vectra54_get_device at_endeavor_get_device @@ -469,6 +475,7 @@ extern int machine_at_p6sba_init(const machine_t *); extern int machine_at_ergox365_init(const machine_t *); #endif extern int machine_at_ficka6130_init(const machine_t *); +extern int machine_at_p3v133_init(const machine_t *); extern int machine_at_p3v4x_init(const machine_t *); #ifdef EMU_DEVICE_H @@ -578,6 +585,7 @@ extern int machine_xt_dtk_init(const machine_t *); extern int machine_xt_jukopc_init(const machine_t *); extern int machine_xt_open_xt_init(const machine_t *); extern int machine_xt_pxxt_init(const machine_t *); +extern int machine_xt_ncrpc4i_init(const machine_t *); extern int machine_xt_iskra3104_init(const machine_t *); diff --git a/src/include/86box/sio.h b/src/include/86box/sio.h index df4d84a73..3c4702ffa 100644 --- a/src/include/86box/sio.h +++ b/src/include/86box/sio.h @@ -23,6 +23,7 @@ extern const device_t f82c710_device; extern const device_t fdc37c661_device; extern const device_t fdc37c663_device; extern const device_t fdc37c665_device; +extern const device_t fdc37c665_ide_device; extern const device_t fdc37c666_device; extern const device_t fdc37c669_device; extern const device_t fdc37c669_370_device; diff --git a/src/include/86box/vid_nga.h b/src/include/86box/vid_nga.h new file mode 100644 index 000000000..1c8bd786e --- /dev/null +++ b/src/include/86box/vid_nga.h @@ -0,0 +1,48 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Emulation of the Olivetti OGC 8-bit ISA (GO708) and + * M21/M24/M28 16-bit bus (GO317/318/380/709) video cards. + * + * + * + * Authors: Sarah Walker, + * Miran Grca, + * Fred N. van Kempen, + * EngiNerd, + * + * Copyright 2008-2019 Sarah Walker. + * Copyright 2016-2019 Miran Grca. + * Copyright 2017-2019 Fred N. van Kempen. + * Copyright 2020 EngiNerd. + */ + +typedef struct nga_t { + cga_t cga; + /* unused in OGC, required for M19 video card structure idiom */ + uint32_t base; + int lineff; + int page; + uint8_t *vram_64k; + mem_mapping_t mapping_64k; +} nga_t; + +void nga_recalctimings(nga_t *ogc); +void nga_out(uint16_t addr, uint8_t val, void *priv); +uint8_t nga_in(uint16_t addr, void *priv); +void nga_write(uint32_t addr, uint8_t val, void *priv); +uint8_t nga_read(uint32_t addr, void *priv); +void nga_poll(void *priv); +void nga_close(void *priv); +void nga_mdaattr_rebuild(); + + +#ifdef EMU_DEVICE_H +extern const device_config_t nga_config[]; +extern const device_t nga_device; +#endif diff --git a/src/include/86box/vid_voodoo_codegen_x86-64.h b/src/include/86box/vid_voodoo_codegen_x86-64.h index bbc7d2537..4e6cbcaf2 100644 --- a/src/include/86box/vid_voodoo_codegen_x86-64.h +++ b/src/include/86box/vid_voodoo_codegen_x86-64.h @@ -9,13 +9,17 @@ #include #include #endif -#if WIN64 +#if _WIN64 #define BITMAP windows_BITMAP #include #undef BITMAP #endif +#ifdef _MSC_VER +#include +#else #include +#endif #define BLOCK_NUM 8 #define BLOCK_MASK (BLOCK_NUM-1) @@ -752,7 +756,7 @@ static inline void voodoo_generate(uint8_t *code_block, voodoo_t *voodoo, voodoo addbyte(0x6f); addbyte(0x07 | (3 << 3)); -#if WIN64 +#if _WIN64 addbyte(0x48); /*MOV RDI, RCX (voodoo_state)*/ addbyte(0x89); addbyte(0xcf); @@ -3428,7 +3432,7 @@ void voodoo_codegen_init(voodoo_t *voodoo) { int c; -#if WIN64 +#if _WIN64 voodoo->codegen_data = VirtualAlloc(NULL, sizeof(voodoo_x86_data_t) * BLOCK_NUM * 4, MEM_COMMIT, PAGE_EXECUTE_READWRITE); #else voodoo->codegen_data = mmap(0, sizeof(voodoo_x86_data_t) * BLOCK_NUM*4, PROT_READ|PROT_WRITE|PROT_EXEC, MAP_ANON|MAP_PRIVATE, 0, 0); @@ -3458,7 +3462,7 @@ void voodoo_codegen_init(voodoo_t *voodoo) void voodoo_codegen_close(voodoo_t *voodoo) { -#if WIN64 +#if _WIN64 VirtualFree(voodoo->codegen_data, 0, MEM_RELEASE); #else munmap(voodoo->codegen_data, sizeof(voodoo_x86_data_t) * BLOCK_NUM*4); diff --git a/src/include/86box/vid_voodoo_codegen_x86.h b/src/include/86box/vid_voodoo_codegen_x86.h index 6e8c891c1..f84ee00aa 100644 --- a/src/include/86box/vid_voodoo_codegen_x86.h +++ b/src/include/86box/vid_voodoo_codegen_x86.h @@ -15,7 +15,11 @@ #undef BITMAP #endif +#ifdef _MSC_VER +#include +#else #include +#endif #define BLOCK_NUM 8 #define BLOCK_MASK (BLOCK_NUM-1) diff --git a/src/include/86box/vid_voodoo_render.h b/src/include/86box/vid_voodoo_render.h index 1cb74fa5f..4596c59bb 100644 --- a/src/include/86box/vid_voodoo_render.h +++ b/src/include/86box/vid_voodoo_render.h @@ -1,4 +1,4 @@ -#if !(defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined WIN32 || defined _WIN32 || defined _WIN32) && !(defined __amd64__) +#if !(defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86 || defined __amd64__ || defined _M_X64) #define NO_CODEGEN #endif diff --git a/src/include/86box/video.h b/src/include/86box/video.h index bc55eebcf..2079265c2 100644 --- a/src/include/86box/video.h +++ b/src/include/86box/video.h @@ -173,6 +173,7 @@ extern uint8_t video_force_resize_get(void); extern void video_force_resize_set(uint8_t res); extern void video_update_timing(void); +extern void loadfont_ex(wchar_t *s, int format, int offset); extern void loadfont(wchar_t *s, int format); extern int get_actual_size_x(void); @@ -245,6 +246,9 @@ extern const device_t compaq_cga_2_device; extern const device_t ogc_device; extern const device_t ogc_m24_device; +/* NCR NGA */ +extern const device_t nga_device; + /* Tseng ET4000AX */ extern const device_t et4000_isa_device; extern const device_t et4000k_isa_device; diff --git a/src/include/slirp/libslirp.h b/src/include/slirp/libslirp.h index 27e1f61bb..7c4340390 100644 --- a/src/include/slirp/libslirp.h +++ b/src/include/slirp/libslirp.h @@ -16,6 +16,17 @@ #include "libslirp-version.h" +/* Windows does not define ssize_t, so we need to define it here. */ +#ifndef _SSIZE_T_DEFINED +# define _SSIZE_T_DEFINED +# undef ssize_t +# ifdef _WIN64 +# define ssize_t int64_t +# else +# define ssize_t int32_t +# endif +#endif + #ifdef __cplusplus extern "C" { #endif diff --git a/src/include/tinyglib.h b/src/include/tinyglib.h index e510cbc85..fabdefcfc 100644 --- a/src/include/tinyglib.h +++ b/src/include/tinyglib.h @@ -77,6 +77,17 @@ /* Types */ +/* Windows does not define ssize_t, so we need to define it here. */ +#ifndef _SSIZE_T_DEFINED +# define _SSIZE_T_DEFINED +# undef ssize_t +# ifdef _WIN64 +# define ssize_t int64_t +# else +# define ssize_t int32_t +# endif +#endif + #define gboolean int #define gchar char #define gint int diff --git a/src/machine/m_at_slot1.c b/src/machine/m_at_slot1.c index f4fe466ac..ebdc421b1 100644 --- a/src/machine/m_at_slot1.c +++ b/src/machine/m_at_slot1.c @@ -550,6 +550,44 @@ machine_at_ficka6130_init(const machine_t *model) } +int +machine_at_p3v133_init(const machine_t *model) +{ + int ret; + + ret = bios_load_linear(L"roms/machines/p3v133/1003.002", + 0x000c0000, 262144, 0); + + if (bios_only || !ret) + return ret; + + machine_at_common_init_ex(model, 2); + + pci_init(PCI_CONFIG_TYPE_1); + pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); + pci_register_slot(0x04, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); + pci_register_slot(0x09, PCI_CARD_NORMAL, 4, 1, 2, 3); + pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2); + pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1); + pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4); + pci_register_slot(0x0D, PCI_CARD_NORMAL, 4, 1, 2, 3); + pci_register_slot(0x0E, PCI_CARD_NORMAL, 3, 4, 1, 2); + pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4); + device_add(&via_apro133_device); + device_add(&via_vt82c596b_device); + device_add(&w83977ef_device); + device_add(&keyboard_ps2_ami_pci_device); + device_add(ics9xxx_get(ICS9248_39)); + device_add(&sst_flash_39sf020_device); + spd_register(SPD_TYPE_SDRAM, 0x7, 512); + device_add(&w83781d_device); /* fans: Chassis, CPU, Power; temperatures: MB, unused, CPU */ + hwm_values.temperatures[1] = 0; /* unused */ + hwm_values.temperatures[2] -= 3; /* CPU offset */ + + return ret; +} + + int machine_at_p3v4x_init(const machine_t *model) { diff --git a/src/machine/m_at_socket4_5.c b/src/machine/m_at_socket4_5.c index de61ed113..2cbdaa0d1 100644 --- a/src/machine/m_at_socket4_5.c +++ b/src/machine/m_at_socket4_5.c @@ -646,3 +646,95 @@ machine_at_acerv30_init(const machine_t *model) return ret; } + + +#if defined(DEV_BRANCH) && defined(USE_SIS_85C50X) +static void +machine_at_sp4_common_init(const machine_t *model) +{ + machine_at_common_init(model); + + pci_init(PCI_CONFIG_TYPE_1); + pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); + pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0); + /* Excluded: 02, 03, 04, 05, 06, 07, 08, 09, 0A, 0B, 0C, 0D, 0E, 0F, 10, 11, 12, 13, 14 */ + pci_register_slot(0x0D, PCI_CARD_IDE, 1, 2, 3, 4); + /* Excluded: 02, 03*, 04*, 05*, 06*, 07*, 08* */ + /* Slots: 09 (04), 0A (03), 0B (02), 0C (07) */ + pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4); + pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1); + pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2); + pci_register_slot(0x09, PCI_CARD_NORMAL, 4, 1, 2, 3); + device_add(&sis_85c50x_device); + device_add(&ide_cmd640_pci_device); + device_add(&keyboard_ps2_ami_pci_device); + device_add(&fdc37c665_device); + device_add(&intel_flash_bxt_device); +} + + +int +machine_at_p5sp4_init(const machine_t *model) +{ + int ret; + + ret = bios_load_linear(L"roms/machines/p5sp4/0106.001", + 0x000e0000, 131072, 0); + + if (bios_only || !ret) + return ret; + + machine_at_sp4_common_init(model); + + return ret; +} + + +int +machine_at_p54sp4_init(const machine_t *model) +{ + int ret; + + ret = bios_load_linear(L"roms/machines/p54sp4/SI5I0204.AWD", + 0x000e0000, 131072, 0); + + if (bios_only || !ret) + return ret; + + machine_at_sp4_common_init(model); + + return ret; +} + + +int +machine_at_sq588_init(const machine_t *model) +{ + int ret; + + ret = bios_load_linear(L"roms/machines/sq588/sq588b03.rom", + 0x000e0000, 131072, 0); + + if (bios_only || !ret) + return ret; + + machine_at_common_init(model); + + pci_init(PCI_CONFIG_TYPE_1); + pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); + pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0); + /* Correct: 0D (01), 0F (02), 11 (03), 13 (04) */ + pci_register_slot(0x02, PCI_CARD_IDE, 1, 2, 3, 4); + pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4); + pci_register_slot(0x0F, PCI_CARD_NORMAL, 2, 3, 4, 1); + pci_register_slot(0x11, PCI_CARD_NORMAL, 3, 4, 1, 2); + pci_register_slot(0x13, PCI_CARD_NORMAL, 4, 1, 2, 3); + device_add(&sis_85c50x_device); + device_add(&ide_cmd640_pci_single_channel_device); + device_add(&keyboard_ps2_ami_pci_device); + device_add(&fdc37c665_ide_device); + device_add(&sst_flash_29ee010_device); + + return ret; +} +#endif diff --git a/src/machine/m_xt.c b/src/machine/m_xt.c index ad136f105..e94c7bc28 100644 --- a/src/machine/m_xt.c +++ b/src/machine/m_xt.c @@ -322,3 +322,22 @@ machine_xt_iskra3104_init(const machine_t *model) return ret; } + +int +machine_xt_ncrpc4i_init(const machine_t *model) +{ + int ret; + + ret = bios_load_linear(L"roms/machines/ncr_pc4i/NCR_PC4i_BIOSROM_1985.bin", + 0x000fc000, 16384, 0); + + if (bios_only || !ret) + return ret; + + machine_xt_clone_init(model); + + return ret; +} + + + diff --git a/src/machine/m_xt_olivetti.c b/src/machine/m_xt_olivetti.c index dae03edba..a52588ce0 100644 --- a/src/machine/m_xt_olivetti.c +++ b/src/machine/m_xt_olivetti.c @@ -522,7 +522,7 @@ m19_vid_init(olim19_vid_t *vid){ //display_type = device_get_config_int("display_type"); /* OGC emulation part begin */ - loadfont(L"roms/machines/olivetti_m19/BIOS.BIN", 10); + loadfont_ex(L"roms/machines/olivetti_m19/BIOS.BIN", 1, 90); /* composite is not working yet */ vid->ogc.cga.composite = 0; // (display_type != CGA_RGB); //vid->ogc.cga.snow_enabled = device_get_config_int("snow_enabled"); diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index 4d9b40d56..f8295ffd9 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -67,6 +67,7 @@ const machine_t machines[] = { { "[8088] DTK XT clone", "dtk", MACHINE_TYPE_8088, CPU_PKG_8088, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC, 64, 640, 64, 0, machine_xt_dtk_init, NULL }, { "[8088] Generic XT clone", "genxt", MACHINE_TYPE_8088, CPU_PKG_8088, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC, 64, 640, 64, 0, machine_genxt_init, NULL }, { "[8088] Juko XT clone", "jukopc", MACHINE_TYPE_8088, CPU_PKG_8088, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC, 64, 640, 64, 0, machine_xt_jukopc_init, NULL }, + { "[8088] NCR PC4i", "ncr_pc4i", MACHINE_TYPE_8088, CPU_PKG_8088, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC, 256, 640, 256, 0, machine_xt_ncrpc4i_init, NULL }, { "[8088] Olivetti M19", "olivetti_m19", MACHINE_TYPE_8088, CPU_PKG_8088, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC | MACHINE_VIDEO_FIXED, 256, 640, 256, 0, machine_xt_olim19_init, NULL }, { "[8088] OpenXT", "open_xt", MACHINE_TYPE_8088, CPU_PKG_8088, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC, 64, 640, 64, 0, machine_xt_open_xt_init, NULL }, { "[8088] Phoenix XT clone", "pxxt", MACHINE_TYPE_8088, CPU_PKG_8088, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC, 64, 640, 64, 0, machine_xt_pxxt_init, NULL }, @@ -88,7 +89,7 @@ const machine_t machines[] = { { "[8086] Amstrad PC20(0)", "pc200", MACHINE_TYPE_8086, CPU_PKG_8086, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC | MACHINE_VIDEO | MACHINE_MOUSE | MACHINE_NONMI, 512, 640, 128, 63, machine_pc200_init, pc200_get_device }, { "[8086] Amstrad PPC512/640", "ppc512", MACHINE_TYPE_8086, CPU_PKG_8086, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC | MACHINE_VIDEO | MACHINE_MOUSE | MACHINE_NONMI, 512, 640, 128, 63, machine_ppc512_init, ppc512_get_device }, { "[8086] Compaq Deskpro", "deskpro", MACHINE_TYPE_8086, CPU_PKG_8086, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC, 128, 640, 128, 0, machine_xt_compaq_deskpro_init, NULL }, - { "[8086] Olivetti M24", "olivetti_m24", MACHINE_TYPE_8086, CPU_PKG_8086, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC | MACHINE_VIDEO | MACHINE_MOUSE, 128, 640, 128, 0, machine_xt_olim24_init, m24_get_device }, + { "[8086] Olivetti M21/24/24SP", "olivetti_m24", MACHINE_TYPE_8086, CPU_PKG_8086, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC | MACHINE_VIDEO | MACHINE_MOUSE, 128, 640, 128, 0, machine_xt_olim24_init, m24_get_device }, { "[8086] Olivetti M240", "olivetti_m240", MACHINE_TYPE_8086, CPU_PKG_8086, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC, 128, 640, 128, 0, machine_xt_olim240_init, NULL }, { "[8086] Schetmash Iskra-3104", "iskra3104", MACHINE_TYPE_8086, CPU_PKG_8086, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC, 128, 640, 128, 0, machine_xt_iskra3104_init, NULL }, { "[8086] Tandy 1000 SL/2", "tandy1000sl2", MACHINE_TYPE_8086, CPU_PKG_8086, 0, 0, 0, 0, 0, 0, 0, MACHINE_PC | MACHINE_VIDEO_FIXED, 512, 768, 128, 0, machine_tandy1000sl2_init, tandy1k_sl_get_device }, @@ -242,6 +243,11 @@ const machine_t machines[] = { /* OPTi 596/597 */ { "[OPTi 597] AMI Excalibur VLB", "excalibur", MACHINE_TYPE_SOCKET4, CPU_PKG_SOCKET4, 0, 60000000, 66666667, 0, 0, MACHINE_MULTIPLIER_FIXED, MACHINE_VLB | MACHINE_IDE, 2048, 65536, 2048, 127, machine_at_excalibur_init, NULL }, + /* SiS 85C50x */ + #if defined(DEV_BRANCH) && defined(USE_SIS_85C50X) + { "[SiS 85C50x] ASUS PCI/I-P5SP4", "p5sp4", MACHINE_TYPE_SOCKET4, CPU_PKG_SOCKET4, 0, 60000000, 66666667, 0, 0, MACHINE_MULTIPLIER_FIXED, MACHINE_PCI | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, machine_at_p5sp4_init, NULL }, + #endif + /* Socket 5 machines */ /* 430NX */ { "[i430NX] Intel Premiere/PCI II", "plato", MACHINE_TYPE_SOCKET5, CPU_PKG_SOCKET5_7, 0, 50000000, 66666667, 3520, 3520, 1.5, 1.5, MACHINE_PCI | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL, 2048, 131072, 2048, 127, machine_at_plato_init, NULL }, @@ -256,6 +262,12 @@ const machine_t machines[] = { { "[i430FX] NEC PowerMate V", "powermate_v", MACHINE_TYPE_SOCKET5, CPU_PKG_SOCKET5_7, 0, 50000000, 66666667, 3380, 3520, 1.5, 2.0, MACHINE_PCI | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, machine_at_powermate_v_init, NULL }, { "[i430FX] PC Partner MB500N", "mb500n", MACHINE_TYPE_SOCKET5, CPU_PKG_SOCKET5_7, 0, 50000000, 66666667, 3380, 3520, 1.5, 3.0, MACHINE_PCI | MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, machine_at_mb500n_init, NULL }, + /* SiS 85C50x */ + #if defined(DEV_BRANCH) && defined(USE_SIS_85C50X) + { "[SiS 85C50x] ASUS PCI/I-P54SP4", "p54sp4", MACHINE_TYPE_SOCKET5, CPU_PKG_SOCKET5_7, 0, 50000000, 66666667, 3380, 3520, 1.5, 2.0, MACHINE_PCI | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, machine_at_p54sp4_init, NULL }, + { "[SiS 85C50x] BCM SQ-588", "sq588", MACHINE_TYPE_SOCKET5, CPU_PKG_SOCKET5_7, 0, 50000000, 66666667, 3380, 3520, 1.5, 2.0, MACHINE_PCI | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, machine_at_sq588_init, NULL }, + #endif + /* Socket 7 machines */ /* 430FX */ { "[i430FX] ASUS P/I-P54TP4XE", "p54tp4xe", MACHINE_TYPE_SOCKET7_3V, CPU_PKG_SOCKET5_7, 0, 50000000, 66666667, 3380, 3600, 1.5, 2.0, MACHINE_PCI | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL, 8192, 131072, 8192, 127, machine_at_p54tp4xe_init, NULL }, @@ -356,6 +368,7 @@ const machine_t machines[] = { /* VIA Apollo Pro */ { "[VIA Apollo Pro] FIC KA-6130", "ficka6130", MACHINE_TYPE_SLOT1, CPU_PKG_SLOT1, 0, 66666667, 100000000, 1800, 3500, 3.5, 5.0, MACHINE_AGP | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL, 8192, 524288, 8192, 255, machine_at_ficka6130_init, NULL }, + { "[VIA Apollo Pro133] ASUS P3V133", "p3v133", MACHINE_TYPE_SLOT1, CPU_PKG_SLOT1, 0, 66666667, 150000000, 1300, 3500, 2.0, 8.0, MACHINE_AGP | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL, 8192,1572864, 8192, 255, machine_at_p3v133_init, NULL }, { "[VIA Apollo Pro133A] ASUS P3V4X", "p3v4x", MACHINE_TYPE_SLOT1, CPU_PKG_SLOT1, 0, 66666667, 150000000, 1300, 3500, 2.0, 8.0, MACHINE_AGP | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL, 8192,2097152, 8192, 255, machine_at_p3v4x_init, NULL }, /* Slot 2 machines */ @@ -382,10 +395,10 @@ const machine_t machines[] = { /* VIA Apollo Pro */ { "[VIA Apollo Pro] PC Partner APAS3", "apas3", MACHINE_TYPE_SOCKET370, CPU_PKG_SOCKET370, 0, 66666667, 100000000, 1800, 3500, 3.0, 8.0, MACHINE_AGP | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL, 8192, 786432, 8192, 255, machine_at_apas3_init, NULL }, + { "[VIA Apollo Pro133] ECS P6BAP", "p6bap", MACHINE_TYPE_SOCKET370, CPU_PKG_SOCKET370, 0, 66666667, 150000000, 1300, 3500, 2.0, 8.0, MACHINE_AGP | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL, 8192,1572864, 8192, 255, machine_at_p6bap_init, NULL }, { "[VIA Apollo Pro133A] AEWIN WCF-681", "wcf681", MACHINE_TYPE_SOCKET370, CPU_PKG_SOCKET370, 0, 66666667, 133333333, 1300, 3500, 0, 0, MACHINE_AGP | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL, 8192,1048576, 8192, 255, machine_at_wcf681_init, NULL }, { "[VIA Apollo Pro133A] ASUS CUV4X-LS", "cuv4xls", MACHINE_TYPE_SOCKET370, CPU_PKG_SOCKET370, 0, 66666667, 150000000, 1300, 3500, 2.0, 8.0, (MACHINE_AGP & ~MACHINE_AT) | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL, 16384,1572864, 8192, 255, machine_at_cuv4xls_init, NULL }, { "[VIA Apollo Pro133A] Acorp 6VIA90AP", "6via90ap", MACHINE_TYPE_SOCKET370, CPU_PKG_SOCKET370, 0, 66666667, 150000000, 1300, 3500, MACHINE_MULTIPLIER_FIXED, MACHINE_AGP | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL, 8192,1572864, 8192, 255, machine_at_6via90ap_init, NULL }, - { "[VIA Apollo Pro133A] ECS P6BAP", "p6bap", MACHINE_TYPE_SOCKET370, CPU_PKG_SOCKET370, 0, 66666667, 150000000, 1300, 3500, 2.0, 8.0, MACHINE_AGP | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL, 8192,1572864, 8192, 255, machine_at_p6bap_init, NULL }, { "[VIA Apollo ProMedia] Jetway 603TCF", "603tcf", MACHINE_TYPE_SOCKET370, CPU_PKG_SOCKET370, 0, 66666667, 150000000, 1300, 3500, 2.0, 8.0, MACHINE_AGP | MACHINE_BUS_PS2 | MACHINE_IDE_DUAL, 8192,1048576, 8192, 255, machine_at_603tcf_init, NULL }, /* Miscellaneous/Fake/Hypervisor machines */ diff --git a/src/network/network.c b/src/network/network.c index cc73b5ac7..be7006b43 100644 --- a/src/network/network.c +++ b/src/network/network.c @@ -54,7 +54,7 @@ #include #include #include -#include +#include #define HAVE_STDARG_H #include <86box/86box.h> #include <86box/device.h> diff --git a/src/network/slirp/ip.h b/src/network/slirp/ip.h index 39e3a40da..fba3defa1 100644 --- a/src/network/slirp/ip.h +++ b/src/network/slirp/ip.h @@ -71,6 +71,9 @@ typedef uint32_t n_long; /* long as received from the net */ /* * Structure of an internet header, naked of options. */ +#if defined(_MSC_VER) && !defined (__clang__) +#pragma pack(push, 1) +#endif struct ip { #if G_BYTE_ORDER == G_BIG_ENDIAN uint8_t ip_v : 4, /* version */ @@ -91,6 +94,9 @@ struct ip { uint16_t ip_sum; /* checksum */ struct in_addr ip_src, ip_dst; /* source and dest address */ } SLIRP_PACKED; +#if defined(_MSC_VER) && !defined (__clang__) +#pragma pack(pop) +#endif #define IP_MAXPACKET 65535 /* maximum packet size */ @@ -134,6 +140,9 @@ struct ip { /* * Time stamp option structure. */ +#if defined(_MSC_VER) && !defined (__clang__) +#pragma pack(push, 1) +#endif struct ip_timestamp { uint8_t ipt_code; /* IPOPT_TS */ uint8_t ipt_len; /* size of structure (variable) */ @@ -153,6 +162,9 @@ struct ip_timestamp { } ipt_ta[1]; } ipt_timestamp; } SLIRP_PACKED; +#if defined(_MSC_VER) && !defined (__clang__) +#pragma pack(pop) +#endif /* flag bits for ipt_flg */ #define IPOPT_TS_TSONLY 0 /* timestamps only */ @@ -178,6 +190,9 @@ struct ip_timestamp { #define IP_MSS 576 /* default maximum segment size */ +#if defined(_MSC_VER) && !defined (__clang__) +#pragma pack(push, 1) +#endif #if GLIB_SIZEOF_VOID_P == 4 struct mbuf_ptr { struct mbuf *mptr; @@ -188,6 +203,9 @@ struct mbuf_ptr { struct mbuf *mptr; } SLIRP_PACKED; #endif +#if defined(_MSC_VER) && !defined (__clang__) +#pragma pack(pop) +#endif struct qlink { void *next, *prev; }; @@ -195,6 +213,9 @@ struct qlink { /* * Overlay for ip header used by other protocols (tcp, udp). */ +#if defined(_MSC_VER) && !defined (__clang__) +#pragma pack(push, 1) +#endif struct ipovly { struct mbuf_ptr ih_mbuf; /* backpointer to mbuf */ uint8_t ih_x1; /* (unused) */ @@ -203,6 +224,9 @@ struct ipovly { struct in_addr ih_src; /* source internet address */ struct in_addr ih_dst; /* destination internet address */ } SLIRP_PACKED; +#if defined(_MSC_VER) && !defined (__clang__) +#pragma pack(pop) +#endif /* * Ip reassembly queue structure. Each fragment diff --git a/src/network/slirp/ip6_icmp.h b/src/network/slirp/ip6_icmp.h index c37e60f28..77772a76b 100644 --- a/src/network/slirp/ip6_icmp.h +++ b/src/network/slirp/ip6_icmp.h @@ -115,6 +115,9 @@ G_STATIC_ASSERT(sizeof(struct icmp6) == 40); /* * NDP Options */ +#if defined(_MSC_VER) && !defined (__clang__) +#pragma pack(push, 1) +#endif struct ndpopt { uint8_t ndpopt_type; /* Option type */ uint8_t ndpopt_len; /* /!\ In units of 8 octets */ @@ -142,6 +145,9 @@ struct ndpopt { #define ndpopt_rdnss ndpopt_body.rdnss } ndpopt_body; } SLIRP_PACKED; +#if defined(_MSC_VER) && !defined (__clang__) +#pragma pack(pop) +#endif /* NDP options type */ #define NDPOPT_LINKLAYER_SOURCE 1 /* Source Link-Layer Address */ diff --git a/src/network/slirp/libslirp.h b/src/network/slirp/libslirp.h index 27e1f61bb..7c4340390 100644 --- a/src/network/slirp/libslirp.h +++ b/src/network/slirp/libslirp.h @@ -16,6 +16,17 @@ #include "libslirp-version.h" +/* Windows does not define ssize_t, so we need to define it here. */ +#ifndef _SSIZE_T_DEFINED +# define _SSIZE_T_DEFINED +# undef ssize_t +# ifdef _WIN64 +# define ssize_t int64_t +# else +# define ssize_t int32_t +# endif +#endif + #ifdef __cplusplus extern "C" { #endif diff --git a/src/network/slirp/misc.c b/src/network/slirp/misc.c index e6bc0a207..78515cbda 100644 --- a/src/network/slirp/misc.c +++ b/src/network/slirp/misc.c @@ -8,7 +8,7 @@ #include #endif -inline void insque(void *a, void *b) +extern inline void insque(void *a, void *b) { register struct quehead *element = (struct quehead *)a; register struct quehead *head = (struct quehead *)b; @@ -19,7 +19,7 @@ inline void insque(void *a, void *b) (struct quehead *)element; } -inline void remque(void *a) +extern inline void remque(void *a) { register struct quehead *element = (struct quehead *)a; ((struct quehead *)(element->qh_link))->qh_rlink = element->qh_rlink; diff --git a/src/network/slirp/slirp.h b/src/network/slirp/slirp.h index 4f8b13338..d996b53ed 100644 --- a/src/network/slirp/slirp.h +++ b/src/network/slirp/slirp.h @@ -75,6 +75,9 @@ struct ethhdr { unsigned short h_proto; /* packet type ID field */ }; +#if defined(_MSC_VER) && !defined (__clang__) +#pragma pack(push, 1) +#endif struct slirp_arphdr { unsigned short ar_hrd; /* format of hardware address */ unsigned short ar_pro; /* format of protocol address */ @@ -90,6 +93,9 @@ struct slirp_arphdr { unsigned char ar_tha[ETH_ALEN]; /* target hardware address */ uint32_t ar_tip; /* target IP address */ } SLIRP_PACKED; +#if defined(_MSC_VER) && !defined (__clang__) +#pragma pack(pop) +#endif #define ARP_TABLE_SIZE 16 diff --git a/src/network/slirp/tftp.h b/src/network/slirp/tftp.h index 6d75478e8..663485328 100644 --- a/src/network/slirp/tftp.h +++ b/src/network/slirp/tftp.h @@ -20,6 +20,9 @@ #define TFTP_FILENAME_MAX 512 #define TFTP_BLOCKSIZE_MAX 1428 +#if defined(_MSC_VER) && !defined (__clang__) +#pragma pack(push, 1) +#endif struct tftp_t { struct udphdr udp; uint16_t tp_op; @@ -35,6 +38,9 @@ struct tftp_t { char tp_buf[TFTP_BLOCKSIZE_MAX + 2]; } x; } SLIRP_PACKED; +#if defined(_MSC_VER) && !defined (__clang__) +#pragma pack(pop) +#endif struct tftp_session { Slirp *slirp; diff --git a/src/network/slirp/util.h b/src/network/slirp/util.h index 7ea7a09d0..4a5c5d88a 100644 --- a/src/network/slirp/util.h +++ b/src/network/slirp/util.h @@ -30,10 +30,11 @@ #include #include #include +#ifndef _WIN32 #include +#endif #include #include -#include #include #ifdef _WIN32 @@ -45,8 +46,10 @@ #include #endif -#if defined(_WIN32) && (defined(__x86_64__) || defined(__i386__)) -#define SLIRP_PACKED __attribute__((gcc_struct, packed)) +#if defined(_MSC_VER) && !defined(__clang__) +#define SLIRP_PACKED +#elif defined(_WIN32) && (defined(__x86_64__) || defined(__i386__)) +#define SLIRP_PACKED __attribute__((gcc_struct, packed)) #else #define SLIRP_PACKED __attribute__((packed)) #endif @@ -56,11 +59,7 @@ #endif #ifndef container_of -#define container_of(ptr, type, member) \ - __extension__({ \ - void *__mptr = (void *)(ptr); \ - ((type *)(__mptr - offsetof(type, member))); \ - }) +#define container_of(ptr, type, member) ((type *)((char *)(ptr) - offsetof(type, member))); #endif #ifndef G_SIZEOF_MEMBER diff --git a/src/network/slirp/vmstate.h b/src/network/slirp/vmstate.h index 94c6a4bc7..e6bed53a6 100644 --- a/src/network/slirp/vmstate.h +++ b/src/network/slirp/vmstate.h @@ -39,7 +39,9 @@ #ifndef VMSTATE_H_ #define VMSTATE_H_ +#ifndef _WIN32 #include +#endif #include #include #include "slirp.h" diff --git a/src/sio/sio_fdc37c66x.c b/src/sio/sio_fdc37c66x.c index 13351bdbd..970925e14 100644 --- a/src/sio/sio_fdc37c66x.c +++ b/src/sio/sio_fdc37c66x.c @@ -38,7 +38,7 @@ typedef struct { uint8_t chip_id, tries, - regs[16]; + has_ide, regs[16]; int cur_reg, com3_addr, com4_addr; fdc_t *fdc; @@ -131,6 +131,18 @@ fdc_handler(fdc37c66x_t *dev) } + +static void +ide_handler(fdc37c66x_t *dev) +{ + ide_sec_disable(); + ide_set_base(1, (dev->regs[0x05] & 0x02) ? 0x170 : 0x1f0); + ide_set_side(1, (dev->regs[0x05] & 0x02) ? 0x376 : 0x3f6); + if (dev->regs[0x00] & 0x01) + ide_sec_enable(); +} + + static void fdc37c66x_write(uint16_t port, uint8_t val, void *priv) { @@ -152,6 +164,8 @@ fdc37c66x_write(uint16_t port, uint8_t val, void *priv) switch(dev->cur_reg) { case 0: + if (dev->has_ide && (valxor & 0x01)) + ide_handler(dev); if (valxor & 0x10) fdc_handler(dev); break; @@ -183,6 +197,8 @@ fdc37c66x_write(uint16_t port, uint8_t val, void *priv) case 5: if (valxor & 0x01) fdc_handler(dev); + if (dev->has_ide && (valxor & 0x02)) + ide_handler(dev); if (valxor & 0x18) fdc_update_densel_force(dev->fdc, (dev->regs[5] & 0x18) >> 3); if (valxor & 0x20) @@ -237,6 +253,9 @@ fdc37c66x_reset(fdc37c66x_t *dev) dev->regs[0x6] = 0xff; dev->regs[0xd] = dev->chip_id; dev->regs[0xe] = 0x01; + + if (dev->has_ide) + ide_handler(dev); } @@ -260,7 +279,10 @@ fdc37c66x_init(const device_t *info) dev->uart[0] = device_add_inst(&ns16550_device, 1); dev->uart[1] = device_add_inst(&ns16550_device, 2); - dev->chip_id = info->local; + dev->chip_id = info->local & 0xff; + dev->has_ide = !!(info->local & 0x100); + + if (dev->has_ide) io_sethandler(0x03f0, 0x0002, fdc37c66x_read, NULL, NULL, fdc37c66x_write, NULL, NULL, dev); @@ -291,6 +313,15 @@ const device_t fdc37c665_device = { NULL }; +const device_t fdc37c665_ide_device = { + "SMC FDC37C665 Super I/O", + 0, + 0x165, + fdc37c66x_init, fdc37c66x_close, NULL, + { NULL }, NULL, NULL, + NULL +}; + const device_t fdc37c666_device = { "SMC FDC37C666 Super I/O", 0, diff --git a/src/sio/sio_vt82c686.c b/src/sio/sio_vt82c686.c index 703289f5f..3963eed77 100644 --- a/src/sio/sio_vt82c686.c +++ b/src/sio/sio_vt82c686.c @@ -33,10 +33,9 @@ typedef struct { - uint8_t config_enable, cur_reg, regs[32], - fdc_dma, fdc_irq, uart_irq[2], lpt_dma, lpt_irq; - fdc_t *fdc; - serial_t *uart[2]; + uint8_t cur_reg, regs[32], fdc_dma, fdc_irq, uart_irq[2], lpt_dma, lpt_irq; + fdc_t *fdc; + serial_t *uart[2]; } vt82c686_t; @@ -100,9 +99,6 @@ static void vt82c686_write(uint16_t port, uint8_t val, void *priv) { vt82c686_t *dev = (vt82c686_t *) priv; - - if (!dev->config_enable) - return; if (!(port & 1)) { dev->cur_reg = val; @@ -196,13 +192,9 @@ vt82c686_sio_write(uint8_t addr, uint8_t val, void *priv) break; case 0x85: - io_removehandler(0x3f0, 0x0002, - vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev); - if (val & 0x01) - io_sethandler(0x3f0, 0x0002, - vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev); - - dev->config_enable = val & 0x02; + io_removehandler(0x3f0, 2, vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev); + if (val & 0x02) + io_sethandler(0x3f0, 2, vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev); break; } } diff --git a/src/sound/resid-fp/sid.cc b/src/sound/resid-fp/sid.cc index 431d5712d..6f7544423 100644 --- a/src/sound/resid-fp/sid.cc +++ b/src/sound/resid-fp/sid.cc @@ -29,7 +29,7 @@ enum host_cpu_feature { }; /* This code is appropriate for 32-bit and 64-bit x86 CPUs. */ -#if defined(__x86_64__) || defined(__i386__) || defined(_MSC_VER) +#if defined(__x86_64__) || defined(__i386__) || defined(_M_IX86) || (defined(_M_X64) && !(defined(_MSC_VER) && !defined(__clang__))) struct cpu_x86_regs_s { unsigned int eax; @@ -43,7 +43,7 @@ static cpu_x86_regs_t get_cpuid_regs(unsigned int index) { cpu_x86_regs_t retval; -#if defined(_MSC_VER) /* MSVC assembly */ +#if defined(_MSC_VER) && !defined(__clang__) /* MSVC assembly */ __asm { mov eax, [index] cpuid diff --git a/src/sound/resid-fp/siddefs-fp.h b/src/sound/resid-fp/siddefs-fp.h index 1f3f72715..fb10d5dff 100644 --- a/src/sound/resid-fp/siddefs-fp.h +++ b/src/sound/resid-fp/siddefs-fp.h @@ -74,7 +74,7 @@ const char* resid_version_string = VERSION; // Inlining on/off. #define RESID_INLINE inline -#if defined(__SSE__) || (defined(_MSC_VER) && (_MSC_VER >= 1300)) +#if defined(__SSE__) || (defined(_M_IX86_FP ) && _M_IX86_FP >= 1) || defined(_M_X64) #define RESID_USE_SSE 1 #else #define RESID_USE_SSE 0 diff --git a/src/video/vid_nga.c b/src/video/vid_nga.c new file mode 100644 index 000000000..6b1b60dcb --- /dev/null +++ b/src/video/vid_nga.c @@ -0,0 +1,683 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Emulation of the NCR NGA (K511, K201) video cards. + * + * + * + * Authors: Sarah Walker, + * Miran Grca, + * Fred N. van Kempen, + * EngiNerd, + * + * Copyright 2008-2019 Sarah Walker. + * Copyright 2016-2019 Miran Grca. + * Copyright 2017-2019 Fred N. van Kempen. + * Copyright 2020 EngiNerd. + */ + +#include +#include +#include +#include +#include +#include +#include <86box/io.h> +#include <86box/video.h> +#include <86box/86box.h> +#include <86box/timer.h> +#include <86box/mem.h> +#include <86box/pit.h> +#include <86box/rom.h> +#include <86box/device.h> +#include <86box/vid_cga.h> +#include <86box/vid_nga.h> +#include <86box/vid_cga_comp.h> + + + +#define CGA_RGB 0 +#define CGA_COMPOSITE 1 + +#define COMPOSITE_OLD 0 +#define COMPOSITE_NEW 1 + + + +static video_timings_t timing_nga = {VIDEO_ISA, 8,16,32, 8,16,32}; + +void +nga_recalctimings(nga_t *nga) +{ + double _dispontime, _dispofftime, disptime; + + if ((nga->cga.cgamode & 1) ) { + disptime = nga->cga.crtc[0] + 1; + _dispontime = nga->cga.crtc[1]; + } else { + disptime = (nga->cga.crtc[0] + 1) << 1; + _dispontime = nga->cga.crtc[1] << 1; + } + + _dispofftime = disptime - _dispontime; + _dispontime *= CGACONST / 2; + _dispofftime *= CGACONST / 2; + nga->cga.dispontime = (uint64_t)(_dispontime); + nga->cga.dispofftime = (uint64_t)(_dispofftime); +} + +void +nga_out(uint16_t addr, uint8_t val, void *priv) +{ + nga_t *nga = (nga_t *)priv; + + cga_out(addr, val, &nga->cga); + +} + +uint8_t +nga_in(uint16_t addr, void *priv) +{ + nga_t *nga = (nga_t *)priv; + + return cga_in(addr, &nga->cga); +} + + +void +nga_waitstates(void *p) +{ + int ws_array[16] = {3, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8, 4, 5, 6, 7, 8}; + int ws; + + ws = ws_array[cycles & 0xf]; + sub_cycles(ws); +} + + +void +nga_write(uint32_t addr, uint8_t val, void *priv) +{ + nga_t *nga = (nga_t *)priv; + int offset; + /* a8000-affff */ + if(!(addr & 0x10000)) + nga->vram_64k[addr & 0x7FFF]=val; + /* b8000-bffff */ + else + nga->cga.vram[addr & 0x7FFF]=val; + + if (nga->cga.snow_enabled) { + /* recreate snow effect */ + offset = ((timer_get_remaining_u64(&nga->cga.timer) / CGACONST) * 4) & 0xfc; + nga->cga.charbuffer[offset] = nga->cga.vram[addr & 0x7fff]; + nga->cga.charbuffer[offset | 1] = nga->cga.vram[addr & 0x7fff]; + } + egawrites++; + nga_waitstates(&nga->cga); +} + +uint8_t +nga_read(uint32_t addr, void *priv) +{ + + nga_t *nga = (nga_t *)priv; + int offset; + uint8_t ret; + /* a8000-affff */ + if(!(addr & 0x10000)) + ret = nga->vram_64k[addr & 0x7FFF]; + else + ret = nga->cga.vram[addr & 0x7FFF]; + + nga_waitstates(&nga->cga); + + if (nga->cga.snow_enabled) { + /* recreate snow effect */ + offset = ((timer_get_remaining_u64(&nga->cga.timer) / CGACONST) * 4) & 0xfc; + nga->cga.charbuffer[offset] = nga->cga.vram[addr & 0x7fff]; + nga->cga.charbuffer[offset | 1] = nga->cga.vram[addr & 0x7fff]; + } + + egareads++; + return(ret); +} + +void +nga_poll(void *priv) +{ + nga_t *nga = (nga_t *)priv; + /* set cursor position in memory */ + uint16_t ca = (nga->cga.crtc[15] | (nga->cga.crtc[14] << 8)) & 0x3fff; + int drawcursor; + int x, c, xs_temp, ys_temp; + int oldvc; + uint8_t chr, attr; + uint16_t dat, dat2; + int cols[4]; + int col; + int oldsc; + + /* graphic mode and not high-res modes */ + if ((nga->cga.cgamode & 2) && !(nga->cga.cgamode & 0x40)) { + /* standard cga mode */ + cga_poll(&nga->cga); + return; + } else { + /* high-res or text mode */ + if (!nga->cga.linepos) { + timer_advance_u64(&nga->cga.timer, nga->cga.dispofftime); + nga->cga.cgastat |= 1; + nga->cga.linepos = 1; + oldsc = nga->cga.sc; + /* if interlaced */ + if ((nga->cga.crtc[8] & 3) == 3) + nga->cga.sc = ((nga->cga.sc << 1) + nga->cga.oddeven) & 7; + if (nga->cga.cgadispon) { + if (nga->cga.displine < nga->cga.firstline) { + nga->cga.firstline = nga->cga.displine; + video_wait_for_buffer(); + } + nga->cga.lastline = nga->cga.displine; + /* 80-col */ + if ((nga->cga.cgamode & 1) && !(nga->cga.cgamode & 2)) { + /* for each text column */ + for (x = 0; x < nga->cga.crtc[1]; x++) { + /* video output enabled */ + if (nga->cga.cgamode & 8) { + /* character */ + chr = nga->cga.charbuffer[x << 1]; + /* text attributes */ + attr = nga->cga.charbuffer[(x << 1) + 1]; + } else + chr = attr = 0; + /* check if cursor has to be drawn */ + drawcursor = ((nga->cga.ma == ca) && nga->cga.con && nga->cga.cursoron); + /* set foreground */ + cols[1] = (attr & 15) + 16; + /* blink active */ + if (nga->cga.cgamode & 0x20) { + cols[0] = ((attr >> 4) & 7) + 16; + /* attribute 7 active and not cursor */ + if ((nga->cga.cgablink & 8) && (attr & 0x80) && !nga->cga.drawcursor) { + /* set blinking */ + cols[1] = cols[0]; + } + } else { + /* Set intensity bit */ + cols[0] = (attr >> 4) + 16; + } + if (drawcursor) { + for (c = 0; c < 8; c++) + buffer32->line[nga->cga.displine][(x << 3) + c + 8] = cols[(fontdatm[chr][((nga->cga.sc & 7) << 1) | nga->lineff] & (1 << (c ^ 7))) ? 1 : 0] ^ 15; + } else { + for (c = 0; c < 8; c++) + buffer32->line[nga->cga.displine][(x << 3) + c + 8] = cols[(fontdatm[chr][((nga->cga.sc & 7) << 1) | nga->lineff] & (1 << (c ^ 7))) ? 1 : 0]; + } + + nga->cga.ma++; + } + } + /* 40-col */ + else if (!(nga->cga.cgamode & 2)) { + /* for each text column */ + for (x = 0; x < nga->cga.crtc[1]; x++) { + if (nga->cga.cgamode & 8) { + chr = nga->cga.vram[((nga->cga.ma << 1) & 0x3fff) + nga->base]; + attr = nga->cga.vram[(((nga->cga.ma << 1) + 1) & 0x3fff) + nga->base]; + } else { + chr = attr = 0; + } + drawcursor = ((nga->cga.ma == ca) && nga->cga.con && nga->cga.cursoron); + /* set foreground */ + cols[1] = (attr & 15) + 16; + /* blink active */ + if (nga->cga.cgamode & 0x20) { + cols[0] = ((attr >> 4) & 7) + 16; + if ((nga->cga.cgablink & 8) && (attr & 0x80) && !nga->cga.drawcursor) { + /* set blinking */ + cols[1] = cols[0]; + } + } else { + /* Set intensity bit */ + cols[0] = (attr >> 4) + 16; + } + + if (drawcursor) { + for (c = 0; c < 8; c++) + buffer32->line[nga->cga.displine][(x << 4) + (c << 1) + 8] = + buffer32->line[nga->cga.displine][(x << 4) + (c << 1) + 1 + 8] = cols[(fontdatm[chr][((nga->cga.sc & 7) << 1) | nga->lineff] & (1 << (c ^ 7))) ? 1 : 0] ^ 15; + } else { + for (c = 0; c < 8; c++) + buffer32->line[nga->cga.displine][(x << 4) + (c << 1) + 8] = + buffer32->line[nga->cga.displine][(x << 4) + (c << 1) + 1 + 8] = cols[(fontdatm[chr][((nga->cga.sc & 7) << 1) | nga->lineff] & (1 << (c ^ 7))) ? 1 : 0]; + } + + nga->cga.ma++; + + } + } else { + /* high res modes */ + if (nga->cga.cgamode & 0x40) { + /* 640x400x2 mode */ + if (nga->cga.cgamode & 0x4 || nga->cga.cgamode & 0x10) { + /* + * Scanlines are read in the following order: + * 0b8000-0b9f3f even scans (0,4,...) + * 0ba000-0bbf3f odd scans (2,6,...) + * 0bc000-0bdf3f even scans (1,5,...) + * 0be000-0bff3f odd scans (3,7,...) + */ + dat2 = ((nga->cga.sc & 1) * 0x2000) | (nga->lineff * 0x4000); + cols[0] = 0; cols[1] = 15 + 16; + /* 640x400x4 mode */ + } else { + cols[0] = (nga->cga.cgacol & 15) | 16; + col = (nga->cga.cgacol & 16) ? 24 : 16; + if (nga->cga.cgamode & 4) { + cols[1] = col | 3; /* Cyan */ + cols[2] = col | 4; /* Red */ + cols[3] = col | 7; /* White */ + } else if (nga->cga.cgacol & 32) { + cols[1] = col | 3; /* Cyan */ + cols[2] = col | 5; /* Magenta */ + cols[3] = col | 7; /* White */ + } else { + cols[1] = col | 2; /* Green */ + cols[2] = col | 4; /* Red */ + cols[3] = col | 6; /* Yellow */ + } + /* + * Scanlines are read in the following order: + * 0b8000-0bbf3f even scans (0,4,...) + * 0bc000-0bff3f odd scans (1,5,...) + * 0a8000-0abf3f even scans (2,6,...) + * 0ac000-0aff3f odd scans (3,7,...) + */ + dat2 = (nga->cga.sc & 1) * 0x4000; + } + } + else { + dat2 = (nga->cga.sc & 1) * 0x2000; + cols[0] = 0; cols[1] = (nga->cga.cgacol & 15) + 16; + } + + /* for each text column */ + for (x = 0; x < nga->cga.crtc[1]; x++) { + /* video out */ + if (nga->cga.cgamode & 8) { + /* 640x400x2 */ + if (nga->cga.cgamode & 0x4 || nga->cga.cgamode & 0x10) { + /* read two bytes at a time */ + dat = (nga->cga.vram[((nga->cga.ma << 1) & 0x1fff) + dat2] << 8) | nga->cga.vram[((nga->cga.ma << 1) & 0x1fff) + dat2 + 1]; + /* each pixel is represented by one bit, so draw 16 pixels at a time */ + /* crtc[1] is 40 column, so 40x16=640 pixels */ + for (c = 0; c < 16; c++) { + buffer32->line[nga->cga.displine][(x << 4) + c + 8] = cols[dat >> 15]; + dat <<= 1; + } + /* 640x400x4 */ + } else { + /* lines 2,3,6,7,etc. */ + if (nga->cga.sc & 2) + /* read two bytes at a time */ + dat = (nga->vram_64k[((nga->cga.ma << 1) & 0x7fff) + dat2] << 8) | nga->vram_64k[((nga->cga.ma << 1) & 0x7fff) + dat2 + 1]; + /* lines 0,1,4,5,etc. */ + else + /* read two bytes at a time */ + dat = (nga->cga.vram[((nga->cga.ma << 1) & 0x7fff) + dat2] << 8) | nga->cga.vram[((nga->cga.ma << 1) & 0x7fff) + dat2 + 1]; + /* each pixel is represented by two bits, so draw 8 pixels at a time */ + /* crtc[1] is 80 column, so 80x8=640 pixels */ + for (c = 0; c < 8; c++) { + buffer32->line[nga->cga.displine][(x << 3) + c + 8] = cols[dat >> 14]; + dat <<= 2; + } + } + } else { + dat = 0; + } + nga->cga.ma++; + } + } + } else { + + /* nga specific */ + cols[0] = ((nga->cga.cgamode & 0x12) == 0x12) ? 0 : (nga->cga.cgacol & 15) + 16; + /* 80-col */ + if ((nga->cga.cgamode & 1) ) { + hline(buffer32, 0, (nga->cga.displine << 1), ((nga->cga.crtc[1] << 3) + 16) << 2, cols[0]); + hline(buffer32, 0, (nga->cga.displine << 1) + 1, ((nga->cga.crtc[1] << 3) + 16) << 2, cols[0]); + } else { + hline(buffer32, 0, (nga->cga.displine << 1), ((nga->cga.crtc[1] << 4) + 16) << 2, cols[0]); + hline(buffer32, 0, (nga->cga.displine << 1) + 1, ((nga->cga.crtc[1] << 4) + 16) << 2, cols[0]); + } + + } + + nga->cga.sc = oldsc; + /* vertical sync */ + if (nga->cga.vc == nga->cga.crtc[7] && !nga->cga.sc) + nga->cga.cgastat |= 8; + nga->cga.displine++; + if (nga->cga.displine >= 720) + nga->cga.displine = 0; + } else { + timer_advance_u64(&nga->cga.timer, nga->cga.dispontime); + if (nga->cga.cgadispon) nga->cga.cgastat &= ~1; + nga->cga.linepos = 0; + /* nga specific */ + nga->lineff ^= 1; + + /* text mode or 640x400x2 */ + if (nga->lineff && !((nga->cga.cgamode & 1) && (nga->cga.cgamode & 0x40))) { + nga->cga.ma = nga->cga.maback; + /* 640x400x4 */ + } else { + if (nga->cga.vsynctime) { + nga->cga.vsynctime--; + if (!nga->cga.vsynctime) + nga->cga.cgastat &= ~8; + } + /* cursor stop scanline */ + if (nga->cga.sc == (nga->cga.crtc[11] & 31) || ((nga->cga.crtc[8] & 3) == 3 && nga->cga.sc == ((nga->cga.crtc[11] & 31) >> 1))) { + nga->cga.con = 0; + nga->cga.coff = 1; + } + /* interlaced and max scanline per char reached */ + if ((nga->cga.crtc[8] & 3) == 3 && nga->cga.sc == (nga->cga.crtc[9] >> 1)) + nga->cga.maback = nga->cga.ma; + + if (nga->cga.vadj) { + nga->cga.sc++; + nga->cga.sc &= 31; + nga->cga.ma = nga->cga.maback; + nga->cga.vadj--; + if (!nga->cga.vadj) { + nga->cga.cgadispon = 1; + /* change start of displayed page (crtc 12-13) */ + nga->cga.ma = nga->cga.maback = (nga->cga.crtc[13] | (nga->cga.crtc[12] << 8)) & 0x7fff; + nga->cga.sc = 0; + } + /* nga specific */ + /* end of character line reached */ + } else if (nga->cga.sc == nga->cga.crtc[9] || ((nga->cga.crtc[8] & 3) == 3 && nga->cga.sc == (nga->cga.crtc[9] >> 1))) { + nga->cga.maback = nga->cga.ma; + nga->cga.sc = 0; + oldvc = nga->cga.vc; + nga->cga.vc++; + nga->cga.vc &= 127; + + /* lines of character displayed */ + if (nga->cga.vc == nga->cga.crtc[6]) + nga->cga.cgadispon=0; + + /* total vertical lines */ + if (oldvc == nga->cga.crtc[4]) { + nga->cga.vc = 0; + /* adjust vertical lines */ + nga->cga.vadj = nga->cga.crtc[5]; + if (!nga->cga.vadj) { + nga->cga.cgadispon = 1; + /* change start of displayed page (crtc 12-13) */ + nga->cga.ma = nga->cga.maback = (nga->cga.crtc[13] | (nga->cga.crtc[12] << 8)) & 0x7fff; + } + /* cursor start */ + switch (nga->cga.crtc[10] & 0x60) { + case 0x20: + nga->cga.cursoron = 0; + break; + case 0x60: + nga->cga.cursoron = nga->cga.cgablink & 0x10; + break; + default: + nga->cga.cursoron = nga->cga.cgablink & 0x08; + break; + } + } + /* vertical line position */ + if (nga->cga.vc == nga->cga.crtc[7]) { + nga->cga.cgadispon = 0; + nga->cga.displine = 0; + /* nga specific */ + nga->cga.vsynctime = 16; + /* vsync pos */ + if (nga->cga.crtc[7]) { + if ((nga->cga.cgamode & 1)) + /* set screen width */ + x = (nga->cga.crtc[1] << 3) + 16; + else + x = (nga->cga.crtc[1] << 4) + 16; + nga->cga.lastline++; + + xs_temp = x; + ys_temp = (nga->cga.lastline - nga->cga.firstline); + + if ((xs_temp > 0) && (ys_temp > 0)) { + if (xsize < 64) xs_temp = 656; + /* nga specific */ + if (ysize < 32) ys_temp = 400; + if (!enable_overscan) + xs_temp -= 16; + + + if ((nga->cga.cgamode & 8) && ((xs_temp != xsize) || (ys_temp != ysize) || video_force_resize_get())) { + xsize = xs_temp; + ysize = ys_temp; + set_screen_size(xsize, ysize + (enable_overscan ? 16 : 0)); + + if (video_force_resize_get()) + video_force_resize_set(0); + } + /* nga specific */ + if (enable_overscan) { + if (nga->cga.composite) + video_blit_memtoscreen(0, (nga->cga.firstline - 8), 0, (nga->cga.lastline - nga->cga.firstline) + 16, + xsize, (nga->cga.lastline - nga->cga.firstline) + 16); + else + video_blit_memtoscreen_8(0, (nga->cga.firstline - 8), 0, (nga->cga.lastline - nga->cga.firstline) + 16, + xsize, (nga->cga.lastline - nga->cga.firstline) + 16); + } else { + if (nga->cga.composite) + video_blit_memtoscreen(8, nga->cga.firstline, 0, (nga->cga.lastline - nga->cga.firstline), + xsize, (nga->cga.lastline - nga->cga.firstline)); + else + video_blit_memtoscreen_8(8, nga->cga.firstline, 0, (nga->cga.lastline - nga->cga.firstline), + xsize, (nga->cga.lastline - nga->cga.firstline)); + } + } + frames++; + + video_res_x = xsize; + video_res_y = ysize; + /* 80-col */ + if ((nga->cga.cgamode & 1) && !(nga->cga.cgamode & 0x40)) { + video_res_x /= 8; + video_res_y /= (nga->cga.crtc[9] + 1) * 2; + video_bpp = 0; + /* 40-col */ + } else if (!(nga->cga.cgamode & 2)) { + video_res_x /= 16; + video_res_y /= (nga->cga.crtc[9] + 1) * 2; + video_bpp = 0; + } + else if (nga->cga.cgamode & 0x40) { + video_res_x /= 8; + video_res_y /= 2; + video_bpp = 1; + } + } + nga->cga.firstline = 1000; + nga->cga.lastline = 0; + nga->cga.cgablink++; + nga->cga.oddeven ^= 1; + } + } else { + nga->cga.sc++; + nga->cga.sc &= 31; + nga->cga.ma = nga->cga.maback; + } + + if (nga->cga.cgadispon) + nga->cga.cgastat &= ~1; + + /* enable cursor if its scanline was reached */ + if ((nga->cga.sc == (nga->cga.crtc[10] & 31) || ((nga->cga.crtc[8] & 3) == 3 && nga->cga.sc == ((nga->cga.crtc[10] & 31) >> 1)))) + nga->cga.con = 1; + } + /* 80-columns */ + if (nga->cga.cgadispon && (nga->cga.cgamode & 1) ) { + /* for each character per line */ + for (x = 0; x < (nga->cga.crtc[1] << 1); x++) + nga->cga.charbuffer[x] = nga->cga.vram[(((nga->cga.ma << 1) + x) & 0x3fff) + nga->base]; + } + } + } +} + +void +nga_close(void *priv) +{ + nga_t *nga = (nga_t *)priv; + free(nga->vram_64k); + free(nga->cga.vram); + free(nga); +} + +void +nga_speed_changed(void *priv) +{ + nga_t *nga = (nga_t *)priv; + + nga_recalctimings(nga); +} + +void * +nga_init(const device_t *info) +{ + int mem; + uint8_t charset; + nga_t *nga = (nga_t *)malloc(sizeof(nga_t)); + + memset(nga, 0x00, sizeof(nga_t)); + video_inform(VIDEO_FLAG_TYPE_CGA, &timing_nga); + + charset = device_get_config_int("charset"); + + loadfont_ex(L"roms/video/nga/ncr_nga_35122.bin", 1, 4096 * charset); + + nga->cga.composite = 0; + nga->cga.snow_enabled = device_get_config_int("snow_enabled"); + + nga->cga.vram = malloc(0x8000); + nga->vram_64k = malloc(0x8000); + + timer_add(&nga->cga.timer, nga_poll, nga, 1); + mem_mapping_add(&nga->cga.mapping, 0xb8000, 0x8000, + nga_read, NULL, NULL, + nga_write, NULL, NULL, NULL, 0, nga); + + mem = device_get_config_int("memory"); + + if (mem > 32) { + /* make optional 32KB addessable */ + mem_mapping_add(&nga->mapping_64k, 0xa8000, 0x8000, + nga_read, NULL, NULL, + nga_write, NULL, NULL, NULL, 0, nga); + } + + io_sethandler(0x03d0, 16, nga_in, NULL, NULL, nga_out, NULL, NULL, nga); + + overscan_x = overscan_y = 16; + nga->cga.rgb_type = device_get_config_int("rgb_type"); + cga_palette = (nga->cga.rgb_type << 1); + cgapal_rebuild(); + + return nga; +} + + +const device_config_t nga_config[] = +{ + { + "rgb_type", "RGB type", CONFIG_SELECTION, "", 0, "", { 0 }, + { + { + "Color", 0 + }, + { + "Green Monochrome", 1 + }, + { + "Amber Monochrome", 2 + }, + { + "Gray Monochrome", 3 + }, + { + "Color (no brown)", 4 + }, + { + "" + } + } + }, + { + "snow_enabled", "Snow emulation", CONFIG_BINARY, "", 1 + }, + { + "memory", "Memory size", CONFIG_SELECTION, "", 64, "", { 0 }, + { + { + "32 KB", 32 + }, + { + "64 KB", 64 + }, + { + "" + } + } + }, + { + "charset", "Character set", CONFIG_SELECTION, "", 0, "", { 0 }, + { + { + "U.S. English", 0 + }, + { + "Scandinavian", 1 + }, + { + "Other languages", 2 + }, + { + "E.F. Hutton", 3 + }, + { + "" + } + } + }, + { + "", "", -1 + } +}; + + +const device_t nga_device = +{ + "NCR NGA", + DEVICE_ISA, 0, + nga_init, + nga_close, + NULL, + { NULL }, + nga_speed_changed, + NULL, + nga_config +}; \ No newline at end of file diff --git a/src/video/vid_ogc.c b/src/video/vid_ogc.c index 89c443ffe..b15565718 100644 --- a/src/video/vid_ogc.c +++ b/src/video/vid_ogc.c @@ -130,10 +130,12 @@ ogc_in(uint16_t addr, void *priv) * bit 0: high during retrace (CGA standard) */ ret = cga_in(addr, &ogc->cga); - ret = ret | 0xe0; - if (ogc->mono_display) - ret = ret | 0x10; - break; + if (addr == 0x3da){ + ret = ret | 0xe0; + if (ogc->mono_display) + ret = ret | 0x10; + break; + } } return(ret); @@ -425,6 +427,7 @@ ogc_poll(void *priv) ogc->cga.ma = ogc->cga.maback = (ogc->cga.crtc[13] | (ogc->cga.crtc[12] << 8)) & 0x3fff; ogc->cga.sc = 0; } + // potrebbe dare problemi con composito } else if (ogc->cga.sc == ogc->cga.crtc[9] || ((ogc->cga.crtc[8] & 3) == 3 && ogc->cga.sc == (ogc->cga.crtc[9] >> 1))) { ogc->cga.maback = ogc->cga.ma; ogc->cga.sc = 0; diff --git a/src/video/vid_table.c b/src/video/vid_table.c index 0a6c6c17c..88304b797 100644 --- a/src/video/vid_table.c +++ b/src/video/vid_table.c @@ -91,6 +91,7 @@ video_cards[] = { { "mda", &mda_device }, { "genius", &genius_device }, { "metheus928_isa", &s3_metheus_86c928_isa_device }, + { "nga", &nga_device }, { "ogc", &ogc_device }, { "oti037c", &oti037c_device }, { "oti067", &oti067_device }, diff --git a/src/video/vid_voodoo_banshee.c b/src/video/vid_voodoo_banshee.c index 2d3a378d5..7401df0d0 100644 --- a/src/video/vid_voodoo_banshee.c +++ b/src/video/vid_voodoo_banshee.c @@ -2083,8 +2083,8 @@ static void banshee_overlay_draw(svga_t *svga, int displine) case VIDPROCCFG_FILTER_MODE_DITHER_4X4: if (banshee->voodoo->scrfilter && banshee->voodoo->scrfilterEnabled) { - uint8_t fil[(svga->overlay_latch.xsize) * 3]; - uint8_t fil3[(svga->overlay_latch.xsize) * 3]; + uint8_t *fil = malloc((svga->overlay_latch.xsize) * 3); + uint8_t *fil3 = malloc((svga->overlay_latch.xsize) * 3); if (banshee->vidProcCfg & VIDPROCCFG_H_SCALE_ENABLE) /* leilei HACK - don't know of real 4x1 hscaled behavior yet, double for now */ { @@ -2146,6 +2146,9 @@ static void banshee_overlay_draw(svga_t *svga, int displine) fil[(x)*3+2] = vb_filter_v1_rb [fil[x*3+2]] [fil3[(x+1) *3+2]]; p[x] = (fil[x*3+2] << 16) | (fil[x*3+1] << 8) | fil[x*3]; } + + free(fil); + free(fil3); } else /* filter disabled by emulator option */ { @@ -2168,14 +2171,14 @@ static void banshee_overlay_draw(svga_t *svga, int displine) case VIDPROCCFG_FILTER_MODE_DITHER_2X2: if (banshee->voodoo->scrfilter && banshee->voodoo->scrfilterEnabled) { - uint8_t fil[(svga->overlay_latch.xsize) * 3]; - uint8_t soak[(svga->overlay_latch.xsize) * 3]; - uint8_t soak2[(svga->overlay_latch.xsize) * 3]; + uint8_t *fil = malloc((svga->overlay_latch.xsize) * 3); + uint8_t *soak = malloc((svga->overlay_latch.xsize) * 3); + uint8_t *soak2 = malloc((svga->overlay_latch.xsize) * 3); - uint8_t samp1[(svga->overlay_latch.xsize) * 3]; - uint8_t samp2[(svga->overlay_latch.xsize) * 3]; - uint8_t samp3[(svga->overlay_latch.xsize) * 3]; - uint8_t samp4[(svga->overlay_latch.xsize) * 3]; + uint8_t *samp1 = malloc((svga->overlay_latch.xsize) * 3); + uint8_t *samp2 = malloc((svga->overlay_latch.xsize) * 3); + uint8_t *samp3 = malloc((svga->overlay_latch.xsize) * 3); + uint8_t *samp4 = malloc((svga->overlay_latch.xsize) * 3); src = &svga->vram[src_addr2 & svga->vram_mask]; OVERLAY_SAMPLE(banshee->overlay_buffer[1]); @@ -2229,6 +2232,14 @@ static void banshee_overlay_draw(svga_t *svga, int displine) p[x] = (fil[x*3+2] << 16) | (fil[x*3+1] << 8) | fil[x*3]; } } + + free(fil); + free(soak); + free(soak2); + free(samp1); + free(samp2); + free(samp3); + free(samp4); } else /* filter disabled by emulator option */ { diff --git a/src/video/vid_voodoo_display.c b/src/video/vid_voodoo_display.c index 3a7df1ab3..5d3ad6e81 100644 --- a/src/video/vid_voodoo_display.c +++ b/src/video/vid_voodoo_display.c @@ -368,7 +368,7 @@ static void voodoo_filterline_v1(voodoo_t *voodoo, uint8_t *fil, int column, uin int x; // Scratchpad for avoiding feedback streaks - uint8_t fil3[(voodoo->h_disp) * 3]; + uint8_t *fil3 = malloc((voodoo->h_disp) * 3); /* 16 to 32-bit */ for (x=0; xthefilterg[fil3[x*3+1]][fil3[ (x+1) *3+1]]; fil[(x)*3+2] = voodoo->thefilter[fil3[x*3+2]][fil3[ (x+1) *3+2]]; } + + free(fil3); } @@ -434,7 +436,7 @@ static void voodoo_filterline_v2(voodoo_t *voodoo, uint8_t *fil, int column, uin int x; // Scratchpad for blending filter - uint8_t fil3[(voodoo->h_disp) * 3]; + uint8_t *fil3 = malloc((voodoo->h_disp) * 3); /* 16 to 32-bit */ for (x=0; xthefilterb [fil[(column-1)*3]][((src[column] & 31) << 3)]; fil3[(column-1)*3+1] = voodoo->thefilterg [fil[(column-1)*3+1]][(((src[column] >> 5) & 63) << 2)]; fil3[(column-1)*3+2] = voodoo->thefilter [fil[(column-1)*3+2]][(((src[column] >> 11) & 31) << 3)]; + + free(fil3); } void voodoo_callback(void *p) @@ -545,7 +549,7 @@ void voodoo_callback(void *p) if (voodoo->scrfilter && voodoo->scrfilterEnabled) { - uint8_t fil[(voodoo->h_disp) * 3]; /* interleaved 24-bit RGB */ + uint8_t *fil = malloc((voodoo->h_disp) * 3); /* interleaved 24-bit RGB */ if (voodoo->type == VOODOO_2) voodoo_filterline_v2(voodoo, fil, voodoo->h_disp, src, voodoo->line); @@ -556,6 +560,8 @@ void voodoo_callback(void *p) { p[x] = (voodoo->clutData256[fil[x*3]].b << 0 | voodoo->clutData256[fil[x*3+1]].g << 8 | voodoo->clutData256[fil[x*3+2]].r << 16); } + + free(fil); } else { diff --git a/src/video/vid_voodoo_render.c b/src/video/vid_voodoo_render.c index 2d7b260d6..0637881f9 100644 --- a/src/video/vid_voodoo_render.c +++ b/src/video/vid_voodoo_render.c @@ -684,9 +684,9 @@ static inline void voodoo_tmu_fetch_and_blend(voodoo_t *voodoo, voodoo_params_t state->tex_a[0] ^= 0xff; } -#if (defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined WIN32 || defined _WIN32 || defined _WIN32) && !(defined __amd64__) +#if (defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86) && !(defined __amd64__ || defined _M_X64) #include <86box/vid_voodoo_codegen_x86.h> -#elif (defined __amd64__) +#elif (defined __amd64__ || defined _M_X64) #include <86box/vid_voodoo_codegen_x86-64.h> #else int voodoo_recomp = 0; diff --git a/src/video/video.c b/src/video/video.c index f99040210..678e7771b 100644 --- a/src/video/video.c +++ b/src/video/video.c @@ -914,18 +914,12 @@ video_force_resize_set(uint8_t res) video_force_resize = res; } - void -loadfont(wchar_t *s, int format) +loadfont_common(FILE *f, int format) { - FILE *f; int c, d; - - f = rom_fopen(s, L"rb"); - if (f == NULL) - return; - - switch (format) { + + switch (format) { case 0: /* MDA */ for (c=0; c<256; c++) for (d=0; d<8; d++) @@ -1038,25 +1032,31 @@ loadfont(wchar_t *s, int format) for (c = 0; c < 256; c++) fread(&fontdat12x18[c][0], 1, 36, f); break; - - case 10: /* Olivetti M19 */ - fseek(f, 90, SEEK_SET); - for (d = 0; d < 4; d++) { - /* There are 4 fonts in the ROM */ - for (c = 0; c < 256; c++) /* 8x14 MDA in 8x16 cell */ - fread(&fontdatm[256*d + c][0], 1, 16, f); - for (c = 0; c < 256; c++) { /* 8x8 CGA in 8x16 cell */ - fread(&fontdat[256*d + c][0], 1, 8, f); - fseek(f, 8, SEEK_CUR); - } - } - break; - + } (void)fclose(f); } +void +loadfont_ex(wchar_t *s, int format, int offset) +{ + FILE *f; + + f = rom_fopen(s, L"rb"); + if (f == NULL) + return; + + fseek(f, offset, SEEK_SET); + loadfont_common(f, format); + +} + +void +loadfont(wchar_t *s, int format) +{ + loadfont_ex(s, format, 0); +} uint32_t video_color_transform(uint32_t color) diff --git a/src/win/86Box.rc b/src/win/86Box.rc index ef9555e58..a7891b81d 100644 --- a/src/win/86Box.rc +++ b/src/win/86Box.rc @@ -15,11 +15,9 @@ * Copyright 2016-2019 Miran Grca. * Copyright 2018,2019 David Hrdlička. */ -#include #define IN_RESOURCE_H #include <86box/resource.h> -#include <86box/86box.h> -#include <86box/plat.h> +#include <86box/language.h> #include <86box/version.h> #undef IN_RESOURCE_H @@ -395,11 +393,11 @@ DLG_CFG_INPUT DIALOG DISCARDABLE 107, 0, 267, 65 STYLE DS_CONTROL | WS_CHILD FONT 9, "Segoe UI" BEGIN - LTEXT "Mouse :",IDT_1709,7,9,57,10 + LTEXT "Mouse:",IDT_1709,7,9,57,10 COMBOBOX IDC_COMBO_MOUSE,71,7,140,120,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP PUSHBUTTON "Configure",IDC_CONFIGURE_MOUSE,214,7,46,12 - LTEXT "Joystick :",IDT_1710,7,27,58,10 + LTEXT "Joystick:",IDT_1710,7,27,58,10 COMBOBOX IDC_COMBO_JOYSTICK,71,25,189,120,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP PUSHBUTTON "Joystick 1...",IDC_JOY1,7,44,50,14 @@ -499,17 +497,17 @@ DLG_CFG_STORAGE DIALOG DISCARDABLE 107, 0, 267, 111 STYLE DS_CONTROL | WS_CHILD FONT 9, "Segoe UI" BEGIN - LTEXT "SCSI Controller:",IDT_1717,7,9,48,10 + LTEXT "SCSI Controller:",IDT_1717,7,9,64,10 COMBOBOX IDC_COMBO_SCSI,64,7,155,120,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP PUSHBUTTON "Configure",IDC_CONFIGURE_SCSI,222,7,38,12 - LTEXT "HD Controller:",IDT_1718,7,28,48,10 + LTEXT "HD Controller:",IDT_1718,7,28,64,10 COMBOBOX IDC_COMBO_HDC,64,26,155,120,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP PUSHBUTTON "Configure",IDC_CONFIGURE_HDC,222,26,38,12 - LTEXT "FD Controller:",IDT_1768,7,47,48,10 + LTEXT "FD Controller:",IDT_1768,7,47,64,10 COMBOBOX IDC_COMBO_FDC,64,45,155,120,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP PUSHBUTTON "Configure",IDC_CONFIGURE_FDC,222,45,38,12 @@ -530,7 +528,7 @@ BEGIN CONTROL "List1",IDC_LIST_HARD_DISKS,"SysListView32",LVS_REPORT | LVS_SHOWSELALWAYS | LVS_SINGLESEL | WS_BORDER | WS_TABSTOP,7,18,253,92 - LTEXT "Hard disks:",IDT_1720,7,7,34,8 + LTEXT "Hard disks:",IDT_1720,7,7,253,8 PUSHBUTTON "&New...",IDC_BUTTON_HDD_ADD_NEW,60,137,62,10 PUSHBUTTON "&Existing...",IDC_BUTTON_HDD_ADD,129,137,62,10 PUSHBUTTON "&Remove",IDC_BUTTON_HDD_REMOVE,198,137,62,10 @@ -597,7 +595,7 @@ BEGIN CONTROL "List1",IDC_LIST_FLOPPY_DRIVES,"SysListView32", LVS_REPORT | LVS_SHOWSELALWAYS | LVS_SINGLESEL | WS_BORDER | WS_TABSTOP,7,18,253,60 - LTEXT "Floppy drives:",IDT_1737,7,7,43,8 + LTEXT "Floppy drives:",IDT_1737,7,7,253,8 COMBOBOX IDC_COMBO_FD_TYPE,33,85,90,12,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP LTEXT "Type:",IDT_1738,7,87,24,8 @@ -609,7 +607,7 @@ BEGIN CONTROL "List1",IDC_LIST_CDROM_DRIVES,"SysListView32",LVS_REPORT | LVS_SHOWSELALWAYS | LVS_SINGLESEL | WS_BORDER | WS_TABSTOP,7,117,253,60 - LTEXT "CD-ROM drives:",IDT_1739,7,107,50,8 + LTEXT "CD-ROM drives:",IDT_1739,7,107,253,8 COMBOBOX IDC_COMBO_CD_BUS,33,185,90,12,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP LTEXT "Bus:",IDT_1740,7,187,24,8 @@ -632,7 +630,7 @@ BEGIN CONTROL "List1",IDC_LIST_MO_DRIVES,"SysListView32",LVS_REPORT | LVS_SHOWSELALWAYS | LVS_SINGLESEL | WS_BORDER | WS_TABSTOP,7,17,253,60 - LTEXT "MO drives:",IDT_1769,7,7,50,8 + LTEXT "MO drives:",IDT_1769,7,7,253,8 COMBOBOX IDC_COMBO_MO_BUS,33,85,90,12,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP LTEXT "Bus:",IDT_1770,7,87,24,8 @@ -649,7 +647,7 @@ BEGIN CONTROL "List1",IDC_LIST_ZIP_DRIVES,"SysListView32",LVS_REPORT | LVS_SHOWSELALWAYS | LVS_SINGLESEL | WS_BORDER | WS_TABSTOP,7,137,253,60 - LTEXT "ZIP drives:",IDT_1759,7,127,50,8 + LTEXT "ZIP drives:",IDT_1759,7,127,253,8 COMBOBOX IDC_COMBO_ZIP_BUS,23,205,90,12,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP LTEXT "Bus:",IDT_1753,7,207,14,8 diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index 6df04bacd..815e109e1 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -75,6 +75,9 @@ ifeq ($(DEV_BUILD), y) ifndef SIO_DETECT SIO_DETECT := y endif + ifndef USE_SIS_85C50X + USE_SIS_85C50X := y + endif ifndef STPC STPC := y endif @@ -148,6 +151,9 @@ else ifndef SIO_DETECT SIO_DETECT := n endif + ifndef USE_SIS_85C50X + USE_SIS_85C50X := n + endif ifndef STPC STPC := y endif @@ -543,6 +549,11 @@ OPTS += -DUSE_SIO_DETECT DEVBROBJ += sio_detect.o endif +ifeq ($(USE_SIS_85C50X), y) +OPTS += -DUSE_SIS_85C50X +DEVBROBJ += sis_85c50x.o +endif + ifeq ($(STPC), y) OPTS += -DUSE_STPC DEVBROBJ += stpc.o @@ -760,7 +771,8 @@ VIDOBJ := video.o \ vid_voodoo_fifo.o vid_voodoo_reg.o \ vid_voodoo_render.o vid_voodoo_setup.o \ vid_voodoo_texture.o \ - vid_ogc.o + vid_ogc.o \ + vid_nga.o PLATOBJ := win.o \ win_dynld.o win_thread.o \ diff --git a/src/win/win_devconf.c b/src/win/win_devconf.c index d0469660c..0ca76c8d8 100644 --- a/src/win/win_devconf.c +++ b/src/win/win_devconf.c @@ -519,7 +519,7 @@ deviceconfig_inst_open(HWND hwnd, const device_t *device, int inst) item->id = id++; item->cx = 60; - item->cy = 15; + item->cy = 20; item->style = WS_CHILD | WS_VISIBLE; @@ -566,7 +566,7 @@ deviceconfig_inst_open(HWND hwnd, const device_t *device, int inst) item->id = id++; item->cx = 60; - item->cy = 15; + item->cy = 20; item->style = WS_CHILD | WS_VISIBLE; @@ -633,7 +633,7 @@ deviceconfig_inst_open(HWND hwnd, const device_t *device, int inst) item->id = id++; item->cx = 60; - item->cy = 15; + item->cy = 20; item->style = WS_CHILD | WS_VISIBLE;