From 4e124968de7f985d48850cac059e4e9a3e4c1c8e Mon Sep 17 00:00:00 2001 From: TC1995 Date: Sat, 25 Oct 2025 23:16:57 +0200 Subject: [PATCH 1/2] Unbreak 800x600x32bpp Elsa Winner 1000 928VL mode. Fix its clock and as well as 640x480x32bpp OEM mode clock. --- src/video/vid_s3.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/src/video/vid_s3.c b/src/video/vid_s3.c index 74b57370e..e03ef71ba 100644 --- a/src/video/vid_s3.c +++ b/src/video/vid_s3.c @@ -4536,16 +4536,21 @@ s3_recalctimings(svga_t *svga) break; case SC1502X: /*SC15025 RAMDAC*/ if (svga->getclock == icd2061_getclock) { /*ICD2061 clock chip*/ + s3_log("32bpp 928 ISA VL SC1502X double=%02x, highres=%02x, dotperclock=%d, clksel=%d, pitch=%d, hdisp=%d, clock=%02x.\n", + svga->crtc[0x31] & 0x02, s3->accel.advfunc_cntl & 0x04, svga->dots_per_clock, clk_sel, s3->width, svga->hdisp, svga->crtc[0x67] >> 4); if (svga->crtc[0x31] & 0x02) { - svga->hdisp >>= 1; - svga->dots_per_clock >>= 1; - if (svga->hdisp == 640) - s3->width = 1024; + if (svga->dots_per_clock == 16) { + svga->hdisp >>= 1; + svga->dots_per_clock >>= 1; + svga->clock *= 2.0; + if (svga->hdisp == 640) + s3->width = 1024; + } } else { svga->hdisp >>= 2; svga->dots_per_clock >>= 2; if (svga->hdisp == 800) - s3->width = 1024; + svga->clock *= 2.0; } } break; From dde256573653b6f004d5ff500fbe231bf0c8618b Mon Sep 17 00:00:00 2001 From: TC1995 Date: Mon, 27 Oct 2025 16:38:30 +0100 Subject: [PATCH 2/2] Revert the k1/k2 s3 virge masks. Should fix some overlay Streams bugs. --- src/video/vid_s3_virge.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/src/video/vid_s3_virge.c b/src/video/vid_s3_virge.c index dcf380ff8..e9da4b412 100644 --- a/src/video/vid_s3_virge.c +++ b/src/video/vid_s3_virge.c @@ -1975,9 +1975,9 @@ s3_virge_mmio_write_l(uint32_t addr, uint32_t val, void *priv) break; case 0x8190: virge->streams.sec_ctrl = val; - virge->streams.dda_horiz_accumulator = val & 0xfff; - if (val & 0x1000) - virge->streams.dda_horiz_accumulator |= ~0xfff; + virge->streams.dda_horiz_accumulator = val & 0x7ff; + if (val & 0x800) + virge->streams.dda_horiz_accumulator |= ~0x7ff; virge->streams.sdif = (val >> 24) & 7; break; @@ -1990,9 +1990,9 @@ s3_virge_mmio_write_l(uint32_t addr, uint32_t val, void *priv) if (val & 0x800) virge->streams.k1_horiz_scale |= ~0x7ff; - virge->streams.k2_horiz_scale = (val >> 16) & 0x7ff; - if ((val >> 16) & 0x800) - virge->streams.k2_horiz_scale |= ~0x7ff; + virge->streams.k2_horiz_scale = (val >> 16) & 0x3ff; + if ((val >> 16) & 0x400) + virge->streams.k2_horiz_scale |= ~0x3ff; svga_recalctimings(svga); svga->fullchange = changeframecount; @@ -2048,14 +2048,14 @@ s3_virge_mmio_write_l(uint32_t addr, uint32_t val, void *priv) virge->streams.k1_vert_scale |= ~0x7ff; break; case 0x81e4: - virge->streams.k2_vert_scale = val & 0x7ff; - if (val & 0x800) - virge->streams.k2_vert_scale |= ~0x7ff; + virge->streams.k2_vert_scale = val & 0x3ff; + if (val & 0x400) + virge->streams.k2_vert_scale |= ~0x3ff; break; case 0x81e8: - virge->streams.dda_vert_accumulator = val & 0xfff; - if (val & 0x1000) - virge->streams.dda_vert_accumulator |= ~0xfff; + virge->streams.dda_vert_accumulator = val & 0x7ff; + if (val & 0x800) + virge->streams.dda_vert_accumulator |= ~0x7ff; svga_recalctimings(svga); svga->fullchange = changeframecount;