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Refactor the read functions

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This commit is contained in:
starfrost013
2024-12-29 17:18:14 +00:00
parent 260323e9a6
commit 378af452d6
14 changed files with 175 additions and 102 deletions
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25
src/video/nv/nv3/subsystems/nv3_pbus.c
View File

@@ -49,6 +49,8 @@ uint32_t nv3_pbus_read(uint32_t address)
{
nv_register_t* reg = nv_get_register(address, pbus_registers, sizeof(pbus_registers)/sizeof(pbus_registers[0]));
uint32_t ret = 0x00;
// todo: friendly logging
nv_log("NV3: PBUS Read from 0x%08x", address);
@@ -56,30 +58,33 @@ uint32_t nv3_pbus_read(uint32_t address)
// if the register actually exists
if (reg)
{
if (reg->friendly_name)
nv_log(": %s\n", reg->friendly_name);
else
nv_log("\n");
// on-read function
if (reg->on_read)
return reg->on_read();
ret = reg->on_read();
else
{
switch (reg->address)
{
case NV3_PBUS_INTR:
return nv3->pbus.interrupt_status;
ret = nv3->pbus.interrupt_status;
break;
case NV3_PBUS_INTR_EN:
return nv3->pbus.interrupt_enable;
ret = nv3->pbus.interrupt_enable;
break;
}
}
if (reg->friendly_name)
nv_log(": %s (value = %04x)\n", reg->friendly_name, ret);
else
nv_log("\n");
}
else
{
nv_log(": Unknown register read (address=%04x), returning 0x00\n", address);
}
return 0x0;
return ret;
}
void nv3_pbus_write(uint32_t address, uint32_t value)

1
src/video/nv/nv3/subsystems/nv3_pbus_dma.c
View File

@@ -28,4 +28,3 @@
#include <86Box/nv/vid_nv.h>
#include <86Box/nv/vid_nv3.h>
// Single unified write function...

23
src/video/nv/nv3/subsystems/nv3_pextdev.c
View File

@@ -84,7 +84,7 @@ uint32_t nv3_pextdev_read(uint32_t address)
{
nv_register_t* reg = nv_get_register(address, pextdev_registers, sizeof(pextdev_registers)/sizeof(pextdev_registers[0]));
// todo: friendly logging
uint32_t ret = 0x00;
// special consideration for straps
if (address == NV3_PSTRAPS)
@@ -94,31 +94,34 @@ uint32_t nv3_pextdev_read(uint32_t address)
else
{
nv_log("NV3: PEXTDEV Read from 0x%08x", address);
}
// if the register actually exists
if (reg)
{
if (reg->friendly_name)
nv_log(": %s\n", reg->friendly_name);
else
nv_log("\n");
// on-read function
if (reg->on_read)
return reg->on_read();
ret = reg->on_read();
else
{
switch (reg->address)
{
case NV3_PSTRAPS:
return nv3->pextdev.straps;
ret = nv3->pextdev.straps;
}
}
if (reg->friendly_name)
nv_log(": %s (value = %04x)\n", reg->friendly_name, ret);
else
nv_log("\n");
}
else
{
nv_log(": Unknown register read (address=%04x), returning 0x00\n", address);
}
return 0x0;
return ret;
}
void nv3_pextdev_write(uint32_t address, uint32_t value)

27
src/video/nv/nv3/subsystems/nv3_pfb.c
View File

@@ -63,6 +63,8 @@ uint32_t nv3_pfb_read(uint32_t address)
{
nv_register_t* reg = nv_get_register(address, pfb_registers, sizeof(pfb_registers)/sizeof(pfb_registers[0]));
uint32_t ret = 0x00;
// todo: friendly logging
nv_log("NV3: PFB Read from 0x%08x", address);
@@ -70,27 +72,32 @@ uint32_t nv3_pfb_read(uint32_t address)
// if the register actually exists
if (reg)
{
if (reg->friendly_name)
nv_log(": %s\n", reg->friendly_name);
else
nv_log("\n");
// on-read function
if (reg->on_read)
return reg->on_read();
ret = reg->on_read();
else
{
switch (reg->address)
{
case NV3_PFB_BOOT:
return nv3->pfb.boot;
ret = nv3->pfb.boot;
// Config 0 has a read/write function
case NV3_PFB_CONFIG_1:
return nv3->pfb.config_1;
ret = nv3->pfb.config_1;
}
}
if (reg->friendly_name)
nv_log(": %s (value = %04x)\n", reg->friendly_name, ret);
else
nv_log("\n");
}
else
{
nv_log(": Unknown register read (address=%04x), returning 0x00\n", address);
}
return 0x0;
return ret;
}
void nv3_pfb_write(uint32_t address, uint32_t value)
@@ -114,6 +121,7 @@ void nv3_pfb_write(uint32_t address, uint32_t value)
{
switch (reg->address)
{
// Config 0 has a read/write function
case NV3_PFB_CONFIG_1: // Config Register 1
nv3->pfb.config_1 = value;
}
@@ -124,7 +132,6 @@ void nv3_pfb_write(uint32_t address, uint32_t value)
uint32_t nv3_pfb_config0_read()
{
return nv3->pfb.config_0;
}
void nv3_pfb_config0_write(uint32_t val)

26
src/video/nv/nv3/subsystems/nv3_pfifo.c
View File

@@ -28,7 +28,7 @@
#include <86Box/nv/vid_nv.h>
#include <86Box/nv/vid_nv3.h>
// Single unified write function...
//
// ****** pfifo register list START ******
@@ -59,6 +59,8 @@ uint32_t nv3_pfifo_read(uint32_t address)
return 0x00;
}
uint32_t ret = 0x00;
nv_register_t* reg = nv_get_register(address, pfifo_registers, sizeof(pfifo_registers)/sizeof(pfifo_registers[0]));
// todo: friendly logging
@@ -68,14 +70,10 @@ uint32_t nv3_pfifo_read(uint32_t address)
// if the register actually exists
if (reg)
{
if (reg->friendly_name)
nv_log(": %s\n", reg->friendly_name);
else
nv_log("\n");
// on-read function
if (reg->on_read)
return reg->on_read();
ret = reg->on_read();
else
{
// Interrupt state:
@@ -87,13 +85,23 @@ uint32_t nv3_pfifo_read(uint32_t address)
switch (reg->address)
{
case NV3_PFIFO_INTR:
return nv3->pfifo.interrupt_status;
ret = nv3->pfifo.interrupt_status;
case NV3_PFIFO_INTR_EN:
return nv3->pfifo.interrupt_enable;
ret = nv3->pfifo.interrupt_enable;
}
}
if (reg->friendly_name)
nv_log(": %s\n", reg->friendly_name);
else
nv_log("\n");
}
return 0x0;
else
{
nv_log(": Unknown register read (address=%04x), returning 0x00\n", address);
}
return ret;
}
void nv3_pfifo_write(uint32_t address, uint32_t value)

27
src/video/nv/nv3/subsystems/nv3_pgraph.c
View File

@@ -94,6 +94,8 @@ uint32_t nv3_pgraph_read(uint32_t address)
return 0x00;
}
uint32_t ret = 0x00;
nv_register_t* reg = nv_get_register(address, pgraph_registers, sizeof(pgraph_registers)/sizeof(pgraph_registers[0]));
// todo: friendly logging
@@ -103,30 +105,29 @@ uint32_t nv3_pgraph_read(uint32_t address)
// if the register actually exists
if (reg)
{
if (reg->friendly_name)
nv_log(": %s\n", reg->friendly_name);
else
nv_log("\n");
// on-read function
if (reg->on_read)
return reg->on_read();
ret = reg->on_read();
else
{
switch (reg->address)
{
//interrupt status and enable regs
case NV3_PGRAPH_INTR_0:
return nv3->pgraph.interrupt_status_0;
ret = nv3->pgraph.interrupt_status_0;
case NV3_PGRAPH_INTR_1:
return nv3->pgraph.interrupt_status_1;
ret = nv3->pgraph.interrupt_status_1;
case NV3_PGRAPH_INTR_EN_0:
return nv3->pgraph.interrupt_enable_0;
ret = nv3->pgraph.interrupt_enable_0;
case NV3_PGRAPH_INTR_EN_1:
return nv3->pgraph.interrupt_enable_1;
ret = nv3->pgraph.interrupt_enable_1;
}
}
if (reg->friendly_name)
nv_log(": %s (value = %04x)\n", reg->friendly_name, ret);
else
nv_log("\n");
}
else
{
@@ -139,9 +140,13 @@ uint32_t nv3_pgraph_read(uint32_t address)
nv_log("NV3: PGRAPH Context Cache Read (Entry=%04x Value=%04x)\n", entry, nv3->pgraph.context_cache[entry]);
}
else /* Completely unknown */
{
nv_log(": Unknown register read (address=%04x), returning 0x00\n", address);
}
}
return 0x0;
return ret;
}
void nv3_pgraph_write(uint32_t address, uint32_t value)

30
src/video/nv/nv3/subsystems/nv3_pmc.c
View File

@@ -28,7 +28,7 @@
#include <86Box/nv/vid_nv.h>
#include <86Box/nv/vid_nv3.h>
// Single unified write function...
void nv3_pmc_init()
{
@@ -172,41 +172,47 @@ uint32_t nv3_pmc_read(uint32_t address)
{
nv_register_t* reg = nv_get_register(address, pmc_registers, sizeof(pmc_registers)/sizeof(pmc_registers[0]));
uint32_t ret = 0x00;
// todo: friendly logging
nv_log("NV3: PMC Read from 0x%08x", address);
// if the register actually exists
if (reg)
{
if (reg->friendly_name)
nv_log(": %s\n", reg->friendly_name);
else
nv_log("\n");
// on-read function
if (reg->on_read)
return reg->on_read();
ret = reg->on_read();
else
{
switch (reg->address)
{
case NV3_PMC_BOOT:
return nv3->pmc.boot;
ret = nv3->pmc.boot;
case NV3_PMC_INTERRUPT_STATUS:
nv3_pmc_clear_interrupts();
return nv3_pmc_handle_interrupts(false);
ret = nv3_pmc_handle_interrupts(false);
case NV3_PMC_INTERRUPT_ENABLE:
//TODO: ACTUALLY CHANGE THE INTERRUPT STATE
return nv3->pmc.interrupt_enable;
ret = nv3->pmc.interrupt_enable;
case NV3_PMC_ENABLE:
return nv3->pmc.enable;
ret = nv3->pmc.enable;
}
}
if (reg->friendly_name)
nv_log(": %s (value = %04x)\n", reg->friendly_name, ret);
else
nv_log("\n");
}
else
{
nv_log(": Unknown register read (address=%04x), returning 0x00\n", address);
}
return 0x0;
return ret;
}
void nv3_pmc_write(uint32_t address, uint32_t value)

19
src/video/nv/nv3/subsystems/nv3_pme.c
View File

@@ -45,6 +45,8 @@ uint32_t nv3_pme_read(uint32_t address)
{
nv_register_t* reg = nv_get_register(address, pme_registers, sizeof(pme_registers)/sizeof(pme_registers[0]));
uint32_t ret = 0x00;
// todo: friendly logging
nv_log("NV3: PME Read from 0x%08x", address);
@@ -59,7 +61,7 @@ uint32_t nv3_pme_read(uint32_t address)
// on-read function
if (reg->on_read)
return reg->on_read();
ret = reg->on_read();
else
{
// Interrupt state:
@@ -71,14 +73,23 @@ uint32_t nv3_pme_read(uint32_t address)
switch (reg->address)
{
case NV3_PME_INTR:
return nv3->pme.interrupt_status;
ret = nv3->pme.interrupt_status;
case NV3_PME_INTR_EN:
return nv3->pme.interrupt_enable;
ret = nv3->pme.interrupt_enable;
}
}
if (reg->friendly_name)
nv_log(": %s (value = %04x)\n", reg->friendly_name, ret);
else
nv_log("\n");
}
else
{
nv_log(": Unknown register read (address=%04x), returning 0x00\n", address);
}
return 0x0;
return ret;
}
void nv3_pme_write(uint32_t address, uint32_t value)

47
src/video/nv/nv3/subsystems/nv3_pramdac.c
View File

@@ -210,6 +210,8 @@ uint32_t nv3_pramdac_read(uint32_t address)
{
nv_register_t* reg = nv_get_register(address, pramdac_registers, sizeof(pramdac_registers)/sizeof(pramdac_registers[0]));
uint32_t ret = 0x00;
// todo: friendly logging
nv_log("NV3: PRAMDAC Read from 0x%08x", address);
@@ -224,49 +226,58 @@ uint32_t nv3_pramdac_read(uint32_t address)
// on-read function
if (reg->on_read)
return reg->on_read();
ret = reg->on_read();
else
{
//s hould be pretty easy to understand
switch (reg->address)
{
case NV3_PRAMDAC_COEFF_SELECT:
return nv3->pramdac.coeff_select;
ret = nv3->pramdac.coeff_select;
case NV3_PRAMDAC_GENERAL_CONTROL:
return nv3->pramdac.general_control;
ret = nv3->pramdac.general_control;
case NV3_PRAMDAC_VSERR_WIDTH:
return nv3->pramdac.vserr_width;
ret = nv3->pramdac.vserr_width;
case NV3_PRAMDAC_VBBLANK_END:
return nv3->pramdac.vbblank_end;
ret = nv3->pramdac.vbblank_end;
case NV3_PRAMDAC_VBLANK_END:
return nv3->pramdac.vblank_end;
ret = nv3->pramdac.vblank_end;
case NV3_PRAMDAC_VBLANK_START:
return nv3->pramdac.vblank_start;
ret = nv3->pramdac.vblank_start;
case NV3_PRAMDAC_VEQU_START:
return nv3->pramdac.vequ_start;
ret = nv3->pramdac.vequ_start;
case NV3_PRAMDAC_VTOTAL:
return nv3->pramdac.vtotal;
ret = nv3->pramdac.vtotal;
case NV3_PRAMDAC_HSYNC_WIDTH:
return nv3->pramdac.hsync_width;
ret = nv3->pramdac.hsync_width;
case NV3_PRAMDAC_HBURST_START:
return nv3->pramdac.hburst_start;
ret = nv3->pramdac.hburst_start;
case NV3_PRAMDAC_HBURST_END:
return nv3->pramdac.hburst_end;
ret = nv3->pramdac.hburst_end;
case NV3_PRAMDAC_HBLANK_START:
return nv3->pramdac.hblank_start;
ret = nv3->pramdac.hblank_start;
case NV3_PRAMDAC_HBLANK_END:
return nv3->pramdac.hblank_end;
ret = nv3->pramdac.hblank_end;
case NV3_PRAMDAC_HTOTAL:
return nv3->pramdac.htotal;
ret = nv3->pramdac.htotal;
case NV3_PRAMDAC_HEQU_WIDTH:
return nv3->pramdac.hequ_width;
ret = nv3->pramdac.hequ_width;
case NV3_PRAMDAC_HSERR_WIDTH:
return nv3->pramdac.hserr_width;
ret = nv3->pramdac.hserr_width;
}
}
if (reg->friendly_name)
nv_log(": %s (value = %04x)\n", reg->friendly_name, ret);
else
nv_log("\n");
}
else
{
nv_log(": Unknown register read (address=%04x), returning 0x00\n", address);
}
return 0x0;
return ret;
}
void nv3_pramdac_write(uint32_t address, uint32_t value)

1
src/video/nv/nv3/subsystems/nv3_pramin_ramfc.c
View File

@@ -28,4 +28,3 @@
#include <86Box/nv/vid_nv.h>
#include <86Box/nv/vid_nv3.h>
// Single unified write function...

1
src/video/nv/nv3/subsystems/nv3_pramin_ramht.c
View File

@@ -28,4 +28,3 @@
#include <86Box/nv/vid_nv.h>
#include <86Box/nv/vid_nv3.h>
// Single unified write function...

1
src/video/nv/nv3/subsystems/nv3_pramin_ramro.c
View File

@@ -28,4 +28,3 @@
#include <86Box/nv/vid_nv.h>
#include <86Box/nv/vid_nv3.h>
// Single unified write function...

29
src/video/nv/nv3/subsystems/nv3_ptimer.c
View File

@@ -87,6 +87,8 @@ uint32_t nv3_ptimer_read(uint32_t address)
nv_log("NV3: PTIMER Read from 0x%08x", address);
uint32_t ret = 0x00;
// if the register actually exists
if (reg)
{
@@ -97,7 +99,7 @@ uint32_t nv3_ptimer_read(uint32_t address)
// on-read function
if (reg->on_read)
return reg->on_read();
ret = reg->on_read();
else
{
// Interrupt state:
@@ -106,27 +108,36 @@ uint32_t nv3_ptimer_read(uint32_t address)
switch (reg->address)
{
case NV3_PTIMER_INTR:
return nv3->ptimer.interrupt_status;
ret = nv3->ptimer.interrupt_status;
case NV3_PTIMER_INTR_EN:
return nv3->ptimer.interrupt_enable;
ret = nv3->ptimer.interrupt_enable;
case NV3_PTIMER_NUMERATOR:
return nv3->ptimer.clock_numerator; // 15:0
ret = nv3->ptimer.clock_numerator; // 15:0
case NV3_PTIMER_DENOMINATOR:
return nv3->ptimer.clock_denominator ; //15:0
ret = nv3->ptimer.clock_denominator ; //15:0
// 64-bit value
// High part
case NV3_PTIMER_TIME_0_NSEC:
return nv3->ptimer.time & 0xFFFFFFFF; //28:0
ret = nv3->ptimer.time & 0xFFFFFFFF; //28:0
// Low part
case NV3_PTIMER_TIME_1_NSEC:
return nv3->ptimer.time >> 32; // 31:5
ret = nv3->ptimer.time >> 32; // 31:5
case NV3_PTIMER_ALARM_NSEC:
return nv3->ptimer.alarm; // 31:5
ret = nv3->ptimer.alarm; // 31:5
}
}
if (reg->friendly_name)
nv_log(": %s (value = %04x)\n", reg->friendly_name, ret);
else
nv_log("\n");
}
else
{
nv_log(": Unknown register read (address=%04x), returning 0x00\n", address);
}
return 0x00;
return ret;
}
void nv3_ptimer_write(uint32_t address, uint32_t value)

20
src/video/nv/nv3/subsystems/nv3_pvideo.c
View File

@@ -48,7 +48,8 @@ uint32_t nv3_pvideo_read(uint32_t address)
// before doing anything, check the subsystem enablement
nv_register_t* reg = nv_get_register(address, pvideo_registers, sizeof(pvideo_registers)/sizeof(pvideo_registers[0]));
uint32_t ret = 0x00;
// todo: friendly logging
nv_log("NV3: PVIDEO Read from 0x%08x", address);
@@ -63,7 +64,7 @@ uint32_t nv3_pvideo_read(uint32_t address)
// on-read function
if (reg->on_read)
return reg->on_read();
ret = reg->on_read();
else
{
// Interrupt state:
@@ -72,14 +73,23 @@ uint32_t nv3_pvideo_read(uint32_t address)
switch (reg->address)
{
case NV3_PVIDEO_INTR:
return nv3->pvideo.interrupt_status;
ret = nv3->pvideo.interrupt_status;
case NV3_PVIDEO_INTR_EN:
return nv3->pvideo.interrupt_enable;
ret = nv3->pvideo.interrupt_enable;
}
}
if (reg->friendly_name)
nv_log(": %s (value = %04x)\n", reg->friendly_name, ret);
else
nv_log("\n");
}
else
{
nv_log(": Unknown register read (address=%04x), returning 0x00\n", address);
}
return 0x0;
return ret;
}
void nv3_pvideo_write(uint32_t address, uint32_t value)