Merge remote-tracking branch 'upstream/master' into feature/mtrr

This commit is contained in:
Jasmine Iwanek
2023-06-13 04:54:17 -04:00
151 changed files with 3403 additions and 2250 deletions

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@@ -46,6 +46,42 @@ uint32_t backupregs[16];
x86seg _oldds;
#if 1
int opcode_length[256] = { 3, 3, 3, 3, 3, 3, 1, 1, 3, 3, 3, 3, 3, 3, 1, 3, /* 0x0x */
3, 3, 3, 3, 3, 3, 1, 1, 3, 3, 3, 3, 3, 3, 1, 1, /* 0x1x */
3, 3, 3, 3, 3, 3, 1, 1, 3, 3, 3, 3, 3, 3, 1, 1, /* 0x2x */
3, 3, 3, 3, 3, 3, 1, 1, 3, 3, 3, 3, 3, 3, 1, 1, /* 0x3x */
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 0x4x */
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 0x5x */
1, 1, 3, 3, 1, 1, 1, 1, 3, 3, 2, 3, 1, 1, 1, 1, /* 0x6x */
2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, /* 0x7x */
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, /* 0x8x */
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 3, 1, 1, 1, 1, 1, /* 0x9x */
3, 3, 3, 3, 1, 1, 1, 1, 2, 3, 1, 1, 1, 1, 1, 1, /* 0xax */
2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, /* 0xbx */
3, 3, 3, 1, 3, 3, 3, 3, 3, 1, 3, 1, 1, 2, 1, 1, /* 0xcx */
3, 3, 3, 3, 2, 2, 1, 1, 3, 3, 3, 3, 3, 3, 3, 3, /* 0xdx */
2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 2, 1, 1, 1, 1, /* 0xex */
1, 1, 1, 1, 1, 1, 3, 3, 1, 1, 1, 1, 1, 1, 3, 3 }; /* 0xfx */
#else
int opcode_length[256] = { 3, 3, 3, 3, 3, 3, 1, 1, 3, 3, 3, 3, 3, 3, 1, 3, /* 0x0x */
3, 3, 3, 3, 3, 3, 1, 1, 3, 3, 3, 3, 3, 3, 1, 1, /* 0x1x */
3, 3, 3, 3, 3, 3, 3, 1, 3, 3, 3, 3, 3, 3, 3, 1, /* 0x2x */
3, 3, 3, 3, 3, 3, 3, 1, 3, 3, 3, 3, 3, 3, 3, 1, /* 0x3x */
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 0x4x */
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, /* 0x5x */
1, 1, 3, 3, 3, 3, 3, 3, 3, 3, 2, 3, 1, 1, 1, 1, /* 0x6x */
2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, /* 0x7x */
3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, /* 0x8x */
1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 3, 1, 1, 1, 1, 1, /* 0x9x */
3, 3, 3, 3, 1, 1, 1, 1, 2, 3, 1, 1, 1, 1, 1, 1, /* 0xax */
2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, /* 0xbx */
3, 3, 3, 1, 3, 3, 3, 3, 3, 1, 3, 1, 1, 2, 1, 1, /* 0xcx */
3, 3, 3, 3, 2, 2, 1, 1, 3, 3, 3, 3, 3, 3, 3, 3, /* 0xdx */
2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 2, 1, 1, 1, 1, /* 0xex */
3, 1, 3, 3, 1, 1, 3, 3, 1, 1, 1, 1, 1, 1, 3, 3 }; /* 0xfx */
#endif
#ifdef ENABLE_386_LOG
int x386_do_log = ENABLE_386_LOG;
@@ -143,7 +179,7 @@ exec386(int cycs)
cpu_state.ea_seg = &cpu_state.seg_ds;
cpu_state.ssegs = 0;
fetchdat = fastreadl(cs + cpu_state.pc);
fetchdat = fastreadl_fetch(cs + cpu_state.pc);
if (!cpu_state.abrt) {
#ifdef ENABLE_386_LOG

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@@ -1683,7 +1683,7 @@ sysexit(uint32_t fetchdat)
cpu_cur_status &= ~(CPU_STATUS_NOTFLATSS /* | CPU_STATUS_V86*/);
cpu_cur_status |= (CPU_STATUS_USE32 | CPU_STATUS_STACK32 | CPU_STATUS_PMODE);
flushmmucache_cr3();
flushmmucache_nopc();
set_use32(1);
set_stack32(1);
@@ -1804,7 +1804,7 @@ sysret(uint32_t fetchdat)
cpu_cur_status &= ~(CPU_STATUS_NOTFLATSS /* | CPU_STATUS_V86*/);
cpu_cur_status |= (CPU_STATUS_USE32 | CPU_STATUS_STACK32 | CPU_STATUS_PMODE);
flushmmucache_cr3();
flushmmucache_nopc();
set_use32(1);
set_stack32(1);

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@@ -257,6 +257,51 @@ get_ram_ptr(uint32_t a)
}
}
extern int opcode_length[256];
static __inline uint16_t
fastreadw_fetch(uint32_t a)
{
uint8_t *t;
uint16_t val;
if ((a & 0xFFF) > 0xFFE) {
val = fastreadb(a);
if (opcode_length[val & 0xff] > 1)
val |= (fastreadb(a + 1) << 8);
return val;
}
if ((a >> 12) == pccache)
return *((uint16_t *) &pccache2[a]);
t = getpccache(a);
if (cpu_state.abrt)
return 0;
pccache = a >> 12;
pccache2 = t;
return *((uint16_t *) &pccache2[a]);
}
static __inline uint32_t
fastreadl_fetch(uint32_t a)
{
uint8_t *t;
uint32_t val;
if ((a & 0xFFF) < 0xFFD) {
if ((a >> 12) != pccache) {
t = getpccache(a);
if (cpu_state.abrt)
return 0;
pccache2 = t;
pccache = a >> 12;
}
return *((uint32_t *) &pccache2[a]);
}
val = fastreadw_fetch(a);
if (opcode_length[val & 0xff] > 2)
val |= (fastreadw(a + 2) << 16);
return val;
}
static __inline uint8_t
getbyte(void)
{

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@@ -348,7 +348,7 @@ exec386_dynarec_int(void)
cpu_state.ea_seg = &cpu_state.seg_ds;
cpu_state.ssegs = 0;
fetchdat = fastreadl(cs + cpu_state.pc);
fetchdat = fastreadl_fetch(cs + cpu_state.pc);
# ifdef ENABLE_386_DYNAREC_LOG
if (in_smm)
x386_dynarec_log("[%04X:%08X] fetchdat = %08X\n", CS, cpu_state.pc, fetchdat);
@@ -572,7 +572,7 @@ exec386_dynarec_dyn(void)
cpu_state.ea_seg = &cpu_state.seg_ds;
cpu_state.ssegs = 0;
fetchdat = fastreadl(cs + cpu_state.pc);
fetchdat = fastreadl_fetch(cs + cpu_state.pc);
# ifdef ENABLE_386_DYNAREC_LOG
if (in_smm)
x386_dynarec_log("[%04X:%08X] fetchdat = %08X\n", CS, cpu_state.pc, fetchdat);
@@ -668,7 +668,7 @@ exec386_dynarec_dyn(void)
cpu_state.ssegs = 0;
codegen_endpc = (cs + cpu_state.pc) + 8;
fetchdat = fastreadl(cs + cpu_state.pc);
fetchdat = fastreadl_fetch(cs + cpu_state.pc);
# ifdef ENABLE_386_DYNAREC_LOG
if (in_smm)

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@@ -1526,7 +1526,7 @@ cpu_set(void)
break;
default:
fatal("cpu_set : unknown CPU type %i\n", cpu_s->cpu_type);
fatal("cpu_set : unknown CPU type %llu\n", cpu_s->cpu_type);
}
switch (fpu_type) {

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@@ -548,7 +548,8 @@ BX_CPP_INLINE floatx80 packFloatx80(int zSign, Bit32s zExp, Bit64u zSig)
BX_CPP_INLINE int floatx80_is_nan(floatx80 a)
{
return ((a.exp & 0x7FFF) == 0x7FFF) && (Bit64s) (a.fraction<<1);
// return ((a.exp & 0x7FFF) == 0x7FFF) && (Bit64s) (a.fraction<<1);
return ((a.exp & 0x7FFF) == 0x7FFF) && (((Bit64s) (a.fraction<<1)) != 0);
}
/*----------------------------------------------------------------------------

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@@ -536,7 +536,7 @@ flags_rebuild_c(void)
static __inline int
flags_res_valid(void)
{
if (cpu_state.flags_op == FLAGS_UNKNOWN || (cpu_state.flags_op >= FLAGS_ROL8 && cpu_state.flags_op <= FLAGS_ROR32))
if ((cpu_state.flags_op == FLAGS_UNKNOWN) || ((cpu_state.flags_op >= FLAGS_ROL8) && (cpu_state.flags_op <= FLAGS_ROR32)))
return 0;
return 1;

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@@ -998,7 +998,7 @@ opLOADALL386(uint32_t fetchdat)
loadall_load_segment(la_addr + 0xc0, &cpu_state.seg_es);
if (CPL == 3 && oldcpl != 3)
flushmmucache_cr3();
flushmmucache_nopc();
oldcpl = CPL;
CLOCK_CYCLES(350);

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@@ -251,12 +251,12 @@ opMOV_DRx_r_a32(uint32_t fetchdat)
static void
opMOV_r_TRx(void)
{
uint32_t base;
// uint32_t base;
base = _tr[4] & 0xfffff800;
// base = _tr[4] & 0xfffff800;
switch (cpu_reg) {
case 3:
pclog("[R] %08X cache = %08X\n", base + cache_index, _tr[3]);
// pclog("[R] %08X cache = %08X\n", base + cache_index, _tr[3]);
_tr[3] = *(uint32_t *) &(_cache[cache_index]);
cache_index = (cache_index + 4) & 0xf;
break;
@@ -300,35 +300,35 @@ opMOV_TRx_r(void)
ctl = _tr[5] & 3;
switch (cpu_reg) {
case 3:
pclog("[W] %08X cache = %08X\n", base + cache_index, _tr[3]);
// pclog("[W] %08X cache = %08X\n", base + cache_index, _tr[3]);
*(uint32_t *) &(_cache[cache_index]) = _tr[3];
cache_index = (cache_index + 4) & 0xf;
break;
case 4:
if (!(cr0 & 1) && !(_tr[5] & (1 << 19)))
pclog("TAG = %08X, DEST = %08X\n", base, base + cache_index - 16);
// if (!(cr0 & 1) && !(_tr[5] & (1 << 19)))
// pclog("TAG = %08X, DEST = %08X\n", base, base + cache_index - 16);
break;
case 5:
pclog("[16] EXT = %i (%i), SET = %04X\n", !!(_tr[5] & (1 << 19)), _tr[5] & 0x03, _tr[5] & 0x7f0);
// pclog("[16] EXT = %i (%i), SET = %04X\n", !!(_tr[5] & (1 << 19)), _tr[5] & 0x03, _tr[5] & 0x7f0);
if (!(_tr[5] & (1 << 19))) {
switch (ctl) {
case 0:
pclog(" Cache fill or read...\n", base);
// pclog(" Cache fill or read...\n", base);
break;
case 1:
base += (_tr[5] & 0x7f0);
pclog(" Writing 16 bytes to %08X...\n", base);
// pclog(" Writing 16 bytes to %08X...\n", base);
for (i = 0; i < 16; i += 4)
mem_writel_phys(base + i, *(uint32_t *) &(_cache[i]));
break;
case 2:
base += (_tr[5] & 0x7f0);
pclog(" Reading 16 bytes from %08X...\n", base);
// pclog(" Reading 16 bytes from %08X...\n", base);
for (i = 0; i < 16; i += 4)
*(uint32_t *) &(_cache[i]) = mem_readl_phys(base + i);
break;
case 3:
pclog(" Cache invalidate/flush...\n", base);
// pclog(" Cache invalidate/flush...\n", base);
break;
}
}

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@@ -461,7 +461,7 @@ op0F01_common(uint32_t fetchdat, int is32, int is286, int ea32)
break;
}
SEG_CHECK_READ(cpu_state.ea_seg);
mmu_invalidate(ds + cpu_state.eaaddr);
flushmmucache_nopc();
CLOCK_CYCLES(12);
PREFETCH_RUN(12, 2, rmdat, 0, 0, 0, 0, ea32);
break;

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@@ -580,7 +580,7 @@ loadcs(uint16_t seg)
do_seg_load(&cpu_state.seg_cs, segdat);
use32 = (segdat[3] & 0x40) ? 0x300 : 0;
if ((CPL == 3) && (oldcpl != 3))
flushmmucache_cr3();
flushmmucache_nopc();
#ifdef USE_NEW_DYNAREC
oldcpl = CPL;
#endif
@@ -609,7 +609,7 @@ loadcs(uint16_t seg)
cpu_state.seg_cs.access = (cpu_state.eflags & VM_FLAG) ? 0xe2 : 0x82;
cpu_state.seg_cs.ar_high = 0x10;
if ((CPL == 3) && (oldcpl != 3))
flushmmucache_cr3();
flushmmucache_nopc();
#ifdef USE_NEW_DYNAREC
oldcpl = CPL;
#endif
@@ -673,7 +673,7 @@ loadcsjmp(uint16_t seg, uint32_t old_pc)
do_seg_load(&cpu_state.seg_cs, segdat);
if ((CPL == 3) && (oldcpl != 3))
flushmmucache_cr3();
flushmmucache_nopc();
#ifdef USE_NEW_DYNAREC
oldcpl = CPL;
#endif
@@ -751,7 +751,7 @@ loadcsjmp(uint16_t seg, uint32_t old_pc)
CS = seg2;
do_seg_load(&cpu_state.seg_cs, segdat);
if ((CPL == 3) && (oldcpl != 3))
flushmmucache_cr3();
flushmmucache_nopc();
#ifdef USE_NEW_DYNAREC
oldcpl = CPL;
#endif
@@ -794,7 +794,7 @@ loadcsjmp(uint16_t seg, uint32_t old_pc)
cpu_state.seg_cs.access = (cpu_state.eflags & VM_FLAG) ? 0xe2 : 0x82;
cpu_state.seg_cs.ar_high = 0x10;
if ((CPL == 3) && (oldcpl != 3))
flushmmucache_cr3();
flushmmucache_nopc();
#ifdef USE_NEW_DYNAREC
oldcpl = CPL;
#endif
@@ -957,7 +957,7 @@ loadcscall(uint16_t seg)
CS = seg;
do_seg_load(&cpu_state.seg_cs, segdat);
if ((CPL == 3) && (oldcpl != 3))
flushmmucache_cr3();
flushmmucache_nopc();
#ifdef USE_NEW_DYNAREC
oldcpl = CPL;
#endif
@@ -1100,7 +1100,7 @@ loadcscall(uint16_t seg)
CS = seg2;
do_seg_load(&cpu_state.seg_cs, segdat);
if ((CPL == 3) && (oldcpl != 3))
flushmmucache_cr3();
flushmmucache_nopc();
#ifdef USE_NEW_DYNAREC
oldcpl = CPL;
#endif
@@ -1182,7 +1182,7 @@ loadcscall(uint16_t seg)
CS = seg2;
do_seg_load(&cpu_state.seg_cs, segdat);
if ((CPL == 3) && (oldcpl != 3))
flushmmucache_cr3();
flushmmucache_nopc();
#ifdef USE_NEW_DYNAREC
oldcpl = CPL;
#endif
@@ -1227,7 +1227,7 @@ loadcscall(uint16_t seg)
cpu_state.seg_cs.access = (cpu_state.eflags & VM_FLAG) ? 0xe2 : 0x82;
cpu_state.seg_cs.ar_high = 0x10;
if ((CPL == 3) && (oldcpl != 3))
flushmmucache_cr3();
flushmmucache_nopc();
#ifdef USE_NEW_DYNAREC
oldcpl = CPL;
#endif
@@ -1332,7 +1332,7 @@ pmoderetf(int is32, uint16_t off)
do_seg_load(&cpu_state.seg_cs, segdat);
cpu_state.seg_cs.access = (cpu_state.seg_cs.access & ~(3 << 5)) | ((CS & 3) << 5);
if ((CPL == 3) && (oldcpl != 3))
flushmmucache_cr3();
flushmmucache_nopc();
#ifdef USE_NEW_DYNAREC
oldcpl = CPL;
#endif
@@ -1445,7 +1445,7 @@ pmoderetf(int is32, uint16_t off)
CS = seg;
do_seg_load(&cpu_state.seg_cs, segdat);
if ((CPL == 3) && (oldcpl != 3))
flushmmucache_cr3();
flushmmucache_nopc();
#ifdef USE_NEW_DYNAREC
oldcpl = CPL;
#endif
@@ -1697,7 +1697,7 @@ pmodeint(int num, int soft)
CS = (seg & 0xfffc) | new_cpl;
cpu_state.seg_cs.access = (cpu_state.seg_cs.access & ~0x60) | (new_cpl << 5);
if ((CPL == 3) && (oldcpl != 3))
flushmmucache_cr3();
flushmmucache_nopc();
#ifdef USE_NEW_DYNAREC
oldcpl = CPL;
#endif
@@ -1863,7 +1863,7 @@ pmodeiret(int is32)
cpu_state.seg_cs.access = 0xe2;
cpu_state.seg_cs.ar_high = 0x10;
if ((CPL == 3) && (oldcpl != 3))
flushmmucache_cr3();
flushmmucache_nopc();
#ifdef USE_NEW_DYNAREC
oldcpl = CPL;
#endif
@@ -1948,7 +1948,7 @@ pmodeiret(int is32)
do_seg_load(&cpu_state.seg_cs, segdat);
cpu_state.seg_cs.access = (cpu_state.seg_cs.access & ~0x60) | ((CS & 0x0003) << 5);
if ((CPL == 3) && (oldcpl != 3))
flushmmucache_cr3();
flushmmucache_nopc();
#ifdef USE_NEW_DYNAREC
oldcpl = CPL;
#endif
@@ -2037,7 +2037,7 @@ pmodeiret(int is32)
do_seg_load(&cpu_state.seg_cs, segdat);
cpu_state.seg_cs.access = (cpu_state.seg_cs.access & ~0x60) | ((CS & 3) << 5);
if ((CPL == 3) && (oldcpl != 3))
flushmmucache_cr3();
flushmmucache_nopc();
#ifdef USE_NEW_DYNAREC
oldcpl = CPL;
#endif
@@ -2233,7 +2233,7 @@ taskswitch286(uint16_t seg, uint16_t *segdat, int is32)
CS = new_cs;
do_seg_load(&cpu_state.seg_cs, segdat2);
if ((CPL == 3) && (oldcpl != 3))
flushmmucache_cr3();
flushmmucache_nopc();
#ifdef USE_NEW_DYNAREC
oldcpl = CPL;
#endif
@@ -2401,7 +2401,7 @@ taskswitch286(uint16_t seg, uint16_t *segdat, int is32)
CS = new_cs;
do_seg_load(&cpu_state.seg_cs, segdat2);
if ((CPL == 3) && (oldcpl != 3))
flushmmucache_cr3();
flushmmucache_nopc();
#ifdef USE_NEW_DYNAREC
oldcpl = CPL;
#endif