diff --git a/src/chipset/scat.c b/src/chipset/scat.c index 02610efa2..d168b643f 100644 --- a/src/chipset/scat.c +++ b/src/chipset/scat.c @@ -1140,14 +1140,21 @@ scat_out(uint16_t port, uint8_t val, void *priv) if (indx >= 24) base_addr += 0x30000; + if ((base_addr >= 0x000a0000) && (base_addr < 0x00100000)) + mem_set_mem_state(base_addr, 0x00004000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + if ((dev->regs[SCAT_EMS_CONTROL] & 0x80) && (dev->page[indx].regs_2x9 & 0x80)) { virt_addr = get_addr(dev, base_addr, &dev->page[indx]); if (virt_addr < ((uint32_t) mem_size << 10)) mem_mapping_set_exec(&dev->ems_mapping[indx], ram + virt_addr); else mem_mapping_set_exec(&dev->ems_mapping[indx], NULL); - flushmmucache(); + + if ((base_addr >= 0x000a0000) && (base_addr < 0x00100000)) + mem_set_mem_state(base_addr, 0x00004000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); } + + flushmmucache(); } break; @@ -1163,6 +1170,9 @@ scat_out(uint16_t port, uint8_t val, void *priv) if (indx >= 24) base_addr += 0x30000; + if ((base_addr >= 0x000a0000) && (base_addr < 0x00100000)) + mem_set_mem_state(base_addr, 0x00004000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); + if (dev->regs[SCAT_EMS_CONTROL] & 0x80) { if (val & 0x80) { virt_addr = get_addr(dev, base_addr, &dev->page[indx]); @@ -1175,6 +1185,9 @@ scat_out(uint16_t port, uint8_t val, void *priv) else mem_mapping_set_exec(&dev->ems_mapping[indx], NULL); mem_mapping_enable(&dev->ems_mapping[indx]); + + if ((base_addr >= 0x000a0000) && (base_addr < 0x00100000)) + mem_set_mem_state(base_addr, 0x00004000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); } else { mem_mapping_set_exec(&dev->ems_mapping[indx], ram + base_addr); mem_mapping_disable(&dev->ems_mapping[indx]); @@ -1495,7 +1508,7 @@ scat_init(const device_t *info) mem_mapping_add(&dev->ems_mapping[i], (i + 28) << 14, 0x04000, mem_read_scatb, mem_read_scatw, mem_read_scatl, mem_write_scatb, mem_write_scatw, mem_write_scatl, - ram + ((i + 28) << 14), 0, &dev->page[i]); + ram + ((i + 28) << 14), MEM_MAPPING_INTERNAL, &dev->page[i]); mem_mapping_disable(&dev->ems_mapping[i]); } } else { @@ -1508,7 +1521,7 @@ scat_init(const device_t *info) mem_read_scatb, mem_read_scatw, mem_read_scatl, mem_write_scatb, mem_write_scatw, mem_write_scatl, ram + ((i + (i >= 24 ? 28 : 16)) << 14), - 0, &dev->page[i]); + MEM_MAPPING_INTERNAL, &dev->page[i]); } } diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c index c8c018aed..aa7374186 100644 --- a/src/cpu/cpu.c +++ b/src/cpu/cpu.c @@ -2611,7 +2611,7 @@ cpu_ven_reset(void) void cpu_RDMSR(void) { - if (CPL) + if ((CPL || (cpu_state.eflags & VM_FLAG)) && (cr0 & 1)) x86gpf(NULL, 0); else switch (cpu_s->cpu_type) { case CPU_IBM386SLC: @@ -3468,7 +3468,7 @@ cpu_WRMSR(void) cpu_log("WRMSR %08X %08X%08X\n", ECX, EDX, EAX); - if (CPL) + if ((CPL || (cpu_state.eflags & VM_FLAG)) && (cr0 & 1)) x86gpf(NULL, 0); else switch (cpu_s->cpu_type) { case CPU_IBM386SLC: diff --git a/src/cpu/x86_ops_misc.h b/src/cpu/x86_ops_misc.h index f3e4bb353..c0b9de437 100644 --- a/src/cpu/x86_ops_misc.h +++ b/src/cpu/x86_ops_misc.h @@ -878,7 +878,7 @@ opINVD(uint32_t fetchdat) static int opWBINVD(uint32_t fetchdat) { - if (CPL) { + if ((CPL || (cpu_state.eflags & VM_FLAG)) && (cr0 & 1)) { x86gpf(NULL, 0); return 1; } diff --git a/src/floppy/fdc.c b/src/floppy/fdc.c index 0c18f2f30..7426bc216 100644 --- a/src/floppy/fdc.c +++ b/src/floppy/fdc.c @@ -177,15 +177,13 @@ fdc_ctrl_reset(void *priv) { fdc_t *fdc = (fdc_t *) priv; - fdc->stat = 0x80; + fdc->stat = 0x80; fdc->pnum = fdc->ptot = 0; fdc->st0 = 0; fdc->lock = 0; fdc->head = 0; fdc->step = 0; fdc->power_down = 0; - if (!(fdc->flags & FDC_FLAG_AT)) - fdc->rate = 2; } sector_id_t @@ -1211,7 +1209,7 @@ fdc_write(uint16_t addr, uint8_t val, void *priv) if (!(fdc->flags & FDC_FLAG_TOSHIBA) && !(fdc->flags & FDC_FLAG_AT) && !(fdc->flags & FDC_FLAG_UMC)) return; fdc->rate = val & 0x03; - if (fdc->flags & FDC_FLAG_PS1) + if (fdc->flags & FDC_FLAG_PS2) fdc->noprec = !!(val & 0x04); return; @@ -1231,23 +1229,43 @@ fdc_read(uint16_t addr, void *priv) if (!fdc->power_down || ((addr & 7) == 2)) switch (addr & 7) { case 0: /* STA */ - if (fdc->flags & FDC_FLAG_PS1) { + if (fdc->flags & FDC_FLAG_PS2) { drive = real_drive(fdc, fdc->dor & 3); ret = 0x00; /* TODO: Bit 2: INDEX (best return always 0 as it goes by very fast) */ - if (fdc->seek_dir) /* nDIRECTION */ + if (fdc->seek_dir) /* nDIRECTION */ ret |= 0x01; - if (writeprot[drive]) /* WRITEPROT */ + if (writeprot[drive]) /* WRITEPROT */ ret |= 0x02; - if (!fdd_get_head(drive)) /* nHDSEL */ + if (!fdd_get_head(drive)) /* nHDSEL */ ret |= 0x08; - if (fdd_track0(drive)) /* TRK0 */ + if (fdd_track0(drive)) /* TRK0 */ ret |= 0x10; - if (fdc->step) /* STEP */ + if (fdc->step) /* STEP */ ret |= 0x20; - if (dma_get_drq(fdc->dma_ch)) /* DRQ */ + if (dma_get_drq(fdc->dma_ch)) /* DRQ */ + ret |= 0x40; + if (fdc->fintr || fdc->reset_stat) /* INTR */ + ret |= 0x80; + } else if (fdc->flags & FDC_FLAG_PS2_MCA) { + drive = real_drive(fdc, fdc->dor & 3); + ret = 0x04; + /* TODO: + Bit 2: nINDEX (best return always 1 as it goes by very fast) + */ + if (!fdc->seek_dir) /* DIRECTION */ + ret |= 0x01; + if (!writeprot[drive]) /* nWRITEPROT */ + ret |= 0x02; + if (fdd_get_head(drive)) /* HDSEL */ + ret |= 0x08; + if (!fdd_track0(drive)) /* nTRK0 */ + ret |= 0x10; + if (fdc->step) /* STEP */ + ret |= 0x20; + if (!fdd_get_type(1)) /* -Drive 2 Installed */ ret |= 0x40; if (fdc->fintr || fdc->reset_stat) /* INTR */ ret |= 0x80; @@ -1255,14 +1273,12 @@ fdc_read(uint16_t addr, void *priv) ret = 0xff; break; case 1: /* STB */ - if (fdc->flags & FDC_FLAG_PS1) { + if (fdc->flags & FDC_FLAG_PS2) { drive = real_drive(fdc, fdc->dor & 3); ret = 0x00; - /* -Drive 2 Installed */ - if (!fdd_get_type(1)) + if (!fdd_get_type(1)) /* -Drive 2 Installed */ ret |= 0x80; - /* -Drive Select 1,0 */ - switch (drive) { + switch (drive) { /* -Drive Select 1,0 */ case 0: ret |= 0x43; break; @@ -1279,6 +1295,11 @@ fdc_read(uint16_t addr, void *priv) default: break; } + } else if (fdc->flags & FDC_FLAG_PS2_MCA) { + drive = real_drive(fdc, fdc->dor & 3); + ret = 0xc0; + ret |= (fdc->dor & 0x01) << 5; /* Drive Select 0 */ + ret |= (fdc->dor & 0x30) >> 4; /* Motor Select 1, 0 */ } else { if (is486 || !fdc->enable_3f1) ret = 0xff; @@ -1287,19 +1308,12 @@ fdc_read(uint16_t addr, void *priv) drive = real_drive(fdc, fdc->dor & 1); ret = !fdd_is_dd(drive) ? ((fdc->dor & 1) ? 2 : 1) : 0; } else { - ret = 0x70; - + /* TODO: What is this and what is it used for? + It's almost identical to the PS/2 MCA mode. */ drive = real_drive(fdc, fdc->dor & 3); - - if (drive) - ret &= ~0x40; - else - ret &= ~0x20; - - if (fdc->dor & 0x10) - ret |= 1; - if (fdc->dor & 0x20) - ret |= 2; + ret = 0x70; + ret &= ~(drive ? 0x40 : 0x20); + ret |= (fdc->dor & 0x30) >> 4; /* Motor Select 1, 0 */ } } } @@ -1309,7 +1323,8 @@ fdc_read(uint16_t addr, void *priv) break; case 3: drive = real_drive(fdc, fdc->dor & 3); - if (fdc->flags & FDC_FLAG_PS1) { + /* TODO: FDC_FLAG_PS2_TDR? */ + if ((fdc->flags & FDC_FLAG_PS2) || (fdc->flags & FDC_FLAG_PS2_MCA)) { /* PS/1 Model 2121 seems return drive type in port * 0x3f3, despite the 82077AA fdc_t not implementing * this. This is presumably implemented outside the @@ -1371,7 +1386,7 @@ fdc_read(uint16_t addr, void *priv) case 7: /*Disk change*/ drive = real_drive(fdc, fdc->dor & 3); - if (fdc->flags & FDC_FLAG_PS1) { + if (fdc->flags & FDC_FLAG_PS2) { if (fdc->dor & (0x10 << drive)) { ret = (fdd_changed[drive] || drive_empty[drive]) ? 0x00 : 0x80; ret |= (fdc->dor & 0x08); @@ -1379,6 +1394,14 @@ fdc_read(uint16_t addr, void *priv) ret |= (fdc->rate & 0x03); } else ret = 0x00; + } else if (fdc->flags & FDC_FLAG_PS2_MCA) { + if (fdc->dor & (0x10 << drive)) { + ret = (fdd_changed[drive] || drive_empty[drive]) ? 0x80 : 0x00; + ret |= ((fdc->rate & 0x03) << 1); + ret |= fdc_get_densel(fdc, drive); + ret |= 0x78; + } else + ret = 0xf9; } else { if (fdc->dor & (0x10 << drive)) { if ((drive == 1) && (fdc->flags & FDC_FLAG_TOSHIBA)) @@ -1411,7 +1434,7 @@ static void fdc_poll_common_finish(fdc_t *fdc, int compare, int st5) { fdc_int(fdc, 1); - if (!(fdc->flags & FDC_FLAG_PS1)) + if (!(fdc->flags & FDC_FLAG_FINTR)) fdc->fintr = 0; fdc->stat = 0xD0; fdc->st0 = fdc->res[4] = (fdd_get_head(real_drive(fdc, fdc->drive)) ? 4 : 0) | fdc->rw_drive; @@ -1712,7 +1735,7 @@ fdc_callback(void *priv) } else { fdc->interrupt = -2; fdc_int(fdc, 1); - if (!(fdc->flags & FDC_FLAG_PS1)) + if (!(fdc->flags & FDC_FLAG_FINTR)) fdc->fintr = 0; fdc->stat = 0xD0; fdc->st0 = fdc->res[4] = (fdd_get_head(real_drive(fdc, fdc->drive)) ? 4 : 0) | fdc->drive; @@ -1804,7 +1827,7 @@ fdc_error(fdc_t *fdc, int st5, int st6) timer_disable(&fdc->timer); fdc_int(fdc, 1); - if (!(fdc->flags & FDC_FLAG_PS1)) + if (!(fdc->flags & FDC_FLAG_FINTR)) fdc->fintr = 0; fdc->stat = 0xD0; fdc->st0 = fdc->res[4] = 0x40 | (fdd_get_head(real_drive(fdc, fdc->drive)) ? 4 : 0) | fdc->rw_drive; @@ -2213,7 +2236,7 @@ fdc_reset(void *priv) fdc->enable_3f1 = 1; fdc_update_enh_mode(fdc, 0); - if (fdc->flags & FDC_FLAG_PS1) + if (fdc->flags & FDC_FLAG_DENSEL_INVERT) fdc_update_densel_polarity(fdc, 0); else fdc_update_densel_polarity(fdc, 1); @@ -2259,6 +2282,9 @@ fdc_reset(void *priv) fdc_ctrl_reset(fdc); + if (!(fdc->flags & FDC_FLAG_AT)) + fdc->rate = 2; + fdc->max_track = (fdc->flags & FDC_FLAG_MORE_TRACKS) ? 85 : 79; fdc_remove(fdc); @@ -2443,6 +2469,20 @@ const device_t fdc_xt_tandy_device = { .config = NULL }; +const device_t fdc_xt_umc_um8398_device = { + .name = "PC/XT Floppy Drive Controller (UMC UM8398)", + .internal_name = "fdc_xt_umc_um8398", + .flags = 0, + .local = FDC_FLAG_UMC, + .init = fdc_init, + .close = fdc_close, + .reset = fdc_reset, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; + const device_t fdc_pcjr_device = { .name = "PCjr Floppy Drive Controller", .internal_name = "fdc_pcjr", @@ -2527,34 +2567,6 @@ const device_t fdc_at_actlow_device = { .config = NULL }; -const device_t fdc_at_ps1_device = { - .name = "PC/AT Floppy Drive Controller (PS/1, PS/2 ISA)", - .internal_name = "fdc_at_ps1", - .flags = 0, - .local = FDC_FLAG_DISKCHG_ACTLOW | FDC_FLAG_AT | FDC_FLAG_PS1, - .init = fdc_init, - .close = fdc_close, - .reset = fdc_reset, - { .available = NULL }, - .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL -}; - -const device_t fdc_at_ps1_2121_device = { - .name = "PC/AT Floppy Drive Controller (PS/1, PS/2 ISA)", - .internal_name = "fdc_at_ps1", - .flags = 0, - .local = FDC_FLAG_NO_DSR_RESET | FDC_FLAG_DISKCHG_ACTLOW | FDC_FLAG_AT | FDC_FLAG_PS1, - .init = fdc_init, - .close = fdc_close, - .reset = fdc_reset, - { .available = NULL }, - .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL -}; - const device_t fdc_at_smc_device = { .name = "PC/AT Floppy Drive Controller (SM(s)C FDC37Cxxx)", .internal_name = "fdc_at_smc", @@ -2611,9 +2623,9 @@ const device_t fdc_at_nsc_device = { .config = NULL }; -const device_t fdc_dp8473_device = { - .name = "NS DP8473 Floppy Drive Controller", - .internal_name = "fdc_dp8473", +const device_t fdc_at_nsc_dp8473_device = { + .name = "PC/AT Floppy Drive Controller (NSC DP8473)", + .internal_name = "fdc_at_nsc_dp8473", .flags = 0, .local = FDC_FLAG_AT | FDC_FLAG_NEC | FDC_FLAG_NO_DSR_RESET, .init = fdc_init, @@ -2625,11 +2637,27 @@ const device_t fdc_dp8473_device = { .config = NULL }; -const device_t fdc_um8398_device = { - .name = "UMC UM8398 Floppy Drive Controller", - .internal_name = "fdc_um8398", +const device_t fdc_ps2_device = { + .name = "PS/2 Model 25/30 Floppy Drive Controller", + .internal_name = "fdc_ps2", .flags = 0, - .local = FDC_FLAG_UMC, + .local = FDC_FLAG_FINTR | FDC_FLAG_DENSEL_INVERT | FDC_FLAG_NO_DSR_RESET | FDC_FLAG_DISKCHG_ACTLOW | + FDC_FLAG_AT | FDC_FLAG_PS2, + .init = fdc_init, + .close = fdc_close, + .reset = fdc_reset, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; + +const device_t fdc_ps2_mca_device = { + .name = "PS/2 MCA Floppy Drive Controller", + .internal_name = "fdc_ps2_mca", + .flags = 0, + .local = FDC_FLAG_FINTR | FDC_FLAG_DENSEL_INVERT | FDC_FLAG_NO_DSR_RESET | FDC_FLAG_AT | + FDC_FLAG_PS2_MCA, .init = fdc_init, .close = fdc_close, .reset = fdc_reset, diff --git a/src/floppy/fdc_magitronic.c b/src/floppy/fdc_magitronic.c index f607267ef..306440b9c 100644 --- a/src/floppy/fdc_magitronic.c +++ b/src/floppy/fdc_magitronic.c @@ -95,7 +95,7 @@ b215_init(UNUSED(const device_t *info)) rom_init(&dev->rom, ROM_B215, ROM_ADDR, 0x2000, 0x1fff, 0, MEM_MAPPING_EXTERNAL); - dev->fdc_controller = device_add(&fdc_um8398_device); + dev->fdc_controller = device_add(&fdc_xt_umc_um8398_device); io_sethandler(FDC_PRIMARY_ADDR, 1, b215_read, NULL, NULL, NULL, NULL, NULL, dev); return dev; diff --git a/src/floppy/fdc_pii15xb.c b/src/floppy/fdc_pii15xb.c index cc998e8e1..013d6d39b 100644 --- a/src/floppy/fdc_pii15xb.c +++ b/src/floppy/fdc_pii15xb.c @@ -75,7 +75,7 @@ MiniMicro 4 also won't work with the XT FDC which the Zilog claims to be. #include <86box/fdc_ext.h> #define DTK_VARIANT ((info->local == 158) ? ROM_PII_158B : ROM_PII_151B) -#define DTK_CHIP ((info->local == 158) ? &fdc_xt_device : &fdc_dp8473_device) +#define DTK_CHIP ((info->local == 158) ? &fdc_xt_device : &fdc_at_nsc_dp8473_device) #define BIOS_ADDR (uint32_t)(device_get_config_hex20("bios_addr") & 0x000fffff) #define ROM_PII_151B "roms/floppy/dtk/pii-151b.rom" #define ROM_PII_158B "roms/floppy/dtk/pii-158b.rom" diff --git a/src/floppy/fdd.c b/src/floppy/fdd.c index f1b1eab69..3a0b03a9b 100644 --- a/src/floppy/fdd.c +++ b/src/floppy/fdd.c @@ -294,7 +294,7 @@ fdd_type_invert_densel(int type) int ret; if (drive_types[type].flags & FLAG_PS2) - ret = !strstr(machine_getname(), "PS/2"); + ret = !!strstr(machine_getname(), "PS/"); else ret = drive_types[type].flags & FLAG_INVERT_DENSEL; diff --git a/src/include/86box/fdc.h b/src/include/86box/fdc.h index ef78239cd..9e8006650 100644 --- a/src/include/86box/fdc.h +++ b/src/include/86box/fdc.h @@ -41,20 +41,23 @@ #define FDC_FLAG_PCJR 0x01 /* PCjr */ #define FDC_FLAG_DISKCHG_ACTLOW 0x02 /* Amstrad, PS/1, PS/2 ISA */ #define FDC_FLAG_AT 0x04 /* AT+, PS/x */ -#define FDC_FLAG_PS1 0x08 /* PS/1, PS/2 ISA */ -#define FDC_FLAG_SUPERIO 0x10 /* Super I/O chips */ -#define FDC_FLAG_START_RWC_1 0x20 /* W83877F, W83977F */ -#define FDC_FLAG_MORE_TRACKS 0x40 /* W83877F, W83977F, PC87306, PC87309 */ -#define FDC_FLAG_NSC 0x80 /* PC87306, PC87309 */ -#define FDC_FLAG_TOSHIBA 0x100 /* T1000, T1200 */ -#define FDC_FLAG_AMSTRAD 0x200 /* Non-AT Amstrad machines */ -#define FDC_FLAG_UMC 0x400 /* UMC UM8398 */ -#define FDC_FLAG_ALI 0x800 /* ALi M512x / M1543C */ -#define FDC_FLAG_NO_DSR_RESET 0x1000 /* Has no DSR reset */ -#define FDC_FLAG_NEC 0x2000 /* Is NEC upd765-compatible */ -#define FDC_FLAG_SEC 0x10000 /* Is Secondary */ -#define FDC_FLAG_TER 0x20000 /* Is Tertiary */ -#define FDC_FLAG_QUA 0x40000 /* Is Quaternary */ +#define FDC_FLAG_PS2 0x08 /* PS/1, PS/2 ISA */ +#define FDC_FLAG_PS2_MCA 0x10 /* PS/2 MCA */ +#define FDC_FLAG_SUPERIO 0x20 /* Super I/O chips */ +#define FDC_FLAG_START_RWC_1 0x40 /* W83877F, W83977F */ +#define FDC_FLAG_MORE_TRACKS 0x80 /* W83877F, W83977F, PC87306, PC87309 */ +#define FDC_FLAG_NSC 0x100 /* PC87306, PC87309 */ +#define FDC_FLAG_TOSHIBA 0x200 /* T1000, T1200 */ +#define FDC_FLAG_AMSTRAD 0x400 /* Non-AT Amstrad machines */ +#define FDC_FLAG_UMC 0x800 /* UMC UM8398 */ +#define FDC_FLAG_ALI 0x1000 /* ALi M512x / M1543C */ +#define FDC_FLAG_NO_DSR_RESET 0x2000 /* Has no DSR reset */ +#define FDC_FLAG_DENSEL_INVERT 0x4000 /* Invert DENSEL polarity */ +#define FDC_FLAG_FINTR 0x8000 /* Raise FINTR on data command finish */ +#define FDC_FLAG_NEC 0x10000 /* Is NEC upd765-compatible */ +#define FDC_FLAG_SEC 0x20000 /* Is Secondary */ +#define FDC_FLAG_TER 0x40000 /* Is Tertiary */ +#define FDC_FLAG_QUA 0x80000 /* Is Quaternary */ typedef struct fdc_t { uint8_t dor; @@ -244,20 +247,20 @@ extern const device_t fdc_xt_qua_device; extern const device_t fdc_xt_t1x00_device; extern const device_t fdc_xt_tandy_device; extern const device_t fdc_xt_amstrad_device; +extern const device_t fdc_xt_umc_um8398_device; extern const device_t fdc_pcjr_device; extern const device_t fdc_at_device; extern const device_t fdc_at_sec_device; extern const device_t fdc_at_ter_device; extern const device_t fdc_at_qua_device; extern const device_t fdc_at_actlow_device; -extern const device_t fdc_at_ps1_device; -extern const device_t fdc_at_ps1_2121_device; extern const device_t fdc_at_smc_device; extern const device_t fdc_at_ali_device; extern const device_t fdc_at_winbond_device; extern const device_t fdc_at_nsc_device; -extern const device_t fdc_dp8473_device; -extern const device_t fdc_um8398_device; +extern const device_t fdc_at_nsc_dp8473_device; +extern const device_t fdc_ps2_device; +extern const device_t fdc_ps2_mca_device; #endif #endif /*EMU_FDC_H*/ diff --git a/src/machine/m_ps1.c b/src/machine/m_ps1.c index a6a16d65c..42bc49de2 100644 --- a/src/machine/m_ps1.c +++ b/src/machine/m_ps1.c @@ -323,6 +323,8 @@ ps1_setup(int model) device_add(&ps_nvr_device); + device_add(&fdc_ps2_device); + if (model == 2011) { if (!strcmp("english_us", device_get_config_bios("bios_language"))) { /* US English */ @@ -350,8 +352,6 @@ ps1_setup(int model) device_add(&ps1snd_device); - device_add(&fdc_at_ps1_device); - /* Enable the builtin HDC. */ if (hdc_current[0] == HDC_INTERNAL) { priv = device_add(&ps1_hdc_device); @@ -378,8 +378,6 @@ ps1_setup(int model) if (gfxcard[0] == VID_INTERNAL) device_add(&ibm_ps1_2121_device); - device_add(&fdc_at_ps1_2121_device); - device_add(&ide_isa_device); device_add(&ps1snd_device); diff --git a/src/machine/m_ps2_isa.c b/src/machine/m_ps2_isa.c index 2887cca20..c0c4f7c79 100644 --- a/src/machine/m_ps2_isa.c +++ b/src/machine/m_ps2_isa.c @@ -176,7 +176,7 @@ ps2_isa_setup(int model, int cpu_type) device_add(&ps_nvr_device); - device_add(&fdc_at_ps1_device); + device_add(&fdc_ps2_device); /* Enable the builtin HDC. */ if (hdc_current[0] == HDC_INTERNAL) { diff --git a/src/machine/m_ps2_mca.c b/src/machine/m_ps2_mca.c index cb83d9be7..632381ca1 100644 --- a/src/machine/m_ps2_mca.c +++ b/src/machine/m_ps2_mca.c @@ -1396,7 +1396,7 @@ machine_ps2_common_init(const machine_t *model) machine_common_init(model); if (fdc_current[0] == FDC_INTERNAL) - device_add(&fdc_at_device); + device_add(&fdc_ps2_mca_device); dma16_init(); ps2_dma_init();