Rewritten parts of the 86F handler to minimize false CRC errors and misidentification of sectors;

Replaced IMG handler with one that now proxies to the 86F handler;
Applies the remaining Mainline PCem speedup commit;
Fixed the National Semiconductors PC87306 Super I/O Chip's serial port IRQ assignment;
DMF images are now loaded with the correct sector interleave, improving read/write speed;
XDF images are now loaded in a way that emulates the real order of the sectors on the track, improving read/write speed;
Added 16-bit physical memory read/write routines (mem_phys_readw, mem_phys_writew) and modified the 16-bit DMA code to use them instead of two 8-bit reads/writes.

src/codegen_ops_fpu.h

@@ -580,6 +580,7 @@ static uint32_t ropFLDCW(uint8_t opcode, uint32_t fetchdat, uint32_t op_32, uint
         
         MEM_LOAD_ADDR_EA_W(target_seg);
         STORE_HOST_REG_ADDR_W((uintptr_t)&cpu_state.npxc, 0);
+        UPDATE_NPXC(0);
         
         return op_pc + 1;
 }