From 755e25285b55f781757010e4e59e632dd0e6116c Mon Sep 17 00:00:00 2001
From: win2kgamer <47463859+win2kgamer@users.noreply.github.com>
Date: Tue, 21 Oct 2025 20:38:21 -0500
Subject: [PATCH] CS423x: Always enable OPL3 on CS4232/4236 during context
 switch as they lack X registers

---
 src/sound/snd_cs423x.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/src/sound/snd_cs423x.c b/src/sound/snd_cs423x.c
index 15ad71782..6c0d9e80b 100644
--- a/src/sound/snd_cs423x.c
+++ b/src/sound/snd_cs423x.c
@@ -568,7 +568,11 @@ cs423x_ctxswitch_write(uint16_t addr, UNUSED(uint8_t val), void *priv)
 {
     cs423x_t *dev        = (cs423x_t *) priv;
     uint8_t   ctx        = (dev->regs[7] & 0x80);
-    uint8_t   enable_opl = (dev->ad1848.xregs[4] & 0x10) && !(dev->indirect_regs[2] & 0x85);
+    uint8_t   enable_opl = (dev->ad1848.xregs[4] & 0x10) && !(dev->indirect_regs[2] & 0x85); /* CS4236B+ */
+
+    /* CS4232/4236 (non-B) doesn't have an IFM bit, always enable the OPL on these chips */
+    if (dev->type <= CRYSTAL_CS4236)
+        enable_opl = 1;
 
     /* Check if a context switch (WSS=1 <-> SBPro=0) occurred through the address being written. */
     if ((dev->regs[7] & 0x80) ? ((addr & 0xfff0) == dev->sb_base) : ((addr & 0xfffc) == dev->wss_base)) {