From 9c111584b5384cfd2e87d0fb7a84185ae01b23ab Mon Sep 17 00:00:00 2001 From: TC1995 Date: Sat, 26 Oct 2024 21:32:47 +0200 Subject: [PATCH 01/26] Big video changes of the day (October 26th, 2024) 8514/A/Mach8/32: Reworked the acceleration a bit as well as the mode switches from VGA to ATI/8514/A mode and viceversa based on the documentation. Fixes the Linux GUI fonts using the Mach32 driver (possibly Mach8 too) and other anomalies (still needs more work on the acceleration though). PVGA: Minor fixes to the banking. S3-based (Pre-ViRGE): 1. Made the chip class use its own banking so that the Enhanced Mode mapping (equivalent to 64K-based A0000) is taken into account (per bit 3 of CRTC31, which forces the mapping to be 64K A0000, regardless of the GDCREG6 bits). Fixes NT 3.1 347.1's S3 driver. 2. Initial rework on 15bpp/16bpp accelerated mode of the 911/924 chips (currently not 100% bug free, I need help with this chips). XGA-1/2: Get rid of the linear endian reverse variable hack used by OS/2 and, instead, use the already declared ones more wisely, fixes OS/2 2.1 reversed fonts and keeps everything else working as it should. Misc: Added the BT481 RAMDAC for future card use. --- src/include/86box/vid_8514a.h | 22 +- src/include/86box/vid_ati_mach8.h | 21 +- src/include/86box/vid_svga.h | 5 + src/include/86box/vid_xga.h | 5 +- src/video/CMakeLists.txt | 2 +- src/video/vid_8514a.c | 2973 ++++++++++++----------------- src/video/vid_ati68860_ramdac.c | 16 +- src/video/vid_ati_mach8.c | 2061 ++++++++++---------- src/video/vid_bt481_ramdac.c | 160 ++ src/video/vid_paradise.c | 22 +- src/video/vid_s3.c | 1466 ++++---------- src/video/vid_svga.c | 64 +- src/video/vid_xga.c | 412 ++-- 13 files changed, 3029 insertions(+), 4200 deletions(-) create mode 100644 src/video/vid_bt481_ramdac.c diff --git a/src/include/86box/vid_8514a.h b/src/include/86box/vid_8514a.h index d834a6f42..39af01fd0 100644 --- a/src/include/86box/vid_8514a.h +++ b/src/include/86box/vid_8514a.h @@ -52,7 +52,7 @@ typedef struct ibm8514_t { int type; int local; int bpp; - int on[2]; + int on; int accel_bpp; uint32_t vram_size; @@ -102,6 +102,8 @@ typedef struct ibm8514_t { uint16_t frgd_mix; uint16_t multifunc_cntl; uint16_t multifunc[16]; + uint16_t clip_right; + uint16_t clip_bottom; int16_t clip_left; int16_t clip_top; uint8_t pix_trans[2]; @@ -112,8 +114,6 @@ typedef struct ibm8514_t { int x3; int y1; int y2; - int sys_cnt; - int sys_cnt2; int temp_cnt; int16_t cx; int16_t cx_back; @@ -127,20 +127,14 @@ typedef struct ibm8514_t { int16_t err; uint32_t src; uint32_t dest; - uint32_t newsrc_blt; - uint32_t newdest_blt; - uint32_t newdest_in; - uint32_t newdest_out; - uint8_t *writemono; - uint8_t *nibbleset; int x_count; int xx_count; int y_count; int input; + int input2; int output; + int output2; - uint16_t cur_x_bit12; - uint16_t cur_y_bit12; int ssv_len; uint8_t ssv_dir; uint8_t ssv_draw; @@ -156,7 +150,6 @@ typedef struct ibm8514_t { } accel; uint16_t test; - int vendor_mode[2]; int h_blankstart; int h_blank_end_val; int hblankstart; @@ -227,6 +220,11 @@ typedef struct ibm8514_t { int ext_pitch; int ext_crt_pitch; int extensions; + int linear; + int _4bpp; + uint32_t vram_amount; + int vram_512k_8514; + PALETTE _8514pal; latch8514_t latch; } ibm8514_t; diff --git a/src/include/86box/vid_ati_mach8.h b/src/include/86box/vid_ati_mach8.h index a25432920..849446def 100644 --- a/src/include/86box/vid_ati_mach8.h +++ b/src/include/86box/vid_ati_mach8.h @@ -41,8 +41,6 @@ typedef struct mach_t { int ramdac_type; int old_mode; - uint32_t memory; - uint16_t config1; uint16_t config2; @@ -73,9 +71,7 @@ typedef struct mach_t { uint8_t bank_r; uint16_t shadow_set; uint16_t shadow_cntl; - int ext_on[2]; - int extended_mode; - int compat_mode; + int override_resolution; struct { uint8_t line_idx; @@ -84,6 +80,12 @@ typedef struct mach_t { uint8_t patt_len; uint8_t pix_trans[2]; uint8_t eeprom_control; + uint8_t alu_bg_fn; + uint8_t alu_fg_fn; + uint16_t clip_left; + uint16_t clip_right; + uint16_t clip_top; + uint16_t clip_bottom; uint16_t dest_x_end; uint16_t dest_x_start; uint16_t dest_y_end; @@ -102,14 +104,14 @@ typedef struct mach_t { uint16_t ge_offset_hi; uint16_t linedraw_opt; uint16_t max_waitstates; - uint8_t patt_data_idx; - uint8_t patt_data[0x18]; uint16_t scan_to_x; uint16_t scratch0; uint16_t scratch1; uint16_t test; uint16_t pattern; uint16_t test2; + int patt_data_idx_reg; + int patt_data_idx; int src_y_dir; int cmd_type; int block_write_mono_pattern_enable; @@ -144,9 +146,8 @@ typedef struct mach_t { int stepx; int stepy; int src_stepx; - uint8_t color_pattern[16]; - uint8_t color_pattern_full[32]; - uint16_t color_pattern_word[8]; + uint8_t mono_pattern_normal[16]; + uint8_t color_pattern[32]; int mono_pattern[8][8]; uint32_t ge_offset; uint32_t crt_offset; diff --git a/src/include/86box/vid_svga.h b/src/include/86box/vid_svga.h index 18b7b672a..c91db4fe8 100644 --- a/src/include/86box/vid_svga.h +++ b/src/include/86box/vid_svga.h @@ -369,6 +369,7 @@ uint32_t svga_mask_addr(uint32_t addr, svga_t *svga); uint32_t svga_mask_changedaddr(uint32_t addr, svga_t *svga); void svga_doblit(int wx, int wy, svga_t *svga); +void svga_poll(void *priv); enum { RAMDAC_6BIT = 0, @@ -396,6 +397,9 @@ extern void att498_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *priv extern uint8_t att498_ramdac_in(uint16_t addr, int rs2, void *priv, svga_t *svga); extern float av9194_getclock(int clock, void *priv); +extern void bt481_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *priv, svga_t *svga); +extern uint8_t bt481_ramdac_in(uint16_t addr, int rs2, void *priv, svga_t *svga); + extern void bt48x_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *priv, svga_t *svga); extern uint8_t bt48x_ramdac_in(uint16_t addr, int rs2, int rs3, void *priv, svga_t *svga); extern void bt48x_recalctimings(void *priv, svga_t *svga); @@ -452,6 +456,7 @@ extern const device_t att491_ramdac_device; extern const device_t att492_ramdac_device; extern const device_t att498_ramdac_device; extern const device_t av9194_device; +extern const device_t bt481_ramdac_device; extern const device_t bt484_ramdac_device; extern const device_t att20c504_ramdac_device; extern const device_t bt485_ramdac_device; diff --git a/src/include/86box/vid_xga.h b/src/include/86box/vid_xga.h index 90a3c69aa..b90b53978 100644 --- a/src/include/86box/vid_xga.h +++ b/src/include/86box/vid_xga.h @@ -31,13 +31,11 @@ typedef struct xga_hwcursor_t { } xga_hwcursor_t; typedef struct xga_t { - mem_mapping_t membios_mapping; mem_mapping_t memio_mapping; mem_mapping_t linear_mapping; mem_mapping_t video_mapping; rom_t bios_rom; - rom_t membios_rom; - rom_t vga_bios_rom; + rom_t bios_rom2; xga_hwcursor_t hwcursor; xga_hwcursor_t hwcursor_latch; PALETTE extpal; @@ -153,6 +151,7 @@ typedef struct xga_t { int a5_test; int type; int bus; + int busy; uint32_t linear_base; uint32_t linear_size; diff --git a/src/video/CMakeLists.txt b/src/video/CMakeLists.txt index 2f7607ad6..bbd329b7e 100644 --- a/src/video/CMakeLists.txt +++ b/src/video/CMakeLists.txt @@ -19,7 +19,7 @@ add_library(vid OBJECT agpgart.c video.c vid_table.c vid_cga.c vid_cga_comp.c vid_sigma.c vid_wy700.c vid_ega.c vid_ega_render.c vid_svga.c vid_8514a.c vid_svga_render.c vid_ddc.c vid_vga.c vid_ati_eeprom.c vid_ati18800.c vid_ati28800.c vid_ati_mach8.c vid_ati_mach64.c vid_ati68875_ramdac.c - vid_ati68860_ramdac.c vid_bt48x_ramdac.c vid_chips_69000.c + vid_ati68860_ramdac.c vid_bt481_ramdac.c vid_bt48x_ramdac.c vid_chips_69000.c vid_av9194.c vid_icd2061.c vid_ics2494.c vid_ics2595.c vid_cl54xx.c vid_et3000.c vid_et4000.c vid_sc1148x_ramdac.c vid_sc1502x_ramdac.c vid_et4000w32.c vid_stg_ramdac.c vid_ht216.c vid_oak_oti.c vid_paradise.c diff --git a/src/video/vid_8514a.c b/src/video/vid_8514a.c index 944a14a88..3e758b952 100644 --- a/src/video/vid_8514a.c +++ b/src/video/vid_8514a.c @@ -106,6 +106,9 @@ ibm8514_log(const char *fmt, ...) dat = (dev->vram[(addr) & (dev->vram_mask)]); \ } +#define READ_HIGH(addr, dat) \ + dat |= (dev->vram[(addr) & (dev->vram_mask)] << 8); + #define MIX(mixmode, dest_dat, src_dat) \ { \ switch ((mixmode) ? (dev->accel.frgd_mix & 0x1f) : (dev->accel.bkgd_mix & 0x1f)) { \ @@ -191,7 +194,10 @@ ibm8514_log(const char *fmt, ...) dest_dat = MAX(0, (src_dat - dest_dat)); \ break; \ case 0x1b: \ - dest_dat = MIN(~0, (dest_dat + src_dat)); \ + if (dev->bpp) \ + dest_dat = MIN(0xffff, (dest_dat + src_dat)); \ + else \ + dest_dat = MIN(0xff, (dest_dat + src_dat)); \ break; \ case 0x1c: \ dest_dat = MAX(0, (dest_dat - src_dat)) / 2; \ @@ -203,7 +209,10 @@ ibm8514_log(const char *fmt, ...) dest_dat = MAX(0, (src_dat - dest_dat)) / 2; \ break; \ case 0x1f: \ - dest_dat = (~0 < (src_dat + dest_dat)) ? ~0 : ((src_dat + dest_dat) >> 1); \ + if (dev->bpp) \ + dest_dat = (0xffff < (src_dat + dest_dat)) ? 0xffff : ((src_dat + dest_dat) / 2); \ + else \ + dest_dat = (0xff < (src_dat + dest_dat)) ? 0xff : ((src_dat + dest_dat) / 2); \ break; \ } \ } @@ -259,10 +268,9 @@ ibm8514_accel_out_pixtrans(svga_t *svga, UNUSED(uint16_t port), uint32_t val, in int frgd_mix = (dev->accel.frgd_mix >> 5) & 3; int bkgd_mix = (dev->accel.bkgd_mix >> 5) & 3; int cmd = dev->accel.cmd >> 13; - int and3 = dev->accel.cur_x & 3; if (dev->accel.cmd & 0x100) { - if (len != 1) { + if (len == 2) { /*Bus size*/ if (dev->accel.cmd & 0x200) /*16-bit*/ pixcnt = 16; @@ -271,200 +279,49 @@ ibm8514_accel_out_pixtrans(svga_t *svga, UNUSED(uint16_t port), uint32_t val, in /*Pixel transfer data mode, can't be the same as Foreground/Background CPU data*/ if (pixcntl == 2) { - if ((frgd_mix == 2) || (bkgd_mix == 2)) { + if ((frgd_mix == 2) || (bkgd_mix == 2)) pixelxfer = val; - } else { - if (dev->accel.cmd & 2) { + else { + if (dev->accel.cmd & 0x02) { if (pixcnt == 16) { if ((cmd >= 2) && (dev->accel.cmd & 0x1000)) val = (val >> 8) | (val << 8); } - if (and3 == 3) { - if (dev->accel.cmd & 0x1000) - goto regular_nibble; - if (val & 0x02) - nibble |= 0x10; - if (val & 0x04) - nibble |= 0x08; - if (val & 0x08) - nibble |= 0x04; - if (val & 0x10) - nibble |= 0x02; - if (val & 0x200) - nibble |= 0x01; - if (val & 0x400) - nibble |= 0x80; - if (val & 0x800) - nibble |= 0x40; - if (val & 0x1000) - nibble |= 0x20; - } else if (and3 == 2) { - if (dev->accel.cmd & 0x1000) - goto regular_nibble; - if (val & 0x02) - nibble |= 0x20; - if (val & 0x04) - nibble |= 0x10; - if (val & 0x08) - nibble |= 0x08; - if (val & 0x10) - nibble |= 0x04; - if (val & 0x200) - nibble |= 0x02; - if (val & 0x400) - nibble |= 0x01; - if (val & 0x800) - nibble |= 0x80; - if (val & 0x1000) - nibble |= 0x40; - } else if (and3 == 1) { - if (dev->accel.cmd & 0x1000) - goto regular_nibble; - if (val & 0x02) - nibble |= 0x40; - if (val & 0x04) - nibble |= 0x20; - if (val & 0x08) - nibble |= 0x10; - if (val & 0x10) - nibble |= 0x08; - if (val & 0x200) - nibble |= 0x04; - if (val & 0x400) - nibble |= 0x02; - if (val & 0x800) - nibble |= 0x01; - if (val & 0x1000) - nibble |= 0x80; - } else { -regular_nibble: - if (val & 0x02) - nibble |= 0x80; - if (val & 0x04) - nibble |= 0x40; - if (val & 0x08) - nibble |= 0x20; - if (val & 0x10) - nibble |= 0x10; - if (val & 0x200) - nibble |= 0x08; - if (val & 0x400) - nibble |= 0x04; - if (val & 0x800) - nibble |= 0x02; - if (val & 0x1000) - nibble |= 0x01; - } - - if ((and3 == 0) || (dev->accel.cmd & 0x1000) || ((dev->accel.cmd & 8) && ibm8514_cpu_src(svga))) { - if ((dev->accel.cmd & 8) && ibm8514_cpu_src(svga)) { + if ((cmd <= 2) || (cmd == 4)) { + if ((dev->accel.cmd & 0x08) && (cmd >= 2)) monoxfer = val; - } else - monoxfer = nibble; - ibm8514_accel_start(pixcnt, 1, monoxfer, pixelxfer, svga, len); - if (dev->accel.nibbleset != NULL) { - free(dev->accel.nibbleset); - dev->accel.nibbleset = NULL; - } - if (dev->accel.writemono != NULL) { - free(dev->accel.writemono); - dev->accel.writemono = NULL; - } - return; - } - - dev->accel.writemono[dev->accel.x_count] = nibble; - if (val & 0x1c00) { - if (and3 == 1) { + else { + if (val & 0x02) + nibble |= 0x80; + if (val & 0x04) + nibble |= 0x40; + if (val & 0x08) + nibble |= 0x20; + if (val & 0x10) + nibble |= 0x10; + if (val & 0x200) + nibble |= 0x08; + if (val & 0x400) + nibble |= 0x04; + if (val & 0x800) + nibble |= 0x02; if (val & 0x1000) - dev->accel.nibbleset[dev->accel.x_count] = 0x80; - else - dev->accel.nibbleset[dev->accel.x_count] = 0; - } else if (and3 == 2) { - if (val & 0x1000) { - if (val & 0x800) - dev->accel.nibbleset[dev->accel.x_count] = 0xc0; - else - dev->accel.nibbleset[dev->accel.x_count] = 0x40; - } else if (val & 0x800) { - if (val & 0x1000) - dev->accel.nibbleset[dev->accel.x_count] = 0xc0; - else - dev->accel.nibbleset[dev->accel.x_count] = 0x80; - } else - dev->accel.nibbleset[dev->accel.x_count] = 0; - } else if (and3 == 3) { - if (val & 0x1000) { - if (val & 0x800) { - if (val & 0x400) - dev->accel.nibbleset[dev->accel.x_count] = 0xe0; - else - dev->accel.nibbleset[dev->accel.x_count] = 0x60; - } else if (val & 0x400) { - if (val & 0x800) - dev->accel.nibbleset[dev->accel.x_count] = 0xe0; - else - dev->accel.nibbleset[dev->accel.x_count] = 0xa0; - } else - dev->accel.nibbleset[dev->accel.x_count] = 0x20; - } else if (val & 0x800) { - if (val & 0x400) { - if (val & 0x1000) - dev->accel.nibbleset[dev->accel.x_count] = 0xe0; - else - dev->accel.nibbleset[dev->accel.x_count] = 0xc0; - } else if (val & 0x1000) { - if (val & 0x400) - dev->accel.nibbleset[dev->accel.x_count] = 0xe0; - else - dev->accel.nibbleset[dev->accel.x_count] = 0x60; - } else - dev->accel.nibbleset[dev->accel.x_count] = 0x40; - } else if (val & 0x400) { - if (val & 0x800) { - if (val & 0x1000) - dev->accel.nibbleset[dev->accel.x_count] = 0xe0; - else - dev->accel.nibbleset[dev->accel.x_count] = 0xc0; - } else if (val & 0x1000) { - if (val & 0x800) - dev->accel.nibbleset[dev->accel.x_count] = 0xe0; - else - dev->accel.nibbleset[dev->accel.x_count] = 0xa0; - } else - dev->accel.nibbleset[dev->accel.x_count] = 0x80; - } else - dev->accel.nibbleset[dev->accel.x_count] = 0; + nibble |= 0x01; + + monoxfer = nibble; } } else - dev->accel.nibbleset[dev->accel.x_count] = 0; - - dev->accel.x_count++; - if (dev->accel.x_count == dev->accel.sys_cnt) { - for (int i = 0; i < dev->accel.x_count; i++) { - dev->accel.writemono[i] &= ~dev->accel.nibbleset[i]; - dev->accel.writemono[i] |= dev->accel.nibbleset[i + 1]; - ibm8514_accel_start(pixcnt, 1, dev->accel.writemono[i], pixelxfer, svga, len); - } - - dev->accel.x_count = 0; - if (dev->accel.nibbleset != NULL) { - free(dev->accel.nibbleset); - dev->accel.nibbleset = NULL; - } - if (dev->accel.writemono != NULL) { - free(dev->accel.writemono); - dev->accel.writemono = NULL; - } - } - return; - } - monoxfer = val; + monoxfer = val; + } else + monoxfer = val; } - } else { + } else pixelxfer = val; - } - ibm8514_accel_start(pixcnt, 1, monoxfer, pixelxfer, svga, len); + + if (dev->accel.input) + ibm8514_accel_start(pixcnt >> 1, 1, monoxfer & 0xff, pixelxfer & 0xff, svga, len); + else + ibm8514_accel_start(pixcnt, 1, monoxfer & 0xffff, pixelxfer & 0xffff, svga, len); } } } @@ -480,115 +337,61 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) switch (port) { case 0x82e8: case 0xc2e8: - if (len == 1) - dev->accel.cur_y = (dev->accel.cur_y & 0x700) | val; - else + if (len == 2) dev->accel.cur_y = val & 0x7ff; break; - case 0x82e9: - case 0xc2e9: - if (len == 1) - dev->accel.cur_y = (dev->accel.cur_y & 0xff) | ((val & 0x07) << 8); - break; case 0x86e8: case 0xc6e8: - if (len == 1) - dev->accel.cur_x = (dev->accel.cur_x & 0x700) | val; - else + if (len == 2) dev->accel.cur_x = val & 0x7ff; break; - case 0x86e9: - case 0xc6e9: - if (len == 1) { - dev->accel.cur_x = (dev->accel.cur_x & 0xff) | ((val & 0x07) << 8); - } - break; case 0x8ae8: case 0xcae8: - if (len == 1) - dev->accel.desty_axstp = (dev->accel.desty_axstp & 0x3f00) | val; - else { - dev->accel.desty = val & 0x07ff; + if (len == 2) { + dev->accel.desty = val & 0x7ff; dev->accel.desty_axstp = val & 0x3fff; if (val & 0x2000) dev->accel.desty_axstp |= ~0x1fff; } break; - case 0x8ae9: - case 0xcae9: - if (len == 1) { - dev->accel.desty_axstp = (dev->accel.desty_axstp & 0xff) | ((val & 0x3f) << 8); - if (val & 0x20) - dev->accel.desty_axstp |= ~0x1fff; - } - break; case 0x8ee8: case 0xcee8: - if (len == 1) - dev->accel.destx_distp = (dev->accel.destx_distp & 0x3f00) | val; - else { - dev->accel.destx = val & 0x07ff; + if (len == 2) { + dev->accel.destx = val & 0x7ff; dev->accel.destx_distp = val & 0x3fff; if (val & 0x2000) dev->accel.destx_distp |= ~0x1fff; } break; - case 0x8ee9: - case 0xcee9: - if (len == 1) { - dev->accel.destx_distp = (dev->accel.destx_distp & 0xff) | ((val & 0x3f) << 8); - if (val & 0x20) - dev->accel.destx_distp |= ~0x1fff; - } - break; case 0x92e8: - if (len != 1) + if (len == 2) dev->test = val; fallthrough; case 0xd2e8: - if (len == 1) - dev->accel.err_term = (dev->accel.err_term & 0x3f00) | val; - else { + if (len == 2) { dev->accel.err_term = val & 0x3fff; if (val & 0x2000) dev->accel.err_term |= ~0x1fff; } break; - case 0x92e9: - case 0xd2e9: - if (len == 1) { - dev->accel.err_term = (dev->accel.err_term & 0xff) | ((val & 0x3f) << 8); - if (val & 0x20) - dev->accel.err_term |= ~0x1fff; - } - break; case 0x96e8: case 0xd6e8: - if (len == 1) - dev->accel.maj_axis_pcnt = (dev->accel.maj_axis_pcnt & 0x700) | val; - else { + if (len == 2) { dev->accel.maj_axis_pcnt = val & 0x7ff; dev->accel.maj_axis_pcnt_no_limit = val; } break; - case 0x96e9: - case 0xd6e9: - if (len == 1) - dev->accel.maj_axis_pcnt = (dev->accel.maj_axis_pcnt & 0xff) | ((val & 0x07) << 8); - break; case 0x9ae8: case 0xdae8: dev->accel.ssv_state = 0; - if (len == 1) - dev->accel.cmd = (dev->accel.cmd & 0xff00) | val; - else { + if (len == 2) { dev->data_available = 0; dev->data_available2 = 0; dev->accel.cmd = val; @@ -596,20 +399,7 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) if (dev->accel.cmd & 0x100) dev->accel.cmd_back = 0; } - ibm8514_log("8514/A CMD=%04x.\n", dev->accel.cmd); - ibm8514_accel_start(-1, 0, -1, 0, svga, len); - } - break; - case 0x9ae9: - case 0xdae9: - if (len == 1) { - dev->data_available = 0; - dev->data_available2 = 0; - dev->accel.cmd = (dev->accel.cmd & 0xff) | (val << 8); - if (port == 0xdae9) { - if (dev->accel.cmd & 0x100) - dev->accel.cmd_back = 0; - } + ibm8514_log("8514/A CMD=%04x, back=%d.\n", dev->accel.cmd, dev->accel.cmd_back); ibm8514_accel_start(-1, 0, -1, 0, svga, len); } break; @@ -617,35 +407,14 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) case 0x9ee8: case 0xdee8: dev->accel.ssv_state = 1; - if (len == 1) - dev->accel.short_stroke = (dev->accel.short_stroke & 0xff00) | val; - else { + if (len == 2) { dev->accel.short_stroke = val; - dev->accel.cx = dev->accel.cur_x; - dev->accel.cy = dev->accel.cur_y; - if (dev->accel.cur_x >= 0x600) - dev->accel.cx |= ~0x5ff; - if (dev->accel.cur_y >= 0x600) - dev->accel.cy |= ~0x5ff; - if (dev->accel.cmd & 0x1000) { - ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke & 0xff, len); - ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke >> 8, len); - } else { - ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke >> 8, len); - ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke & 0xff, len); - } - } - break; - case 0x9ee9: - case 0xdee9: - dev->accel.ssv_state = 1; - if (len == 1) { - dev->accel.short_stroke = (dev->accel.short_stroke & 0xff) | (val << 8); - dev->accel.cx = dev->accel.cur_x; - dev->accel.cy = dev->accel.cur_y; + dev->accel.cx = dev->accel.cur_x; if (dev->accel.cur_x >= 0x600) dev->accel.cx |= ~0x5ff; + + dev->accel.cy = dev->accel.cur_y; if (dev->accel.cur_y >= 0x600) dev->accel.cy |= ~0x5ff; @@ -662,93 +431,56 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) case 0xa2e8: case 0xe2e8: if (port == 0xe2e8) { - if (dev->accel.cmd_back) { - if (len == 1) - dev->accel.bkgd_color = (dev->accel.bkgd_color & 0x00ff) | val; - else + if (len == 2) { + if (dev->accel.cmd_back) dev->accel.bkgd_color = val; - } else { - if (ibm8514_cpu_dest(svga)) - break; - ibm8514_accel_out_pixtrans(svga, port, val, len); + else { + if (ibm8514_cpu_dest(svga)) + break; + ibm8514_accel_out_pixtrans(svga, port, val, len); + } } } else { - if (len == 1) - dev->accel.bkgd_color = (dev->accel.bkgd_color & 0x00ff) | val; - else + if (len == 2) dev->accel.bkgd_color = val; } break; - case 0xa2e9: - case 0xe2e9: - if (len == 1) - dev->accel.bkgd_color = (dev->accel.bkgd_color & 0xff00) | (val << 8); - break; case 0xa6e8: case 0xe6e8: if (port == 0xe6e8) { - if (dev->accel.cmd_back) { - if (len == 1) - dev->accel.frgd_color = (dev->accel.frgd_color & 0x00ff) | val; - else + if (len == 2) { + if (dev->accel.cmd_back) dev->accel.frgd_color = val; - } else { - if (ibm8514_cpu_dest(svga)) - break; - ibm8514_accel_out_pixtrans(svga, port, val, len); + else { + if (ibm8514_cpu_dest(svga)) + break; + ibm8514_accel_out_pixtrans(svga, port, val, len); + } } } else { - if (len == 1) - dev->accel.frgd_color = (dev->accel.frgd_color & 0x00ff) | val; - else + if (len == 2) dev->accel.frgd_color = val; } break; - case 0xa6e9: - case 0xe6e9: - if (len == 1) - dev->accel.frgd_color = (dev->accel.frgd_color & 0xff00) | (val << 8); - break; case 0xaae8: case 0xeae8: - if (len == 1) - dev->accel.wrt_mask = (dev->accel.wrt_mask & 0x00ff) | val; - else + if (len == 2) dev->accel.wrt_mask = val; break; - case 0xaae9: - case 0xeae9: - if (len == 1) - dev->accel.wrt_mask = (dev->accel.wrt_mask & 0xff00) | (val << 8); - break; case 0xaee8: case 0xeee8: - if (len == 1) - dev->accel.rd_mask = (dev->accel.rd_mask & 0x00ff) | val; - else + if (len == 2) dev->accel.rd_mask = val; break; - case 0xaee9: - case 0xeee9: - if (len == 1) - dev->accel.rd_mask = (dev->accel.rd_mask & 0xff00) | (val << 8); - break; case 0xb2e8: case 0xf2e8: - if (len == 1) - dev->accel.color_cmp = (dev->accel.color_cmp & 0x00ff) | val; - else + if (len == 2) dev->accel.color_cmp = val; break; - case 0xb2e9: - case 0xf2e9: - if (len == 1) - dev->accel.color_cmp = (dev->accel.color_cmp & 0xff00) | (val << 8); - break; case 0xb6e8: case 0xf6e8: @@ -762,45 +494,10 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) case 0xbee8: case 0xfee8: - if (len == 1) - dev->accel.multifunc_cntl = (dev->accel.multifunc_cntl & 0xff00) | val; - else { + if (len == 2) { dev->accel.multifunc_cntl = val; dev->accel.multifunc[dev->accel.multifunc_cntl >> 12] = dev->accel.multifunc_cntl & 0xfff; - if ((dev->accel.multifunc_cntl >> 12) == 1) - dev->accel.clip_top = val & 0x7ff; - - if ((dev->accel.multifunc_cntl >> 12) == 2) - dev->accel.clip_left = val & 0x7ff; - - if ((dev->accel.multifunc_cntl >> 12) == 3) - dev->accel.multifunc[3] = val & 0x7ff; - - if ((dev->accel.multifunc_cntl >> 12) == 4) - dev->accel.multifunc[4] = val & 0x7ff; - - ibm8514_log("CLIPBOTTOM=%d, CLIPRIGHT=%d, bpp=%d, pitch=%d.\n", dev->accel.multifunc[3], dev->accel.multifunc[4], dev->accel_bpp, dev->pitch); - if (port == 0xfee8) - dev->accel.cmd_back = 1; - else - dev->accel.cmd_back = 0; - } - break; - case 0xbee9: - case 0xfee9: - if (len == 1) { - dev->accel.multifunc_cntl = (dev->accel.multifunc_cntl & 0xff) | (val << 8); - dev->accel.multifunc[dev->accel.multifunc_cntl >> 12] = dev->accel.multifunc_cntl & 0xfff; - if ((dev->accel.multifunc_cntl >> 12) == 1) - dev->accel.clip_top = dev->accel.multifunc_cntl & 0x7ff; - - if ((dev->accel.multifunc_cntl >> 12) == 2) - dev->accel.clip_left = dev->accel.multifunc_cntl & 0x7ff; - - if (port == 0xfee9) - dev->accel.cmd_back = 1; - else - dev->accel.cmd_back = 0; + dev->accel.cmd_back = !!(port == 0xfee8); } break; @@ -902,10 +599,8 @@ ibm8514_accel_out(uint16_t port, uint32_t val, svga_t *svga, int len) case 0x6e8: /*In preparation to switch from VGA to 8514/A mode*/ - if (!dev->on[0] || !dev->on[1]) { - dev->hdisped = val; - dev->hdisp = (dev->hdisped + 1) << 3; - } + dev->hdisped = val; + dev->hdisp = (dev->hdisped + 1) << 3; ibm8514_log("[%04X:%08X]: IBM 8514/A: (0x%04x): hdisp=0x%02x.\n", CS, cpu_state.pc, port, val); svga_recalctimings(svga); break; @@ -938,11 +633,9 @@ ibm8514_accel_out(uint16_t port, uint32_t val, svga_t *svga, int len) case 0x16e8: case 0x16e9: /*In preparation to switch from VGA to 8514/A mode*/ - if (!dev->on[0] || !dev->on[1]) { - WRITE8(port, dev->v_disp, val); - dev->v_disp &= 0x1fff; - dev->vdisp = (dev->v_disp + 1) >> 1; - } + WRITE8(port, dev->v_disp, val); + dev->v_disp &= 0x1fff; + dev->vdisp = (dev->v_disp + 1) >> 1; ibm8514_log("IBM 8514/A: V_DISP write 16E8 = %d\n", dev->v_disp); ibm8514_log("IBM 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val); svga_recalctimings(svga); @@ -1000,12 +693,10 @@ ibm8514_accel_out(uint16_t port, uint32_t val, svga_t *svga, int len) break; case 0x4ae8: - case 0x4ae9: WRITE8(port, dev->accel.advfunc_cntl, val); - dev->on[0] = dev->accel.advfunc_cntl & 0x01; - vga_on = !dev->on[0]; - dev->vendor_mode[0] = 0; - ibm8514_log("[%04X:%08X]: IBM 8514/A: (0x%04x): ON=%d, shadow crt=%x, hdisp=%d, vdisp=%d.\n", CS, cpu_state.pc, port, dev->on[port & 1], dev->accel.advfunc_cntl & 0x04, dev->hdisp, dev->vdisp); + dev->on = dev->accel.advfunc_cntl & 0x01; + vga_on = !dev->on; + ibm8514_log("[%04X:%08X]: IBM 8514/A: (0x%04x): ON=%d, shadow crt=%x, hdisp=%d, vdisp=%d.\n", CS, cpu_state.pc, port, dev->on, dev->accel.advfunc_cntl & 0x04, dev->hdisp, dev->vdisp); ibm8514_log("IBM mode set %s resolution.\n", (dev->accel.advfunc_cntl & 0x04) ? "2: 1024x768" : "1: 640x480"); svga_recalctimings(svga); break; @@ -1042,29 +733,29 @@ ibm8514_accel_in_fifo(svga_t *svga, uint16_t port, int len) switch (port) { case 0x82e8: case 0xc2e8: - if (len != 1) + if (len == 2) temp = dev->accel.cur_y; break; case 0x86e8: case 0xc6e8: - if (len != 1) + if (len == 2) temp = dev->accel.cur_x; break; case 0x92e8: - if (len != 1) + if (len == 2) temp = dev->test; break; case 0x96e8: - if (len != 1) + if (len == 2) temp = dev->accel.maj_axis_pcnt; break; case 0x9ae8: case 0xdae8: - if (len != 1) { + if (len == 2) { if (dev->force_busy) temp |= 0x200; /*Hardware busy*/ dev->force_busy = 0; @@ -1090,14 +781,19 @@ ibm8514_accel_in_fifo(svga_t *svga, uint16_t port, int len) case 0xe2e8: case 0xe6e8: if (ibm8514_cpu_dest(svga)) { - if (len != 1) { + if (len == 2) { cmd = (dev->accel.cmd >> 13); READ_PIXTRANS_WORD(dev->accel.cx, 0); - if (dev->accel.input && !dev->accel.odd_in && !dev->accel.sx) { - temp &= ~0xff00; - temp |= (dev->vram[(dev->accel.newdest_in + dev->accel.cur_x) & dev->vram_mask] << 8); - } - ibm8514_accel_out_pixtrans(svga, port, temp, len); + if (dev->accel.input) { + ibm8514_accel_out_pixtrans(svga, port, temp & 0xff, len); + if (dev->accel.odd_in) { /*WORDs on odd destination scan lengths.*/ + dev->accel.odd_in = 0; + temp &= ~0xff00; + READ_HIGH(dev->accel.dest + dev->accel.cx, temp); + } + ibm8514_accel_out_pixtrans(svga, port, (temp >> 8) & 0xff, len); + } else + ibm8514_accel_out_pixtrans(svga, port, temp, len); } } break; @@ -1113,9 +809,6 @@ ibm8514_accel_in(uint16_t port, svga_t *svga) { ibm8514_t *dev = (ibm8514_t *) svga->dev8514; uint8_t temp = 0; - uint16_t clip_b_ibm = dev->accel.multifunc[3]; - uint16_t clip_r_ibm = dev->accel.multifunc[4]; - int cmd = (dev->accel.cmd >> 13); switch (port) { case 0x2e8: @@ -1150,19 +843,8 @@ ibm8514_accel_in(uint16_t port, svga_t *svga) if (dev->vc == dev->v_syncstart) dev->subsys_stat |= 1; - if (cmd == 6) { - if (((dev->accel.dx) >= dev->accel.clip_left) && ((dev->accel.dx) <= clip_r_ibm) && ((dev->accel.dy) >= dev->accel.clip_top) && ((dev->accel.dy) <= clip_b_ibm)) - temp |= 2; - } else { - if (((dev->accel.cx) >= dev->accel.clip_left) && ((dev->accel.dx) <= clip_r_ibm) && ((dev->accel.cy) >= dev->accel.clip_top) && ((dev->accel.cy) <= clip_b_ibm)) - temp |= 2; - } - - if (!dev->force_busy) - temp |= 8; - if (port & 1) - temp = 0x80; + temp = dev->vram_512k_8514 ? 0x00 : 0x80; else { temp |= (dev->subsys_stat | 0x80); temp |= 0x20; @@ -1232,8 +914,10 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat uint16_t old_dest_dat; int frgd_mix; int bkgd_mix; - uint16_t clip_b = dev->accel.multifunc[3]; - uint16_t clip_r = dev->accel.multifunc[4]; + int16_t clip_t = dev->accel.multifunc[1] & 0x7ff; + int16_t clip_l = dev->accel.multifunc[2] & 0x7ff; + uint16_t clip_b = dev->accel.multifunc[3] & 0x7ff; + uint16_t clip_r = dev->accel.multifunc[4] & 0x7ff; int pixcntl = (dev->accel.multifunc[0x0a] >> 6) & 3; uint16_t mix_mask = dev->bpp ? 0x8000 : 0x80; uint16_t compare = dev->accel.color_cmp; @@ -1265,11 +949,11 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat bkgd_mix = (dev->accel.bkgd_mix >> 5) & 3; if (cpu_input) { - if ((dev->accel.cmd & 2) || (pixcntl == 2)) { + if ((dev->accel.cmd & 0x02) || (pixcntl == 2)) { if ((frgd_mix == 2) || (bkgd_mix == 2)) count >>= 3; else if (pixcntl == 2) { - if (dev->accel.cmd & 2) + if (dev->accel.cmd & 0x02) count >>= 1; else count >>= 3; @@ -1369,9 +1053,12 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat if (dev->accel.ssv_state == 0) break; - if (dev->accel.cmd & 8) { + if (dev->accel.cmd & 0x08) { while (count-- && dev->accel.ssv_len >= 0) { - if (dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b) { + if ((dev->accel.cx >= clip_l) && + (dev->accel.cx <= clip_r) && + (dev->accel.cy >= clip_t) && + (dev->accel.cy <= clip_b)) { switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { case 0: src_dat = bkgd_color; @@ -1389,17 +1076,24 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat default: break; } + READ((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + if ((compare_mode == 0) || + ((compare_mode == 0x10) && (dest_dat >= compare)) || + ((compare_mode == 0x18) && (dest_dat < compare)) || + ((compare_mode == 0x20) && (dest_dat != compare)) || + ((compare_mode == 0x28) && (dest_dat == compare)) || + ((compare_mode == 0x30) && (dest_dat <= compare)) || + ((compare_mode == 0x38) && (dest_dat > compare))) { old_dest_dat = dest_dat; MIX(mix_dat & mix_mask, dest_dat, src_dat); dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); if (dev->accel.ssv_draw) { - if ((dev->accel.cmd & 4) && dev->accel.ssv_len) { + if ((dev->accel.cmd & 0x04) && dev->accel.ssv_len) { WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { + } else if (!(dev->accel.cmd & 0x04)) { WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); } } @@ -1454,8 +1148,10 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat } } else { while (count-- && (dev->accel.ssv_len >= 0)) { - if ((dev->accel.cx >= dev->accel.clip_left) && (dev->accel.cx <= clip_r) && - (dev->accel.cy >= dev->accel.clip_top) && (dev->accel.cy <= clip_b)) { + if ((dev->accel.cx >= clip_l) && + (dev->accel.cx <= clip_r) && + (dev->accel.cy >= clip_t) && + (dev->accel.cy <= clip_b)) { switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { case 0: src_dat = bkgd_color; @@ -1476,15 +1172,21 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat READ((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + if ((compare_mode == 0) || + ((compare_mode == 0x10) && (dest_dat >= compare)) || + ((compare_mode == 0x18) && (dest_dat < compare)) || + ((compare_mode == 0x20) && (dest_dat != compare)) || + ((compare_mode == 0x28) && (dest_dat == compare)) || + ((compare_mode == 0x30) && (dest_dat <= compare)) || + ((compare_mode == 0x38) && (dest_dat > compare))) { old_dest_dat = dest_dat; MIX(mix_dat & mix_mask, dest_dat, src_dat); dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); if (dev->accel.ssv_draw) { - if ((dev->accel.cmd & 4) && dev->accel.ssv_len) { + if ((dev->accel.cmd & 0x04) && dev->accel.ssv_len) { WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { + } else if (!(dev->accel.cmd & 0x04)) { WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); } } @@ -1576,47 +1278,25 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat case 1: /*Draw line*/ if (!cpu_input) { - dev->accel.xx_count = 0; - dev->accel.cx = dev->accel.cur_x; - dev->accel.cy = dev->accel.cur_y; + dev->accel.output = 0; + dev->accel.x_count = 0; + dev->accel.cx = dev->accel.cur_x; if (dev->accel.cur_x >= 0x600) dev->accel.cx |= ~0x5ff; + dev->accel.cy = dev->accel.cur_y; if (dev->accel.cur_y >= 0x600) dev->accel.cy |= ~0x5ff; dev->accel.sy = dev->accel.maj_axis_pcnt; - ibm8514_log("Line Draw 8514/A, frgdmix=%d, bkgdmix=%d, c(%d,%d), pixcntl=%d, sy=%d, polyfill=%x, selfrmix=%02x, selbkmix=%02x, bkgdcol=%02x, frgdcol=%02x, clipt=%d, clipb=%d.\n", frgd_mix, bkgd_mix, dev->accel.cx, dev->accel.cy, pixcntl, dev->accel.sy, dev->accel.multifunc[0x0a] & 6, dev->accel.frgd_mix & 0x1f, dev->accel.bkgd_mix & 0x1f, bkgd_color, frgd_color, dev->accel.clip_top, clip_b); + ibm8514_log("Line Draw 8514/A CMD=%04x, frgdmix=%d, bkgdmix=%d, c(%d,%d), pixcntl=%d, sy=%d, polyfill=%x, selfrmix=%02x, selbkmix=%02x, bkgdcol=%02x, frgdcol=%02x, clipt=%d, clipb=%d.\n", dev->accel.cmd, frgd_mix, bkgd_mix, dev->accel.cx, dev->accel.cy, pixcntl, dev->accel.sy, dev->accel.multifunc[0x0a] & 6, dev->accel.frgd_mix & 0x1f, dev->accel.bkgd_mix & 0x1f, bkgd_color, frgd_color, dev->accel.clip_top, clip_b); if (ibm8514_cpu_src(svga)) { - if (dev->accel.cmd & 2) { - if (dev->accel.cmd & 8) { - if (and3 == 1) { - dev->accel.sy += 4; - if (dev->accel.cmd & 0x20) - dev->accel.cx += 4; - else - dev->accel.cx -= 4; - } else if (and3 == 2) { - dev->accel.sy += 5; - if (dev->accel.cmd & 0x20) - dev->accel.cx += 5; - else - dev->accel.cx -= 5; - } else if (and3 == 3) { - dev->accel.sy += 6; - if (dev->accel.cmd & 0x20) - dev->accel.cx += 6; - else - dev->accel.cx -= 6; - } else { - dev->accel.sy += 3; - if (dev->accel.cmd & 0x20) - dev->accel.cx += 3; - else - dev->accel.cx -= 3; - } + if (dev->accel.cmd & 0x02) { + if (!(dev->accel.cmd & 0x1000)) { + if (dev->accel.cmd & 0x08) + dev->accel.output = 1; } } dev->data_available = 0; @@ -1629,12 +1309,18 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat } } - if (dev->accel.cmd & 8) { /*Vector Line*/ - if (ibm8514_cpu_dest(svga) && cpu_input && (dev->accel.cmd & 2)) + if (dev->accel.cmd & 0x08) { /*Vector Line*/ + if (ibm8514_cpu_dest(svga) && cpu_input && (dev->accel.cmd & 0x02)) count >>= 1; - dev->accel.xx_count++; + + if (dev->accel.cmd & 0x02) + ibm8514_log("Line Draw Vector Single pixtrans=%04x, count=%d.\n", mix_dat, count); + while (count-- && (dev->accel.sy >= 0)) { - if (dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b) { + if ((dev->accel.cx >= clip_l) && + (dev->accel.cx <= clip_r) && + (dev->accel.cy >= clip_t) && + (dev->accel.cy <= clip_b)) { if (ibm8514_cpu_dest(svga) && (pixcntl == 0)) { mix_dat = mix_mask; /* Mix data = forced to foreground register. */ } else if (ibm8514_cpu_dest(svga) && (pixcntl == 3)) { @@ -1649,94 +1335,72 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat if (pixcntl == 3) src_dat = ((src_dat & rd_mask) == rd_mask); } else { - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: - src_dat = bkgd_color; - break; - case 1: - src_dat = frgd_color; - break; - case 2: - src_dat = cpu_dat; - break; - case 3: - src_dat = 0; - break; + if (dev->accel.output) { + switch ((mix_dat & 0x01) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = cpu_dat; + break; + case 3: + src_dat = 0; + break; - default: - break; + default: + break; + } + } else { + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = cpu_dat; + break; + case 3: + src_dat = 0; + break; + + default: + break; + } } } READ((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + if ((compare_mode == 0) || + ((compare_mode == 0x10) && (dest_dat >= compare)) || + ((compare_mode == 0x18) && (dest_dat < compare)) || + ((compare_mode == 0x20) && (dest_dat != compare)) || + ((compare_mode == 0x28) && (dest_dat == compare)) || + ((compare_mode == 0x30) && (dest_dat <= compare)) || + ((compare_mode == 0x38) && (dest_dat > compare))) { old_dest_dat = dest_dat; - MIX(mix_dat & mix_mask, dest_dat, src_dat); + if (dev->accel.output) { + MIX(mix_dat & 0x01, dest_dat, src_dat); + } else { + MIX(mix_dat & mix_mask, dest_dat, src_dat); + } dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - if ((dev->accel.cmd & 2) && ibm8514_cpu_src(svga)) { - if (and3 == 1) { - if (dev->accel.xx_count >= 2) { - if ((dev->accel.cmd & 4) && dev->accel.sy) { - WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - } - } - } else if (and3 == 2) { - if (dev->accel.xx_count == 2) { - if (count <= 2) { - if ((dev->accel.cmd & 4) && dev->accel.sy) { - WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - } - } - } else if (dev->accel.xx_count >= 3) { - if ((dev->accel.cmd & 4) && dev->accel.sy) { - WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - } - } - } else if (and3 == 3) { - if (dev->accel.xx_count == 2) { - if (count <= 1) { - if ((dev->accel.cmd & 4) && dev->accel.sy) { - WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - } - } - } else if (dev->accel.xx_count >= 3) { - if ((dev->accel.cmd & 4) && dev->accel.sy) { - WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - } - } - } else { - if (dev->accel.xx_count == 1) { - if (!count) { - if ((dev->accel.cmd & 4) && dev->accel.sy) { - WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - } - } - } else if (dev->accel.xx_count >= 2) { - if ((dev->accel.cmd & 4) && dev->accel.sy) { - WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - } - } + if ((dev->accel.cmd & 0x02) && ibm8514_cpu_src(svga)) { + if ((dev->accel.cmd & 0x04) && dev->accel.sy) { + WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); + } else if (!(dev->accel.cmd & 0x04)) { + WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); } } else { if (ibm8514_cpu_src(svga) || !cpu_input) { - if ((dev->accel.cmd & 4) && dev->accel.sy) { + if ((dev->accel.cmd & 0x04) && dev->accel.sy) { WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { + } else if (!(dev->accel.cmd & 0x04)) { WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); } } @@ -1744,17 +1408,21 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat } } - mix_dat <<= 1; - mix_dat |= 1; + if (!dev->accel.sy) + break; + + if (dev->accel.output) + mix_dat >>= 1; + else { + mix_dat <<= 1; + mix_dat |= 1; + } + if (dev->bpp) cpu_dat >>= 16; else cpu_dat >>= 8; - if (dev->accel.sy == 0) { - break; - } - switch (dev->accel.cmd & 0xe0) { case 0x00: dev->accel.cx++; @@ -1793,19 +1461,24 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat } dev->accel.cur_x = dev->accel.cx; dev->accel.cur_y = dev->accel.cy; - } else { /*Bresenham*/ + dev->accel.x_count = 0; + dev->accel.output = 0; + } else { /*Bresenham Line*/ if (pixcntl == 1) { dev->accel.temp_cnt = 8; while (count-- && (dev->accel.sy >= 0)) { - if (dev->accel.temp_cnt == 0) { + if (!dev->accel.temp_cnt) { dev->accel.temp_cnt = 8; - mix_dat = old_mix_dat; + mix_dat = old_mix_dat; } - if (dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b) { + if ((dev->accel.cx >= clip_l) && + (dev->accel.cx <= clip_r) && + (dev->accel.cy >= clip_t) && + (dev->accel.cy <= clip_b)) { if (ibm8514_cpu_dest(svga)) { READ((dev->accel.cy * dev->pitch) + dev->accel.cx, src_dat); } else - switch ((mix_dat & 1) ? frgd_mix : bkgd_mix) { + switch ((mix_dat & 0x01) ? frgd_mix : bkgd_mix) { case 0: src_dat = bkgd_color; break; @@ -1825,13 +1498,19 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat READ((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + if ((compare_mode == 0) || + ((compare_mode == 0x10) && (dest_dat >= compare)) || + ((compare_mode == 0x18) && (dest_dat < compare)) || + ((compare_mode == 0x20) && (dest_dat != compare)) || + ((compare_mode == 0x28) && (dest_dat == compare)) || + ((compare_mode == 0x30) && (dest_dat <= compare)) || + ((compare_mode == 0x38) && (dest_dat > compare))) { old_dest_dat = dest_dat; - MIX(mix_dat & 1, dest_dat, src_dat); + MIX(mix_dat & 0x01, dest_dat, src_dat); dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - if ((dev->accel.cmd & 4) && dev->accel.sy) { + if ((dev->accel.cmd & 0x04) && dev->accel.sy) { WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { + } else if (!(dev->accel.cmd & 0x04)) { WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); } } @@ -1844,9 +1523,8 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat else cpu_dat >>= 8; - if (dev->accel.sy == 0) { + if (dev->accel.sy == 0) break; - } if (dev->accel.cmd & 0x40) { if (dev->accel.cmd & 0x80) @@ -1882,7 +1560,10 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat } } else { while (count-- && (dev->accel.sy >= 0)) { - if ((dev->accel.cx) >= dev->accel.clip_left && (dev->accel.cx) <= clip_r && (dev->accel.cy) >= dev->accel.clip_top && (dev->accel.cy) <= clip_b) { + if ((dev->accel.cx >= clip_l) && + (dev->accel.cx <= clip_r) && + (dev->accel.cy >= clip_t) && + (dev->accel.cy <= clip_b)) { if (ibm8514_cpu_dest(svga) && (pixcntl == 0)) { mix_dat = mix_mask; /* Mix data = forced to foreground register. */ } else if (ibm8514_cpu_dest(svga) && (pixcntl == 3)) { @@ -1917,13 +1598,19 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat READ((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + if ((compare_mode == 0) || + ((compare_mode == 0x10) && (dest_dat >= compare)) || + ((compare_mode == 0x18) && (dest_dat < compare)) || + ((compare_mode == 0x20) && (dest_dat != compare)) || + ((compare_mode == 0x28) && (dest_dat == compare)) || + ((compare_mode == 0x30) && (dest_dat <= compare)) || + ((compare_mode == 0x38) && (dest_dat > compare))) { old_dest_dat = dest_dat; MIX(mix_dat & mix_mask, dest_dat, src_dat); dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - if ((dev->accel.cmd & 4) && dev->accel.sy) { + if ((dev->accel.cmd & 0x04) && dev->accel.sy) { WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { + } else if (!(dev->accel.cmd & 0x04)) { WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); } } @@ -1981,79 +1668,60 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat case 3: /*Rectangle fill (Y direction)*/ case 4: /*Rectangle fill (Y direction using nibbles)*/ if (!cpu_input) { - dev->accel.x_count = 0; - dev->accel.xx_count = 0; - dev->accel.odd_out = 0; - dev->accel.odd_in = 0; - dev->accel.input = 0; - dev->accel.output = 0; - dev->accel.newdest_out = 0; - dev->accel.newdest_in = 0; - - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - dev->accel.sy = dev->accel.multifunc[0] & 0x7ff; + dev->accel.x_count = 0; + dev->accel.output = 0; + dev->accel.input = 0; + dev->accel.input2 = 0; + dev->accel.odd_in = 0; dev->accel.cx = dev->accel.cur_x; if (dev->accel.cur_x >= 0x600) dev->accel.cx |= ~0x5ff; + dev->accel.cy = dev->accel.cur_y; if (dev->accel.cur_y >= 0x600) dev->accel.cy |= ~0x5ff; - if (((dev->local & 0xff) >= 0x02) && dev->accel.ge_offset && ((dev->accel_bpp == 24) || (dev->accel_bpp == 8))) + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + dev->accel.sy = dev->accel.multifunc[0] & 0x7ff; + + if ((dev->accel_bpp == 24) || (dev->accel_bpp <= 8)) dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); + else if (dev->bpp) + dev->accel.dest = (dev->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch); else - dev->accel.dest = dev->accel.cy * dev->pitch; + dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); if (cmd == 4) - dev->accel.cmd |= 2; + dev->accel.cmd |= 0x02; else if (cmd == 3) - dev->accel.cmd &= ~2; + dev->accel.cmd &= ~0x02; if (ibm8514_cpu_src(svga)) { - if (dev->accel.cmd & 2) { + if (dev->accel.cmd & 0x02) { if (!(dev->accel.cmd & 0x1000)) { - if (!(dev->accel.cmd & 8)) { - dev->accel.sx += and3; - dev->accel.nibbleset = (uint8_t *) calloc(1, (dev->accel.sx >> 3) + 1); - dev->accel.writemono = (uint8_t *) calloc(1, (dev->accel.sx >> 3) + 1); - dev->accel.sys_cnt = (dev->accel.sx >> 3) + 1; + if (dev->accel.cmd & 0x08) { + dev->accel.x_count = dev->accel.cx - (and3 + 3); + dev->accel.sx += (and3 + 3); } else { - if (and3 == 1) { - dev->accel.sx += 4; + dev->accel.x_count = dev->accel.cx; + if (and3) { if (dev->accel.cmd & 0x20) - dev->accel.cx += 4; + dev->accel.x_count -= and3; else - dev->accel.cx -= 4; - } else if (and3 == 2) { - dev->accel.sx += 5; - if (dev->accel.cmd & 0x20) - dev->accel.cx += 5; - else - dev->accel.cx -= 5; - } else if (and3 == 3) { - dev->accel.sx += 6; - if (dev->accel.cmd & 0x20) - dev->accel.cx += 6; - else - dev->accel.cx -= 6; - } else { - dev->accel.sx += 3; - if (dev->accel.cmd & 0x20) - dev->accel.cx += 3; - else - dev->accel.cx -= 3; + dev->accel.x_count += and3; + + dev->accel.sx += 8; } } } } else { - if (!(dev->accel.cmd & 0x40) && (frgd_mix == 2) && (bkgd_mix == 2) && (pixcntl == 0) && (cmd == 2)) { - if (!(dev->accel.sx & 1)) { - dev->accel.output = 1; - if (((dev->local & 0xff) >= 0x02) && dev->accel.ge_offset && ((dev->accel_bpp == 24) || (dev->accel_bpp == 8))) - dev->accel.newdest_out = (dev->accel.ge_offset << 2) + ((dev->accel.cy + 1) * dev->pitch); - else - dev->accel.newdest_out = (dev->accel.cy + 1) * dev->pitch; + if (dev->accel.cmd & 0x1000) { + if (dev->accel.cmd & 0x200) { + if (dev->accel.cmd & 0x04) { + dev->accel.output = 1; + dev->accel.sx -= 2; + } } } } @@ -2061,35 +1729,35 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat dev->data_available2 = 0; return; /*Wait for data from CPU*/ } else if (ibm8514_cpu_dest(svga)) { - if (!(dev->accel.cmd & 2) && (frgd_mix == 2) && (pixcntl == 0) && (cmd == 2)) { - if (!(dev->accel.sx & 1)) { - dev->accel.input = 1; - if (((dev->local & 0xff) >= 0x02) && dev->accel.ge_offset && ((dev->accel_bpp == 24) || (dev->accel_bpp == 8))) - dev->accel.newdest_in = (dev->accel.ge_offset << 2) + ((dev->accel.cy + 1) * dev->pitch); - else - dev->accel.newdest_in = (dev->accel.cy + 1) * dev->pitch; - } - } else if (dev->accel.cmd & 2) { - if (dev->accel.cmd & 8) { - dev->accel.sx += and3; - dev->accel.nibbleset = (uint8_t *) calloc(1, (dev->accel.sx >> 3) + 1); - dev->accel.writemono = (uint8_t *) calloc(1, (dev->accel.sx >> 3) + 1); - dev->accel.sys_cnt = (dev->accel.sx >> 3) + 1; + if (!(dev->accel.cmd & 0x02)) { + if (dev->accel.cmd & 0x1000) { + if (dev->accel.cmd & 0x200) { + if (!(dev->accel.sx & 1) && !(dev->accel.cmd & 0x04)) { + dev->accel.input = 1; + } else if (dev->accel.cmd & 0x04) { + dev->accel.input2 = 1; + dev->accel.sx -= 2; + } + } } } + ibm8514_log("INPUT=%d.\n", dev->accel.input); dev->data_available = 1; dev->data_available2 = 1; return; /*Wait for data from CPU*/ } } - if (dev->accel.cmd & 2) { + ibm8514_log("Rectangle %d: full=%04x, odd=%d, c(%d,%d), frgdmix=%d, bkgdmix=%d, xcount=%d, and3=%d, len(%d,%d), CURX=%d, Width=%d, pixcntl=%d, mix_dat=%08x, count=%d, cpu_data=%08x, cpu_input=%d.\n", cmd, dev->accel.cmd, dev->accel.input, dev->accel.cx, dev->accel.cy, frgd_mix, bkgd_mix, dev->accel.x_count, and3, dev->accel.sx, dev->accel.sy, dev->accel.cur_x, dev->accel.maj_axis_pcnt, pixcntl, mix_dat, count, cpu_dat, cpu_input); + + if (dev->accel.cmd & 0x08) { /*Vectored Rectangle*/ if (cpu_input) { -rect_fill_pix: - if ((dev->accel.cmd & 8) && ibm8514_cpu_src(svga)) { - dev->accel.xx_count++; + if (ibm8514_cpu_src(svga)) { while (count-- && (dev->accel.sy >= 0)) { - if (dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b) { + if ((dev->accel.cx >= clip_l) && + (dev->accel.cx <= clip_r) && + (dev->accel.cy >= clip_t) && + (dev->accel.cy <= clip_b)) { switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { case 0: src_dat = bkgd_color; @@ -2110,77 +1778,27 @@ rect_fill_pix: READ(dev->accel.dest + dev->accel.cx, dest_dat); - if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + if ((compare_mode == 0) || + ((compare_mode == 0x10) && (dest_dat >= compare)) || + ((compare_mode == 0x18) && (dest_dat < compare)) || + ((compare_mode == 0x20) && (dest_dat != compare)) || + ((compare_mode == 0x28) && (dest_dat == compare)) || + ((compare_mode == 0x30) && (dest_dat <= compare)) || + ((compare_mode == 0x38) && (dest_dat > compare))) { old_dest_dat = dest_dat; MIX(mix_dat & mix_mask, dest_dat, src_dat); dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - if (and3 == 1) { - if (dev->accel.xx_count >= 2) { - if ((dev->accel.cmd & 4) && dev->accel.sx) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } - } - } else if (and3 == 2) { - if (dev->accel.xx_count == 2) { - if (count <= 2) { - if ((dev->accel.cmd & 4) && dev->accel.sx) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } - } - } else if (dev->accel.xx_count >= 3) { - if ((dev->accel.cmd & 4) && dev->accel.sx) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } - } - } else if (and3 == 3) { - if (dev->accel.xx_count == 2) { - if (count <= 1) { - if ((dev->accel.cmd & 4) && dev->accel.sx) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } - } - } else if (dev->accel.xx_count >= 3) { - if ((dev->accel.cmd & 4) && dev->accel.sx) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } - } - } else { - if (dev->accel.xx_count == 1) { - if (!count) { - if ((dev->accel.cmd & 4) && dev->accel.sx) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } - } - } else if (dev->accel.xx_count >= 2) { - if ((dev->accel.cmd & 4) && dev->accel.sx) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } else if (!(dev->accel.cmd & 4)) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } - } + if ((dev->accel.cmd & 0x02) && (dev->accel.x_count != dev->accel.cx)) + goto skip_vector_rect_write; + + if ((dev->accel.cmd & 0x04) && dev->accel.sx) { + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } else if (!(dev->accel.cmd & 0x04)) { + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); } } } - mix_dat <<= 1; - mix_dat |= 1; - if (dev->bpp) - cpu_dat >>= 16; - else - cpu_dat >>= 8; - switch (dev->accel.cmd & 0xe0) { case 0x00: dev->accel.cx++; @@ -2205,17 +1823,42 @@ rect_fill_pix: break; } +skip_vector_rect_write: + switch (dev->accel.cmd & 0xe0) { + case 0x00: + dev->accel.x_count++; + break; + case 0x20: + dev->accel.x_count++; + break; + case 0x60: + dev->accel.x_count--; + break; + case 0x80: + dev->accel.x_count--; + break; + case 0xa0: + dev->accel.x_count--; + break; + case 0xe0: + dev->accel.x_count++; + break; + + default: + break; + } + + if (dev->bpp) + cpu_dat >>= 16; + else + cpu_dat >>= 8; + + mix_dat <<= 1; + mix_dat |= 1; + dev->accel.sx--; if (dev->accel.sx < 0) { dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - if (and3 == 1) - dev->accel.sx += 4; - else if (and3 == 2) - dev->accel.sx += 5; - else if (and3 == 3) - dev->accel.sx += 6; - else - dev->accel.sx += 3; if (dev->accel.cmd & 0x20) dev->accel.cx -= (dev->accel.sx + 1); @@ -2246,34 +1889,62 @@ rect_fill_pix: break; } - if (((dev->local & 0xff) >= 0x02) && dev->accel.ge_offset && ((dev->accel_bpp == 24) || (dev->accel_bpp == 8))) + if ((dev->accel_bpp == 24) || (dev->accel_bpp <= 8)) dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); + else if (dev->bpp) + dev->accel.dest = (dev->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch); else - dev->accel.dest = dev->accel.cy * dev->pitch; + dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); dev->accel.sy--; + dev->accel.x_count = 0; return; } } - break; - } - if (count < 8) { - while (count-- && (dev->accel.sy >= 0)) { - if (dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b) { - if (ibm8514_cpu_dest(svga) && (pixcntl == 0)) { - mix_dat = mix_mask; /* Mix data = forced to foreground register. */ - } else if (ibm8514_cpu_dest(svga) && (pixcntl == 3)) { - /* Mix data = current video memory value. */ - READ(dev->accel.dest + dev->accel.cx, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? mix_mask : 0; - } + } else + ibm8514_log("Vectored Rectangle with destination reads (TODO).\n"); + } else + ibm8514_log("Vectored Rectangle with normal processing (TODO).\n"); + } else { /*Normal Rectangle*/ + if (cpu_input) { + while (count-- && (dev->accel.sy >= 0)) { + if ((dev->accel.cx >= clip_l) && + (dev->accel.cx <= clip_r) && + (dev->accel.cy >= clip_t) && + (dev->accel.cy <= clip_b)) { + if (ibm8514_cpu_dest(svga) && (pixcntl == 0)) { + mix_dat = mix_mask; /* Mix data = forced to foreground register. */ + } else if (ibm8514_cpu_dest(svga) && (pixcntl == 3)) { + /* Mix data = current video memory value. */ + READ(dev->accel.dest + dev->accel.cx, mix_dat); + mix_dat = ((mix_dat & rd_mask) == rd_mask); + mix_dat = mix_dat ? mix_mask : 0; + } - if (ibm8514_cpu_dest(svga)) { - READ(dev->accel.dest + dev->accel.cx, src_dat); - if (pixcntl == 3) - src_dat = ((src_dat & rd_mask) == rd_mask); - } else + if (ibm8514_cpu_dest(svga)) { + READ(dev->accel.dest + dev->accel.cx, src_dat); + if (pixcntl == 3) + src_dat = ((src_dat & rd_mask) == rd_mask); + } else { + if (dev->accel.cmd & 0x02) { + switch ((mix_dat & 0x01) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = cpu_dat; + break; + case 3: + src_dat = 0; + break; + + default: + break; + } + } else { switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { case 0: src_dat = bkgd_color; @@ -2291,418 +1962,114 @@ rect_fill_pix: default: break; } + } + } - READ(dev->accel.dest + dev->accel.cx, dest_dat); + READ(dev->accel.dest + dev->accel.cx, dest_dat); + + if ((compare_mode == 0) || + ((compare_mode == 0x10) && (dest_dat >= compare)) || + ((compare_mode == 0x18) && (dest_dat < compare)) || + ((compare_mode == 0x20) && (dest_dat != compare)) || + ((compare_mode == 0x28) && (dest_dat == compare)) || + ((compare_mode == 0x30) && (dest_dat <= compare)) || + ((compare_mode == 0x38) && (dest_dat > compare))) { + old_dest_dat = dest_dat; + if (dev->accel.cmd & 0x02) { + MIX(mix_dat & 0x01, dest_dat, src_dat); + if ((dev->accel.x_count != dev->accel.cx) && !(dev->accel.cmd & 0x1000) && and3) + goto skip_nibble_rect_write; - if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { - old_dest_dat = dest_dat; - MIX(mix_dat & mix_mask, dest_dat, src_dat); dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } - } - mix_dat <<= 1; - mix_dat |= 1; - if (dev->bpp) - cpu_dat >>= 16; - else - cpu_dat >>= 8; - - if (dev->accel.cmd & 0x20) - dev->accel.cx++; - else - dev->accel.cx--; - - dev->accel.sx--; - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - - if (dev->accel.cmd & 2) { - dev->accel.sx += (dev->accel.cur_x & 3); - } - - if (dev->accel.cmd & 0x20) { - dev->accel.cx -= (dev->accel.sx) + 1; - } else - dev->accel.cx += (dev->accel.sx) + 1; - - if (dev->accel.cmd & 0x80) - dev->accel.cy++; - else - dev->accel.cy--; - - if (((dev->local & 0xff) >= 0x02) && dev->accel.ge_offset && ((dev->accel_bpp == 24) || (dev->accel_bpp == 8))) - dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); - else - dev->accel.dest = dev->accel.cy * dev->pitch; - - dev->accel.sy--; - return; - } - } - } else { - while (count-- && (dev->accel.sy >= 0)) { - if (dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b) { - if (ibm8514_cpu_dest(svga) && (pixcntl == 0)) { - mix_dat = 1; /* Mix data = forced to foreground register. */ - } else if (ibm8514_cpu_dest(svga) && (pixcntl == 3)) { - /* Mix data = current video memory value. */ - READ(dev->accel.dest + dev->accel.cx, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? 1 : 0; - } - - if (ibm8514_cpu_dest(svga)) { - READ(dev->accel.dest + dev->accel.cx, src_dat); - if (pixcntl == 3) - src_dat = ((src_dat & rd_mask) == rd_mask); - } else { - switch ((mix_dat & 1) ? frgd_mix : bkgd_mix) { - case 0: - src_dat = bkgd_color; - break; - case 1: - src_dat = frgd_color; - break; - case 2: - src_dat = cpu_dat; - break; - case 3: - src_dat = 0; - break; - - default: - break; - } - } - - READ(dev->accel.dest + dev->accel.cx, dest_dat); - - if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { - old_dest_dat = dest_dat; - MIX(mix_dat & 1, dest_dat, src_dat); - dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } - } - mix_dat >>= 1; - if (dev->bpp) - cpu_dat >>= 16; - else - cpu_dat >>= 8; - - if (dev->accel.cmd & 0x20) - dev->accel.cx++; - else - dev->accel.cx--; - - dev->accel.sx--; - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - - if (dev->accel.cmd & 2) { - if (!(dev->accel.cmd & 0x1000)) - dev->accel.sx += (dev->accel.cur_x & 3); - } - - if (dev->accel.cmd & 0x20) - dev->accel.cx -= (dev->accel.sx) + 1; - else - dev->accel.cx += (dev->accel.sx) + 1; - - if (dev->accel.cmd & 2) { - if (dev->accel.cmd & 0x1000) { - dev->accel.cx = dev->accel.cur_x; - if (dev->accel.cur_x >= 0x600) - dev->accel.cx |= ~0x5ff; - } - } - - if (dev->accel.cmd & 0x80) - dev->accel.cy++; - else - dev->accel.cy--; - - if (((dev->local & 0xff) >= 0x02) && dev->accel.ge_offset && ((dev->accel_bpp == 24) || (dev->accel_bpp == 8))) - dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); - else - dev->accel.dest = dev->accel.cy * dev->pitch; - - dev->accel.sy--; - return; - } - } - } - } else { - goto rect_fill; - } - } else { - if (cpu_input) { - if (pixcntl == 2) { - goto rect_fill_pix; - } else { - if (dev->accel.input && !dev->accel.output) { - while (count-- && (dev->accel.sy >= 0)) { - if (dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b) { - mix_dat = mix_mask; /* Mix data = forced to foreground register. */ - if (!dev->accel.odd_in && !dev->accel.sx) { - READ(dev->accel.newdest_in + dev->accel.cur_x, src_dat); - READ(dev->accel.newdest_in + dev->accel.cur_x, dest_dat); - } else { - READ(dev->accel.dest + dev->accel.cx, src_dat); - READ(dev->accel.dest + dev->accel.cx, dest_dat); - } - if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { - old_dest_dat = dest_dat; - MIX(mix_dat & mix_mask, dest_dat, src_dat); - dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - if (!dev->accel.odd_in && !dev->accel.sx) { - WRITE(dev->accel.newdest_in + dev->accel.cur_x, dest_dat); - } else { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } - } - } - - mix_dat <<= 1; - mix_dat |= 1; - - if (dev->accel.cmd & 0x20) - dev->accel.cx++; - else - dev->accel.cx--; - - dev->accel.sx--; - if (dev->accel.odd_in) { - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - dev->accel.odd_in = 0; - dev->accel.cx = dev->accel.cur_x; - if (dev->accel.cmd & 0x80) - dev->accel.cy++; - else - dev->accel.cy--; - - if (((dev->local & 0xff) >= 0x02) && dev->accel.ge_offset && ((dev->accel_bpp == 24) || (dev->accel_bpp == 8))) { - dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); - dev->accel.newdest_in = (dev->accel.ge_offset << 2) + ((dev->accel.cy + 1) * dev->pitch); - } else { - dev->accel.dest = dev->accel.cy * dev->pitch; - dev->accel.newdest_in = (dev->accel.cy + 1) * dev->pitch; - } - dev->accel.sy--; - return; + if ((dev->accel.cmd & 0x04) && dev->accel.sx) { + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } else if (!(dev->accel.cmd & 0x04)) { + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); } } else { - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - dev->accel.sx--; - dev->accel.cx = dev->accel.cur_x; - dev->accel.odd_in = 1; - if (dev->accel.cmd & 0x20) - dev->accel.cx++; - else - dev->accel.cx--; - if (dev->accel.cmd & 0x80) - dev->accel.cy++; - else - dev->accel.cy--; - - if (((dev->local & 0xff) >= 0x02) && dev->accel.ge_offset && ((dev->accel_bpp == 24) || (dev->accel_bpp == 8))) { - dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); - dev->accel.newdest_in = (dev->accel.ge_offset << 2) + ((dev->accel.cy + 1) * dev->pitch); - } else { - dev->accel.dest = dev->accel.cy * dev->pitch; - dev->accel.newdest_in = (dev->accel.cy + 1) * dev->pitch; - } - dev->accel.sy--; - return; - } - } - } - } else if (dev->accel.output && !dev->accel.input) { - while (count-- && (dev->accel.sy >= 0)) { - if (dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b) { - src_dat = cpu_dat; - if (!dev->accel.odd_out && !dev->accel.sx) { - READ(dev->accel.newdest_out + dev->accel.cur_x, dest_dat); - } else { - READ(dev->accel.dest + dev->accel.cx, dest_dat); - } - - if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { - old_dest_dat = dest_dat; - MIX(mix_dat & mix_mask, dest_dat, src_dat); - dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - if (!dev->accel.odd_out && !dev->accel.sx) { - WRITE(dev->accel.newdest_out + dev->accel.cur_x, dest_dat); - } else { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } - } - } - - mix_dat <<= 1; - mix_dat |= 1; - if (dev->bpp) - cpu_dat >>= 16; - else - cpu_dat >>= 8; - - if (dev->accel.cmd & 0x20) - dev->accel.cx++; - else - dev->accel.cx--; - - dev->accel.sx--; - if (dev->accel.odd_out) { - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - dev->accel.odd_out = 0; - dev->accel.cx = dev->accel.cur_x; - if (dev->accel.cmd & 0x80) - dev->accel.cy++; - else - dev->accel.cy--; - - if (((dev->local & 0xff) >= 0x02) && dev->accel.ge_offset && ((dev->accel_bpp == 24) || (dev->accel_bpp == 8))) { - dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); - dev->accel.newdest_out = (dev->accel.ge_offset << 2) + ((dev->accel.cy + 1) * dev->pitch); - } else { - dev->accel.dest = dev->accel.cy * dev->pitch; - dev->accel.newdest_out = (dev->accel.cy + 1) * dev->pitch; - } - dev->accel.sy--; - return; - } - } else { - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - dev->accel.odd_out = 1; - dev->accel.sx--; - dev->accel.cx = dev->accel.cur_x; - if (dev->accel.cmd & 0x20) - dev->accel.cx++; - else - dev->accel.cx--; - if (dev->accel.cmd & 0x80) - dev->accel.cy++; - else - dev->accel.cy--; - - if (((dev->local & 0xff) >= 0x02) && dev->accel.ge_offset && ((dev->accel_bpp == 24) || (dev->accel_bpp == 8))) { - dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); - dev->accel.newdest_out = (dev->accel.ge_offset << 2) + ((dev->accel.cy + 1) * dev->pitch); - } else { - dev->accel.dest = dev->accel.cy * dev->pitch; - dev->accel.newdest_out = (dev->accel.cy + 1) * dev->pitch; - } - dev->accel.sy--; - return; - } - } - } - } else { - while (count-- && (dev->accel.sy >= 0)) { - if (dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b) { - if (ibm8514_cpu_dest(svga) && (pixcntl == 0)) { - mix_dat = mix_mask; /* Mix data = forced to foreground register. */ - } else if (ibm8514_cpu_dest(svga) && (pixcntl == 3)) { - /* Mix data = current video memory value. */ - READ(dev->accel.dest + dev->accel.cx, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? mix_mask : 0; - } - - if (ibm8514_cpu_dest(svga)) { - READ(dev->accel.dest + dev->accel.cx, src_dat); + if (ibm8514_cpu_dest(svga) && (cmd == 2)) { if (pixcntl == 3) { - src_dat = ((src_dat & rd_mask) == rd_mask); - } - } else - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: - src_dat = bkgd_color; - break; - case 1: - src_dat = frgd_color; - break; - case 2: - src_dat = cpu_dat; - break; - case 3: - src_dat = 0; - break; - - default: - break; - } - - READ(dev->accel.dest + dev->accel.cx, dest_dat); - - if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { - old_dest_dat = dest_dat; - if (ibm8514_cpu_dest(svga)) { - if (pixcntl == 3) { - MIX(mix_dat & mix_mask, dest_dat, src_dat); - } - } else { MIX(mix_dat & mix_mask, dest_dat, src_dat); } - dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + } else { + MIX(mix_dat & mix_mask, dest_dat, src_dat); + } + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + if ((dev->accel.cmd & 0x04) && dev->accel.sx) { + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } else if (!(dev->accel.cmd & 0x04)) { WRITE(dev->accel.dest + dev->accel.cx, dest_dat); } } - - mix_dat <<= 1; - mix_dat |= 1; - if (dev->bpp) - cpu_dat >>= 16; - else - cpu_dat >>= 8; - - if (dev->accel.cmd & 0x20) - dev->accel.cx++; - else - dev->accel.cx--; - - dev->accel.sx--; - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - - if (dev->accel.cmd & 0x20) { - dev->accel.cx -= (dev->accel.sx) + 1; - } else - dev->accel.cx += (dev->accel.sx) + 1; - - if (dev->accel.cmd & 0x80) - dev->accel.cy++; - else - dev->accel.cy--; - - if (((dev->local & 0xff) >= 0x02) && dev->accel.ge_offset && ((dev->accel_bpp == 24) || (dev->accel_bpp == 8))) - dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); - else - dev->accel.dest = dev->accel.cy * dev->pitch; - - dev->accel.sy--; - return; - } } } + if (dev->accel.cmd & 0x20) + dev->accel.cx++; + else + dev->accel.cx--; + +skip_nibble_rect_write: + if (dev->accel.cmd & 0x20) + dev->accel.x_count++; + else + dev->accel.x_count--; + + if (dev->accel.cmd & 0x02) + mix_dat >>= 1; + else { + mix_dat <<= 1; + mix_dat |= 1; + } + + if (dev->bpp) + cpu_dat >>= 16; + else + cpu_dat >>= 8; + + dev->accel.sx--; + if (dev->accel.sx < 0) { + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + if (dev->accel.input) + dev->accel.odd_in = 1; + if (dev->accel.output || dev->accel.input2) + dev->accel.sx -= 2; + + if (dev->accel.cmd & 0x20) + dev->accel.cx -= (dev->accel.sx + 1); + else + dev->accel.cx += (dev->accel.sx + 1); + + if (dev->accel.cmd & 0x80) + dev->accel.cy++; + else + dev->accel.cy--; + + if ((dev->accel_bpp == 24) || (dev->accel_bpp <= 8)) + dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); + else if (dev->bpp) + dev->accel.dest = (dev->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch); + else + dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); + + dev->accel.sy--; + dev->accel.x_count = 0; + return; + } } } else { -rect_fill: if (pixcntl == 1) { if (dev->accel.cmd & 0x40) { - count = dev->accel.maj_axis_pcnt + 1; + count = (dev->accel.maj_axis_pcnt & 0x7ff) + 1; dev->accel.temp_cnt = 8; while (count-- && dev->accel.sy >= 0) { - if (dev->accel.temp_cnt == 0) { + if (!dev->accel.temp_cnt) { mix_dat >>= 8; dev->accel.temp_cnt = 8; } - if (dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b) { + if ((dev->accel.cx >= clip_l) && + (dev->accel.cx <= clip_r) && + (dev->accel.cy >= clip_t) && + (dev->accel.cy <= clip_b)) { switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { case 0: src_dat = bkgd_color; @@ -2711,8 +2078,6 @@ rect_fill: src_dat = frgd_color; break; case 2: - src_dat = 0; - break; case 3: src_dat = 0; break; @@ -2723,11 +2088,16 @@ rect_fill: READ(dev->accel.dest + dev->accel.cx, dest_dat); - if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + if ((compare_mode == 0) || + ((compare_mode == 0x10) && (dest_dat >= compare)) || + ((compare_mode == 0x18) && (dest_dat < compare)) || + ((compare_mode == 0x20) && (dest_dat != compare)) || + ((compare_mode == 0x28) && (dest_dat == compare)) || + ((compare_mode == 0x30) && (dest_dat <= compare)) || + ((compare_mode == 0x38) && (dest_dat > compare))) { old_dest_dat = dest_dat; MIX(mix_dat & mix_mask, dest_dat, src_dat); dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); } } @@ -2748,36 +2118,38 @@ rect_fill: dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; if (dev->accel.cmd & 0x20) { - dev->accel.cx -= (dev->accel.sx) + 1; + dev->accel.cx -= (dev->accel.sx + 1); } else - dev->accel.cx += (dev->accel.sx) + 1; + dev->accel.cx += (dev->accel.sx + 1); if (dev->accel.cmd & 0x80) dev->accel.cy++; else dev->accel.cy--; - if (((dev->local & 0xff) >= 0x02) && dev->accel.ge_offset && ((dev->accel_bpp == 24) || (dev->accel_bpp == 8))) + if ((dev->accel_bpp == 24) || (dev->accel_bpp <= 8)) dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); + else if (dev->bpp) + dev->accel.dest = (dev->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch); else - dev->accel.dest = dev->accel.cy * dev->pitch; + dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); dev->accel.sy--; - - dev->accel.cur_x = dev->accel.cx; - dev->accel.cur_y = dev->accel.cy; return; } } } else { dev->accel.temp_cnt = 8; - while (count-- && dev->accel.sy >= 0) { + while (count-- && (dev->accel.sy >= 0)) { if (!dev->accel.temp_cnt) { dev->accel.temp_cnt = 8; - mix_dat = old_mix_dat; + mix_dat = old_mix_dat; } - if (dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b) { - switch ((mix_dat & 1) ? frgd_mix : bkgd_mix) { + if ((dev->accel.cx >= clip_l) && + (dev->accel.cx <= clip_r) && + (dev->accel.cy >= clip_t) && + (dev->accel.cy <= clip_b)) { + switch ((mix_dat & 0x01) ? frgd_mix : bkgd_mix) { case 0: src_dat = bkgd_color; break; @@ -2785,8 +2157,6 @@ rect_fill: src_dat = frgd_color; break; case 2: - src_dat = 0; - break; case 3: src_dat = 0; break; @@ -2797,11 +2167,16 @@ rect_fill: READ(dev->accel.dest + dev->accel.cx, dest_dat); - if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + if ((compare_mode == 0) || + ((compare_mode == 0x10) && (dest_dat >= compare)) || + ((compare_mode == 0x18) && (dest_dat < compare)) || + ((compare_mode == 0x20) && (dest_dat != compare)) || + ((compare_mode == 0x28) && (dest_dat == compare)) || + ((compare_mode == 0x30) && (dest_dat <= compare)) || + ((compare_mode == 0x38) && (dest_dat > compare))) { old_dest_dat = dest_dat; - MIX(mix_dat & 1, dest_dat, src_dat); + MIX(mix_dat & 0x01, dest_dat, src_dat); dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); } } @@ -2819,167 +2194,193 @@ rect_fill: dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; if (dev->accel.cmd & 0x20) { - dev->accel.cx -= (dev->accel.sx) + 1; + dev->accel.cx -= (dev->accel.sx + 1); } else - dev->accel.cx += (dev->accel.sx) + 1; + dev->accel.cx += (dev->accel.sx + 1); if (dev->accel.cmd & 0x80) dev->accel.cy++; else dev->accel.cy--; - if (((dev->local & 0xff) >= 0x02) && dev->accel.ge_offset && ((dev->accel_bpp == 24) || (dev->accel_bpp == 8))) + if ((dev->accel_bpp == 24) || (dev->accel_bpp <= 8)) dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); + else if (dev->bpp) + dev->accel.dest = (dev->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch); else - dev->accel.dest = dev->accel.cy * dev->pitch; + dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); dev->accel.sy--; if (dev->accel.sy < 0) { - dev->accel.cur_x = dev->accel.cx; - dev->accel.cur_y = dev->accel.cy; + if (cmd != 4) { + dev->accel.cur_x = dev->accel.cx; + dev->accel.cur_y = dev->accel.cy; + } return; } } } } - } else { - if ((dev->accel.multifunc[0x0a] & 6) == 4) { - while (count-- && (dev->accel.sy >= 0)) { - if (dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b) { - READ(dev->accel.dest + dev->accel.cx, mix_dat); - if ((mix_dat & rd_mask_polygon) == rd_mask_polygon) - dev->accel.fill_state = !dev->accel.fill_state; + } else if ((dev->accel.multifunc[0x0a] & 0x06) == 0x04) { /*Polygon Draw Type A*/ + while (count-- && (dev->accel.sy >= 0)) { + if ((dev->accel.cx >= clip_l) && + (dev->accel.cx <= clip_r) && + (dev->accel.cy >= clip_t) && + (dev->accel.cy <= clip_b)) { + READ(dev->accel.dest + dev->accel.cx, mix_dat); + if ((mix_dat & rd_mask_polygon) == rd_mask_polygon) + dev->accel.fill_state ^= 1; - READ(dev->accel.dest + dev->accel.cx, dest_dat); - old_dest_dat = dest_dat; - if (dev->accel.fill_state) { - if (!(rd_mask_polygon & 1) && (wrt_mask & 1)) { - MIX(mix_dat ^ rd_mask_polygon, dest_dat, mix_dat); - ibm8514_log("Filling c(%d,%d) without bit 0 of rdmask=%02x, wrtmask=%02x, mixdat=%02x, dest=%02x, old=%02x.\n", dev->accel.cx, dev->accel.cy, rd_mask_polygon, wrt_mask, mix_dat, dest_dat, old_dest_dat); - dest_dat &= ~rd_mask_polygon; - } else if ((rd_mask_polygon & 1) && (wrt_mask & 1)) { - ibm8514_log("Filling c(%d,%d) with bit 0 of rdmask=%02x, wrtmask=%02x.\n", dev->accel.cx, dev->accel.cy, rd_mask_polygon, wrt_mask); - dest_dat &= ~(rd_mask_polygon & wrt_mask); - } - } else { - if (!(rd_mask_polygon & 1) && (wrt_mask & 1)) - dest_dat &= ~rd_mask_polygon; - else if ((rd_mask_polygon & 1) && (wrt_mask & 1)) - dest_dat &= ~(rd_mask_polygon & wrt_mask); + READ(dev->accel.dest + dev->accel.cx, dest_dat); + old_dest_dat = dest_dat; + if (dev->accel.fill_state) { + if (!(rd_mask_polygon & 0x01) && (wrt_mask & 0x01)) { + MIX(mix_dat ^ rd_mask_polygon, dest_dat, mix_dat); + ibm8514_log("Filling c(%d,%d) without bit 0 of rdmask=%02x, wrtmask=%02x, mixdat=%02x, dest=%02x, old=%02x.\n", dev->accel.cx, dev->accel.cy, rd_mask_polygon, wrt_mask, mix_dat, dest_dat, old_dest_dat); + dest_dat &= ~rd_mask_polygon; + } else if ((rd_mask_polygon & 0x01) && (wrt_mask & 0x01)) { + ibm8514_log("Filling c(%d,%d) with bit 0 of rdmask=%02x, wrtmask=%02x.\n", dev->accel.cx, dev->accel.cy, rd_mask_polygon, wrt_mask); + dest_dat &= ~(rd_mask_polygon & wrt_mask); } + } else { + if (!(rd_mask_polygon & 0x01) && (wrt_mask & 0x01)) + dest_dat &= ~rd_mask_polygon; + else if ((rd_mask_polygon & 0x01) && (wrt_mask & 0x01)) + dest_dat &= ~(rd_mask_polygon & wrt_mask); + } + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + + if ((compare_mode == 0) || + ((compare_mode == 0x10) && (dest_dat >= compare)) || + ((compare_mode == 0x18) && (dest_dat < compare)) || + ((compare_mode == 0x20) && (dest_dat != compare)) || + ((compare_mode == 0x28) && (dest_dat == compare)) || + ((compare_mode == 0x30) && (dest_dat <= compare)) || + ((compare_mode == 0x38) && (dest_dat > compare))) { + ibm8514_log("Results c(%d,%d):rdmask=%02x, wrtmask=%02x, mix=%02x, destdat=%02x, nowrite=%d.\n", dev->accel.cx, dev->accel.cy, rd_mask_polygon, wrt_mask, mix_dat, dest_dat, dev->accel.cx_back); + WRITE(dev->accel.dest + dev->accel.cx, dest_dat); + } + } + + if (dev->accel.cmd & 0x20) + dev->accel.cx++; + else + dev->accel.cx--; + + dev->accel.sx--; + if (dev->accel.sx < 0) { + dev->accel.fill_state = 0; + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + + if (dev->accel.cmd & 0x20) + dev->accel.cx -= (dev->accel.sx + 1); + else + dev->accel.cx += (dev->accel.sx + 1); + + if (dev->accel.cmd & 0x80) + dev->accel.cy++; + else + dev->accel.cy--; + + if ((dev->accel_bpp == 24) || (dev->accel_bpp <= 8)) + dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); + else if (dev->bpp) + dev->accel.dest = (dev->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch); + else + dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); + + dev->accel.sy--; + + if (dev->accel.sy < 0) { + ibm8514_log(".\n"); + return; + } + } + } + } else { + ibm8514_log("Polygon Draw Type=%02x, CL=%d, CR=%d.\n", dev->accel.multifunc[0x0a] & 0x06, clip_l, clip_r); + while (count-- && dev->accel.sy >= 0) { + if ((dev->accel.cx >= clip_l) && + (dev->accel.cx <= clip_r) && + (dev->accel.cy >= clip_t) && + (dev->accel.cy <= clip_b)) { + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + if (!bkgd_mix && (dev->accel.cmd & 0x40) && ((dev->accel.frgd_mix & 0x1f) == 7) && ((dev->accel.bkgd_mix & 0x1f) == 3) && !dev->bpp && (bkgd_color == 0x00)) /*For some reason, the September 1992 Mach8/32 drivers for Win3.x don't set the background colors properly.*/ + src_dat = frgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + case 3: + src_dat = 0; + break; + + default: + break; + } + + READ(dev->accel.dest + dev->accel.cx, dest_dat); + + if ((compare_mode == 0) || + ((compare_mode == 0x10) && (dest_dat >= compare)) || + ((compare_mode == 0x18) && (dest_dat < compare)) || + ((compare_mode == 0x20) && (dest_dat != compare)) || + ((compare_mode == 0x28) && (dest_dat == compare)) || + ((compare_mode == 0x30) && (dest_dat <= compare)) || + ((compare_mode == 0x38) && (dest_dat > compare))) { + old_dest_dat = dest_dat; + MIX(mix_dat & mix_mask, dest_dat, src_dat); dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { - ibm8514_log("Results c(%d,%d):rdmask=%02x, wrtmask=%02x, mix=%02x, destdat=%02x, nowrite=%d.\n", dev->accel.cx, dev->accel.cy, rd_mask_polygon, wrt_mask, mix_dat, dest_dat, dev->accel.cx_back); + if (dev->accel.cmd & 0x10) { WRITE(dev->accel.dest + dev->accel.cx, dest_dat); } } + } else + ibm8514_log("Outside clipping.\n"); + + mix_dat <<= 1; + mix_dat |= 1; + + if (dev->accel.cmd & 0x20) + dev->accel.cx++; + else + dev->accel.cx--; + + dev->accel.sx--; + if (dev->accel.sx < 0) { + dev->accel.fill_state = 0; + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; if (dev->accel.cmd & 0x20) - dev->accel.cx++; + dev->accel.cx -= (dev->accel.sx + 1); else - dev->accel.cx--; + dev->accel.cx += (dev->accel.sx + 1); - dev->accel.sx--; - if (dev->accel.sx < 0) { - dev->accel.fill_state = 0; - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - - if (dev->accel.cmd & 0x20) - dev->accel.cx -= (dev->accel.sx) + 1; - else - dev->accel.cx += (dev->accel.sx) + 1; - - if (dev->accel.cmd & 0x80) - dev->accel.cy++; - else - dev->accel.cy--; - - dev->accel.dest = dev->accel.cy * dev->pitch; - - dev->accel.sy--; - - if (dev->accel.sy < 0) { - ibm8514_log(".\n"); - return; - } - } - } - } else { - ibm8514_log("Rectangle Fill Normal CMD=%04x, CURRENT(%d,%d), sx=%d, FR(%02x), linedraw=%d.\n", dev->accel.cmd, dev->accel.cx, dev->accel.cy, dev->accel.sx, frgd_color, dev->accel.linedraw); - while (count-- && dev->accel.sy >= 0) { - if (dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b) { - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: - src_dat = bkgd_color; - if (!bkgd_mix && (dev->accel.cmd & 0x40) && ((dev->accel.frgd_mix & 0x1f) == 7) && ((dev->accel.bkgd_mix & 0x1f) == 3) && !dev->bpp && (bkgd_color == 0x00)) /*For some reason, the September 1992 Mach8/32 drivers for Win3.x don't set the background colors properly.*/ - src_dat = frgd_color; - break; - case 1: - src_dat = frgd_color; - break; - case 2: - src_dat = 0; - break; - case 3: - src_dat = 0; - break; - - default: - break; - } - - - READ(dev->accel.dest + dev->accel.cx, dest_dat); - - if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { - old_dest_dat = dest_dat; - MIX(mix_dat & mix_mask, dest_dat, src_dat); - dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - - if (dev->accel.cmd & 0x10) { - WRITE(dev->accel.dest + dev->accel.cx, dest_dat); - } - } - } - - mix_dat <<= 1; - mix_dat |= 1; - - if (dev->accel.cmd & 0x20) - dev->accel.cx++; + if (dev->accel.cmd & 0x80) + dev->accel.cy++; else - dev->accel.cx--; + dev->accel.cy--; - dev->accel.sx--; - if (dev->accel.sx < 0) { - dev->accel.fill_state = 0; - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + if ((dev->accel_bpp == 24) || (dev->accel_bpp <= 8)) + dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); + else if (dev->bpp) + dev->accel.dest = (dev->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch); + else + dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); - if (dev->accel.cmd & 0x20) - dev->accel.cx -= (dev->accel.sx) + 1; - else - dev->accel.cx += (dev->accel.sx) + 1; - - if (dev->accel.cmd & 0x80) - dev->accel.cy++; - else - dev->accel.cy--; - - if (((dev->local & 0xff) >= 0x02) && dev->accel.ge_offset && ((dev->accel_bpp == 24) || (dev->accel_bpp == 8))) - dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); - else - dev->accel.dest = dev->accel.cy * dev->pitch; - - dev->accel.sy--; - - if (dev->accel.sy < 0) { + dev->accel.sy--; + if (dev->accel.sy < 0) { + if (cmd != 4) { dev->accel.cur_x = dev->accel.cx; dev->accel.cur_y = dev->accel.cy; - return; } + return; } } } @@ -2990,15 +2391,16 @@ rect_fill: case 5: /*Draw Polygon Boundary Line*/ { if (!cpu_input) { + dev->accel.sy = dev->accel.maj_axis_pcnt_no_limit; + dev->accel.cx = dev->accel.cur_x; if (dev->accel.cur_x >= 0x600) dev->accel.cx |= ~0x5ff; + dev->accel.cy = dev->accel.cur_y; if (dev->accel.cur_y >= 0x600) dev->accel.cy |= ~0x5ff; - dev->accel.sy = dev->accel.maj_axis_pcnt_no_limit; - if (dev->accel.cmd & 0x80) dev->accel.oldcy = dev->accel.cy + 1; else @@ -3017,14 +2419,15 @@ rect_fill: } } - if (dev->accel.cmd & 8) { + if (dev->accel.cmd & 0x08) { /*Vectored Boundary Line*/ while (count-- && (dev->accel.sy >= 0)) { - if (dev->accel.cx < 0) - dev->accel.cx = 0; - if (dev->accel.cy < 0) - dev->accel.cy = 0; + if (dev->accel.cx < clip_l) + dev->accel.cx = clip_l; - if (dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b) { + if ((dev->accel.cx >= clip_l) && + (dev->accel.cx <= clip_r) && + (dev->accel.cy >= clip_t) && + (dev->accel.cy <= clip_b)) { switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { case 0: src_dat = bkgd_color; @@ -3046,16 +2449,22 @@ rect_fill: READ((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + if ((compare_mode == 0) || + ((compare_mode == 0x10) && (dest_dat >= compare)) || + ((compare_mode == 0x18) && (dest_dat < compare)) || + ((compare_mode == 0x20) && (dest_dat != compare)) || + ((compare_mode == 0x28) && (dest_dat == compare)) || + ((compare_mode == 0x30) && (dest_dat <= compare)) || + ((compare_mode == 0x38) && (dest_dat > compare))) { old_dest_dat = dest_dat; MIX(mix_dat & mix_mask, dest_dat, src_dat); dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); if (dev->accel.cmd & 0x10) { - if (dev->accel.sy && (dev->accel.cmd & 4)) { + if (dev->accel.sy && (dev->accel.cmd & 0x04)) { if (dev->accel.oldcy != dev->accel.cy) { WRITE((dev->accel.cy * dev->pitch) + (dev->accel.cx), dest_dat); } - } else if (!(dev->accel.cmd & 4)) { + } else if (!(dev->accel.cmd & 0x04)) { if (dev->accel.oldcy != dev->accel.cy) { WRITE((dev->accel.cy * dev->pitch) + (dev->accel.cx), dest_dat); } @@ -3116,12 +2525,15 @@ rect_fill: dev->accel.sy--; } - } else { + } else { /*Vectored Bresenham*/ while (count-- && (dev->accel.sy >= 0)) { - if (dev->accel.cx < dev->accel.clip_left) - dev->accel.cx = dev->accel.clip_left; + if (dev->accel.cx < clip_l) + dev->accel.cx = clip_l; - if (dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b) { + if ((dev->accel.cx >= clip_l) && + (dev->accel.cx <= clip_r) && + (dev->accel.cy >= clip_t) && + (dev->accel.cy <= clip_b)) { switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { case 0: src_dat = bkgd_color; @@ -3142,7 +2554,13 @@ rect_fill: READ((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); - if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + if ((compare_mode == 0) || + ((compare_mode == 0x10) && (dest_dat >= compare)) || + ((compare_mode == 0x18) && (dest_dat < compare)) || + ((compare_mode == 0x20) && (dest_dat != compare)) || + ((compare_mode == 0x28) && (dest_dat == compare)) || + ((compare_mode == 0x30) && (dest_dat <= compare)) || + ((compare_mode == 0x38) && (dest_dat > compare))) { old_dest_dat = dest_dat; MIX(mix_dat & mix_mask, dest_dat, src_dat); dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); @@ -3209,38 +2627,50 @@ rect_fill: if (!cpu_input) /*!cpu_input is trigger to start operation*/ { dev->accel.x_count = 0; - dev->accel.output = 0; - - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - dev->accel.sy = dev->accel.multifunc[0] & 0x7ff; dev->accel.dx = dev->accel.destx; - dev->accel.dy = dev->accel.desty; - if (dev->accel.destx >= 0x600) dev->accel.dx |= ~0x5ff; + + dev->accel.dy = dev->accel.desty; if (dev->accel.desty >= 0x600) dev->accel.dy |= ~0x5ff; dev->accel.cx = dev->accel.cur_x; - dev->accel.cy = dev->accel.cur_y; - if (dev->accel.cur_x >= 0x600) dev->accel.cx |= ~0x5ff; + + dev->accel.cy = dev->accel.cur_y; if (dev->accel.cur_y >= 0x600) dev->accel.cy |= ~0x5ff; - dev->accel.src = dev->accel.cy * dev->pitch; - dev->accel.dest = dev->accel.dy * dev->pitch; + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + dev->accel.sy = dev->accel.multifunc[0] & 0x7ff; + + if ((dev->accel_bpp == 24) || (dev->accel_bpp <= 8)) { + dev->accel.src = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); + dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.dy * dev->pitch); + } else if (dev->bpp) { + dev->accel.src = (dev->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch); + dev->accel.dest = (dev->accel.ge_offset << 1) + (dev->accel.dy * dev->pitch); + } else { + dev->accel.src = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); + dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.dy * dev->pitch); + } dev->accel.fill_state = 0; if (ibm8514_cpu_src(svga)) { - if (dev->accel.cmd & 2) { + if (dev->accel.cmd & 0x02) { if (!(dev->accel.cmd & 0x1000)) { - dev->accel.sx += (dev->accel.cur_x & 3); - dev->accel.nibbleset = (uint8_t *) calloc(1, (dev->accel.sx >> 3) + 1); - dev->accel.writemono = (uint8_t *) calloc(1, (dev->accel.sx >> 3) + 1); - dev->accel.sys_cnt = (dev->accel.sx >> 3) + 1; + dev->accel.x_count = dev->accel.cx; + if (and3) { + if (dev->accel.cmd & 0x20) + dev->accel.x_count -= and3; + else + dev->accel.x_count += and3; + + dev->accel.sx += 8; + } } } dev->data_available = 0; @@ -3253,495 +2683,389 @@ rect_fill: } } - if (dev->accel.cmd & 2) { - if (cpu_input) { -bitblt_pix: - if (count < 8) { - while (count-- && (dev->accel.sy >= 0)) { - if (dev->accel.dx >= dev->accel.clip_left && dev->accel.dx <= clip_r && dev->accel.dy >= dev->accel.clip_top && dev->accel.dy <= clip_b) { - if (pixcntl == 3) { - if (!(dev->accel.cmd & 0x10) && ((frgd_mix != 3) || (bkgd_mix != 3))) { - READ(dev->accel.src + dev->accel.cx, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? mix_mask : 0; - } else if (dev->accel.cmd & 0x10) { - READ(dev->accel.src + dev->accel.cx, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? mix_mask : 0; - } - } - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: - src_dat = bkgd_color; - break; - case 1: - src_dat = frgd_color; - break; - case 2: - src_dat = cpu_dat; - break; - case 3: - READ(dev->accel.src + dev->accel.cx, src_dat); - if (pixcntl == 3) { - if (dev->accel.cmd & 0x10) { - src_dat = ((src_dat & rd_mask) == rd_mask); - } - } - break; - - default: - break; - } - - READ(dev->accel.dest + dev->accel.dx, dest_dat); - - if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { - old_dest_dat = dest_dat; - - MIX(mix_dat & mix_mask, dest_dat, src_dat); - dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - WRITE(dev->accel.dest + dev->accel.dx, dest_dat); - } - } - - mix_dat <<= 1; - mix_dat |= 1; - if (dev->bpp) - cpu_dat >>= 16; - else - cpu_dat >>= 8; - - if (dev->accel.cmd & 0x20) { - dev->accel.dx++; - dev->accel.cx++; - } else { - dev->accel.dx--; - dev->accel.cx--; - } - - dev->accel.sx--; - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - - if (dev->accel.cmd & 2) { - dev->accel.sx += (dev->accel.cur_x & 3); - } - - if (dev->accel.cmd & 0x20) { - dev->accel.dx -= (dev->accel.sx) + 1; - dev->accel.cx -= (dev->accel.sx) + 1; - } else { - dev->accel.dx += (dev->accel.sx) + 1; - dev->accel.cx += (dev->accel.sx) + 1; - } - - if (dev->accel.cmd & 0x80) { - dev->accel.dy++; - dev->accel.cy++; - } else { - dev->accel.dy--; - dev->accel.cy--; - } - - dev->accel.src = dev->accel.cy * dev->pitch; - dev->accel.dest = dev->accel.dy * dev->pitch; - dev->accel.sy--; - return; + ibm8514_log("BitBLT: full=%04x, odd=%d, c(%d,%d), d(%d,%d), xcount=%d, and3=%d, len(%d,%d), CURX=%d, Width=%d, pixcntl=%d, mix_dat=%08x, count=%d, cpu_data=%08x, cpu_input=%d.\n", dev->accel.cmd, dev->accel.input, dev->accel.cx, dev->accel.cy, dev->accel.dx, dev->accel.dy, dev->accel.x_count, and3, dev->accel.sx, dev->accel.sy, dev->accel.cur_x, dev->accel.maj_axis_pcnt, pixcntl, mix_dat, count, cpu_dat, cpu_input); + if (cpu_input) { + while (count-- && (dev->accel.sy >= 0)) { + if ((dev->accel.dx >= clip_l) && + (dev->accel.dx <= clip_r) && + (dev->accel.dy >= clip_t) && + (dev->accel.dy <= clip_b)) { + if (pixcntl == 3) { + if (!(dev->accel.cmd & 0x10) && ((frgd_mix != 3) || (bkgd_mix != 3))) { + READ(dev->accel.src + dev->accel.cx, mix_dat); + mix_dat = ((mix_dat & rd_mask) == rd_mask); + if (dev->accel.cmd & 0x02) + mix_dat = mix_dat ? 0x01 : 0x00; + else + mix_dat = mix_dat ? mix_mask : 0x00; + } else if (dev->accel.cmd & 0x10) { + READ(dev->accel.src + dev->accel.cx, mix_dat); + mix_dat = ((mix_dat & rd_mask) == rd_mask); + if (dev->accel.cmd & 0x02) + mix_dat = mix_dat ? 0x01 : 0x00; + else + mix_dat = mix_dat ? mix_mask : 0x00; } } - } else { - while (count-- && (dev->accel.sy >= 0)) { - if (dev->accel.dx >= dev->accel.clip_left && dev->accel.dx <= clip_r && dev->accel.dy >= dev->accel.clip_top && dev->accel.dy <= clip_b) { - if (pixcntl == 3) { - if (!(dev->accel.cmd & 0x10) && ((frgd_mix != 3) || (bkgd_mix != 3))) { - READ(dev->accel.src + dev->accel.cx, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? 1 : 0; - } else if (dev->accel.cmd & 0x10) { - READ(dev->accel.src + dev->accel.cx, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? 1 : 0; + if (dev->accel.cmd & 0x02) { + switch ((mix_dat & 0x01) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = cpu_dat; + break; + case 3: + READ(dev->accel.src + dev->accel.cx, src_dat); + if (pixcntl == 3) { + if (dev->accel.cmd & 0x10) + src_dat = ((src_dat & rd_mask) == rd_mask); } - } - switch ((mix_dat & 1) ? frgd_mix : bkgd_mix) { - case 0: - src_dat = bkgd_color; - break; - case 1: - src_dat = frgd_color; - break; - case 2: - src_dat = cpu_dat; - break; - case 3: - READ(dev->accel.src + dev->accel.cx, src_dat); - if (pixcntl == 3) { - if (dev->accel.cmd & 0x10) { - src_dat = ((src_dat & rd_mask) == rd_mask); - } - } - break; + break; - default: - break; - } - - READ(dev->accel.dest + dev->accel.dx, dest_dat); - - if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { - old_dest_dat = dest_dat; - MIX(mix_dat & 1, dest_dat, src_dat); - dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - WRITE(dev->accel.dest + dev->accel.dx, dest_dat); - } - } - - mix_dat >>= 1; - if (dev->bpp) - cpu_dat >>= 16; - else - cpu_dat >>= 8; - - if (dev->accel.cmd & 0x20) { - dev->accel.dx++; - dev->accel.cx++; - } else { - dev->accel.dx--; - dev->accel.cx--; - } - - dev->accel.sx--; - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - - if (dev->accel.cmd & 2) { - if (!(dev->accel.cmd & 0x1000)) - dev->accel.sx += (dev->accel.cur_x & 3); - } - - if (dev->accel.cmd & 0x20) { - dev->accel.dx -= (dev->accel.sx) + 1; - dev->accel.cx -= (dev->accel.sx) + 1; - } else { - dev->accel.dx += (dev->accel.sx) + 1; - dev->accel.cx += (dev->accel.sx) + 1; - } - - if (dev->accel.cmd & 2) { - if (dev->accel.cmd & 0x1000) { - dev->accel.cx = dev->accel.cur_x; - if (dev->accel.cur_x >= 0x600) - dev->accel.cx |= ~0x5ff; - dev->accel.dx = dev->accel.destx; - if (dev->accel.destx >= 0x600) - dev->accel.dx |= ~0x5ff; - } - } - - if (dev->accel.cmd & 0x80) { - dev->accel.dy++; - dev->accel.cy++; - } else { - dev->accel.dy--; - dev->accel.cy--; - } - - dev->accel.dest = dev->accel.dy * dev->pitch; - dev->accel.src = dev->accel.cy * dev->pitch; - dev->accel.sy--; - return; - } - } - } - } else { - goto bitblt; - } - } else { - if (cpu_input) { - if (pixcntl == 2) { - goto bitblt_pix; - } else { - while (count-- && (dev->accel.sy >= 0)) { - if (dev->accel.dx >= dev->accel.clip_left && dev->accel.dx <= clip_r && dev->accel.dy >= dev->accel.clip_top && dev->accel.dy <= clip_b) { - if (pixcntl == 3) { - if (!(dev->accel.cmd & 0x10) && ((frgd_mix != 3) || (bkgd_mix != 3))) { - READ(dev->accel.src + dev->accel.cx, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? mix_mask : 0; - } else if (dev->accel.cmd & 0x10) { - READ(dev->accel.src + dev->accel.cx, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? mix_mask : 0; - } - } - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: - src_dat = bkgd_color; - break; - case 1: - src_dat = frgd_color; - break; - case 2: - src_dat = cpu_dat; - break; - case 3: - READ(dev->accel.src + dev->accel.cx, src_dat); - if (pixcntl == 3) { - if (dev->accel.cmd & 0x10) { - src_dat = ((src_dat & rd_mask) == rd_mask); - } - } - break; - - default: - break; - } - - READ(dev->accel.dest + dev->accel.dx, dest_dat); - - if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { - old_dest_dat = dest_dat; - MIX(mix_dat & mix_mask, dest_dat, src_dat); - dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - WRITE(dev->accel.dest + dev->accel.dx, dest_dat); - } - } - - mix_dat <<= 1; - mix_dat |= 1; - if (dev->bpp) - cpu_dat >>= 16; - else - cpu_dat >>= 8; - - if (dev->accel.cmd & 0x20) { - dev->accel.dx++; - dev->accel.cx++; - } else { - dev->accel.dx--; - dev->accel.cx--; - } - - dev->accel.sx--; - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - - if (dev->accel.cmd & 0x20) { - dev->accel.dx -= (dev->accel.sx) + 1; - dev->accel.cx -= (dev->accel.sx) + 1; - } else { - dev->accel.dx += (dev->accel.sx) + 1; - dev->accel.cx += (dev->accel.sx) + 1; - } - - if (dev->accel.cmd & 0x80) { - dev->accel.dy++; - dev->accel.cy++; - } else { - dev->accel.dy--; - dev->accel.cy--; - } - - dev->accel.dest = dev->accel.dy * dev->pitch; - dev->accel.src = dev->accel.cy * dev->pitch; - dev->accel.sy--; - return; - } - } - } - } else { -bitblt: - if (pixcntl == 1) { - if (dev->accel.cmd & 0x40) { - count = dev->accel.maj_axis_pcnt + 1; - dev->accel.temp_cnt = 8; - while (count-- && dev->accel.sy >= 0) { - if (!dev->accel.temp_cnt) { - mix_dat >>= 8; - dev->accel.temp_cnt = 8; - } - if (dev->accel.dx >= dev->accel.clip_left && dev->accel.dx <= clip_r && dev->accel.dy >= dev->accel.clip_top && dev->accel.dy <= clip_b) { - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: - src_dat = bkgd_color; - break; - case 1: - src_dat = frgd_color; - break; - case 2: - src_dat = 0; - break; - case 3: - READ(dev->accel.src + dev->accel.cx, src_dat); - break; - - default: - break; - } - - READ(dev->accel.dest + dev->accel.dx, dest_dat); - - if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { - old_dest_dat = dest_dat; - MIX(mix_dat & mix_mask, dest_dat, src_dat); - dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - - WRITE(dev->accel.dest + dev->accel.dx, dest_dat); - } - } - - if (dev->accel.temp_cnt > 0) { - dev->accel.temp_cnt--; - mix_dat <<= 1; - mix_dat |= 1; - } - - if (dev->accel.cmd & 0x20) { - dev->accel.dx++; - dev->accel.cx++; - } else { - dev->accel.dx--; - dev->accel.cx--; - } - - dev->accel.sx--; - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - - if (dev->accel.cmd & 0x20) { - dev->accel.dx -= (dev->accel.sx) + 1; - dev->accel.cx -= (dev->accel.sx) + 1; - } else { - dev->accel.dx += (dev->accel.sx) + 1; - dev->accel.cx += (dev->accel.sx) + 1; - } - - if (dev->accel.cmd & 0x80) { - dev->accel.dy++; - dev->accel.cy++; - } else { - dev->accel.dy--; - dev->accel.cy--; - } - - dev->accel.dest = dev->accel.dy * dev->pitch; - dev->accel.src = dev->accel.cy * dev->pitch; - dev->accel.sy--; - return; - } + default: + break; } } else { - dev->accel.temp_cnt = 8; - while (count-- && dev->accel.sy >= 0) { - if (!dev->accel.temp_cnt) { - dev->accel.temp_cnt = 8; - mix_dat = old_mix_dat; - } - if (dev->accel.dx >= dev->accel.clip_left && dev->accel.dx <= clip_r && dev->accel.dy >= dev->accel.clip_top && dev->accel.dy <= clip_b) { - switch ((mix_dat & 1) ? frgd_mix : bkgd_mix) { - case 0: - src_dat = bkgd_color; - break; - case 1: - src_dat = frgd_color; - break; - case 2: - src_dat = 0; - break; - case 3: - READ(dev->accel.src + dev->accel.cx, src_dat); - break; - - default: - break; + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = cpu_dat; + break; + case 3: + READ(dev->accel.src + dev->accel.cx, src_dat); + if (pixcntl == 3) { + if (dev->accel.cmd & 0x10) + src_dat = ((src_dat & rd_mask) == rd_mask); } + break; - READ(dev->accel.dest + dev->accel.dx, dest_dat); + default: + break; + } + } - if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { - old_dest_dat = dest_dat; - MIX(mix_dat & 1, dest_dat, src_dat); - dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + READ(dev->accel.dest + dev->accel.dx, dest_dat); - WRITE(dev->accel.dest + dev->accel.dx, dest_dat); - } + if ((compare_mode == 0) || + ((compare_mode == 0x10) && (dest_dat >= compare)) || + ((compare_mode == 0x18) && (dest_dat < compare)) || + ((compare_mode == 0x20) && (dest_dat != compare)) || + ((compare_mode == 0x28) && (dest_dat == compare)) || + ((compare_mode == 0x30) && (dest_dat <= compare)) || + ((compare_mode == 0x38) && (dest_dat > compare))) { + old_dest_dat = dest_dat; + if (dev->accel.cmd & 0x02) { + MIX(mix_dat & 0x01, dest_dat, src_dat); + if ((dev->accel.x_count != dev->accel.cx) && !(dev->accel.cmd & 0x1000) && and3) + goto skip_nibble_bitblt_write; + + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + WRITE(dev->accel.dest + dev->accel.dx, dest_dat); + } else { + MIX(mix_dat & mix_mask, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + WRITE(dev->accel.dest + dev->accel.dx, dest_dat); + } + } + } + + if (dev->accel.cmd & 0x20) { + dev->accel.dx++; + dev->accel.cx++; + } else { + dev->accel.dx--; + dev->accel.cx--; + } + +skip_nibble_bitblt_write: + if (dev->accel.cmd & 0x20) + dev->accel.x_count++; + else + dev->accel.x_count--; + + if (dev->accel.cmd & 0x02) + mix_dat >>= 1; + else { + mix_dat <<= 1; + mix_dat |= 1; + } + + if (dev->bpp) + cpu_dat >>= 16; + else + cpu_dat >>= 8; + + dev->accel.sx--; + if (dev->accel.sx < 0) { + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + + if (dev->accel.cmd & 0x20) { + dev->accel.dx -= (dev->accel.sx + 1); + dev->accel.cx -= (dev->accel.sx + 1); + } else { + dev->accel.dx += (dev->accel.sx + 1); + dev->accel.cx += (dev->accel.sx + 1); + } + + if (dev->accel.cmd & 0x80) { + dev->accel.dy++; + dev->accel.cy++; + } else { + dev->accel.dy--; + dev->accel.cy--; + } + + if ((dev->accel_bpp == 24) || (dev->accel_bpp <= 8)) { + dev->accel.src = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); + dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.dy * dev->pitch); + } else if (dev->bpp) { + dev->accel.src = (dev->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch); + dev->accel.dest = (dev->accel.ge_offset << 1) + (dev->accel.dy * dev->pitch); + } else { + dev->accel.src = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); + dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.dy * dev->pitch); + } + + dev->accel.sy--; + dev->accel.x_count = 0; + return; + } + } + } else { + if (pixcntl == 1) { + if (dev->accel.cmd & 0x40) { + count = (dev->accel.maj_axis_pcnt & 0x7ff) + 1; + dev->accel.temp_cnt = 8; + while (count-- && (dev->accel.sy >= 0)) { + if (!dev->accel.temp_cnt) { + mix_dat >>= 8; + dev->accel.temp_cnt = 8; + } + if ((dev->accel.dx >= clip_l) && + (dev->accel.dx <= clip_r) && + (dev->accel.dy >= clip_t) && + (dev->accel.dy <= clip_b)) { + switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = 0; + break; + case 3: + READ(dev->accel.src + dev->accel.cx, src_dat); + break; + + default: + break; } + READ(dev->accel.dest + dev->accel.dx, dest_dat); + + if ((compare_mode == 0) || + ((compare_mode == 0x10) && (dest_dat >= compare)) || + ((compare_mode == 0x18) && (dest_dat < compare)) || + ((compare_mode == 0x20) && (dest_dat != compare)) || + ((compare_mode == 0x28) && (dest_dat == compare)) || + ((compare_mode == 0x30) && (dest_dat <= compare)) || + ((compare_mode == 0x38) && (dest_dat > compare))) { + old_dest_dat = dest_dat; + MIX(mix_dat & mix_mask, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + WRITE(dev->accel.dest + dev->accel.dx, dest_dat); + } + } + + if (dev->accel.temp_cnt > 0) { dev->accel.temp_cnt--; - mix_dat >>= 1; + mix_dat <<= 1; + mix_dat |= 1; + } + + if (dev->accel.cmd & 0x20) { + dev->accel.dx++; + dev->accel.cx++; + } else { + dev->accel.dx--; + dev->accel.cx--; + } + + dev->accel.sx--; + if (dev->accel.sx < 0) { + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; if (dev->accel.cmd & 0x20) { - dev->accel.dx++; - dev->accel.cx++; + dev->accel.dx -= (dev->accel.sx + 1); + dev->accel.cx -= (dev->accel.sx + 1); } else { - dev->accel.dx--; - dev->accel.cx--; + dev->accel.dx += (dev->accel.sx + 1); + dev->accel.cx += (dev->accel.sx + 1); } - dev->accel.sx--; - if (dev->accel.sx < 0) { - dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - - if (dev->accel.cmd & 0x20) { - dev->accel.dx -= (dev->accel.sx) + 1; - dev->accel.cx -= (dev->accel.sx) + 1; - } else { - dev->accel.dx += (dev->accel.sx) + 1; - dev->accel.cx += (dev->accel.sx) + 1; - } - - if (dev->accel.cmd & 0x80) { - dev->accel.dy++; - dev->accel.cy++; - } else { - dev->accel.dy--; - dev->accel.cy--; - } - - dev->accel.dest = dev->accel.dy * dev->pitch; - dev->accel.src = dev->accel.cy * dev->pitch; - dev->accel.sy--; - - if (dev->accel.sy < 0) { - return; - } + if (dev->accel.cmd & 0x80) { + dev->accel.dy++; + dev->accel.cy++; + } else { + dev->accel.dy--; + dev->accel.cy--; } + + if ((dev->accel_bpp == 24) || (dev->accel_bpp <= 8)) { + dev->accel.src = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); + dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.dy * dev->pitch); + } else if (dev->bpp) { + dev->accel.src = (dev->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch); + dev->accel.dest = (dev->accel.ge_offset << 1) + (dev->accel.dy * dev->pitch); + } else { + dev->accel.src = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); + dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.dy * dev->pitch); + } + + dev->accel.sy--; + return; } } } else { - if ((dev->accel_bpp == 24) && ((dev->local & 0xff) >= 0x02) && (dev->accel.cmd == 0xc2b5)) { - int64_t cx; - int64_t dx; + dev->accel.temp_cnt = 8; + while (count-- && (dev->accel.sy >= 0)) { + if (!dev->accel.temp_cnt) { + dev->accel.temp_cnt = 8; + mix_dat = old_mix_dat; + } + if ((dev->accel.dx >= clip_l) && + (dev->accel.dx <= clip_r) && + (dev->accel.dy >= clip_t) && + (dev->accel.dy <= clip_b)) { + switch ((mix_dat & 0x01) ? frgd_mix : bkgd_mix) { + case 0: + src_dat = bkgd_color; + break; + case 1: + src_dat = frgd_color; + break; + case 2: + src_dat = 0; + break; + case 3: + READ(dev->accel.src + dev->accel.cx, src_dat); + break; - cx = (int64_t) dev->accel.cx; - dx = (int64_t) dev->accel.dx; - - while (1) { - if ((dx >= (((int64_t)dev->accel.clip_left) * 3)) && (dx <= (((uint64_t)clip_r) * 3)) && - (dev->accel.dy >= (dev->accel.clip_top << 1)) && (dev->accel.dy <= (clip_b << 1))) { - - READ(dev->accel.src + (dev->accel.ge_offset << 2) + cx, src_dat); - READ(dev->accel.dest + (dev->accel.ge_offset << 2) + dx, dest_dat); - - dest_dat = (src_dat & wrt_mask) | (dest_dat & ~wrt_mask); - - WRITE(dev->accel.dest + (dev->accel.ge_offset << 2) + dx, dest_dat); + default: + break; } - cx++; - dx++; + READ(dev->accel.dest + dev->accel.dx, dest_dat); - dev->accel.sx--; - if (dev->accel.sx < 0) - return; + if ((compare_mode == 0) || + ((compare_mode == 0x10) && (dest_dat >= compare)) || + ((compare_mode == 0x18) && (dest_dat < compare)) || + ((compare_mode == 0x20) && (dest_dat != compare)) || + ((compare_mode == 0x28) && (dest_dat == compare)) || + ((compare_mode == 0x30) && (dest_dat <= compare)) || + ((compare_mode == 0x38) && (dest_dat > compare))) { + old_dest_dat = dest_dat; + MIX(mix_dat & 0x01, dest_dat, src_dat); + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); + WRITE(dev->accel.dest + dev->accel.dx, dest_dat); + } } - return; - } - ibm8514_log("BitBLT 8514/A=%04x, selfrmix=%d, selbkmix=%d, d(%d,%d), c(%d,%d), pixcntl=%d, sy=%d, frgdmix=%02x, bkgdmix=%02x, rdmask=%02x, wrtmask=%02x, linedraw=%d.\n", dev->accel.cmd, frgd_mix, bkgd_mix, dev->accel.dx, dev->accel.dy, dev->accel.cx, dev->accel.cy, pixcntl, dev->accel.sy, dev->accel.frgd_mix & 0x1f, dev->accel.bkgd_mix & 0x1f, dev->accel.rd_mask, wrt_mask, dev->accel.linedraw); + dev->accel.temp_cnt--; + mix_dat >>= 1; + + if (dev->accel.cmd & 0x20) { + dev->accel.dx++; + dev->accel.cx++; + } else { + dev->accel.dx--; + dev->accel.cx--; + } + + dev->accel.sx--; + if (dev->accel.sx < 0) { + dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; + + if (dev->accel.cmd & 0x20) { + dev->accel.dx -= (dev->accel.sx + 1); + dev->accel.cx -= (dev->accel.sx + 1); + } else { + dev->accel.dx += (dev->accel.sx + 1); + dev->accel.cx += (dev->accel.sx + 1); + } + + if (dev->accel.cmd & 0x80) { + dev->accel.dy++; + dev->accel.cy++; + } else { + dev->accel.dy--; + dev->accel.cy--; + } + + if ((dev->accel_bpp == 24) || (dev->accel_bpp <= 8)) { + dev->accel.src = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); + dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.dy * dev->pitch); + } else if (dev->bpp) { + dev->accel.src = (dev->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch); + dev->accel.dest = (dev->accel.ge_offset << 1) + (dev->accel.dy * dev->pitch); + } else { + dev->accel.src = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); + dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.dy * dev->pitch); + } + dev->accel.sy--; + + if (dev->accel.sy < 0) { + dev->accel.destx = dev->accel.dx; + dev->accel.desty = dev->accel.dy; + return; + } + } + } + } + } else { + if ((dev->accel_bpp == 24) && (dev->accel.cmd == 0xc2b5)) { + int64_t cx; + int64_t dx; + + cx = (int64_t) dev->accel.cx; + dx = (int64_t) dev->accel.dx; + + while (1) { + if ((dx >= (((int64_t)clip_l) * 3)) && + (dx <= (((uint64_t)clip_r) * 3)) && + (dev->accel.dy >= (clip_t << 1)) && + (dev->accel.dy <= (clip_b << 1))) { + + READ(dev->accel.src + cx, src_dat); + READ(dev->accel.dest + dx, dest_dat); + dest_dat = (src_dat & wrt_mask) | (dest_dat & ~wrt_mask); + WRITE(dev->accel.dest + dx, dest_dat); + } + + cx++; + dx++; + + dev->accel.sx--; + if (dev->accel.sx < 0) + return; + } + } else { while (count-- && dev->accel.sy >= 0) { - if ((dev->accel.dx >= dev->accel.clip_left) && (dev->accel.dx <= clip_r) && - (dev->accel.dy >= dev->accel.clip_top) && (dev->accel.dy <= clip_b)) { + if ((dev->accel.dx >= clip_l) && + (dev->accel.dx <= clip_r) && + (dev->accel.dy >= clip_t) && + (dev->accel.dy <= clip_b)) { if (pixcntl == 3) { if (!(dev->accel.cmd & 0x10) && ((frgd_mix != 3) || (bkgd_mix != 3))) { READ(dev->accel.src + dev->accel.cx, mix_dat); @@ -3766,9 +3090,8 @@ bitblt: case 3: READ(dev->accel.src + dev->accel.cx, src_dat); if (pixcntl == 3) { - if ((dev->accel.cmd & 0x10) && !(dev->accel.cmd & 0x40)) { + if ((dev->accel.cmd & 0x10) && !(dev->accel.cmd & 0x40)) src_dat = ((src_dat & rd_mask) == rd_mask); - } } break; @@ -3778,12 +3101,18 @@ bitblt: READ(dev->accel.dest + dev->accel.dx, dest_dat); - if ((compare_mode == 0) || ((compare_mode == 0x10) && (dest_dat >= compare)) || ((compare_mode == 0x18) && (dest_dat < compare)) || ((compare_mode == 0x20) && (dest_dat != compare)) || ((compare_mode == 0x28) && (dest_dat == compare)) || ((compare_mode == 0x30) && (dest_dat <= compare)) || ((compare_mode == 0x38) && (dest_dat > compare))) { + if ((compare_mode == 0) || + ((compare_mode == 0x10) && (dest_dat >= compare)) || + ((compare_mode == 0x18) && (dest_dat < compare)) || + ((compare_mode == 0x20) && (dest_dat != compare)) || + ((compare_mode == 0x28) && (dest_dat == compare)) || + ((compare_mode == 0x30) && (dest_dat <= compare)) || + ((compare_mode == 0x38) && (dest_dat > compare))) { old_dest_dat = dest_dat; MIX(mix_dat & mix_mask, dest_dat, src_dat); dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); - if (dev->accel.cmd & 4) { - if (dev->accel.sx > 0) { + if (dev->accel.cmd & 0x04) { + if (dev->accel.sx) { WRITE(dev->accel.dest + dev->accel.dx, dest_dat); } } else { @@ -3808,15 +3137,13 @@ bitblt: dev->accel.fill_state = 0; dev->accel.sx = dev->accel.maj_axis_pcnt & 0x7ff; - dev->accel.dx = dev->accel.destx; - - if (dev->accel.destx >= 0x600) - dev->accel.dx |= ~0x5ff; - - dev->accel.cx = dev->accel.cur_x; - - if (dev->accel.cur_x >= 0x600) - dev->accel.cx |= ~0x5ff; + if (dev->accel.cmd & 0x20) { + dev->accel.dx -= (dev->accel.sx + 1); + dev->accel.cx -= (dev->accel.sx + 1); + } else { + dev->accel.dx += (dev->accel.sx + 1); + dev->accel.cx += (dev->accel.sx + 1); + } if (dev->accel.cmd & 0x80) { dev->accel.dy++; @@ -3826,12 +3153,23 @@ bitblt: dev->accel.cy--; } - dev->accel.dest = dev->accel.dy * dev->pitch; - dev->accel.src = dev->accel.cy * dev->pitch; + if ((dev->accel_bpp == 24) || (dev->accel_bpp <= 8)) { + dev->accel.src = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); + dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.dy * dev->pitch); + } else if (dev->bpp) { + dev->accel.src = (dev->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch); + dev->accel.dest = (dev->accel.ge_offset << 1) + (dev->accel.dy * dev->pitch); + } else { + dev->accel.src = (dev->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); + dev->accel.dest = (dev->accel.ge_offset << 2) + (dev->accel.dy * dev->pitch); + } dev->accel.sy--; - if (dev->accel.sy < 0) + if (dev->accel.sy < 0) { + dev->accel.destx = dev->accel.dx; + dev->accel.desty = dev->accel.dy; return; + } } } } @@ -3882,16 +3220,16 @@ ibm8514_render_8bpp(svga_t *svga) for (int x = 0; x <= dev->h_disp; x += 8) { dat = *(uint32_t *) (&dev->vram[dev->ma & dev->vram_mask]); - p[0] = dev->pallook[dat & 0xff]; - p[1] = dev->pallook[(dat >> 8) & 0xff]; - p[2] = dev->pallook[(dat >> 16) & 0xff]; - p[3] = dev->pallook[(dat >> 24) & 0xff]; + p[0] = dev->pallook[dat & dev->dac_mask]; + p[1] = dev->pallook[(dat >> 8) & dev->dac_mask]; + p[2] = dev->pallook[(dat >> 16) & dev->dac_mask]; + p[3] = dev->pallook[(dat >> 24) & dev->dac_mask]; dat = *(uint32_t *) (&dev->vram[(dev->ma + 4) & dev->vram_mask]); - p[4] = dev->pallook[dat & 0xff]; - p[5] = dev->pallook[(dat >> 8) & 0xff]; - p[6] = dev->pallook[(dat >> 16) & 0xff]; - p[7] = dev->pallook[(dat >> 24) & 0xff]; + p[4] = dev->pallook[dat & dev->dac_mask]; + p[5] = dev->pallook[(dat >> 8) & dev->dac_mask]; + p[6] = dev->pallook[(dat >> 16) & dev->dac_mask]; + p[7] = dev->pallook[(dat >> 24) & dev->dac_mask]; dev->ma += 8; p += 8; @@ -4147,7 +3485,7 @@ ibm8514_poll(void *priv) int wy; ibm8514_log("IBM 8514/A poll.\n"); - if (dev->on[0] || dev->on[1]) { + if (dev->on) { ibm8514_log("ON!\n"); if (!dev->linepos) { if ((dev->displine == ((dev->hwcursor_latch.y < 0) ? 0 : dev->hwcursor_latch.y)) && dev->hwcursor_latch.ena) { @@ -4302,7 +3640,7 @@ ibm8514_recalctimings(svga_t *svga) } else #endif { - if (dev->on[0]) { + if (dev->on) { dev->h_total = dev->htotal + 1; dev->rowcount = !!(dev->disp_cntl & 0x08); @@ -4336,6 +3674,11 @@ ibm8514_recalctimings(svga_t *svga) dev->pitch = 1024; dev->rowoffset = 0x80; svga->map8 = dev->pallook; + if (dev->vram_512k_8514) { + if (dev->h_disp == 640) + dev->pitch = 640; + } + dev->accel_bpp = 8; svga->render8514 = ibm8514_render_8bpp; ibm8514_log("BPP=%d, Pitch = %d, rowoffset = %d, crtc13 = %02x, highres bit = %02x, has_vga? = %d.\n", dev->bpp, dev->pitch, dev->rowoffset, svga->crtc[0x13], dev->accel.advfunc_cntl & 4, !ibm8514_standalone_enabled); } @@ -4382,8 +3725,7 @@ ibm8514_mca_reset(void *priv) ibm8514_t *dev = (ibm8514_t *) svga->dev8514; ibm8514_log("MCA reset.\n"); - dev->on[0] = 0; - dev->on[1] = 0; + dev->on = 0; vga_on = 1; #ifdef ATI_8514_ULTRA if (dev->extensions) @@ -4391,6 +3733,8 @@ ibm8514_mca_reset(void *priv) else #endif ibm8514_mca_write(0x102, 0, svga); + + timer_set_callback(&svga->timer, svga_poll); } static void * @@ -4409,12 +3753,15 @@ ibm8514_init(const device_t *info) svga->dev8514 = dev; svga->ext8514 = NULL; - dev->vram_size = 1024 << 10; + dev->vram_amount = device_get_config_int("memory"); + dev->vram_512k_8514 = dev->vram_amount == 512; + dev->vram_size = dev->vram_amount << 10; dev->vram = calloc(dev->vram_size, 1); dev->changedvram = calloc((dev->vram_size >> 12) + 1, 1); dev->vram_mask = dev->vram_size - 1; dev->map8 = dev->pallook; dev->local = 0; + dev->accel_bpp = 8; dev->type = info->flags; dev->bpp = 0; @@ -4450,6 +3797,7 @@ ibm8514_init(const device_t *info) 0x1000, MEM_MAPPING_EXTERNAL); ati_eeprom_load(&mach->eeprom, "ati8514.nvr", 0); mach->accel.scratch0 = (((bios_addr >> 7) - 0x1000) >> 4); + mach->accel.scratch1 = mach->accel.scratch0 - 0x80; } ati8514_init(svga, svga->ext8514, svga->dev8514); break; @@ -4519,6 +3867,25 @@ ibm8514_force_redraw(void *priv) #ifdef ATI_8514_ULTRA // clang-format off static const device_config_t ext8514_config[] = { + { + .name = "memory", + .description = "Memory size", + .type = CONFIG_SELECTION, + .default_int = 1024, + .selection = { + { + .description = "512 KB", + .value = 512 + }, + { + .description = "1 MB", + .value = 1024 + }, + { + .description = "" + } + } + }, { .name = "extensions", .description = "Vendor", @@ -4566,6 +3933,32 @@ static const device_config_t ext8514_config[] = { .type = CONFIG_END } }; +#else +// clang-format off +static const device_config_t ext8514_config[] = { + { + .name = "memory", + .description = "Memory size", + .type = CONFIG_SELECTION, + .default_int = 1024, + .selection = { + { + .description = "512 KB", + .value = 512 + }, + { + .description = "1 MB", + .value = 1024 + }, + { + .description = "" + } + } + }, + { + .type = CONFIG_END + } +}; #endif // clang-format off @@ -4580,11 +3973,7 @@ const device_t gen8514_isa_device = { { .available = NULL }, .speed_changed = ibm8514_speed_changed, .force_redraw = ibm8514_force_redraw, -#ifdef ATI_8514_ULTRA .config = ext8514_config -#else - .config = NULL -#endif }; const device_t ibm8514_mca_device = { @@ -4598,11 +3987,7 @@ const device_t ibm8514_mca_device = { { .available = NULL }, .speed_changed = ibm8514_speed_changed, .force_redraw = ibm8514_force_redraw, -#ifdef ATI_8514_ULTRA .config = ext8514_config -#else - .config = NULL -#endif }; diff --git a/src/video/vid_ati68860_ramdac.c b/src/video/vid_ati68860_ramdac.c index ac2a0f7cb..cb6de4353 100644 --- a/src/video/vid_ati68860_ramdac.c +++ b/src/video/vid_ati68860_ramdac.c @@ -74,16 +74,16 @@ ati68860_ramdac_out(uint16_t addr, uint8_t val, void *priv, svga_t *svga) switch (addr) { case 0: - svga_out((dev && (dev->on[0] || dev->on[1])) ? 0x2ec : 0x3c8, val, svga); + svga_out((dev && dev->on) ? 0x2ec : 0x3c8, val, svga); break; case 1: - svga_out((dev && (dev->on[0] || dev->on[1])) ? 0x2ed : 0x3c9, val, svga); + svga_out((dev && dev->on) ? 0x2ed : 0x3c9, val, svga); break; case 2: - svga_out((dev && (dev->on[0] || dev->on[1])) ? 0x2ea : 0x3c6, val, svga); + svga_out((dev && dev->on) ? 0x2ea : 0x3c6, val, svga); break; case 3: - svga_out((dev && (dev->on[0] || dev->on[1])) ? 0x2eb : 0x3c7, val, svga); + svga_out((dev && dev->on) ? 0x2eb : 0x3c7, val, svga); break; default: ramdac->regs[addr & 0xf] = val; @@ -181,16 +181,16 @@ ati68860_ramdac_in(uint16_t addr, void *priv, svga_t *svga) switch (addr) { case 0: - temp = svga_in((dev && (dev->on[0] || dev->on[1])) ? 0x2ec : 0x3c8, svga); + temp = svga_in((dev && dev->on) ? 0x2ec : 0x3c8, svga); break; case 1: - temp = svga_in((dev && (dev->on[0] || dev->on[1])) ? 0x2ed : 0x3c9, svga); + temp = svga_in((dev && dev->on) ? 0x2ed : 0x3c9, svga); break; case 2: - temp = svga_in((dev && (dev->on[0] || dev->on[1])) ? 0x2ea : 0x3c6, svga); + temp = svga_in((dev && dev->on) ? 0x2ea : 0x3c6, svga); break; case 3: - temp = svga_in((dev && (dev->on[0] || dev->on[1])) ? 0x2eb : 0x3c7, svga); + temp = svga_in((dev && dev->on) ? 0x2eb : 0x3c7, svga); break; case 4: case 8: diff --git a/src/video/vid_ati_mach8.c b/src/video/vid_ati_mach8.c index d41f65ed9..7ef0d2475 100644 --- a/src/video/vid_ati_mach8.c +++ b/src/video/vid_ati_mach8.c @@ -117,9 +117,8 @@ mach_log(const char *fmt, ...) mach->accel.pix_trans[(n)] = vram_w[(dev->accel.dest + (cx) + (n)) & (dev->vram_mask >> 1)] & 0xff; \ else \ mach->accel.pix_trans[(n)] = vram_w[(dev->accel.dest + (cx) + (n)) & (dev->vram_mask >> 1)] >> 8; \ - } else { \ + } else \ mach->accel.pix_trans[(n)] = dev->vram[(dev->accel.dest + (cx) + (n)) & dev->vram_mask]; \ - } \ } #define READ_PIXTRANS_WORD(cx, n) \ @@ -152,6 +151,9 @@ mach_log(const char *fmt, ...) else \ dat = dev->vram[(addr) & (dev->vram_mask)]; +#define READ_HIGH(addr, dat) \ + dat |= (dev->vram[(addr) & (dev->vram_mask)] << 8); + #define MIX(mixmode, dest_dat, src_dat) \ { \ switch ((mixmode) ? (dev->accel.frgd_mix & 0x1f) : (dev->accel.bkgd_mix & 0x1f)) { \ @@ -237,7 +239,10 @@ mach_log(const char *fmt, ...) dest_dat = MAX(0, (src_dat - dest_dat)); \ break; \ case 0x1b: \ - dest_dat = MIN(0xff, (dest_dat + src_dat)); \ + if (dev->bpp) \ + dest_dat = MIN(0xffff, (dest_dat + src_dat)); \ + else \ + dest_dat = MIN(0xff, (dest_dat + src_dat)); \ break; \ case 0x1c: \ dest_dat = MAX(0, (dest_dat - src_dat)) / 2; \ @@ -249,7 +254,10 @@ mach_log(const char *fmt, ...) dest_dat = MAX(0, (src_dat - dest_dat)) / 2; \ break; \ case 0x1f: \ - dest_dat = (0xff < (src_dat + dest_dat)) ? 0xff : ((src_dat + dest_dat) / 2); \ + if (dev->bpp) \ + dest_dat = (0xffff < (src_dat + dest_dat)) ? 0xffff : ((src_dat + dest_dat) / 2); \ + else \ + dest_dat = (0xff < (src_dat + dest_dat)) ? 0xff : ((src_dat + dest_dat) / 2); \ break; \ } \ } @@ -299,12 +307,12 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 uint16_t old_dest_dat; uint16_t *vram_w = (uint16_t *) dev->vram; uint16_t mix = 0; - int16_t clip_l = dev->accel.clip_left & 0x7ff; - int16_t clip_t = dev->accel.clip_top & 0x7ff; - int16_t clip_r = dev->accel.multifunc[4] & 0x7ff; - int16_t clip_b = dev->accel.multifunc[3] & 0x7ff; uint32_t mono_dat0 = 0; uint32_t mono_dat1 = 0; + int16_t clip_t = dev->accel.multifunc[1] & 0x7ff; + int16_t clip_l = dev->accel.multifunc[2] & 0x7ff; + int16_t clip_b = dev->accel.multifunc[3] & 0x7ff; + int16_t clip_r = dev->accel.multifunc[4] & 0x7ff; if (!dev->bpp) { rd_mask &= 0xff; @@ -324,17 +332,13 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (cpu_input) { if (dev->bpp) { - if ((mach->accel.dp_config & 0x200) && (count == 2)) { + if ((mach->accel.dp_config & 0x200) && (count == 2)) count >>= 1; - } } } - if ((dev->accel_bpp == 8) || (dev->accel_bpp == 15) || (dev->accel_bpp == 16) || (dev->accel_bpp == 24)) { - if ((cmd_type == 2) && cpu_input) { - mach_log("RdMask=%04x, DPCONFIG=%04x, Clipping: l=%d, r=%d, t=%d, b=%d, LineDrawOpt=%04x, BPP=%d, CMDType = %d, offs=%08x, cnt = %d, input = %d, mono_src = %d, frgdsel = %d, d(%d,%d), dstxend = %d, pitch = %d, extcrt = %d, rw = %x, monpattern = %x.\n", rd_mask, mach->accel.dp_config, clip_l, clip_r, clip_t, clip_b, mach->accel.linedraw_opt, dev->accel_bpp, cmd_type, mach->accel.ge_offset, count, cpu_input, mono_src, frgd_sel, dev->accel.cur_x, dev->accel.cur_y, mach->accel.dest_x_end, dev->ext_pitch, dev->ext_crt_pitch, mach->accel.dp_config & 1, mach->accel.mono_pattern_enable); - } - } + if ((dev->accel_bpp == 8) || (dev->accel_bpp == 15) || (dev->accel_bpp == 16) || (dev->accel_bpp == 24)) + mach_log("RdMask=%04x, DPCONFIG=%04x, Clipping: l=%d, r=%d, t=%d, b=%d, LineDrawOpt=%04x, BPP=%d, CMDType = %d, offs=%08x, cnt = %d, input = %d, mono_src = %d, frgdsel = %d, d(%d,%d), dstxend = %d, pitch = %d, extcrt = %d, rw = %x, monpattern = %x.\n", dev->accel.rd_mask, mach->accel.dp_config, clip_l, clip_r, clip_t, clip_b, mach->accel.linedraw_opt, dev->accel_bpp, cmd_type, mach->accel.ge_offset, count, cpu_input, mono_src, frgd_sel, dev->accel.cur_x, dev->accel.cur_y, mach->accel.dest_x_end, dev->ext_pitch, dev->ext_crt_pitch, mach->accel.dp_config & 1, mach->accel.mono_pattern_enable); switch (cmd_type) { case 1: /*Extended Raw Linedraw from bres_count register (0x96ee)*/ @@ -342,6 +346,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 dev->accel.dx = dev->accel.cur_x; if (dev->accel.cur_x >= 0x600) dev->accel.dx |= ~0x5ff; + dev->accel.dy = dev->accel.cur_y; if (dev->accel.cur_y >= 0x600) dev->accel.dy |= ~0x5ff; @@ -349,6 +354,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 dev->accel.cx = dev->accel.destx_distp; if (dev->accel.destx_distp >= 0x600) dev->accel.cx |= ~0x5ff; + dev->accel.cy = dev->accel.desty_axstp; if (dev->accel.desty_axstp >= 0x600) dev->accel.cy |= ~0x5ff; @@ -357,8 +363,6 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 dev->accel.sx = 0; mach->accel.poly_fill = 0; - mach->accel.color_pattern_idx = ((dev->accel.cx + (dev->accel.cy << 3)) & mach->accel.patt_len); - mach->accel.stepx = (mach->accel.linedraw_opt & 0x20) ? 1 : -1; mach->accel.stepy = (mach->accel.linedraw_opt & 0x80) ? 1 : -1; @@ -377,19 +381,9 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 } } - if (frgd_sel == 5) { - for (int x = 0; x <= mach->accel.patt_len; x++) { - mach->accel.color_pattern[x] = mach->accel.patt_data[x & mach->accel.patt_len]; - } - - /*The destination coordinates should match the pattern index.*/ - if (mach->accel.color_pattern_idx != mach->accel.patt_idx) - mach->accel.color_pattern_idx = mach->accel.patt_idx; - } - if (mono_src == 1) { - count = mach->accel.width; - mix_dat = mach->accel.patt_data[0x10]; + count = mach->accel.width; + mix_dat = mach->accel.mono_pattern_normal[0]; dev->accel.temp_cnt = 8; } @@ -404,7 +398,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 dev->accel.temp_cnt = 8; mix_dat >>= 8; } - mix = (mix_dat & 0x80); + mix = !!(mix_dat & 0x80); dev->accel.temp_cnt--; mix_dat <<= 1; mix_dat |= 1; @@ -415,10 +409,10 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 mix_dat <<= 1; } else { if (mach->accel.dp_config & 0x200) { - mix = mix_dat & 1; + mix = mix_dat & 0x01; mix_dat >>= 1; } else { - mix = mix_dat & 0x80; + mix = !!(mix_dat & 0x80); mix_dat <<= 1; mix_dat |= 1; } @@ -437,7 +431,10 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 break; } - if (((dev->accel.dx) >= clip_l) && ((dev->accel.dx) <= clip_r) && ((dev->accel.dy) >= clip_t) && ((dev->accel.dy) <= clip_b)) { + if ((dev->accel.dx >= clip_l) && + (dev->accel.dx <= clip_r) && + (dev->accel.dy >= clip_t) && + (dev->accel.dy <= clip_b)) { switch (mix ? frgd_sel : bkgd_sel) { case 0: src_dat = dev->accel.bkgd_color; @@ -453,20 +450,18 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 src_dat = cpu_dat; else { if (dev->bpp) { - READ((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), src_dat); + READ((mach->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch) + dev->accel.cx, src_dat); } else { - READ((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), src_dat); + READ((mach->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch) + dev->accel.cx, src_dat); } - if (mono_src == 3) { + if (mono_src == 3) src_dat = (src_dat & rd_mask) == rd_mask; - } } break; case 5: - if (mix) { - src_dat = mach->accel.color_pattern[((dev->accel.dx) + ((dev->accel.dy) << 3)) & mach->accel.patt_len]; - } else - src_dat = 0; + src_dat = mach->accel.color_pattern[mach->accel.color_pattern_idx]; + if (dev->bpp) + src_dat |= (mach->accel.color_pattern[mach->accel.color_pattern_idx + 1] << 8); break; default: @@ -556,6 +551,14 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 else cpu_dat >>= 8; + if (dev->bpp) + mach->accel.color_pattern_idx += 2; + else + mach->accel.color_pattern_idx++; + + if (mach->accel.color_pattern_idx > mach->accel.patt_len) + mach->accel.color_pattern_idx = 0; + switch (mach->accel.linedraw_opt & 0xe0) { case 0x00: dev->accel.cx++; @@ -648,7 +651,10 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 break; } - if (((dev->accel.dx) >= clip_l) && ((dev->accel.dx) <= clip_r) && ((dev->accel.dy) >= clip_t) && ((dev->accel.dy) <= clip_b)) { + if ((dev->accel.dx >= clip_l) && + (dev->accel.dx <= clip_r) && + (dev->accel.dy >= clip_t) && + (dev->accel.dy <= clip_b)) { switch (mix ? frgd_sel : bkgd_sel) { case 0: src_dat = dev->accel.bkgd_color; @@ -674,10 +680,9 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 } break; case 5: - if (mix) { - src_dat = mach->accel.color_pattern[((dev->accel.dx) + ((dev->accel.dy) << 3)) & mach->accel.patt_len]; - } else - src_dat = 0; + src_dat = mach->accel.color_pattern[mach->accel.color_pattern_idx]; + if (dev->bpp) + src_dat |= (mach->accel.color_pattern[mach->accel.color_pattern_idx + 1] << 8); break; default: @@ -767,6 +772,14 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 else cpu_dat >>= 8; + if (dev->bpp) + mach->accel.color_pattern_idx += 2; + else + mach->accel.color_pattern_idx++; + + if (mach->accel.color_pattern_idx > mach->accel.patt_len) + mach->accel.color_pattern_idx = 0; + if (mach->accel.linedraw_opt & 0x40) { dev->accel.dy += mach->accel.stepy; if ((frgd_sel == 3) || (bkgd_sel == 3)) @@ -817,9 +830,8 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 dev->accel.dy |= ~0x5ff; if (mach->accel.dp_config == 0x5211) { - if (mach->accel.dest_x_end == 1024) { + if (mach->accel.dest_x_end == 1024) goto skip_dx; - } } /*Destination Width*/ if (mach->accel.dest_x_start != dev->accel.dx) @@ -849,14 +861,8 @@ skip_dx: mach_log("BitBLT: Dst Indeterminate X, dpconfig = %04x, destxend = %d, destxstart = %d.\n", mach->accel.dp_config, mach->accel.dest_x_end, mach->accel.dest_x_start); } - dev->accel.sx = 0; - mach->accel.poly_fill = 0; - mach->accel.color_pattern_idx = ((dev->accel.dx + (dev->accel.dy << 3)) & mach->accel.patt_len); - if ((dev->accel_bpp == 24) && (mono_src != 1)) { - if (mach->accel.color_pattern_idx == mach->accel.patt_len) - mach->accel.color_pattern_idx = mach->accel.patt_data_idx; - } else if ((dev->accel_bpp == 24) && (frgd_sel == 5) && (mono_src == 1) && (mach->accel.patt_len_reg & 0x4000)) - mach->accel.color_pattern_idx = 0; + dev->accel.sx = 0; + mach->accel.poly_fill = 0; /*Height*/ mach->accel.dy_start = dev->accel.cur_y; @@ -878,13 +884,16 @@ skip_dx: } dev->accel.sy = 0; - if (dev->bpp) - dev->accel.dest = (mach->accel.ge_offset << 1) + (dev->accel.dy * (dev->pitch)); - else - dev->accel.dest = (mach->accel.ge_offset << 2) + (dev->accel.dy * (dev->pitch)); + if (mach->accel.dp_config & 0x02) + dev->accel.dest = (dev->accel.dy * dev->pitch); + else { + if (dev->bpp) + dev->accel.dest = (mach->accel.ge_offset << 1) + (dev->accel.dy * dev->pitch); + else + dev->accel.dest = (mach->accel.ge_offset << 2) + (dev->accel.dy * dev->pitch); + } mach->accel.src_stepx = 0; - /*Source Width*/ dev->accel.cx = mach->accel.src_x; if (mach->accel.src_x >= 0x600) @@ -918,27 +927,28 @@ skip_dx: mach_log("BitBLT: Src Indeterminate X: width = %d, coordinates: %d,%d px, end: %d px, stepx = %d, dpconfig = %04x, oddwidth = %d.\n", mach->accel.src_width, dev->accel.cx, dev->accel.cy, mach->accel.src_x_end, mach->accel.src_stepx, mach->accel.dp_config, mach->accel.src_width & 1); } mach->accel.sx = 0; - if (dev->bpp) - dev->accel.src = (mach->accel.ge_offset << 1) + (dev->accel.cy * (dev->pitch)); + if (mach->accel.patt_data_idx < 16) + mach->accel.color_pattern_idx = mach->accel.patt_idx; else - dev->accel.src = (mach->accel.ge_offset << 2) + (dev->accel.cy * (dev->pitch)); + mach->accel.color_pattern_idx = 0; - if ((dev->accel_bpp == 24) && (frgd_sel == 5)) - mach_log("BitBLT=%04x, WH(%d,%d), SRCWidth=%d, c(%d,%d), s(%d,%d).\n", mach->accel.dp_config, mach->accel.width, mach->accel.height, mach->accel.src_width, dev->accel.dx, dev->accel.dy, dev->accel.cx, dev->accel.cy); - else if (mach->accel.dp_config & 0x02) - mach_log("BitBLT=%04x, Pitch=%d, C(%d,%d), D(%d,%d), SRCWidth=%d, SRCXStep=%d, WH(%d,%d), clipt=%d, clipb=%d, geoffset=%08x.\n", mach->accel.dp_config, dev->ext_pitch, mach->accel.src_x, mach->accel.src_y, dev->accel.cur_x, dev->accel.cur_y, mach->accel.src_width, mach->accel.src_stepx, mach->accel.width, mach->accel.height, clip_t, clip_b, (mach->accel.ge_offset << 2)); + if (dev->bpp) + dev->accel.src = (mach->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch); + else + dev->accel.src = (mach->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); if (mono_src == 1) { - if ((mach->accel.mono_pattern_enable) && !(mach->accel.patt_len_reg & 0x4000)) { - mono_dat0 = mach->accel.patt_data[0x10]; - mono_dat0 |= (mach->accel.patt_data[0x11] << 8); - mono_dat0 |= (mach->accel.patt_data[0x12] << 16); - mono_dat0 |= (mach->accel.patt_data[0x13] << 24); - mono_dat1 = mach->accel.patt_data[0x14]; - mono_dat1 |= (mach->accel.patt_data[0x15] << 8); - mono_dat1 |= (mach->accel.patt_data[0x16] << 16); - mono_dat1 |= (mach->accel.patt_data[0x17] << 24); + if (mach->accel.mono_pattern_enable || mach->accel.block_write_mono_pattern_enable) { + mono_dat0 = mach->accel.mono_pattern_normal[0]; + mono_dat0 |= (mach->accel.mono_pattern_normal[1] << 8); + mono_dat0 |= (mach->accel.mono_pattern_normal[2] << 16); + mono_dat0 |= (mach->accel.mono_pattern_normal[3] << 24); + mono_dat1 = mach->accel.mono_pattern_normal[4]; + mono_dat1 |= (mach->accel.mono_pattern_normal[5] << 8); + mono_dat1 |= (mach->accel.mono_pattern_normal[6] << 16); + mono_dat1 |= (mach->accel.mono_pattern_normal[7] << 24); + mach_log("MonoData0=%x, MonoData1=%x.\n", mono_dat0, mono_dat1); for (uint8_t y = 0; y < 8; y++) { for (uint8_t x = 0; x < 8; x++) { uint32_t temp = (y & 4) ? mono_dat1 : mono_dat0; @@ -962,35 +972,12 @@ skip_dx: } if (mono_src == 1) { - if (!mach->accel.mono_pattern_enable && !(mach->accel.patt_len_reg & 0x4000)) { - count = mach->accel.width; - mix_dat = mach->accel.patt_data[0x10] ^ ((mach->accel.patt_idx & 1) ? 0xff : 0); - dev->accel.temp_cnt = 8; - } - } - - if (frgd_sel == 5) { - if (dev->bpp) { - for (int x = 0; x <= mach->accel.patt_len; x += 2) { - mach->accel.color_pattern_word[x + (mach->accel.color_pattern_idx & 1)] = (mach->accel.patt_data[x & mach->accel.patt_len] & 0xff); - mach->accel.color_pattern_word[x + (mach->accel.color_pattern_idx & 1)] |= (mach->accel.patt_data[(x + 1) & mach->accel.patt_len] << 8); - } - } else { - if ((dev->accel_bpp == 24) && (mach->accel.patt_len < 3)) { - for (int x = 0; x <= mach->accel.patt_len; x++) { - mach->accel.color_pattern[x] = mach->accel.patt_data[x]; - mach_log("BITBLT: Color Pattern 24bpp[%d]=%02x, dataidx=%d, pattlen=%d.\n", x, mach->accel.color_pattern[x], mach->accel.patt_data_idx, mach->accel.patt_len); - } - } else { - for (int x = 0; x <= mach->accel.patt_len; x++) { - mach->accel.color_pattern[x] = mach->accel.patt_data[x & mach->accel.patt_len]; - } + if (!mach->accel.mono_pattern_enable && !mach->accel.block_write_mono_pattern_enable) { + if (((dev->accel_bpp == 24) && (frgd_sel != 5)) || (dev->accel_bpp != 24)) { + mix_dat = mach->accel.mono_pattern_normal[0] ^ ((mach->accel.patt_idx & 0x01) ? 0xff : 0); + dev->accel.temp_cnt = 8; } } - - /*The destination coordinates should match the pattern index.*/ - if (mach->accel.color_pattern_idx != mach->accel.patt_idx) - mach->accel.color_pattern_idx = mach->accel.patt_idx; } if (mach->accel.dy_end == mach->accel.dy_start) { @@ -1016,24 +1003,22 @@ skip_dx: while (count--) { switch (mono_src) { case 0: - mix = 1; + mix = 0x01; break; case 1: - if (mach->accel.mono_pattern_enable) + if (mach->accel.mono_pattern_enable || mach->accel.block_write_mono_pattern_enable) mix = mach->accel.mono_pattern[dev->accel.dy & 7][dev->accel.dx & 7]; + else if ((dev->accel_bpp == 24) && (frgd_sel == 5)) + mix = 0x01; else { - if ((dev->accel_bpp == 24) && (frgd_sel == 5) && (mach->accel.patt_len_reg & 0x4000)) - mix = 1; - else { - if (!dev->accel.temp_cnt) { - dev->accel.temp_cnt = 8; - mix_dat >>= 8; - } - mix = (mix_dat & 0x80); - dev->accel.temp_cnt--; - mix_dat <<= 1; - mix_dat |= 1; + if (!dev->accel.temp_cnt) { + dev->accel.temp_cnt = 8; + mix_dat >>= 8; } + mix = !!(mix_dat & 0x80); + dev->accel.temp_cnt--; + mix_dat <<= 1; + mix_dat |= 1; } break; case 2: @@ -1042,10 +1027,10 @@ skip_dx: mix_dat <<= 1; } else { if (mach->accel.dp_config & 0x200) { - mix = mix_dat & 1; + mix = mix_dat & 0x01; mix_dat >>= 1; } else { - mix = mix_dat & 0x80; + mix = !!(mix_dat & 0x80); mix_dat <<= 1; mix_dat |= 1; } @@ -1060,15 +1045,18 @@ skip_dx: break; } - if (((dev->accel.dx) >= clip_l) && ((dev->accel.dx) <= clip_r) && ((dev->accel.dy) >= clip_t) && ((dev->accel.dy) <= clip_b)) { - if ((mach->accel.dp_config & 0x02) || (mach->accel.linedraw_opt & 0x02)) { + if ((dev->accel.dx >= clip_l) && + (dev->accel.dx <= clip_r) && + (dev->accel.dy >= clip_t) && + (dev->accel.dy <= clip_b)) { + if (mach->accel.dp_config & 0x02) { READ(dev->accel.src + dev->accel.cx, poly_src); poly_src = ((poly_src & rd_mask) == rd_mask); if (poly_src) mach->accel.poly_fill ^= 1; } - if (mach->accel.poly_fill || !(mach->accel.dp_config & 0x02) || !(mach->accel.linedraw_opt & 0x02)) { + if (mach->accel.poly_fill || !(mach->accel.dp_config & 0x02)) { switch (mix ? frgd_sel : bkgd_sel) { case 0: src_dat = dev->accel.bkgd_color; @@ -1089,22 +1077,18 @@ skip_dx: } break; case 5: - if (mix) { - if (dev->bpp) - src_dat = mach->accel.color_pattern_word[mach->accel.color_pattern_idx]; - else - src_dat = mach->accel.color_pattern[mach->accel.color_pattern_idx]; - } else - src_dat = 0; + src_dat = mach->accel.color_pattern[mach->accel.color_pattern_idx]; + if (dev->bpp) + src_dat |= (mach->accel.color_pattern[mach->accel.color_pattern_idx + 1] << 8); break; default: break; } - if ((dev->accel_bpp == 24) && (mono_src == 1) && (frgd_sel == 5) && (mach->accel.patt_len_reg & 0x4000)) { + if ((dev->accel_bpp == 24) && (mono_src == 1) && (frgd_sel == 5) && !mach->accel.mono_pattern_enable) { if (dev->accel.sy & 1) { - READ(dev->accel.dest + dev->accel.dx - dev->ext_pitch, dest_dat); + READ(dev->accel.dest + dev->accel.dx - dev->pitch, dest_dat); } else { READ(dev->accel.dest + dev->accel.dx, dest_dat); } @@ -1148,14 +1132,20 @@ skip_dx: } if (mach->accel.dp_config & 0x10) { - if ((dev->accel_bpp == 24) && (mono_src == 1) && (frgd_sel == 5) && (mach->accel.patt_len_reg & 0x4000)) { - if (dev->accel.sy & 1) { - WRITE(dev->accel.dest + dev->accel.dx - dev->ext_pitch, dest_dat); - } else { + if (mach->accel.block_write_mono_pattern_enable) { + if (mix) { WRITE(dev->accel.dest + dev->accel.dx, dest_dat); } } else { - WRITE(dev->accel.dest + dev->accel.dx, dest_dat); + if ((dev->accel_bpp == 24) && (mono_src == 1) && (frgd_sel == 5) && !mach->accel.mono_pattern_enable) { + if (dev->accel.sy & 1) { + WRITE(dev->accel.dest + dev->accel.dx - dev->pitch, dest_dat); + } else { + WRITE(dev->accel.dest + dev->accel.dx, dest_dat); + } + } else { + WRITE(dev->accel.dest + dev->accel.dx, dest_dat); + } } } } @@ -1166,54 +1156,45 @@ skip_dx: else cpu_dat >>= 8; + if (mach->accel.dp_config == 0x2071 || (mach->accel.dp_config == 0x2011)) + mach_log("FontBlit: SX=%d, C(%d,%d), SRCWidth=%d, frgdmix=%d, bkgdmix=%d, rdmask=%04x, D(%d,%d), geoffset=%x, addr=%08x,.\n", mach->accel.sx, dev->accel.cx, dev->accel.cy, mach->accel.src_width, dev->accel.frgd_mix & 0x1f, dev->accel.bkgd_mix & 0x1f, rd_mask, dev->accel.dx, dev->accel.dy, dev->accel.ge_offset, (dev->accel.src + dev->accel.cx) & dev->vram_mask); + if ((mono_src == 3) || (frgd_sel == 3) || (bkgd_sel == 3) || (mach->accel.dp_config & 0x02)) { dev->accel.cx += mach->accel.src_stepx; mach->accel.sx++; if (mach->accel.sx >= mach->accel.src_width) { mach->accel.sx = 0; - if (mach->accel.src_stepx == -1) + if (mach->accel.src_stepx < 0) dev->accel.cx += mach->accel.src_width; else dev->accel.cx -= mach->accel.src_width; dev->accel.cy += (mach->accel.src_y_dir ? 1 : -1); if (dev->bpp) - dev->accel.src = (mach->accel.ge_offset << 1) + (dev->accel.cy * (dev->pitch)); + dev->accel.src = (mach->accel.ge_offset << 1) + (dev->accel.cy * dev->pitch); else - dev->accel.src = (mach->accel.ge_offset << 2) + (dev->accel.cy * (dev->pitch)); + dev->accel.src = (mach->accel.ge_offset << 2) + (dev->accel.cy * dev->pitch); } } - dev->accel.dx += mach->accel.stepx; - - if ((dev->accel_bpp == 8) || ((dev->accel_bpp == 24) && (mach->accel.patt_len >= 3) && (mono_src != 1))) - mach->accel.color_pattern_idx = (mach->accel.color_pattern_idx + mach->accel.stepx) & mach->accel.patt_len; - - if ((dev->accel_bpp == 24) && (mach->accel.color_pattern_idx == mach->accel.patt_len) && (mach->accel.patt_len >= 3) && (mono_src != 1)) { - mach->accel.color_pattern_idx = mach->accel.patt_data_idx; - } else if ((dev->accel_bpp == 24) && (mach->accel.patt_len < 3)) { - if (mach->accel.patt_len == 2) { - mach->accel.color_pattern_idx++; - if (mach->accel.color_pattern_idx == 3) - mach->accel.color_pattern_idx = 0; - } else - mach->accel.color_pattern_idx = (mach->accel.color_pattern_idx + mach->accel.stepx) & mach->accel.patt_len; - - } else if ((dev->accel_bpp == 24) && (mach->accel.patt_len_reg & 0x4000) && (frgd_sel == 5)) { + if (dev->bpp) + mach->accel.color_pattern_idx += 2; + else mach->accel.color_pattern_idx++; - if (mach->accel.color_pattern_idx == 3) + + if ((mono_src == 1) && !mach->accel.mono_pattern_enable && !mach->accel.block_write_mono_pattern_enable && (frgd_sel == 5) && (dev->accel_bpp == 24)) { + if (mach->accel.color_pattern_idx > 2) + mach->accel.color_pattern_idx = 0; + } else { + if (mach->accel.color_pattern_idx > mach->accel.patt_len) mach->accel.color_pattern_idx = 0; } - if (dev->bpp) { - mach->accel.color_pattern_idx = (mach->accel.color_pattern_idx + mach->accel.stepx) & mach->accel.patt_len; - mach->accel.color_pattern_idx = (mach->accel.color_pattern_idx + mach->accel.stepx) & mach->accel.patt_len; - } - + dev->accel.dx += mach->accel.stepx; dev->accel.sx++; if ((dev->accel.sx >= mach->accel.width) || (dev->accel.dx >= 0x600)) { dev->accel.sx = 0; - if (mach->accel.stepx == -1) + if (mach->accel.stepx < 0) dev->accel.dx += mach->accel.width; else dev->accel.dx -= mach->accel.width; @@ -1222,27 +1203,19 @@ skip_dx: dev->accel.sy++; mach->accel.poly_fill = 0; - if (dev->bpp) - dev->accel.dest = (mach->accel.ge_offset << 1) + (dev->accel.dy * (dev->pitch)); - else - dev->accel.dest = (mach->accel.ge_offset << 2) + (dev->accel.dy * (dev->pitch)); - - if ((mono_src == 1) && (dev->accel_bpp == 24) && (frgd_sel == 5)) - mach->accel.color_pattern_idx = 0; - else - mach->accel.color_pattern_idx = ((dev->accel.dx + (dev->accel.dy << 3)) & mach->accel.patt_len); - - if ((dev->accel_bpp == 24) && (mach->accel.color_pattern_idx == mach->accel.patt_len) && (mono_src != 1)) - mach->accel.color_pattern_idx = 0; - if ((mono_src == 1) && !mach->accel.mono_pattern_enable && !(mach->accel.patt_len_reg & 0x4000)) { - dev->accel.cur_x = dev->accel.dx; - dev->accel.cur_y = dev->accel.dy; - return; + if (mach->accel.dp_config & 0x02) + dev->accel.dest = (dev->accel.dy * dev->pitch); + else { + if (dev->bpp) + dev->accel.dest = (mach->accel.ge_offset << 1) + (dev->accel.dy * dev->pitch); + else + dev->accel.dest = (mach->accel.ge_offset << 2) + (dev->accel.dy * dev->pitch); } + if (dev->accel.sy >= mach->accel.height) { - if ((mono_src == 2) || (mono_src == 3) || (frgd_sel == 3) || (bkgd_sel == 3) || (mach->accel.dp_config & 0x02) || (mach->accel.linedraw_opt & 0x02)) + if ((mono_src == 2) || (mono_src == 3) || (frgd_sel == 3) || (bkgd_sel == 3) || (mach->accel.dp_config & 0x02)) return; - if ((mono_src == 1) && (frgd_sel == 5) && (dev->accel_bpp == 24) && (mach->accel.patt_len_reg & 0x4000)) + if ((mono_src == 1) && (frgd_sel == 5) && (dev->accel_bpp == 24)) return; dev->accel.cur_x = dev->accel.dx; dev->accel.cur_y = dev->accel.dy; @@ -1290,18 +1263,12 @@ skip_dx: } } - if (frgd_sel == 5) { - for (int x = 0; x <= mach->accel.patt_len; x++) { - mach->accel.color_pattern[x] = mach->accel.patt_data[x & mach->accel.patt_len]; - } - } - if (mono_src == 1) { - mix_dat = mach->accel.patt_data[0x10]; + mix_dat = mach->accel.mono_pattern_normal[0]; dev->accel.temp_cnt = 8; } - count = (dev->accel.dx > dev->accel.dy) ? (dev->accel.dx >> 1) : (dev->accel.dy >> 1); + count = (dev->accel.dx > dev->accel.dy) ? (dev->accel.dx >> 1) : (dev->accel.dy >> 1); mach->accel.width = count; if (dev->accel.dx > dev->accel.dy) { @@ -1317,7 +1284,10 @@ skip_dx: mix_dat <<= 1; mix_dat |= 1; - if ((dev->accel.cx >= clip_l) && (dev->accel.cx <= clip_r) && (dev->accel.cy >= clip_t) && (dev->accel.cy <= clip_b)) { + if ((dev->accel.cx >= clip_l) && + (dev->accel.cx <= clip_r) && + (dev->accel.cy >= clip_t) && + (dev->accel.cy <= clip_b)) { mach->accel.clip_overrun = 0; switch (mix ? frgd_sel : bkgd_sel) { case 0: @@ -1336,10 +1306,9 @@ skip_dx: src_dat = 0; break; case 5: - if (mix) - src_dat = mach->accel.color_pattern[((dev->accel.cx) + ((dev->accel.cy) << 3)) & mach->accel.patt_len]; - else - src_dat = 0; + src_dat = mach->accel.color_pattern[mach->accel.color_pattern_idx]; + if (dev->bpp) + src_dat |= (mach->accel.color_pattern[mach->accel.color_pattern_idx + 1] << 8); break; default: @@ -1404,6 +1373,14 @@ skip_dx: else cpu_dat >>= 8; + if (dev->bpp) + mach->accel.color_pattern_idx += 2; + else + mach->accel.color_pattern_idx++; + + if (mach->accel.color_pattern_idx > mach->accel.patt_len) + mach->accel.color_pattern_idx = 0; + if (mach->accel.err >= 0) { dev->accel.cy += mach->accel.stepy; mach->accel.err -= dev->accel.dx; @@ -1438,12 +1415,19 @@ skip_dx: break; } - if ((dev->accel.cx >= clip_l) && (dev->accel.cx <= clip_r) && (dev->accel.cy >= clip_t) && (dev->accel.cy <= clip_b)) { + if ((dev->accel.cx >= clip_l) && + (dev->accel.cx <= clip_r) && + (dev->accel.cy >= clip_t) && + (dev->accel.cy <= clip_b)) { mach->accel.clip_overrun = 0; if (mach->accel.linedraw_opt & 0x02) { - READ((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), poly_src); + if (dev->bpp) { + READ((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), poly_src); + } else { + READ((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), poly_src); + } if (poly_src) - mach->accel.poly_fill = !mach->accel.poly_fill; + mach->accel.poly_fill ^= 1; } switch (mix ? frgd_sel : bkgd_sel) { @@ -1464,20 +1448,23 @@ skip_dx: } break; case 5: - if (mix) { - src_dat = mach->accel.color_pattern[((dev->accel.cx) + ((dev->accel.cy) << 3)) & mach->accel.patt_len]; - } else - src_dat = 0; + src_dat = mach->accel.color_pattern[mach->accel.color_pattern_idx]; + if (dev->bpp) + src_dat |= (mach->accel.color_pattern[mach->accel.color_pattern_idx + 1] << 8); break; default: break; } - if (dev->bpp) { - READ((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); + if (mach->accel.linedraw_opt & 0x02) { + if (dev->bpp) { + READ((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); + } else { + READ((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); + } } else { - READ((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); + READ(((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); } switch (compare_mode) { @@ -1520,17 +1507,25 @@ skip_dx: if ((mach->accel.dp_config & 0x10) && (cmd_type == 3)) { if (mach->accel.linedraw_opt & 0x04) { if (dev->accel.sx < mach->accel.width) { + if (mach->accel.linedraw_opt & 0x02) { + if (dev->bpp) { + WRITE((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); + } else { + WRITE((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); + } + } else { + WRITE(((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); + } + } + } else { + if (mach->accel.linedraw_opt & 0x02) { if (dev->bpp) { WRITE((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); } else { WRITE((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); } - } - } else { - if (dev->bpp) { - WRITE((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); } else { - WRITE((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); + WRITE(((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); } } } @@ -1545,6 +1540,14 @@ skip_dx: else cpu_dat >>= 8; + if (dev->bpp) + mach->accel.color_pattern_idx += 2; + else + mach->accel.color_pattern_idx++; + + if (mach->accel.color_pattern_idx > mach->accel.patt_len) + mach->accel.color_pattern_idx = 0; + if (mach->accel.err >= 0) { dev->accel.cy += mach->accel.stepy; mach->accel.err -= dev->accel.dx; @@ -1568,7 +1571,10 @@ skip_dx: mix_dat <<= 1; mix_dat |= 1; - if ((dev->accel.cx >= clip_l) && (dev->accel.cx <= clip_r) && (dev->accel.cy >= clip_t) && (dev->accel.cy <= clip_b)) { + if ((dev->accel.cx >= clip_l) && + (dev->accel.cx <= clip_r) && + (dev->accel.cy >= clip_t) && + (dev->accel.cy <= clip_b)) { mach->accel.clip_overrun = 0; switch (mix ? frgd_sel : bkgd_sel) { case 0: @@ -1588,10 +1594,9 @@ skip_dx: } break; case 5: - if (mix) { - src_dat = mach->accel.color_pattern[((dev->accel.cx) + ((dev->accel.cy) << 3)) & mach->accel.patt_len]; - } else - src_dat = 0; + src_dat = mach->accel.color_pattern[mach->accel.color_pattern_idx]; + if (dev->bpp) + src_dat |= (mach->accel.color_pattern[mach->accel.color_pattern_idx + 1] << 8); break; default: @@ -1656,6 +1661,14 @@ skip_dx: else cpu_dat >>= 8; + if (dev->bpp) + mach->accel.color_pattern_idx += 2; + else + mach->accel.color_pattern_idx++; + + if (mach->accel.color_pattern_idx > mach->accel.patt_len) + mach->accel.color_pattern_idx = 0; + if (mach->accel.err >= 0) { dev->accel.cx += mach->accel.stepx; mach->accel.err -= dev->accel.dy; @@ -1690,9 +1703,11 @@ skip_dx: break; } - if ((dev->accel.cx >= clip_l) && (dev->accel.cx <= clip_r) && (dev->accel.cy >= clip_t) && (dev->accel.cy <= clip_b)) { + if ((dev->accel.cx >= clip_l) && + (dev->accel.cx <= clip_r) && + (dev->accel.cy >= clip_t) && + (dev->accel.cy <= clip_b)) { mach->accel.clip_overrun = 0; - switch (mix ? frgd_sel : bkgd_sel) { case 0: src_dat = dev->accel.bkgd_color; @@ -1711,20 +1726,23 @@ skip_dx: } break; case 5: - if (mix) { - src_dat = mach->accel.color_pattern[((dev->accel.cx) + ((dev->accel.cy) << 3)) & mach->accel.patt_len]; - } else - src_dat = 0; + src_dat = mach->accel.color_pattern[mach->accel.color_pattern_idx]; + if (dev->bpp) + src_dat |= (mach->accel.color_pattern[mach->accel.color_pattern_idx + 1] << 8); break; default: break; } - if (dev->bpp) { - READ((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); + if (mach->accel.linedraw_opt & 0x02) { + if (dev->bpp) { + READ((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); + } else { + READ((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); + } } else { - READ((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); + READ(((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); } switch (compare_mode) { @@ -1765,17 +1783,25 @@ skip_dx: if ((mach->accel.dp_config & 0x10) && (cmd_type == 3)) { if (mach->accel.linedraw_opt & 0x04) { if (dev->accel.sx < mach->accel.width) { + if (mach->accel.linedraw_opt & 0x02) { + if (dev->bpp) { + WRITE((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); + } else { + WRITE((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); + } + } else { + WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat); + } + } + } else { + if (mach->accel.linedraw_opt & 0x02) { if (dev->bpp) { WRITE((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); } else { WRITE((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); } - } - } else { - if (dev->bpp) { - WRITE((mach->accel.ge_offset << 1) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); } else { - WRITE((mach->accel.ge_offset << 2) + ((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); + WRITE(((dev->accel.cy) * (dev->pitch)) + (dev->accel.cx), dest_dat); } } } @@ -1790,6 +1816,14 @@ skip_dx: else cpu_dat >>= 8; + if (dev->bpp) + mach->accel.color_pattern_idx += 2; + else + mach->accel.color_pattern_idx++; + + if (mach->accel.color_pattern_idx > mach->accel.patt_len) + mach->accel.color_pattern_idx = 0; + if (mach->accel.err >= 0) { dev->accel.cx += mach->accel.stepx; mach->accel.err -= dev->accel.dy; @@ -1842,8 +1876,6 @@ skip_dx: } dev->accel.sx = 0; - if ((dev->accel_bpp == 24) && (mach->accel.patt_len < 0x17)) - mach->accel.color_pattern_idx = 0; /*Step Y*/ mach->accel.dy_start = dev->accel.cur_y; @@ -1853,13 +1885,12 @@ skip_dx: if (mach->accel.dest_y_end >= 0x600) mach->accel.dy_end |= ~0x5ff; - if (mach->accel.dy_end > mach->accel.dy_start) { + if (mach->accel.dy_end > mach->accel.dy_start) mach->accel.stepy = 1; - } else if (mach->accel.dy_end < mach->accel.dy_start) { + else if (mach->accel.dy_end < mach->accel.dy_start) mach->accel.stepy = -1; - } else { + else mach->accel.stepy = 0; - } if (dev->bpp) dev->accel.dest = (mach->accel.ge_offset << 1) + (dev->accel.dy * (dev->pitch)); @@ -1903,22 +1934,7 @@ skip_dx: else dev->accel.src = (mach->accel.ge_offset << 2) + (dev->accel.cy * (dev->pitch)); - if ((dev->accel_bpp == 24) && (frgd_sel == 5)) { - if (mach->accel.patt_len == 0x17) - mach->accel.color_pattern_idx = 0; - dev->accel.x1 = dev->accel.dx + mach->accel.width; - if (dev->accel.x1 == dev->pitch) { - dev->accel.x2 = mach->accel.width & 1; - } else if ((dev->accel.x1 == mach->accel.width) && (dev->accel.dy & 1) && !dev->accel.y1 && dev->accel.x2) { - if (mach->accel.patt_len == 0x17) - mach->accel.color_pattern_idx = 3; - dev->accel.x3 = 1; - } else - dev->accel.x3 = 0; - } else - mach_log("ScanToX=%04x, Pitch=%d, C(%d,%d), SRCWidth=%d, WH(%d,%d), geoffset=%08x.\n", mach->accel.dp_config, dev->ext_pitch, dev->accel.cx, dev->accel.cy, mach->accel.src_width, mach->accel.width, mach->accel.height, (mach->accel.ge_offset << 1)); - - dev->accel.y1 = 0; + mach_log("ScanToX=%04x, MonoSRC=%d, FrgdSel=%d, BkgdSel=%d, Pitch=%d, C(%d,%d), SRCWidth=%d, WH(%d,%d), colorpattidx=%d, pattlen=%d.\n", mach->accel.dp_config, mono_src, frgd_sel, bkgd_sel, dev->ext_pitch, dev->accel.cx, dev->accel.cy, mach->accel.src_width, mach->accel.width, mach->accel.height, mach->accel.color_pattern_idx, mach->accel.patt_len); if ((mono_src == 2) || (bkgd_sel == 2) || (frgd_sel == 2) || mach_pixel_read(mach)) { if (mach_pixel_write(mach)) { @@ -1935,30 +1951,10 @@ skip_dx: if (mono_src == 1) { count = mach->accel.width; - mix_dat = mach->accel.patt_data[0x10]; + mix_dat = mach->accel.mono_pattern_normal[0]; dev->accel.temp_cnt = 8; } - if (frgd_sel == 5) { - if (dev->accel_bpp != 24) { - for (int x = 0; x <= mach->accel.patt_len; x++) { - mach->accel.color_pattern[x] = mach->accel.patt_data[x & mach->accel.patt_len]; - } - } else { - if (mach->accel.patt_len == 0x17) { - for (int x = 0; x <= mach->accel.patt_len; x++) { - mach->accel.color_pattern_full[x] = mach->accel.patt_data[x]; - mach_log("ScanToX: Color Pattern 24bpp[%d]=%02x, dataidx=%d, pattlen=%d.\n", x, mach->accel.color_pattern_full[x], mach->accel.patt_data_idx, mach->accel.patt_len); - } - } else { - for (int x = 0; x <= mach->accel.patt_len; x++) { - mach->accel.color_pattern[x] = mach->accel.patt_data[x]; - mach_log("ScanToX: Color Pattern 24bpp[%d]=%02x, dataidx=%d, pattlen=%d.\n", x, mach->accel.color_pattern[x], mach->accel.patt_data_idx, mach->accel.patt_len); - } - } - } - } - while (count--) { switch (mono_src) { case 0: @@ -1998,7 +1994,10 @@ skip_dx: break; } - if (((dev->accel.dx) >= clip_l) && ((dev->accel.dx) <= clip_r) && ((dev->accel.dy) >= clip_t) && ((dev->accel.dy) <= clip_b)) { + if ((dev->accel.dx >= clip_l) && + (dev->accel.dx <= clip_r) && + (dev->accel.dy >= clip_t) && + (dev->accel.dy <= clip_b)) { switch (mix ? frgd_sel : bkgd_sel) { case 0: src_dat = dev->accel.bkgd_color; @@ -2019,16 +2018,9 @@ skip_dx: } break; case 5: - if (mix) { - if (dev->accel_bpp == 24) { - if (mach->accel.patt_len == 0x17) - src_dat = mach->accel.color_pattern_full[mach->accel.color_pattern_idx]; - else - src_dat = mach->accel.color_pattern[mach->accel.color_pattern_idx]; - } else - src_dat = mach->accel.color_pattern[(dev->accel.dx + (dev->accel.dy << 3)) & mach->accel.patt_len]; - } else - src_dat = 0; + src_dat = mach->accel.color_pattern[mach->accel.color_pattern_idx]; + if (dev->bpp) + src_dat |= (mach->accel.color_pattern[mach->accel.color_pattern_idx + 1] << 8); break; default: @@ -2073,7 +2065,7 @@ skip_dx: } if (mach->accel.dp_config & 0x10) { - WRITE(dev->accel.dest + (dev->accel.dx), dest_dat); + WRITE(dev->accel.dest + dev->accel.dx, dest_dat); } } @@ -2097,23 +2089,15 @@ skip_dx: dev->accel.src = (mach->accel.ge_offset << 2) + (dev->accel.cy * (dev->pitch)); } - dev->accel.dx += mach->accel.stepx; - if ((dev->accel_bpp == 24) && (mach->accel.patt_len == 0x17)) { + if (dev->bpp) + mach->accel.color_pattern_idx += 2; + else mach->accel.color_pattern_idx++; - if (dev->accel.x3) { - if (mach->accel.color_pattern_idx == 9) - mach->accel.color_pattern_idx = 3; - } else { - if (mach->accel.color_pattern_idx == 6) - mach->accel.color_pattern_idx = 0; - } - } else if ((dev->accel_bpp == 24) && (mach->accel.patt_len < 3)) { - mach->accel.color_pattern_idx++; - if (mach->accel.color_pattern_idx == 3) - mach->accel.color_pattern_idx = 0; - } else - mach->accel.color_pattern_idx = (mach->accel.color_pattern_idx + mach->accel.stepx) & mach->accel.patt_len; + if (mach->accel.color_pattern_idx > mach->accel.patt_len) + mach->accel.color_pattern_idx = 0; + + dev->accel.dx += mach->accel.stepx; dev->accel.sx++; if (dev->accel.sx >= mach->accel.width) { dev->accel.sx = 0; @@ -2142,21 +2126,26 @@ mach_accel_out_pixtrans(mach_t *mach, ibm8514_t *dev, uint16_t val) int frgd_sel; int bkgd_sel; int mono_src; + int swap = 0; frgd_sel = (mach->accel.dp_config >> 13) & 7; bkgd_sel = (mach->accel.dp_config >> 7) & 3; mono_src = (mach->accel.dp_config >> 5) & 3; - if ((mach->accel.dp_config & 4) && (mach->accel.cmd_type != 5)) { + if ((mach->accel.dp_config & 0x04) && (mach->accel.cmd_type != 5)) { + mach_log("Read Host Monochrome Data.\n"); val = (val >> 8) | (val << 8); + swap = 1; } switch (mach->accel.dp_config & 0x200) { case 0x000: /*8-bit size*/ if (mono_src == 2) { if ((frgd_sel != 2) && (bkgd_sel != 2)) { - if (mach->accel.dp_config & 0x1000) + if ((mach->accel.dp_config & 0x1000) && !swap) { + mach_log("8-bit bus size swap.\n"); val = (val >> 8) | (val << 8); + } mach_accel_start(mach->accel.cmd_type, 1, 8, val | (val << 16), 0, mach, dev); } else mach_accel_start(mach->accel.cmd_type, 1, 1, -1, val | (val << 16), mach, dev); @@ -2166,8 +2155,10 @@ mach_accel_out_pixtrans(mach_t *mach, ibm8514_t *dev, uint16_t val) case 0x200: /*16-bit size*/ if (mono_src == 2) { if ((frgd_sel != 2) && (bkgd_sel != 2)) { - if (mach->accel.dp_config & 0x1000) + if ((mach->accel.dp_config & 0x1000) && !swap) { + mach_log("16-bit bus size swap.\n"); val = (val >> 8) | (val << 8); + } mach_accel_start(mach->accel.cmd_type, 1, 16, val | (val << 16), 0, mach, dev); } else mach_accel_start(mach->accel.cmd_type, 1, 2, -1, val | (val << 16), mach, dev); @@ -2231,15 +2222,15 @@ mach_out(uint16_t addr, uint8_t val, void *priv) mach->bank_r |= ((mach->regs[0xae] & 0x0c) << 2); mach->bank_w |= ((mach->regs[0xae] & 3) << 4); } - if (dev->on[0] || dev->on[1]) + if (dev->on) mach_log("Separate B2Bank = %02x, AEbank = %02x.\n", mach->regs[0xb2], mach->regs[0xae]); } else { /* Single bank mode */ mach->bank_w = ((mach->regs[0xb2] & 0x1e) >> 1); - if ((dev->local & 0xff) >= 0x02) { + if ((dev->local & 0xff) >= 0x02) mach->bank_w |= ((mach->regs[0xae] & 3) << 4); - } + mach->bank_r = mach->bank_w; - if (dev->on[0] || dev->on[1]) + if (dev->on) mach_log("Single B2Bank = %02x, AEbank = %02x.\n", mach->regs[0xb2], mach->regs[0xae]); } svga->read_bank = mach->bank_r << 16; @@ -2356,7 +2347,7 @@ mach_in(uint16_t addr, void *priv) if (((addr & 0xFFF0) == 0x3D0 || (addr & 0xFFF0) == 0x3B0) && !(svga->miscout & 1)) addr ^= 0x60; - if ((addr >= 0x3c6) && (addr <= 0x3c9) && (dev->on[0] || dev->on[1])) + if ((addr >= 0x3c6) && (addr <= 0x3c9) && dev->on) addr -= 0xdc; switch (addr) { @@ -2457,8 +2448,8 @@ ati8514_recalctimings(svga_t *svga) mach_t *mach = (mach_t *) svga->ext8514; ibm8514_t *dev = (ibm8514_t *) svga->dev8514; - mach_log("ON0=%d, ON1=%d, vgahdisp=%d.\n", dev->on[0], dev->on[1], svga->hdisp); - if (dev->on[0] || dev->on[1]) { + mach_log("ON=%d, vgahdisp=%d.\n", dev->on, svga->hdisp); + if (dev->on) { mach_log("8514/A ON.\n"); dev->h_total = dev->htotal + 1; dev->rowcount = !!(dev->disp_cntl & 0x08); @@ -2466,17 +2457,18 @@ ati8514_recalctimings(svga_t *svga) mach->accel.ge_offset = dev->accel.ge_offset; mach_log("HDISP=%d, VDISP=%d, shadowset=%x, 8514/A mode=%x, clocksel=%02x.\n", dev->hdisp, dev->vdisp, mach->shadow_set & 0x03, dev->accel.advfunc_cntl & 0x04, mach->accel.clock_sel & 0xfe); - if (dev->accel.advfunc_cntl & 0x01) { + + if (dev->hdisp) { + dev->h_disp = dev->hdisp; + dev->dispend = dev->vdisp; + } else { if (dev->accel.advfunc_cntl & 0x04) { - dev->h_disp = dev->hdisp; - dev->dispend = dev->vdisp; + dev->h_disp = 1024; + dev->dispend = 768; } else { dev->h_disp = 640; dev->dispend = 480; } - } else { - dev->h_disp = dev->hdisp; - dev->dispend = dev->vdisp; } if (dev->accel.advfunc_cntl & 0x04) @@ -2500,6 +2492,16 @@ ati8514_recalctimings(svga_t *svga) dev->rowoffset = dev->ext_crt_pitch; mach_log("cntl=%d, hv(%d,%d), pitch=%d, rowoffset=%d, gextconfig=%03x, shadow=%x interlace=%d.\n", dev->accel.advfunc_cntl & 0x04, dev->h_disp, dev->dispend, dev->pitch, dev->rowoffset, mach->accel.ext_ge_config & 0xcec0, mach->shadow_set & 3, dev->interlace); svga->map8 = dev->pallook; + if (dev->vram_512k_8514) { + if (dev->h_disp == 640) { + dev->ext_pitch = 640; + dev->pitch = dev->ext_pitch; + } else { + dev->ext_pitch = 1024; + dev->pitch = dev->ext_pitch; + } + } + dev->accel_bpp = 8; svga->render8514 = ibm8514_render_8bpp; } else { if (!(svga->gdcreg[6] & 1) && !(svga->attrregs[0x10] & 1)) { /*Text mode*/ @@ -2567,17 +2569,39 @@ mach_recalctimings(svga_t *svga) } svga->render8514 = ibm8514_render_blank; - mach_log("ON[0]=%d, ON[1]=%d, exton[0]=%d, exton[1]=%d, vendormode0=%d, vendormode1=%d.\n", dev->on[0], dev->on[1], mach->ext_on[0], mach->ext_on[1], dev->vendor_mode[0], dev->vendor_mode[1]); - if (dev->on[0] || dev->on[1]) { - mach_log("8514/A ON.\n"); + if (dev->on) { + mach_log("8514/A ON, extpitch=%d, devma=%x, vgamalatch=%x.\n", dev->ext_pitch, dev->ma, svga->ma_latch); + dev->pitch = dev->ext_pitch; + dev->rowoffset = dev->ext_crt_pitch; dev->h_total = dev->htotal + 1; dev->rowcount = !!(dev->disp_cntl & 0x08); dev->accel.ge_offset = (mach->accel.ge_offset_lo | (mach->accel.ge_offset_hi << 16)); mach->accel.ge_offset = dev->accel.ge_offset; mach_log("HDISP=%d, VDISP=%d, shadowset=%x, 8514/A mode=%x, clocksel=%02x.\n", dev->hdisp, dev->vdisp, mach->shadow_set & 0x03, dev->accel.advfunc_cntl & 0x04, mach->accel.clock_sel & 0xfe); - if (!dev->bpp) { - if (dev->accel.advfunc_cntl & 0x01) { + if ((dev->local & 0xff) >= 0x02) { + if (dev->bpp || (dev->accel_bpp >= 24) || (mach->accel.clock_sel & 0x01)) { + dev->h_disp = dev->hdisp; + dev->dispend = dev->vdisp; + } else { + if (dev->interlace) { /*Interlaced displays are only for 800x600 and up.*/ + if (dev->accel.advfunc_cntl & 0x04) { + dev->h_disp = dev->hdisp; + dev->dispend = dev->vdisp; + } else { + dev->h_disp = 640; + dev->dispend = 480; + } + } else { + dev->h_disp = dev->hdisp; + dev->dispend = dev->vdisp; + } + } + } else { + if (mach->accel.clock_sel & 0x01) { + dev->h_disp = dev->hdisp; + dev->dispend = dev->vdisp; + } else { if (dev->accel.advfunc_cntl & 0x04) { dev->h_disp = dev->hdisp; dev->dispend = dev->vdisp; @@ -2585,13 +2609,7 @@ mach_recalctimings(svga_t *svga) dev->h_disp = 640; dev->dispend = 480; } - } else { - dev->h_disp = dev->hdisp; - dev->dispend = dev->vdisp; } - } else { - dev->h_disp = dev->hdisp; - dev->dispend = dev->vdisp; } svga->clock8514 = (cpuclock * (double) (1ULL << 32)) / svga->getclock((mach->accel.clock_sel >> 2) & 0x0f, svga->clock_gen); @@ -2614,9 +2632,7 @@ mach_recalctimings(svga_t *svga) dev->dispend += 2; if ((dev->local & 0xff) >= 0x02) { - mach_log("HDISP=%d.\n", dev->h_disp); - dev->pitch = dev->ext_pitch; - dev->rowoffset = dev->ext_crt_pitch; + mach_log("HDISP=%d, mask=%02x.\n", dev->h_disp, dev->dac_mask); if ((mach->accel.ext_ge_config & 0x800) || (!(mach->accel.ext_ge_config & 0x8000) && !(mach->accel.ext_ge_config & 0x800))) { if ((mach->accel.ext_ge_config & 0x30) == 0x20) { if ((mach->accel.ext_ge_config & 0xc0) == 0x40) @@ -2628,9 +2644,20 @@ mach_recalctimings(svga_t *svga) dev->accel_bpp = 32; else dev->accel_bpp = 24; - } else + } else if ((mach->accel.ext_ge_config & 0x30) == 0x10) dev->accel_bpp = 8; - + else { + if (dev->vram_512k_8514) { + if (dev->h_disp == 640) { + dev->ext_pitch = 640; + dev->pitch = dev->ext_pitch; + } else { + dev->ext_pitch = 1024; + dev->pitch = dev->ext_pitch; + } + } + dev->accel_bpp = 8; + } mach_log("hv(%d,%d), pitch=%d, rowoffset=%d, gextconfig=%03x, bpp=%d, shadow=%x, vgahdisp=%d.\n", dev->h_disp, dev->dispend, dev->pitch, dev->ext_crt_pitch, mach->accel.ext_ge_config & 0xcec0, dev->accel_bpp, mach->shadow_set & 3, svga->hdisp); switch (dev->accel_bpp) { case 8: @@ -2662,10 +2689,18 @@ mach_recalctimings(svga_t *svga) } } } else { - dev->pitch = dev->ext_pitch; - dev->rowoffset = dev->ext_crt_pitch; mach_log("cntl=%d, hv(%d,%d), pitch=%d, rowoffset=%d, gextconfig=%03x, shadow=%x interlace=%d.\n", dev->accel.advfunc_cntl & 0x04, dev->h_disp, dev->dispend, dev->pitch, dev->rowoffset, mach->accel.ext_ge_config & 0xcec0, mach->shadow_set & 3, dev->interlace); svga->map8 = dev->pallook; + if (dev->vram_512k_8514) { + if (dev->h_disp == 640) { + dev->ext_pitch = 640; + dev->pitch = dev->ext_pitch; + } else { + dev->ext_pitch = 1024; + dev->pitch = dev->ext_pitch; + } + } + dev->accel_bpp = 8; svga->render8514 = ibm8514_render_8bpp; } } @@ -2744,155 +2779,63 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u switch (port) { case 0x82e8: - case 0x82e9: case 0x86e8: case 0x86e9: case 0xc2e8: - case 0xc2e9: case 0xc6e8: - case 0xc6e9: ibm8514_accel_out_fifo(svga, port, val, len); break; case 0xf6ee: ibm8514_accel_out_fifo(svga, 0x82e8, val, len); break; - case 0xf6ef: - ibm8514_accel_out_fifo(svga, 0x82e9, val, len); - break; case 0x8ae8: case 0xcae8: ibm8514_accel_out_fifo(svga, port, val, len); - if (len != 1) - mach->accel.src_y = val; - break; - case 0x8ae9: - case 0x8ee9: - case 0xcae9: - case 0xcee9: - ibm8514_accel_out_fifo(svga, port, val, len); + if (len == 2) { + mach_log("SRCY=%d.\n", val & 0x07ff); + mach->accel.src_y = val & 0x07ff; + } break; case 0x8ee8: case 0xcee8: ibm8514_accel_out_fifo(svga, port, val, len); - if (len != 1) - mach->accel.src_x = val; + if (len == 2) { + mach_log("SRCX=%d.\n", val & 0x07ff); + mach->accel.src_x = val & 0x07ff; + } break; case 0x92e8: - case 0x92e9: - case 0x96e9: case 0xd2e8: - case 0xd2e9: - case 0xd6e9: ibm8514_accel_out_fifo(svga, port, val, len); break; case 0x96e8: case 0xd6e8: ibm8514_accel_out_fifo(svga, port, val, len); - if (len != 1) + if (len == 2) mach->accel.test = val & 0x1fff; break; case 0x9ae8: case 0xdae8: - dev->accel.ssv_state = 0; - if (len == 1) - dev->accel.cmd = (dev->accel.cmd & 0xff00) | val; - else { - dev->data_available = 0; - dev->data_available2 = 0; - dev->accel.cmd = val; - mach_log("CMD8514=%04x, len=%d, pixcntl=%02x.\n", val, len, dev->accel.multifunc[0x0a]); - mach->accel.cmd_type = -1; - if (port == 0xdae8) { - if (dev->accel.cmd & 0x100) - dev->accel.cmd_back = 0; - } - ibm8514_accel_start(-1, 0, -1, 0, svga, len); - } - break; - case 0x9ae9: - case 0xdae9: - if (len == 1) { - dev->data_available = 0; - dev->data_available2 = 0; - dev->accel.cmd = (dev->accel.cmd & 0xff) | (val << 8); - mach->accel.cmd_type = -1; - if (port == 0xdae9) { - if (dev->accel.cmd & 0x100) - dev->accel.cmd_back = 0; - } - ibm8514_accel_start(-1, 0, -1, 0, svga, len); - } + mach->accel.cmd_type = -1; + ibm8514_accel_out_fifo(svga, port, val, len); break; case 0x9ee8: case 0xdee8: - dev->accel.ssv_state = 1; - if (len == 1) - dev->accel.short_stroke = (dev->accel.short_stroke & 0xff00) | val; - else { - dev->accel.short_stroke = val; - dev->accel.cx = dev->accel.cur_x; - dev->accel.cy = dev->accel.cur_y; - - if (dev->accel.cur_x >= 0x600) - dev->accel.cx |= ~0x5ff; - - if (dev->accel.cur_y >= 0x600) - dev->accel.cy |= ~0x5ff; - - if (dev->accel.cmd & 0x1000) { - ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke & 0xff, len); - ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke >> 8, len); - } else { - ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke >> 8, len); - ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke & 0xff, len); - } - } - break; - case 0x9ee9: - case 0xdee9: - if (len == 1) { - dev->accel.short_stroke = (dev->accel.short_stroke & 0xff) | (val << 8); - dev->accel.cx = dev->accel.cur_x; - dev->accel.cy = dev->accel.cur_y; - - if (dev->accel.cur_x >= 0x600) { - dev->accel.cx |= ~0x5ff; - } - if (dev->accel.cur_y >= 0x600) { - dev->accel.cy |= ~0x5ff; - } - - if (dev->accel.cmd & 0x1000) { - ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke & 0xff, len); - ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke >> 8, len); - } else { - ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke >> 8, len); - ibm8514_short_stroke_start(-1, 0, -1, 0, svga, dev->accel.short_stroke & 0xff, len); - } - } + ibm8514_accel_out_fifo(svga, port, val, len); break; case 0xa2e8: case 0xe2e8: if (port == 0xe2e8) { - if (dev->accel.cmd_back) { - if (len == 1) - dev->accel.bkgd_color = (dev->accel.bkgd_color & 0x00ff) | val; - else + if (len == 2) { + if (dev->accel.cmd_back) { dev->accel.bkgd_color = val; - } else { - if (len == 1) { - if (mach->accel.cmd_type >= 0) { - if (mach_pixel_read(mach)) - break; - mach->accel.pix_trans[1] = val; - } } else { if (mach->accel.cmd_type >= 0) { if (mach_pixel_read(mach)) @@ -2904,80 +2847,25 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u ibm8514_accel_out_pixtrans(svga, port, val, len); } } - } - } else { - if (len == 1) - dev->accel.bkgd_color = (dev->accel.bkgd_color & 0x00ff) | val; - else - dev->accel.bkgd_color = val; - } - break; - case 0xa2e9: - case 0xe2e9: - if (port == 0xe2e9) { - if (dev->accel.cmd_back) { - if (len == 1) - dev->accel.bkgd_color = (dev->accel.bkgd_color & 0xff00) | (val << 8); } else { - if (len == 1) { - if (mach->accel.cmd_type >= 0) { - if (mach_pixel_read(mach)) - break; - mach->accel.pix_trans[0] = val; - frgd_sel = (mach->accel.dp_config >> 13) & 7; - bkgd_sel = (mach->accel.dp_config >> 7) & 3; - mono_src = (mach->accel.dp_config >> 5) & 3; - - switch (mach->accel.dp_config & 0x200) { - case 0x000: /*8-bit size*/ - if (mono_src == 2) { - if ((frgd_sel != 2) && (bkgd_sel != 2)) { - mach_accel_start(mach->accel.cmd_type, 1, 8, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), 0, mach, dev); - } else - mach_accel_start(mach->accel.cmd_type, 1, 1, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), mach, dev); - } else - mach_accel_start(mach->accel.cmd_type, 1, 1, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), mach, dev); - break; - case 0x200: /*16-bit size*/ - if (mono_src == 2) { - if ((frgd_sel != 2) && (bkgd_sel != 2)) { - if (mach->accel.dp_config & 0x1000) - mach_accel_start(mach->accel.cmd_type, 1, 16, mach->accel.pix_trans[1] | (mach->accel.pix_trans[0] << 8), 0, mach, dev); - else - mach_accel_start(mach->accel.cmd_type, 1, 16, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), 0, mach, dev); - } else - mach_accel_start(mach->accel.cmd_type, 1, 2, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), mach, dev); - } else - mach_accel_start(mach->accel.cmd_type, 1, 2, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), mach, dev); - break; - - default: - break; - } - } + if (mach->accel.cmd_type >= 0) { + if (mach_pixel_read(mach)) + break; + mach->accel.pix_trans[1] = val; } } } else { - if (len == 1) - dev->accel.bkgd_color = (dev->accel.bkgd_color & 0xff00) | (val << 8); + if (len == 2) + dev->accel.bkgd_color = val; } break; case 0xa6e8: case 0xe6e8: if (port == 0xe6e8) { - if (dev->accel.cmd_back) { - if (len == 1) - dev->accel.frgd_color = (dev->accel.frgd_color & 0x00ff) | val; - else + if (len == 2) { + if (dev->accel.cmd_back) { dev->accel.frgd_color = val; - } else { - if (len == 1) { - if (mach->accel.cmd_type >= 0) { - if (mach_pixel_read(mach)) - break; - mach->accel.pix_trans[1] = val; - } } else { if (mach->accel.cmd_type >= 0) { if (mach_pixel_read(mach)) @@ -2989,62 +2877,58 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u ibm8514_accel_out_pixtrans(svga, port, val, len); } } - } - } else { - if (len == 1) - dev->accel.frgd_color = (dev->accel.frgd_color & 0x00ff) | val; - else - dev->accel.frgd_color = val; - } - break; - case 0xa6e9: - case 0xe6e9: - if (port == 0xe6e9) { - if (dev->accel.cmd_back) { - if (len == 1) - dev->accel.frgd_color = (dev->accel.frgd_color & 0xff00) | (val << 8); } else { - if (len == 1) { - if (mach->accel.cmd_type >= 0) { - if (mach_pixel_read(mach)) - break; - mach->accel.pix_trans[0] = val; - frgd_sel = (mach->accel.dp_config >> 13) & 7; - bkgd_sel = (mach->accel.dp_config >> 7) & 3; - mono_src = (mach->accel.dp_config >> 5) & 3; - - switch (mach->accel.dp_config & 0x200) { - case 0x000: /*8-bit size*/ - if (mono_src == 2) { - if ((frgd_sel != 2) && (bkgd_sel != 2)) { - mach_accel_start(mach->accel.cmd_type, 1, 8, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), 0, mach, dev); - } else - mach_accel_start(mach->accel.cmd_type, 1, 1, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), mach, dev); - } else - mach_accel_start(mach->accel.cmd_type, 1, 1, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), mach, dev); - break; - case 0x200: /*16-bit size*/ - if (mono_src == 2) { - if ((frgd_sel != 2) && (bkgd_sel != 2)) { - if (mach->accel.dp_config & 0x1000) - mach_accel_start(mach->accel.cmd_type, 1, 16, mach->accel.pix_trans[1] | (mach->accel.pix_trans[0] << 8), 0, mach, dev); - else - mach_accel_start(mach->accel.cmd_type, 1, 16, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), 0, mach, dev); - } else - mach_accel_start(mach->accel.cmd_type, 1, 2, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), mach, dev); - } else - mach_accel_start(mach->accel.cmd_type, 1, 2, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), mach, dev); - break; - - default: - break; - } - } + if (mach->accel.cmd_type >= 0) { + if (mach_pixel_read(mach)) + break; + mach->accel.pix_trans[1] = val; } } } else { - if (len == 1) - dev->accel.frgd_color = (dev->accel.frgd_color & 0xff00) | (val << 8); + if (len == 2) + dev->accel.frgd_color = val; + } + break; + + case 0xe2e9: + case 0xe6e9: + mach_log("Write PORT=%04x, 8514/A=%x, val=%04x, len=%d.\n", port, dev->accel.cmd_back, val, len); + if (len == 1) { + if (mach->accel.cmd_type >= 0) { + if (mach_pixel_read(mach)) + break; + mach->accel.pix_trans[0] = val; + frgd_sel = (mach->accel.dp_config >> 13) & 7; + bkgd_sel = (mach->accel.dp_config >> 7) & 3; + mono_src = (mach->accel.dp_config >> 5) & 3; + + switch (mach->accel.dp_config & 0x200) { + case 0x000: /*8-bit size*/ + if (mono_src == 2) { + if ((frgd_sel != 2) && (bkgd_sel != 2)) { + mach_accel_start(mach->accel.cmd_type, 1, 8, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), 0, mach, dev); + } else + mach_accel_start(mach->accel.cmd_type, 1, 1, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), mach, dev); + } else + mach_accel_start(mach->accel.cmd_type, 1, 1, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), mach, dev); + break; + case 0x200: /*16-bit size*/ + if (mono_src == 2) { + if ((frgd_sel != 2) && (bkgd_sel != 2)) { + if (mach->accel.dp_config & 0x1000) + mach_accel_start(mach->accel.cmd_type, 1, 16, mach->accel.pix_trans[1] | (mach->accel.pix_trans[0] << 8), 0, mach, dev); + else + mach_accel_start(mach->accel.cmd_type, 1, 16, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), 0, mach, dev); + } else + mach_accel_start(mach->accel.cmd_type, 1, 2, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), mach, dev); + } else + mach_accel_start(mach->accel.cmd_type, 1, 2, -1, mach->accel.pix_trans[0] | (mach->accel.pix_trans[1] << 8), mach, dev); + break; + + default: + break; + } + } } break; @@ -3069,118 +2953,47 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u case 0xbee8: case 0xfee8: - if (len == 1) - dev->accel.multifunc_cntl = (dev->accel.multifunc_cntl & 0xff00) | val; - else { - dev->accel.multifunc_cntl = val; - dev->accel.multifunc[dev->accel.multifunc_cntl >> 12] = dev->accel.multifunc_cntl & 0xfff; - if ((dev->accel.multifunc_cntl >> 12) == 1) - dev->accel.clip_top = val & 0x7ff; - - if ((dev->accel.multifunc_cntl >> 12) == 2) - dev->accel.clip_left = val & 0x7ff; - - if ((dev->accel.multifunc_cntl >> 12) == 3) - dev->accel.multifunc[3] = val & 0x7ff; - - if ((dev->accel.multifunc_cntl >> 12) == 4) - dev->accel.multifunc[4] = val & 0x7ff; - - mach_log("CLIPBOTTOM=%d, CLIPRIGHT=%d, bpp=%d, pitch=%d.\n", dev->accel.multifunc[3], dev->accel.multifunc[4], dev->accel_bpp, dev->pitch); + ibm8514_accel_out_fifo(svga, port, val, len); + if (len == 2) { if ((dev->accel.multifunc_cntl >> 12) == 5) { if ((dev->local & 0xff) < 0x02) dev->ext_crt_pitch = 128; } - if (port == 0xfee8) - dev->accel.cmd_back = 1; - else - dev->accel.cmd_back = 0; - } - break; - case 0xbee9: - case 0xfee9: - if (len == 1) { - dev->accel.multifunc_cntl = (dev->accel.multifunc_cntl & 0xff) | (val << 8); - dev->accel.multifunc[dev->accel.multifunc_cntl >> 12] = dev->accel.multifunc_cntl & 0xfff; - if ((dev->accel.multifunc_cntl >> 12) == 1) - dev->accel.clip_top = dev->accel.multifunc_cntl & 0x7ff; - - if ((dev->accel.multifunc_cntl >> 12) == 2) - dev->accel.clip_left = dev->accel.multifunc_cntl & 0x7ff; - - if ((dev->accel.multifunc_cntl >> 12) == 5) { - if ((dev->local & 0xff) < 0x02) - dev->ext_crt_pitch = 128; - } - if (port == 0xfee9) - dev->accel.cmd_back = 1; - else - dev->accel.cmd_back = 0; } break; /*ATI Mach8/32 specific registers*/ case 0x82ee: - mach->accel.patt_data_idx = val & 0x1f; - mach_log("Pattern Data Index = %d.\n", val & 0x1f); + mach->accel.patt_data_idx_reg = val & 0x1f; + mach->accel.patt_data_idx = mach->accel.patt_data_idx_reg; + + if (mach->accel.patt_data_idx_reg < 0x10) + mach->accel.color_pattern_idx = mach->accel.patt_idx; + else + mach->accel.color_pattern_idx = 0; + + mach_log("Write Port 82ee: Pattern Data Index=%d.\n", val & 0x1f); break; case 0x8eee: - if (len == 1) - mach->accel.patt_data[mach->accel.patt_data_idx] = val; - else { - mach->accel.patt_data[mach->accel.patt_data_idx] = val & 0xff; - mach->accel.patt_data[mach->accel.patt_data_idx + 1] = (val >> 8) & 0xff; - if (mach->accel.mono_pattern_enable) - mach->accel.patt_data_idx = (mach->accel.patt_data_idx + 2) & 0x17; - else { - frgd_sel = (mach->accel.dp_config >> 13) & 7; - mono_src = (mach->accel.dp_config >> 5) & 3; - if ((dev->accel_bpp == 24) && (mach->accel.patt_len == 0x17) && (frgd_sel == 5)) { - mach->accel.patt_data_idx += 2; - dev->accel.y1 = 1; - } else { - if (dev->accel_bpp == 24) - mach->accel.patt_data_idx += 2; - else - mach->accel.patt_data_idx = (mach->accel.patt_data_idx + 2) & mach->accel.patt_len; - } - mach_log("ExtCONFIG = %04x, Pattern Mono = %04x, selidx = %d, dataidx = %d, bit 0 = %02x len = %d.\n", mach->accel.ext_ge_config, val, mach->accel.patt_idx, mach->accel.patt_data_idx, val & 1, mach->accel.patt_len); - } - } - break; - case 0x8eef: - if (len == 1) { - mach->accel.patt_data[mach->accel.patt_data_idx + 1] = val; - if (mach->accel.mono_pattern_enable) - mach->accel.patt_data_idx = (mach->accel.patt_data_idx + 2) & 7; - else { - frgd_sel = (mach->accel.dp_config >> 13) & 7; - if ((dev->accel_bpp == 24) && (mach->accel.patt_len == 0x17) && (frgd_sel == 5)) { - mach->accel.patt_data_idx += 2; - dev->accel.y1 = 1; - } else - mach->accel.patt_data_idx = (mach->accel.patt_data_idx + 2) & mach->accel.patt_len; + if (len == 2) { + if (mach->accel.patt_data_idx_reg < 0x10) { + mach->accel.color_pattern[mach->accel.patt_data_idx] = val & 0xff; + mach->accel.color_pattern[mach->accel.patt_data_idx + 1] = (val >> 8) & 0xff; + mach_log("Write Port 8eee: Color Pattern Word Data[%d]=%04x.\n", mach->accel.patt_data_idx, val); + } else { + mach->accel.mono_pattern_normal[mach->accel.patt_data_idx - 0x10] = val & 0xff; + mach->accel.mono_pattern_normal[(mach->accel.patt_data_idx + 1) - 0x10] = (val >> 8) & 0xff; + mach_log("Write Port 8eee: Mono Pattern Word Data[%d]=%04x.\n", mach->accel.patt_data_idx - 0x10, val); } + mach->accel.patt_data_idx += 2; } break; case 0x96ee: - if (len == 1) - mach->accel.bres_count = (mach->accel.bres_count & 0x700) | val; - else { + if (len == 2) { mach->accel.bres_count = val & 0x7ff; - mach_log("BresenhamDraw = %04x.\n", mach->accel.dp_config); - dev->data_available = 0; - dev->data_available2 = 0; - mach->accel.cmd_type = 1; - mach_accel_start(mach->accel.cmd_type, 0, -1, -1, 0, mach, dev); - } - break; - case 0x96ef: - if (len == 1) { - mach->accel.bres_count = (mach->accel.bres_count & 0xff) | ((val & 0x07) << 8); - mach_log("96EE (2) line draw.\n"); + mach_log("BresenhamDraw=%04x.\n", mach->accel.dp_config); dev->data_available = 0; dev->data_available2 = 0; mach->accel.cmd_type = 1; @@ -3193,15 +3006,13 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u break; case 0xa2ee: - mach_log("Line OPT = %04x\n", val); - if (len == 1) - mach->accel.linedraw_opt = (mach->accel.linedraw_opt & 0xff00) | val; - else { + mach_log("Line OPT=%04x.\n", val); + if (len == 2) { mach->accel.linedraw_opt = val; - mach->accel.bbottom = dev->accel.multifunc[3] & 0x7ff; - mach->accel.btop = dev->accel.clip_top & 0x7ff; - mach->accel.bleft = dev->accel.clip_left & 0x7ff; - mach->accel.bright = dev->accel.multifunc[4] & 0x7ff; + mach->accel.bbottom = dev->accel.multifunc[3]; + mach->accel.btop = dev->accel.multifunc[1]; + mach->accel.bleft = dev->accel.multifunc[2]; + mach->accel.bright = dev->accel.multifunc[4]; if (mach->accel.linedraw_opt & 0x100) { mach->accel.bbottom = 2047; mach->accel.btop = 0; @@ -3210,88 +3021,50 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u } } break; - case 0xa2ef: - if (len == 1) - mach->accel.linedraw_opt = (mach->accel.linedraw_opt & 0x00ff) | (val << 8); - break; case 0xa6ee: - if (len == 1) - mach->accel.dest_x_start = (mach->accel.dest_x_start & 0x700) | val; - else + if (len == 2) mach->accel.dest_x_start = val & 0x7ff; break; - case 0xa6ef: - if (len == 1) - mach->accel.dest_x_start = (mach->accel.dest_x_start & 0x0ff) | ((val & 0x07) << 8); - break; case 0xaaee: - if (len == 1) - mach->accel.dest_x_end = (mach->accel.dest_x_end & 0x700) | val; - else + if (len == 2) mach->accel.dest_x_end = val & 0x7ff; break; - case 0xaaef: - if (len == 1) - mach->accel.dest_x_end = (mach->accel.dest_x_end & 0x0ff) | ((val & 0x07) << 8); - break; case 0xaeee: - if (len == 1) - mach->accel.dest_y_end = (mach->accel.dest_y_end & 0x700) | val; - else { + if (len == 2) { mach->accel.dest_y_end = val & 0x7ff; if ((val + 1) == 0x10000) { - mach_log("Dest_Y_end overflow val = %04x\n", val); + mach_log("Dest_Y_end overflow val=%04x, DPCONFIG=%04x\n", val, mach->accel.dp_config); mach->accel.dest_y_end = 0; } dev->data_available = 0; dev->data_available2 = 0; - mach_log("BitBLT = %04x.\n", mach->accel.dp_config); + mach_log("BitBLT=%04x.\n", mach->accel.dp_config); + mach_log(".\n"); mach->accel.cmd_type = 2; /*Non-conforming BitBLT from dest_y_end register (0xaeee)*/ mach_accel_start(mach->accel.cmd_type, 0, -1, -1, 0, mach, dev); } break; - case 0xaeef: - if (len == 1) { - mach->accel.dest_y_end = (mach->accel.dest_y_end & 0x0ff) | ((val & 0x07) << 8); - dev->data_available = 0; - dev->data_available2 = 0; - mach->accel.cmd_type = 2; /*Non-conforming BitBLT from dest_y_end register (0xaeee)*/ - mach_accel_start(mach->accel.cmd_type, 0, -1, -1, 0, mach, dev); - } - break; case 0xb2ee: - if (len == 1) - mach->accel.src_x_start = (mach->accel.src_x_start & 0x700) | val; - else + if (len == 2) mach->accel.src_x_start = val & 0x7ff; break; - case 0xb2ef: - if (len == 1) - mach->accel.src_x_start = (mach->accel.src_x_start & 0x0ff) | ((val & 0x07) << 8); - break; case 0xb6ee: - dev->accel.bkgd_mix = val & 0xff; + ibm8514_accel_out_fifo(svga, 0xb6e8, val, len); break; case 0xbaee: - dev->accel.frgd_mix = val & 0xff; + ibm8514_accel_out_fifo(svga, 0xbae8, val, len); break; case 0xbeee: - if (len == 1) - mach->accel.src_x_end = (mach->accel.src_x_end & 0x700) | val; - else + if (len == 2) mach->accel.src_x_end = val & 0x7ff; break; - case 0xbeef: - if (len == 1) - mach->accel.src_x_end = (mach->accel.src_x_end & 0x0ff) | ((val & 0x07) << 8); - break; case 0xc2ee: mach->accel.src_y_dir = val & 1; @@ -3303,9 +3076,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u break; case 0xcaee: - if (len == 1) - mach->accel.scan_to_x = (mach->accel.scan_to_x & 0x700) | val; - else { + if (len == 2) { mach->accel.scan_to_x = (val & 0x7ff); if ((val + 1) == 0x10000) { mach_log("Scan_to_X overflow val = %04x\n", val); @@ -3314,128 +3085,74 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u dev->data_available = 0; dev->data_available2 = 0; mach->accel.cmd_type = 5; /*Horizontal Raster Draw from scan_to_x register (0xcaee)*/ - mach_log("ScanToX = %04x.\n", mach->accel.dp_config); - mach_accel_start(mach->accel.cmd_type, 0, -1, -1, 0, mach, dev); - } - break; - case 0xcaef: - if (len == 1) { - mach->accel.scan_to_x = (mach->accel.scan_to_x & 0x0ff) | ((val & 0x07) << 8); - dev->data_available = 0; - dev->data_available2 = 0; - mach->accel.cmd_type = 5; /*Horizontal Raster Draw from scan_to_x register (0xcaee)*/ + mach_log("ScanToX=%04x.\n", mach->accel.dp_config); + mach_log(".\n"); mach_accel_start(mach->accel.cmd_type, 0, -1, -1, 0, mach, dev); } break; case 0xceee: mach_log("CEEE write val = %04x.\n", val); - if (len == 1) - mach->accel.dp_config = (mach->accel.dp_config & 0xff00) | val; - else { + if (len == 2) { dev->data_available = 0; dev->data_available2 = 0; mach->accel.dp_config = val; } break; - case 0xceef: - if (len == 1) - mach->accel.dp_config = (mach->accel.dp_config & 0x00ff) | (val << 8); - break; case 0xd2ee: mach->accel.patt_len = val & 0x1f; - mach_log("Pattern Length = %d, val = %04x.\n", val & 0x1f, val); + mach_log("Write Port d2ee: Pattern Length=%d, val=%04x.\n", val & 0x1f, val); mach->accel.mono_pattern_enable = !!(val & 0x80); - if (len != 1) + if (len == 2) { + mach->accel.block_write_mono_pattern_enable = !!(val & 0x8000); mach->accel.patt_len_reg = val; - else - mach->accel.patt_len_reg = (mach->accel.patt_len_reg & 0xff00) | val; - break; - case 0xd2ef: - if (len == 1) - mach->accel.patt_len_reg = (mach->accel.patt_len_reg & 0x00ff) | (val << 8); + } break; case 0xd6ee: mach->accel.patt_idx = val & 0x1f; - mach_log("Pattern Index = %d, val = %02x.\n", val & 0x1f, val); + mach_log("Write Port d6ee: Pattern Index=%d.\n", val & 0x1f); break; case 0xdaee: mach_log("DAEE (extclipl) write val = %d\n", val); - if (len == 1) - dev->accel.clip_left = (dev->accel.clip_left & 0x700) | val; - else - dev->accel.clip_left = val & 0x7ff; - break; - case 0xdaef: - if (len == 1) - dev->accel.clip_left = (dev->accel.clip_left & 0x0ff) | ((val & 0x07) << 8); + if (len == 2) + dev->accel.multifunc[2] = val & 0x7ff; break; case 0xdeee: mach_log("DEEE (extclipt) write val = %d\n", val); - if (len == 1) - dev->accel.clip_top = (dev->accel.clip_top & 0x700) | val; - else - dev->accel.clip_top = val & 0x7ff; - break; - case 0xdeef: - if (len == 1) - dev->accel.clip_top = (dev->accel.clip_top & 0x0ff) | ((val & 0x07) << 8); + if (len == 2) + dev->accel.multifunc[1] = val & 0x7ff; break; case 0xe2ee: mach_log("E2EE (extclipr) write val = %d\n", val); - if (len == 1) - dev->accel.multifunc[4] = (dev->accel.multifunc[4] & 0x700) | val; - else + if (len == 2) dev->accel.multifunc[4] = val & 0x7ff; break; - case 0xe2ef: - if (len == 1) - dev->accel.multifunc[4] = (dev->accel.multifunc[4] & 0x0ff) | ((val & 0x07) << 8); - break; case 0xe6ee: mach_log("E6EE (extclipb) write val = %d\n", val); - if (len == 1) - dev->accel.multifunc[3] = (dev->accel.multifunc[3] & 0x700) | val; - else + if (len == 2) dev->accel.multifunc[3] = val & 0x7ff; break; - case 0xe6ef: - if (len == 1) - dev->accel.multifunc[3] = (dev->accel.multifunc[3] & 0x0ff) | ((val & 0x07) << 8); - break; case 0xeeee: - if (len == 1) - mach->accel.dest_cmp_fn = (mach->accel.dest_cmp_fn & 0xff00) | val; - else + if (len == 2) mach->accel.dest_cmp_fn = val; break; - case 0xeeef: - if (len == 1) - mach->accel.dest_cmp_fn = (mach->accel.dest_cmp_fn & 0x00ff) | (val << 8); - break; case 0xf2ee: mach_log("F2EE.\n"); - if (len == 1) - mach->accel.dst_clr_cmp_mask = (mach->accel.dst_clr_cmp_mask & 0xff00) | val; - else + if (len == 2) mach->accel.dst_clr_cmp_mask = val; break; - case 0xf2ef: - if (len == 1) - mach->accel.dst_clr_cmp_mask = (mach->accel.dst_clr_cmp_mask & 0x00ff) | (val << 8); - break; case 0xfeee: - mach_log("LineDraw = %04x.\n", mach->accel.dp_config); - if (len != 1) { + mach_log("LineDraw=%04x.\n", mach->accel.dp_config); + if (len == 2) { mach->accel.line_array[mach->accel.line_idx] = val; dev->accel.cur_x = mach->accel.line_array[(mach->accel.line_idx == 4) ? 4 : 0]; dev->accel.cur_y = mach->accel.line_array[(mach->accel.line_idx == 5) ? 5 : 1]; @@ -3459,7 +3176,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u static void mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8514_t *dev) { - if (port != 0x7aee && port != 0x7aef && port != 0x42e8 && port != 0x42e9) + if (port != 0x42e8 && port != 0x42e9) mach_log("[%04X:%08X]: Port CALL OUT=%04x, val=%02x.\n", CS, cpu_state.pc, port, val); switch (port) { @@ -3467,10 +3184,6 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8 case 0x6e9: case 0xae8: case 0xee8: - case 0x12e8: - case 0x12e9: - case 0x1ae8: - case 0x1ae9: case 0x1ee8: case 0x1ee9: case 0x22e8: @@ -3481,9 +3194,27 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8 case 0x6e8: /*In preparation to switch from VGA to 8514/A mode*/ - if (!dev->on[0] || !dev->on[1] || (mach->accel.clock_sel & 0x01)) { - dev->hdisped = val; - dev->hdisp = (dev->hdisped + 1) << 3; + if (!(mach->shadow_cntl & 0x08)) { + if ((mach->shadow_set & 0x03) || (mach->accel.clock_sel & 0x01)) { + dev->hdisped = val; + dev->hdisp = (dev->hdisped + 1) << 3; + } + } + mach_log("[%04X:%08X]: ATI 8514/A: (0x%04x): hdisp=0x%02x.\n", CS, cpu_state.pc, port, val); + svga_recalctimings(svga); + break; + + case 0x12e8: + case 0x12e9: + /*In preparation to switch from VGA to 8514/A mode*/ + if (!(mach->shadow_cntl & 0x10)) { + if ((mach->shadow_set & 0x03) || (mach->accel.clock_sel & 0x01)) { + WRITE8(port, dev->v_total_reg, val); + dev->v_total_reg &= 0x1fff; + dev->v_total = dev->v_total_reg + 1; + if (dev->interlace) + dev->v_total >>= 1; + } } mach_log("[%04X:%08X]: ATI 8514/A: (0x%04x): hdisp=0x%02x.\n", CS, cpu_state.pc, port, val); svga_recalctimings(svga); @@ -3492,29 +3223,46 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8 case 0x16e8: case 0x16e9: /*In preparation to switch from VGA to 8514/A mode*/ - if (!dev->on[0] || !dev->on[1] || (mach->accel.clock_sel & 0x01)) { - WRITE8(port, dev->v_disp, val); - dev->v_disp &= 0x1fff; - dev->vdisp = (dev->v_disp + 1) >> 1; + if (!(mach->shadow_cntl & 0x20)) { + if ((mach->shadow_set & 0x03) || (mach->accel.clock_sel & 0x01)) { + WRITE8(port, dev->v_disp, val); + dev->v_disp &= 0x1fff; + dev->vdisp = (dev->v_disp + 1) >> 1; + } } mach_log("ATI 8514/A: V_DISP write 16E8 = %d\n", dev->v_disp); mach_log("ATI 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val); svga_recalctimings(svga); break; + case 0x1ae8: + case 0x1ae9: + /*In preparation to switch from VGA to 8514/A mode*/ + if (!(mach->shadow_cntl & 0x10)) { + if ((mach->shadow_set & 0x03) || (mach->accel.clock_sel & 0x01)) { + WRITE8(port, dev->v_sync_start, val); + dev->v_sync_start &= 0x1fff; + dev->v_syncstart = dev->v_sync_start + 1; + if (dev->interlace) + dev->v_syncstart >>= 1; + } + } + mach_log("ATI 8514/A: V_SYNCSTART write 1AE8 = %d\n", dev->v_syncstart); + mach_log("ATI 8514/A: (0x%04x): vsyncstart=0x%02x.\n", port, val); + svga_recalctimings(svga); + break; + case 0x4ae8: - case 0x4ae9: WRITE8(port, dev->accel.advfunc_cntl, val); - dev->on[port & 1] = dev->accel.advfunc_cntl & 0x01; + dev->on = dev->accel.advfunc_cntl & 0x01; + vga_on = !dev->on; + if ((dev->local & 0xff) < 0x02) dev->ext_crt_pitch = 128; - vga_on = !dev->on[port & 1]; - mach->ext_on[port & 1] = dev->on[port & 1]; - mach32_updatemapping(mach, svga); - dev->vendor_mode[port & 1] = 0; - mach_log("[%04X:%08X]: ATI 8514/A: (0x%04x): ON=%d, shadow crt=%x, hdisp=%d, vdisp=%d.\n", CS, cpu_state.pc, port, dev->on[port & 1], dev->accel.advfunc_cntl & 0x04, dev->hdisp, dev->vdisp); - mach_log("IBM mode set %s resolution.\n", (dev->accel.advfunc_cntl & 0x04) ? "2: 1024x768" : "1: 640x480"); + mach_log("[%04X:%08X]: ATI 8514/A: (0x%04x): ON=%d, shadow crt=%x, hdisp=%d, vdisp=%d.\n", CS, cpu_state.pc, port, val & 0x01, dev->accel.advfunc_cntl & 0x04, dev->hdisp, dev->vdisp); + mach_log("Vendor IBM mode set %s resolution.\n", (dev->accel.advfunc_cntl & 0x04) ? "2: 1024x768" : "1: 640x480"); + svga_recalctimings(svga); break; @@ -3546,6 +3294,7 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8 mach->cursor_offset_hi = mach->cursor_offset_hi_reg & 0x0f; dev->hwcursor.addr = ((mach->cursor_offset_lo | (mach->cursor_offset_hi << 16)) << 2); dev->hwcursor.ena = !!(mach->cursor_offset_hi_reg & 0x8000); + mach_log("HWCursorEnabled=%x.\n", dev->hwcursor.ena); break; case 0x12ee: @@ -3593,6 +3342,8 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8 else dev->ext_crt_pitch <<= 1; } + dev->on = 1; + vga_on = 0; mach_log("ATI 8514/A: (0x%04x) val=0x%02x.\n", port, val); svga_recalctimings(svga); break; @@ -3634,18 +3385,20 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8 case 0x46ef: WRITE8(port, mach->shadow_cntl, val); mach_log("ATI 8514/A: (0x%04x) val=%02x.\n", port, val); + mach32_updatemapping(mach, svga); break; case 0x4aee: case 0x4aef: WRITE8(port, mach->accel.clock_sel, val); - dev->on[port & 1] = mach->accel.clock_sel & 0x01; - mach_log("ATI 8514/A: (0x%04x): ON=%d, val=%04x, hdisp=%d, vdisp=%d, val=0x%02x.\n", port, dev->on[port & 1], val, dev->hdisp, dev->vdisp, val & 0xfe); - mach_log("ATI mode set %s resolution.\n", (dev->accel.advfunc_cntl & 0x04) ? "2: 1024x768" : "1: 640x480"); - mach->ext_on[port & 1] = dev->on[port & 1]; - vga_on = !dev->on[port & 1]; - dev->vendor_mode[port & 1] = 1; + dev->on = mach->accel.clock_sel & 0x01; + mach_log("ATI 8514/A: (0x%04x): ON=%d, val=%04x, hdisp=%d, vdisp=%d, val=0x%02x.\n", port, dev->on, val, dev->hdisp, dev->vdisp, val & 0xfe); + if (!(port & 1)) + mach_log("Vendor ATI mode set %s resolution.\n", (dev->accel.advfunc_cntl & 0x04) ? "2: 1024x768" : "1: 640x480"); + + vga_on = !dev->on; svga_recalctimings(svga); + mach32_updatemapping(mach, svga); break; case 0x52ee: @@ -3670,6 +3423,8 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8 mach_log("CRT Shadow Set 1: 640x480.\n"); else if ((mach->shadow_set & 0x03) == 0x02) mach_log("CRT Shadow Set 2: 1024x768.\n"); + + mach32_updatemapping(mach, svga); break; case 0x5eee: @@ -3693,19 +3448,29 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8 case 0x6aee: case 0x6aef: WRITE8(port, mach->accel.max_waitstates, val); + mach->override_resolution = !!(mach->accel.max_waitstates & 0x400); + if (mach->override_resolution) { + dev->on = 1; + vga_on = !dev->on; + svga_recalctimings(svga); + mach32_updatemapping(mach, svga); + } break; case 0x6eee: case 0x6eef: WRITE8(port, mach->accel.ge_offset_lo, val); svga_recalctimings(svga); + mach_log("ATI 8514/A: (0x%04x) val=0x%02x, geoffset=%04x.\n", port, val, dev->accel.ge_offset); + mach32_updatemapping(mach, svga); break; case 0x72ee: case 0x72ef: WRITE8(port, mach->accel.ge_offset_hi, val); - mach_log("ATI 8514/A: (0x%04x) val=0x%02x, geoffset=%04x.\n", port, val, dev->accel.ge_offset); svga_recalctimings(svga); + mach_log("ATI 8514/A: (0x%04x) val=0x%02x, geoffset=%04x.\n", port, val, dev->accel.ge_offset); + mach32_updatemapping(mach, svga); break; case 0x76ee: @@ -3714,6 +3479,7 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8 dev->ext_pitch = ((mach->accel.ge_pitch & 0xff) << 3); mach_log("ATI 8514/A: (0x%04x) val=0x%02x, extpitch=%d.\n", port, val, dev->ext_pitch); svga_recalctimings(svga); + mach32_updatemapping(mach, svga); break; case 0x7aee: @@ -3722,8 +3488,9 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8 if ((dev->local & 0xff) >= 0x02) { if (mach->accel.crt_pitch & 0xff) dev->ext_crt_pitch = mach->accel.crt_pitch & 0xff; + switch (mach->accel.ext_ge_config & 0x30) { - case 0: + case 0x00: case 0x10: dev->bpp = 0; break; @@ -3743,11 +3510,11 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8 break; } svga_set_ramdac_type(svga, !!(mach->accel.ext_ge_config & 0x4000)); - dev->vendor_mode[port & 1] = 1; - mach32_updatemapping(mach, svga); mach_log("ATI 8514/A: (0x%04x) val=%02x.\n", port, val); svga_recalctimings(svga); + mach32_updatemapping(mach, svga); } else { + mach_log("ATI 8514/A: (0x%04x) val=%02x.\n", port, val & 0x30); ati_eeprom_write(&mach->eeprom, !!(mach->accel.ext_ge_config & 0x4040), !!(mach->accel.ext_ge_config & 0x2020), !!(mach->accel.ext_ge_config & 0x1010)); } break; @@ -3796,9 +3563,10 @@ mach_accel_in_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, in case 0x9ae8: case 0xdae8: - if (len != 1) { + if (len == 2) { if (dev->force_busy) temp |= 0x200; /*Hardware busy*/ + dev->force_busy = 0; if (dev->data_available) { temp |= 0x100; /*Read Data available*/ @@ -3829,10 +3597,11 @@ mach_accel_in_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, in case 0xdae9: if (len == 1) { if (dev->force_busy2) - temp |= 2; /*Hardware busy*/ + temp |= 0x02; /*Hardware busy*/ + dev->force_busy2 = 0; if (dev->data_available2) { - temp |= 1; /*Read Data available*/ + temp |= 0x01; /*Read Data available*/ if (mach->accel.cmd_type >= 0) { switch (mach->accel.cmd_type) { case 2: @@ -3877,18 +3646,23 @@ mach_accel_in_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, in } else { if (ibm8514_cpu_dest(svga)) { cmd = (dev->accel.cmd >> 13); - if (len != 1) { + if (len == 2) { READ_PIXTRANS_WORD(dev->accel.cx, 0) - if (dev->accel.input && !dev->accel.odd_in && !dev->accel.sx) { - temp &= ~0xff00; - temp |= (dev->vram[(dev->accel.newdest_in + dev->accel.cur_x) & dev->vram_mask] << 8); - } - if (dev->subsys_stat & 1) { + if (dev->subsys_stat & 0x01) { dev->force_busy = 1; dev->data_available = 1; } + if (dev->accel.input) { + ibm8514_accel_out_pixtrans(svga, port, temp & 0xff, len); + if (dev->accel.odd_in) { /*WORDs on odd destination scan lengths.*/ + dev->accel.odd_in = 0; + temp &= ~0xff00; + READ_HIGH(dev->accel.dest + dev->accel.cx, temp); + } + ibm8514_accel_out_pixtrans(svga, port, (temp >> 8) & 0xff, len); + } else + ibm8514_accel_out_pixtrans(svga, port, temp, len); } - ibm8514_accel_out_pixtrans(svga, port, temp, len); } } break; @@ -3937,47 +3711,9 @@ mach_accel_in_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, in } break; - case 0xbee8: - case 0xfee8: - if (len != 1) { - mach_log("Multifunc_cntl = %d.\n", dev->accel.multifunc_cntl >> 12); - switch ((dev->accel.multifunc_cntl >> 12) & 0x0f) { - case 0: - temp = dev->accel.multifunc[0]; - break; - case 1: - temp = dev->accel.clip_top; - break; - case 2: - temp = dev->accel.clip_left; - break; - case 3: - temp = dev->accel.multifunc[3]; - break; - case 4: - temp = dev->accel.multifunc[4]; - break; - case 5: - temp = dev->accel.multifunc[5]; - break; - case 8: - temp = dev->accel.multifunc[8]; - break; - case 9: - temp = dev->accel.multifunc[9]; - break; - case 0x0a: - temp = dev->accel.multifunc[0x0a]; - break; - - default: - break; - } - } - break; - case 0x82ee: - temp = mach->accel.patt_data_idx; + if (len == 2) + temp = mach->accel.patt_data_idx; break; case 0x86ee: @@ -4106,10 +3842,9 @@ mach_accel_in_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, in break; case 0xdaee: - if (len != 1) { - temp = mach->accel.src_x; + if (len == 2) { if ((dev->local & 0xff) >= 0x02) - temp &= 0x7ff; + temp = mach->accel.src_x; } else temp = mach->accel.src_x & 0xff; break; @@ -4119,10 +3854,9 @@ mach_accel_in_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, in break; case 0xdeee: - if (len != 1) { - temp = mach->accel.src_y; + if (len == 2) { if ((dev->local & 0xff) >= 0x02) - temp &= 0x7ff; + temp = mach->accel.src_y; } else temp = mach->accel.src_y & 0xff; break; @@ -4132,7 +3866,7 @@ mach_accel_in_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, in break; case 0xfaee: - if (len != 1) { + if (len == 2) { if ((dev->local & 0xff) >= 0x02) { if (mach->pci_bus) temp = 0x0017; @@ -4163,7 +3897,8 @@ mach_accel_in_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, in break; } - mach_log("[%04X:%08X]: Port FIFO IN=%04x, temp=%04x, len=%d.\n", CS, cpu_state.pc, port, temp, len); + if (port != 0x9aee && port != 0x62ee) + mach_log("[%04X:%08X]: Port FIFO IN=%04x, temp=%04x, len=%d.\n", CS, cpu_state.pc, port, temp, len); return temp; } @@ -4171,14 +3906,7 @@ mach_accel_in_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, in static uint8_t mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev) { - uint8_t temp = 0; - uint16_t clip_b_ibm = dev->accel.multifunc[3]; - uint16_t clip_r_ibm = dev->accel.multifunc[4]; - int16_t clip_l = dev->accel.clip_left & 0x7ff; - int16_t clip_t = dev->accel.clip_top & 0x7ff; - int16_t clip_r = dev->accel.multifunc[4] & 0x7ff; - int16_t clip_b = dev->accel.multifunc[3] & 0x7ff; - int cmd = (dev->accel.cmd >> 13); + uint8_t temp = 0; switch (port) { case 0x2e8: @@ -4196,24 +3924,8 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev) if (dev->vc == dev->v_syncstart) dev->subsys_stat |= 1; - if (mach->accel.cmd_type >= 0) { - if (((dev->accel.dx) >= clip_l) && ((dev->accel.dx) <= clip_r) && ((dev->accel.dy) >= clip_t) && ((dev->accel.dy) <= clip_b)) - temp |= 2; - } else { - if (cmd == 6) { - if (((dev->accel.dx) >= dev->accel.clip_left) && ((dev->accel.dx) <= clip_r_ibm) && ((dev->accel.dy) >= dev->accel.clip_top) && ((dev->accel.dy) <= clip_b_ibm)) - temp |= 2; - } else { - if (((dev->accel.cx) >= dev->accel.clip_left) && ((dev->accel.dx) <= clip_r_ibm) && ((dev->accel.cy) >= dev->accel.clip_top) && ((dev->accel.cy) <= clip_b_ibm)) - temp |= 2; - } - } - - if (!dev->force_busy) - temp |= 8; - if (port & 1) - temp = 0x80; + temp = dev->vram_512k_8514 ? 0x00 : 0x80; else { temp |= (dev->subsys_stat | 0x80); if (mach->accel.ext_ge_config & 0x08) @@ -4256,7 +3968,7 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev) if (!(port & 1)) { temp &= ~0x0c; - switch (mach->memory) { + switch (dev->vram_amount) { case 1024: temp |= 0x04; break; @@ -4268,8 +3980,6 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev) break; default: - if ((dev->local & 0xff) < 0x02) - temp |= 0x04; break; } } @@ -4351,7 +4061,7 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev) default: break; } - if (port != 0x62ee && port != 0x62ef && port != 0x42e8 && port != 0x42e9 && port != 0x02e8 && port != 0x02e9) + if (port != 0x42e8 && port != 0x42e9 && port != 0x62ee && port != 0x62ef && port != 0x02e8 && port != 0x02e9) mach_log("[%04X:%08X]: Port NORMAL IN=%04x, temp=%04x.\n", CS, cpu_state.pc, port, temp); return temp; @@ -4568,43 +4278,6 @@ mach_accel_inl(uint16_t port, void *priv) return temp; } -static uint32_t -mach32_decode_addr(svga_t *svga, uint32_t addr, int write) -{ - int memory_map_mode = (svga->gdcreg[6] >> 2) & 3; - - addr &= 0x1ffff; - - switch (memory_map_mode) { - case 0: - break; - case 1: - if (addr >= 0x10000) - return 0xffffffff; - break; - case 2: - addr -= 0x10000; - if (addr >= 0x8000) - return 0xffffffff; - break; - default: - case 3: - addr -= 0x18000; - if (addr >= 0x8000) - return 0xffffffff; - break; - } - - if (memory_map_mode <= 1) { - if (write) - addr = (addr & svga->banked_mask) + svga->write_bank; - else - addr = (addr & svga->banked_mask) + svga->read_bank; - } - - return addr; -} - static __inline void mach32_write_common(uint32_t addr, uint8_t val, int linear, mach_t *mach, svga_t *svga) { @@ -4613,37 +4286,51 @@ mach32_write_common(uint32_t addr, uint8_t val, int linear, mach_t *mach, svga_t int reset_wm = 0; latch8514_t vall; uint8_t wm = svga->writemask; - uint8_t count; uint8_t i; cycles -= svga->monitor->mon_video_timing_write_b; if (linear) { + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) + addr <<= 1; + addr &= dev->vram_mask; dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount; - dev->vram[addr] = val; + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + switch (addr & 0x06) { + case 0x00: + case 0x06: + dev->vram[addr] = val & 0x0f; + dev->vram[addr + 1] = (val >> 4) & 0x0f; + break; + case 0x02: + dev->vram[addr + 2] = val & 0x0f; + dev->vram[addr + 3] = (val >> 4) & 0x0f; + break; + case 0x04: + dev->vram[addr - 2] = val & 0x0f; + dev->vram[addr - 1] = (val >> 4) & 0x0f; + break; + default: + break; + } + } else + dev->vram[addr] = val; + return; - } else { - xga_write_test(addr, val, svga); - addr = mach32_decode_addr(svga, addr, 1); - if (addr == 0xffffffff) - return; } if (!(svga->gdcreg[6] & 1)) svga->fullchange = 2; - if (((svga->chain4 && (svga->packed_chain4 || svga->force_old_addr)) || svga->fb_only) && (svga->writemode < 4)) { + if (svga->chain4) { writemask2 = 1 << (addr & 3); addr &= ~3; - } else if (svga->chain4 && (svga->writemode < 4)) { - writemask2 = 1 << (addr & 3); - addr &= ~3; - addr = ((addr & 0xfffc) << 2) | ((addr & 0x30000) >> 14) | (addr & ~0x3ffff); } else if (svga->chain2_write) { writemask2 &= ~0xa; if (addr & 1) writemask2 <<= 1; + addr &= ~1; addr &= dev->vram_mask; } else { @@ -4660,90 +4347,53 @@ mach32_write_common(uint32_t addr, uint8_t val, int linear, mach_t *mach, svga_t dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount; - count = 4; + val = ((val >> (svga->gdcreg[3] & 7)) | (val << (8 - (svga->gdcreg[3] & 7)))); + if ((svga->gdcreg[8] == 0xff) && !(svga->gdcreg[3] & 0x18) && (!svga->gdcreg[1] || svga->set_reset_disabled)) { + for (i = 0; i < 4; i++) { + if (writemask2 & (1 << i)) + dev->vram[addr | i] = val; + } + } else { + for (i = 0; i < 4; i++) { + if (svga->gdcreg[1] & (1 << i)) + vall.b[i] = !!(svga->gdcreg[0] & (1 << i)) * 0xff; + else + vall.b[i] = val; + } - switch (svga->writemode) { - case 0: - val = ((val >> (svga->gdcreg[3] & 7)) | (val << (8 - (svga->gdcreg[3] & 7)))); - if ((svga->gdcreg[8] == 0xff) && !(svga->gdcreg[3] & 0x18) && (!svga->gdcreg[1] || svga->set_reset_disabled)) { - for (i = 0; i < count; i++) { - if (writemask2 & (1 << i)) - dev->vram[addr | i] = val; - } - return; - } else { - for (i = 0; i < count; i++) { - if (svga->gdcreg[1] & (1 << i)) - vall.b[i] = !!(svga->gdcreg[0] & (1 << i)) * 0xff; - else - vall.b[i] = val; - } - } - break; - case 1: - for (i = 0; i < count; i++) { - if (writemask2 & (1 << i)) - dev->vram[addr | i] = dev->latch.b[i]; - } - return; - case 2: - for (i = 0; i < count; i++) - vall.b[i] = !!(val & (1 << i)) * 0xff; - - if (!(svga->gdcreg[3] & 0x18) && (!svga->gdcreg[1] || svga->set_reset_disabled)) { - for (i = 0; i < count; i++) { + switch (svga->gdcreg[3] & 0x18) { + case 0x00: /* Set */ + for (i = 0; i < 4; i++) { if (writemask2 & (1 << i)) dev->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (dev->latch.b[i] & ~svga->gdcreg[8]); } - return; - } - break; - case 3: - val = ((val >> (svga->gdcreg[3] & 7)) | (val << (8 - (svga->gdcreg[3] & 7)))); - wm = svga->gdcreg[8]; - svga->gdcreg[8] &= val; + break; + case 0x08: /* AND */ + for (i = 0; i < 4; i++) { + if (writemask2 & (1 << i)) + dev->vram[addr | i] = (vall.b[i] | ~svga->gdcreg[8]) & dev->latch.b[i]; + } + break; + case 0x10: /* OR */ + for (i = 0; i < 4; i++) { + if (writemask2 & (1 << i)) + dev->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | dev->latch.b[i]; + } + break; + case 0x18: /* XOR */ + for (i = 0; i < 4; i++) { + if (writemask2 & (1 << i)) + dev->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) ^ dev->latch.b[i]; + } + break; - for (i = 0; i < count; i++) - vall.b[i] = !!(svga->gdcreg[0] & (1 << i)) * 0xff; + default: + break; + } - reset_wm = 1; - break; - default: - break; + if (reset_wm) + svga->gdcreg[8] = wm; } - - switch (svga->gdcreg[3] & 0x18) { - case 0x00: /* Set */ - for (i = 0; i < count; i++) { - if (writemask2 & (1 << i)) - dev->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (dev->latch.b[i] & ~svga->gdcreg[8]); - } - break; - case 0x08: /* AND */ - for (i = 0; i < count; i++) { - if (writemask2 & (1 << i)) - dev->vram[addr | i] = (vall.b[i] | ~svga->gdcreg[8]) & dev->latch.b[i]; - } - break; - case 0x10: /* OR */ - for (i = 0; i < count; i++) { - if (writemask2 & (1 << i)) - dev->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | dev->latch.b[i]; - } - break; - case 0x18: /* XOR */ - for (i = 0; i < count; i++) { - if (writemask2 & (1 << i)) - dev->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) ^ dev->latch.b[i]; - } - break; - - default: - break; - } - - if (reset_wm) - svga->gdcreg[8] = wm; } #ifdef ATI_8514_ULTRA @@ -4780,25 +4430,90 @@ static void mach32_write(uint32_t addr, uint8_t val, void *priv) { mach_t *mach = (mach_t *) priv; - mach32_write_common(addr, val, 0, mach, &mach->svga); + svga_t *svga = &mach->svga; + ibm8514_t *dev = (ibm8514_t *) svga->dev8514; + + xga_write_test(addr, val, svga); + addr = (addr & svga->banked_mask) + svga->write_bank; + + if ((((dev->local & 0xff) >= 0x02) && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + addr <<= 1; + switch (addr & 0x06) { + case 0x00: + case 0x06: + mach32_write_common(addr, val & 0x0f, 0, mach, svga); + mach32_write_common(addr + 1, (val >> 4) & 0x0f, 0, mach, svga); + break; + case 0x02: + mach32_write_common(addr + 2, val & 0x0f, 0, mach, svga); + mach32_write_common(addr + 3, (val >> 4) & 0x0f, 0, mach, svga); + break; + case 0x04: + mach32_write_common(addr - 2, val & 0x0f, 0, mach, svga); + mach32_write_common(addr - 1, (val >> 4) & 0x0f, 0, mach, svga); + break; + default: + break; + } + } else + mach32_write_common(addr, val, 0, mach, svga); } static void mach32_writew(uint32_t addr, uint16_t val, void *priv) { mach_t *mach = (mach_t *) priv; - mach32_write_common(addr, val & 0xff, 0, mach, &mach->svga); - mach32_write_common(addr + 1, val >> 8, 0, mach, &mach->svga); + svga_t *svga = &mach->svga; + ibm8514_t *dev = (ibm8514_t *) svga->dev8514; + + xga_write_test(addr, val, svga); + addr = (addr & svga->banked_mask) + svga->write_bank; + + if ((((dev->local & 0xff) >= 0x02) && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + addr <<= 1; + if (addr & 0x04) { + mach32_write_common(addr - 2, val & 0x0f, 0, mach, svga); + mach32_write_common(addr - 1, (val >> 4) & 0x0f, 0, mach, svga); + mach32_write_common(addr + 2, (val >> 8) & 0x0f, 0, mach, svga); + mach32_write_common(addr + 3, (val >> 12) & 0x0f, 0, mach, svga); + } else { + mach32_write_common(addr, val & 0x0f, 0, mach, svga); + mach32_write_common(addr + 1, (val >> 4) & 0x0f, 0, mach, svga); + mach32_write_common(addr + 4, (val >> 8) & 0x0f, 0, mach, svga); + mach32_write_common(addr + 5, (val >> 12) & 0x0f, 0, mach, svga); + } + } else { + mach32_write_common(addr, val & 0xff, 0, mach, svga); + mach32_write_common(addr + 1, val >> 8, 0, mach, svga); + } } static void mach32_writel(uint32_t addr, uint32_t val, void *priv) { mach_t *mach = (mach_t *) priv; - mach32_write_common(addr, val & 0xff, 0, mach, &mach->svga); - mach32_write_common(addr + 1, val >> 8, 0, mach, &mach->svga); - mach32_write_common(addr + 2, val >> 16, 0, mach, &mach->svga); - mach32_write_common(addr + 3, val >> 24, 0, mach, &mach->svga); + svga_t *svga = &mach->svga; + ibm8514_t *dev = (ibm8514_t *) svga->dev8514; + + xga_write_test(addr, val, svga); + addr = (addr & svga->banked_mask) + svga->write_bank; + + if ((((dev->local & 0xff) >= 0x02) && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + addr <<= 1; + mach32_write_common(addr, val & 0x0f, 0, mach, svga); + mach32_write_common(addr + 1, (val >> 4) & 0x0f, 0, mach, svga); + mach32_write_common(addr + 4, (val >> 8) & 0x0f, 0, mach, svga); + mach32_write_common(addr + 5, (val >> 12) & 0x0f, 0, mach, svga); + mach32_write_common(addr + 2, (val >> 16) & 0x0f, 0, mach, svga); + mach32_write_common(addr + 3, (val >> 20) & 0x0f, 0, mach, svga); + mach32_write_common(addr + 6, (val >> 24) & 0x0f, 0, mach, svga); + mach32_write_common(addr + 7, (val >> 28) & 0x0f, 0, mach, svga); + } else { + mach32_write_common(addr, val & 0xff, 0, mach, svga); + mach32_write_common(addr + 1, val >> 8, 0, mach, svga); + mach32_write_common(addr + 2, val >> 16, 0, mach, svga); + mach32_write_common(addr + 3, val >> 24, 0, mach, svga); + } } static __inline void @@ -4808,10 +4523,25 @@ mach32_writew_linear(uint32_t addr, uint16_t val, mach_t *mach) ibm8514_t *dev = (ibm8514_t *) svga->dev8514; cycles -= svga->monitor->mon_video_timing_write_w; + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) + addr <<= 1; addr &= dev->vram_mask; dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount; - *(uint16_t *) &dev->vram[addr] = val; + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + if (addr & 0x04) { + dev->vram[addr - 2] = val & 0x0f; + dev->vram[addr - 1] = (val >> 4) & 0x0f; + dev->vram[addr + 2] = (val >> 8) & 0x0f; + dev->vram[addr + 3] = (val >> 12) & 0x0f; + } else { + dev->vram[addr] = val & 0x0f; + dev->vram[addr + 1] = (val >> 4) & 0x0f; + dev->vram[addr + 4] = (val >> 8) & 0x0f; + dev->vram[addr + 5] = (val >> 12) & 0x0f; + } + } else + *(uint16_t *) &dev->vram[addr] = val; } static __inline void @@ -4822,9 +4552,22 @@ mach32_writel_linear(uint32_t addr, uint32_t val, mach_t *mach) cycles -= svga->monitor->mon_video_timing_write_l; + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) + addr <<= 1; + addr &= dev->vram_mask; dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount; - *(uint32_t *) &dev->vram[addr] = val; + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + dev->vram[addr] = val & 0x0f; + dev->vram[addr + 1] = (val >> 4) & 0x0f; + dev->vram[addr + 4] = (val >> 8) & 0x0f; + dev->vram[addr + 5] = (val >> 12) & 0x0f; + dev->vram[addr + 2] = (val >> 16) & 0x0f; + dev->vram[addr + 3] = (val >> 20) & 0x0f; + dev->vram[addr + 6] = (val >> 24) & 0x0f; + dev->vram[addr + 7] = (val >> 28) & 0x0f; + } else + *(uint32_t *) &dev->vram[addr] = val; } static __inline uint8_t @@ -4835,17 +4578,37 @@ mach32_read_common(uint32_t addr, int linear, mach_t *mach, svga_t *svga) int readplane = svga->readplane; uint8_t count; uint8_t temp; - uint8_t ret; + uint8_t ret = 0x00; cycles -= svga->monitor->mon_video_timing_read_b; if (linear) { - return dev->vram[addr & dev->vram_mask]; - } else { - (void) xga_read_test(addr, svga); - addr = mach32_decode_addr(svga, addr, 0); - if (addr == 0xffffffff) - return 0xff; + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) + addr <<= 1; + + addr &= dev->vram_mask; + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + switch (addr & 0x06) { + case 0x00: + case 0x06: + ret = dev->vram[addr] & 0x0f; + ret |= (dev->vram[addr + 1] << 4); + break; + case 0x02: + ret = dev->vram[addr + 2] & 0x0f; + ret |= (dev->vram[addr + 3] << 4); + break; + case 0x04: + ret = dev->vram[addr - 2] & 0x0f; + ret |= (dev->vram[addr - 1] << 4); + break; + default: + break; + } + } else + ret = dev->vram[addr]; + + return ret; } count = 2; @@ -4853,7 +4616,7 @@ mach32_read_common(uint32_t addr, int linear, mach_t *mach, svga_t *svga) latch_addr = (addr << count) & svga->decode_mask; count = (1 << count); - if ((svga->chain4 && (svga->packed_chain4 || svga->force_old_addr)) || svga->fb_only) { + if (svga->chain4) { addr &= svga->decode_mask; if (addr >= dev->vram_size) return 0xff; @@ -4861,9 +4624,6 @@ mach32_read_common(uint32_t addr, int linear, mach_t *mach, svga_t *svga) for (uint8_t i = 0; i < count; i++) dev->latch.b[i] = dev->vram[latch_addr | i]; return dev->vram[addr & dev->vram_mask]; - } else if (svga->chain4 && !svga->force_old_addr) { - readplane = addr & 3; - addr = ((addr & 0xfffc) << 2) | ((addr & 0x30000) >> 14) | (addr & ~0x3ffff); } else if (svga->chain2_read) { readplane = (readplane & 2) | (addr & 1); addr &= ~1; @@ -4896,6 +4656,7 @@ mach32_read_common(uint32_t addr, int linear, mach_t *mach, svga_t *svga) addr &= dev->vram_mask; + mach_log("ReadMode=%02x.\n", svga->readmode); if (svga->readmode) { temp = 0xff; @@ -4959,9 +4720,35 @@ static uint8_t mach32_read(uint32_t addr, void *priv) { mach_t *mach = (mach_t *) priv; - uint8_t ret; + svga_t *svga = &mach->svga; + ibm8514_t *dev = (ibm8514_t *) svga->dev8514; + uint8_t ret = 0x00; + + (void) xga_read_test(addr, svga); + addr = (addr & svga->banked_mask) + svga->read_bank; + + if ((((dev->local & 0xff) >= 0x02) && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + addr <<= 1; + switch (addr & 0x06) { + case 0x00: + case 0x06: + ret = mach32_read_common(addr, 0, mach, svga) & 0x0f; + ret |= (mach32_read_common(addr + 1, 0, mach, svga) << 4); + break; + case 0x02: + ret = mach32_read_common(addr + 2, 0, mach, svga) & 0x0f; + ret |= (mach32_read_common(addr + 3, 0, mach, svga) << 4); + break; + case 0x04: + ret = mach32_read_common(addr - 2, 0, mach, svga) & 0x0f; + ret |= (mach32_read_common(addr - 1, 0, mach, svga) << 4); + break; + default: + break; + } + } else + ret = mach32_read_common(addr, 0, mach, svga); - ret = mach32_read_common(addr, 0, mach, &mach->svga); return ret; } @@ -4969,10 +4756,30 @@ static uint16_t mach32_readw(uint32_t addr, void *priv) { mach_t *mach = (mach_t *) priv; - uint16_t ret; + svga_t *svga = &mach->svga; + ibm8514_t *dev = (ibm8514_t *) svga->dev8514; + uint16_t ret; - ret = mach32_read_common(addr, 0, mach, &mach->svga); - ret |= (mach32_read_common(addr + 1, 0, mach, &mach->svga) << 8); + (void) xga_read_test(addr, svga); + addr = (addr & svga->banked_mask) + svga->read_bank; + + if ((((dev->local & 0xff) >= 0x02) && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + addr <<= 1; + if (addr & 0x04) { + ret = mach32_read_common(addr - 2, 0, mach, svga) & 0x0f; + ret |= (mach32_read_common(addr - 1, 0, mach, svga) << 4); + ret |= (mach32_read_common(addr + 2, 0, mach, svga) << 8); + ret |= (mach32_read_common(addr + 3, 0, mach, svga) << 12); + } else { + ret = mach32_read_common(addr, 0, mach, svga) & 0x0f; + ret |= (mach32_read_common(addr + 1, 0, mach, svga) << 4); + ret |= (mach32_read_common(addr + 4, 0, mach, svga) << 8); + ret |= (mach32_read_common(addr + 5, 0, mach, svga) << 12); + } + } else { + ret = mach32_read_common(addr, 0, mach, svga); + ret |= (mach32_read_common(addr + 1, 0, mach, svga) << 8); + } return ret; } @@ -4980,12 +4787,29 @@ static uint32_t mach32_readl(uint32_t addr, void *priv) { mach_t *mach = (mach_t *) priv; - uint32_t ret; + svga_t *svga = &mach->svga; + ibm8514_t *dev = (ibm8514_t *) svga->dev8514; + uint32_t ret; - ret = mach32_read_common(addr, 0, mach, &mach->svga); - ret |= (mach32_read_common(addr + 1, 0, mach, &mach->svga) << 8); - ret |= (mach32_read_common(addr + 2, 0, mach, &mach->svga) << 16); - ret |= (mach32_read_common(addr + 3, 0, mach, &mach->svga) << 24); + (void) xga_read_test(addr, svga); + addr = (addr & svga->banked_mask) + svga->read_bank; + + if ((((dev->local & 0xff) >= 0x02) && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + addr <<= 1; + ret = mach32_read_common(addr, 0, mach, svga) & 0x0f; + ret |= (mach32_read_common(addr + 1, 0, mach, svga) << 4); + ret |= (mach32_read_common(addr + 4, 0, mach, svga) << 8); + ret |= (mach32_read_common(addr + 5, 0, mach, svga) << 12); + ret |= (mach32_read_common(addr + 2, 0, mach, svga) << 16); + ret |= (mach32_read_common(addr + 3, 0, mach, svga) << 20); + ret |= (mach32_read_common(addr + 6, 0, mach, svga) << 24); + ret |= (mach32_read_common(addr + 7, 0, mach, svga) << 28); + } else { + ret = mach32_read_common(addr, 0, mach, svga); + ret |= (mach32_read_common(addr + 1, 0, mach, svga) << 8); + ret |= (mach32_read_common(addr + 2, 0, mach, svga) << 16); + ret |= (mach32_read_common(addr + 3, 0, mach, svga) << 24); + } return ret; } @@ -4994,10 +4818,27 @@ mach32_readw_linear(uint32_t addr, mach_t *mach) { svga_t *svga = &mach->svga; ibm8514_t *dev = (ibm8514_t *) svga->dev8514; + uint16_t ret; cycles -= svga->monitor->mon_video_timing_read_w; + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + addr <<= 1; + addr &= dev->vram_mask; + if (addr & 0x04) { + ret = dev->vram[addr - 2] & 0x0f; + ret |= (dev->vram[addr - 1] << 4); + ret |= (dev->vram[addr + 2] << 8); + ret |= (dev->vram[addr + 3] << 12); + } else { + ret = dev->vram[addr] & 0x0f; + ret |= (dev->vram[addr + 1] << 4); + ret |= (dev->vram[addr + 4] << 8); + ret |= (dev->vram[addr + 5] << 12); + } + } else + ret = *(uint16_t *) &dev->vram[addr & dev->vram_mask]; - return *(uint16_t *) &dev->vram[addr & dev->vram_mask]; + return ret; } static __inline uint32_t @@ -5005,10 +4846,25 @@ mach32_readl_linear(uint32_t addr, mach_t *mach) { svga_t *svga = &mach->svga; ibm8514_t *dev = (ibm8514_t *) svga->dev8514; + uint32_t ret; cycles -= svga->monitor->mon_video_timing_read_l; - return *(uint32_t *) &dev->vram[addr & dev->vram_mask]; + if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) { + addr <<= 1; + addr &= dev->vram_mask; + ret = dev->vram[addr] & 0x0f; + ret |= (dev->vram[addr + 1] << 4); + ret |= (dev->vram[addr + 4] << 8); + ret |= (dev->vram[addr + 5] << 12); + ret |= (dev->vram[addr + 2] << 16); + ret |= (dev->vram[addr + 3] << 20); + ret |= (dev->vram[addr + 6] << 24); + ret |= (dev->vram[addr + 7] << 28); + } else + ret = *(uint32_t *) &dev->vram[addr & dev->vram_mask]; + + return ret; } static void @@ -5029,10 +4885,10 @@ mach32_ap_writeb(uint32_t addr, uint8_t val, void *priv) mach_accel_outb(0x02e8 + (addr & 1) + (port_dword << 8), val, mach); } } else { - mach_log("Linear WORDB Write=%08x, val=%02x.\n", addr, val); - if (dev->on[0] || dev->on[1]) + if (dev->on) { + mach_log("Linear WORDB Write=%08x, val=%02x, ON=%x, dpconfig=%04x, apsize=%08x.\n", addr & dev->vram_mask, val, dev->on, mach->accel.dp_config, mach->ap_size << 20); mach32_write_common(addr, val, 1, mach, svga); - else + } else svga_write_linear(addr, val, svga); } } @@ -5055,8 +4911,8 @@ mach32_ap_writew(uint32_t addr, uint16_t val, void *priv) mach_accel_outw(0x02e8 + (port_dword << 8), val, mach); } } else { - mach_log("Linear WORDW Write=%08x, val=%04x.\n", addr, val); - if (dev->on[0] || dev->on[1]) { + if (dev->on) { + mach_log("Linear WORDW Write=%08x, val=%04x, ON=%x, dpconfig=%04x, apsize=%08x.\n", addr & dev->vram_mask, val, dev->on, mach->accel.dp_config, mach->ap_size << 20); mach32_writew_linear(addr, val, mach); } else svga_writew_linear(addr, val, svga); @@ -5083,8 +4939,8 @@ mach32_ap_writel(uint32_t addr, uint32_t val, void *priv) mach_accel_outw(0x02e8 + (port_dword << 8) + 4, val >> 16, mach); } } else { - mach_log("Linear WORDL Write=%08x, val=%08x.\n", addr, val); - if (dev->on[0] || dev->on[1]) { + if (dev->on) { + mach_log("Linear WORDL Write=%08x, val=%08x, ON=%x, dpconfig=%04x, apsize=%08x.\n", addr & dev->vram_mask, val, dev->on, mach->accel.dp_config, mach->ap_size << 20); mach32_writel_linear(addr, val, mach); } else svga_writel_linear(addr, val, svga); @@ -5107,7 +4963,7 @@ mach32_ap_readb(uint32_t addr, void *priv) else temp = mach_accel_inb(0x02e8 + (addr & 1) + (port_dword << 8), mach); } else { - if (dev->on[0] || dev->on[1]) + if (dev->on) temp = mach32_read_common(addr, 1, mach, svga); else temp = svga_read_linear(addr, svga); @@ -5134,7 +4990,7 @@ mach32_ap_readw(uint32_t addr, void *priv) else temp = mach_accel_inw(0x02e8 + (port_dword << 8), mach); } else { - if (dev->on[0] || dev->on[1]) { + if (dev->on) { temp = mach32_readw_linear(addr, mach); } else temp = svga_readw_linear(addr, svga); @@ -5164,12 +5020,12 @@ mach32_ap_readl(uint32_t addr, void *priv) temp |= (mach_accel_inw(0x02e8 + (port_dword << 8) + 4, mach) << 8); } } else { - if (dev->on[0] || dev->on[1]) { + if (dev->on) { temp = mach32_readl_linear(addr, mach); } else temp = svga_readl_linear(addr, svga); - mach_log("Linear WORDL Read=%08x, ret=%08x, ON0=%d, ON1=%d.\n", addr, temp, dev->on[0], dev->on[1]); + mach_log("Linear WORDL Read=%08x, ret=%08x, ON%d.\n", addr, temp, dev->on); } return temp; @@ -5186,7 +5042,7 @@ mach32_updatemapping(mach_t *mach, svga_t *svga) return; } - if (mach->regs[0xbd] & 4) { + if (mach->regs[0xbd] & 0x04) { mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); svga->banked_mask = 0xffff; } else { @@ -5218,18 +5074,21 @@ mach32_updatemapping(mach_t *mach, svga_t *svga) if (((mach->memory_aperture & 3) == 1) && !mach->pci_bus) { /*1 MB aperture*/ mach->ap_size = 1; + mach_log("Linear Enabled APSIZE=1.\n"); mem_mapping_set_addr(&mach->mmio_linear_mapping, mach->linear_base, mach->ap_size << 20); } else { /*4 MB aperture*/ mach->ap_size = 4; + mach_log("Linear Enabled APSIZE=4.\n"); mem_mapping_set_addr(&mach->mmio_linear_mapping, mach->linear_base, mach->ap_size << 20); } } else { mach->ap_size = 4; + mach_log("Linear Disabled APSIZE=4.\n"); mem_mapping_disable(&mach->mmio_linear_mapping); } - if ((dev->on[0] || dev->on[1]) && (mach->ext_on[0] || mach->ext_on[1]) && (dev->vendor_mode[0] || dev->vendor_mode[1])) { - mach_log("ExtON.\n"); + if (dev->on && ((dev->local & 0xff) >= 0x02)) { + mach_log("Mach32 banked mapping.\n"); #ifdef ATI_8514_ULTRA if (svga->ext8514 != NULL) { mem_mapping_set_handler(&svga->mapping, ati8514_read, ati8514_readw, ati8514_readl, ati8514_write, ati8514_writew, ati8514_writel); @@ -5241,7 +5100,7 @@ mach32_updatemapping(mach_t *mach, svga_t *svga) mem_mapping_set_p(&svga->mapping, mach); } } else { - mach_log("ExtOFF.\n"); + mach_log("IBM compatible banked mapping.\n"); mem_mapping_set_handler(&svga->mapping, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel); mem_mapping_set_p(&svga->mapping, svga); } @@ -5267,6 +5126,7 @@ mach32_hwcursor_draw(svga_t *svga, int displine) case 8: color0 = dev->pallook[mach->cursor_col_0]; color1 = dev->pallook[mach->cursor_col_1]; + mach_log("4/8BPP: Color0=%08x, Color1=%08x.\n", color0, color1); break; case 15: color0 = video_15to32[((mach->ext_cur_col_0_r << 16) | (mach->ext_cur_col_0_g << 8) | mach->cursor_col_0) & 0xffff]; @@ -5288,6 +5148,7 @@ mach32_hwcursor_draw(svga_t *svga, int displine) for (int x = 0; x < 64; x += 8) { dat = dev->vram[dev->hwcursor_latch.addr & dev->vram_mask] | (dev->vram[(dev->hwcursor_latch.addr + 1) & dev->vram_mask] << 8); + for (int xx = 0; xx < 8; xx++) { comb = (dat >> (xx << 1)) & 0x03; @@ -5598,13 +5459,11 @@ mach_mca_reset(void *priv) svga_t *svga = &mach->svga; ibm8514_t *dev = (ibm8514_t *) svga->dev8514; - mem_mapping_disable(&mach->bios_rom.mapping); - mem_mapping_disable(&mach->bios_rom2.mapping); mach_log("MCA reset.\n"); - dev->on[0] = 0; - dev->on[1] = 0; + dev->on = 0; vga_on = 1; mach_mca_write(0x102, 0, mach); + timer_set_callback(&svga->timer, svga_poll); } #ifdef ATI_8514_ULTRA @@ -5794,8 +5653,9 @@ mach8_init(const device_t *info) dev->type = info->flags; dev->local = info->local & 0xff; mach->has_bios = !(info->local & 0xff00); - mach->memory = device_get_config_int("memory"); mach->ramdac_type = mach->pci_bus ? device_get_config_int("ramdac") : 1; + dev->vram_amount = device_get_config_int("memory"); + dev->vram_512k_8514 = dev->vram_amount == 512; if ((dev->local & 0xff) >= 0x02) { if (mach->pci_bus) { @@ -5833,12 +5693,12 @@ mach8_init(const device_t *info) 0, MEM_MAPPING_EXTERNAL); if ((dev->local & 0xff) >= 0x02) { - svga_init(info, svga, mach, mach->memory << 10, /*default: 2MB for Mach32*/ + svga_init(info, svga, mach, dev->vram_amount << 10, /*default: 2MB for Mach32*/ mach_recalctimings, mach_in, mach_out, mach32_hwcursor_draw, NULL); - dev->vram_size = mach->memory << 10; + dev->vram_size = dev->vram_amount << 10; dev->vram = calloc(dev->vram_size, 1); dev->changedvram = calloc((dev->vram_size >> 12) + 1, 1); dev->vram_mask = dev->vram_size - 1; @@ -5886,20 +5746,22 @@ mach8_init(const device_t *info) mach_in, mach_out, NULL, NULL); - dev->vram_size = (1024 << 10); + dev->vram_size = (dev->vram_amount << 10); dev->vram = calloc(dev->vram_size, 1); dev->changedvram = calloc((dev->vram_size >> 12) + 1, 1); dev->vram_mask = dev->vram_size - 1; video_inform(VIDEO_FLAG_TYPE_8514, &timing_gfxultra_isa); - mach->config1 = 0x01 | 0x02 | 0x20 | 0x08 | 0x80; + mach->config1 = 0x01 | 0x02 | 0x08 | 0x80; + if (dev->vram_amount >= 1024) + mach->config1 |= 0x20; + mach->config2 = 0x02; svga->clock_gen = device_add(&ati18811_0_device); } dev->bpp = 0; svga->getclock = ics2494_getclock; - dev->on[0] = 0; - dev->on[1] = 0; + dev->on = 0; dev->ext_pitch = 1024; dev->ext_crt_pitch = 0x80; dev->accel_bpp = 8; @@ -5915,6 +5777,7 @@ mach8_init(const device_t *info) if ((dev->local & 0xff) >= 0x02) { svga->decode_mask = (4 << 20) - 1; + mach->accel.cmd_type = -1; mach->cursor_col_1 = 0xff; mach->ext_cur_col_1_r = 0xff; mach->ext_cur_col_1_g = 0xff; @@ -5954,23 +5817,25 @@ ati8514_init(svga_t *svga, void *ext8514, void *dev8514) mach_t *mach = (mach_t *) ext8514; ibm8514_t *dev = (ibm8514_t *) dev8514; - dev->on[0] = 0; - dev->on[1] = 0; + dev->on = 0; dev->ext_pitch = 1024; dev->ext_crt_pitch = 0x80; dev->accel_bpp = 8; dev->rowoffset = 0x80; - dev->hdisp = 1024; - dev->vdisp = 768; + dev->hdisp = 0; + dev->vdisp = 0; io_sethandler(0x02ea, 4, ati8514_in, NULL, NULL, ati8514_out, NULL, NULL, svga); ati8514_io_set(svga); mach->mca_bus = !!(dev->type & DEVICE_MCA); if (mach->mca_bus) - mach->config1 = 0x02 | 0x04 | 0x08 | 0x20 | 0x80; + mach->config1 = 0x02 | 0x04; else - mach->config1 = 0x02 | 0x08 | 0x20 | 0x80; + mach->config1 = 0x02 | 0x2000; + + if (dev->vram_amount >= 1024) + mach->config1 |= 0x20; mach->config2 = 0x01 | 0x02; } @@ -6042,6 +5907,32 @@ mach_force_redraw(void *priv) svga->fullchange = svga->monitor->mon_changeframecount; } +// clang-format off +static const device_config_t mach8_config[] = { + { + .name = "memory", + .description = "Memory size", + .type = CONFIG_SELECTION, + .default_int = 1024, + .selection = { + { + .description = "512 KB", + .value = 512 + }, + { + .description = "1 MB", + .value = 1024 + }, + { + .description = "" + } + } + }, + { + .type = CONFIG_END + } +}; + // clang-format off static const device_config_t mach32_config[] = { { @@ -6140,7 +6031,7 @@ const device_t mach8_vga_isa_device = { { .available = mach8_vga_available }, .speed_changed = mach_speed_changed, .force_redraw = mach_force_redraw, - .config = NULL + .config = mach8_config }; const device_t mach32_isa_device = { diff --git a/src/video/vid_bt481_ramdac.c b/src/video/vid_bt481_ramdac.c new file mode 100644 index 000000000..6cf5f2b1b --- /dev/null +++ b/src/video/vid_bt481_ramdac.c @@ -0,0 +1,160 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Emulation of the Brooktree BT481 true colour RAMDAC + * family. + * + * + * + * Authors: TheCollector1995. + * + * Copyright 2024 TheCollector1995. + */ +#include +#include +#include +#include +#include +#include <86box/86box.h> +#include <86box/device.h> +#include <86box/mem.h> +#include <86box/timer.h> +#include <86box/video.h> +#include <86box/vid_svga.h> + +typedef struct bt481_ramdac_t { + int state; + uint8_t cmd; +} bt481_ramdac_t; + +static void +bt481_ramdac_command(uint8_t val, void *priv, svga_t *svga) +{ + bt481_ramdac_t *ramdac = (bt481_ramdac_t *) priv; + ramdac->cmd = val; + pclog("RAMDAC CMD=%02x.\n", val); + switch ((ramdac->cmd >> 4) & 0x0f) { + default: + case 0x00: + svga->bpp = 8; + break; + case 0x08: + case 0x0a: + svga->bpp = 15; + break; + case 0x09: + case 0x0c: + svga->bpp = 16; + break; + case 0x0e: + case 0x0f: + svga->bpp = 24; + break; + } + svga_recalctimings(svga); +} + +void +bt481_ramdac_out(uint16_t addr, int rs2, uint8_t val, void *priv, svga_t *svga) +{ + bt481_ramdac_t *ramdac = (bt481_ramdac_t *) priv; + uint8_t rs = (addr & 0x03) | ((!!rs2) << 2); + + switch (rs) { + case 0x00: + case 0x01: + case 0x03: + case 0x04: + case 0x05: + case 0x07: + svga_out(addr, val, svga); + ramdac->state = 0; + break; + case 0x02: + pclog("RAMDAC Write State=%x.\n", ramdac->state); + switch (ramdac->state) { + case 4: + bt481_ramdac_command(val, ramdac, svga); + break; + default: + svga_out(addr, val, svga); + break; + } + break; + case 0x06: + bt481_ramdac_command(val, ramdac, svga); + ramdac->state = 0; + break; + + default: + break; + } +} + +uint8_t +bt481_ramdac_in(uint16_t addr, int rs2, void *priv, svga_t *svga) +{ + bt481_ramdac_t * ramdac = (bt481_ramdac_t *) priv; + uint8_t temp = 0xff; + uint8_t rs = (addr & 0x03) | ((!!rs2) << 2); + + switch (rs) { + case 0x02: + case 0x06: + switch (ramdac->state) { + case 4: + temp = ramdac->cmd; + break; + default: + temp = svga_in(addr, svga); + ramdac->state++; + break; + } + break; + + default: + temp = svga_in(addr, svga); + ramdac->state = 0; + break; + } + + pclog("RAMDAC IN=%02x, ret=%02x.\n", rs, temp); + return temp; +} + +static void * +bt481_ramdac_init(const device_t *info) +{ + bt481_ramdac_t *ramdac = (bt481_ramdac_t *) malloc(sizeof(bt481_ramdac_t)); + memset(ramdac, 0, sizeof(bt481_ramdac_t)); + + return ramdac; +} + +static void +bt481_ramdac_close(void *priv) +{ + bt481_ramdac_t *ramdac = (bt481_ramdac_t *) priv; + + if (ramdac) + free(ramdac); +} + +const device_t bt481_ramdac_device = { + .name = "Brooktree Bt481 RAMDAC", + .internal_name = "bt481_ramdac", + .flags = 0, + .local = 0, + .init = bt481_ramdac_init, + .close = bt481_ramdac_close, + .reset = NULL, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; diff --git a/src/video/vid_paradise.c b/src/video/vid_paradise.c index 73902345d..053ef2651 100644 --- a/src/video/vid_paradise.c +++ b/src/video/vid_paradise.c @@ -303,7 +303,7 @@ paradise_remap(paradise_t *paradise) void paradise_recalctimings(svga_t *svga) { - const paradise_t *paradise = (paradise_t *) svga->priv; + paradise_t *paradise = (paradise_t *) svga->priv; svga->lowres = !(svga->gdcreg[0x0e] & 0x01); @@ -337,15 +337,11 @@ paradise_recalctimings(svga_t *svga) svga->hdisp >>= 1; if (svga->hdisp == 788) svga->hdisp += 12; - if (svga->hdisp == 800) - svga->ma_latch -= 3; } else if (svga->bpp == 15) { svga->render = svga_render_15bpp_highres; svga->hdisp >>= 1; if (svga->hdisp == 788) svga->hdisp += 12; - if (svga->hdisp == 800) - svga->ma_latch -= 3; } else svga->render = svga_render_8bpp_highres; @@ -366,6 +362,11 @@ paradise_write(uint32_t addr, uint8_t val, void *priv) uint32_t prev_addr; uint32_t prev_addr2; + if (!(svga->attrregs[0x10] & 0x40)) { + svga_write(addr, val, svga); + return; + } + addr = (addr & 0x7fff) + paradise->write_bank[(addr >> 15) & 3]; /*Could be done in a better way but it works.*/ @@ -399,6 +400,11 @@ paradise_writew(uint32_t addr, uint16_t val, void *priv) uint32_t prev_addr; uint32_t prev_addr2; + if (!(svga->attrregs[0x10] & 0x40)) { + svga_writew(addr, val, svga); + return; + } + addr = (addr & 0x7fff) + paradise->write_bank[(addr >> 15) & 3]; /*Could be done in a better way but it works.*/ @@ -432,6 +438,9 @@ paradise_read(uint32_t addr, void *priv) uint32_t prev_addr; uint32_t prev_addr2; + if (!(svga->attrregs[0x10] & 0x40)) + return svga_read(addr, svga); + addr = (addr & 0x7fff) + paradise->read_bank[(addr >> 15) & 3]; /*Could be done in a better way but it works.*/ @@ -465,6 +474,9 @@ paradise_readw(uint32_t addr, void *priv) uint32_t prev_addr; uint32_t prev_addr2; + if (!(svga->attrregs[0x10] & 0x40)) + return svga_readw(addr, svga); + addr = (addr & 0x7fff) + paradise->read_bank[(addr >> 15) & 3]; /*Could be done in a better way but it works.*/ diff --git a/src/video/vid_s3.c b/src/video/vid_s3.c index 2b14284c7..c91eab589 100644 --- a/src/video/vid_s3.c +++ b/src/video/vid_s3.c @@ -253,6 +253,7 @@ typedef struct s3_t { uint16_t multifunc_cntl; uint16_t multifunc[16]; uint8_t pix_trans[4]; + uint16_t pix_trans_val; int ssv_state; int16_t cx, cy; @@ -278,14 +279,8 @@ typedef struct s3_t { uint8_t frgd_color_actual[2]; uint8_t bkgd_color_actual[2]; uint8_t wrt_mask_actual[2]; - uint8_t rd_mask_actual[2]; - uint8_t *pix_trans_ptr; - int pix_trans_ptr_cnt; - int pix_trans_x_count; - int pix_trans_x_count2; int color_16bit_check; - int color_16bit_check_rectfill; - uint16_t minus, srcminus; + int16_t minus; /*For non-threaded FIFO*/ int setup_fifo_slot; @@ -412,6 +407,7 @@ static uint32_t s3_accel_read_l(uint32_t addr, void *priv); static void s3_out(uint16_t addr, uint8_t val, void *priv); static uint8_t s3_in(uint16_t addr, void *priv); +static void s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val); static void s3_accel_out(uint16_t port, uint8_t val, void *priv); static void s3_accel_out_w(uint16_t port, uint16_t val, void *priv); static void s3_accel_out_l(uint16_t port, uint32_t val, void *priv); @@ -508,11 +504,10 @@ s3_update_irqs(s3_t *s3) if (!s3->pci) return; - if (s3->subsys_cntl & s3->subsys_stat & INT_MASK) { + if (s3->subsys_cntl & s3->subsys_stat & INT_MASK) pci_set_irq(s3->pci_slot, PCI_INTA, &s3->irq_state); - } else { + else pci_clear_irq(s3->pci_slot, PCI_INTA, &s3->irq_state); - } } void s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, void *priv); @@ -536,21 +531,20 @@ static void s3_visionx68_video_engine_op(uint32_t cpu_dat, s3_t *s3); } #define READ_PIXTRANS_BYTE_IO(n) \ - s3->accel.pix_trans[n] = svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx + n - s3->accel.minus)) & s3->vram_mask]; + s3->accel.pix_trans[n] = svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx - s3->accel.minus + n)) & s3->vram_mask]; #define READ_PIXTRANS_BYTE_MM \ temp = svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx)) & s3->vram_mask]; #define READ_PIXTRANS_WORD \ - if ((s3->bpp == 0) && !s3->color_16bit) { \ + if ((s3->bpp == 0) && !s3->color_16bit) { \ temp = svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx)) & s3->vram_mask]; \ temp |= (svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx + 1)) & s3->vram_mask] << 8); \ - } else { \ - temp = vram_w[dword_remap_w(svga, (s3->accel.dest + s3->accel.cx - s3->accel.minus)) & (s3->vram_mask >> 1)]; \ - } + } else \ + temp = vram_w[dword_remap_w(svga, (s3->accel.dest + s3->accel.cx - s3->accel.minus)) & (s3->vram_mask >> 1)]; #define READ_PIXTRANS_LONG \ - if ((s3->bpp == 0) && !s3->color_16bit) { \ + if ((s3->bpp == 0) && !s3->color_16bit) { \ temp = svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx)) & s3->vram_mask]; \ temp |= (svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx + 1)) & s3->vram_mask] << 8); \ temp |= (svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx + 2)) & s3->vram_mask] << 16); \ @@ -612,111 +606,62 @@ s3_accel_out_pixtrans_w(s3_t *s3, uint16_t val) s3->accel.frgd_mix, s3->accel.bkgd_mix, s3->accel.cur_x, val); switch (s3->accel.cmd & 0x600) { case 0x000: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 0x02)) { if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { if (s3->accel.cmd & 0x1000) val = (val >> 8) | (val << 8); s3->accel_start(8, 1, val | (val << 16), 0, s3); + } else { + if ((s3->bpp == 0) && s3->color_16bit) + s3->accel_start(2, 1, 0xffffffff, val | (val << 16), s3); + else + s3->accel_start(1, 1, 0xffffffff, val | (val << 16), s3); + } + } else { + if ((s3->bpp == 0) && s3->color_16bit) { + if (s3->accel.cur_x & 0x400) + val = (val >> 8) | (val << 8); + + s3->accel_start(2, 1, 0xffffffff, val | (val << 16), s3); } else s3->accel_start(1, 1, 0xffffffff, val | (val << 16), s3); - } else { - if (s3->accel.color_16bit_check_rectfill) { - if (s3->accel.color_16bit_check) { - if (s3->accel.pix_trans_x_count < s3->accel.pix_trans_ptr_cnt) { - s3_log("Word: CPU data CMD=%04x, byte write=%02x, " - "cnt=%d, check=%d.\n", s3->accel.cmd, val & 0xff, - s3->accel.pix_trans_x_count, s3->accel.color_16bit_check); - s3->accel.pix_trans_ptr[s3->accel.pix_trans_x_count] = val & 0xff; - s3->accel.pix_trans_ptr[s3->accel.pix_trans_x_count + 1] = val >> 8; - s3->accel.pix_trans_x_count += 2; - } - } - break; - } - s3->accel_start(1, 1, 0xffffffff, val | (val << 16), s3); } break; case 0x200: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 0x02)) { if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { if (s3->accel.cmd & 0x1000) val = (val >> 8) | (val << 8); + s3->accel_start(16, 1, val | (val << 16), 0, s3); } else s3->accel_start(2, 1, 0xffffffff, val | (val << 16), s3); } else { - if (s3->accel.color_16bit_check_rectfill) { - if (s3->accel.color_16bit_check) { - if (s3->accel.pix_trans_x_count < s3->accel.pix_trans_ptr_cnt) { - s3_log("Word: CPU data CMD=%04x, word write=%04x, cnt=%d, check=%d, " - "totalptrcnt=%d.\n", s3->accel.cmd, val, - s3->accel.pix_trans_x_count, s3->accel.color_16bit_check, - s3->accel.pix_trans_ptr_cnt); - s3->accel.pix_trans_ptr[s3->accel.pix_trans_x_count] = val & 0xff; - s3->accel.pix_trans_ptr[s3->accel.pix_trans_x_count + 1] = val >> 8; - s3->accel.pix_trans_x_count += 2; - s3->accel.pix_trans_x_count2 = s3->accel.pix_trans_x_count; - } - } else { - if (s3->accel.pix_trans_x_count < s3->accel.pix_trans_ptr_cnt) { - s3_log("Word: CPU data CMD=%04x, word write=%04x, cnt=%d, check=%d, " - "totalptrcnt=%d.\n", s3->accel.cmd, val, - s3->accel.pix_trans_x_count, s3->accel.color_16bit_check, - s3->accel.pix_trans_ptr_cnt); - s3->accel.pix_trans_ptr[s3->accel.pix_trans_x_count2] = val & 0xff; - s3->accel.pix_trans_ptr[s3->accel.pix_trans_x_count2 + 1] = val >> 8; - s3->accel.pix_trans_x_count += 2; - } - if (s3->accel.pix_trans_x_count2 == s3->accel.pix_trans_ptr_cnt) { - for (int i = 0; i < s3->accel.pix_trans_ptr_cnt; i += 2) { - s3_log("Transferring write count=%d, bytes=%08x.\n", i, - s3->accel.pix_trans_ptr[i] | - (s3->accel.pix_trans_ptr[i + 1] << 8) | - (s3->accel.pix_trans_ptr[i + 2] << 16) | - (s3->accel.pix_trans_ptr[i + 3] << 24)); - s3->accel_start(2, 1, 0xffffffff, s3->accel.pix_trans_ptr[i] | - (s3->accel.pix_trans_ptr[i + 1] << 8), s3); - } - - s3->accel.pix_trans_x_count2 = 0; - s3->accel.color_16bit_check_rectfill = 0; - if (s3->accel.pix_trans_ptr != NULL) { - free(s3->accel.pix_trans_ptr); - s3->accel.pix_trans_ptr = NULL; - } - } - } - break; + if ((s3->bpp == 0) && s3->color_16bit) { + if (s3->accel.cur_x & 0x400) + val = (val >> 8) | (val << 8); } s3->accel_start(2, 1, 0xffffffff, val | (val << 16), s3); } break; case 0x400: - if (svga->crtc[0x53] & 0x08) { - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { - if (s3->accel.cmd & 0x1000) - val = (val >> 8) | (val << 8); + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 0x02)) { + if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { + if (s3->accel.cmd & 0x1000) + val = (val >> 8) | (val << 8); + + if (svga->crtc[0x53] & 0x08) s3->accel_start(32, 1, val | (val << 16), 0, s3); - } else - s3->accel_start(4, 1, 0xffffffff, val | (val << 16), s3); - } else - s3->accel_start(4, 1, 0xffffffff, val | (val << 16), s3); - } else { - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { - if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { - if (s3->accel.cmd & 0x1000) - val = (val >> 8) | (val << 8); + else s3->accel_start(16, 1, val | (val << 16), 0, s3); - } else - s3->accel_start(4, 1, 0xffffffff, val | (val << 16), s3); } else s3->accel_start(4, 1, 0xffffffff, val | (val << 16), s3); - } + } else + s3->accel_start(4, 1, 0xffffffff, val | (val << 16), s3); break; case 0x600: if (s3->chip == S3_TRIO32 || s3->chip == S3_VISION968 || s3->chip == S3_VISION868 || s3->chip >= S3_TRIO64V) { - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 0x02)) { if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { if (s3->accel.cmd & 0x1000) val = (val >> 8) | (val << 8); @@ -805,7 +750,7 @@ s3_accel_out_pixtrans_l(s3_t *s3, uint32_t val) static void s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val) { - const svga_t *svga = &s3->svga; + svga_t *svga = &s3->svga; switch (port) { case 0x8148: @@ -840,6 +785,7 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val) s3->accel.cur_x = (s3->accel.cur_x & 0xff) | ((val & 0x0f) << 8); s3->accel.poly_cx = s3->accel.poly_x = s3->accel.cur_x << 20; s3->accel.poly_x = s3->accel.poly_cx >> 20; + s3_log("[%04X:%08X] OUT PORTB=%04x, val=%04x.\n", CS, cpu_state.pc, port - 1, s3->accel.cur_x); break; case 0x854a: case 0x86ea: @@ -954,6 +900,7 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val) if (!(s3->accel.multifunc[0xe] & 0x200)) s3->accel.multifunc[0xe] &= ~0x10; } + s3_log("[%04X:%08X] OUT PORTB=%04x, val=%04x.\n", CS, cpu_state.pc, port - 1, s3->accel.cmd); s3->accel_start(-1, 0, 0xffffffff, 0, s3); break; @@ -989,6 +936,7 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val) case 0xa148: case 0xa2e8: + s3_log("[%04X:%08X] OUT PORTB=%04x (Background Color), val=%02x.\n", CS, cpu_state.pc, port, val); if (s3->bpp == 3) { if ((s3->chip >= S3_86C928) && (s3->chip < S3_VISION964)) { if (s3->accel.multifunc[0xe] & 0x10) @@ -1006,6 +954,7 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val) break; case 0xa149: case 0xa2e9: + s3_log("[%04X:%08X] OUT PORTB=%04x (Background Color), val=%02x.\n", CS, cpu_state.pc, port, val); if (s3->bpp == 3) { if ((s3->chip >= S3_86C928) && (s3->chip < S3_VISION964)) { if (s3->accel.multifunc[0xe] & 0x10) @@ -1069,6 +1018,7 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val) case 0xa548: case 0xa6e8: + s3_log("[%04X:%08X] OUT PORTB=%04x (Foreground Color), val=%02x.\n", CS, cpu_state.pc, port, val); if (s3->bpp == 3) { if ((s3->chip >= S3_86C928) && (s3->chip < S3_VISION964)) { if (s3->accel.multifunc[0xe] & 0x10) @@ -1086,6 +1036,7 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val) break; case 0xa549: case 0xa6e9: + s3_log("[%04X:%08X] OUT PORTB=%04x (Foreground Color), val=%02x.\n", CS, cpu_state.pc, port, val); if (s3->bpp == 3) { if ((s3->chip >= S3_86C928) && (s3->chip < S3_VISION964)) { if (s3->accel.multifunc[0xe] & 0x10) @@ -1113,7 +1064,6 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val) s3->accel.multifunc[0xe] ^= 0x10; } } - if (s3->accel.color_16bit_check) s3->accel.frgd_color_actual[1] = s3->accel.frgd_color & 0xff; else @@ -1150,6 +1100,7 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val) case 0xa948: case 0xaae8: + s3_log("[%04X:%08X] OUT PORTB=%04x (Write Mask), val=%02x.\n", CS, cpu_state.pc, port, val); if (s3->bpp == 3) { if ((s3->chip >= S3_86C928) && (s3->chip < S3_VISION964)) { if (s3->accel.multifunc[0xe] & 0x10) @@ -1167,6 +1118,7 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val) break; case 0xa949: case 0xaae9: + s3_log("[%04X:%08X] OUT PORTB=%04x (Write Mask), val=%02x.\n", CS, cpu_state.pc, port, val); if (s3->bpp == 3) { if ((s3->chip >= S3_86C928) && (s3->chip < S3_VISION964)) { if (s3->accel.multifunc[0xe] & 0x10) @@ -1194,7 +1146,6 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val) s3->accel.multifunc[0xe] ^= 0x10; } } - if (s3->accel.color_16bit_check) s3->accel.wrt_mask_actual[1] = s3->accel.wrt_mask & 0xff; else @@ -1307,7 +1258,8 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val) case 0xb148: case 0xb2e8: - if ((s3->accel.multifunc[0xe] & 0x100) || (s3->chip >= S3_86C928)) { + s3_log("[%04X:%08X] OUT PORTB=%04x, val=%02x, CMD=%04x, C(%d,%d).\n", CS, cpu_state.pc, port, val, s3->accel.cmd, s3->accel.cur_x, s3->accel.cur_y); + if (s3->accel.multifunc[0xe] & 0x100) { s3->accel.b2e8_pix = 0; if (s3->bpp == 3) { if ((s3->chip >= S3_86C928) && (s3->chip < S3_VISION964)) { @@ -1336,48 +1288,8 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val) s3->accel_start(8, 1, s3->accel.pix_trans[0], 0, s3); else s3->accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0], s3); - } else { - if (s3->accel.color_16bit_check_rectfill) { - if (s3->accel.color_16bit_check) { - if (s3->accel.pix_trans_x_count < s3->accel.pix_trans_ptr_cnt) { - s3_log("Byte: CPU data CMD=%04x, byte write=%02x, cnt=%d, " - "check=%d.\n", s3->accel.cmd, val, - s3->accel.pix_trans_x_count, s3->accel.color_16bit_check); - s3->accel.pix_trans_ptr[s3->accel.pix_trans_x_count] = val; - s3->accel.pix_trans_x_count++; - s3->accel.pix_trans_x_count2 = s3->accel.pix_trans_x_count; - } - } else { - if (s3->accel.pix_trans_x_count2 < s3->accel.pix_trans_ptr_cnt) { - s3_log("Byte: CPU data CMD=%04x, byte write=%02x, cnt=%d, " - "check=%d.\n", s3->accel.cmd, val, - s3->accel.pix_trans_x_count2, s3->accel.color_16bit_check); - s3->accel.pix_trans_ptr[s3->accel.pix_trans_x_count2] = val; - s3->accel.pix_trans_x_count2++; - } - s3_log("WriteCNT=%d, TotalCNT=%d.\n", s3->accel.pix_trans_x_count2, - s3->accel.pix_trans_ptr_cnt); - if (s3->accel.pix_trans_x_count2 == s3->accel.pix_trans_ptr_cnt) { - for (int i = 0; i < s3->accel.pix_trans_ptr_cnt; i += 2) { - s3_log("Transferring write count=%d, bytes=%04x.\n", i, - s3->accel.pix_trans_ptr[i] | - (s3->accel.pix_trans_ptr[i + 1] << 8)); - s3->accel_start(1, 1, 0xffffffff, s3->accel.pix_trans_ptr[i] | - (s3->accel.pix_trans_ptr[i + 1] << 8), s3); - } - - s3->accel.pix_trans_x_count2 = 0; - s3->accel.color_16bit_check_rectfill = 0; - if (s3->accel.pix_trans_ptr != NULL) { - free(s3->accel.pix_trans_ptr); - s3->accel.pix_trans_ptr = NULL; - } - } - } - break; - } + } else s3->accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0], s3); - } break; default: @@ -1388,7 +1300,8 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val) break; case 0xb149: case 0xb2e9: - if ((s3->accel.multifunc[0xe] & 0x100) || (s3->chip >= S3_86C928)) { + s3_log("[%04X:%08X] OUT PORTB=%04x, val=%02x, CMD=%04x, C(%d,%d).\n", CS, cpu_state.pc, port, val, s3->accel.cmd, s3->accel.cur_x, s3->accel.cur_y); + if (s3->accel.multifunc[0xe] & 0x100) { s3->accel.b2e8_pix = 0; if (s3->bpp == 3) { if ((s3->chip >= S3_86C928) && (s3->chip < S3_VISION964)) { @@ -1643,6 +1556,8 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val) case 0xe148: case 0xe2e8: + s3_log("[%04X:%08X] OUT PORTB=%04x, val=%02x, CMD=%04x, C(%d,%d), WRTMASK=%04x.\n", CS, cpu_state.pc, port, val, s3->accel.cmd, s3->accel.cur_x, s3->accel.cur_y, s3->accel.wrt_mask); + s3_log(".\n"); s3->accel.b2e8_pix = 0; if (s3_cpu_dest(s3)) break; @@ -1656,46 +1571,17 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val) else s3->accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0], s3); } else { - if (s3->accel.color_16bit_check_rectfill) { - if (s3->accel.color_16bit_check) { - if (s3->accel.pix_trans_x_count < s3->accel.pix_trans_ptr_cnt) { - s3_log("Byte: CPU data CMD=%04x, byte write=%02x, cnt=%d, " - "check=%d.\n", s3->accel.cmd, val, - s3->accel.pix_trans_x_count, s3->accel.color_16bit_check); - s3->accel.pix_trans_ptr[s3->accel.pix_trans_x_count] = val; - s3->accel.pix_trans_x_count++; - s3->accel.pix_trans_x_count2 = s3->accel.pix_trans_x_count; - } + if ((s3->bpp == 0) && s3->color_16bit) { + s3->accel.pix_trans[1] = svga->vram[dword_remap(svga, (s3->accel.dest + s3->accel.cx - s3->accel.minus)) & s3->vram_mask]; + if (s3->accel.cur_x & 0x400) { + s3_log("Last Pixel Written=%02x (1024).\n", s3->accel.pix_trans[1]); + s3->accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[1] | (s3->accel.pix_trans[0] << 8), s3); } else { - if (s3->accel.pix_trans_x_count2 < s3->accel.pix_trans_ptr_cnt) { - s3_log("Byte: CPU data CMD=%04x, byte write=%02x, cnt=%d, " - "check=%d.\n", s3->accel.cmd, val, - s3->accel.pix_trans_x_count2, s3->accel.color_16bit_check); - s3->accel.pix_trans_ptr[s3->accel.pix_trans_x_count2] = val; - s3->accel.pix_trans_x_count2++; - } - s3_log("WriteCNT=%d, TotalCNT=%d.\n", s3->accel.pix_trans_x_count2, - s3->accel.pix_trans_ptr_cnt); - if (s3->accel.pix_trans_x_count2 == s3->accel.pix_trans_ptr_cnt) { - for (int i = 0; i < s3->accel.pix_trans_ptr_cnt; i += 2) { - s3_log("Transferring write count=%d, bytes=%04x.\n", i, - s3->accel.pix_trans_ptr[i] | - (s3->accel.pix_trans_ptr[i + 1] << 8)); - s3->accel_start(1, 1, 0xffffffff, s3->accel.pix_trans_ptr[i] | - (s3->accel.pix_trans_ptr[i + 1] << 8), s3); - } - - s3->accel.pix_trans_x_count2 = 0; - s3->accel.color_16bit_check_rectfill = 0; - if (s3->accel.pix_trans_ptr != NULL) { - free(s3->accel.pix_trans_ptr); - s3->accel.pix_trans_ptr = NULL; - } - } + s3_log("Last Pixel Written=%02x (0).\n", s3->accel.pix_trans[1]); + s3->accel_start(2, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3); } - break; - } - s3->accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0], s3); + } else + s3->accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0], s3); } break; @@ -1706,6 +1592,8 @@ s3_accel_out_fifo(s3_t *s3, uint16_t port, uint8_t val) break; case 0xe149: case 0xe2e9: + s3_log("[%04X:%08X] OUT PORTB=%04x, val=%02x, CMD=%04x, C(%d,%d), WRTMASK=%04x.\n", CS, cpu_state.pc, port, val, s3->accel.cmd, s3->accel.cur_x, s3->accel.cur_y, s3->accel.wrt_mask); + s3_log(".\n"); s3->accel.b2e8_pix = 0; if (s3_cpu_dest(s3)) break; @@ -1859,6 +1747,8 @@ static void s3_accel_out_fifo_w(s3_t *s3, uint16_t port, uint16_t val) { if ((port != 0x9ee8) && (port != 0x9d48)) { + s3_log("[%04X:%08X] OUT PORTW=%04x, val=%04x, CMD=%04x, C(%d,%d), WRTMASK=%04x.\n", CS, cpu_state.pc, port, val, s3->accel.cmd, s3->accel.cur_x, s3->accel.cur_y, s3->accel.wrt_mask); + s3_log(".\n"); if ((port == 0xb2e8) || (port == 0xb148)) { if ((s3->accel.multifunc[0xe] & 0x100) || (s3->chip >= S3_86C928)) { s3->accel.b2e8_pix = 0; @@ -1869,7 +1759,6 @@ s3_accel_out_fifo_w(s3_t *s3, uint16_t port, uint16_t val) s3_accel_out_pixtrans_w(s3, val); } } else { - s3_log("Port WriteW FIFO=%04x, val=%04x, bussize=%03x.\n", port, val, s3->accel.cmd & 0x600); s3->accel.b2e8_pix = 0; if ((port == 0xe2e8) || (port == 0xe2ea) || (port == 0xe148) || (port == 0xe14a)) s3_accel_out_pixtrans_w(s3, val); @@ -1899,6 +1788,7 @@ static void s3_accel_out_fifo_l(s3_t *s3, uint16_t port, uint32_t val) { if ((port == 0xb2e8) || (port == 0xb148)) { + s3_log("[%04X:%08X] OUT PORTL=%04x, val=%08x, CMD=%04x, C(%d,%d).\n", CS, cpu_state.pc, port, val, s3->accel.cmd, s3->accel.cur_x, s3->accel.cur_y); if ((s3->accel.multifunc[0xe] & 0x100) || (s3->chip >= S3_86C928)) { s3->accel.b2e8_pix = 0; s3_accel_out_fifo(s3, port, val); @@ -1911,7 +1801,6 @@ s3_accel_out_fifo_l(s3_t *s3, uint16_t port, uint32_t val) } } else { s3->accel.b2e8_pix = 0; - s3_log("Port WriteL FIFO=%04x, val=%08x, bussize=%03x.\n", port, val, s3->accel.cmd & 0x600); if ((port == 0xe2e8) || (port == 0xe148)) s3_accel_out_pixtrans_l(s3, val); else { @@ -2867,6 +2756,8 @@ s3_out(uint16_t addr, uint8_t val, void *priv) svga->write_bank = svga->read_bank = s3->bank << 16; else svga->write_bank = svga->read_bank = s3->bank << 14; + + svga_recalctimings(svga); } else if (svga->seqaddr == 9) { svga->seqregs[svga->seqaddr] = val & 0x80; s3_io_set(s3); @@ -2979,6 +2870,8 @@ s3_out(uint16_t addr, uint8_t val, void *priv) svga->write_bank = svga->read_bank = s3->bank << 16; else svga->write_bank = svga->read_bank = s3->bank << 14; + + s3_log("CRTC35 Chain4=%x, Bank=%02x.\n", svga->chain4, s3->bank); break; case 0x51: @@ -3105,21 +2998,9 @@ s3_out(uint16_t addr, uint8_t val, void *priv) case 0x43: if (s3->chip < S3_VISION964) { - if (s3->chip <= S3_86C805) { - s3->color_16bit = !!(val & 8); - if (s3->color_16bit) { - s3->width = 1024; - } else { - if (s3->chip <= S3_86C924) - s3->width = 1024; - else { - if (s3->accel.advfunc_cntl & 4) - s3->width = 1024; - else - s3->width = 640; - } - } - } + if (s3->chip <= S3_86C805) + svga_recalctimings(svga); + s3_io_remove_alt(s3); s3->translate = !!(val & 0x10); s3_io_set_alt(s3); @@ -3332,6 +3213,140 @@ s3_in(uint16_t addr, void *priv) return svga_in(addr, svga); } +uint32_t +s3_decode_addr(svga_t *svga, uint32_t addr, int write) +{ + int memory_map_mode = (svga->gdcreg[6] >> 2) & 3; + + s3_log("CRTC31 bit 3=%x, map=%x, write=%x, wrtbank=%x, chain4=%x.\n", svga->crtc[0x31] & 0x08, memory_map_mode, write, svga->write_bank, svga->chain4); + + if (svga->crtc[0x31] & 0x08) + memory_map_mode = 1; + + addr &= 0x1ffff; + + switch (memory_map_mode) { + case 0: + break; + case 1: + if (addr >= 0x10000) + return 0xffffffff; + break; + case 2: + addr -= 0x10000; + if (addr >= 0x8000) + return 0xffffffff; + break; + default: + case 3: + addr -= 0x18000; + if (addr >= 0x8000) + return 0xffffffff; + break; + } + + if (memory_map_mode <= 1) { + if (write) + addr += svga->write_bank; + else + addr += svga->read_bank; + } + + return addr; +} + +static void +s3_write(uint32_t addr, uint8_t val, void *priv) +{ + s3_t *s3 = (s3_t *) priv; + svga_t *svga = &s3->svga; + + xga_write_test(addr, val, svga); + addr = s3_decode_addr(svga, addr, 1); + if (addr == 0xffffffff) + return; + + svga_write_linear(addr, val, svga); +} + +static void +s3_writew(uint32_t addr, uint16_t val, void *priv) +{ + s3_t *s3 = (s3_t *) priv; + svga_t *svga = &s3->svga; + + xga_write_test(addr, val, svga); + xga_write_test(addr + 1, val >> 8, svga); + addr = s3_decode_addr(svga, addr, 1); + if (addr == 0xffffffff) + return; + + svga_writew_linear(addr, val, svga); +} + +static void +s3_writel(uint32_t addr, uint32_t val, void *priv) +{ + s3_t *s3 = (s3_t *) priv; + svga_t *svga = &s3->svga; + + xga_write_test(addr, val, svga); + xga_write_test(addr + 1, val >> 8, svga); + xga_write_test(addr + 2, val >> 16, svga); + xga_write_test(addr + 3, val >> 24, svga); + addr = s3_decode_addr(svga, addr, 1); + if (addr == 0xffffffff) + return; + + svga_writel_linear(addr, val, svga); +} + +static uint8_t +s3_read(uint32_t addr, void *priv) +{ + s3_t *s3 = (s3_t *) priv; + svga_t *svga = &s3->svga; + + (void) xga_read_test(addr, svga); + addr = s3_decode_addr(svga, addr, 0); + if (addr == 0xffffffff) + return 0xff; + + return svga_read_linear(addr, svga); +} + +static uint16_t +s3_readw(uint32_t addr, void *priv) +{ + s3_t *s3 = (s3_t *) priv; + svga_t *svga = &s3->svga; + + (void) xga_read_test(addr, svga); + (void) xga_read_test(addr + 1, svga); + addr = s3_decode_addr(svga, addr, 0); + if (addr == 0xffffffff) + return 0xffff; + + return svga_readw_linear(addr, svga); +} + +static uint32_t +s3_readl(uint32_t addr, void *priv) +{ + s3_t *s3 = (s3_t *) priv; + svga_t *svga = &s3->svga; + + (void) xga_read_test(addr, svga); + (void) xga_read_test(addr + 1, svga); + (void) xga_read_test(addr + 2, svga); + (void) xga_read_test(addr + 3, svga); + addr = s3_decode_addr(svga, addr, 0); + if (addr == 0xffffffff) + return 0xffffffff; + + return svga_readl_linear(addr, svga); +} + static void s3_recalctimings(svga_t *svga) { @@ -3416,33 +3431,48 @@ s3_recalctimings(svga_t *svga) break; } - if (s3->chip != S3_86C801) - mask |= 0x01; - switch (svga->crtc[0x50] & mask) { - case 0x00: - if (s3->color_16bit) - s3->width = 1024; - else - s3->width = (svga->crtc[0x31] & 2) ? 2048 : 1024; - break; - case 0x01: - s3->width = 1152; - break; - case 0x40: - s3->width = 640; - break; - case 0x80: - s3->width = ((s3->chip > S3_86C805) && (s3->accel.advfunc_cntl & 4)) ? 1600 : 800; - break; - case 0x81: - s3->width = 1600; - break; - case 0xc0: - s3->width = 1280; - break; + if (s3->chip <= S3_86C805) { + s3->color_16bit = !!(svga->crtc[0x43] & 0x08); + if (svga->bpp == 24) + s3->color_16bit = 0; - default: - break; + if (s3->color_16bit) + s3->width = 1024; + else { + if (s3->chip <= S3_86C924) + s3->width = 1024; + } + } + + if (s3->chip >= S3_86C928) { + if (s3->chip != S3_86C801) + mask |= 0x01; + + switch (svga->crtc[0x50] & mask) { + case 0x00: + s3->width = (svga->crtc[0x31] & 0x02) ? 2048 : 1024; + if (s3->color_16bit) + s3->width = 1024; + break; + case 0x01: + s3->width = 1152; + break; + case 0x40: + s3->width = 640; + break; + case 0x80: + s3->width = ((s3->chip > S3_86C805) && (s3->accel.advfunc_cntl & 0x04)) ? 1600 : 800; + break; + case 0x81: + s3->width = 1600; + break; + case 0xc0: + s3->width = 1280; + break; + + default: + break; + } } if (svga->crtc[0x33] & 0x20) { @@ -4275,14 +4305,27 @@ s3_recalctimings(svga_t *svga) /*Enhanced 4bpp mode, just like the 8bpp mode per the spec. */ svga->render = svga_render_8bpp_highres; svga->rowoffset <<= 1; + svga->vram_display_mask = s3->vram_mask; + } else { + svga->vram_display_mask = (svga->crtc[0x32] & 0x40) ? 0x3ffff : s3->vram_mask; + svga->write_bank = 0; + svga->read_bank = svga->write_bank; } - svga->vram_display_mask = s3->vram_mask; - } else + } else { svga->vram_display_mask = (svga->crtc[0x32] & 0x40) ? 0x3ffff : s3->vram_mask; - } else + svga->write_bank = 0; + svga->read_bank = svga->write_bank; + } + } else { svga->vram_display_mask = (svga->crtc[0x32] & 0x40) ? 0x3ffff : s3->vram_mask; - } else + svga->write_bank = 0; + svga->read_bank = svga->write_bank; + } + } else { svga->vram_display_mask = (svga->crtc[0x32] & 0x40) ? 0x3ffff : s3->vram_mask; + svga->write_bank = 0; + svga->read_bank = svga->write_bank; + } } if ((s3->chip == S3_TRIO32) || (s3->chip == S3_TRIO64) || (s3->chip == S3_VISION864)) @@ -4421,8 +4464,11 @@ s3_trio64v_recalctimings(svga_t *svga) break; } svga->vram_display_mask = s3->vram_mask; - } else + } else { svga->vram_display_mask = (svga->crtc[0x32] & 0x40) ? 0x3ffff : s3->vram_mask; + svga->write_bank = 0; + svga->read_bank = svga->write_bank; + } } else /*Streams mode*/ { if (s3->streams.buffer_ctrl & 1) @@ -4724,7 +4770,7 @@ s3_accel_in(uint16_t port, void *priv) s3_t *s3 = (s3_t *) priv; svga_t *svga = &s3->svga; int temp; - uint8_t temp2; + uint8_t temp2 = 0x00; if (!s3->enable_8514) return 0xff; @@ -5605,7 +5651,7 @@ s3_accel_in(uint16_t port, void *priv) if (s3->accel.cmd & 0x100) { switch (s3->accel.cmd & 0x600) { case 0x000: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 0x02)) { if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) s3->accel_start(8, 1, s3->accel.pix_trans[0], 0, s3); else @@ -5614,7 +5660,7 @@ s3_accel_in(uint16_t port, void *priv) s3->accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0], s3); break; case 0x200: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 0x02)) { if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) s3->accel_start(16, 1, s3->accel.pix_trans[0], 0, s3); else @@ -5637,7 +5683,7 @@ s3_accel_in(uint16_t port, void *priv) if (s3->accel.cmd & 0x100) { switch (s3->accel.cmd & 0x600) { case 0x000: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 0x02)) { if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) s3->accel_start(8, 1, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), 0, s3); else @@ -5646,7 +5692,7 @@ s3_accel_in(uint16_t port, void *priv) s3->accel_start(1, 1, 0xffffffff, s3->accel.pix_trans[0] | (s3->accel.pix_trans[1] << 8), s3); break; case 0x200: - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { + if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 0x02)) { if (((s3->accel.frgd_mix & 0x60) != 0x40) || ((s3->accel.bkgd_mix & 0x60) != 0x40)) { if (s3->accel.cmd & 0x1000) s3->accel_start(16, 1, s3->accel.pix_trans[1] | (s3->accel.pix_trans[0] << 8), 0, s3); @@ -5760,10 +5806,21 @@ s3_accel_in_w(uint16_t port, void *priv) if (s3->accel.cmd & 0x1000) temp = (temp >> 8) | (temp << 8); s3->accel_start(8, 1, temp | (temp << 16), 0, s3); + } else { + if ((s3->bpp == 0) && s3->color_16bit) + s3->accel_start(2, 1, 0xffffffff, temp | (temp << 16), s3); + else + s3->accel_start(1, 1, 0xffffffff, temp | (temp << 16), s3); + } + } else { + if ((s3->bpp == 0) && s3->color_16bit) { + if (s3->accel.cur_x & 0x400) + temp = ((temp >> 8) | (temp << 8)) & 0xffff; + + s3->accel_start(2, 1, 0xffffffff, temp | (temp << 16), s3); } else s3->accel_start(1, 1, 0xffffffff, temp | (temp << 16), s3); - } else - s3->accel_start(1, 1, 0xffffffff, temp | (temp << 16), s3); + } break; case 0x200: if (((s3->accel.multifunc[0xa] & 0xc0) == 0x80) || (s3->accel.cmd & 2)) { @@ -6479,15 +6536,11 @@ polygon_setup(s3_t *s3) } #define READ(addr, dat) \ - if ((s3->bpp == 0) && !s3->color_16bit) \ + if (((s3->bpp == 0) && !s3->color_16bit) || (s3->bpp == 2)) \ dat = svga->vram[dword_remap(svga, addr) & s3->vram_mask]; \ - else if ((s3->bpp == 1) || (s3->color_16bit && (svga->bpp < 24))) \ + else if ((s3->bpp == 1) || s3->color_16bit) \ dat = vram_w[dword_remap_w(svga, addr) & (s3->vram_mask >> 1)]; \ - else if (s3->bpp == 2) \ - dat = svga->vram[dword_remap(svga, addr) & s3->vram_mask]; \ - else if (s3->color_16bit && (svga->bpp == 24)) { \ - dat = vram_w[dword_remap_w(svga, addr) & (s3->vram_mask >> 1)]; \ - } else \ + else \ dat = vram_l[dword_remap_l(svga, addr) & (s3->vram_mask >> 2)]; #define MIX_READ \ @@ -6548,7 +6601,7 @@ polygon_setup(s3_t *s3) { \ old_dest_dat = dest_dat; \ MIX_READ \ - dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); \ + dest_dat = (dest_dat & wrt_mask) | (old_dest_dat & ~wrt_mask); \ } #define ROPMIX_READ(D, P, S) \ @@ -7333,20 +7386,14 @@ polygon_setup(s3_t *s3) } #define WRITE(addr, dat) \ - if ((s3->bpp == 0) && !s3->color_16bit) { \ - svga->vram[dword_remap(svga, addr) & s3->vram_mask] = dat; \ + if (((s3->bpp == 0) && !s3->color_16bit) || (s3->bpp == 2)) { \ + svga->vram[dword_remap(svga, addr) & s3->vram_mask] = dat; \ svga->changedvram[(dword_remap(svga, addr) & s3->vram_mask) >> 12] = svga->monitor->mon_changeframecount; \ - } else if ((s3->bpp == 1) || (s3->color_16bit && (svga->bpp < 24))) { \ + } else if ((s3->bpp == 1) || s3->color_16bit) { \ vram_w[dword_remap_w(svga, addr) & (s3->vram_mask >> 1)] = dat; \ svga->changedvram[(dword_remap_w(svga, addr) & (s3->vram_mask >> 1)) >> 11] = svga->monitor->mon_changeframecount; \ - } else if (s3->bpp == 2) { \ - svga->vram[dword_remap(svga, addr) & s3->vram_mask] = dat; \ - svga->changedvram[(dword_remap(svga, addr) & s3->vram_mask) >> 12] = svga->monitor->mon_changeframecount; \ - } else if (s3->color_16bit && (svga->bpp == 24)) { \ - vram_w[dword_remap_w(svga, addr) & (s3->vram_mask >> 1)] = dat; \ - svga->changedvram[(dword_remap_w(svga, addr) & (s3->vram_mask >> 1)) >> 11] = svga->monitor->mon_changeframecount; \ } else { \ - vram_l[dword_remap_l(svga, addr) & (s3->vram_mask >> 2)] = dat; \ + vram_l[dword_remap_l(svga, addr) & (s3->vram_mask >> 2)] = dat; \ svga->changedvram[(dword_remap_l(svga, addr) & (s3->vram_mask >> 2)) >> 10] = svga->monitor->mon_changeframecount; \ } @@ -7731,745 +7778,6 @@ s3_visionx68_video_engine_op(uint32_t cpu_dat, s3_t *s3) } } -void -s3_911_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, void *priv) -{ - s3_t *s3 = (s3_t *)priv; - svga_t *svga = &s3->svga; - uint32_t src_dat = 0; - uint32_t dest_dat; - uint32_t old_dest_dat; - int frgd_mix; - int bkgd_mix; - int clip_t = s3->accel.multifunc[1] & 0xfff; - int clip_l = s3->accel.multifunc[2] & 0xfff; - int clip_b = s3->accel.multifunc[3] & 0xfff; - int clip_r = s3->accel.multifunc[4] & 0xfff; - int vram_mask = (s3->accel.multifunc[0xa] & 0xc0) == 0xc0; - uint32_t mix_mask = (s3->accel.cmd & 0x200) ? 0x8000 : 0x80; - uint16_t *vram_w = (uint16_t *) svga->vram; - uint32_t *vram_l = (uint32_t *) svga->vram; - uint32_t rd_mask = s3->accel.rd_mask; - uint32_t wrt_mask = s3->accel.wrt_mask; - uint32_t frgd_color = s3->accel.frgd_color; - uint32_t bkgd_color = s3->accel.bkgd_color; - int cmd = s3->accel.cmd >> 13; - - if ((s3->accel.cmd & 0x100) && (s3_cpu_src(s3) || (s3_cpu_dest(s3))) && (!cpu_input || (s3_enable_fifo(s3) == 0))) - s3->force_busy = 1; - - if (cpu_input && (((s3->accel.multifunc[0xa] & 0xc0) != 0x80) || (!(s3->accel.cmd & 2)))) { - if (s3->color_16bit) { - if (count > 1) - count >>= 1; - } - } - - if (s3->color_16bit) - rd_mask &= 0xffff; - else - rd_mask &= 0xff; - - /*Bit 4 of the Command register is the draw yes bit, which enables writing to memory/reading from memory when enabled. - When this bit is disabled, no writing to memory/reading from memory is allowed. (This bit is almost meaningless on - the NOP command)*/ - - switch (cmd) { - case 0: /*NOP (Short Stroke Vectors)*/ - if (s3->accel.ssv_state == 0) - break; - - frgd_mix = (s3->accel.frgd_mix >> 5) & 3; - bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; - - if (s3->accel.cmd & 8) { /*Radial*/ - while (count-- && s3->accel.ssv_len >= 0) { - if ((s3->accel.cx & 0xfff) >= clip_l && (s3->accel.cx & 0xfff) <= clip_r && (s3->accel.cy & 0xfff) >= clip_t && (s3->accel.cy & 0xfff) <= clip_b) { - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: - src_dat = bkgd_color; - break; - case 1: - src_dat = frgd_color; - break; - case 2: - src_dat = cpu_dat; - break; - case 3: - src_dat = 0; - break; - - default: - break; - } - - READ((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); - - MIX - - if (s3->accel.ssv_draw) { - WRITE((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); - } - } - - mix_dat <<= 1; - mix_dat |= 1; - if (s3->bpp == 0) - cpu_dat >>= 8; - else - cpu_dat >>= 16; - - if (!s3->accel.ssv_len) - break; - - switch (s3->accel.ssv_dir & 0xe0) { - case 0x00: - s3->accel.cx++; - break; - case 0x20: - s3->accel.cx++; - s3->accel.cy--; - break; - case 0x40: - s3->accel.cy--; - break; - case 0x60: - s3->accel.cx--; - s3->accel.cy--; - break; - case 0x80: - s3->accel.cx--; - break; - case 0xa0: - s3->accel.cx--; - s3->accel.cy++; - break; - case 0xc0: - s3->accel.cy++; - break; - case 0xe0: - s3->accel.cx++; - s3->accel.cy++; - break; - - default: - break; - } - - s3->accel.ssv_len--; - s3->accel.cx &= 0xfff; - s3->accel.cy &= 0xfff; - } - - s3->accel.cur_x = s3->accel.cx; - s3->accel.cur_y = s3->accel.cy; - } - break; - - case 1: /*Draw line*/ - if (!cpu_input) { - s3->accel.cx = s3->accel.cur_x & 0xfff; - s3->accel.cy = s3->accel.cur_y & 0xfff; - s3->accel.sy = s3->accel.maj_axis_pcnt & 0x7ff; - - if (s3->color_16bit && (svga->bpp < 24)) { - if (s3->accel.wrt_mask != 0xffff) { - if (s3->accel.cur_x & 0x400) { - s3->accel.color_16bit_check = 0; - s3->accel.minus = 0x400; - } else { - s3->accel.color_16bit_check = 1; - s3->accel.minus = 0; - } - } else { - if (s3->accel.cur_x & 0x400) - s3->accel.color_16bit_check = 1; - else - s3->accel.color_16bit_check = 0; - - s3->accel.minus = 0; - } - } else { - s3->accel.color_16bit_check = 0; - s3->accel.minus = 0; - } - - if (s3_cpu_src(s3)) - return; /*Wait for data from CPU*/ - } - - frgd_mix = (s3->accel.frgd_mix >> 5) & 3; - bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; - - if (s3->accel.cmd & 8) { /*Radial*/ - if (s3->color_16bit && (svga->bpp < 24)) { - if (s3->accel.color_16bit_check) - return; - if (s3->accel.wrt_mask != 0xffff) - wrt_mask = (s3->accel.wrt_mask_actual[0] | (s3->accel.wrt_mask_actual[1] << 8)); - } - - while (count-- && s3->accel.sy >= 0) { - if ((s3->accel.cx & 0xfff) >= clip_l && (s3->accel.cx & 0xfff) <= clip_r && (s3->accel.cy & 0xfff) >= clip_t && (s3->accel.cy & 0xfff) <= clip_b) { - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: - src_dat = bkgd_color; - if (s3->color_16bit && (svga->bpp < 24)) - src_dat = s3->accel.bkgd_color_actual[0] | (s3->accel.bkgd_color_actual[1] << 8); - break; - case 1: - src_dat = frgd_color; - if (s3->color_16bit && (svga->bpp < 24)) - src_dat = s3->accel.frgd_color_actual[0] | (s3->accel.frgd_color_actual[1] << 8); - break; - case 2: - src_dat = cpu_dat; - break; - case 3: - src_dat = 0; - break; - - default: - break; - } - - READ((s3->accel.cy * s3->width) + s3->accel.cx - s3->accel.minus, dest_dat); - - MIX - - WRITE((s3->accel.cy * s3->width) + s3->accel.cx - s3->accel.minus, dest_dat); - } - - mix_dat <<= 1; - mix_dat |= 1; - if ((s3->bpp == 0) && !s3->color_16bit) - cpu_dat >>= 8; - else - cpu_dat >>= 16; - - if (!s3->accel.sy) - break; - - switch (s3->accel.cmd & 0xe0) { - case 0x00: - s3->accel.cx++; - break; - case 0x20: - s3->accel.cx++; - s3->accel.cy--; - break; - case 0x40: - s3->accel.cy--; - break; - case 0x60: - s3->accel.cx--; - s3->accel.cy--; - break; - case 0x80: - s3->accel.cx--; - break; - case 0xa0: - s3->accel.cx--; - s3->accel.cy++; - break; - case 0xc0: - s3->accel.cy++; - break; - case 0xe0: - s3->accel.cx++; - s3->accel.cy++; - break; - - default: - break; - } - s3->accel.sy--; - s3->accel.cx &= 0xfff; - s3->accel.cy &= 0xfff; - } - s3->accel.cur_x = s3->accel.cx; - s3->accel.cur_y = s3->accel.cy; - } else { /*Bresenham*/ - if (s3->accel.b2e8_pix && s3_cpu_src(s3) && (count == 16)) { /*Stupid undocumented 0xB2E8 on 911/924*/ - count = s3->accel.maj_axis_pcnt + 1; - s3->accel.temp_cnt = 16; - } - - if (s3->color_16bit && (svga->bpp < 24)) { - if (!s3->accel.b2e8_pix) { - if (!s3->accel.color_16bit_check) - wrt_mask = (s3->accel.wrt_mask_actual[0] | (s3->accel.wrt_mask_actual[1] << 8)); - else - return; - } - } - - s3_log("CMD=%04x, curx=%d, lwrtmask=%04x, actual wrtmask=%04x, frgdmix=%d, " - "bkgdmix=%d, input=%d, cnt=%d.\n", s3->accel.cmd, s3->accel.cur_x, - wrt_mask, s3->accel.wrt_mask, frgd_mix, bkgd_mix, cpu_input, count); - while (count-- && s3->accel.sy >= 0) { - if (s3->accel.b2e8_pix && s3_cpu_src(s3) && !s3->accel.temp_cnt) { - mix_dat >>= 16; - s3->accel.temp_cnt = 16; - } - - if ((s3->accel.cx & 0xfff) >= clip_l && (s3->accel.cx & 0xfff) <= clip_r && - (s3->accel.cy & 0xfff) >= clip_t && (s3->accel.cy & 0xfff) <= clip_b) { - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: - src_dat = bkgd_color; - if (s3->color_16bit && (svga->bpp < 24) && !s3->accel.b2e8_pix) { - if (!s3->accel.color_16bit_check) - src_dat = s3->accel.bkgd_color_actual[0] | - (s3->accel.bkgd_color_actual[1] << 8); - } - break; - case 1: - src_dat = frgd_color; - if (s3->color_16bit && (svga->bpp < 24) && !s3->accel.b2e8_pix) { - if (!s3->accel.color_16bit_check) - src_dat = s3->accel.frgd_color_actual[0] | - (s3->accel.frgd_color_actual[1] << 8); - } - break; - case 2: - src_dat = cpu_dat; - break; - case 3: - src_dat = 0; - break; - - default: - break; - } - - READ((s3->accel.cy * s3->width) + s3->accel.cx - s3->accel.minus, dest_dat); - - MIX - - if (s3->accel.cmd & 0x10) { - WRITE((s3->accel.cy * s3->width) + s3->accel.cx - s3->accel.minus, dest_dat); - } - } - - if (s3->accel.b2e8_pix && s3_cpu_src(s3)) { - if (s3->accel.temp_cnt > 0) { - s3->accel.temp_cnt--; - mix_dat <<= 1; - mix_dat |= 1; - } - } else { - mix_dat <<= 1; - mix_dat |= 1; - } - - if (s3->color_16bit) - cpu_dat >>= 16; - else - cpu_dat >>= 8; - - if (!s3->accel.sy) - break; - - if (s3->accel.cmd & 0x40) { - if (s3->accel.cmd & 0x80) - s3->accel.cy++; - else - s3->accel.cy--; - - if (s3->accel.err_term >= 0) { - s3->accel.err_term += s3->accel.destx_distp; - if (s3->accel.cmd & 0x20) - s3->accel.cx++; - else - s3->accel.cx--; - } else - s3->accel.err_term += s3->accel.desty_axstp; - } else { - if (s3->accel.cmd & 0x20) - s3->accel.cx++; - else - s3->accel.cx--; - - if (s3->accel.err_term >= 0) { - s3->accel.err_term += s3->accel.destx_distp; - if (s3->accel.cmd & 0x80) - s3->accel.cy++; - else - s3->accel.cy--; - } else - s3->accel.err_term += s3->accel.desty_axstp; - } - - s3->accel.sy--; - s3->accel.cx &= 0xfff; - s3->accel.cy &= 0xfff; - } - s3->accel.cur_x = s3->accel.cx; - s3->accel.cur_y = s3->accel.cy; - } - break; - - case 2: /*Rectangle fill*/ - if (!cpu_input) { /*!cpu_input is trigger to start operation*/ - s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; - s3->accel.sy = s3->accel.multifunc[0] & 0xfff; - s3->accel.cx = s3->accel.cur_x & 0xfff; - s3->accel.cy = s3->accel.cur_y & 0xfff; - s3->accel.pix_trans_x_count = 0; - - s3->accel.dest = s3->accel.cy * s3->width; - - if (s3->color_16bit && (svga->bpp < 24)) { - if (s3->accel.cur_x & 0x400) { - s3->accel.color_16bit_check = 0; - s3->accel.minus = 0x400; - } else { - s3->accel.color_16bit_check = 1; - s3->accel.minus = 0; - } - - if (s3->accel.color_16bit_check) { - if (((s3->accel.multifunc[0xa] & 0xc0) == 0x00) && !(s3->accel.cmd & 2)) - s3->accel.color_16bit_check_rectfill = !!s3_cpu_src(s3); - else - s3->accel.color_16bit_check_rectfill = 0; - } - - if (s3->accel.color_16bit_check_rectfill) { - if (s3->accel.color_16bit_check) { - s3->accel.pix_trans_ptr = (uint8_t *) calloc(1, (s3->accel.sx + 1) << 1); - s3->accel.pix_trans_ptr_cnt = (s3->accel.sx + 1) << 1; - } - } else - s3->accel.pix_trans_x_count = 0; - } else { - s3->accel.pix_trans_x_count = 0; - s3->accel.color_16bit_check = 0; - s3->accel.color_16bit_check_rectfill = 0; - s3->accel.minus = 0; - } - - if (s3_cpu_src(s3)) { - s3->data_available = 0; - return; /*Wait for data from CPU*/ - } else if (s3_cpu_dest(s3)) { - s3->data_available = 1; - return; - } - } - - frgd_mix = (s3->accel.frgd_mix >> 5) & 3; - bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; - - if (s3->accel.b2e8_pix && s3_cpu_src(s3) && count == 16) { /*Stupid undocumented 0xB2E8 on 911/924*/ - count = s3->accel.maj_axis_pcnt + 1; - s3->accel.temp_cnt = 16; - } - - if (s3->color_16bit && (svga->bpp < 24)) { - if (!s3->accel.b2e8_pix) { - if (!s3->accel.color_16bit_check) { - wrt_mask = (s3->accel.wrt_mask_actual[0] | (s3->accel.wrt_mask_actual[1] << 8)); - } else if (s3->accel.color_16bit_check && (s3->accel.cmd == 0x40f3)) - return; - } - } - - while (count-- && s3->accel.sy >= 0) { - if (s3->accel.b2e8_pix && s3_cpu_src(s3) && !s3->accel.temp_cnt) { - mix_dat >>= 16; - s3->accel.temp_cnt = 16; - } - - if ((s3->accel.cx & 0xfff) >= clip_l && (s3->accel.cx & 0xfff) <= clip_r && (s3->accel.cy & 0xfff) >= clip_t && (s3->accel.cy & 0xfff) <= clip_b) { - if (s3_cpu_dest(s3) && ((s3->accel.multifunc[0xa] & 0xc0) == 0x00)) { - mix_dat = mix_mask; /* Mix data = forced to foreground register. */ - } else if (s3_cpu_dest(s3) && vram_mask) { - /* Mix data = current video memory value. */ - READ(s3->accel.dest + s3->accel.cx - s3->accel.minus, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? mix_mask : 0; - } - - if (s3_cpu_dest(s3)) { - READ(s3->accel.dest + s3->accel.cx - s3->accel.minus, src_dat); - if (vram_mask) - src_dat = ((src_dat & rd_mask) == rd_mask); - } else { - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: - src_dat = bkgd_color; - if (s3->color_16bit && (svga->bpp < 24) && !s3->accel.b2e8_pix && (s3->accel.cmd != 0x41b3)) { - if (!s3->accel.color_16bit_check) - src_dat = s3->accel.bkgd_color_actual[0] | (s3->accel.bkgd_color_actual[1] << 8); - } - break; - case 1: - src_dat = frgd_color; - if (s3->color_16bit && (svga->bpp < 24) && !s3->accel.b2e8_pix && (s3->accel.cmd != 0x41b3)) { - if (!s3->accel.color_16bit_check) - src_dat = s3->accel.frgd_color_actual[0] | (s3->accel.frgd_color_actual[1] << 8); - } - break; - case 2: - src_dat = cpu_dat; - break; - case 3: - src_dat = 0; - break; - - default: - break; - } - } - - READ(s3->accel.dest + s3->accel.cx - s3->accel.minus, dest_dat); - - MIX - - if (s3->accel.cmd & 0x10) { - WRITE(s3->accel.dest + s3->accel.cx - s3->accel.minus, dest_dat); - } - } - - if (s3->accel.b2e8_pix && s3_cpu_src(s3)) { - if (s3->accel.temp_cnt > 0) { - s3->accel.temp_cnt--; - mix_dat <<= 1; - mix_dat |= 1; - } - } else { - mix_dat <<= 1; - mix_dat |= 1; - } - - if (s3->color_16bit) - cpu_dat >>= 16; - else - cpu_dat >>= 8; - - if (s3->accel.cmd & 0x20) - s3->accel.cx++; - else - s3->accel.cx--; - - s3->accel.cx &= 0xfff; - s3->accel.sx--; - if (s3->accel.sx < 0) { - if (s3->accel.cmd & 0x20) - s3->accel.cx -= (s3->accel.maj_axis_pcnt & 0xfff) + 1; - else - s3->accel.cx += (s3->accel.maj_axis_pcnt & 0xfff) + 1; - - s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; - if (s3->accel.cmd & 0x80) - s3->accel.cy++; - else - s3->accel.cy--; - - s3->accel.cy &= 0xfff; - s3->accel.dest = s3->accel.cy * s3->width; - s3->accel.sy--; - - if (cpu_input) { - if (s3->accel.b2e8_pix) { - s3->accel.cur_x = s3->accel.cx; - s3->accel.cur_y = s3->accel.cy; - } - return; - } - if (s3->accel.sy < 0) { - s3->accel.cur_x = s3->accel.cx; - s3->accel.cur_y = s3->accel.cy; - return; - } - } - } - break; - - case 6: /*BitBlt*/ - if (!cpu_input) { /*!cpu_input is trigger to start operation*/ - s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; - s3->accel.sy = s3->accel.multifunc[0] & 0xfff; - - s3->accel.dx = s3->accel.destx_distp & 0xfff; - s3->accel.dy = s3->accel.desty_axstp & 0xfff; - - s3->accel.cx = s3->accel.cur_x & 0xfff; - s3->accel.cy = s3->accel.cur_y & 0xfff; - - s3->accel.src = s3->accel.cy * s3->width; - s3->accel.dest = s3->accel.dy * s3->width; - - if (s3->color_16bit && (svga->bpp < 24)) { - if (s3->accel.destx_distp & 0x400) { - s3->accel.color_16bit_check = 0; - s3->accel.minus = 0x400; - } else { - s3->accel.color_16bit_check = 1; - s3->accel.minus = 0; - } - s3->accel.srcminus = 0x400; - } else { - s3->accel.color_16bit_check = 0; - s3->accel.minus = 0; - s3->accel.srcminus = 0; - } - } - - if ((s3->accel.cmd & 0x100) && !cpu_input) - return; /*Wait for data from CPU*/ - - frgd_mix = (s3->accel.frgd_mix >> 5) & 3; - bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; - - if (s3->color_16bit && (svga->bpp < 24)) { - if (!s3->accel.color_16bit_check) - wrt_mask = (s3->accel.wrt_mask_actual[0] | (s3->accel.wrt_mask_actual[1] << 8)); - else - return; - } - - if (!cpu_input && (frgd_mix == 3) && !vram_mask && ((s3->accel.cmd & 0xa0) == 0xa0) && ((s3->accel.frgd_mix & 0xf) == 7) && ((s3->accel.bkgd_mix & 0xf) == 7)) { - while (1) { - if ((s3->accel.dx & 0xfff) >= clip_l && (s3->accel.dx & 0xfff) <= clip_r && (s3->accel.dy & 0xfff) >= clip_t && (s3->accel.dy & 0xfff) <= clip_b) { - READ(s3->accel.src + s3->accel.cx - s3->accel.srcminus, src_dat); - READ(s3->accel.dest + s3->accel.dx - s3->accel.minus, dest_dat); - - dest_dat = (src_dat & wrt_mask) | (dest_dat & ~wrt_mask); - - WRITE(s3->accel.dest + s3->accel.dx - s3->accel.minus, dest_dat); - } - - s3->accel.cx++; - s3->accel.dx++; - s3->accel.sx--; - s3->accel.dx &= 0xfff; - if (s3->accel.sx < 0) { - s3->accel.cx -= (s3->accel.maj_axis_pcnt & 0xfff) + 1; - s3->accel.dx -= (s3->accel.maj_axis_pcnt & 0xfff) + 1; - s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; - - s3->accel.cy++; - s3->accel.dy++; - - s3->accel.dy &= 0xfff; - s3->accel.src = s3->accel.cy * s3->width; - s3->accel.dest = s3->accel.dy * s3->width; - - s3->accel.sy--; - - if (s3->accel.sy < 0) { /*It's evident that this is a clear undocumented difference compared to later chips, per what NT 3.5+ does to DX/DY.*/ - s3->accel.destx_distp = s3->accel.dx; - s3->accel.desty_axstp = s3->accel.dy; - return; - } - } - } - } else { - while (count-- && s3->accel.sy >= 0) { - if ((s3->accel.dx & 0xfff) >= clip_l && (s3->accel.dx & 0xfff) <= clip_r && ((s3->accel.dy & 0xfff) >= clip_t && (s3->accel.dy & 0xfff) <= clip_b)) { - if (vram_mask && (s3->accel.cmd & 0x10)) { - READ(s3->accel.src + s3->accel.cx - s3->accel.srcminus, mix_dat); - mix_dat = ((mix_dat & rd_mask) == rd_mask); - mix_dat = mix_dat ? mix_mask : 0; - } - switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { - case 0: - src_dat = bkgd_color; - if (s3->color_16bit && (svga->bpp < 24)) { - if (!s3->accel.color_16bit_check) - src_dat = s3->accel.bkgd_color_actual[0] | (s3->accel.bkgd_color_actual[1] << 8); - } - break; - case 1: - src_dat = frgd_color; - if (s3->color_16bit && (svga->bpp < 24)) { - if (!s3->accel.color_16bit_check) - src_dat = s3->accel.frgd_color_actual[0] | (s3->accel.frgd_color_actual[1] << 8); - } - break; - case 2: - src_dat = cpu_dat; - break; - case 3: - READ(s3->accel.src + s3->accel.cx - s3->accel.srcminus, src_dat); - if (vram_mask && (s3->accel.cmd & 0x10)) - src_dat = ((src_dat & rd_mask) == rd_mask); - break; - - default: - break; - } - - READ(s3->accel.dest + s3->accel.dx - s3->accel.minus, dest_dat); - - MIX - - if ((!(s3->accel.cmd & 0x10) && vram_mask) || (s3->accel.cmd & 0x10)) { - WRITE(s3->accel.dest + s3->accel.dx - s3->accel.minus, dest_dat); - } - } - - mix_dat <<= 1; - mix_dat |= 1; - - if (s3->color_16bit) - cpu_dat >>= 16; - else - cpu_dat >>= 8; - - if (s3->accel.cmd & 0x20) { - s3->accel.cx++; - s3->accel.dx++; - } else { - s3->accel.cx--; - s3->accel.dx--; - } - s3->accel.dx &= 0xfff; - s3->accel.sx--; - if (s3->accel.sx < 0) { - if (s3->accel.cmd & 0x20) { - s3->accel.cx -= ((s3->accel.maj_axis_pcnt & 0xfff) + 1); - s3->accel.dx -= ((s3->accel.maj_axis_pcnt & 0xfff) + 1); - } else { - s3->accel.cx += ((s3->accel.maj_axis_pcnt & 0xfff) + 1); - s3->accel.dx += ((s3->accel.maj_axis_pcnt & 0xfff) + 1); - } - s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; - - if (s3->accel.cmd & 0x80) { - s3->accel.cy++; - s3->accel.dy++; - } else { - s3->accel.cy--; - s3->accel.dy--; - } - s3->accel.dy &= 0xfff; - s3->accel.src = s3->accel.cy * s3->width; - s3->accel.dest = s3->accel.dy * s3->width; - - s3->accel.sy--; - - if (cpu_input) - return; - - if (s3->accel.sy < 0) { /*It's evident that this is a clear undocumented difference compared to later chips, per what NT 3.5+ does to DX/DY.*/ - s3->accel.destx_distp = s3->accel.dx; - s3->accel.desty_axstp = s3->accel.dy; - return; - } - } - } - } - break; - - default: - break; - } -} - void s3_short_stroke_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, s3_t *s3, uint8_t ssv) { @@ -8517,20 +7825,17 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi uint32_t srcbase; uint32_t dstbase; - s3->accel.srcminus = 0; - s3->accel.minus = 0; - if ((s3->chip >= S3_TRIO64 || s3->chip == S3_VISION968 || s3->chip == S3_VISION868) && (s3->accel.cmd & (1 << 11))) - cmd |= 8; + cmd |= 0x08; // SRC-BASE/DST-BASE - if ((s3->accel.multifunc[0xd] >> 4) & 7) - srcbase = 0x100000 * ((s3->accel.multifunc[0xd] >> 4) & 3); + if (((s3->accel.multifunc[0xd] >> 4) & 7) && (s3->chip >= S3_VISION964)) + srcbase = 0x100000 * ((s3->accel.multifunc[0xd] >> 4) & 7); else srcbase = 0x100000 * ((s3->accel.multifunc[0xe] >> 2) & 3); - if ((s3->accel.multifunc[0xd] >> 0) & 7) - dstbase = 0x100000 * ((s3->accel.multifunc[0xd] >> 0) & 3); + if (((s3->accel.multifunc[0xd] >> 0) & 7) && (s3->chip >= S3_VISION964)) + dstbase = 0x100000 * ((s3->accel.multifunc[0xd] >> 0) & 7); else dstbase = 0x100000 * ((s3->accel.multifunc[0xe] >> 0) & 3); @@ -8545,10 +7850,36 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi if ((s3->accel.cmd & 0x100) && (s3_cpu_src(s3) || (s3_cpu_dest(s3))) && (!cpu_input || (s3_enable_fifo(s3) == 0))) s3->force_busy = 1; + if ((s3->bpp == 0) && s3->color_16bit && !s3->accel.b2e8_pix) { + if (cmd <= 2) { + if (s3->accel.cur_x & 0x400) { + if (s3->accel.cmd != 0x41b3) + wrt_mask = (wrt_mask << 8) & 0xff00; + else + wrt_mask &= 0xff; + + frgd_color = (frgd_color << 8) & 0xff00; + bkgd_color = (bkgd_color << 8) & 0xff00; + } else { + if (clip_r >= 0x400) { + wrt_mask &= 0xff; + frgd_color &= 0xff; + bkgd_color &= 0xff; + } + } + } else if (cmd == 6) { + if (s3->accel.destx_distp & 0x400) { + wrt_mask = (wrt_mask << 8) & 0xff00; + frgd_color = (frgd_color << 8) & 0xff00; + bkgd_color = (bkgd_color << 8) & 0xff00; + } + } + } + if (!cpu_input) s3->accel.dat_count = 0; - if (cpu_input && (((s3->accel.multifunc[0xa] & 0xc0) != 0x80) || (!(s3->accel.cmd & 2)))) { + if (cpu_input && (((s3->accel.multifunc[0xa] & 0xc0) != 0x80) || (!(s3->accel.cmd & 0x02)))) { if ((s3->bpp == 3) && (count == 2)) { if (s3->accel.dat_count) { cpu_dat = ((cpu_dat & 0xffff) << 16) | s3->accel.dat_buf; @@ -8570,9 +7901,9 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi else if ((s3->bpp == 1) || s3->color_16bit) rd_mask &= 0xffff; - if (s3->bpp == 0) + if ((s3->bpp == 0) && !s3->color_16bit) compare &= 0xff; - else if (s3->bpp == 1) + else if ((s3->bpp == 1) || s3->color_16bit) compare &= 0xffff; switch (s3->accel.cmd & 0x600) { @@ -8593,19 +7924,21 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi break; } + frgd_mix = (s3->accel.frgd_mix >> 5) & 3; + bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; + /*Bit 4 of the Command register is the draw yes bit, which enables writing to memory/reading from memory when enabled. When this bit is disabled, no writing to memory/reading from memory is allowed. (This bit is almost meaningless on the NOP command)*/ - s3_log("CMD=%d, full=%04x, s3bpp=%x, multifuncE=%03x, sourcedisplay=%x, mmio=%02x, srcbase=%08x, dstbase=%08x.\n", cmd, s3->accel.cmd, s3->bpp, s3->accel.multifunc[0x0e] & 0x230, vram_mask, svga->crtc[0x53] & 0x18, srcbase, dstbase); + if (s3->accel.cmd == 0x41b3 || (cmd == 6)) + s3_log("CMD=%d, full=%04x, s3bpp=%x, multifuncE=%03x, sourcedisplay=%x, mmio=%02x, srcbase=%08x, dstbase=%08x, cpu=%04x, mix=%04x, count=%d, rd_mask=%04x, wrt_mask=%04x, width=%d, s=%d,%d, c=%d,%d, d=%d,%d, 16bitcolor=%x, frgdcolor=%04x, bkgdcolor=%04x, frgdsel=%d, bkgdsel=%d, frgdmix=%02x, svgabpp=%d.\n", cmd, s3->accel.cmd, s3->bpp, s3->accel.multifunc[0x0e], vram_mask, svga->crtc[0x53] & 0x18, srcbase, dstbase, cpu_dat & 0xffff, mix_dat & 0xffff, count, rd_mask, wrt_mask, s3->width, s3->accel.sx, s3->accel.sy, s3->accel.cx, s3->accel.cy, s3->accel.dx, s3->accel.dy, s3->color_16bit, frgd_color, bkgd_color, frgd_mix, bkgd_mix, s3->accel.frgd_mix & 0x0f, svga->bpp); + switch (cmd) { case 0: /*NOP (Short Stroke Vectors)*/ if (s3->accel.ssv_state == 0) break; - frgd_mix = (s3->accel.frgd_mix >> 5) & 3; - bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; - - if (s3->accel.cmd & 8) /*Radial*/ + if (s3->accel.cmd & 0x08) /*Radial*/ { while (count-- && s3->accel.ssv_len >= 0) { if ((s3->accel.cx & 0xfff) >= clip_l && (s3->accel.cx & 0xfff) <= clip_r && (s3->accel.cy & 0xfff) >= clip_t && (s3->accel.cy & 0xfff) <= clip_b) { @@ -8655,7 +7988,7 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi mix_dat <<= 1; mix_dat |= 1; - if (s3->bpp == 0 && !s3->color_16bit) + if ((s3->bpp == 0) && !s3->color_16bit) cpu_dat >>= 8; else cpu_dat >>= 16; @@ -8709,17 +8042,18 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi case 1: /*Draw line*/ if (!cpu_input) { + s3->accel.minus = 0; s3->accel.cx = s3->accel.cur_x & 0xfff; s3->accel.cy = s3->accel.cur_y & 0xfff; s3->accel.sy = s3->accel.maj_axis_pcnt; + if ((s3->bpp == 0) && s3->color_16bit && (s3->accel.cur_x & 0x400)) + s3->accel.minus = 0x400; if (s3_cpu_src(s3)) return; /*Wait for data from CPU*/ } - frgd_mix = (s3->accel.frgd_mix >> 5) & 3; - bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; - if (s3->accel.cmd & 8) { /*Radial*/ + if (s3->accel.cmd & 0x08) { /*Radial*/ while (count-- && s3->accel.sy >= 0) { if ((s3->accel.cx & 0xfff) >= clip_l && (s3->accel.cx & 0xfff) <= clip_r && (s3->accel.cy & 0xfff) >= clip_t && (s3->accel.cy & 0xfff) <= clip_b) { switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { @@ -8756,11 +8090,11 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi update = 1; if (update) { - READ((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); + READ((s3->accel.cy * s3->width) + s3->accel.cx - s3->accel.minus, dest_dat); MIX - WRITE((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); + WRITE((s3->accel.cy * s3->width) + s3->accel.cx - s3->accel.minus, dest_dat); } } @@ -8860,11 +8194,11 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi update = 1; if (update) { - READ((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); + READ((s3->accel.cy * s3->width) + s3->accel.cx - s3->accel.minus, dest_dat); MIX - WRITE((s3->accel.cy * s3->width) + s3->accel.cx, dest_dat); + WRITE((s3->accel.cy * s3->width) + s3->accel.cx - s3->accel.minus, dest_dat); } } @@ -8879,7 +8213,7 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi mix_dat |= 1; } - if (s3->bpp == 0 && !s3->color_16bit) + if ((s3->bpp == 0) && !s3->color_16bit) cpu_dat >>= 8; else cpu_dat >>= 16; @@ -8926,13 +8260,21 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi } break; - case 2: /*Rectangle fill*/ + case 2: /*Rectangle fill*/ if (!cpu_input) /*!cpu_input is trigger to start operation*/ { + s3->accel.minus = 0; s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; s3->accel.sy = s3->accel.multifunc[0] & 0xfff; s3->accel.cx = s3->accel.cur_x & 0xfff; s3->accel.cy = s3->accel.cur_y & 0xfff; + if ((s3->bpp == 0) && s3->color_16bit && (s3->accel.cur_x & 0x400)) + s3->accel.minus = 0x400; + + if (s3->accel.cur_x & 0x400) + s3_log("Rectangle Fill + 1024 FULLCMD=%04x: frgdcolor=%04x, s(%d,%d), c(%d,%d).\n", s3->accel.cmd, frgd_color, s3->accel.sx, s3->accel.sy, s3->accel.cx, s3->accel.cy); + else + s3_log("Rectangle Fill + 0 FULLCMD=%04x: frgdcolor=%04x, s(%d,%d), c(%d,%d).\n", s3->accel.cmd, frgd_color, s3->accel.sx, s3->accel.sy, s3->accel.cx, s3->accel.cy); s3->accel.dest = dstbase + s3->accel.cy * s3->width; @@ -8945,23 +8287,19 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi } } - frgd_mix = (s3->accel.frgd_mix >> 5) & 3; - bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; - if (s3->accel.b2e8_pix && s3_cpu_src(s3) && (count == 16)) { /*Stupid undocumented 0xB2E8 on 911/924*/ count = s3->accel.maj_axis_pcnt + 1; s3->accel.temp_cnt = 16; - s3_log("CMD2: B2E8 pixtrans, frgdmix=%d, bkgdmix=%d.\n", frgd_mix, bkgd_mix); } - while (count-- && s3->accel.sy >= 0) { - if (s3->accel.b2e8_pix && s3_cpu_src(s3) && s3->accel.temp_cnt == 0) { + while (count-- && (s3->accel.sy >= 0)) { + if (s3->accel.b2e8_pix && s3_cpu_src(s3) && !s3->accel.temp_cnt) { mix_dat >>= 16; s3->accel.temp_cnt = 16; } - if ((((s3->accel.cx) >= clip_l && (s3->accel.cx) <= clip_r && (s3->accel.cy) >= clip_t && (s3->accel.cy) <= clip_b) && !(s3->accel.multifunc[0xe] & 0x20)) || - (((s3->accel.cx) < clip_l && (s3->accel.cx) > clip_r && (s3->accel.cy) < clip_t && (s3->accel.cy) > clip_b) && (s3->accel.multifunc[0xe] & 0x20)) ) { + if ((((s3->accel.cx >= clip_l) && (s3->accel.cx <= clip_r) && (s3->accel.cy >= clip_t) && (s3->accel.cy <= clip_b)) && !(s3->accel.multifunc[0xe] & 0x20)) || + (((s3->accel.cx < clip_l) && (s3->accel.cx > clip_r) && (s3->accel.cy < clip_t) && (s3->accel.cy > clip_b)) && (s3->accel.multifunc[0xe] & 0x20)) ) { if (s3_cpu_dest(s3) && ((s3->accel.multifunc[0xa] & 0xc0) == 0x00)) { mix_dat = mix_mask; /* Mix data = forced to foreground register. */ } else if (s3_cpu_dest(s3) && vram_mask) { @@ -8971,8 +8309,8 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi mix_dat = mix_dat ? mix_mask : 0; } - if (s3_cpu_dest(s3)) { - READ(s3->accel.dest + s3->accel.cx, src_dat); + if (s3_cpu_dest(s3) || ((s3_cpu_src(s3)) && s3->color_16bit && (s3->bpp == 0) && (s3->accel.cmd == 0x41b3))) { + READ(s3->accel.dest + s3->accel.cx - s3->accel.minus, src_dat); if (vram_mask) src_dat = ((src_dat & rd_mask) == rd_mask); } else { @@ -9011,12 +8349,15 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi update = 1; if (update) { - READ(s3->accel.dest + s3->accel.cx, dest_dat); + READ(s3->accel.dest + s3->accel.cx - s3->accel.minus, dest_dat); MIX if (s3->accel.cmd & 0x10) { - WRITE(s3->accel.dest + s3->accel.cx, dest_dat); + if (s3->accel.cmd == 0x41b3) + s3_log("Full=%04x: Destination=%04x, OldDest=%04x, c=%d,%d.\n", s3->accel.cmd, dest_dat, old_dest_dat, s3->accel.cx, s3->accel.cy); + + WRITE(s3->accel.dest + s3->accel.cx - s3->accel.minus, dest_dat); } } } @@ -9032,7 +8373,7 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi mix_dat |= 1; } - if (s3->bpp == 0 && !s3->color_16bit) + if ((s3->bpp == 0) && !s3->color_16bit) cpu_dat >>= 8; else cpu_dat >>= 16; @@ -9045,13 +8386,13 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi s3->accel.cx &= 0xfff; s3->accel.sx--; if (s3->accel.sx < 0) { - if (s3->accel.cmd & 0x20) - s3->accel.cx -= ((s3->accel.maj_axis_pcnt & 0xfff) + 1); - else - s3->accel.cx += ((s3->accel.maj_axis_pcnt & 0xfff) + 1); - s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; + if (s3->accel.cmd & 0x20) + s3->accel.cx -= (s3->accel.sx + 1); + else + s3->accel.cx += (s3->accel.sx + 1); + if (s3->accel.cmd & 0x80) s3->accel.cy++; else @@ -9093,8 +8434,6 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi end_y1 = s3->accel.desty_axstp; end_y2 = s3->accel.desty_axstp2; - frgd_mix = (s3->accel.frgd_mix >> 5) & 3; - while ((s3->accel.poly_cy < end_y1) && (s3->accel.poly_cy2 < end_y2)) { int y = s3->accel.poly_cy; int x_count = ABS((s3->accel.poly_cx2 >> 20) - s3->accel.poly_x) + 1; @@ -9177,36 +8516,36 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi case 6: /*BitBlt*/ if (!cpu_input) { /*!cpu_input is trigger to start operation*/ + s3->accel.minus = 0; s3->accel.sx = s3->accel.maj_axis_pcnt & 0xfff; s3->accel.sy = s3->accel.multifunc[0] & 0xfff; s3->accel.dx = s3->accel.destx_distp & 0xfff; s3->accel.dy = s3->accel.desty_axstp & 0xfff; + if ((s3->bpp == 0) && s3->color_16bit && (clip_r > 0x3ff) && (s3->accel.destx_distp & 0x400)) + s3->accel.minus = 0x400; + s3->accel.cx = s3->accel.cur_x & 0xfff; s3->accel.cy = s3->accel.cur_y & 0xfff; s3->accel.src = srcbase + s3->accel.cy * s3->width; s3->accel.dest = dstbase + s3->accel.dy * s3->width; + s3_log("BitBLT: D(%d,%d).\n", s3->accel.dx, s3->accel.dy); } - if ((s3->accel.cmd & 0x100) && !cpu_input) { + if ((s3->accel.cmd & 0x100) && !cpu_input) return; /*Wait for data from CPU*/ - } - - frgd_mix = (s3->accel.frgd_mix >> 5) & 3; - bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; if (!cpu_input && (frgd_mix == 3) && !vram_mask && !(s3->accel.multifunc[0xe] & 0x100) && ((s3->accel.cmd & 0xa0) == 0xa0) && ((s3->accel.frgd_mix & 0xf) == 7) && ((s3->accel.bkgd_mix & 0xf) == 7)) { while (1) { - if ((s3->accel.dx) >= clip_l && (s3->accel.dx) <= clip_r && (s3->accel.dy) >= clip_t && (s3->accel.dy) <= clip_b) { - READ(s3->accel.src + s3->accel.cx, src_dat); - READ(s3->accel.dest + s3->accel.dx, dest_dat); - + if ((s3->accel.dx >= clip_l) && (s3->accel.dx <= clip_r) && (s3->accel.dy >= clip_t) && (s3->accel.dy <= clip_b)) { + READ(s3->accel.src + s3->accel.cx - s3->accel.minus, src_dat); + READ(s3->accel.dest + s3->accel.dx - s3->accel.minus, dest_dat); dest_dat = (src_dat & wrt_mask) | (dest_dat & ~wrt_mask); if (s3->accel.cmd & 0x10) { - WRITE(s3->accel.dest + s3->accel.dx, dest_dat); + WRITE(s3->accel.dest + s3->accel.dx - s3->accel.minus, dest_dat); } } @@ -9222,8 +8561,8 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi s3->accel.cy++; s3->accel.dy++; - s3->accel.src = srcbase + s3->accel.cy * s3->width; - s3->accel.dest = dstbase + s3->accel.dy * s3->width; + s3->accel.src = srcbase + (s3->accel.cy * s3->width); + s3->accel.dest = dstbase + (s3->accel.dy * s3->width); s3->accel.sy--; @@ -9235,8 +8574,8 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi } } } else { - while (count-- && s3->accel.sy >= 0) { - if ((s3->accel.dx) >= clip_l && (s3->accel.dx) <= clip_r && ((s3->accel.dy) >= clip_t && (s3->accel.dy) <= clip_b)) { + while (count-- && (s3->accel.sy >= 0)) { + if ((s3->accel.dx >= clip_l) && (s3->accel.dx <= clip_r) && (s3->accel.dy >= clip_t) && (s3->accel.dy <= clip_b)) { if (vram_mask && (s3->accel.cmd & 0x10)) { READ(s3->accel.src + s3->accel.cx, mix_dat); mix_dat = ((mix_dat & rd_mask) == rd_mask); @@ -9253,7 +8592,7 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi src_dat = cpu_dat; break; case 3: - READ(s3->accel.src + s3->accel.cx, src_dat); + READ(s3->accel.src + s3->accel.cx - s3->accel.minus, src_dat); if (vram_mask && (s3->accel.cmd & 0x10)) src_dat = ((src_dat & rd_mask) == rd_mask); break; @@ -9278,12 +8617,12 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi update = 1; if (update) { - READ(s3->accel.dest + s3->accel.dx, dest_dat); + READ(s3->accel.dest + s3->accel.dx - s3->accel.minus, dest_dat); MIX if ((!(s3->accel.cmd & 0x10) && vram_mask) || (s3->accel.cmd & 0x10)) { - WRITE(s3->accel.dest + s3->accel.dx, dest_dat); + WRITE(s3->accel.dest + s3->accel.dx - s3->accel.minus, dest_dat); } } } @@ -9291,7 +8630,7 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi mix_dat <<= 1; mix_dat |= 1; - if (s3->bpp == 0 && !s3->color_16bit) + if ((s3->bpp == 0) && !s3->color_16bit) cpu_dat >>= 8; else cpu_dat >>= 16; @@ -9366,9 +8705,6 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi return; /*Wait for data from CPU*/ } - frgd_mix = (s3->accel.frgd_mix >> 5) & 3; - bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; - while (count-- && s3->accel.sy >= 0) { if ((s3->accel.dx) >= clip_l && (s3->accel.dx) <= clip_r && (s3->accel.dy) >= clip_t && (s3->accel.dy) <= clip_b) { if (vram_mask) { @@ -9424,7 +8760,7 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi mix_dat <<= 1; mix_dat |= 1; - if (s3->bpp == 0 && !s3->color_16bit) + if ((s3->bpp == 0) && !s3->color_16bit) cpu_dat >>= 8; else cpu_dat >>= 16; @@ -9616,9 +8952,6 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi end_y1 = s3->accel.desty_axstp; end_y2 = s3->accel.desty_axstp2; - frgd_mix = (s3->accel.frgd_mix >> 5) & 3; - bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; - while ((s3->accel.poly_cy < end_y1) && (s3->accel.poly_cy2 < end_y2)) { int y = s3->accel.poly_cy; int x_count = ABS((s3->accel.poly_cx2 >> 20) - s3->accel.poly_x) + 1; @@ -9742,9 +9075,6 @@ s3_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, voi if ((s3->accel.cmd & 0x100) && !cpu_input) return; /*Wait for data from CPU*/ - frgd_mix = (s3->accel.frgd_mix >> 5) & 3; - bkgd_mix = (s3->accel.bkgd_mix >> 5) & 3; - while (count-- && s3->accel.sy >= 0) { if ((s3->accel.dx & 0xfff) >= clip_l && (s3->accel.dx & 0xfff) <= clip_r && (s3->accel.dy & 0xfff) >= clip_t && (s3->accel.dy & 0xfff) <= clip_b) { switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) { @@ -10462,6 +9792,7 @@ s3_init(const device_t *info) s3->pci = !!(info->flags & DEVICE_PCI); s3->vlb = !!(info->flags & DEVICE_VLB); + mem_mapping_add(&s3->linear_mapping, 0, 0, svga_read_linear, svga_readw_linear, svga_readl_linear, svga_write_linear, svga_writew_linear, svga_writel_linear, @@ -10505,6 +9836,8 @@ s3_init(const device_t *info) NULL); } } + mem_mapping_set_handler(&svga->mapping, s3_read, s3_readw, s3_readl, s3_write, s3_writew, s3_writel); + mem_mapping_set_p(&svga->mapping, s3); svga->hwcursor.cur_ysize = 64; @@ -10603,10 +9936,7 @@ s3_init(const device_t *info) svga->force_old_addr = 1; - if (s3->chip <= S3_86C924) - s3->accel_start = s3_911_accel_start; - else - s3->accel_start = s3_accel_start; + s3->accel_start = s3_accel_start; switch (s3->card_type) { case S3_ORCHID_86C911: @@ -10617,7 +9947,6 @@ s3_init(const device_t *info) s3->id_ext = stepping; s3->id_ext_pci = 0; s3->packed_mmio = 0; - s3->width = 1024; svga->ramdac = device_add(&sc11483_ramdac_device); if (s3->card_type == S3_ORCHID_86C911) { @@ -10637,7 +9966,6 @@ s3_init(const device_t *info) s3->id_ext = stepping; s3->id_ext_pci = 0; s3->packed_mmio = 0; - s3->width = 1024; svga->ramdac = device_add(&att490_ramdac_device); svga->clock_gen = device_add(&ics2494an_305_device); diff --git a/src/video/vid_svga.c b/src/video/vid_svga.c index cecdcf840..32776f1eb 100644 --- a/src/video/vid_svga.c +++ b/src/video/vid_svga.c @@ -149,13 +149,13 @@ svga_out(uint16_t addr, uint8_t val, void *priv) case 2: index = dev->dac_addr & 0xff; dev->dac_b = val; - svga->vgapal[index].r = dev->dac_r; - svga->vgapal[index].g = dev->dac_g; - svga->vgapal[index].b = dev->dac_b; + dev->_8514pal[index].r = dev->dac_r; + dev->_8514pal[index].g = dev->dac_g; + dev->_8514pal[index].b = dev->dac_b; if (svga->ramdac_type == RAMDAC_8BIT) - dev->pallook[index] = makecol32(svga->vgapal[index].r, svga->vgapal[index].g, svga->vgapal[index].b); + dev->pallook[index] = makecol32(dev->_8514pal[index].r, dev->_8514pal[index].g, dev->_8514pal[index].b); else - dev->pallook[index] = makecol32(video_6to8[svga->vgapal[index].r & 0x3f], video_6to8[svga->vgapal[index].g & 0x3f], video_6to8[svga->vgapal[index].b & 0x3f]); + dev->pallook[index] = makecol32(video_6to8[dev->_8514pal[index].r & 0x3f], video_6to8[dev->_8514pal[index].g & 0x3f], video_6to8[dev->_8514pal[index].b & 0x3f]); dev->dac_pos = 0; dev->dac_addr = (dev->dac_addr + 1) & 0xff; break; @@ -221,11 +221,8 @@ svga_out(uint16_t addr, uint8_t val, void *priv) case 0x3c3: if (xga_active && xga) xga->on = (val & 0x01) ? 0 : 1; - if (ibm8514_active && dev) { - dev->on[0] = (val & 0x01) ? 0 : 1; - if (dev->local & 0xff) - dev->on[1] = dev->on[0]; - } + if (ibm8514_active && dev) + dev->on = (val & 0x01) ? 0 : 1; svga_log("3C3: VGA ON = %d.\n", val & 0x01); vga_on = val & 0x01; @@ -399,24 +396,24 @@ svga_in(uint16_t addr, void *priv) case 0: dev->dac_pos++; if (svga->ramdac_type == RAMDAC_8BIT) - ret = svga->vgapal[index].r; + ret = dev->_8514pal[index].r; else - ret = svga->vgapal[index].r & 0x3f; + ret = dev->_8514pal[index].r & 0x3f; break; case 1: dev->dac_pos++; if (svga->ramdac_type == RAMDAC_8BIT) - ret = svga->vgapal[index].g; + ret = dev->_8514pal[index].g; else - ret = svga->vgapal[index].g & 0x3f; + ret = dev->_8514pal[index].g & 0x3f; break; case 2: dev->dac_pos = 0; dev->dac_addr = (dev->dac_addr + 1) & 0xff; if (svga->ramdac_type == RAMDAC_8BIT) - ret = svga->vgapal[index].b; + ret = dev->_8514pal[index].b; else - ret = svga->vgapal[index].b & 0x3f; + ret = dev->_8514pal[index].b & 0x3f; break; default: @@ -551,11 +548,11 @@ svga_set_ramdac_type(svga_t *svga, int type) for (int c = 0; c < 256; c++) { if (ibm8514_active && dev) { if (svga->ramdac_type == RAMDAC_8BIT) - dev->pallook[c] = makecol32(svga->vgapal[c].r, svga->vgapal[c].g, svga->vgapal[c].b); + dev->pallook[c] = makecol32(dev->_8514pal[c].r, dev->_8514pal[c].g, dev->_8514pal[c].b); else - dev->pallook[c] = makecol32((svga->vgapal[c].r & 0x3f) * 4, - (svga->vgapal[c].g & 0x3f) * 4, - (svga->vgapal[c].b & 0x3f) * 4); + dev->pallook[c] = makecol32((dev->_8514pal[c].r & 0x3f) * 4, + (dev->_8514pal[c].g & 0x3f) * 4, + (dev->_8514pal[c].b & 0x3f) * 4); } if (xga_active && xga) { if (svga->ramdac_type == RAMDAC_8BIT) @@ -829,7 +826,7 @@ svga_recalctimings(svga_t *svga) #ifdef TBD if (ibm8514_active && (svga->dev8514 != NULL)) { - if (dev->on[0] || dev->on[1]) { + if (dev->on) { uint32_t dot8514 = dev->h_blankstart; uint32_t adj_dot8514 = dev->h_blankstart; uint32_t eff_mask8514 = 0x0000003f; @@ -867,7 +864,7 @@ svga_recalctimings(svga_t *svga) crtcconst = svga->clock * svga->char_width; if (ibm8514_active && (svga->dev8514 != NULL)) { - if (dev->on[0] || dev->on[1]) + if (dev->on) crtcconst8514 = svga->clock8514; } @@ -912,7 +909,7 @@ svga_recalctimings(svga_t *svga) _dispontime = svga->hdisp_time; if (ibm8514_active && (svga->dev8514 != NULL)) { - if (dev->on[0] || dev->on[1]) { + if (dev->on) { disptime8514 = dev->h_total ? dev->h_total : TIMER_USEC; _dispontime8514 = dev->hdisped; } @@ -935,7 +932,7 @@ svga_recalctimings(svga_t *svga) svga->dispofftime = TIMER_USEC; if (ibm8514_active && (svga->dev8514 != NULL)) { - if (dev->on[0] || dev->on[1]) { + if (dev->on) { _dispofftime8514 = disptime8514 - _dispontime8514; _dispontime8514 *= crtcconst8514; _dispofftime8514 *= crtcconst8514; @@ -1464,9 +1461,10 @@ svga_write_common(uint32_t addr, uint8_t val, uint8_t linear, void *priv) if (!linear) { xga_write_test(addr, val, svga); addr = svga_decode_addr(svga, addr, 1); - - if (addr == 0xffffffff) + if (addr == 0xffffffff) { + svga_log("WriteCommon Over.\n"); return; + } } if (!(svga->gdcreg[6] & 1)) @@ -1498,8 +1496,10 @@ svga_write_common(uint32_t addr, uint8_t val, uint8_t linear, void *priv) if (svga->translate_address) addr = svga->translate_address(addr, priv); - if (addr >= svga->vram_max) + if (addr >= svga->vram_max) { + svga_log("WriteBankedOver=%08x, val=%02x.\n", addr & svga->vram_mask, val); return; + } addr &= svga->vram_mask; @@ -1651,7 +1651,6 @@ svga_read_common(uint32_t addr, uint8_t linear, void *priv) if (!linear) { (void) xga_read_test(addr, svga); addr = svga_decode_addr(svga, addr, 0); - if (addr == 0xffffffff) return 0xff; } @@ -1873,6 +1872,8 @@ svga_writew_common(uint32_t addr, uint16_t val, uint8_t linear, void *priv) cycles -= svga->monitor->mon_video_timing_write_w; if (!linear) { + xga_write_test(addr, val & 0xff, svga); + xga_write_test(addr + 1, val >> 8, svga); addr = svga_decode_addr(svga, addr, 1); if (addr == 0xffffffff) @@ -1929,6 +1930,10 @@ svga_writel_common(uint32_t addr, uint32_t val, uint8_t linear, void *priv) cycles -= svga->monitor->mon_video_timing_write_l; if (!linear) { + xga_write_test(addr, val & 0xff, svga); + xga_write_test(addr + 1, (val >> 8) & 0xff, svga); + xga_write_test(addr + 2, (val >> 16) & 0xff, svga); + xga_write_test(addr + 3, (val >> 24) & 0xff, svga); addr = svga_decode_addr(svga, addr, 1); if (addr == 0xffffffff) @@ -1961,6 +1966,7 @@ svga_writel_common(uint32_t addr, uint32_t val, uint8_t linear, void *priv) } if (addr >= svga->vram_max) return; + addr &= svga->vram_mask; svga->changedvram[addr >> 12] = svga->monitor->mon_changeframecount; @@ -2006,7 +2012,6 @@ svga_readw_common(uint32_t addr, uint8_t linear, void *priv) if (!linear) { addr = svga_decode_addr(svga, addr, 0); - if (addr == 0xffffffff) return 0xffff; } @@ -2053,7 +2058,6 @@ svga_readl_common(uint32_t addr, uint8_t linear, void *priv) if (!linear) { addr = svga_decode_addr(svga, addr, 0); - if (addr == 0xffffffff) return 0xffffffff; } diff --git a/src/video/vid_xga.c b/src/video/vid_xga.c index e8d6ef715..e71ed42a7 100644 --- a/src/video/vid_xga.c +++ b/src/video/vid_xga.c @@ -54,6 +54,13 @@ static void xga_render_4bpp(svga_t *svga); static void xga_render_8bpp(svga_t *svga); static void xga_render_16bpp(svga_t *svga); +static void xga_write(uint32_t addr, uint8_t val, void *priv); +static void xga_writew(uint32_t addr, uint16_t val, void *priv); +static void xga_writel(uint32_t addr, uint32_t val, void *priv); +static uint8_t xga_read(uint32_t addr, void *priv); +static uint16_t xga_readw(uint32_t addr, void *priv); +static uint32_t xga_readl(uint32_t addr, void *priv); + int xga_active = 0; #ifdef ENABLE_XGA_LOG @@ -184,7 +191,7 @@ xga_updatemapping(svga_t *svga) xga_log("XGA: Extended Graphics mode.\n"); switch (xga->aperture_cntl) { case 0: - xga_log("XGA: No 64KB aperture: 1MB=%x, 4MB=%x.\n", xga->base_addr_1mb, xga->linear_base); + xga_log("XGA: No 64KB aperture: 1MB=%x, 4MB=%x, SVGA Mapping Base=%x.\n", xga->base_addr_1mb, xga->linear_base, svga->mapping.base); if (xga->base_addr_1mb) { mem_mapping_set_addr(&xga->linear_mapping, xga->base_addr_1mb, 0x100000); mem_mapping_enable(&xga->linear_mapping); @@ -194,18 +201,39 @@ xga_updatemapping(svga_t *svga) } else mem_mapping_disable(&xga->linear_mapping); - mem_mapping_disable(&xga->video_mapping); + mem_mapping_set_handler(&svga->mapping, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel); + switch (svga->gdcreg[6] & 0xc) { + case 0x0: /*128k at A0000*/ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000); + svga->banked_mask = 0xffff; + break; + case 0x4: /*64k at A0000*/ + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); + svga->banked_mask = 0xffff; + break; + case 0x8: /*32k at B0000*/ + mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000); + svga->banked_mask = 0x7fff; + break; + case 0xC: /*32k at B8000*/ + mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000); + svga->banked_mask = 0x7fff; + break; + + default: + break; + } break; case 1: xga_log("XGA: 64KB aperture at A0000.\n"); - mem_mapping_set_addr(&xga->video_mapping, 0xa0000, 0x10000); - mem_mapping_enable(&xga->video_mapping); + mem_mapping_set_handler(&svga->mapping, xga_read, xga_readw, xga_readl, xga_write, xga_writew, xga_writel); + mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000); xga->banked_mask = 0xffff; break; case 2: xga_log("XGA: 64KB aperture at B0000.\n"); - mem_mapping_set_addr(&xga->video_mapping, 0xb0000, 0x10000); - mem_mapping_enable(&xga->video_mapping); + mem_mapping_set_handler(&svga->mapping, xga_read, xga_readw, xga_readl, xga_write, xga_writew, xga_writel); + mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x10000); xga->banked_mask = 0xffff; break; default: @@ -244,7 +272,7 @@ xga_recalctimings(svga_t *svga) xga->ma_latch = xga->disp_start_addr; - xga_log("XGA ClkSel1 = %d, ClkSel2 = %02x.\n", (xga->clk_sel_1 >> 2) & 3, xga->clk_sel_2 & 0x80); + xga_log("XGA ClkSel1 = %d, ClkSel2 = %02x, dispcntl2=%02x.\n", (xga->clk_sel_1 >> 2) & 3, xga->clk_sel_2 & 0x80, xga->disp_cntl_2 & 0xc0); switch ((xga->clk_sel_1 >> 2) & 3) { case 0: xga_log("HDISP VGA0 = %d, XGA = %d.\n", svga->hdisp, xga->h_disp); @@ -798,19 +826,10 @@ xga_ext_inb(uint16_t addr, void *priv) #define READW(addr, dat) \ dat = *(uint16_t *) &xga->vram[(addr) & (xga->vram_mask)]; -#define READW_INV(addr, dat) \ - dat = xga->vram[(addr + 1) & (xga->vram_mask)]; \ - dat |= (xga->vram[(addr) & (xga->vram_mask)] << 8); - #define WRITEW(addr, dat) \ *(uint16_t *) &xga->vram[((addr)) & (xga->vram_mask)] = dat; \ xga->changedvram[(((addr)) & (xga->vram_mask)) >> 12] = svga->monitor->mon_changeframecount; -#define WRITEW_INV(addr, dat) \ - xga->vram[((addr + 1)) & (xga->vram_mask)] = dat & 0xff; \ - xga->vram[((addr)) & (xga->vram_mask)] = dat >> 8; \ - xga->changedvram[(((addr)) & (xga->vram_mask)) >> 12] = svga->monitor->mon_changeframecount; - #define ROP(mix, d, s) \ { \ switch ((mix) ? (xga->accel.frgd_mix & 0x1f) : (xga->accel.bkgd_mix & 0x1f)) { \ @@ -884,7 +903,7 @@ xga_ext_inb(uint16_t addr, void *priv) } static uint32_t -xga_accel_read_pattern_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, int width) +xga_accel_read_pattern_map_pixel(svga_t *svga, int x, int y, uint32_t base, int width) { const xga_t *xga = (xga_t *) svga->xga; uint32_t addr = base; @@ -903,27 +922,19 @@ xga_accel_read_pattern_map_pixel(svga_t *svga, int x, int y, int map, uint32_t b } else byte = mem_readb_phys(addr); - if (xga->linear_endian_reverse) - bits = 7 - (x & 7); - else { - if (xga->accel.px_map_format[xga->accel.dst_map] & 8) { - if ((xga->accel.px_map_format[xga->accel.src_map] & 8) && (xga->accel.px_map_format[map] & 8)) - bits = (x & 7); - else - bits = 7 - (x & 7); - } else { - if ((xga->accel.px_map_format[map] & 8) && !(xga->access_mode & 8)) - bits = (x & 7); - else - bits = 7 - (x & 7); - } + bits = 7 - (x & 7); + + if (!(xga->accel.px_map_format[xga->accel.src_map] & 0x08) && !(xga->accel.px_map_format[xga->accel.dst_map] & 0x08)) { + if (((xga->accel.px_map_format[xga->accel.src_map] & 0x07) >= 0x02) && ((xga->accel.px_map_format[xga->accel.dst_map] & 0x07) >= 0x02)) + bits ^= 7; } + px = (byte >> bits) & 1; return px; } static uint32_t -xga_accel_read_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, int width, UNUSED(int usesrc)) +xga_accel_read_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, int width) { xga_t *xga = (xga_t *) svga->xga; uint32_t addr = base; @@ -935,7 +946,7 @@ xga_accel_read_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, int if ((addr < xga->linear_base) || (addr > (xga->linear_base + 0xfffff))) skip = 1; - switch (xga->accel.px_map_format[map] & 7) { + switch (xga->accel.px_map_format[map] & 0x07) { case 0: /*1-bit*/ addr += (y * (width >> 3)); addr += (x >> 3); @@ -944,14 +955,11 @@ xga_accel_read_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, int } else byte = mem_readb_phys(addr); - if (xga->linear_endian_reverse) + if (xga->accel.px_map_format[map] & 0x08) + bits = (x & 7); + else bits = 7 - (x & 7); - else { - if ((xga->accel.px_map_format[map] & 8) && !(xga->access_mode & 8)) - bits = (x & 7); - else - bits = 7 - (x & 7); - } + px = (byte >> bits) & 1; return px; case 2: /*4-bit*/ @@ -975,17 +983,19 @@ xga_accel_read_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, int case 4: /*16-bit*/ addr += (y * (width << 1)); addr += (x << 1); - if (xga->linear_endian_reverse) { - byte = mem_readw_phys(addr); - if ((xga->access_mode & 7) == 4) - byte = ((byte & 0xff00) >> 8) | ((byte & 0x00ff) << 8); - else if (xga->access_mode & 8) - byte = ((byte & 0xff00) >> 8) | ((byte & 0x00ff) << 8); - } else { + if (xga->access_mode & 0x08) { if (!skip) { READW(addr, byte); } else - byte = mem_readb_phys(addr) | (mem_readb_phys(addr + 1) << 8); + byte = mem_readw_phys(addr); + } else { + if (!skip) { + READW(addr, byte); + } else { + byte = mem_readw_phys(addr); + if ((xga->access_mode & 0x07) == 0x04) + byte = ((byte & 0xff00) >> 8) | ((byte & 0x00ff) << 8); + } } return byte; @@ -1007,7 +1017,7 @@ xga_accel_write_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, ui if ((addr < xga->linear_base) || (addr > (xga->linear_base + 0xfffff))) skip = 1; - switch (xga->accel.px_map_format[map] & 7) { + switch (xga->accel.px_map_format[map] & 0x07) { case 0: /*1-bit*/ addr += (y * (width >> 3)); addr += (x >> 3); @@ -1016,15 +1026,11 @@ xga_accel_write_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, ui } else byte = mem_readb_phys(addr); - if (xga->linear_endian_reverse) { + if ((xga->accel.px_map_format[map] & 0x08) || (xga->accel.px_map_format[xga->accel.src_map] & 0x08)) + mask = 1 << (x & 7); + else mask = 1 << (7 - (x & 7)); - } else { - if ((xga->accel.px_map_format[map] & 8) && !(xga->access_mode & 8)) { - mask = 1 << (x & 7); - } else { - mask = 1 << (7 - (x & 7)); - } - } + byte = (byte & ~mask) | ((pixel ? 0xff : 0) & mask); if (pixel & 1) { if (!skip) { @@ -1044,18 +1050,14 @@ xga_accel_write_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, ui addr += (x >> 1); if (!skip) { READ(addr, byte); - } else { + } else byte = mem_readb_phys(addr); - } - if (xga->linear_endian_reverse) + if (xga->accel.px_map_format[map] & 0x08) + mask = 0x0f << ((x & 1) << 2); + else mask = 0x0f << ((1 - (x & 1)) << 2); - else { - if ((xga->accel.px_map_format[map] & 8) && !(xga->access_mode & 8)) - mask = 0x0f << ((x & 1) << 2); - else - mask = 0x0f << ((1 - (x & 1)) << 2); - } + byte = (byte & ~mask) | (pixel & mask); if (!skip) { WRITE(addr, byte); @@ -1073,14 +1075,16 @@ xga_accel_write_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, ui case 4: /*16-bit*/ addr += (y * width << 1); addr += (x << 1); - if (xga->linear_endian_reverse) { - if ((xga->access_mode & 7) == 4) - pixel = ((pixel & 0xff00) >> 8) | ((pixel & 0x00ff) << 8); - else if (xga->access_mode & 8) - pixel = ((pixel & 0xff00) >> 8) | ((pixel & 0x00ff) << 8); + if (xga->access_mode & 0x08) { + if (!skip) { + WRITEW(addr, pixel); + } } else { if (!skip) { WRITEW(addr, pixel); + } else { + if ((xga->access_mode & 0x07) == 0x04) + pixel = ((pixel & 0xff00) >> 8) | ((pixel & 0x00ff) << 8); } } mem_writew_phys(addr, pixel); @@ -1159,8 +1163,8 @@ xga_short_stroke(svga_t *svga, uint8_t ssv) while (y >= 0) { if (xga->accel.command & 0xc0) { if ((dx >= xga->accel.mask_map_origin_x_off) && (dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (dy >= xga->accel.mask_map_origin_y_off) && (dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1, 1) : xga->accel.frgd_color; - dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1, 0); + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; @@ -1179,8 +1183,8 @@ xga_short_stroke(svga_t *svga, uint8_t ssv) } } } else { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1, 1) : xga->accel.frgd_color; - dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1, 0); + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; @@ -1270,8 +1274,8 @@ xga_line_draw_write(svga_t *svga) if (xga->accel.command & 0xc0) { if ((dx >= xga->accel.mask_map_origin_x_off) && (dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (dy >= xga->accel.mask_map_origin_y_off) && (dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { if (draw_pixel) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, cx, cy, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1, 1) : xga->accel.frgd_color; - dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1, 0); + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, cx, cy, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { ROP(1, dest_dat, src_dat); @@ -1281,8 +1285,8 @@ xga_line_draw_write(svga_t *svga) } } else { if (draw_pixel) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, cx, cy, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1, 1) : xga->accel.frgd_color; - dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1, 0); + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, cx, cy, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { ROP(1, dest_dat, src_dat); @@ -1330,8 +1334,8 @@ xga_line_draw_write(svga_t *svga) while (y >= 0) { if (xga->accel.command & 0xc0) { if ((dx >= xga->accel.mask_map_origin_x_off) && (dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (dy >= xga->accel.mask_map_origin_y_off) && (dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1, 1) : xga->accel.frgd_color; - dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1, 0); + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; @@ -1346,8 +1350,8 @@ xga_line_draw_write(svga_t *svga) } } } else { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1, 1) : xga->accel.frgd_color; - dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1, 0); + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.src_map_x & 0xfff, xga->accel.src_map_y & 0xfff, xga->accel.src_map, srcbase, xga->accel.px_map_width[xga->accel.src_map] + 1) : xga->accel.frgd_color; + dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, xga->accel.px_map_width[xga->accel.dst_map] + 1); if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; @@ -1465,7 +1469,7 @@ xga_bitblt(svga_t *svga) else { if ((dstwidth == (xga->h_disp - 1)) && (srcwidth == 1)) { if ((xga->accel.dst_map == 1) && (xga->accel.src_map == 2)) { - if ((xga->accel.px_map_format[xga->accel.dst_map] >= 0x0b) && (xga->accel.px_map_format[xga->accel.src_map] >= 0x0b)) + if ((xga->accel.px_map_format[xga->accel.dst_map] >= 0x0a) && (xga->accel.px_map_format[xga->accel.src_map] >= 0x0a)) xga->accel.pattern = 1; } } @@ -1486,8 +1490,8 @@ xga_bitblt(svga_t *svga) while (xga->accel.y >= 0) { if (xga->accel.command & 0xc0) { if ((dx >= xga->accel.mask_map_origin_x_off) && (dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (dy >= xga->accel.mask_map_origin_y_off) && (dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1, 1) : frgdcol; - dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dstwidth + 1, 0); + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : frgdcol; + dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dstwidth + 1); if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); @@ -1497,8 +1501,8 @@ xga_bitblt(svga_t *svga) } } else { if ((dx >= 0) && (dx <= dstwidth) && (dy >= 0) && (dy <= dstheight)) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1, 1) : frgdcol; - dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dstwidth + 1, 0); + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : frgdcol; + dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dstwidth + 1); if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); @@ -1549,12 +1553,12 @@ xga_bitblt(svga_t *svga) if (dstwidth == (xga->h_disp - 1)) { if (srcwidth == (xga->h_disp - 1)) { if ((xga->accel.src_map == 1) && (xga->accel.dst_map == 1) && (xga->accel.pat_src == 2)) { - if ((xga->accel.px_map_format[xga->accel.dst_map] >= 0x0b) && (xga->accel.px <= 7) && (xga->accel.py <= 3)) + if ((xga->accel.px_map_format[xga->accel.dst_map] >= 0x0a) && (xga->accel.px <= 7) && (xga->accel.py <= 3)) xga->accel.pattern = 1; } } else { if (!xga->accel.src_map && (xga->accel.dst_map == 1) && (xga->accel.pat_src == 2)) { - if ((xga->accel.px_map_format[xga->accel.dst_map] >= 0x0b) && (xga->accel.px <= 7) && (xga->accel.py <= 3)) { + if ((xga->accel.px_map_format[xga->accel.dst_map] >= 0x0a) && (xga->accel.px <= 7) && (xga->accel.py <= 3)) { if ((patwidth >= 7) && ((xga->accel.command & 0xc0) == 0x40)) xga->accel.pattern = 0; else @@ -1585,15 +1589,15 @@ xga_bitblt(svga_t *svga) if ((((xga->accel.command >> 24) & 0x0f) == 0x0a) && ((xga->accel.bkgd_mix & 0x1f) == 5)) { while (xga->accel.y >= 0) { - mix = xga_accel_read_pattern_map_pixel(svga, xga->accel.px, xga->accel.py, xga->accel.pat_src, patbase, patwidth + 1); + mix = xga_accel_read_pattern_map_pixel(svga, xga->accel.px, xga->accel.py, patbase, patwidth + 1); if (mix) xga->accel.filling = !xga->accel.filling; if (xga->accel.command & 0xc0) { if ((dx >= xga->accel.mask_map_origin_x_off) && (dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (dy >= xga->accel.mask_map_origin_y_off) && (dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1, 1) : frgdcol; + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : frgdcol; if (xga->accel.filling) { - dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, 1024, 0); + dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, 1024); if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); @@ -1605,9 +1609,9 @@ xga_bitblt(svga_t *svga) } } else { if ((dx >= 0) && (dx <= dstwidth) && (dy >= 0) && (dy <= dstheight)) { - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1, 1) : frgdcol; + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : frgdcol; if (xga->accel.filling) { - dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dstwidth + 1, 0); + dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dstwidth + 1); if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(1, dest_dat, src_dat); @@ -1647,16 +1651,16 @@ xga_bitblt(svga_t *svga) } } else { while (xga->accel.y >= 0) { - mix = xga_accel_read_pattern_map_pixel(svga, xga->accel.px, xga->accel.py, xga->accel.pat_src, patbase, patwidth + 1); + mix = xga_accel_read_pattern_map_pixel(svga, xga->accel.px, xga->accel.py, patbase, patwidth + 1); if (xga->accel.command & 0xc0) { if ((dx >= xga->accel.mask_map_origin_x_off) && (dx <= ((xga->accel.px_map_width[0] & 0xfff) + xga->accel.mask_map_origin_x_off)) && (dy >= xga->accel.mask_map_origin_y_off) && (dy <= ((xga->accel.px_map_height[0] & 0xfff) + xga->accel.mask_map_origin_y_off))) { if (mix) - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1, 1) : frgdcol; + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : frgdcol; else - src_dat = (((xga->accel.command >> 30) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1, 1) : bkgdcol; + src_dat = (((xga->accel.command >> 30) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : bkgdcol; - dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dstwidth + 1, 0); + dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dstwidth + 1); if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(mix, dest_dat, src_dat); @@ -1667,11 +1671,11 @@ xga_bitblt(svga_t *svga) } else { if ((dx >= 0) && (dx <= dstwidth) && (dy >= 0) && (dy <= dstheight)) { if (mix) - src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1, 1) : frgdcol; + src_dat = (((xga->accel.command >> 28) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : frgdcol; else - src_dat = (((xga->accel.command >> 30) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1, 1) : bkgdcol; + src_dat = (((xga->accel.command >> 30) & 3) == 2) ? xga_accel_read_map_pixel(svga, xga->accel.sx, xga->accel.sy, xga->accel.src_map, srcbase, srcwidth + 1) : bkgdcol; - dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dstwidth + 1, 0); + dest_dat = xga_accel_read_map_pixel(svga, dx, dy, xga->accel.dst_map, dstbase, dstwidth + 1); if ((xga->accel.cc_cond == 4) || ((xga->accel.cc_cond == 1) && (dest_dat > color_cmp)) || ((xga->accel.cc_cond == 2) && (dest_dat == color_cmp)) || ((xga->accel.cc_cond == 3) && (dest_dat < color_cmp)) || ((xga->accel.cc_cond == 5) && (dest_dat >= color_cmp)) || ((xga->accel.cc_cond == 6) && (dest_dat != color_cmp)) || ((xga->accel.cc_cond == 7) && (dest_dat <= color_cmp))) { old_dest_dat = dest_dat; ROP(mix, dest_dat, src_dat); @@ -1800,6 +1804,10 @@ xga_mem_write(uint32_t addr, uint32_t val, xga_t *xga, svga_t *svga, int len) case 0x1c: xga->accel.px_map_format[xga->accel.px_map_idx] = val; + if (val & 0x08) + xga_log("Big Endian Pixel Format=%d, AccessMode=%x.\n", xga->accel.px_map_idx, xga->access_mode & 0x08); + else + xga_log("Little Endian Pixel Format=%d, AccessMode=%x.\n", xga->accel.px_map_idx, xga->access_mode & 0x08); break; case 0x20: @@ -2155,6 +2163,7 @@ exec_command: xga->accel.pat_src = ((xga->accel.command >> 12) & 0x0f); xga->accel.dst_map = ((xga->accel.command >> 16) & 0x0f); xga->accel.src_map = ((xga->accel.command >> 20) & 0x0f); + xga_log("PATMAP=%x, DSTMAP=%x, SRCMAP=%x.\n", xga->accel.px_map_format[xga->accel.pat_src], xga->accel.px_map_format[xga->accel.dst_map], xga->accel.px_map_format[xga->accel.src_map]); #ifdef ENABLE_XGA_LOG if (xga->accel.pat_src) @@ -2531,29 +2540,21 @@ xga_render_4bpp(svga_t *svga) xga->lastline_draw = xga->displine; - for (int x = 0; x <= xga->h_disp; x += 16) { + for (int x = 0; x <= xga->h_disp; x += 8) { dat = *(uint32_t *) (&xga->vram[xga->ma & xga->vram_mask]); p[0] = xga->pallook[dat & 0x0f]; - p[1] = xga->pallook[(dat >> 4) & 0x0f]; - p[2] = xga->pallook[(dat >> 8) & 0x0f]; - p[3] = xga->pallook[(dat >> 12) & 0x0f]; - p[4] = xga->pallook[(dat >> 16) & 0x0f]; - p[5] = xga->pallook[(dat >> 20) & 0x0f]; - p[6] = xga->pallook[(dat >> 24) & 0x0f]; - p[7] = xga->pallook[(dat >> 28) & 0x0f]; + p[1] = xga->pallook[(dat >> 8) & 0x0f]; + p[2] = xga->pallook[(dat >> 16) & 0x0f]; + p[3] = xga->pallook[(dat >> 24) & 0x0f]; - dat = *(uint32_t *) (&xga->vram[(xga->ma + 4) & xga->vram_mask]); - p[8] = xga->pallook[dat & 0x0f]; - p[9] = xga->pallook[(dat >> 4) & 0x0f]; - p[10] = xga->pallook[(dat >> 8) & 0x0f]; - p[11] = xga->pallook[(dat >> 12) & 0x0f]; - p[12] = xga->pallook[(dat >> 16) & 0x0f]; - p[13] = xga->pallook[(dat >> 20) & 0x0f]; - p[14] = xga->pallook[(dat >> 24) & 0x0f]; - p[15] = xga->pallook[(dat >> 28) & 0x0f]; + dat = *(uint32_t *) (&xga->vram[(xga->ma + 2) & xga->vram_mask]); + p[4] = xga->pallook[dat & 0x0f]; + p[5] = xga->pallook[(dat >> 8) & 0x0f]; + p[6] = xga->pallook[(dat >> 16) & 0x0f]; + p[7] = xga->pallook[(dat >> 24) & 0x0f]; xga->ma += 8; - p += 16; + p += 8; } xga->ma &= xga->vram_mask; } @@ -2643,7 +2644,8 @@ xga_write_test(uint32_t addr, uint8_t val, void *priv) xga_t *xga = (xga_t *) svga->xga; if (xga_active && xga) { - if (((xga->op_mode & 7) >= 1) && (xga->aperture_cntl >= 1)) { + if (((xga->op_mode & 7) >= 1) && xga->aperture_cntl) { + xga_log("WriteAddr=%05x.\n", addr); if (val == 0xa5) { /*Memory size test of XGA*/ xga->test = val; if (addr == 0xa0001) @@ -2653,28 +2655,39 @@ xga_write_test(uint32_t addr, uint8_t val, void *priv) xga->on = 0; vga_on = 1; - xga->disp_cntl_2 = 0; xga_log("XGA test1 addr=%05x, test=%02x.\n", addr, xga->a5_test); } else if (val == 0x5a) { xga->test = val; xga->on = 0; vga_on = 1; - xga->disp_cntl_2 = 0; xga_log("XGA test2 addr = %05x.\n", addr); } else if ((addr == 0xa0000) || (addr == 0xa0010)) { addr += xga->write_bank; xga->vram[addr & xga->vram_mask] = val; xga_log("XGA Linear endian reverse write, val = %02x, addr = %05x, banked mask = %04x, a5test=%d.\n", val, addr, svga->banked_mask, xga->a5_test); - if (!xga->a5_test) - xga->linear_endian_reverse = 1; } - } else { + } else if (xga->aperture_cntl) { xga->on = 0; vga_on = 1; } } } +static void +xga_write_banked(uint32_t addr, uint8_t val, void *priv) +{ + svga_t *svga = (svga_t *) priv; + xga_t *xga = (xga_t *) svga->xga; + + if (xga->access_mode & 0x08) { + if ((xga->access_mode & 0x07) == 0x04) + addr ^= 1; + } + + xga->changedvram[(addr & xga->vram_mask) >> 12] = svga->monitor->mon_changeframecount; + xga->vram[addr & xga->vram_mask] = val; +} + static void xga_write(uint32_t addr, uint8_t val, void *priv) { @@ -2689,33 +2702,45 @@ xga_write(uint32_t addr, uint8_t val, void *priv) cycles -= svga->monitor->mon_video_timing_write_b; - if (xga->access_mode & 8) { - if ((xga->access_mode & 7) == 4) - addr ^= 1; - } - - xga->changedvram[(addr & xga->vram_mask) >> 12] = svga->monitor->mon_changeframecount; - xga->vram[addr & xga->vram_mask] = val; + xga_write_banked(addr, val, svga); } static void xga_writew(uint32_t addr, uint16_t val, void *priv) { - svga_t *svga = (svga_t *) priv; + svga_t *svga = (svga_t *) priv; + xga_t *xga = (xga_t *) svga->xga; - xga_write(addr, val & 0xff, svga); - xga_write(addr + 1, val >> 8, svga); + addr &= xga->banked_mask; + addr += xga->write_bank; + + if (addr >= xga->vram_size) + return; + + cycles -= svga->monitor->mon_video_timing_write_w; + + xga_write_banked(addr, val & 0xff, svga); + xga_write_banked(addr + 1, val >> 8, svga); } static void xga_writel(uint32_t addr, uint32_t val, void *priv) { - svga_t *svga = (svga_t *) priv; + svga_t *svga = (svga_t *) priv; + xga_t *xga = (xga_t *) svga->xga; - xga_write(addr, val & 0xff, svga); - xga_write(addr + 1, (val >> 8) & 0xff, svga); - xga_write(addr + 2, (val >> 16) & 0xff, svga); - xga_write(addr + 3, (val >> 24) & 0xff, svga); + addr &= xga->banked_mask; + addr += xga->write_bank; + + if (addr >= xga->vram_size) + return; + + cycles -= svga->monitor->mon_video_timing_write_l; + + xga_write_banked(addr, val & 0xff, svga); + xga_write_banked(addr + 1, val >> 8, svga); + xga_write_banked(addr + 2, val >> 16, svga); + xga_write_banked(addr + 3, val >> 24, svga); } uint8_t @@ -2726,7 +2751,7 @@ xga_read_test(uint32_t addr, void *priv) uint8_t ret = 0x00; if (xga_active && xga) { - if (((xga->op_mode & 7) >= 1) && (xga->aperture_cntl >= 1)) { + if (((xga->op_mode & 7) >= 1) && xga->aperture_cntl) { if (xga->test == 0xa5) { /*Memory size test of XGA*/ if (addr == 0xa0001) { ret = xga->test; @@ -2753,7 +2778,7 @@ xga_read_test(uint32_t addr, void *priv) addr += xga->read_bank; return xga->vram[addr & xga->vram_mask]; } - } else { + } else if (xga->aperture_cntl) { xga->on = 0; vga_on = 1; } @@ -2762,12 +2787,29 @@ xga_read_test(uint32_t addr, void *priv) } static uint8_t -xga_read(uint32_t addr, void *priv) +xga_read_banked(uint32_t addr, void *priv) { svga_t *svga = (svga_t *) priv; xga_t *xga = (xga_t *) svga->xga; uint8_t ret = 0xff; + if (xga->access_mode & 0x08) { + if ((xga->access_mode & 0x07) == 0x04) + addr ^= 1; + } + + ret = xga->vram[addr & xga->vram_mask]; + + return ret; +} + +static uint8_t +xga_read(uint32_t addr, void *priv) +{ + svga_t *svga = (svga_t *) priv; + xga_t *xga = (xga_t *) svga->xga; + uint8_t ret = 0xff; + addr &= xga->banked_mask; addr += xga->read_bank; @@ -2778,13 +2820,7 @@ xga_read(uint32_t addr, void *priv) cycles -= svga->monitor->mon_video_timing_read_b; - if (xga->access_mode & 8) { - if ((xga->access_mode & 7) == 4) - addr ^= 1; - } - - ret = xga->vram[addr & xga->vram_mask]; - + ret = xga_read_banked(addr, svga); return ret; } @@ -2792,11 +2828,21 @@ static uint16_t xga_readw(uint32_t addr, void *priv) { svga_t *svga = (svga_t *) priv; + xga_t *xga = (xga_t *) svga->xga; uint16_t ret = 0xffff; - ret = xga_read(addr, svga); - ret |= (xga_read(addr + 1, svga) << 8); + addr &= xga->banked_mask; + addr += xga->read_bank; + if (addr >= xga->vram_size) { + xga_log("Over Read ADDR=%x.\n", addr); + return ret; + } + + cycles -= svga->monitor->mon_video_timing_read_w; + + ret = xga_read_banked(addr, svga); + ret |= (xga_read_banked(addr + 1, svga) << 8); return ret; } @@ -2804,13 +2850,23 @@ static uint32_t xga_readl(uint32_t addr, void *priv) { svga_t *svga = (svga_t *) priv; + xga_t *xga = (xga_t *) svga->xga; uint32_t ret = 0xffffffff; - ret = xga_read(addr, svga); - ret |= (xga_read(addr + 1, svga) << 8); - ret |= (xga_read(addr + 2, svga) << 16); - ret |= (xga_read(addr + 3, svga) << 24); + addr &= xga->banked_mask; + addr += xga->read_bank; + if (addr >= xga->vram_size) { + xga_log("Over Read ADDR=%x.\n", addr); + return ret; + } + + cycles -= svga->monitor->mon_video_timing_read_l; + + ret = xga_read_banked(addr, svga); + ret |= (xga_read_banked(addr + 1, svga) << 8); + ret |= (xga_read_banked(addr + 2, svga) << 16); + ret |= (xga_read_banked(addr + 3, svga) << 24); return ret; } @@ -2820,6 +2876,7 @@ xga_write_linear(uint32_t addr, uint8_t val, void *priv) svga_t *svga = (svga_t *) priv; xga_t *xga = (xga_t *) svga->xga; + xga_log("WrtieLL XGA=%d.\n", xga->on); if (!xga->on) { svga_write_linear(addr, val, svga); return; @@ -2834,12 +2891,9 @@ xga_write_linear(uint32_t addr, uint8_t val, void *priv) cycles -= svga->monitor->mon_video_timing_write_b; - if (xga->linear_endian_reverse) { - if ((xga->access_mode & 7) == 4) { - if ((xga->accel.px_map_format[xga->accel.dst_map] & 7) == 4) - addr ^= 1; - } else if (xga->access_mode & 8) { - if ((xga->accel.px_map_format[xga->accel.dst_map] & 7) == 4) + if (!(xga->access_mode & 0x08)) { + if ((xga->access_mode & 0x07) == 0x04) { + if ((xga->accel.px_map_format[xga->accel.dst_map] & 0x07) == 0x04) addr ^= 1; } } @@ -2899,12 +2953,9 @@ xga_read_linear(uint32_t addr, void *priv) cycles -= svga->monitor->mon_video_timing_read_b; - if (xga->linear_endian_reverse) { - if ((xga->access_mode & 7) == 4) { - if ((xga->accel.px_map_format[xga->accel.dst_map] & 7) == 4) - addr ^= 1; - } else if (xga->access_mode & 8) { - if ((xga->accel.px_map_format[xga->accel.dst_map] & 7) == 4) + if (!(xga->access_mode & 0x08)) { + if ((xga->access_mode & 0x07) == 0x04) { + if ((xga->accel.px_map_format[xga->accel.dst_map] & 0x07) == 0x04) addr ^= 1; } } @@ -3145,11 +3196,12 @@ xga_mca_write(int port, uint8_t val, void *priv) mem_mapping_disable(&xga->memio_mapping); xga->on = 0; vga_on = 1; - xga->linear_endian_reverse = 0; xga->a5_test = 0; /* Save the MCA register value. */ xga->pos_regs[port & 7] = val; + if (!(xga->pos_regs[4] & 1) && (mem_size >= 15360)) /*MCA 4MB addressing on systems with more than 16MB of memory*/ + xga->pos_regs[4] |= 1; if (xga->pos_regs[2] & 1) { xga->instance = (xga->pos_regs[2] & 0x0e) >> 1; @@ -3184,15 +3236,10 @@ static void xga_mca_reset(void *priv) { svga_t *svga = (svga_t *) priv; - xga_t *xga = (xga_t *) svga->xga; - mem_mapping_disable(&xga->memio_mapping); - xga->on = 0; - vga_on = 1; xga_log("MCA Reset.\n"); + mem_mapping_set_handler(&svga->mapping, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel); xga_mca_write(0x102, 0, svga); - xga->linear_endian_reverse = 0; - xga->a5_test = 0; } static void @@ -3207,8 +3254,8 @@ xga_reset(void *priv) xga->on = 0; vga_on = 1; - xga->linear_endian_reverse = 0; xga->a5_test = 0; + mem_mapping_set_handler(&svga->mapping, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel); } static uint8_t @@ -3345,8 +3392,11 @@ xga_pos_out(uint16_t addr, uint8_t val, void *priv) break; case 0x0104: xga_log("104Write=%02x.\n", val); - if ((xga->pos_idx & 3) == 0) + if ((xga->pos_idx & 3) == 0) { xga->pos_regs[4] = val; + if (!(xga->pos_regs[4] & 0x01) && (mem_size >= 15360)) /*4MB addressing on systems with more than 15MB of memory*/ + xga->pos_regs[4] |= 0x01; + } break; case 0x0105: xga_log("105Write=%02x.\n", val); @@ -3405,7 +3455,6 @@ xga_init(const device_t *info) xga->on = 0; xga->hwcursor.cur_xsize = 64; xga->hwcursor.cur_ysize = 64; - xga->linear_endian_reverse = 0; xga->a5_test = 0; if (info->flags & DEVICE_MCA) { @@ -3431,7 +3480,7 @@ xga_init(const device_t *info) xga->rom_addr = 0xc0000 + (((xga->pos_regs[2] & 0xf0) >> 4) * 0x2000); xga->instance = (xga->pos_regs[2] & 0x0e) >> 1; xga->pos_regs[2] |= 0x01; - if (mem_size >= 16384) { + if (mem_size >= 15360) { xga->pos_regs[4] |= 0x01; xga->pos_regs[5] = 0; } else { @@ -3450,9 +3499,6 @@ xga_init(const device_t *info) } } - mem_mapping_add(&xga->video_mapping, 0, 0, xga_read, xga_readw, xga_readl, - xga_write, xga_writew, xga_writel, - NULL, MEM_MAPPING_EXTERNAL, svga); mem_mapping_add(&xga->linear_mapping, 0, 0, xga_read_linear, xga_readw_linear, xga_readl_linear, xga_write_linear, xga_writew_linear, xga_writel_linear, NULL, MEM_MAPPING_EXTERNAL, svga); From f280a0ee6e3cd5909f3e031a5138af7e1918e0c0 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sat, 26 Oct 2024 22:58:38 +0200 Subject: [PATCH 02/26] 3M Microtouch: #include to fix the warnings. --- src/device/mouse_microtouch_touchscreen.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/device/mouse_microtouch_touchscreen.c b/src/device/mouse_microtouch_touchscreen.c index 1100937ef..442b25b91 100644 --- a/src/device/mouse_microtouch_touchscreen.c +++ b/src/device/mouse_microtouch_touchscreen.c @@ -28,6 +28,7 @@ #include #include #include +#include #include <86box/86box.h> #include <86box/device.h> #include <86box/timer.h> From 9109a9d66e50272a8b43b3b258a8963be3c6f325 Mon Sep 17 00:00:00 2001 From: altiereslima Date: Sat, 26 Oct 2024 20:55:26 -0300 Subject: [PATCH 03/26] Update pt-BR.po --- src/qt/languages/pt-BR.po | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/src/qt/languages/pt-BR.po b/src/qt/languages/pt-BR.po index 0b26d5ce5..a9fa7e19b 100644 --- a/src/qt/languages/pt-BR.po +++ b/src/qt/languages/pt-BR.po @@ -625,7 +625,7 @@ msgid "Cassette" msgstr "Cassete" msgid "Vision Systems LBA Enhancer" -msgstr "Aprimorador de Sistema Vision para LBA" +msgstr "Aprimorador LBA Vision Sistems" msgid "Hard disks:" msgstr "Discos rĂ­gidos:" @@ -981,6 +981,12 @@ msgstr "NĂ£o reiniciar" msgid "CD-ROM images" msgstr "Imagens de CD-ROM" +msgid "Host CD/DVD Drive (%1)" +msgstr "Unidade de CD/DVD do anfitriĂ£o (%1)" + +msgid "CD-ROM images" +msgstr "Imagens de CD-ROM" + msgid "%1 Device Configuration" msgstr "ConfiguraĂ§Ă£o do dispositivo %1" From f32365395764cde34914022bdbe1d61a6fe4c365 Mon Sep 17 00:00:00 2001 From: altiereslima Date: Sun, 27 Oct 2024 00:00:28 -0300 Subject: [PATCH 04/26] ops --- src/qt/languages/pt-BR.po | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/qt/languages/pt-BR.po b/src/qt/languages/pt-BR.po index a9fa7e19b..1062d44a9 100644 --- a/src/qt/languages/pt-BR.po +++ b/src/qt/languages/pt-BR.po @@ -984,9 +984,6 @@ msgstr "Imagens de CD-ROM" msgid "Host CD/DVD Drive (%1)" msgstr "Unidade de CD/DVD do anfitriĂ£o (%1)" -msgid "CD-ROM images" -msgstr "Imagens de CD-ROM" - msgid "%1 Device Configuration" msgstr "ConfiguraĂ§Ă£o do dispositivo %1" From 6e212fbd957054b4d12b7c1895b91dae0a8130dd Mon Sep 17 00:00:00 2001 From: altiereslima Date: Sun, 27 Oct 2024 00:07:52 -0300 Subject: [PATCH 05/26] Update pt-BR.po --- src/qt/languages/pt-BR.po | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/qt/languages/pt-BR.po b/src/qt/languages/pt-BR.po index 1062d44a9..0cadad77c 100644 --- a/src/qt/languages/pt-BR.po +++ b/src/qt/languages/pt-BR.po @@ -13,7 +13,7 @@ msgid "&Keyboard requires capture" msgstr "&Teclado requer captura" msgid "&Right CTRL is left ALT" -msgstr "CTRL &direito Ă© o ALT esquerdo" +msgstr "&CTRL direito Ă© o ALT esquerdo" msgid "&Hard Reset..." msgstr "&ReinicializaĂ§Ă£o completa..." @@ -163,7 +163,7 @@ msgid "Apply fullscreen stretch mode when maximized" msgstr "Aplicar modo de ampliaĂ§Ă£o em tela cheia quando maximizado" msgid "E&GA/(S)VGA settings" -msgstr "Configurações E&GA/(S)VGA" +msgstr "Configurações de E&GA/(S)VGA" msgid "&Inverted VGA monitor" msgstr "Monitor VGA &invertido" @@ -172,7 +172,7 @@ msgid "VGA screen &type" msgstr "&Tipo de tela VGA" msgid "RGB &Color" -msgstr "&Cores RGB" +msgstr "&Cor RGB" msgid "&RGB Grayscale" msgstr "Tons de cinza &RGB" @@ -337,7 +337,7 @@ msgid "Settings" msgstr "Configurações" msgid "Specify Main Window Dimensions" -msgstr "Especifique as dimensões da janela principal" +msgstr "Especificar dimensões da janela principal" msgid "OK" msgstr "OK" @@ -1282,4 +1282,4 @@ msgid "WinBox is no longer supported" msgstr "O WinBox nĂ£o Ă© mais suportado" msgid "Development of the WinBox manager stopped in 2022 due to a lack of maintainers. As we direct our efforts towards making 86Box even better, we have made the decision to no longer support WinBox as a manager.\n\nNo further updates will be provided through WinBox, and you may encounter incorrect behavior should you continue using it with newer versions of 86Box. Any bug reports related to WinBox behavior will be closed as invalid.\n\nGo to 86box.net for a list of other managers you can use." -msgstr "O desenvolvimento do gerenciador WinBox foi interrompido em 2022 devido Ă  falta de mantenedores. Ă€ medida que direcionamos nossos esforços para tornar o 86Box ainda melhor, tomamos a decisĂ£o de nĂ£o oferecer mais suporte ao WinBox como gerenciador.\n\nNĂ£o serĂ£o mais fornecidas atualizações atravĂ©s do WinBox, e vocĂª poderĂ¡ encontrar comportamentos incorretos caso continue a usĂ¡-lo com versões mais recentes do 86Box. Quaisquer relatĂ³rios de bugs relacionados ao comportamento do WinBox serĂ£o fechados como invĂ¡lidos.\n\nAcesse 86box.net para obter uma lista de outros gerenciadores que vocĂª pode usar." +msgstr "O desenvolvimento do gerenciador WinBox foi interrompido em 2022 devido Ă  falta de mantenedores. Ă€ medida que direcionamos nossos esforços para tornar o 86Box ainda melhor, tomamos a decisĂ£o de nĂ£o oferecer mais suporte ao WinBox como gerenciador.\n\nNĂ£o serĂ£o mais fornecidas atualizações atravĂ©s do WinBox, e vocĂª poderĂ¡ encontrar comportamentos incorretos caso continue a usĂ¡-lo com versões mais recentes do 86Box. Quaisquer relatĂ³rios de erros relacionados ao comportamento do WinBox serĂ£o fechados como invĂ¡lidos.\n\nAcesse 86box.net para obter uma lista de outros gerenciadores que vocĂª pode usar." From 31beadd103e4dde96d2b6977271fd70cd420a521 Mon Sep 17 00:00:00 2001 From: OBattler Date: Sun, 27 Oct 2024 16:55:05 +0100 Subject: [PATCH 06/26] ISA PnP: Return bit 0 of status register set between Wake[0] and Set CSN, fixes Creative ISA PnP sound card drivers installer for Windows 3.1 freezing. --- src/device/isapnp.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/src/device/isapnp.c b/src/device/isapnp.c index da9e623c1..0139eeb23 100644 --- a/src/device/isapnp.c +++ b/src/device/isapnp.c @@ -110,6 +110,7 @@ typedef struct _isapnp_card_ { } isapnp_card_t; typedef struct { + uint8_t in_isolation; uint8_t reg; uint8_t key_pos : 5; uint16_t read_data_addr; @@ -313,6 +314,8 @@ isapnp_read_common(isapnp_t *dev, isapnp_card_t *card, isapnp_device_t *ld, uint case 0x05: /* Status */ ret = 0x00; + if (dev->in_isolation) + ret = 0x01; CHECK_CURRENT_CARD(); isapnp_log("ISAPnP: Query status for CSN %02X\n", card->csn); @@ -485,15 +488,16 @@ isapnp_write_common(isapnp_t *dev, isapnp_card_t *card, isapnp_device_t *ld, uin case 0x03: /* Wake[CSN] */ isapnp_log("ISAPnP: Wake[%02X]\n", val); card = dev->first_card; + if (val == 0) + dev->in_isolation |= 1; while (card) { if (card->csn == val) { card->rom_pos = 0; card->id_checksum = isapnp_init_key[0]; if (card->state == PNP_STATE_SLEEP) card->state = (val == 0) ? PNP_STATE_ISOLATION : PNP_STATE_CONFIG; - } else { + } else card->state = PNP_STATE_SLEEP; - } card = card->next; } @@ -505,6 +509,7 @@ isapnp_write_common(isapnp_t *dev, isapnp_card_t *card, isapnp_device_t *ld, uin isapnp_set_csn(dev->isolated_card, val); dev->isolated_card->state = PNP_STATE_CONFIG; dev->isolated_card = NULL; + dev->in_isolation = 0; } else { isapnp_log("ISAPnP: Set CSN %02X but no card is isolated\n", val); } From aeaaa09b16fb47c9d805de26bd3ac368a6c9c5ae Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Sun, 27 Oct 2024 13:17:55 -0300 Subject: [PATCH 07/26] CD-ROM: Report image backend I/O errors as media CRC errors to the drive --- src/cdrom/cdrom.c | 73 ++++++++++++++++++++------------- src/cdrom/cdrom_image_backend.c | 10 ++--- src/cdrom/cdrom_image_viso.c | 7 +++- src/cdrom/cdrom_mitsumi.c | 2 +- src/include/86box/scsi_device.h | 3 ++ src/qt/dummy_cdrom_ioctl.c | 2 +- src/qt/win_cdrom_ioctl.c | 4 +- src/scsi/scsi_cdrom.c | 13 ++++++ 8 files changed, 75 insertions(+), 39 deletions(-) diff --git a/src/cdrom/cdrom.c b/src/cdrom/cdrom.c index 41cc1db98..4dc03885e 100644 --- a/src/cdrom/cdrom.c +++ b/src/cdrom/cdrom.c @@ -1520,13 +1520,13 @@ track_type_is_valid(UNUSED(uint8_t id), int type, int flags, int audio, int mode return 1; } -static void +static int read_sector_to_buffer(cdrom_t *dev, uint8_t *rbuf, uint32_t msf, uint32_t lba, int mode2, int len) { uint8_t *bb = rbuf; const int offset = (!!(mode2 & 0x03)) ? 24 : 16; - dev->ops->read_sector(dev, CD_READ_DATA, rbuf + offset, lba); + int ret = dev->ops->read_sector(dev, CD_READ_DATA, rbuf + offset, lba); /* Sync bytes */ bb[0] = 0; @@ -1546,25 +1546,30 @@ read_sector_to_buffer(cdrom_t *dev, uint8_t *rbuf, uint32_t msf, uint32_t lba, i memset(bb, 0, 280); else if (!mode2) memset(bb, 0, 288); + + return ret; } -static void +static int read_audio(cdrom_t *dev, uint32_t lba, uint8_t *b) { - dev->ops->read_sector(dev, CD_READ_RAW, raw_buffer, lba); + int ret = dev->ops->read_sector(dev, CD_READ_RAW, raw_buffer, lba); memcpy(b, raw_buffer, 2352); cdrom_sector_size = 2352; + + return ret; } -static void +static int read_mode1(cdrom_t *dev, int cdrom_sector_flags, uint32_t lba, uint32_t msf, int mode2, uint8_t *b) { + int ret; if ((dev->cd_status == CD_STATUS_DATA_ONLY) || (dev->ops->sector_size(dev, lba) == 2048)) - read_sector_to_buffer(dev, raw_buffer, msf, lba, mode2, 2048); + ret = read_sector_to_buffer(dev, raw_buffer, msf, lba, mode2, 2048); else - dev->ops->read_sector(dev, CD_READ_RAW, raw_buffer, lba); + ret = dev->ops->read_sector(dev, CD_READ_RAW, raw_buffer, lba); cdrom_sector_size = 0; @@ -1610,15 +1615,18 @@ read_mode1(cdrom_t *dev, int cdrom_sector_flags, uint32_t lba, uint32_t msf, int cdrom_sector_size += 288; b += 288; } + + return ret; } -static void +static int read_mode2_non_xa(cdrom_t *dev, int cdrom_sector_flags, uint32_t lba, uint32_t msf, int mode2, uint8_t *b) { + int ret; if ((dev->cd_status == CD_STATUS_DATA_ONLY) || (dev->ops->sector_size(dev, lba) == 2336)) - read_sector_to_buffer(dev, raw_buffer, msf, lba, mode2, 2336); + ret = read_sector_to_buffer(dev, raw_buffer, msf, lba, mode2, 2336); else - dev->ops->read_sector(dev, CD_READ_RAW, raw_buffer, lba); + ret = dev->ops->read_sector(dev, CD_READ_RAW, raw_buffer, lba); cdrom_sector_size = 0; @@ -1654,15 +1662,18 @@ read_mode2_non_xa(cdrom_t *dev, int cdrom_sector_flags, uint32_t lba, uint32_t m cdrom_sector_size += 2336; b += 2336; } + + return ret; } -static void +static int read_mode2_xa_form1(cdrom_t *dev, int cdrom_sector_flags, uint32_t lba, uint32_t msf, int mode2, uint8_t *b) { + int ret; if ((dev->cd_status == CD_STATUS_DATA_ONLY) || (dev->ops->sector_size(dev, lba) == 2048)) - read_sector_to_buffer(dev, raw_buffer, msf, lba, mode2, 2048); + ret = read_sector_to_buffer(dev, raw_buffer, msf, lba, mode2, 2048); else - dev->ops->read_sector(dev, CD_READ_RAW, raw_buffer, lba); + ret = dev->ops->read_sector(dev, CD_READ_RAW, raw_buffer, lba); cdrom_sector_size = 0; @@ -1705,15 +1716,18 @@ read_mode2_xa_form1(cdrom_t *dev, int cdrom_sector_flags, uint32_t lba, uint32_t cdrom_sector_size += 280; b += 280; } + + return ret; } -static void +static int read_mode2_xa_form2(cdrom_t *dev, int cdrom_sector_flags, uint32_t lba, uint32_t msf, int mode2, uint8_t *b) { + int ret; if ((dev->cd_status == CD_STATUS_DATA_ONLY) || (dev->ops->sector_size(dev, lba) == 2324)) - read_sector_to_buffer(dev, raw_buffer, msf, lba, mode2, 2324); + ret = read_sector_to_buffer(dev, raw_buffer, msf, lba, mode2, 2324); else - dev->ops->read_sector(dev, CD_READ_RAW, raw_buffer, lba); + ret = dev->ops->read_sector(dev, CD_READ_RAW, raw_buffer, lba); cdrom_sector_size = 0; @@ -1748,6 +1762,8 @@ read_mode2_xa_form2(cdrom_t *dev, int cdrom_sector_flags, uint32_t lba, uint32_t cdrom_sector_size += 2328; b += 2328; } + + return ret; } int @@ -1763,6 +1779,7 @@ cdrom_readsector_raw(cdrom_t *dev, uint8_t *buffer, int sector, int ismsf, int c int m; int s; int f; + int ret = 0; if (dev->cd_status == CD_STATUS_EMPTY) return 0; @@ -1827,21 +1844,21 @@ cdrom_readsector_raw(cdrom_t *dev, uint8_t *buffer, int sector, int ismsf, int c return 0; } - read_audio(dev, lba, temp_b); + ret = read_audio(dev, lba, temp_b); } else if (cdrom_sector_type == 2) { if (audio || mode2) { cdrom_log("CD-ROM %i: [Mode 1] Attempting to read a sector of another type\n", dev->id); return 0; } - read_mode1(dev, cdrom_sector_flags, lba, msf, mode2, temp_b); + ret = read_mode1(dev, cdrom_sector_flags, lba, msf, mode2, temp_b); } else if (cdrom_sector_type == 3) { if (audio || !mode2 || (mode2 & 0x03)) { cdrom_log("CD-ROM %i: [Mode 2 Formless] Attempting to read a sector of another type\n", dev->id); return 0; } - read_mode2_non_xa(dev, cdrom_sector_flags, lba, msf, mode2, temp_b); + ret = read_mode2_non_xa(dev, cdrom_sector_flags, lba, msf, mode2, temp_b); } else if (cdrom_sector_type == 4) { if (audio || !mode2 || ((mode2 & 0x03) != 1)) { cdrom_log("CD-ROM %i: [XA Mode 2 Form 1] Attempting to read a sector of another type\n", dev->id); @@ -1855,7 +1872,7 @@ cdrom_readsector_raw(cdrom_t *dev, uint8_t *buffer, int sector, int ismsf, int c return 0; } - read_mode2_xa_form2(dev, cdrom_sector_flags, lba, msf, mode2, temp_b); + ret = read_mode2_xa_form2(dev, cdrom_sector_flags, lba, msf, mode2, temp_b); } else if (cdrom_sector_type == 8) { if (audio) { cdrom_log("CD-ROM %i: [Any Data] Attempting to read a data sector from an audio track\n", dev->id); @@ -1863,9 +1880,9 @@ cdrom_readsector_raw(cdrom_t *dev, uint8_t *buffer, int sector, int ismsf, int c } if (mode2 && ((mode2 & 0x03) == 1)) - read_mode2_xa_form1(dev, cdrom_sector_flags, lba, msf, mode2, temp_b); + ret = read_mode2_xa_form1(dev, cdrom_sector_flags, lba, msf, mode2, temp_b); else if (!mode2) - read_mode1(dev, cdrom_sector_flags, lba, msf, mode2, temp_b); + ret = read_mode1(dev, cdrom_sector_flags, lba, msf, mode2, temp_b); else { cdrom_log("CD-ROM %i: [Any Data] Attempting to read a data sector whose cooked size is not 2048 bytes\n", dev->id); return 0; @@ -1873,16 +1890,16 @@ cdrom_readsector_raw(cdrom_t *dev, uint8_t *buffer, int sector, int ismsf, int c } else { if (mode2) { if ((mode2 & 0x03) == 0x01) - read_mode2_xa_form1(dev, cdrom_sector_flags, lba, msf, mode2, temp_b); + ret = read_mode2_xa_form1(dev, cdrom_sector_flags, lba, msf, mode2, temp_b); else if ((mode2 & 0x03) == 0x02) - read_mode2_xa_form2(dev, cdrom_sector_flags, lba, msf, mode2, temp_b); + ret = read_mode2_xa_form2(dev, cdrom_sector_flags, lba, msf, mode2, temp_b); else - read_mode2_non_xa(dev, cdrom_sector_flags, lba, msf, mode2, temp_b); + ret = read_mode2_non_xa(dev, cdrom_sector_flags, lba, msf, mode2, temp_b); } else { if (audio) - read_audio(dev, lba, temp_b); + ret = read_audio(dev, lba, temp_b); else - read_mode1(dev, cdrom_sector_flags, lba, msf, mode2, temp_b); + ret = read_mode1(dev, cdrom_sector_flags, lba, msf, mode2, temp_b); } } @@ -1914,7 +1931,7 @@ cdrom_readsector_raw(cdrom_t *dev, uint8_t *buffer, int sector, int ismsf, int c *len = cdrom_sector_size; - return 1; + return ret; } /* Peform a master init on the entire module. */ diff --git a/src/cdrom/cdrom_image_backend.c b/src/cdrom/cdrom_image_backend.c index 7dcde1cdb..a1223bd17 100644 --- a/src/cdrom/cdrom_image_backend.c +++ b/src/cdrom/cdrom_image_backend.c @@ -181,13 +181,13 @@ bin_read(void *priv, uint8_t *buffer, uint64_t seek, size_t count) if (fseeko64(tf->fp, seek, SEEK_SET) == -1) { cdrom_image_backend_log("CDROM: binary_read failed during seek!\n"); - return 0; + return -1; } if (fread(buffer, count, 1, tf->fp) != 1) { cdrom_image_backend_log("CDROM: binary_read failed during read!\n"); - return 0; + return -1; } if (UNLIKELY(tf->motorola)) { @@ -502,8 +502,8 @@ cdi_read_sector(cd_img_t *cdi, uint8_t *buffer, int raw, uint32_t sector) if (raw && !track_is_raw) { memset(buffer, 0x00, 2448); const int ret = trk->file->read(trk->file, buffer + offset, seek, length); - if (!ret) - return 0; + if (ret <= 0) + return ret; /* Construct the rest of the raw sector. */ memset(buffer + 1, 0xff, 10); buffer += 12; @@ -534,7 +534,7 @@ cdi_read_sectors(cd_img_t *cdi, uint8_t *buffer, int raw, uint32_t sector, uint3 for (uint32_t i = 0; i < num; i++) { success = cdi_read_sector(cdi, &buf[i * sector_size], raw, sector + i); - if (!success) + if (success <= 0) break; /* Based on the DOSBox patch, but check all 8 bytes and makes sure it's not an audio track. */ diff --git a/src/cdrom/cdrom_image_viso.c b/src/cdrom/cdrom_image_viso.c index 90bd83cf7..edca09d91 100644 --- a/src/cdrom/cdrom_image_viso.c +++ b/src/cdrom/cdrom_image_viso.c @@ -716,8 +716,11 @@ viso_read(void *priv, uint8_t *buffer, uint64_t seek, size_t count) } /* Read data. */ - if (entry->file && (fseeko64(entry->file, seek - entry->data_offset, SEEK_SET) != -1)) - read = fread(buffer, 1, sector_remain, entry->file); + if (!entry->file || (fseeko64(entry->file, seek - entry->data_offset, SEEK_SET) == -1)) + return -1; + read = fread(buffer, 1, sector_remain, entry->file); + if (sector_remain && !read) + return -1; } /* Fill remainder with 00 bytes if needed. */ diff --git a/src/cdrom/cdrom_mitsumi.c b/src/cdrom/cdrom_mitsumi.c index 01a9cf047..0cebfe7f6 100644 --- a/src/cdrom/cdrom_mitsumi.c +++ b/src/cdrom/cdrom_mitsumi.c @@ -197,7 +197,7 @@ mitsumi_cdrom_read_sector(mcd_t *dev, int first) } cdrom_stop(&cdrom); ret = cdrom_readsector_raw(&cdrom, dev->buf, cdrom.seek_pos, 0, 2, 0x10, (int *) &dev->readcount, 0); - if (!ret) + if (ret <= 0) return 0; if (dev->mode & 0x40) { dev->buf[12] = CD_BCD((dev->readmsf >> 16) & 0xff); diff --git a/src/include/86box/scsi_device.h b/src/include/86box/scsi_device.h index 64d3bc853..abcd415f4 100644 --- a/src/include/86box/scsi_device.h +++ b/src/include/86box/scsi_device.h @@ -189,6 +189,7 @@ /* SCSI Sense Keys */ #define SENSE_NONE 0 #define SENSE_NOT_READY 2 +#define SENSE_MEDIUM_ERROR 3 #define SENSE_ILLEGAL_REQUEST 5 #define SENSE_UNIT_ATTENTION 6 @@ -196,6 +197,7 @@ #define ASC_NONE 0x00 #define ASC_AUDIO_PLAY_OPERATION 0x00 #define ASC_NOT_READY 0x04 +#define ASC_UNRECOVERED_READ_ERROR 0x11 #define ASC_ILLEGAL_OPCODE 0x20 #define ASC_LBA_OUT_OF_RANGE 0x21 #define ASC_INV_FIELD_IN_CMD_PACKET 0x24 @@ -212,6 +214,7 @@ #define ASCQ_NONE 0x00 #define ASCQ_UNIT_IN_PROCESS_OF_BECOMING_READY 0x01 #define ASCQ_INITIALIZING_COMMAND_REQUIRED 0x02 +#define ASCQ_CIRC_UNRECOVERED_ERROR 0x06 #define ASCQ_CAPACITY_DATA_CHANGED 0x09 #define ASCQ_AUDIO_PLAY_OPERATION_IN_PROGRESS 0x11 #define ASCQ_AUDIO_PLAY_OPERATION_PAUSED 0x12 diff --git a/src/qt/dummy_cdrom_ioctl.c b/src/qt/dummy_cdrom_ioctl.c index 5c533b216..fed1444d1 100644 --- a/src/qt/dummy_cdrom_ioctl.c +++ b/src/qt/dummy_cdrom_ioctl.c @@ -207,7 +207,7 @@ plat_cdrom_read_sector(uint8_t *buffer, int raw, uint32_t sector) plat_cdrom_close(); dummy_cdrom_ioctl_log("ReadSector status=%d, sector=%d, size=%" PRId64 ".\n", status, sector, (long long) size); - return 0; + return -1; } void diff --git a/src/qt/win_cdrom_ioctl.c b/src/qt/win_cdrom_ioctl.c index ff422bcd2..995876c1d 100644 --- a/src/qt/win_cdrom_ioctl.c +++ b/src/qt/win_cdrom_ioctl.c @@ -342,7 +342,7 @@ plat_cdrom_get_sector_size(UNUSED(uint32_t sector)) int plat_cdrom_read_sector(uint8_t *buffer, int raw, uint32_t sector) { - BOOL status; + int status; long size = 0; int buflen = raw ? RAW_SECTOR_SIZE : COOKED_SECTOR_SIZE; @@ -370,7 +370,7 @@ plat_cdrom_read_sector(uint8_t *buffer, int raw, uint32_t sector) plat_cdrom_close(); win_cdrom_ioctl_log("ReadSector status=%d, sector=%d, size=%" PRId64 ".\n", status, sector, (long long) size); - return (size == buflen) && (status > 0); + return (status > 0) ? (size == buflen) : -1; } void diff --git a/src/scsi/scsi_cdrom.c b/src/scsi/scsi_cdrom.c index d014945a7..c527465fc 100644 --- a/src/scsi/scsi_cdrom.c +++ b/src/scsi/scsi_cdrom.c @@ -1244,6 +1244,15 @@ scsi_cdrom_not_ready(scsi_cdrom_t *dev) scsi_cdrom_cmd_error(dev); } +static void +scsi_cdrom_circ_error(scsi_cdrom_t *dev) +{ + scsi_cdrom_sense_key = SENSE_MEDIUM_ERROR; + scsi_cdrom_asc = ASC_UNRECOVERED_READ_ERROR; + scsi_cdrom_ascq = ASCQ_CIRC_UNRECOVERED_ERROR; + scsi_cdrom_cmd_error(dev); +} + static void scsi_cdrom_invalid_lun(scsi_cdrom_t *dev) { @@ -1367,6 +1376,10 @@ scsi_cdrom_read_data(scsi_cdrom_t *dev, int msf, int type, int flags, int32_t *l if (!ret) { scsi_cdrom_illegal_mode(dev); return 0; + } else if (ret < 0) { + pclog("we have a circ\n"); + scsi_cdrom_circ_error(dev); + return -1; } } From b0e8647753c3a981c3cd87de2805354827e2765b Mon Sep 17 00:00:00 2001 From: richardg867 Date: Sun, 27 Oct 2024 14:10:28 -0300 Subject: [PATCH 08/26] scsi_cdrom: Remove debug logging --- src/scsi/scsi_cdrom.c | 1 - 1 file changed, 1 deletion(-) diff --git a/src/scsi/scsi_cdrom.c b/src/scsi/scsi_cdrom.c index c527465fc..358901847 100644 --- a/src/scsi/scsi_cdrom.c +++ b/src/scsi/scsi_cdrom.c @@ -1377,7 +1377,6 @@ scsi_cdrom_read_data(scsi_cdrom_t *dev, int msf, int type, int flags, int32_t *l scsi_cdrom_illegal_mode(dev); return 0; } else if (ret < 0) { - pclog("we have a circ\n"); scsi_cdrom_circ_error(dev); return -1; } From 8a7e0ea5477db180d9013cd8c494056a39f313e3 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Sun, 27 Oct 2024 23:36:11 +0100 Subject: [PATCH 09/26] Small but important video changes of the day (October 27th, 2024) 8514/A compatibles: 1. The mode switch (from VGA to 8514/A/ATI and vice-versa) has been fixed again (for the Nth time). 2. Removed a pattern hack used on DPCONFIG = 0x5211 on bitblt, now patterns work properly using the ATI Mach8 3.0 win3.1x drivers. 3. Clipping regs are more accurate for acceleration. XGA 1-2: A picky OS is a picky OS, fixes to the Win95 fonts (which uses the pattern sources) applied. --- src/include/86box/vid_8514a.h | 3 + src/video/vid_8514a.c | 26 ++- src/video/vid_ati_mach8.c | 300 +++++++++++++++++++++------------- src/video/vid_xga.c | 4 +- 4 files changed, 217 insertions(+), 116 deletions(-) diff --git a/src/include/86box/vid_8514a.h b/src/include/86box/vid_8514a.h index 39af01fd0..1c64309cd 100644 --- a/src/include/86box/vid_8514a.h +++ b/src/include/86box/vid_8514a.h @@ -198,13 +198,16 @@ typedef struct ibm8514_t { int hsync_width; int htotal; int hdisp; + int hdisp2; int hdisped; int sc; int vsyncstart; int vsyncwidth; int vtotal; int v_disp; + int v_disp2; int vdisp; + int vdisp2; int disp_cntl; int interlace; uint8_t subsys_cntl; diff --git a/src/video/vid_8514a.c b/src/video/vid_8514a.c index 3e758b952..6d7aa6b94 100644 --- a/src/video/vid_8514a.c +++ b/src/video/vid_8514a.c @@ -498,6 +498,24 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len) dev->accel.multifunc_cntl = val; dev->accel.multifunc[dev->accel.multifunc_cntl >> 12] = dev->accel.multifunc_cntl & 0xfff; dev->accel.cmd_back = !!(port == 0xfee8); + + if ((dev->accel.multifunc_cntl >> 12) == 1) { + dev->accel.clip_top = dev->accel.multifunc[1] & 0x3ff; + if (dev->accel.multifunc[1] & 0x400) + dev->accel.clip_top |= ~0x3ff; + } + + if ((dev->accel.multifunc_cntl >> 12) == 2) { + dev->accel.clip_left = dev->accel.multifunc[2] & 0x3ff; + if (dev->accel.multifunc[2] & 0x400) + dev->accel.clip_left |= ~0x3ff; + } + if ((dev->accel.multifunc_cntl >> 12) == 3) + dev->accel.clip_bottom = dev->accel.multifunc[3] & 0x7ff; + + if ((dev->accel.multifunc_cntl >> 12) == 4) + dev->accel.clip_right = dev->accel.multifunc[4] & 0x7ff; + } break; @@ -914,10 +932,10 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat uint16_t old_dest_dat; int frgd_mix; int bkgd_mix; - int16_t clip_t = dev->accel.multifunc[1] & 0x7ff; - int16_t clip_l = dev->accel.multifunc[2] & 0x7ff; - uint16_t clip_b = dev->accel.multifunc[3] & 0x7ff; - uint16_t clip_r = dev->accel.multifunc[4] & 0x7ff; + int16_t clip_t = dev->accel.clip_top; + int16_t clip_l = dev->accel.clip_left; + uint16_t clip_b = dev->accel.clip_bottom; + uint16_t clip_r = dev->accel.clip_right; int pixcntl = (dev->accel.multifunc[0x0a] >> 6) & 3; uint16_t mix_mask = dev->bpp ? 0x8000 : 0x80; uint16_t compare = dev->accel.color_cmp; diff --git a/src/video/vid_ati_mach8.c b/src/video/vid_ati_mach8.c index 7ef0d2475..f39dda6d7 100644 --- a/src/video/vid_ati_mach8.c +++ b/src/video/vid_ati_mach8.c @@ -309,10 +309,10 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 uint16_t mix = 0; uint32_t mono_dat0 = 0; uint32_t mono_dat1 = 0; - int16_t clip_t = dev->accel.multifunc[1] & 0x7ff; - int16_t clip_l = dev->accel.multifunc[2] & 0x7ff; - int16_t clip_b = dev->accel.multifunc[3] & 0x7ff; - int16_t clip_r = dev->accel.multifunc[4] & 0x7ff; + int16_t clip_t = dev->accel.clip_top; + int16_t clip_l = dev->accel.clip_left; + int16_t clip_b = dev->accel.clip_bottom; + int16_t clip_r = dev->accel.clip_right; if (!dev->bpp) { rd_mask &= 0xff; @@ -829,15 +829,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3 if (dev->accel.cur_y >= 0x600) dev->accel.dy |= ~0x5ff; - if (mach->accel.dp_config == 0x5211) { - if (mach->accel.dest_x_end == 1024) - goto skip_dx; - } /*Destination Width*/ - if (mach->accel.dest_x_start != dev->accel.dx) - mach->accel.dest_x_start = dev->accel.dx; - -skip_dx: mach->accel.dx_start = mach->accel.dest_x_start; if (mach->accel.dest_x_start >= 0x600) mach->accel.dx_start |= ~0x5ff; @@ -868,6 +860,7 @@ skip_dx: mach->accel.dy_start = dev->accel.cur_y; if (dev->accel.cur_y >= 0x600) mach->accel.dy_start |= ~0x5ff; + mach->accel.dy_end = mach->accel.dest_y_end; if (mach->accel.dest_y_end >= 0x600) mach->accel.dy_end |= ~0x5ff; @@ -995,8 +988,10 @@ skip_dx: if (cpu_input) { if (mach->accel.dp_config == 0x3251) { mach_log("DPCONFIG 3251: monosrc=%d, frgdsel=%d, bkgdsel=%d, pitch=%d.\n", mono_src, frgd_sel, bkgd_sel, dev->pitch); - if (dev->accel.sy == mach->accel.height) + if (dev->accel.sy == mach->accel.height) { + mach_log("No Blit on DPCONFIG=3251.\n"); return; + } } } @@ -2569,6 +2564,7 @@ mach_recalctimings(svga_t *svga) } svga->render8514 = ibm8514_render_blank; + mach_log("ON?=%d.\n", dev->on); if (dev->on) { mach_log("8514/A ON, extpitch=%d, devma=%x, vgamalatch=%x.\n", dev->ext_pitch, dev->ma, svga->ma_latch); dev->pitch = dev->ext_pitch; @@ -2578,7 +2574,7 @@ mach_recalctimings(svga_t *svga) dev->accel.ge_offset = (mach->accel.ge_offset_lo | (mach->accel.ge_offset_hi << 16)); mach->accel.ge_offset = dev->accel.ge_offset; - mach_log("HDISP=%d, VDISP=%d, shadowset=%x, 8514/A mode=%x, clocksel=%02x.\n", dev->hdisp, dev->vdisp, mach->shadow_set & 0x03, dev->accel.advfunc_cntl & 0x04, mach->accel.clock_sel & 0xfe); + mach_log("HDISP=%d, VDISP=%d, shadowset=%x, 8514/A mode=%x, clocksel=%02x, interlace=%x.\n", dev->hdisp, dev->vdisp, mach->shadow_set & 0x03, dev->accel.advfunc_cntl & 0x04, mach->accel.clock_sel & 0xfe, dev->interlace); if ((dev->local & 0xff) >= 0x02) { if (dev->bpp || (dev->accel_bpp >= 24) || (mach->accel.clock_sel & 0x01)) { dev->h_disp = dev->hdisp; @@ -2593,8 +2589,13 @@ mach_recalctimings(svga_t *svga) dev->dispend = 480; } } else { - dev->h_disp = dev->hdisp; - dev->dispend = dev->vdisp; + if (((mach->shadow_set & 0x03) == 0x00) && ((dev->hdisp2 == 640) || (dev->hdisp2 == 1280)) && (dev->hdisp != 800)) { + dev->h_disp = dev->hdisp2; + dev->dispend = dev->vdisp2; + } else { + dev->h_disp = dev->hdisp; + dev->dispend = dev->vdisp; + } } } } else { @@ -2619,18 +2620,6 @@ mach_recalctimings(svga_t *svga) if (dev->interlace) dev->dispend >>= 1; - if (dev->dispend == 478) - dev->dispend += 2; - - if (dev->dispend == 598) - dev->dispend += 2; - - if (dev->dispend == 766) - dev->dispend += 2; - - if (dev->dispend == 1022) - dev->dispend += 2; - if ((dev->local & 0xff) >= 0x02) { mach_log("HDISP=%d, mask=%02x.\n", dev->h_disp, dev->dac_mask); if ((mach->accel.ext_ge_config & 0x800) || (!(mach->accel.ext_ge_config & 0x8000) && !(mach->accel.ext_ge_config & 0x800))) { @@ -3116,27 +3105,43 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u break; case 0xdaee: - mach_log("DAEE (extclipl) write val = %d\n", val); - if (len == 2) + mach_log("DAEE (extclipl) write val = %d\n", val & 0x7ff); + if (len == 2) { dev->accel.multifunc[2] = val & 0x7ff; + dev->accel.clip_left = dev->accel.multifunc[2]; + if (val & 0x800) + dev->accel.clip_left |= ~0x7ff; + } break; case 0xdeee: - mach_log("DEEE (extclipt) write val = %d\n", val); - if (len == 2) + mach_log("DEEE (extclipt) write val = %d\n", val & 0x7ff); + if (len == 2) { dev->accel.multifunc[1] = val & 0x7ff; + dev->accel.clip_top = dev->accel.multifunc[1]; + if (val & 0x800) + dev->accel.clip_top |= ~0x7ff; + } break; case 0xe2ee: - mach_log("E2EE (extclipr) write val = %d\n", val); - if (len == 2) + mach_log("E2EE (extclipr) write val = %d\n", val & 0x7ff); + if (len == 2) { dev->accel.multifunc[4] = val & 0x7ff; + dev->accel.clip_right = dev->accel.multifunc[4]; + if (val & 0x800) + dev->accel.clip_right |= ~0x7ff; + } break; case 0xe6ee: - mach_log("E6EE (extclipb) write val = %d\n", val); - if (len == 2) + mach_log("E6EE (extclipb) write val = %d\n", val & 0x7ff); + if (len == 2) { dev->accel.multifunc[3] = val & 0x7ff; + dev->accel.clip_bottom = dev->accel.multifunc[3]; + if (val & 0x800) + dev->accel.clip_bottom |= ~0x7ff; + } break; case 0xeeee: @@ -3186,7 +3191,6 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8 case 0xee8: case 0x1ee8: case 0x1ee9: - case 0x22e8: case 0x42e8: case 0x42e9: ibm8514_accel_out(port, val, svga, 2); @@ -3197,10 +3201,11 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8 if (!(mach->shadow_cntl & 0x08)) { if ((mach->shadow_set & 0x03) || (mach->accel.clock_sel & 0x01)) { dev->hdisped = val; - dev->hdisp = (dev->hdisped + 1) << 3; - } + dev->hdisp = (val + 1) << 3; + } else if (((mach->shadow_set & 0x03) == 0x00) && !(mach->accel.clock_sel & 0x01)) + dev->hdisp2 = (val + 1) << 3; } - mach_log("[%04X:%08X]: ATI 8514/A: (0x%04x): hdisp=0x%02x.\n", CS, cpu_state.pc, port, val); + mach_log("[%04X:%08X]: ATI 8514/A: (0x%04x): hdisp=0x%02x, shadowcntl=%02x, shadowset=%02x.\n", CS, cpu_state.pc, port, val, mach->shadow_cntl & 0x08, mach->shadow_set & 0x03); svga_recalctimings(svga); break; @@ -3208,7 +3213,8 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8 case 0x12e9: /*In preparation to switch from VGA to 8514/A mode*/ if (!(mach->shadow_cntl & 0x10)) { - if ((mach->shadow_set & 0x03) || (mach->accel.clock_sel & 0x01)) { + if ((mach->shadow_set & 0x03) || (mach->accel.clock_sel & 0x01) || + (((mach->shadow_set & 0x03) == 0x00) && !(mach->accel.clock_sel & 0x01))) { WRITE8(port, dev->v_total_reg, val); dev->v_total_reg &= 0x1fff; dev->v_total = dev->v_total_reg + 1; @@ -3228,9 +3234,17 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8 WRITE8(port, dev->v_disp, val); dev->v_disp &= 0x1fff; dev->vdisp = (dev->v_disp + 1) >> 1; + if ((dev->vdisp == 478) || (dev->vdisp == 598) || (dev->vdisp == 766) || (dev->vdisp == 1022)) + dev->vdisp += 2; + } else if (((mach->shadow_set & 0x03) == 0x00) && !(mach->accel.clock_sel & 0x01)) { + WRITE8(port, dev->v_disp2, val); + dev->v_disp2 &= 0x1fff; + dev->vdisp2 = (dev->v_disp2 + 1) >> 1; + if ((dev->vdisp2 == 478) || (dev->vdisp2 == 598) || (dev->vdisp2 == 766) || (dev->vdisp2 == 1022)) + dev->vdisp2 += 2; } } - mach_log("ATI 8514/A: V_DISP write 16E8 = %d\n", dev->v_disp); + mach_log("ATI 8514/A: V_DISP write 16E8=%d, vdisp2=%d.\n", dev->v_disp, dev->v_disp2); mach_log("ATI 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val); svga_recalctimings(svga); break; @@ -3239,7 +3253,8 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8 case 0x1ae9: /*In preparation to switch from VGA to 8514/A mode*/ if (!(mach->shadow_cntl & 0x10)) { - if ((mach->shadow_set & 0x03) || (mach->accel.clock_sel & 0x01)) { + if ((mach->shadow_set & 0x03) || (mach->accel.clock_sel & 0x01) || + (((mach->shadow_set & 0x03) == 0x00) && !(mach->accel.clock_sel & 0x01))) { WRITE8(port, dev->v_sync_start, val); dev->v_sync_start &= 0x1fff; dev->v_syncstart = dev->v_sync_start + 1; @@ -3252,15 +3267,29 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8 svga_recalctimings(svga); break; + case 0x22e8: + if (!(mach->shadow_cntl & 0x03)) { + if ((mach->shadow_set & 0x03) || (mach->accel.clock_sel & 0x01) || + (((mach->shadow_set & 0x03) == 0x00) && !(mach->accel.clock_sel & 0x01))) { + dev->disp_cntl = val; + dev->interlace = !!(dev->disp_cntl & 0x10); + } + } + mach_log("ATI 8514/A: DISP_CNTL write %04x=%02x, interlace=%d.\n", port, dev->disp_cntl, dev->interlace); + svga_recalctimings(svga); + break; + case 0x4ae8: - WRITE8(port, dev->accel.advfunc_cntl, val); - dev->on = dev->accel.advfunc_cntl & 0x01; - vga_on = !dev->on; + dev->accel.advfunc_cntl = val; + mach_log("[%04X:%08X]: ATI 8514/A: (0x%04x): ON=%d, shadow crt=%x, hdisp=%d, vdisp=%d.\n", CS, cpu_state.pc, port, dev->accel.advfunc_cntl & 0x01, dev->accel.advfunc_cntl & 0x04, dev->hdisp, dev->vdisp); if ((dev->local & 0xff) < 0x02) dev->ext_crt_pitch = 128; - - mach_log("[%04X:%08X]: ATI 8514/A: (0x%04x): ON=%d, shadow crt=%x, hdisp=%d, vdisp=%d.\n", CS, cpu_state.pc, port, val & 0x01, dev->accel.advfunc_cntl & 0x04, dev->hdisp, dev->vdisp); + break; + case 0x4ae9: + dev->on = dev->accel.advfunc_cntl & 0x01; + vga_on = !dev->on; + mach_log("[%04X:%08X]: ATI 8514/A: (0x%04x): ON=%d, shadow crt=%x, hdisp=%d, vdisp=%d.\n", CS, cpu_state.pc, port, dev->accel.advfunc_cntl & 0x01, dev->accel.advfunc_cntl & 0x04, dev->hdisp, dev->vdisp); mach_log("Vendor IBM mode set %s resolution.\n", (dev->accel.advfunc_cntl & 0x04) ? "2: 1024x768" : "1: 640x480"); svga_recalctimings(svga); @@ -3342,8 +3371,6 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8 else dev->ext_crt_pitch <<= 1; } - dev->on = 1; - vga_on = 0; mach_log("ATI 8514/A: (0x%04x) val=0x%02x.\n", port, val); svga_recalctimings(svga); break; @@ -3391,7 +3418,9 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8 case 0x4aee: case 0x4aef: WRITE8(port, mach->accel.clock_sel, val); - dev->on = mach->accel.clock_sel & 0x01; + if (port & 1) + dev->on = mach->accel.clock_sel & 0x01; + mach_log("ATI 8514/A: (0x%04x): ON=%d, val=%04x, hdisp=%d, vdisp=%d, val=0x%02x.\n", port, dev->on, val, dev->hdisp, dev->vdisp, val & 0xfe); if (!(port & 1)) mach_log("Vendor ATI mode set %s resolution.\n", (dev->accel.advfunc_cntl & 0x04) ? "2: 1024x768" : "1: 640x480"); @@ -3449,6 +3478,7 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8 case 0x6aef: WRITE8(port, mach->accel.max_waitstates, val); mach->override_resolution = !!(mach->accel.max_waitstates & 0x400); + mach_log("Override=%d.\n", mach->override_resolution); if (mach->override_resolution) { dev->on = 1; vga_on = !dev->on; @@ -3845,12 +3875,16 @@ mach_accel_in_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, in if (len == 2) { if ((dev->local & 0xff) >= 0x02) temp = mach->accel.src_x; - } else - temp = mach->accel.src_x & 0xff; + } else { + if ((dev->local & 0xff) >= 0x02) + temp = mach->accel.src_x & 0xff; + } break; case 0xdaef: - if (len == 1) - temp = mach->accel.src_x >> 8; + if (len == 1) { + if ((dev->local & 0xff) >= 0x02) + temp = mach->accel.src_x >> 8; + } break; case 0xdeee: @@ -4340,60 +4374,97 @@ mach32_write_common(uint32_t addr, uint8_t val, int linear, mach_t *mach, svga_t } addr &= svga->decode_mask; - if (addr >= dev->vram_size) + if (addr >= dev->vram_size) { + mach_log("WriteOver! %x.\n", addr); return; + } addr &= dev->vram_mask; dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount; - val = ((val >> (svga->gdcreg[3] & 7)) | (val << (8 - (svga->gdcreg[3] & 7)))); - if ((svga->gdcreg[8] == 0xff) && !(svga->gdcreg[3] & 0x18) && (!svga->gdcreg[1] || svga->set_reset_disabled)) { - for (i = 0; i < 4; i++) { - if (writemask2 & (1 << i)) - dev->vram[addr | i] = val; - } - } else { - for (i = 0; i < 4; i++) { - if (svga->gdcreg[1] & (1 << i)) - vall.b[i] = !!(svga->gdcreg[0] & (1 << i)) * 0xff; - else - vall.b[i] = val; - } + switch (svga->writemode) { + case 0: + val = ((val >> (svga->gdcreg[3] & 7)) | (val << (8 - (svga->gdcreg[3] & 7)))); + if ((svga->gdcreg[8] == 0xff) && !(svga->gdcreg[3] & 0x18) && (!svga->gdcreg[1] || svga->set_reset_disabled)) { + for (i = 0; i < 4; i++) { + if (writemask2 & (1 << i)) + dev->vram[addr | i] = val; + } + return; + } else { + for (i = 0; i < 4; i++) { + if (svga->gdcreg[1] & (1 << i)) + vall.b[i] = !!(svga->gdcreg[0] & (1 << i)) * 0xff; + else + vall.b[i] = val; + } + } + break; + case 1: + for (i = 0; i < 4; i++) { + if (writemask2 & (1 << i)) + dev->vram[addr | i] = dev->latch.b[i]; + } + return; + case 2: + for (i = 0; i < 4; i++) + vall.b[i] = !!(val & (1 << i)) * 0xff; - switch (svga->gdcreg[3] & 0x18) { - case 0x00: /* Set */ + if (!(svga->gdcreg[3] & 0x18) && (!svga->gdcreg[1] || svga->set_reset_disabled)) { for (i = 0; i < 4; i++) { if (writemask2 & (1 << i)) dev->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (dev->latch.b[i] & ~svga->gdcreg[8]); } - break; - case 0x08: /* AND */ - for (i = 0; i < 4; i++) { - if (writemask2 & (1 << i)) - dev->vram[addr | i] = (vall.b[i] | ~svga->gdcreg[8]) & dev->latch.b[i]; - } - break; - case 0x10: /* OR */ - for (i = 0; i < 4; i++) { - if (writemask2 & (1 << i)) - dev->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | dev->latch.b[i]; - } - break; - case 0x18: /* XOR */ - for (i = 0; i < 4; i++) { - if (writemask2 & (1 << i)) - dev->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) ^ dev->latch.b[i]; - } - break; + return; + } + break; + case 3: + val = ((val >> (svga->gdcreg[3] & 7)) | (val << (8 - (svga->gdcreg[3] & 7)))); + wm = svga->gdcreg[8]; + svga->gdcreg[8] &= val; - default: - break; - } + for (i = 0; i < 4; i++) + vall.b[i] = !!(svga->gdcreg[0] & (1 << i)) * 0xff; - if (reset_wm) - svga->gdcreg[8] = wm; + reset_wm = 1; + break; + default: + break; } + + switch (svga->gdcreg[3] & 0x18) { + case 0x00: /* Set */ + for (i = 0; i < 4; i++) { + if (writemask2 & (1 << i)) + dev->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (dev->latch.b[i] & ~svga->gdcreg[8]); + } + break; + case 0x08: /* AND */ + for (i = 0; i < 4; i++) { + if (writemask2 & (1 << i)) + dev->vram[addr | i] = (vall.b[i] | ~svga->gdcreg[8]) & dev->latch.b[i]; + } + break; + case 0x10: /* OR */ + for (i = 0; i < 4; i++) { + if (writemask2 & (1 << i)) + dev->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | dev->latch.b[i]; + } + break; + case 0x18: /* XOR */ + for (i = 0; i < 4; i++) { + if (writemask2 & (1 << i)) + dev->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) ^ dev->latch.b[i]; + } + break; + + default: + break; + } + + if (reset_wm) + svga->gdcreg[8] = wm; } #ifdef ATI_8514_ULTRA @@ -4618,8 +4689,10 @@ mach32_read_common(uint32_t addr, int linear, mach_t *mach, svga_t *svga) if (svga->chain4) { addr &= svga->decode_mask; - if (addr >= dev->vram_size) + if (addr >= dev->vram_size) { + mach_log("ReadOver! (chain4) %x.\n", addr); return 0xff; + } latch_addr = (addr & dev->vram_mask) & ~3; for (uint8_t i = 0; i < count; i++) dev->latch.b[i] = dev->vram[latch_addr | i]; @@ -4630,8 +4703,10 @@ mach32_read_common(uint32_t addr, int linear, mach_t *mach, svga_t *svga) addr &= dev->vram_mask; } else { addr &= svga->decode_mask; - if (addr >= dev->vram_size) + if (addr >= dev->vram_size) { + mach_log("ReadOver! (normal) %x.\n", addr); return 0xff; + } latch_addr = (addr & dev->vram_mask) & ~3; for (uint8_t i = 0; i < count; i++) dev->latch.b[i] = dev->vram[latch_addr | i]; @@ -4642,6 +4717,7 @@ mach32_read_common(uint32_t addr, int linear, mach_t *mach, svga_t *svga) /* standard VGA latched access */ if (latch_addr >= dev->vram_size) { + mach_log("Over VRAM Latch addr=%x.\n", latch_addr); for (uint8_t i = 0; i < count; i++) dev->latch.b[i] = 0xff; } else { @@ -4651,8 +4727,10 @@ mach32_read_common(uint32_t addr, int linear, mach_t *mach, svga_t *svga) dev->latch.b[i] = dev->vram[latch_addr | i]; } - if (addr >= dev->vram_size) + if (addr >= dev->vram_size) { + mach_log("ReadOver! (chain2) %x.\n", addr); return 0xff; + } addr &= dev->vram_mask; @@ -4885,10 +4963,10 @@ mach32_ap_writeb(uint32_t addr, uint8_t val, void *priv) mach_accel_outb(0x02e8 + (addr & 1) + (port_dword << 8), val, mach); } } else { - if (dev->on) { - mach_log("Linear WORDB Write=%08x, val=%02x, ON=%x, dpconfig=%04x, apsize=%08x.\n", addr & dev->vram_mask, val, dev->on, mach->accel.dp_config, mach->ap_size << 20); + mach_log("Linear WORDB Write=%08x, val=%02x, ON=%x, dpconfig=%04x, apsize=%08x.\n", addr & dev->vram_mask, val, dev->on, mach->accel.dp_config, mach->ap_size << 20); + if (dev->on) mach32_write_common(addr, val, 1, mach, svga); - } else + else svga_write_linear(addr, val, svga); } } @@ -4911,10 +4989,10 @@ mach32_ap_writew(uint32_t addr, uint16_t val, void *priv) mach_accel_outw(0x02e8 + (port_dword << 8), val, mach); } } else { - if (dev->on) { - mach_log("Linear WORDW Write=%08x, val=%04x, ON=%x, dpconfig=%04x, apsize=%08x.\n", addr & dev->vram_mask, val, dev->on, mach->accel.dp_config, mach->ap_size << 20); + mach_log("Linear WORDW Write=%08x, val=%04x, ON=%x, dpconfig=%04x, apsize=%08x.\n", addr & dev->vram_mask, val, dev->on, mach->accel.dp_config, mach->ap_size << 20); + if (dev->on) mach32_writew_linear(addr, val, mach); - } else + else svga_writew_linear(addr, val, svga); } } @@ -4939,10 +5017,10 @@ mach32_ap_writel(uint32_t addr, uint32_t val, void *priv) mach_accel_outw(0x02e8 + (port_dword << 8) + 4, val >> 16, mach); } } else { - if (dev->on) { - mach_log("Linear WORDL Write=%08x, val=%08x, ON=%x, dpconfig=%04x, apsize=%08x.\n", addr & dev->vram_mask, val, dev->on, mach->accel.dp_config, mach->ap_size << 20); + mach_log("Linear WORDL Write=%08x, val=%08x, ON=%x, dpconfig=%04x, apsize=%08x.\n", addr & dev->vram_mask, val, dev->on, mach->accel.dp_config, mach->ap_size << 20); + if (dev->on) mach32_writel_linear(addr, val, mach); - } else + else svga_writel_linear(addr, val, svga); } } @@ -4990,9 +5068,9 @@ mach32_ap_readw(uint32_t addr, void *priv) else temp = mach_accel_inw(0x02e8 + (port_dword << 8), mach); } else { - if (dev->on) { + if (dev->on) temp = mach32_readw_linear(addr, mach); - } else + else temp = svga_readw_linear(addr, svga); mach_log("Linear WORDW Read=%08x, ret=%04x.\n", addr, temp); @@ -5020,9 +5098,9 @@ mach32_ap_readl(uint32_t addr, void *priv) temp |= (mach_accel_inw(0x02e8 + (port_dword << 8) + 4, mach) << 8); } } else { - if (dev->on) { + if (dev->on) temp = mach32_readl_linear(addr, mach); - } else + else temp = svga_readl_linear(addr, svga); mach_log("Linear WORDL Read=%08x, ret=%08x, ON%d.\n", addr, temp, dev->on); diff --git a/src/video/vid_xga.c b/src/video/vid_xga.c index e71ed42a7..6687238da 100644 --- a/src/video/vid_xga.c +++ b/src/video/vid_xga.c @@ -925,8 +925,10 @@ xga_accel_read_pattern_map_pixel(svga_t *svga, int x, int y, uint32_t base, int bits = 7 - (x & 7); if (!(xga->accel.px_map_format[xga->accel.src_map] & 0x08) && !(xga->accel.px_map_format[xga->accel.dst_map] & 0x08)) { - if (((xga->accel.px_map_format[xga->accel.src_map] & 0x07) >= 0x02) && ((xga->accel.px_map_format[xga->accel.dst_map] & 0x07) >= 0x02)) + if (((xga->accel.px_map_format[xga->accel.src_map] & 0x07) >= 0x02) && ((xga->accel.px_map_format[xga->accel.dst_map] & 0x07) >= 0x02) && (xga->accel.pat_src <= 2)) { + xga_log("Reverse, access mode=%02x, dstmap=%x, srcmap=%x, pat=%x.\n", xga->access_mode & 0x08, xga->accel.px_map_format[xga->accel.dst_map], xga->accel.px_map_format[xga->accel.src_map], xga->accel.pat_src); bits ^= 7; + } } px = (byte >> bits) & 1; From 9685cdfa925e0d9bd03ed87da128b24f439cc643 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Mon, 28 Oct 2024 02:23:43 +0100 Subject: [PATCH 10/26] XGA changes of the early day (October 28th, 2024) 1. Pattern/font fixes for Windows 3.1's third party XGA drivers as well as OS/2's win3.x' box (seamless and full). 2. The 4MB aperture is still used internally even if the 1MB one is in use, fixes OS/2's XGA driver on boot when less than 16MB of memory is used. --- src/video/vid_xga.c | 43 ++++++++++++++++++++++++------------------- 1 file changed, 24 insertions(+), 19 deletions(-) diff --git a/src/video/vid_xga.c b/src/video/vid_xga.c index 6687238da..f126ba9bd 100644 --- a/src/video/vid_xga.c +++ b/src/video/vid_xga.c @@ -924,11 +924,10 @@ xga_accel_read_pattern_map_pixel(svga_t *svga, int x, int y, uint32_t base, int bits = 7 - (x & 7); + xga_log("0. AccessMode=%02x, SRCMAP=%02x, DSTMAP=%02x, PAT=%02x.\n", xga->access_mode & 0x0f, (xga->accel.px_map_format[xga->accel.src_map] & 0x0f), (xga->accel.px_map_format[xga->accel.dst_map] & 0x0f), (xga->accel.px_map_format[xga->accel.pat_src] & 0x08)); if (!(xga->accel.px_map_format[xga->accel.src_map] & 0x08) && !(xga->accel.px_map_format[xga->accel.dst_map] & 0x08)) { - if (((xga->accel.px_map_format[xga->accel.src_map] & 0x07) >= 0x02) && ((xga->accel.px_map_format[xga->accel.dst_map] & 0x07) >= 0x02) && (xga->accel.pat_src <= 2)) { - xga_log("Reverse, access mode=%02x, dstmap=%x, srcmap=%x, pat=%x.\n", xga->access_mode & 0x08, xga->accel.px_map_format[xga->accel.dst_map], xga->accel.px_map_format[xga->accel.src_map], xga->accel.pat_src); + if (((xga->accel.px_map_format[xga->accel.src_map] & 0x07) >= 0x02) && ((xga->accel.px_map_format[xga->accel.dst_map] & 0x07) >= 0x02) && (xga->accel.pat_src <= 2)) bits ^= 7; - } } px = (byte >> bits) & 1; @@ -957,7 +956,8 @@ xga_accel_read_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, int } else byte = mem_readb_phys(addr); - if (xga->accel.px_map_format[map] & 0x08) + xga_log("1. AccessMode=%02x, SRCMAP=%02x, DSTMAP=%02x, PAT=%02x.\n", xga->access_mode & 0x0f, (xga->accel.px_map_format[xga->accel.src_map] & 0x0f), (xga->accel.px_map_format[xga->accel.dst_map] & 0x0f), xga->accel.pat_src); + if ((xga->accel.px_map_format[xga->accel.src_map] & 0x08) && !(xga->access_mode & 0x08)) bits = (x & 7); else bits = 7 - (x & 7); @@ -1028,10 +1028,15 @@ xga_accel_write_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, ui } else byte = mem_readb_phys(addr); - if ((xga->accel.px_map_format[map] & 0x08) || (xga->accel.px_map_format[xga->accel.src_map] & 0x08)) - mask = 1 << (x & 7); - else + if (xga->access_mode & 0x08) mask = 1 << (7 - (x & 7)); + else { + if ((xga->accel.px_map_format[map] & 0x08) || (xga->accel.px_map_format[xga->accel.src_map] & 0x08)) { + xga_log("2. AccessMode=%02x, SRCMAP=%02x, DSTMAP=%02x, PAT=%02x.\n", xga->access_mode & 0x0f, (xga->accel.px_map_format[xga->accel.src_map] & 0x0f), (xga->accel.px_map_format[map] & 0x0f), xga->accel.pat_src); + mask = 1 << (x & 7); + } else + mask = 1 << (7 - (x & 7)); + } byte = (byte & ~mask) | ((pixel ? 0xff : 0) & mask); if (pixel & 1) { @@ -1115,11 +1120,11 @@ xga_short_stroke(svga_t *svga, uint8_t ssv) int dirx = 0; int diry = 0; - dx = xga->accel.dst_map_x & 0x1fff; + dx = xga->accel.dst_map_x; if (xga->accel.dst_map_x >= 0x1800) dx |= ~0x17ff; - dy = xga->accel.dst_map_y & 0x1fff; + dy = xga->accel.dst_map_y; if (xga->accel.dst_map_y >= 0x1800) dy |= ~0x17ff; @@ -1243,11 +1248,11 @@ xga_line_draw_write(svga_t *svga) cx = xga->accel.src_map_x & 0xfff; cy = xga->accel.src_map_y & 0xfff; - dx = xga->accel.dst_map_x & 0x1fff; + dx = xga->accel.dst_map_x; if (xga->accel.dst_map_x >= 0x1800) dx |= ~0x17ff; - dy = xga->accel.dst_map_y & 0x1fff; + dy = xga->accel.dst_map_y; if (xga->accel.dst_map_y >= 0x1800) dy |= ~0x17ff; @@ -1443,12 +1448,12 @@ xga_bitblt(svga_t *svga) xga->accel.sy = xga->accel.src_map_y & 0xfff; xga->accel.px = xga->accel.pat_map_x & 0xfff; xga->accel.py = xga->accel.pat_map_y & 0xfff; - dx = xga->accel.dst_map_x & 0x1fff; - dy = xga->accel.dst_map_y & 0x1fff; + dx = xga->accel.dst_map_x; + dy = xga->accel.dst_map_y; if (xga->accel.dst_map_x >= 0x1800) dx |= ~0x17ff; if (xga->accel.dst_map_y >= 0x1800) - dy -= 0x1800; + dy |= ~0x17ff; xga_log("D(%d,%d), SWH(%d,%d), BLT(%d,%d), dstwidth=%d.\n", dx, dy, xga->accel.x, xga->accel.y, srcwidth, srcheight, dstwidth); @@ -1524,7 +1529,7 @@ xga_bitblt(svga_t *svga) if (xga->accel.x < 0) { xga->accel.x = xga->accel.blt_width & 0xfff; - dx = xga->accel.dst_map_x & 0x1fff; + dx = xga->accel.dst_map_x; if (xga->accel.dst_map_x >= 0x1800) dx |= ~0x17ff; xga->accel.sx = xga->accel.src_map_x & 0xfff; @@ -1634,7 +1639,7 @@ xga_bitblt(svga_t *svga) xga->accel.y--; xga->accel.x = xga->accel.blt_width & 0xfff; - dx = xga->accel.dst_map_x & 0x1fff; + dx = xga->accel.dst_map_x; if (xga->accel.dst_map_x >= 0x1800) dx |= ~0x17ff; @@ -1699,7 +1704,7 @@ xga_bitblt(svga_t *svga) xga->accel.y--; xga->accel.x = xga->accel.blt_width & 0xfff; - dx = xga->accel.dst_map_x & 0x1fff; + dx = xga->accel.dst_map_x; if (xga->accel.dst_map_x >= 0x1800) dx |= ~0x17ff; @@ -3202,7 +3207,7 @@ xga_mca_write(int port, uint8_t val, void *priv) /* Save the MCA register value. */ xga->pos_regs[port & 7] = val; - if (!(xga->pos_regs[4] & 1) && (mem_size >= 15360)) /*MCA 4MB addressing on systems with more than 16MB of memory*/ + if (!(xga->pos_regs[4] & 1)) /*MCA 4MB addressing on systems with more than 16MB of memory*/ xga->pos_regs[4] |= 1; if (xga->pos_regs[2] & 1) { @@ -3396,7 +3401,7 @@ xga_pos_out(uint16_t addr, uint8_t val, void *priv) xga_log("104Write=%02x.\n", val); if ((xga->pos_idx & 3) == 0) { xga->pos_regs[4] = val; - if (!(xga->pos_regs[4] & 0x01) && (mem_size >= 15360)) /*4MB addressing on systems with more than 15MB of memory*/ + if (!(xga->pos_regs[4] & 0x01)) /*4MB addressing on systems with more than 15MB of memory*/ xga->pos_regs[4] |= 0x01; } break; From b0fd34749c6322fca3e52c2168e62e915fbc710d Mon Sep 17 00:00:00 2001 From: Nelson Kerber Hennemann Filho <87081197+nelsonhef@users.noreply.github.com> Date: Mon, 28 Oct 2024 08:33:13 -0300 Subject: [PATCH 11/26] Update pt-BR.po Fix some typos --- src/qt/languages/pt-BR.po | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/qt/languages/pt-BR.po b/src/qt/languages/pt-BR.po index 0cadad77c..81a9a5a65 100644 --- a/src/qt/languages/pt-BR.po +++ b/src/qt/languages/pt-BR.po @@ -79,7 +79,7 @@ msgid "Use target framerate:" msgstr "Usar taxa de quadros alvo:" msgid "VSync" -msgstr "VSync (sincronizaĂ§Ă£o virtual)" +msgstr "VSync (sincronizaĂ§Ă£o vertical)" msgid "Shaders" msgstr "Shaders" @@ -625,7 +625,7 @@ msgid "Cassette" msgstr "Cassete" msgid "Vision Systems LBA Enhancer" -msgstr "Aprimorador LBA Vision Sistems" +msgstr "Aprimorador LBA Vision Systems" msgid "Hard disks:" msgstr "Discos rĂ­gidos:" From f0e036811523bb588e96b80152b282d32e53219c Mon Sep 17 00:00:00 2001 From: altiereslima Date: Mon, 28 Oct 2024 15:30:55 -0300 Subject: [PATCH 12/26] Update pt-BR.po --- src/qt/languages/pt-BR.po | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/qt/languages/pt-BR.po b/src/qt/languages/pt-BR.po index 81a9a5a65..9e6bb4016 100644 --- a/src/qt/languages/pt-BR.po +++ b/src/qt/languages/pt-BR.po @@ -625,7 +625,7 @@ msgid "Cassette" msgstr "Cassete" msgid "Vision Systems LBA Enhancer" -msgstr "Aprimorador LBA Vision Systems" +msgstr "Vision Systems LBA Enhancer" msgid "Hard disks:" msgstr "Discos rĂ­gidos:" From 4f472445f286e783b5f42aa9165de232960cda08 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Mon, 28 Oct 2024 22:14:58 +0100 Subject: [PATCH 13/26] Video and emulator GUI changes of the day (October 28th, 2024) IBM 8514/A (MCA/ISA). Added a configure button to the QT frontend for the amount of memory used by said add-on chips. XGA: Forgot a change about the 4mb aperture. --- src/include/86box/vid_8514a_device.h | 25 +++++++++++++++++++++++++ src/qt/qt_settingsdisplay.cpp | 20 ++++++++++++++++++++ src/qt/qt_settingsdisplay.hpp | 2 ++ src/qt/qt_settingsdisplay.ui | 7 +++++++ src/video/vid_8514a.c | 1 + src/video/vid_xga.c | 10 ++++------ 6 files changed, 59 insertions(+), 6 deletions(-) create mode 100644 src/include/86box/vid_8514a_device.h diff --git a/src/include/86box/vid_8514a_device.h b/src/include/86box/vid_8514a_device.h new file mode 100644 index 000000000..b4102b17a --- /dev/null +++ b/src/include/86box/vid_8514a_device.h @@ -0,0 +1,25 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Emulation of the 8514/A card from IBM for the MCA bus and + * generic ISA bus clones without vendor extensions. + * + * + * + * Authors: TheCollector1995 + * + * Copyright 2024 TheCollector1995. + */ +#ifndef VIDEO_8514A_DEVICE_H +#define VIDEO_8514A_DEVICE_H + +#ifdef EMU_DEVICE_H +extern const device_t ibm8514_mca_device; +extern const device_t gen8514_isa_device; +#endif +#endif /*VIDEO_XGA_DEVICE_H*/ diff --git a/src/qt/qt_settingsdisplay.cpp b/src/qt/qt_settingsdisplay.cpp index db8c30e5d..50489ea61 100644 --- a/src/qt/qt_settingsdisplay.cpp +++ b/src/qt/qt_settingsdisplay.cpp @@ -24,6 +24,7 @@ extern "C" { #include <86box/device.h> #include <86box/machine.h> #include <86box/video.h> +#include <86box/vid_8514a_device.h> #include <86box/vid_xga_device.h> } @@ -53,6 +54,7 @@ SettingsDisplay::save() // TODO for (uint8_t i = 1; i < GFXCARD_MAX; i ++) gfxcard[i] = ui->comboBoxVideoSecondary->currentData().toInt(); + voodoo_enabled = ui->checkBoxVoodoo->isChecked() ? 1 : 0; ibm8514_standalone_enabled = ui->checkBox8514->isChecked() ? 1 : 0; xga_standalone_enabled = ui->checkBoxXga->isChecked() ? 1 : 0; @@ -127,6 +129,16 @@ SettingsDisplay::on_pushButtonConfigureVoodoo_clicked() DeviceConfig::ConfigureDevice(&voodoo_device, 0, qobject_cast(Settings::settings)); } +void +SettingsDisplay::on_pushButtonConfigure8514_clicked() +{ + if (machine_has_bus(machineId, MACHINE_BUS_MCA) > 0) { + DeviceConfig::ConfigureDevice(&ibm8514_mca_device, 0, qobject_cast(Settings::settings)); + } else { + DeviceConfig::ConfigureDevice(&gen8514_isa_device, 0, qobject_cast(Settings::settings)); + } +} + void SettingsDisplay::on_pushButtonConfigureXga_clicked() { @@ -166,6 +178,8 @@ SettingsDisplay::on_comboBoxVideo_currentIndexChanged(int index) ui->checkBox8514->setEnabled(machineSupports8514); ui->checkBox8514->setChecked(ibm8514_standalone_enabled && machineSupports8514); + ui->pushButtonConfigure8514->setEnabled(ui->checkBox8514->isEnabled() && ui->checkBox8514->isChecked()); + ui->checkBoxXga->setEnabled(machineSupportsXga); ui->checkBoxXga->setChecked(xga_standalone_enabled && machineSupportsXga); @@ -238,6 +252,12 @@ SettingsDisplay::on_checkBoxVoodoo_stateChanged(int state) ui->pushButtonConfigureVoodoo->setEnabled(state == Qt::Checked); } +void +SettingsDisplay::on_checkBox8514_stateChanged(int state) +{ + ui->pushButtonConfigure8514->setEnabled(state == Qt::Checked); +} + void SettingsDisplay::on_checkBoxXga_stateChanged(int state) { diff --git a/src/qt/qt_settingsdisplay.hpp b/src/qt/qt_settingsdisplay.hpp index 6297f7eae..3c28c52e0 100644 --- a/src/qt/qt_settingsdisplay.hpp +++ b/src/qt/qt_settingsdisplay.hpp @@ -29,9 +29,11 @@ private slots: private slots: void on_checkBoxVoodoo_stateChanged(int state); + void on_checkBox8514_stateChanged(int state); void on_checkBoxXga_stateChanged(int state); void on_comboBoxVideo_currentIndexChanged(int index); void on_pushButtonConfigureVoodoo_clicked(); + void on_pushButtonConfigure8514_clicked(); void on_pushButtonConfigureXga_clicked(); void on_pushButtonConfigure_clicked(); diff --git a/src/qt/qt_settingsdisplay.ui b/src/qt/qt_settingsdisplay.ui index a9b7e6e2c..f6bbeeae0 100644 --- a/src/qt/qt_settingsdisplay.ui +++ b/src/qt/qt_settingsdisplay.ui @@ -106,6 +106,13 @@ + + + + Configure + + + diff --git a/src/video/vid_8514a.c b/src/video/vid_8514a.c index 6d7aa6b94..accedd131 100644 --- a/src/video/vid_8514a.c +++ b/src/video/vid_8514a.c @@ -35,6 +35,7 @@ #include <86box/thread.h> #include <86box/video.h> #include <86box/vid_8514a.h> +#include <86box/vid_8514a_device.h> #include <86box/vid_xga.h> #include <86box/vid_svga.h> #include <86box/vid_svga_render.h> diff --git a/src/video/vid_xga.c b/src/video/vid_xga.c index f126ba9bd..bd18beae2 100644 --- a/src/video/vid_xga.c +++ b/src/video/vid_xga.c @@ -3487,15 +3487,13 @@ xga_init(const device_t *info) xga->rom_addr = 0xc0000 + (((xga->pos_regs[2] & 0xf0) >> 4) * 0x2000); xga->instance = (xga->pos_regs[2] & 0x0e) >> 1; xga->pos_regs[2] |= 0x01; - if (mem_size >= 15360) { - xga->pos_regs[4] |= 0x01; + xga->pos_regs[4] |= 0x01; + if (mem_size >= 15360) xga->pos_regs[5] = 0; - } else { + else { xga->pos_regs[5] = ((mem_size * 64) >> 0x10) + 1; - if (xga->pos_regs[5] == 0x10) { + if (xga->pos_regs[5] == 0x10) xga->pos_regs[5] = 0x00; - xga->pos_regs[4] |= 0x01; - } } xga->base_addr_1mb = (xga->pos_regs[5] & 0x0f) << 20; xga->linear_base = ((xga->pos_regs[4] & 0xfe) * 0x1000000) + (xga->instance << 22); From 451ece0074272093800d92c48addf8545a704d67 Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Mon, 28 Oct 2024 19:57:26 -0300 Subject: [PATCH 14/26] scsi_cdrom: Fix reporting of read errors on ATAPI drives --- src/scsi/scsi_cdrom.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/scsi/scsi_cdrom.c b/src/scsi/scsi_cdrom.c index 358901847..103ce3161 100644 --- a/src/scsi/scsi_cdrom.c +++ b/src/scsi/scsi_cdrom.c @@ -1416,7 +1416,7 @@ scsi_cdrom_read_blocks(scsi_cdrom_t *dev, int32_t *len, int first_batch, int ven scsi_cdrom_log("Read %i bytes of blocks...\n", *len); if (ret == -1) - return 0; + return ret; else if (!ret || (!first_batch && (dev->old_len != *len))) { if (!first_batch && (dev->old_len != *len)) scsi_cdrom_illegal_mode(dev); @@ -2219,7 +2219,7 @@ begin: if (ret <= 0) { scsi_cdrom_set_phase(dev, SCSI_PHASE_STATUS); - dev->packet_status = PHASE_COMPLETE; + dev->packet_status = (ret < 0) ? PHASE_ERROR : PHASE_COMPLETE; dev->callback = 20.0 * CDROM_TIME; scsi_cdrom_set_callback(dev); scsi_cdrom_buf_free(dev); From 36e42af7b25151b188f9e47a5657d35c740f0bd2 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Tue, 29 Oct 2024 01:16:21 +0100 Subject: [PATCH 15/26] S3 bank update (October 29th, 2024) 1. Simplified 4bpp rendering mode. 2. Implement CRTC31 bit 0 functionality which enables/disables the vendor banks. Fixes Diamond Stealth 64 964 VRAM (VLB/PCI) detection on NT 3.1 (and possibly other cards) while keeping NT 3.1 347.1's full screen Command Prompt test normal without garbage using the 911/924 chips. --- src/video/vid_s3.c | 46 ++++++++++++++++------------------------------ 1 file changed, 16 insertions(+), 30 deletions(-) diff --git a/src/video/vid_s3.c b/src/video/vid_s3.c index c91eab589..295c65bd4 100644 --- a/src/video/vid_s3.c +++ b/src/video/vid_s3.c @@ -3218,7 +3218,7 @@ s3_decode_addr(svga_t *svga, uint32_t addr, int write) { int memory_map_mode = (svga->gdcreg[6] >> 2) & 3; - s3_log("CRTC31 bit 3=%x, map=%x, write=%x, wrtbank=%x, chain4=%x.\n", svga->crtc[0x31] & 0x08, memory_map_mode, write, svga->write_bank, svga->chain4); + s3_log("CRTC31 bit 3=%x, map=%x, write=%x, wrtbank=%x, chain4=%x, vrammask=%08x.\n", svga->crtc[0x31] & 0x08, memory_map_mode, write, svga->write_bank, svga->chain4, svga->vram_display_mask); if (svga->crtc[0x31] & 0x08) memory_map_mode = 1; @@ -4295,36 +4295,20 @@ s3_recalctimings(svga_t *svga) } svga->vram_display_mask = s3->vram_mask; } else { - if (!svga->scrblank && (svga->crtc[0x17] & 0x80) && svga->attr_palette_enable) { - if ((svga->gdcreg[6] & 1) || (svga->attrregs[0x10] & 1)) { - if (svga->crtc[0x31] & 0x08) { - if (svga->bpp == 8) { - if (!(svga->crtc[0x5e] & 0x04)) - svga->vblankstart = svga->dispend; /*Applies only to Enhanced modes*/ + if (svga->crtc[0x31] & 0x08) { + if (!(svga->crtc[0x5e] & 0x04)) + svga->vblankstart = svga->dispend; /*Applies only to Enhanced modes*/ - /*Enhanced 4bpp mode, just like the 8bpp mode per the spec. */ - svga->render = svga_render_8bpp_highres; - svga->rowoffset <<= 1; - svga->vram_display_mask = s3->vram_mask; - } else { - svga->vram_display_mask = (svga->crtc[0x32] & 0x40) ? 0x3ffff : s3->vram_mask; - svga->write_bank = 0; - svga->read_bank = svga->write_bank; - } - } else { - svga->vram_display_mask = (svga->crtc[0x32] & 0x40) ? 0x3ffff : s3->vram_mask; - svga->write_bank = 0; - svga->read_bank = svga->write_bank; - } - } else { - svga->vram_display_mask = (svga->crtc[0x32] & 0x40) ? 0x3ffff : s3->vram_mask; - svga->write_bank = 0; - svga->read_bank = svga->write_bank; - } + /*Enhanced 4bpp mode, just like the 8bpp mode per the spec. */ + svga->render = svga_render_8bpp_highres; + svga->rowoffset <<= 1; + svga->vram_display_mask = s3->vram_mask; } else { svga->vram_display_mask = (svga->crtc[0x32] & 0x40) ? 0x3ffff : s3->vram_mask; - svga->write_bank = 0; - svga->read_bank = svga->write_bank; + if (!(svga->crtc[0x31] & 0x01)) { /*Bank Enable bit*/ + svga->write_bank = 0; + svga->read_bank = 0; + } } } @@ -4466,8 +4450,10 @@ s3_trio64v_recalctimings(svga_t *svga) svga->vram_display_mask = s3->vram_mask; } else { svga->vram_display_mask = (svga->crtc[0x32] & 0x40) ? 0x3ffff : s3->vram_mask; - svga->write_bank = 0; - svga->read_bank = svga->write_bank; + if (!(svga->crtc[0x31] & 0x01)) { /*Bank Enable bit*/ + svga->write_bank = 0; + svga->read_bank = 0; + } } } else /*Streams mode*/ { From 416125390bf8af07500dc5a98eb4a11ff6864cab Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Tue, 29 Oct 2024 11:41:59 -0300 Subject: [PATCH 16/26] hdd_image: Add framework for reporting I/O errors, and stop removing drives with locked images --- src/disk/hdd_image.c | 59 ++++++++++++++++++++++++++++------------- src/include/86box/hdd.h | 8 +++--- 2 files changed, 44 insertions(+), 23 deletions(-) diff --git a/src/disk/hdd_image.c b/src/disk/hdd_image.c index 7c2618969..8b0949c9b 100644 --- a/src/disk/hdd_image.c +++ b/src/disk/hdd_image.c @@ -184,6 +184,9 @@ hdd_image_calc_chs(uint32_t *c, uint32_t *h, uint32_t *s, uint32_t size) static int prepare_new_hard_disk(uint8_t id, uint64_t full_size) { + if (!hdd_images[id].file) + return -1; + uint64_t target_size = (full_size + hdd_images[id].base) - ftello64(hdd_images[id].file); #ifndef __unix__ @@ -390,7 +393,8 @@ retry_vhd: } else { /* Failed for another reason */ hdd_image_log("Failed for another reason\n"); - return 0; + hdd_images[id].type = HDD_IMAGE_RAW; + return 1; } } else { if (image_is_hdi(fn)) { @@ -500,7 +504,7 @@ retry_vhd: return ret; } -void +int hdd_image_seek(uint8_t id, uint32_t sector) { off64_t addr = sector; @@ -508,12 +512,16 @@ hdd_image_seek(uint8_t id, uint32_t sector) hdd_images[id].pos = sector; if (hdd_images[id].type != HDD_IMAGE_VHD) { - if (fseeko64(hdd_images[id].file, addr + hdd_images[id].base, SEEK_SET) == -1) - fatal("hdd_image_seek(): Error seeking\n"); + if (!hdd_images[id].file || (fseeko64(hdd_images[id].file, addr + hdd_images[id].base, SEEK_SET) == -1)) { + hdd_image_log("hdd_image_seek(): Error seeking\n"); + return -1; + } } + + return 0; } -void +int hdd_image_read(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer) { int non_transferred_sectors; @@ -523,14 +531,18 @@ hdd_image_read(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer) non_transferred_sectors = mvhd_read_sectors(hdd_images[id].vhd, sector, count, buffer); hdd_images[id].pos = sector + count - non_transferred_sectors - 1; } else { - if (fseeko64(hdd_images[id].file, ((uint64_t) (sector) << 9LL) + hdd_images[id].base, SEEK_SET) == -1) { - fatal("Hard disk image %i: Read error during seek\n", id); - return; + if (!hdd_images[id].file || (fseeko64(hdd_images[id].file, ((uint64_t) (sector) << 9LL) + hdd_images[id].base, SEEK_SET) == -1)) { + hdd_image_log("Hard disk image %i: Read error during seek\n", id); + return -1; } num_read = fread(buffer, 512, count, hdd_images[id].file); + if (count && !num_read) + return -1; hdd_images[id].pos = sector + num_read; } + + return 0; } uint32_t @@ -554,14 +566,15 @@ hdd_image_read_ex(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer) if ((sectors - sector) < transfer_sectors) transfer_sectors = sectors - sector; - hdd_image_read(id, sector, transfer_sectors, buffer); + if (hdd_image_read(id, sector, transfer_sectors, buffer) < 0) + return -1; if (count != transfer_sectors) return 1; return 0; } -void +int hdd_image_write(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer) { int non_transferred_sectors; @@ -571,15 +584,19 @@ hdd_image_write(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer) non_transferred_sectors = mvhd_write_sectors(hdd_images[id].vhd, sector, count, buffer); hdd_images[id].pos = sector + count - non_transferred_sectors - 1; } else { - if (fseeko64(hdd_images[id].file, ((uint64_t) (sector) << 9LL) + hdd_images[id].base, SEEK_SET) == -1) { - fatal("Hard disk image %i: Write error during seek\n", id); - return; + if (!hdd_images[id].file || (fseeko64(hdd_images[id].file, ((uint64_t) (sector) << 9LL) + hdd_images[id].base, SEEK_SET) == -1)) { + hdd_image_log("Hard disk image %i: Write error during seek\n", id); + return -1; } num_write = fwrite(buffer, 512, count, hdd_images[id].file); + if (count && !num_write) + return -1; fflush(hdd_images[id].file); hdd_images[id].pos = sector + num_write; } + + return 0; } int @@ -591,14 +608,15 @@ hdd_image_write_ex(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer) if ((sectors - sector) < transfer_sectors) transfer_sectors = sectors - sector; - hdd_image_write(id, sector, transfer_sectors, buffer); + if (hdd_image_write(id, sector, transfer_sectors, buffer) < 0) + return -1; if (count != transfer_sectors) return 1; return 0; } -void +int hdd_image_zero(uint8_t id, uint32_t sector, uint32_t count) { if (hdd_images[id].type == HDD_IMAGE_VHD) { @@ -607,9 +625,9 @@ hdd_image_zero(uint8_t id, uint32_t sector, uint32_t count) } else { memset(empty_sector, 0, 512); - if (fseeko64(hdd_images[id].file, ((uint64_t) (sector) << 9LL) + hdd_images[id].base, SEEK_SET) == -1) { - fatal("Hard disk image %i: Zero error during seek\n", id); - return; + if (!hdd_images[id].file || (fseeko64(hdd_images[id].file, ((uint64_t) (sector) << 9LL) + hdd_images[id].base, SEEK_SET) == -1)) { + hdd_image_log("Hard disk image %i: Zero error during seek\n", id); + return -1; } for (uint32_t i = 0; i < count; i++) { @@ -617,11 +635,14 @@ hdd_image_zero(uint8_t id, uint32_t sector, uint32_t count) break; hdd_images[id].pos = sector + i; - fwrite(empty_sector, 512, 1, hdd_images[id].file); + if (!fwrite(empty_sector, 512, 1, hdd_images[id].file)) + return -1; } fflush(hdd_images[id].file); } + + return 0; } int diff --git a/src/include/86box/hdd.h b/src/include/86box/hdd.h index 89a6cf1ff..25c32355e 100644 --- a/src/include/86box/hdd.h +++ b/src/include/86box/hdd.h @@ -197,12 +197,12 @@ extern int hdd_is_valid(int c); extern void hdd_image_init(void); extern int hdd_image_load(int id); -extern void hdd_image_seek(uint8_t id, uint32_t sector); -extern void hdd_image_read(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer); +extern int hdd_image_seek(uint8_t id, uint32_t sector); +extern int hdd_image_read(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer); extern int hdd_image_read_ex(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer); -extern void hdd_image_write(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer); +extern int hdd_image_write(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer); extern int hdd_image_write_ex(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer); -extern void hdd_image_zero(uint8_t id, uint32_t sector, uint32_t count); +extern int hdd_image_zero(uint8_t id, uint32_t sector, uint32_t count); extern int hdd_image_zero_ex(uint8_t id, uint32_t sector, uint32_t count); extern uint32_t hdd_image_get_last_sector(uint8_t id); extern uint32_t hdd_image_get_pos(uint8_t id); From d5b0ba9511eb0d03429178fc3537bcd113f3f9bb Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Tue, 29 Oct 2024 11:47:47 -0300 Subject: [PATCH 17/26] hdc_ide: Report image read/write errors --- src/disk/hdc_ide.c | 46 ++++++++++++++++++++++++++++++++++------------ 1 file changed, 34 insertions(+), 12 deletions(-) diff --git a/src/disk/hdc_ide.c b/src/disk/hdc_ide.c index 1ec054de9..660093a8e 100644 --- a/src/disk/hdc_ide.c +++ b/src/disk/hdc_ide.c @@ -2214,8 +2214,10 @@ ide_callback(void *priv) if (ide->do_initial_read) { ide->do_initial_read = 0; ide->sector_pos = 0; - hdd_image_read(ide->hdd_num, ide_get_sector(ide), - ide->tf->secount ? ide->tf->secount : 256, ide->sector_buffer); + ret = hdd_image_read(ide->hdd_num, ide_get_sector(ide), + ide->tf->secount ? ide->tf->secount : 256, ide->sector_buffer); + } else { + ret = 0; } memcpy(ide->buffer, &ide->sector_buffer[ide->sector_pos * 512], 512); @@ -2224,6 +2226,10 @@ ide_callback(void *priv) ide->tf->pos = 0; ide->tf->atastat = DRQ_STAT | DRDY_STAT | DSC_STAT; + if (ret < 0) { + ide_log("IDE %i: Read aborted (image read error)\n", ide->channel); + err = UNC_ERR; + } ide_irq_raise(ide); @@ -2245,11 +2251,13 @@ ide_callback(void *priv) ide->sector_pos = ide->tf->secount; else ide->sector_pos = 256; - hdd_image_read(ide->hdd_num, ide_get_sector(ide), ide->sector_pos, ide->sector_buffer); ide->tf->pos = 0; - if (!ide_boards[ide->board]->force_ata3 && bm->dma) { + if (hdd_image_read(ide->hdd_num, ide_get_sector(ide), ide->sector_pos, ide->sector_buffer) < 0) { + ide_log("IDE %i: DMA read aborted (image read error)\n", ide->channel); + err = UNC_ERR; + } else if (!ide_boards[ide->board]->force_ata3 && bm->dma) { /* We should not abort - we should simply wait for the host to start DMA. */ ret = bm->dma(ide->sector_buffer, ide->sector_pos * 512, 0, bm->priv); if (ret == 2) { @@ -2292,8 +2300,10 @@ ide_callback(void *priv) if (ide->do_initial_read) { ide->do_initial_read = 0; ide->sector_pos = 0; - hdd_image_read(ide->hdd_num, ide_get_sector(ide), - ide->tf->secount ? ide->tf->secount : 256, ide->sector_buffer); + ret = hdd_image_read(ide->hdd_num, ide_get_sector(ide), + ide->tf->secount ? ide->tf->secount : 256, ide->sector_buffer); + } else { + ret = 0; } memcpy(ide->buffer, &ide->sector_buffer[ide->sector_pos * 512], 512); @@ -2302,6 +2312,10 @@ ide_callback(void *priv) ide->tf->pos = 0; ide->tf->atastat = DRQ_STAT | DRDY_STAT | DSC_STAT; + if (ret < 0) { + ide_log("IDE %i: Read aborted (image read error)\n", ide->channel); + err = UNC_ERR; + } if (!ide->blockcount) ide_irq_raise(ide); ide->blockcount++; @@ -2320,7 +2334,7 @@ ide_callback(void *priv) else if (!ide->tf->lba && (ide->cfg_spt == 0)) err = IDNF_ERR; else { - hdd_image_write(ide->hdd_num, ide_get_sector(ide), 1, (uint8_t *) ide->buffer); + ret = hdd_image_write(ide->hdd_num, ide_get_sector(ide), 1, (uint8_t *) ide->buffer); ide_irq_raise(ide); ide->tf->secount--; if (ide->tf->secount) { @@ -2332,6 +2346,8 @@ ide_callback(void *priv) ide->tf->atastat = DRDY_STAT | DSC_STAT; ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 0); } + if (ret < 0) + err = UNC_ERR; } ide_log("Write: %02X, %i, %08X, %" PRIi64 "\n", err, ide->hdd_num, ide->lba_addr, sector); break; @@ -2360,12 +2376,14 @@ ide_callback(void *priv) return; } else if (ret == 1) { /* DMA successful */ - ide_log("IDE %i: DMA write successful\n", ide->channel); + ret = hdd_image_write(ide->hdd_num, ide_get_sector(ide), + ide->sector_pos, ide->sector_buffer); - hdd_image_write(ide->hdd_num, ide_get_sector(ide), - ide->sector_pos, ide->sector_buffer); + ide_log("IDE %i: DMA write %ssuccessful\n", ide->channel, (ret < 0) ? "un" : ""); ide->tf->atastat = DRDY_STAT | DSC_STAT; + if (ret < 0) + err = UNC_ERR; ide_irq_raise(ide); ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 0); @@ -2393,7 +2411,7 @@ ide_callback(void *priv) else if (!ide->tf->lba && (ide->cfg_spt == 0)) err = IDNF_ERR; else { - hdd_image_write(ide->hdd_num, ide_get_sector(ide), 1, (uint8_t *) ide->buffer); + ret = hdd_image_write(ide->hdd_num, ide_get_sector(ide), 1, (uint8_t *) ide->buffer); ide->blockcount++; if (ide->blockcount >= ide->blocksize || ide->tf->secount == 1) { ide->blockcount = 0; @@ -2408,6 +2426,8 @@ ide_callback(void *priv) ide->tf->atastat = DRDY_STAT | DSC_STAT; ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 0); } + if (ret < 0) + err = UNC_ERR; } break; @@ -2431,9 +2451,11 @@ ide_callback(void *priv) else if (!ide->tf->lba && (ide->cfg_spt == 0)) err = IDNF_ERR; else { - hdd_image_zero(ide->hdd_num, ide_get_sector_format(ide), ide->tf->secount); + ret = hdd_image_zero(ide->hdd_num, ide_get_sector_format(ide), ide->tf->secount); ide->tf->atastat = DRDY_STAT | DSC_STAT; + if (ret < 0) + err = UNC_ERR; ide_irq_raise(ide); ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 1); From 94e5fded317e8e4a4386627cb7726d0eef698e82 Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Tue, 29 Oct 2024 12:12:01 -0300 Subject: [PATCH 18/26] hdd_image: Populate last sector for failed images --- src/disk/hdd_image.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/disk/hdd_image.c b/src/disk/hdd_image.c index 8b0949c9b..2b463a23c 100644 --- a/src/disk/hdd_image.c +++ b/src/disk/hdd_image.c @@ -393,7 +393,8 @@ retry_vhd: } else { /* Failed for another reason */ hdd_image_log("Failed for another reason\n"); - hdd_images[id].type = HDD_IMAGE_RAW; + hdd_images[id].type = HDD_IMAGE_RAW; + hdd_images[id].last_sector = (uint32_t) (((uint64_t) hdd[id].spt) * ((uint64_t) hdd[id].hpc) * ((uint64_t) hdd[id].tracks)) - 1; return 1; } } else { From 7b786a98fa9c0dfc1f573d615898cf8504ebbe3c Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Tue, 29 Oct 2024 12:13:04 -0300 Subject: [PATCH 19/26] scsi_disk: Report image read/write errors --- src/include/86box/scsi_device.h | 1 + src/scsi/scsi_disk.c | 38 +++++++++++++++++++++++++++------ 2 files changed, 33 insertions(+), 6 deletions(-) diff --git a/src/include/86box/scsi_device.h b/src/include/86box/scsi_device.h index abcd415f4..e69d3cc93 100644 --- a/src/include/86box/scsi_device.h +++ b/src/include/86box/scsi_device.h @@ -197,6 +197,7 @@ #define ASC_NONE 0x00 #define ASC_AUDIO_PLAY_OPERATION 0x00 #define ASC_NOT_READY 0x04 +#define ASC_WRITE_ERROR 0x0c #define ASC_UNRECOVERED_READ_ERROR 0x11 #define ASC_ILLEGAL_OPCODE 0x20 #define ASC_LBA_OUT_OF_RANGE 0x21 diff --git a/src/scsi/scsi_disk.c b/src/scsi/scsi_disk.c index 792dad31b..10fdf04a6 100644 --- a/src/scsi/scsi_disk.c +++ b/src/scsi/scsi_disk.c @@ -647,6 +647,24 @@ scsi_disk_bus_master_error(scsi_common_t *sc) scsi_disk_cmd_error(dev); } +static void +scsi_disk_write_error(scsi_disk_t *dev) +{ + scsi_disk_sense_key = SENSE_MEDIUM_ERROR; + scsi_disk_asc = ASC_WRITE_ERROR; + scsi_disk_ascq = 0; + scsi_disk_cmd_error(dev); +} + +static void +scsi_disk_read_error(scsi_disk_t *dev) +{ + scsi_disk_sense_key = SENSE_MEDIUM_ERROR; + scsi_disk_asc = ASC_UNRECOVERED_READ_ERROR; + scsi_disk_ascq = 0; + scsi_disk_cmd_error(dev); +} + static void scsi_disk_invalid_lun(scsi_disk_t *dev) { @@ -727,10 +745,17 @@ scsi_disk_blocks(scsi_disk_t *dev, int32_t *len, UNUSED(int first_batch), int ou *len = dev->requested_blocks << 9; for (int i = 0; i < dev->requested_blocks; i++) { - if (out) - hdd_image_write(dev->id, dev->sector_pos + i, 1, dev->temp_buffer + (i << 9)); - else - hdd_image_read(dev->id, dev->sector_pos + i, 1, dev->temp_buffer + (i << 9)); + if (out) { + if (hdd_image_write(dev->id, dev->sector_pos + i, 1, dev->temp_buffer + (i << 9)) < 0) { + scsi_disk_write_error(dev); + return -1; + } + } else { + if (hdd_image_read(dev->id, dev->sector_pos + i, 1, dev->temp_buffer + (i << 9)) < 0) { + scsi_disk_read_error(dev); + return -1; + } + } } scsi_disk_log("%s %i bytes of blocks...\n", out ? "Written" : "Read", *len); @@ -1040,7 +1065,7 @@ scsi_disk_command(scsi_common_t *sc, uint8_t *cdb) ret = scsi_disk_blocks(dev, &alloc_length, 1, 0); if (ret <= 0) { scsi_disk_set_phase(dev, SCSI_PHASE_STATUS); - dev->packet_status = PHASE_COMPLETE; + dev->packet_status = (ret < 0) ? PHASE_ERROR : PHASE_COMPLETE; dev->callback = 20.0 * SCSI_TIME; scsi_disk_set_callback(dev); scsi_disk_buf_free(dev); @@ -1501,7 +1526,8 @@ scsi_disk_phase_data_out(scsi_common_t *sc) dev->temp_buffer[6] = (s >> 8) & 0xff; dev->temp_buffer[7] = s & 0xff; } - hdd_image_write(dev->id, i, 1, dev->temp_buffer); + if (hdd_image_write(dev->id, i, 1, dev->temp_buffer) < 0) + scsi_disk_write_error(dev); } break; case GPCMD_MODE_SELECT_6: From df945636863142f2eb7d4f08e14e82c76d13f1d3 Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Tue, 29 Oct 2024 12:39:35 -0300 Subject: [PATCH 20/26] hdc_esdi_at: Report image read/write errors --- src/disk/hdc_esdi_at.c | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/src/disk/hdc_esdi_at.c b/src/disk/hdc_esdi_at.c index e16d4d729..c08ec636a 100644 --- a/src/disk/hdc_esdi_at.c +++ b/src/disk/hdc_esdi_at.c @@ -606,12 +606,16 @@ esdi_callback(void *priv) } else { if (get_sector(esdi, &addr)) { esdi->error = ERR_ID_NOT_FOUND; +read_error: esdi->status = STAT_READY | STAT_DSC | STAT_ERR; irq_raise(esdi); break; } - hdd_image_read(drive->hdd_num, addr, 1, (uint8_t *) esdi->buffer); + if (hdd_image_read(drive->hdd_num, addr, 1, (uint8_t *) esdi->buffer) < 0) { + esdi->error = ERR_BAD_BLOCK; + goto read_error; + } esdi->pos = 0; esdi->status = STAT_DRQ | STAT_READY | STAT_DSC; irq_raise(esdi); @@ -628,13 +632,17 @@ esdi_callback(void *priv) } else { if (get_sector(esdi, &addr)) { esdi->error = ERR_ID_NOT_FOUND; +write_error: esdi->status = STAT_READY | STAT_DSC | STAT_ERR; irq_raise(esdi); ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); break; } - hdd_image_write(drive->hdd_num, addr, 1, (uint8_t *) esdi->buffer); + if (hdd_image_write(drive->hdd_num, addr, 1, (uint8_t *) esdi->buffer) < 0) { + esdi->error = ERR_BAD_BLOCK; + goto write_error; + } irq_raise(esdi); esdi->secount = (esdi->secount - 1) & 0xff; if (esdi->secount) { @@ -659,13 +667,17 @@ esdi_callback(void *priv) } else { if (get_sector(esdi, &addr)) { esdi->error = ERR_ID_NOT_FOUND; +verify_error: esdi->status = STAT_READY | STAT_DSC | STAT_ERR; irq_raise(esdi); ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); break; } - hdd_image_read(drive->hdd_num, addr, 1, (uint8_t *) esdi->buffer); + if (hdd_image_read(drive->hdd_num, addr, 1, (uint8_t *) esdi->buffer) < 0) { + esdi->error = ERR_BAD_BLOCK; + goto verify_error; + } ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 1); next_sector(esdi); esdi->secount = (esdi->secount - 1) & 0xff; @@ -692,12 +704,16 @@ esdi_callback(void *priv) } else { if (get_sector_format(esdi, &addr)) { esdi->error = ERR_ID_NOT_FOUND; +format_error: esdi->status = STAT_READY | STAT_DSC | STAT_ERR; irq_raise(esdi); break; } - hdd_image_zero(drive->hdd_num, addr, esdi->secount); + if (hdd_image_zero(drive->hdd_num, addr, esdi->secount) < 0) { + esdi->error = ERR_BAD_BLOCK; + goto format_error; + } esdi->status = STAT_READY | STAT_DSC; irq_raise(esdi); } From ed0c571a8e1798a531b5847b9d2c0592dd51f22a Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Tue, 29 Oct 2024 12:42:59 -0300 Subject: [PATCH 21/26] hdc_esdi_mca: Report image read/write errors --- src/disk/hdc_esdi_mca.c | 31 +++++++++++++++++++++++++++++-- 1 file changed, 29 insertions(+), 2 deletions(-) diff --git a/src/disk/hdc_esdi_mca.c b/src/disk/hdc_esdi_mca.c index 1061cbc78..c63c80721 100644 --- a/src/disk/hdc_esdi_mca.c +++ b/src/disk/hdc_esdi_mca.c @@ -327,6 +327,27 @@ rba_out_of_range(esdi_t *dev) ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); } +static void +defective_block(esdi_t *dev) +{ + dev->status_len = 9; + dev->status_data[0] = dev->command | STATUS_LEN(9) | dev->cmd_dev; + dev->status_data[1] = 0x0e01; /*Command block error, invalid parameter*/ + dev->status_data[2] = 0x0009; /*Defective block*/ + dev->status_data[3] = 0; + dev->status_data[4] = 0; + dev->status_data[5] = 0; + dev->status_data[6] = 0; + dev->status_data[7] = 0; + dev->status_data[8] = 0; + + dev->status = STATUS_IRQ | STATUS_STATUS_OUT_FULL; + dev->irq_status = dev->cmd_dev | IRQ_CMD_COMPLETE_FAILURE; + dev->irq_in_progress = 1; + set_irq(dev); + ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); +} + static void complete_command_status(esdi_t *dev) { @@ -423,7 +444,10 @@ esdi_callback(void *priv) if (!dev->data_pos) { if (dev->rba >= drive->sectors) fatal("Read past end of drive\n"); - hdd_image_read(drive->hdd_num, dev->rba, 1, (uint8_t *) dev->data); + if (hdd_image_read(drive->hdd_num, dev->rba, 1, (uint8_t *) dev->data) < 0) { + defective_block(dev); + return; + } cmd_time += hdd_timing_read(&hdd[drive->hdd_num], dev->rba, 1); cmd_time += esdi_mca_get_xfer_time(dev, 1); } @@ -512,7 +536,10 @@ esdi_callback(void *priv) if (dev->rba >= drive->sectors) fatal("Write past end of drive\n"); - hdd_image_write(drive->hdd_num, dev->rba, 1, (uint8_t *) dev->data); + if (hdd_image_write(drive->hdd_num, dev->rba, 1, (uint8_t *) dev->data) < 0) { + defective_block(dev); + return; + } cmd_time += hdd_timing_write(&hdd[drive->hdd_num], dev->rba, 1); cmd_time += esdi_mca_get_xfer_time(dev, 1); dev->rba++; From 5734fd9a556ff8c400ebe5b8c1da99e4e64e6bad Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Tue, 29 Oct 2024 12:49:21 -0300 Subject: [PATCH 22/26] hdc_st506: Report image read/write errors --- src/disk/hdc_st506_at.c | 12 ++++++++++-- src/disk/hdc_st506_xt.c | 32 ++++++++++++++++++++++++-------- 2 files changed, 34 insertions(+), 10 deletions(-) diff --git a/src/disk/hdc_st506_at.c b/src/disk/hdc_st506_at.c index d5bbf24d0..9e5b82336 100644 --- a/src/disk/hdc_st506_at.c +++ b/src/disk/hdc_st506_at.c @@ -585,12 +585,16 @@ do_callback(void *priv) do_seek(mfm); if (get_sector(mfm, &addr)) { mfm->error = ERR_ID_NOT_FOUND; +read_error: mfm->status = STAT_READY | STAT_DSC | STAT_ERR; irq_raise(mfm); break; } - hdd_image_read(drive->hdd_num, addr, 1, (uint8_t *) mfm->buffer); + if (hdd_image_read(drive->hdd_num, addr, 1, (uint8_t *) mfm->buffer) < 0) { + mfm->error = ERR_BAD_BLOCK; + goto read_error; + } mfm->pos = 0; mfm->status = STAT_DRQ | STAT_READY | STAT_DSC; @@ -604,12 +608,16 @@ do_callback(void *priv) do_seek(mfm); if (get_sector(mfm, &addr)) { mfm->error = ERR_ID_NOT_FOUND; +write_error: mfm->status = STAT_READY | STAT_DSC | STAT_ERR; irq_raise(mfm); break; } - hdd_image_write(drive->hdd_num, addr, 1, (uint8_t *) mfm->buffer); + if (hdd_image_write(drive->hdd_num, addr, 1, (uint8_t *) mfm->buffer) < 0) { + mfm->error = ERR_BAD_BLOCK; + goto write_error; + } irq_raise(mfm); mfm->secount = (mfm->secount - 1) & 0xff; diff --git a/src/disk/hdc_st506_xt.c b/src/disk/hdc_st506_xt.c index 47e6f045a..b78466c3b 100644 --- a/src/disk/hdc_st506_xt.c +++ b/src/disk/hdc_st506_xt.c @@ -715,6 +715,7 @@ st506_callback(void *priv) dev->head, dev->sector, dev->count); if (!get_sector(dev, drive, &addr)) { +read_error_start: st506_error(dev, dev->error); st506_complete(dev); return; @@ -722,8 +723,11 @@ st506_callback(void *priv) ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 1); /* Read data from the image. */ - hdd_image_read(drive->hdd_num, addr, 1, - (uint8_t *) dev->buff); + if (hdd_image_read(drive->hdd_num, addr, 1, + (uint8_t *) dev->buff) < 0) { + dev->error = ERR_UNC_ERR; + goto read_error_start; + } /* Set up the data transfer. */ dev->buff_pos = 0; @@ -765,6 +769,7 @@ st506_callback(void *priv) next_sector(dev, drive); if (!get_sector(dev, drive, &addr)) { +read_error_sent: ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); st506_error(dev, dev->error); st506_complete(dev); @@ -772,8 +777,11 @@ st506_callback(void *priv) } /* Read data from the image. */ - hdd_image_read(drive->hdd_num, addr, 1, - (uint8_t *) dev->buff); + if (hdd_image_read(drive->hdd_num, addr, 1, + (uint8_t *) dev->buff) < 0) { + dev->error = ERR_UNC_ERR; + goto read_error_sent; + } /* Set up the data transfer. */ dev->buff_pos = 0; @@ -856,6 +864,7 @@ st506_callback(void *priv) case STATE_RECEIVED_DATA: if (!get_sector(dev, drive, &addr)) { +write_error: ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); st506_error(dev, dev->error); st506_complete(dev); @@ -863,8 +872,11 @@ st506_callback(void *priv) } /* Write data to image. */ - hdd_image_write(drive->hdd_num, addr, 1, - (uint8_t *) dev->buff); + if (hdd_image_write(drive->hdd_num, addr, 1, + (uint8_t *) dev->buff) < 0) { + dev->error = ERR_UNC_ERR; + goto write_error; + } if (--dev->count == 0) { ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); @@ -1156,8 +1168,12 @@ st506_callback(void *priv) ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 1); /* Write data to image. */ - hdd_image_write(drive->hdd_num, addr, 1, - (uint8_t *) dev->buff); + if (hdd_image_write(drive->hdd_num, addr, 1, + (uint8_t *) dev->buff) < 0) { + st506_error(dev, ERR_UNC_ERR); + st506_complete(dev); + return; + } if (--dev->count == 0) { ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); From e95b0d1e012fec04f7883eed76b237783eacaf49 Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Tue, 29 Oct 2024 12:53:54 -0300 Subject: [PATCH 23/26] hdc_xta: Report image read/write errors --- src/disk/hdc_xta.c | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/src/disk/hdc_xta.c b/src/disk/hdc_xta.c index ede21caf2..a4ef45c43 100644 --- a/src/disk/hdc_xta.c +++ b/src/disk/hdc_xta.c @@ -408,8 +408,9 @@ do_fmt: break; /* Write the block to the image. */ - hdd_image_write(drive->hdd_num, addr, 1, - (uint8_t *) dev->sector_buf); + if (hdd_image_write(drive->hdd_num, addr, 1, + (uint8_t *) dev->sector_buf) < 0) + dev->sense = ERR_BADTRK; } } @@ -522,6 +523,7 @@ hdc_callback(void *priv) do_send: /* Get address of sector to load. */ if (get_sector(dev, drive, &addr)) { +read_error: /* De-activate the status icon. */ ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 0); dev->comp |= COMP_ERR; @@ -530,8 +532,11 @@ do_send: } /* Read the block from the image. */ - hdd_image_read(drive->hdd_num, addr, 1, - (uint8_t *) dev->sector_buf); + if (hdd_image_read(drive->hdd_num, addr, 1, + (uint8_t *) dev->sector_buf) < 0) { + dev->sense = ERR_BADTRK; + goto read_error; + } /* Ready to transfer the data out. */ dev->state = STATE_SDATA; @@ -673,6 +678,7 @@ do_recv: /* Get address of sector to write. */ if (get_sector(dev, drive, &addr)) { +write_error: /* De-activate the status icon. */ ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 0); @@ -682,8 +688,11 @@ do_recv: } /* Write the block to the image. */ - hdd_image_write(drive->hdd_num, addr, 1, - (uint8_t *) dev->sector_buf); + if (hdd_image_write(drive->hdd_num, addr, 1, + (uint8_t *) dev->sector_buf) < 0) { + dev->sense = ERR_BADTRK; + goto write_error; + } dev->buf_idx = 0; if (--dev->count == 0) { From b155c50e96cf76af7857f5834ef1d7891fc0041d Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Tue, 29 Oct 2024 13:57:21 -0300 Subject: [PATCH 24/26] zip/mo: Report image read/write errors --- src/disk/mo.c | 45 +++++++++++++++++++++++++++++++++++++-------- src/disk/zip.c | 45 +++++++++++++++++++++++++++++++++++++-------- 2 files changed, 74 insertions(+), 16 deletions(-) diff --git a/src/disk/mo.c b/src/disk/mo.c index ed1ab2472..5f757c8af 100644 --- a/src/disk/mo.c +++ b/src/disk/mo.c @@ -874,6 +874,24 @@ mo_write_protected(mo_t *dev) mo_cmd_error(dev); } +static void +mo_write_error(mo_t *dev) +{ + mo_sense_key = SENSE_MEDIUM_ERROR; + mo_asc = ASC_WRITE_ERROR; + mo_ascq = 0; + mo_cmd_error(dev); +} + +static void +mo_read_error(mo_t *dev) +{ + mo_sense_key = SENSE_MEDIUM_ERROR; + mo_asc = ASC_UNRECOVERED_READ_ERROR; + mo_ascq = 0; + mo_cmd_error(dev); +} + static void mo_invalid_lun(mo_t *dev) { @@ -928,7 +946,7 @@ mo_blocks(mo_t *dev, int32_t *len, UNUSED(int first_batch), int out) if (!dev->sector_len) { mo_command_complete(dev); - return -1; + return 0; } mo_log("%sing %i blocks starting from %i...\n", out ? "Writ" : "Read", dev->requested_blocks, dev->sector_pos); @@ -942,20 +960,31 @@ mo_blocks(mo_t *dev, int32_t *len, UNUSED(int first_batch), int out) *len = dev->requested_blocks * dev->drv->sector_size; for (int i = 0; i < dev->requested_blocks; i++) { - if (fseek(dev->drv->fp, dev->drv->base + (dev->sector_pos * dev->drv->sector_size) + (i * dev->drv->sector_size), SEEK_SET) == 1) - break; + if (fseek(dev->drv->fp, dev->drv->base + (dev->sector_pos * dev->drv->sector_size) + (i * dev->drv->sector_size), SEEK_SET) == -1) { + if (out) + mo_write_error(dev); + else + mo_read_error(dev); + return -1; + } if (feof(dev->drv->fp)) break; if (out) { - if (fwrite(dev->buffer + (i * dev->drv->sector_size), 1, dev->drv->sector_size, dev->drv->fp) != dev->drv->sector_size) - fatal("mo_blocks(): Error writing data\n"); + if (fwrite(dev->buffer + (i * dev->drv->sector_size), 1, dev->drv->sector_size, dev->drv->fp) != dev->drv->sector_size) { + mo_log("mo_blocks(): Error writing data\n"); + mo_write_error(dev); + return -1; + } fflush(dev->drv->fp); } else { - if (fread(dev->buffer + (i * dev->drv->sector_size), 1, dev->drv->sector_size, dev->drv->fp) != dev->drv->sector_size) - fatal("mo_blocks(): Error reading data\n"); + if (fread(dev->buffer + (i * dev->drv->sector_size), 1, dev->drv->sector_size, dev->drv->fp) != dev->drv->sector_size) { + mo_log("mo_blocks(): Error reading data\n"); + mo_read_error(dev); + return -1; + } } } @@ -1433,7 +1462,7 @@ mo_command(scsi_common_t *sc, uint8_t *cdb) ret = mo_blocks(dev, &alloc_length, 1, 0); if (ret <= 0) { mo_set_phase(dev, SCSI_PHASE_STATUS); - dev->packet_status = PHASE_COMPLETE; + dev->packet_status = (ret < 0) ? PHASE_ERROR : PHASE_COMPLETE; dev->callback = 20.0 * MO_TIME; mo_set_callback(dev); mo_buf_free(dev); diff --git a/src/disk/zip.c b/src/disk/zip.c index a948cab2f..4a5a9b968 100644 --- a/src/disk/zip.c +++ b/src/disk/zip.c @@ -1048,6 +1048,24 @@ zip_write_protected(zip_t *dev) zip_cmd_error(dev); } +static void +zip_write_error(zip_t *dev) +{ + zip_sense_key = SENSE_MEDIUM_ERROR; + zip_asc = ASC_WRITE_ERROR; + zip_ascq = 0; + zip_cmd_error(dev); +} + +static void +zip_read_error(zip_t *dev) +{ + zip_sense_key = SENSE_MEDIUM_ERROR; + zip_asc = ASC_UNRECOVERED_READ_ERROR; + zip_ascq = 0; + zip_cmd_error(dev); +} + static void zip_invalid_lun(zip_t *dev) { @@ -1111,7 +1129,7 @@ zip_blocks(zip_t *dev, int32_t *len, UNUSED(int first_batch), int out) if (!dev->sector_len) { zip_command_complete(dev); - return -1; + return 0; } zip_log("%sing %i blocks starting from %i...\n", out ? "Writ" : "Read", dev->requested_blocks, dev->sector_pos); @@ -1125,20 +1143,31 @@ zip_blocks(zip_t *dev, int32_t *len, UNUSED(int first_batch), int out) *len = dev->requested_blocks << 9; for (int i = 0; i < dev->requested_blocks; i++) { - if (fseek(dev->drv->fp, dev->drv->base + (dev->sector_pos << 9) + (i << 9), SEEK_SET) == 1) - break; + if (fseek(dev->drv->fp, dev->drv->base + (dev->sector_pos << 9) + (i << 9), SEEK_SET) == -1) { + if (out) + zip_write_error(dev); + else + zip_read_error(dev); + return -1; + } if (feof(dev->drv->fp)) break; if (out) { - if (fwrite(dev->buffer + (i << 9), 1, 512, dev->drv->fp) != 512) - fatal("zip_blocks(): Error writing data\n"); + if (fwrite(dev->buffer + (i << 9), 1, 512, dev->drv->fp) != 512) { + zip_log("zip_blocks(): Error writing data\n"); + zip_write_error(dev); + return -1; + } fflush(dev->drv->fp); } else { - if (fread(dev->buffer + (i << 9), 1, 512, dev->drv->fp) != 512) - fatal("zip_blocks(): Error reading data\n"); + if (fread(dev->buffer + (i << 9), 1, 512, dev->drv->fp) != 512) { + zip_log("zip_blocks(): Error reading data\n"); + zip_read_error(dev); + return -1; + } } } @@ -1551,7 +1580,7 @@ zip_command(scsi_common_t *sc, uint8_t *cdb) ret = zip_blocks(dev, &alloc_length, 1, 0); if (ret <= 0) { zip_set_phase(dev, SCSI_PHASE_STATUS); - dev->packet_status = PHASE_COMPLETE; + dev->packet_status = (ret < 0) ? PHASE_ERROR : PHASE_COMPLETE; dev->callback = 20.0 * ZIP_TIME; zip_set_callback(dev); zip_buf_free(dev); From cc9c48711a036334d2a7effcac86d68d062bc917 Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Tue, 29 Oct 2024 14:15:08 -0300 Subject: [PATCH 25/26] hdd_image: Improve I/O error detection --- src/disk/hdd_image.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/disk/hdd_image.c b/src/disk/hdd_image.c index 2b463a23c..4607e2b14 100644 --- a/src/disk/hdd_image.c +++ b/src/disk/hdd_image.c @@ -538,9 +538,9 @@ hdd_image_read(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer) } num_read = fread(buffer, 512, count, hdd_images[id].file); - if (count && !num_read) - return -1; hdd_images[id].pos = sector + num_read; + if (num_read < count) + return -1; } return 0; @@ -591,10 +591,10 @@ hdd_image_write(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer) } num_write = fwrite(buffer, 512, count, hdd_images[id].file); - if (count && !num_write) - return -1; - fflush(hdd_images[id].file); hdd_images[id].pos = sector + num_write; + fflush(hdd_images[id].file); + if (num_write < count) + return -1; } return 0; From 2184a982f83c54dcbb1600fb7c82131e2d270331 Mon Sep 17 00:00:00 2001 From: RichardG867 Date: Tue, 29 Oct 2024 15:14:27 -0300 Subject: [PATCH 26/26] MiniVHD: Report read/write errors --- src/disk/hdd_image.c | 17 ++++++-- src/disk/minivhd/internal.h | 3 +- src/disk/minivhd/minivhd_io.c | 80 +++++++++++++++++++++++------------ 3 files changed, 69 insertions(+), 31 deletions(-) diff --git a/src/disk/hdd_image.c b/src/disk/hdd_image.c index 4607e2b14..402140408 100644 --- a/src/disk/hdd_image.c +++ b/src/disk/hdd_image.c @@ -529,8 +529,11 @@ hdd_image_read(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer) size_t num_read; if (hdd_images[id].type == HDD_IMAGE_VHD) { - non_transferred_sectors = mvhd_read_sectors(hdd_images[id].vhd, sector, count, buffer); - hdd_images[id].pos = sector + count - non_transferred_sectors - 1; + hdd_images[id].vhd->error = 0; + non_transferred_sectors = mvhd_read_sectors(hdd_images[id].vhd, sector, count, buffer); + hdd_images[id].pos = sector + count - non_transferred_sectors - 1; + if (hdd_images[id].vhd->error) + return -1; } else { if (!hdd_images[id].file || (fseeko64(hdd_images[id].file, ((uint64_t) (sector) << 9LL) + hdd_images[id].base, SEEK_SET) == -1)) { hdd_image_log("Hard disk image %i: Read error during seek\n", id); @@ -582,8 +585,11 @@ hdd_image_write(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer) size_t num_write; if (hdd_images[id].type == HDD_IMAGE_VHD) { - non_transferred_sectors = mvhd_write_sectors(hdd_images[id].vhd, sector, count, buffer); - hdd_images[id].pos = sector + count - non_transferred_sectors - 1; + hdd_images[id].vhd->error = 0; + non_transferred_sectors = mvhd_write_sectors(hdd_images[id].vhd, sector, count, buffer); + hdd_images[id].pos = sector + count - non_transferred_sectors - 1; + if (hdd_images[id].vhd->error) + return -1; } else { if (!hdd_images[id].file || (fseeko64(hdd_images[id].file, ((uint64_t) (sector) << 9LL) + hdd_images[id].base, SEEK_SET) == -1)) { hdd_image_log("Hard disk image %i: Write error during seek\n", id); @@ -621,8 +627,11 @@ int hdd_image_zero(uint8_t id, uint32_t sector, uint32_t count) { if (hdd_images[id].type == HDD_IMAGE_VHD) { + hdd_images[id].vhd->error = 0; int non_transferred_sectors = mvhd_format_sectors(hdd_images[id].vhd, sector, count); hdd_images[id].pos = sector + count - non_transferred_sectors - 1; + if (hdd_images[id].vhd->error) + return -1; } else { memset(empty_sector, 0, 512); diff --git a/src/disk/minivhd/internal.h b/src/disk/minivhd/internal.h index d3f930110..4caef7c47 100644 --- a/src/disk/minivhd/internal.h +++ b/src/disk/minivhd/internal.h @@ -115,6 +115,7 @@ typedef struct MVHDSparseHeader { struct MVHDMeta { FILE* f; bool readonly; + bool error; char filename[MVHD_MAX_PATH_BYTES]; struct MVHDMeta* parent; MVHDFooter footer; @@ -271,7 +272,7 @@ struct MVHDMeta* mvhd_create_fixed_raw(const char* path, FILE* raw_img, uint64_t * \param [in] f File to write sectors to * \param [in] sector_count The number of sectors to write */ -void mvhd_write_empty_sectors(FILE* f, int sector_count); +bool mvhd_write_empty_sectors(FILE* f, int sector_count); /** * \brief Read a fixed VHD image diff --git a/src/disk/minivhd/minivhd_io.c b/src/disk/minivhd/minivhd_io.c index 1a349dbc4..cdf6694a8 100644 --- a/src/disk/minivhd/minivhd_io.c +++ b/src/disk/minivhd/minivhd_io.c @@ -82,15 +82,18 @@ check_sectors(uint32_t offset, int num_sectors, uint32_t total_sectors, int *tra } } -void +bool mvhd_write_empty_sectors(FILE *f, int sector_count) { uint8_t zero_bytes[MVHD_SECTOR_SIZE] = {0}; - for (int i = 0; i < sector_count; i++) - fwrite(zero_bytes, sizeof zero_bytes, 1, f); + for (int i = 0; i < sector_count; i++) { + if (!fwrite(zero_bytes, sizeof zero_bytes, 1, f)) + return 0; + } fflush(f); + return 1; } /** @@ -107,7 +110,8 @@ read_sect_bitmap(MVHDMeta *vhdm, int blk) { if (vhdm->block_offset[blk] != MVHD_SPARSE_BLK) { mvhd_fseeko64(vhdm->f, (uint64_t)vhdm->block_offset[blk] * MVHD_SECTOR_SIZE, SEEK_SET); - (void) !fread(vhdm->bitmap.curr_bitmap, vhdm->bitmap.sector_count * MVHD_SECTOR_SIZE, 1, vhdm->f); + if (!fread(vhdm->bitmap.curr_bitmap, vhdm->bitmap.sector_count * MVHD_SECTOR_SIZE, 1, vhdm->f)) + vhdm->error = 1; } else memset(vhdm->bitmap.curr_bitmap, 0, vhdm->bitmap.sector_count * MVHD_SECTOR_SIZE); @@ -124,8 +128,10 @@ write_curr_sect_bitmap(MVHDMeta* vhdm) { if (vhdm->bitmap.curr_block >= 0) { int64_t abs_offset = (int64_t)vhdm->block_offset[vhdm->bitmap.curr_block] * MVHD_SECTOR_SIZE; - mvhd_fseeko64(vhdm->f, abs_offset, SEEK_SET); - fwrite(vhdm->bitmap.curr_bitmap, MVHD_SECTOR_SIZE, vhdm->bitmap.sector_count, vhdm->f); + if (mvhd_fseeko64(vhdm->f, abs_offset, SEEK_SET) == -1) + vhdm->error = 1; + if (!fwrite(vhdm->bitmap.curr_bitmap, MVHD_SECTOR_SIZE, vhdm->bitmap.sector_count, vhdm->f)) + vhdm->error = 1; } } @@ -141,8 +147,10 @@ write_bat_entry(MVHDMeta *vhdm, int blk) uint64_t table_offset = vhdm->sparse.bat_offset + ((uint64_t)blk * sizeof *vhdm->block_offset); uint32_t offset = mvhd_to_be32(vhdm->block_offset[blk]); - mvhd_fseeko64(vhdm->f, table_offset, SEEK_SET); - fwrite(&offset, sizeof offset, 1, vhdm->f); + if (mvhd_fseeko64(vhdm->f, table_offset, SEEK_SET) == -1) + vhdm->error = 1; + if (!fwrite(&offset, sizeof offset, 1, vhdm->f)) + vhdm->error = 1; fflush(vhdm->f); } @@ -173,7 +181,8 @@ create_block(MVHDMeta *vhdm, int blk) if (!mvhd_is_conectix_str(footer)) { /* Oh dear. We use the header instead, since something has gone wrong at the footer */ mvhd_fseeko64(vhdm->f, 0, SEEK_SET); - (void) !fread(footer, sizeof footer, 1, vhdm->f); + if (!fread(footer, sizeof footer, 1, vhdm->f)) + vhdm->error = 1; mvhd_fseeko64(vhdm->f, 0, SEEK_END); } @@ -182,20 +191,25 @@ create_block(MVHDMeta *vhdm, int blk) /* Yikes! We're supposed to be on a sector boundary. Add some padding */ int64_t padding_amount = ((int64_t) MVHD_SECTOR_SIZE) - (abs_offset % MVHD_SECTOR_SIZE); uint8_t zero_byte = 0; - for (int i = 0; i < padding_amount; i++) - fwrite(&zero_byte, sizeof zero_byte, 1, vhdm->f); + for (int i = 0; i < padding_amount; i++) { + if (!fwrite(&zero_byte, sizeof zero_byte, 1, vhdm->f)) + vhdm->error = 1; + } abs_offset += padding_amount; } uint32_t sect_offset = (uint32_t)(abs_offset / MVHD_SECTOR_SIZE); int blk_size_sectors = vhdm->sparse.block_sz / MVHD_SECTOR_SIZE; - mvhd_write_empty_sectors(vhdm->f, vhdm->bitmap.sector_count + blk_size_sectors); + if (!mvhd_write_empty_sectors(vhdm->f, vhdm->bitmap.sector_count + blk_size_sectors)) + vhdm->error = 1; /* Add a bit of padding. That's what Windows appears to do, although it's not strictly necessary... */ - mvhd_write_empty_sectors(vhdm->f, 5); + if (!mvhd_write_empty_sectors(vhdm->f, 5)) + vhdm->error = 1; /* And we finish with the footer */ - fwrite(footer, sizeof footer, 1, vhdm->f); + if (!fwrite(footer, sizeof footer, 1, vhdm->f)) + vhdm->error = 1; /* We no longer have a sparse block. Update that BAT! */ vhdm->block_offset[blk] = sect_offset; @@ -214,8 +228,10 @@ mvhd_fixed_read(MVHDMeta *vhdm, uint32_t offset, int num_sectors, void *out_buff check_sectors(offset, num_sectors, total_sectors, &transfer_sectors, &truncated_sectors); addr = ((int64_t) offset) * MVHD_SECTOR_SIZE; - mvhd_fseeko64(vhdm->f, addr, SEEK_SET); - (void) !fread(out_buff, transfer_sectors * MVHD_SECTOR_SIZE, 1, vhdm->f); + if (mvhd_fseeko64(vhdm->f, addr, SEEK_SET) == -1) + vhdm->error = 1; + if (!fread(out_buff, transfer_sectors * MVHD_SECTOR_SIZE, 1, vhdm->f)) + vhdm->error = 1; return truncated_sectors; } @@ -245,17 +261,20 @@ mvhd_sparse_read(MVHDMeta *vhdm, uint32_t offset, int num_sectors, void *out_buf prev_blk = blk; if (vhdm->bitmap.curr_block != blk) { read_sect_bitmap(vhdm, blk); - mvhd_fseeko64(vhdm->f, (uint64_t)sib * MVHD_SECTOR_SIZE, SEEK_CUR); + if (mvhd_fseeko64(vhdm->f, (uint64_t)sib * MVHD_SECTOR_SIZE, SEEK_CUR) == -1) + vhdm->error = 1; } else { addr = (((int64_t) vhdm->block_offset[blk]) + vhdm->bitmap.sector_count + sib) * MVHD_SECTOR_SIZE; - mvhd_fseeko64(vhdm->f, addr, SEEK_SET); + if (mvhd_fseeko64(vhdm->f, addr, SEEK_SET) == -1) + vhdm->error = 1; } } - if (VHD_TESTBIT(vhdm->bitmap.curr_bitmap, sib)) - (void) !fread(buff, MVHD_SECTOR_SIZE, 1, vhdm->f); - else { + if (VHD_TESTBIT(vhdm->bitmap.curr_bitmap, sib)) { + if (!fread(buff, MVHD_SECTOR_SIZE, 1, vhdm->f)) + vhdm->error = 1; + } else { memset(buff, 0, MVHD_SECTOR_SIZE); mvhd_fseeko64(vhdm->f, MVHD_SECTOR_SIZE, SEEK_CUR); } @@ -301,6 +320,10 @@ mvhd_diff_read(MVHDMeta *vhdm, uint32_t offset, int num_sectors, void *out_buff) mvhd_sparse_read(curr_vhdm, s, 1, buff); else mvhd_fixed_read(curr_vhdm, s, 1, buff); + if (curr_vhdm->error) { + curr_vhdm->error = 0; + vhdm->error = 1; + } curr_vhdm = vhdm; buff += MVHD_SECTOR_SIZE; @@ -320,8 +343,10 @@ mvhd_fixed_write(MVHDMeta *vhdm, uint32_t offset, int num_sectors, void *in_buff check_sectors(offset, num_sectors, total_sectors, &transfer_sectors, &truncated_sectors); addr = (int64_t)offset * MVHD_SECTOR_SIZE; - mvhd_fseeko64(vhdm->f, addr, SEEK_SET); - fwrite(in_buff, transfer_sectors * MVHD_SECTOR_SIZE, 1, vhdm->f); + if (mvhd_fseeko64(vhdm->f, addr, SEEK_SET) == -1) + vhdm->error = 1; + if (!fwrite(in_buff, transfer_sectors * MVHD_SECTOR_SIZE, 1, vhdm->f)) + vhdm->error = 1; fflush(vhdm->f); return truncated_sectors; @@ -364,16 +389,19 @@ mvhd_sparse_diff_write(MVHDMeta *vhdm, uint32_t offset, int num_sectors, void *i if (blk != prev_blk) { if (vhdm->bitmap.curr_block != blk) { read_sect_bitmap(vhdm, blk); - mvhd_fseeko64(vhdm->f, (uint64_t)sib * MVHD_SECTOR_SIZE, SEEK_CUR); + if (mvhd_fseeko64(vhdm->f, (uint64_t)sib * MVHD_SECTOR_SIZE, SEEK_CUR) == -1) + vhdm->error = 1; } else { addr = (((int64_t) vhdm->block_offset[blk]) + vhdm->bitmap.sector_count + sib) * MVHD_SECTOR_SIZE; - mvhd_fseeko64(vhdm->f, addr, SEEK_SET); + if (mvhd_fseeko64(vhdm->f, addr, SEEK_SET) == -1) + vhdm->error = 1; } prev_blk = blk; } - fwrite(buff, MVHD_SECTOR_SIZE, 1, vhdm->f); + if (!fwrite(buff, MVHD_SECTOR_SIZE, 1, vhdm->f)) + vhdm->error = 1; VHD_SETBIT(vhdm->bitmap.curr_bitmap, sib); buff += MVHD_SECTOR_SIZE; }