diff --git a/README.md b/README.md index 080e2d1c9..c2e7b8e97 100644 --- a/README.md +++ b/README.md @@ -55,5 +55,5 @@ Donations We do not charge you for the emulator but donations are still welcome: https://paypal.me/86Box. -You can now also support the project on Pateron: +You can now also support the project on Patreon: https://www.patreon.com/86box. diff --git a/src/chipset/intel_4x0.c b/src/chipset/intel_4x0.c index 7d5c6f43c..492b4ef4f 100644 --- a/src/chipset/intel_4x0.c +++ b/src/chipset/intel_4x0.c @@ -1571,7 +1571,7 @@ static void regs[0x7a] = (info->local >> 8) & 0xff; dev->max_func = (regs[0x7a] & 0x02) ? 0 : 1; - regs[0x02] = 0xa0; regs[0x03] = 0x71; /* 82443GX */ + regs[0x02] = (regs[0x7a] & 0x02) ? 0xa2 : 0xa0; regs[0x03] = 0x71; /* 82443GX */ regs[0x06] = (regs[0x7a] & 0x02) ? 0x00 : 0x10; regs[0x08] = 0x02; regs[0x10] = 0x08; diff --git a/src/chipset/opti291.c b/src/chipset/opti291.c index cad4341a9..f9dadc72f 100644 --- a/src/chipset/opti291.c +++ b/src/chipset/opti291.c @@ -35,33 +35,41 @@ typedef struct { uint8_t index, regs[256]; + port_92_t *port_92; } opti291_t; static void opti291_recalc(opti291_t *dev) { uint32_t base; - uint32_t i, shflags, write = 0; - + uint32_t i, shflags, write, writef = 0; + + + writef = (dev->regs[0x27] & 0x80) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; + if (!(dev->regs[0x23] & 0x40)) + mem_set_mem_state(0xf0000, 0x10000, MEM_READ_INTERNAL | writef); + else + mem_set_mem_state(0xf0000, 0x10000, MEM_READ_EXTANY | writef); + for (i = 0; i < 4; i++) { base = 0xe0000 + (i << 14); shflags = (dev->regs[0x24] & (1 << (i+4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; - shflags |= (dev->regs[0x24] & (1 << (i))) ? write : MEM_WRITE_EXTANY; - write = (dev->regs[0x27] & 0x40) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; + write = (dev->regs[0x24] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; + shflags |= (dev->regs[0x27] & 0x40) ? MEM_WRITE_DISABLED : write; mem_set_mem_state(base, 0x4000, shflags); } for (i = 0; i < 4; i++) { base = 0xd0000 + (i << 14); shflags = (dev->regs[0x25] & (1 << (i+4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; - shflags |= (dev->regs[0x25] & (1 << (i))) ? write : MEM_WRITE_EXTANY; - write = (dev->regs[0x27] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; + write = (dev->regs[0x25] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; + shflags |= (dev->regs[0x27] & 0x20) ? MEM_WRITE_DISABLED : write; mem_set_mem_state(base, 0x4000, shflags); } for (i = 0; i < 4; i++) { base = 0xc0000 + (i << 14); shflags = (dev->regs[0x26] & (1 << (i+4))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; - shflags |= (dev->regs[0x26] & (1 << i)) ? write : MEM_WRITE_EXTANY; - write = (dev->regs[0x27] & 0x10) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL; + write = (dev->regs[0x26] & (1 << i)) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; + shflags |= (dev->regs[0x27] & 0x10) ? MEM_WRITE_DISABLED : write; mem_set_mem_state(base, 0x4000, shflags); } flushmmucache(); @@ -83,10 +91,11 @@ opti291_write(uint16_t addr, uint8_t val, void *priv) case 0x21: cpu_update_waitstates(); break; + case 0x23: case 0x24: case 0x25: case 0x26: - case 0x27: + case 0x27: opti291_recalc(dev); break; } @@ -103,6 +112,7 @@ opti291_read(uint16_t addr, void *priv) switch (addr) { case 0x24: +// pclog("OPTi 291: read from dev->regs[%02x]\n", dev->index); ret = dev->regs[dev->index]; break; } @@ -128,7 +138,8 @@ opti291_init(const device_t *info) io_sethandler(0x022, 0x0001, opti291_read, NULL, NULL, opti291_write, NULL, NULL, dev); io_sethandler(0x024, 0x0001, opti291_read, NULL, NULL, opti291_write, NULL, NULL, dev); - + dev->regs[0x23] = 0x40; + dev->port_92 = device_add(&port_92_device); opti291_recalc(dev); return dev; diff --git a/src/chipset/opti5x7.c b/src/chipset/opti5x7.c index af224437d..d851da766 100644 --- a/src/chipset/opti5x7.c +++ b/src/chipset/opti5x7.c @@ -41,6 +41,27 @@ typedef struct port_92_t *port_92; } opti5x7_t; + +#ifdef ENABLE_OPTI5X7_LOG +int opti5x7_do_log = ENABLE_OPTI5X7_LOG; + + +static void +opti5x7_log(const char *fmt, ...) +{ + va_list ap; + + if (opti5x7_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } +} +#else +#define opti5x7_log(fmt, ...) +#endif + + static void opti5x7_recalc(opti5x7_t *dev) { @@ -81,7 +102,7 @@ static void opti5x7_write(uint16_t addr, uint8_t val, void *priv) { opti5x7_t *dev = (opti5x7_t *) priv; - pclog("Write %02x to OPTi 5x7 address %02x\n", val, addr); + opti5x7_log("Write %02x to OPTi 5x7 address %02x\n", val, addr); switch (addr) { case 0x22: @@ -113,7 +134,7 @@ opti5x7_read(uint16_t addr, void *priv) switch (addr) { case 0x24: - pclog("Read from OPTi 5x7 register %02x\n", dev->idx); + opti5x7_log("Read from OPTi 5x7 register %02x\n", dev->idx); ret = dev->regs[dev->idx]; break; } diff --git a/src/chipset/stpc.c b/src/chipset/stpc.c index a4dc8df96..4e6b4cb9c 100644 --- a/src/chipset/stpc.c +++ b/src/chipset/stpc.c @@ -26,10 +26,15 @@ #include <86box/io.h> #include <86box/rom.h> #include <86box/pci.h> +#include <86box/pic.h> +#include <86box/timer.h> +#include <86box/pit.h> #include <86box/device.h> #include <86box/keyboard.h> #include <86box/port_92.h> #include <86box/usb.h> +#include <86box/hdc_ide.h> +#include <86box/hdc_ide_sff8038i.h> #include <86box/chipset.h> @@ -61,10 +66,11 @@ typedef struct stpc_t /* PCI devices */ uint8_t pci_conf[4][256]; usb_t *usb; + int ide_slot; + sff8038i_t *bm[2]; } stpc_t; -#define ENABLE_STPC_LOG 1 #ifdef ENABLE_STPC_LOG int stpc_do_log = ENABLE_STPC_LOG; @@ -104,7 +110,7 @@ stpc_recalcmapping(stpc_t *dev) size = 0x4000; base = 0xc0000 + (size * ((reg * 4) + bitpair)); } - stpc_log("STPC: Shadowing for %05x-%05x (reg %02x bp %d wmask %02x rmask %02x) =", base, base + size - 1, 0x25 + reg, bitpair, 1 << (bitpair * 2), 1 << ((bitpair * 2) + 1)); + stpc_log("STPC: Shadowing for %05x-%05x (reg %02X bp %d wmask %02X rmask %02X) =", base, base + size - 1, 0x25 + reg, bitpair, 1 << (bitpair * 2), 1 << ((bitpair * 2) + 1)); state = 0; if (dev->regs[0x25 + reg] & (1 << (bitpair * 2))) { @@ -146,7 +152,7 @@ stpc_host_write(uint16_t addr, uint8_t val, void *priv) { stpc_t *dev = (stpc_t *) priv; - stpc_log("STPC: host_write(%04x, %02x)\n", addr, val); + stpc_log("STPC: host_write(%04X, %02X)\n", addr, val); if (addr == dev->host_base) dev->host_offset = val; @@ -168,7 +174,7 @@ stpc_host_read(uint16_t addr, void *priv) else ret = 0xff; - stpc_log("STPC: host_read(%04x) = %02x\n", addr, ret); + stpc_log("STPC: host_read(%04X) = %02X\n", addr, ret); return ret; } @@ -178,7 +184,7 @@ stpc_localbus_write(uint16_t addr, uint8_t val, void *priv) { stpc_t *dev = (stpc_t *) priv; - stpc_log("STPC: localbus_write(%04x, %02x)\n", addr, val); + stpc_log("STPC: localbus_write(%04X, %02X)\n", addr, val); if (addr == dev->localbus_base) dev->localbus_offset = val; @@ -200,7 +206,7 @@ stpc_localbus_read(uint16_t addr, void *priv) else ret = 0xff; - stpc_log("STPC: localbus_read(%04x) = %02x\n", addr, ret); + stpc_log("STPC: localbus_read(%04X) = %02X\n", addr, ret); return ret; } @@ -210,7 +216,7 @@ stpc_nb_write(int func, int addr, uint8_t val, void *priv) { stpc_t *dev = (stpc_t *) priv; - stpc_log("STPC: nb_write(%d, %02x, %02x)\n", func, addr, val); + stpc_log("STPC: nb_write(%d, %02X, %02X)\n", func, addr, val); if (func > 0) return; @@ -250,33 +256,167 @@ stpc_nb_read(int func, int addr, void *priv) else ret = dev->pci_conf[0][addr]; - stpc_log("STPC: nb_read(%d, %02x) = %02x\n", func, addr, ret); + stpc_log("STPC: nb_read(%d, %02X) = %02X\n", func, addr, ret); return ret; } +static void +stpc_ide_handlers(stpc_t *dev, int bus) +{ + uint16_t main, side; + + if (bus & 0x01) { + ide_pri_disable(); + + if (dev->pci_conf[2][0x09] & 0x01) { + main = (dev->pci_conf[2][0x11] << 8) | (dev->pci_conf[2][0x10] & 0xf8); + side = ((dev->pci_conf[2][0x15] << 8) | (dev->pci_conf[2][0x14] & 0xfc)) + 2; + } else { + main = 0x1f0; + side = 0x3f6; + } + + ide_set_base(0, main); + ide_set_side(0, side); + + stpc_log("STPC: IDE primary main %04X side %04X enable ", main, side); + if ((dev->pci_conf[2][0x04] & 0x01) && !(dev->pci_conf[2][0x48] & 0x04)) { + stpc_log("1\n"); + ide_pri_enable(); + } else { + stpc_log("0\n"); + } + } + + if (bus & 0x02) { + ide_sec_disable(); + + if (dev->pci_conf[2][0x09] & 0x04) { + main = (dev->pci_conf[2][0x19] << 8) | (dev->pci_conf[2][0x18] & 0xf8); + side = ((dev->pci_conf[2][0x1d] << 8) | (dev->pci_conf[2][0x1c] & 0xfc)) + 2; + } else { + main = 0x170; + side = 0x376; + } + + ide_set_base(1, main); + ide_set_side(1, side); + + stpc_log("STPC: IDE secondary main %04X side %04X enable ", main, side); + if ((dev->pci_conf[2][0x04] & 0x01) && !(dev->pci_conf[2][0x48] & 0x08)) { + stpc_log("1\n"); + ide_sec_enable(); + } else { + stpc_log("0\n"); + } + } +} + + +static void +stpc_ide_bm_handlers(stpc_t *dev) +{ + uint16_t base = (dev->pci_conf[2][0x20] & 0xf0) | (dev->pci_conf[2][0x21] << 8); + + sff_bus_master_handler(dev->bm[0], (dev->pci_conf[2][0x04] & 1), base); + sff_bus_master_handler(dev->bm[1], (dev->pci_conf[2][0x04] & 1), base + 8); +} + + static void stpc_ide_write(int func, int addr, uint8_t val, void *priv) { stpc_t *dev = (stpc_t *) priv; - stpc_log("STPC: ide_write(%d, %02x, %02x)\n", func, addr, val); + stpc_log("STPC: ide_write(%d, %02X, %02X)\n", func, addr, val); if (func > 0) return; switch (addr) { - case 0x00: case 0x01: case 0x02: case 0x03: - case 0x04: case 0x06: case 0x07: case 0x08: - case 0x09: case 0x0a: case 0x0b: case 0x0e: - return; + case 0x04: + dev->pci_conf[2][addr] = (dev->pci_conf[2][addr] & 0xbe) | (val & 0x41); + stpc_ide_handlers(dev, 0x03); + stpc_ide_bm_handlers(dev); + break; case 0x05: - val &= 0x01; + dev->pci_conf[2][addr] = (val & 0x01); + break; + + case 0x07: + dev->pci_conf[2][addr] &= ~(val & 0x70); + break; + + case 0x09: + dev->pci_conf[2][addr] = (dev->pci_conf[2][addr] & 0x8a) | (val & 0x05); + stpc_ide_handlers(dev, 0x03); + break; + + case 0x10: + dev->pci_conf[2][addr] = (val & 0xf8) | 1; + stpc_ide_handlers(dev, 0x01); + break; + case 0x11: + dev->pci_conf[2][addr] = val; + stpc_ide_handlers(dev, 0x01); + break; + + case 0x14: + dev->pci_conf[2][addr] = (val & 0xfc) | 1; + stpc_ide_handlers(dev, 0x01); + break; + case 0x15: + dev->pci_conf[2][addr] = val; + stpc_ide_handlers(dev, 0x01); + break; + + case 0x18: + dev->pci_conf[2][addr] = (val & 0xf8) | 1; + stpc_ide_handlers(dev, 0x02); + break; + case 0x19: + dev->pci_conf[2][addr] = val; + stpc_ide_handlers(dev, 0x02); + break; + + case 0x1c: + dev->pci_conf[2][addr] = (val & 0xfc) | 1; + stpc_ide_handlers(dev, 0x02); + break; + case 0x1d: + dev->pci_conf[2][addr] = val; + stpc_ide_handlers(dev, 0x02); + break; + + case 0x20: + dev->pci_conf[2][0x20] = (val & 0xf0) | 1; + stpc_ide_bm_handlers(dev); + break; + case 0x21: + dev->pci_conf[2][0x21] = val; + stpc_ide_bm_handlers(dev); + break; + + case 0x40: case 0x41: case 0x42: case 0x43: + case 0x44: case 0x45: case 0x46: case 0x47: + dev->pci_conf[2][addr] = val; + break; + + case 0x48: + dev->pci_conf[2][addr] = (val & 0x8c) & ~(val & 0x03); + stpc_ide_handlers(dev, 0x03); + if (val & 0x02) { + sff_bus_master_set_irq(0x01, dev->bm[0]); + sff_bus_master_set_irq(0x01, dev->bm[1]); + } + if (val & 0x01) { + sff_bus_master_set_irq(0x00, dev->bm[0]); + sff_bus_master_set_irq(0x00, dev->bm[1]); + } break; } - - dev->pci_conf[2][addr] = val; } @@ -288,10 +428,16 @@ stpc_ide_read(int func, int addr, void *priv) if (func > 0) ret = 0xff; - else + else { ret = dev->pci_conf[2][addr]; + if (addr == 0x48) { + ret &= 0xfc; + ret |= (!!(dev->bm[0]->status & 0x04)); + ret |= ((!!(dev->bm[1]->status & 0x04)) << 1); + } + } - stpc_log("STPC: ide_read(%d, %02x) = %02x\n", func, addr, ret); + stpc_log("STPC: ide_read(%d, %02X) = %02X\n", func, addr, ret); return ret; } @@ -306,7 +452,7 @@ stpc_isab_write(int func, int addr, uint8_t val, void *priv) return; } - stpc_log("STPC: isab_write(%d, %02x, %02x)\n", func, addr, val); + stpc_log("STPC: isab_write(%d, %02X, %02X)\n", func, addr, val); if (func > 0) return; @@ -339,7 +485,7 @@ stpc_isab_read(int func, int addr, void *priv) else ret = dev->pci_conf[1][addr]; - stpc_log("STPC: isab_read(%d, %02x) = %02x\n", func, addr, ret); + stpc_log("STPC: isab_read(%d, %02X) = %02X\n", func, addr, ret); return ret; } @@ -349,7 +495,7 @@ stpc_usb_write(int func, int addr, uint8_t val, void *priv) { stpc_t *dev = (stpc_t *) priv; - stpc_log("STPC: usb_write(%d, %02x, %02x)\n", func, addr, val); + stpc_log("STPC: usb_write(%d, %02X, %02X)\n", func, addr, val); if (func > 0) return; @@ -391,7 +537,7 @@ stpc_usb_read(int func, int addr, void *priv) else ret = dev->pci_conf[3][addr]; - stpc_log("STPC: usb_read(%d, %02x) = %02x\n", func, addr, ret); + stpc_log("STPC: usb_read(%d, %02X) = %02X\n", func, addr, ret); return ret; } @@ -399,7 +545,7 @@ stpc_usb_read(int func, int addr, void *priv) static void stpc_remap_host(stpc_t *dev, uint16_t host_base) { - stpc_log("STPC: Remapping host bus from %04x to %04x\n", dev->host_base, host_base); + stpc_log("STPC: Remapping host bus from %04X to %04X\n", dev->host_base, host_base); io_removehandler(dev->host_base, 5, stpc_host_read, NULL, NULL, stpc_host_write, NULL, NULL, dev); @@ -414,7 +560,7 @@ stpc_remap_host(stpc_t *dev, uint16_t host_base) static void stpc_remap_localbus(stpc_t *dev, uint16_t localbus_base) { - stpc_log("STPC: Remapping local bus from %04x to %04x\n", dev->localbus_base, localbus_base); + stpc_log("STPC: Remapping local bus from %04X to %04X\n", dev->localbus_base, localbus_base); io_removehandler(dev->localbus_base, 5, stpc_localbus_read, NULL, NULL, stpc_localbus_write, NULL, NULL, dev); @@ -431,12 +577,12 @@ stpc_reg_write(uint16_t addr, uint8_t val, void *priv) { stpc_t *dev = (stpc_t *) priv; - stpc_log("STPC: reg_write(%04x, %02x)\n", addr, val); + stpc_log("STPC: reg_write(%04X, %02X)\n", addr, val); if (addr == 0x22) { dev->reg_offset = val; } else { - stpc_log("STPC: regs[%02x] = %02x\n", dev->reg_offset, val); + stpc_log("STPC: regs[%02X] = %02X\n", dev->reg_offset, val); switch (dev->reg_offset) { case 0x12: @@ -477,6 +623,19 @@ stpc_reg_write(uint16_t addr, uint8_t val, void *priv) case 0x36: val &= 0x3f; break; + + case 0x52: case 0x53: case 0x54: case 0x55: + stpc_log("STPC: Set IRQ routing: INT %c -> %d\n", 0x41 + ((dev->reg_offset - 2) & 0x03), (val & 0x80) ? (val & 0xf) : -1); + val &= 0x8f; + pci_set_irq_routing(PCI_INTA + ((dev->reg_offset - 2) & 0x03), (val & 0x80) ? (val & 0xf) : PCI_IRQ_DISABLED); + break; + + case 0x56: case 0x57: + /* ELCR goes here */ + elcr_write(dev->reg_offset, val, NULL); + if (dev->reg_offset == 0x57) + refresh_at_enable = val & 0x01; + break; } dev->regs[dev->reg_offset] = val; @@ -494,10 +653,14 @@ stpc_reg_read(uint16_t addr, void *priv) ret = dev->reg_offset; else if (dev->reg_offset >= 0xc0) return 0xff; /* Cyrix CPU registers: let the CPU code handle those */ - else + else if ((dev->reg_offset == 0x56) || (dev->reg_offset == 0x57)) { + ret = elcr_read(dev->reg_offset, NULL); + if (dev->reg_offset == 0x57) + ret |= (dev->regs[dev->reg_offset] & 0x01); + } else ret = dev->regs[dev->reg_offset]; - stpc_log("STPC: reg_read(%04x) = %02x\n", addr, ret); + stpc_log("STPC: reg_read(%04X) = %02X\n", addr, ret); return ret; } @@ -590,6 +753,7 @@ stpc_setup(stpc_t *dev) dev->pci_conf[2][0x14] = 0x01; dev->pci_conf[2][0x18] = 0x01; dev->pci_conf[2][0x1c] = 0x01; + dev->pci_conf[2][0x20] = 0x01; dev->pci_conf[2][0x40] = 0x60; dev->pci_conf[2][0x41] = 0x97; @@ -616,6 +780,12 @@ stpc_setup(stpc_t *dev) dev->pci_conf[3][0x0e] = 0x40; } + + /* PCI setup */ + pci_set_irq_routing(PCI_INTA, PCI_IRQ_DISABLED); + pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED); + pci_set_irq_routing(PCI_INTC, PCI_IRQ_DISABLED); + pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED); } @@ -641,14 +811,23 @@ stpc_init(const device_t *info) dev->local = info->local; pci_add_card(0x0B, stpc_nb_read, stpc_nb_write, dev); - pci_add_card(0x0C, stpc_isab_read, stpc_isab_write, dev); + dev->ide_slot = pci_add_card(0x0C, stpc_isab_read, stpc_isab_write, dev); if (dev->local & STPC_IDE_ATLAS) - pci_add_card(0x0D, stpc_ide_read, stpc_ide_write, dev); + dev->ide_slot = pci_add_card(0x0D, stpc_ide_read, stpc_ide_write, dev); if (dev->local & STPC_USB) { dev->usb = device_add(&usb_device); pci_add_card(0x0E, stpc_usb_read, stpc_usb_write, dev); } + dev->bm[0] = device_add_inst(&sff8038i_device, 1); + dev->bm[1] = device_add_inst(&sff8038i_device, 2); + + sff_set_irq_mode(dev->bm[0], 0, 0); + sff_set_irq_mode(dev->bm[0], 1, 0); + + sff_set_irq_mode(dev->bm[1], 0, 0); + sff_set_irq_mode(dev->bm[1], 1, 0); + stpc_setup(dev); stpc_reset(dev); @@ -664,6 +843,9 @@ stpc_init(const device_t *info) device_add(&port_92_pci_device); + pci_elcr_io_disable(); + refresh_at_enable = 0; + return dev; } diff --git a/src/device/keyboard_at.c b/src/device/keyboard_at.c index ee5b0f496..8415538c9 100644 --- a/src/device/keyboard_at.c +++ b/src/device/keyboard_at.c @@ -2207,6 +2207,7 @@ kbd_read(uint16_t port, void *priv) { atkbd_t *dev = (atkbd_t *)priv; uint8_t ret = 0xff; + static int flip_flop = 0; if ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF) sub_cycles(ISA_CYCLES(8)); @@ -2244,11 +2245,14 @@ kbd_read(uint16_t port, void *priv) else ret &= ~0x04; } +#ifdef USE_DYNAREC + flip_flop = (flip_flop + 1) & 3; + if (cpu_use_dynarec && (flip_flop == 3)) + update_tsc(); +#endif break; case 0x64: - // ret = (dev->status & 0xFB) | (keyboard_mode & CCB_SYSTEM); - // ret |= STAT_UNLOCKED; ret = (dev->status & 0xFB); if (dev->mem[0] & STAT_SYSFLAG) ret |= STAT_SYSFLAG; diff --git a/src/floppy/fdc.c b/src/floppy/fdc.c index 3be66cf0f..47784982a 100644 --- a/src/floppy/fdc.c +++ b/src/floppy/fdc.c @@ -1887,7 +1887,7 @@ fdc_data(fdc_t *fdc, uint8_t data) void fdc_finishread(fdc_t *fdc) { - fdc->inread = 0; + fdc->inread = 0; } diff --git a/src/include/86box/machine.h b/src/include/86box/machine.h index 918d007f5..43e9ad792 100644 --- a/src/include/86box/machine.h +++ b/src/include/86box/machine.h @@ -426,6 +426,7 @@ extern int machine_at_s370slm_init(const machine_t *); extern int machine_at_cubx_init(const machine_t *); extern int machine_at_atc7020bxii_init(const machine_t *); extern int machine_at_ambx133_init(const machine_t *); +extern int machine_at_awo671r_init(const machine_t *); extern int machine_at_63a_init(const machine_t *); extern int machine_at_s370sba_init(const machine_t *); extern int machine_at_apas3_init(const machine_t *); diff --git a/src/include/86box/pci.h b/src/include/86box/pci.h index 7fb118195..830324c1a 100644 --- a/src/include/86box/pci.h +++ b/src/include/86box/pci.h @@ -103,6 +103,9 @@ extern uint8_t trc_read(uint16_t port, void *priv); extern void trc_write(uint16_t port, uint8_t val, void *priv); extern void pci_elcr_set_enabled(int enabled); +extern void pci_elcr_io_disable(void); +extern void elcr_write(uint16_t port, uint8_t val, void *priv); +extern uint8_t elcr_read(uint16_t port, void *priv); #endif /*EMU_PCI_H*/ diff --git a/src/include/86box/pit.h b/src/include/86box/pit.h index 4684c9632..366be2ad6 100644 --- a/src/include/86box/pit.h +++ b/src/include/86box/pit.h @@ -59,6 +59,8 @@ extern uint64_t PITCONST, ISACONST, VGACONST2, RTCCONST, ACPICONST; +extern int refresh_at_enable; + /* Gets a counter's count. */ extern uint16_t pit_ctr_get_count(ctr_t *ctr); diff --git a/src/include/86box/version.h b/src/include/86box/version.h index ee5dbba80..7691bdab4 100644 --- a/src/include/86box/version.h +++ b/src/include/86box/version.h @@ -25,5 +25,5 @@ #define COPYRIGHT_YEAR "2020" /* Web URL info. */ -#define EMU_SITE L"86box.github.io" +#define EMU_SITE L"86box.net" #define EMU_ROMS_URL L"https://github.com/86Box/roms/releases/latest" \ No newline at end of file diff --git a/src/include/86box/vid_voodoo_codegen_x86-64.h b/src/include/86box/vid_voodoo_codegen_x86-64.h index cecf3a539..f684176aa 100644 --- a/src/include/86box/vid_voodoo_codegen_x86-64.h +++ b/src/include/86box/vid_voodoo_codegen_x86-64.h @@ -41,7 +41,8 @@ static int last_block[2] = {0, 0}; static int next_block_to_write[2] = {0, 0}; #define addbyte(val) \ - code_block[block_pos++] = val; \ + if (block_pos < BLOCK_SIZE) \ + code_block[block_pos++] = val; \ if (block_pos >= BLOCK_SIZE) \ fatal("Over!\n") diff --git a/src/include/86box/vid_voodoo_codegen_x86.h b/src/include/86box/vid_voodoo_codegen_x86.h index 6cf2562d0..15c9951c1 100644 --- a/src/include/86box/vid_voodoo_codegen_x86.h +++ b/src/include/86box/vid_voodoo_codegen_x86.h @@ -39,7 +39,8 @@ static int last_block[2] = {0, 0}; static int next_block_to_write[2] = {0, 0}; #define addbyte(val) \ - code_block[block_pos++] = val; \ + if (block_pos < BLOCK_SIZE) \ + code_block[block_pos++] = val; \ if (block_pos >= BLOCK_SIZE) \ fatal("Over!\n") diff --git a/src/io.c b/src/io.c index f78dc268e..b9dfcf370 100644 --- a/src/io.c +++ b/src/io.c @@ -283,18 +283,19 @@ uint8_t inb(uint16_t port) { uint8_t ret = 0xff; - io_t *p; + io_t *p, *q; int found = 0; int qfound = 0; p = io[port]; while(p) { + q = p->next; if (p->inb) { ret &= p->inb(port, p->priv); found |= 1; qfound++; } - p = p->next; + p = q; } if (port & 0x80) @@ -316,18 +317,19 @@ inb(uint16_t port) void outb(uint16_t port, uint8_t val) { - io_t *p; + io_t *p, *q; int found = 0; int qfound = 0; p = io[port]; while(p) { + q = p->next; if (p->outb) { p->outb(port, val, p->priv); found |= 1; qfound++; } - p = p->next; + p = q; } if (!found) { @@ -347,7 +349,7 @@ outb(uint16_t port, uint8_t val) uint16_t inw(uint16_t port) { - io_t *p; + io_t *p, *q; uint16_t ret = 0xffff; int found = 0; int qfound = 0; @@ -356,12 +358,13 @@ inw(uint16_t port) p = io[port]; while(p) { + q = p->next; if (p->inw) { ret &= p->inw(port, p->priv); found |= 2; qfound++; } - p = p->next; + p = q; } ret8[0] = ret & 0xff; @@ -369,12 +372,13 @@ inw(uint16_t port) for (i = 0; i < 2; i++) { p = io[(port + i) & 0xffff]; while(p) { + q = p->next; if (p->inb && !p->inw) { ret8[i] &= p->inb(port + i, p->priv); found |= 1; qfound++; } - p = p->next; + p = q; } } ret = (ret8[1] << 8) | ret8[0]; @@ -398,30 +402,32 @@ inw(uint16_t port) void outw(uint16_t port, uint16_t val) { - io_t *p; + io_t *p, *q; int found = 0; int qfound = 0; int i = 0; p = io[port]; while(p) { + q = p->next; if (p->outw) { p->outw(port, val, p->priv); found |= 2; qfound++; } - p = p->next; + p = q; } for (i = 0; i < 2; i++) { p = io[(port + i) & 0xffff]; while(p) { + q = p->next; if (p->outb && !p->outw) { p->outb(port + i, val >> (i << 3), p->priv); found |= 1; qfound++; } - p = p->next; + p = q; } } @@ -442,7 +448,7 @@ outw(uint16_t port, uint16_t val) uint32_t inl(uint16_t port) { - io_t *p; + io_t *p, *q; uint32_t ret = 0xffffffff; uint16_t ret16[2]; uint8_t ret8[4]; @@ -452,12 +458,13 @@ inl(uint16_t port) p = io[port]; while(p) { + q = p->next; if (p->inl) { ret &= p->inl(port, p->priv); found |= 4; qfound++; } - p = p->next; + p = q; } ret16[0] = ret & 0xffff; @@ -465,12 +472,13 @@ inl(uint16_t port) for (i = 0; i < 4; i += 2) { p = io[(port + i) & 0xffff]; while(p) { + q = p->next; if (p->inw && !p->inl) { ret16[i >> 1] &= p->inw(port + i, p->priv); found |= 2; qfound++; } - p = p->next; + p = q; } } ret = (ret16[1] << 16) | ret16[0]; @@ -482,12 +490,13 @@ inl(uint16_t port) for (i = 0; i < 4; i++) { p = io[(port + i) & 0xffff]; while(p) { + q = p->next; if (p->inb && !p->inw && !p->inl) { ret8[i] &= p->inb(port + i, p->priv); found |= 1; qfound++; } - p = p->next; + p = q; } } ret = (ret8[3] << 24) | (ret8[2] << 16) | (ret8[1] << 8) | ret8[0]; @@ -511,7 +520,7 @@ inl(uint16_t port) void outl(uint16_t port, uint32_t val) { - io_t *p; + io_t *p, *q; int found = 0; int qfound = 0; int i = 0; @@ -519,36 +528,39 @@ outl(uint16_t port, uint32_t val) p = io[port]; if (p) { while(p) { + q = p->next; if (p->outl) { p->outl(port, val, p->priv); found |= 4; qfound++; } - p = p->next; + p = q; } } for (i = 0; i < 4; i += 2) { p = io[(port + i) & 0xffff]; while(p) { + q = p->next; if (p->outw && !p->outl) { p->outw(port + i, val >> (i << 3), p->priv); found |= 2; qfound++; } - p = p->next; + p = q; } } for (i = 0; i < 4; i++) { p = io[(port + i) & 0xffff]; while(p) { + q = p->next; if (p->outb && !p->outw && !p->outl) { p->outb(port + i, val >> (i << 3), p->priv); found |= 1; qfound++; } - p = p->next; + p = q; } } diff --git a/src/machine/m_at.c b/src/machine/m_at.c index 7adc98ecd..9ee653a32 100644 --- a/src/machine/m_at.c +++ b/src/machine/m_at.c @@ -64,6 +64,7 @@ machine_at_common_init_ex(const machine_t *model, int type) { machine_common_init(model); + refresh_at_enable = 1; pit_ctr_set_out_func(&pit->counters[1], pit_refresh_timer_at); pic2_init(); dma16_init(); diff --git a/src/machine/m_at_386dx_486.c b/src/machine/m_at_386dx_486.c index 90e1ac223..e19bd448f 100644 --- a/src/machine/m_at_386dx_486.c +++ b/src/machine/m_at_386dx_486.c @@ -736,7 +736,8 @@ machine_at_pcm5330_init(const machine_t *model) pci_register_slot(0x0B, PCI_CARD_SPECIAL, 0, 0, 0, 0); pci_register_slot(0x0C, PCI_CARD_SPECIAL, 0, 0, 0, 0); pci_register_slot(0x0D, PCI_CARD_SPECIAL, 0, 0, 0, 0); - pci_register_slot(0x0E, PCI_CARD_SPECIAL, 0, 0, 0, 0); + pci_register_slot(0x0E, PCI_CARD_SPECIAL, 1, 2, 3, 4); + pci_register_slot(0x13, PCI_CARD_NORMAL, 1, 2, 3, 4); device_add(&w83977f_370_device); device_add(&keyboard_ps2_ami_pci_device); device_add(&stpc_atlas_device); diff --git a/src/machine/m_at_socket370.c b/src/machine/m_at_socket370.c index c41737b5e..e377e6878 100644 --- a/src/machine/m_at_socket370.c +++ b/src/machine/m_at_socket370.c @@ -211,6 +211,38 @@ machine_at_ambx133_init(const machine_t *model) return ret; } +int +machine_at_awo671r_init(const machine_t *model) +{ + int ret; + + ret = bios_load_linear(L"roms/machines/awo671r/a08139c.bin", + 0x000c0000, 262144, 0); + + if (bios_only || !ret) + return ret; + + machine_at_common_init_ex(model, 2); + + pci_init(PCI_CONFIG_TYPE_1); + pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); + pci_register_slot(0x09, PCI_CARD_NORMAL, 1, 2, 3, 4); + pci_register_slot(0x0A, PCI_CARD_NORMAL, 2, 3, 4, 1); + pci_register_slot(0x0B, PCI_CARD_NORMAL, 3, 4, 1, 2); + pci_register_slot(0x0C, PCI_CARD_NORMAL, 4, 1, 2, 3); + pci_register_slot(0x0D, PCI_CARD_NORMAL, 2, 3, 4, 1); + pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4); + pci_register_slot(0x01, PCI_CARD_NORMAL, 1, 2, 3, 4); + device_add(&i440bx_device); + device_add(&piix4e_device); + device_add_inst(&w83977ef_device, 1); + device_add_inst(&w83977ef_device, 2); + device_add(&keyboard_ps2_pci_device); + device_add(&sst_flash_39sf020_device); + spd_register(SPD_TYPE_SDRAM, 0x3, 256); + + return ret; +} int machine_at_63a_init(const machine_t *model) diff --git a/src/machine/m_ps1.c b/src/machine/m_ps1.c index 651ef1d25..f308d969a 100644 --- a/src/machine/m_ps1.c +++ b/src/machine/m_ps1.c @@ -506,6 +506,7 @@ ps1_common_init(const machine_t *model) mem_remap_top(384); + refresh_at_enable = 1; pit_ctr_set_out_func(&pit->counters[1], pit_refresh_timer_at); dma16_init(); diff --git a/src/machine/m_ps2_isa.c b/src/machine/m_ps2_isa.c index 9300d05d4..226a3eda4 100644 --- a/src/machine/m_ps2_isa.c +++ b/src/machine/m_ps2_isa.c @@ -178,6 +178,7 @@ machine_ps2_m30_286_init(const machine_t *model) device_add(&fdc_at_ps1_device); + refresh_at_enable = 1; pit_ctr_set_out_func(&pit->counters[1], pit_refresh_timer_at); dma16_init(); device_add(&keyboard_ps2_ps2_device); diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index 3cc76ad1a..61d440920 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -171,10 +171,11 @@ const machine_t machines[] = { { "[NEAT] DTK 386SX clone", "dtk386", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512, 8192, 128, 127, machine_at_neat_init, NULL }, { "[NEAT] Goldstar 386", "goldstar386", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512, 8192, 128, 127, machine_at_goldstar386_init, NULL }, { "[SCAT] KMX-C-02", "kmxc02", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512,16384, 512, 127, machine_at_kmxc02_init, NULL }, - { "[Intel 82335] Shuttle 386SX", "shuttle386sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512, 8192, 128, 127, machine_at_shuttle386sx_init, NULL }, - { "[Intel 82335] ADI 386SX", "adi386sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512, 8192, 128, 127, machine_at_adi386sx_init, NULL }, - { "[OPTi 291] DTK Award 386SX", "awardsx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512, 8192, 128, 127, machine_at_awardsx_init, NULL }, - + + { "[Intel 82335] Shuttle 386SX", "shuttle386sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512, 8192, 128, 127, machine_at_shuttle386sx_init, NULL }, + { "[Intel 82335] ADI 386SX", "adi386sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512, 8192, 128, 127, machine_at_adi386sx_init, NULL }, + { "[OPTi 291] DTK Award 386SX", "awardsx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, MACHINE_ISA | MACHINE_AT, 512, 8192, 128, 127, machine_at_awardsx_init, NULL }, + /* 386SX machines which utilize the MCA bus */ { "[MCA] IBM PS/2 model 55SX", "ibmps2_m55sx", MACHINE_TYPE_386SX, {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"IBM",cpus_IBM486SLC},{"", NULL}}, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_VIDEO, 1, 8, 1, 63, machine_ps2_model_55sx_init, NULL }, @@ -228,10 +229,10 @@ const machine_t machines[] = { { "[SiS 496] Rise Computer R418", "r418", MACHINE_TYPE_486, {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 1, 255, 1, 255, machine_at_r418_init, NULL }, { "[SiS 496] Zida Tomato 4DP", "4dps", MACHINE_TYPE_486, {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 1, 255, 1, 255, machine_at_4dps_init, NULL }, #if defined(DEV_BRANCH) && defined(USE_STPC) - { "[STPC Client] ITOX STAR", "itoxstar", MACHINE_TYPE_486, {{"ST", cpus_STPC6675}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 128, 8, 255, machine_at_itoxstar_init, NULL }, - { "[STPC Consumer-II] Acrosser AR-B1479", "arb1479", MACHINE_TYPE_486, {{"ST", cpus_STPC133}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 32, 160, 8, 255, machine_at_arb1479_init, NULL }, - { "[STPC Elite] Advantech PCM-9340", "pcm9340", MACHINE_TYPE_486, {{"ST", cpus_STPC133}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 32, 32, 0, 255, machine_at_pcm9340_init, NULL }, - { "[STPC Atlas] AAEON PCM-5330", "pcm5330", MACHINE_TYPE_486, {{"ST", cpus_STPC133}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 64, 64, 0, 255, machine_at_pcm5330_init, NULL }, + { "[STPC Client] ITOX STAR", "itoxstar", MACHINE_TYPE_486, {{"ST", cpus_STPC6675}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 128, 8, 255, machine_at_itoxstar_init, NULL }, + { "[STPC Consumer-II] Acrosser AR-B1479", "arb1479", MACHINE_TYPE_486, {{"ST", cpus_STPC133}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 32, 160, 8, 255, machine_at_arb1479_init, NULL }, + { "[STPC Elite] Advantech PCM-9340", "pcm9340", MACHINE_TYPE_486, {{"ST", cpus_STPC133}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 32, 96, 8, 255, machine_at_pcm9340_init, NULL }, + { "[STPC Atlas] AAEON PCM-5330", "pcm5330", MACHINE_TYPE_486, {{"ST", cpus_STPC133}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 32, 128, 32, 255, machine_at_pcm5330_init, NULL }, #endif /* Socket 4 machines */ @@ -365,6 +366,7 @@ const machine_t machines[] = { { "[i440BX] ASUS CUBX", "cubx", MACHINE_TYPE_SOCKET370, {{"Intel", cpus_Celeron}, {"VIA", cpus_Cyrix3}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 1024, 8, 255, machine_at_cubx_init, NULL }, { "[i440BX] A-Trend ATC7020BXII", "atc7020bxii", MACHINE_TYPE_SOCKET370, {{"Intel", cpus_Celeron}, {"VIA", cpus_Cyrix3}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 1024, 8, 255, machine_at_atc7020bxii_init, NULL }, { "[i440BX] AmazePC AM-BX133", "ambx133", MACHINE_TYPE_SOCKET370, {{"Intel", cpus_Celeron}, {"VIA", cpus_Cyrix3}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 768, 8, 255, machine_at_ambx133_init, NULL }, + { "[i440BX] AEWIN AW-O671R", "awo671r", MACHINE_TYPE_SOCKET370, {{"Intel", cpus_Celeron}, {"VIA", cpus_Cyrix3}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 512, 8, 255, machine_at_awo671r_init, NULL }, /* 440ZX */ { "[i440ZX] Soltek SL-63A1", "63a", MACHINE_TYPE_SOCKET370, {{"Intel", cpus_Celeron}, {"VIA", cpus_Cyrix3}, {"", NULL}, {"", NULL}, {"", NULL}}, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 512, 8, 255, machine_at_63a_init, NULL }, diff --git a/src/pci.c b/src/pci.c index ace9e14e5..336cd8d2f 100644 --- a/src/pci.c +++ b/src/pci.c @@ -189,7 +189,7 @@ pci_read(uint16_t port, void *priv) } -static void +void elcr_write(uint16_t port, uint8_t val, void *priv) { pci_log("ELCR%i: WRITE %02X\n", port & 1, val); @@ -214,7 +214,7 @@ elcr_write(uint16_t port, uint8_t val, void *priv) } -static uint8_t +uint8_t elcr_read(uint16_t port, void *priv) { pci_log("ELCR%i: READ %02X\n", port & 1, elcr[port & 1]); @@ -641,6 +641,14 @@ pci_elcr_set_enabled(int enabled) } +void +pci_elcr_io_disable(void) +{ + io_removehandler(0x04d0, 0x0002, + elcr_read,NULL,NULL, elcr_write,NULL,NULL, NULL); +} + + static void pci_reset_regs(void) { diff --git a/src/pit.c b/src/pit.c index fec976d79..9e140650d 100644 --- a/src/pit.c +++ b/src/pit.c @@ -53,7 +53,8 @@ uint64_t PITCONST, ISACONST, VGACONST1, VGACONST2, RTCCONST, ACPICONST; -int io_delay = 5; +int refresh_at_enable = 1, + io_delay = 5; int64_t firsttime = 1; @@ -743,7 +744,7 @@ pit_refresh_timer_xt(int new_out, int old_out) void pit_refresh_timer_at(int new_out, int old_out) { - if (new_out && !old_out) + if (refresh_at_enable && new_out && !old_out) ppi.pb ^= 0x10; } diff --git a/src/sio/sio_pc87307.c b/src/sio/sio_pc87307.c index 0921c4677..0a1578c76 100644 --- a/src/sio/sio_pc87307.c +++ b/src/sio/sio_pc87307.c @@ -413,11 +413,11 @@ pc87307_read(uint16_t port, void *priv) ret = dev->cur_reg; else { if (dev->cur_reg >= 0x30) - ret = dev->regs[dev->cur_reg]; + ret = dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30]; else if (dev->cur_reg == 0x24) ret = dev->pcregs[dev->regs[0x23]]; else - ret = dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30]; + ret = dev->regs[dev->cur_reg]; } return ret; diff --git a/src/sio/sio_pc87309.c b/src/sio/sio_pc87309.c index f60d02374..0b55b9655 100644 --- a/src/sio/sio_pc87309.c +++ b/src/sio/sio_pc87309.c @@ -337,9 +337,9 @@ pc87309_read(uint16_t port, void *priv) if (index) ret = dev->cur_reg & 0x1f; else { - if (dev->cur_reg == 8) - ret = 0x70; - else if (dev->cur_reg < 28) + if (dev->cur_reg >= 0x30) + ret = dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30]; + else ret = dev->regs[dev->cur_reg]; }