From 885a92ae62a1f3117e30d01c0e5ad4b62e2542c7 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Sun, 4 Aug 2024 22:28:39 +0200 Subject: [PATCH 01/38] AMD/DC390 SCSI fixes of the day (August 4th, 2024) Ported the latest changes/fixes to the above controller from QEMU and added a bios-less AMD Am53c974 device (non-DC390). The latest changes fix the AMD-branded DOS ASPI drivers on both cards (even without bios). --- src/fifo8.c | 88 +- src/include/86box/fifo8.h | 70 +- src/include/86box/scsi_pcscsi.h | 1 + src/scsi/scsi.c | 1 + src/scsi/scsi_pcscsi.c | 1331 ++++++++++++++++++++----------- 5 files changed, 983 insertions(+), 508 deletions(-) diff --git a/src/fifo8.c b/src/fifo8.c index feef0deb2..9c73b4e82 100644 --- a/src/fifo8.c +++ b/src/fifo8.c @@ -21,14 +21,19 @@ #include <86box/86box.h> #include <86box/fifo8.h> +void +fifo8_reset(Fifo8 *fifo) +{ + fifo->num = 0; + fifo->head = 0; +} + void fifo8_create(Fifo8 *fifo, uint32_t capacity) { - fifo->data = (uint8_t *) malloc(capacity); - memset(fifo->data, 0, capacity); + fifo->data = (uint8_t *) calloc(1, capacity); fifo->capacity = capacity; - fifo->head = 0; - fifo->num = 0; + fifo8_reset(fifo); } void @@ -54,7 +59,7 @@ fifo8_push_all(Fifo8 *fifo, const uint8_t *data, uint32_t num) uint32_t start; uint32_t avail; - assert(fifo->num + num <= fifo->capacity); + assert((fifo->num + num) <= fifo->capacity); start = (fifo->head + fifo->num) % fifo->capacity; @@ -81,25 +86,72 @@ fifo8_pop(Fifo8 *fifo) return ret; } -const uint8_t * -fifo8_pop_buf(Fifo8 *fifo, uint32_t max, uint32_t *num) +static const uint8_t +*fifo8_peekpop_buf(Fifo8 *fifo, uint32_t max, uint32_t *numptr, int do_pop) { - const uint8_t *ret; + uint8_t *ret; + uint32_t num; + + assert((max > 0) && (max <= fifo->num)); + num = MIN(fifo->capacity - fifo->head, max); + ret = &fifo->data[fifo->head]; + + if (do_pop) { + fifo->head += num; + fifo->head %= fifo->capacity; + fifo->num -= num; + } + if (numptr) + *numptr = num; - assert(max > 0 && max <= fifo->num); - *num = MIN(fifo->capacity - fifo->head, max); - ret = &fifo->data[fifo->head]; - fifo->head += *num; - fifo->head %= fifo->capacity; - fifo->num -= *num; return ret; } -void -fifo8_reset(Fifo8 *fifo) +const uint8_t +*fifo8_peek_bufptr(Fifo8 *fifo, uint32_t max, uint32_t *numptr) { - fifo->num = 0; - fifo->head = 0; + return fifo8_peekpop_buf(fifo, max, numptr, 0); +} + +const uint8_t +*fifo8_pop_bufptr(Fifo8 *fifo, uint32_t max, uint32_t *numptr) +{ + return fifo8_peekpop_buf(fifo, max, numptr, 1); +} + +uint32_t +fifo8_pop_buf(Fifo8 *fifo, uint8_t *dest, uint32_t destlen) +{ + const uint8_t *buf; + uint32_t n1, n2 = 0; + uint32_t len; + + if (destlen == 0) + return 0; + + len = destlen; + buf = fifo8_pop_bufptr(fifo, len, &n1); + if (dest) + memcpy(dest, buf, n1); + + /* Add FIFO wraparound if needed */ + len -= n1; + len = MIN(len, fifo8_num_used(fifo)); + if (len) { + buf = fifo8_pop_bufptr(fifo, len, &n2); + if (dest) { + memcpy(&dest[n1], buf, n2); + } + } + + return n1 + n2; +} + +void +fifo8_drop(Fifo8 *fifo, uint32_t len) +{ + len -= fifo8_pop_buf(fifo, NULL, len); + assert(len == 0); } int diff --git a/src/include/86box/fifo8.h b/src/include/86box/fifo8.h index 9f88ec408..7dec1d57d 100644 --- a/src/include/86box/fifo8.h +++ b/src/include/86box/fifo8.h @@ -69,28 +69,80 @@ extern uint8_t fifo8_pop(Fifo8 *fifo); /** * fifo8_pop_buf: * @fifo: FIFO to pop from - * @max: maximum number of bytes to pop - * @num: actual number of returned bytes + * @dest: the buffer to write the data into (can be NULL) + * @destlen: size of @dest and maximum number of bytes to pop * - * Pop a number of elements from the FIFO up to a maximum of max. The buffer + * Pop a number of elements from the FIFO up to a maximum of @destlen. + * The popped data is copied into the @dest buffer. + * Care is taken when the data wraps around in the ring buffer. + * + * Returns: number of bytes popped. + */ +extern uint32_t fifo8_pop_buf(Fifo8 *fifo, uint8_t *dest, uint32_t destlen); + +/** + * fifo8_pop_bufptr: + * @fifo: FIFO to pop from + * @max: maximum number of bytes to pop + * @numptr: pointer filled with number of bytes returned (can be NULL) + * + * New code should prefer to use fifo8_pop_buf() instead of fifo8_pop_bufptr(). + * + * Pop a number of elements from the FIFO up to a maximum of @max. The buffer * containing the popped data is returned. This buffer points directly into - * the FIFO backing store and data is invalidated once any of the fifo8_* APIs - * are called on the FIFO. + * the internal FIFO backing store and data (without checking for overflow!) + * and is invalidated once any of the fifo8_* APIs are called on the FIFO. * * The function may return fewer bytes than requested when the data wraps * around in the ring buffer; in this case only a contiguous part of the data * is returned. * - * The number of valid bytes returned is populated in *num; will always return - * at least 1 byte. max must not be 0 or greater than the number of bytes in - * the FIFO. + * The number of valid bytes returned is populated in *@numptr; will always + * return at least 1 byte. max must not be 0 or greater than the number of + * bytes in the FIFO. * * Clients are responsible for checking the availability of requested data * using fifo8_num_used(). * * Returns: A pointer to popped data. */ -extern const uint8_t *fifo8_pop_buf(Fifo8 *fifo, uint32_t max, uint32_t *num); +extern const uint8_t *fifo8_pop_bufptr(Fifo8 *fifo, uint32_t max, uint32_t *numptr); + +/** + * fifo8_peek_bufptr: read upto max bytes from the fifo + * @fifo: FIFO to read from + * @max: maximum number of bytes to peek + * @numptr: pointer filled with number of bytes returned (can be NULL) + * + * Peek into a number of elements from the FIFO up to a maximum of @max. + * The buffer containing the data peeked into is returned. This buffer points + * directly into the FIFO backing store. Since data is invalidated once any + * of the fifo8_* APIs are called on the FIFO, it is the caller responsibility + * to access it before doing further API calls. + * + * The function may return fewer bytes than requested when the data wraps + * around in the ring buffer; in this case only a contiguous part of the data + * is returned. + * + * The number of valid bytes returned is populated in *@numptr; will always + * return at least 1 byte. max must not be 0 or greater than the number of + * bytes in the FIFO. + * + * Clients are responsible for checking the availability of requested data + * using fifo8_num_used(). + * + * Returns: A pointer to peekable data. + */ +extern const uint8_t *fifo8_peek_bufptr(Fifo8 *fifo, uint32_t max, uint32_t *numptr); + +/** + * fifo8_drop: + * @fifo: FIFO to drop bytes + * @len: number of bytes to drop + * + * Drop (consume) bytes from a FIFO. + */ +extern void fifo8_drop(Fifo8 *fifo, uint32_t len); /** * fifo8_reset: diff --git a/src/include/86box/scsi_pcscsi.h b/src/include/86box/scsi_pcscsi.h index 3acee78f9..8547aba25 100644 --- a/src/include/86box/scsi_pcscsi.h +++ b/src/include/86box/scsi_pcscsi.h @@ -25,6 +25,7 @@ #ifndef SCSI_PCSCSI_H #define SCSI_PCSCSI_H +extern const device_t am53c974_pci_device; extern const device_t dc390_pci_device; extern const device_t ncr53c90a_mca_device; diff --git a/src/scsi/scsi.c b/src/scsi/scsi.c index 591ef2aa3..bbce63651 100644 --- a/src/scsi/scsi.c +++ b/src/scsi/scsi.c @@ -82,6 +82,7 @@ static SCSI_CARD scsi_cards[] = { { &ncr53c825a_pci_device, }, { &ncr53c860_pci_device, }, { &ncr53c875_pci_device, }, + { &am53c974_pci_device, }, { &dc390_pci_device, }, { &buslogic_445s_device, }, { &buslogic_445c_device, }, diff --git a/src/scsi/scsi_pcscsi.c b/src/scsi/scsi_pcscsi.c index a714ada96..720fcef82 100644 --- a/src/scsi/scsi_pcscsi.c +++ b/src/scsi/scsi_pcscsi.c @@ -26,6 +26,7 @@ #include #include #include +#include #define HAVE_STDARG_H #include #include <86box/86box.h> @@ -47,6 +48,7 @@ #include <86box/fifo8.h> #define DC390_ROM "roms/scsi/esp_pci/INT13.BIN" +#define AM53C974_ROM "roms/scsi/esp_pci/harom.bin" #define ESP_REGS 16 #define ESP_FIFO_SZ 16 @@ -174,6 +176,7 @@ typedef struct esp_t { Fifo8 cmdfifo; uint32_t do_cmd; uint8_t cmdfifo_cdb_offset; + int data_ready; int32_t xfer_counter; int dma_enabled; @@ -186,6 +189,7 @@ typedef struct esp_t { pc_timer_t timer; + int local; int mca; uint16_t Base; uint8_t HostID; @@ -204,6 +208,9 @@ typedef struct esp_t { #define READ_FROM_DEVICE 1 #define WRITE_TO_DEVICE 0 +uint8_t esp_pci_regs[256]; +bar_t esp_pci_bar[2]; + #ifdef ENABLE_ESP_LOG int esp_do_log = ENABLE_ESP_LOG; @@ -223,16 +230,62 @@ esp_log(const char *fmt, ...) #endif static void esp_dma_enable(esp_t *dev, int level); -static void esp_do_dma(esp_t *dev, scsi_device_t *sd); -static void esp_do_nodma(esp_t *dev, scsi_device_t *sd); +static void esp_do_dma(esp_t *dev); +static void esp_do_nodma(esp_t *dev); static void esp_pci_dma_memory_rw(esp_t *dev, uint8_t *buf, uint32_t len, int dir); static void esp_timer_on(esp_t *dev, scsi_device_t *sd, double p); static void esp_command_complete(void *priv, uint32_t status); -static void esp_pci_command_complete(void *priv, uint32_t status); +static void esp_dma_ti_check(esp_t *dev); +static void esp_nodma_ti_dataout(esp_t *dev); static void esp_pci_soft_reset(esp_t *dev); static void esp_pci_hard_reset(esp_t *dev); static void handle_ti(void *priv); +static int +esp_cdb_length(uint8_t *buf) +{ + int cdb_len; + + switch (buf[0] >> 5) { + case 0: + case 3: + cdb_len = 6; + break; + case 1: + case 2: + case 6: + cdb_len = 10; + break; + case 4: + cdb_len = 16; + break; + case 5: + cdb_len = 12; + break; + default: + cdb_len = -1; + break; + } + return cdb_len; +} + +static void +esp_pci_update_irq(esp_t *dev) +{ + int scsi_level = !!(dev->dma_regs[DMA_STAT] & DMA_STAT_SCSIINT); + int dma_level = (dev->dma_regs[DMA_CMD] & DMA_CMD_INTE_D) ? + !!(dev->dma_regs[DMA_STAT] & DMA_STAT_DONE) : 0; + int level = scsi_level || dma_level; + + if (level) { + pci_set_irq(dev->pci_slot, PCI_INTA, &dev->irq_state); + esp_log("Raising PCI IRQ...\n"); + } else { + pci_clear_irq(dev->pci_slot, PCI_INTA, &dev->irq_state); + esp_log("Lowering PCI IRQ...\n"); + } +} + static void esp_irq(esp_t *dev, int level) { @@ -246,12 +299,21 @@ esp_irq(esp_t *dev, int level) } } else { if (level) { - pci_set_irq(dev->pci_slot, PCI_INTA, &dev->irq_state); - esp_log("Raising IRQ...\n"); - } else { - pci_clear_irq(dev->pci_slot, PCI_INTA, &dev->irq_state); - esp_log("Lowering IRQ...\n"); - } + dev->dma_regs[DMA_STAT] |= DMA_STAT_SCSIINT; + /* + * If raising the ESP IRQ to indicate end of DMA transfer, set + * DMA_STAT_DONE at the same time. In theory this should be done in + * esp_pci_dma_memory_rw(), however there is a delay between setting + * DMA_STAT_DONE and the ESP IRQ arriving which is visible to the + * guest that can cause confusion e.g. Linux + */ + if ((dev->dma_regs[DMA_CMD] & DMA_CMD_MASK) == 0x3 && + dev->dma_regs[DMA_WBC] == 0) + dev->dma_regs[DMA_STAT] |= DMA_STAT_DONE; + } else + dev->dma_regs[DMA_STAT] &= ~DMA_STAT_SCSIINT; + + esp_pci_update_irq(dev); } } @@ -274,41 +336,46 @@ esp_lower_irq(esp_t *dev) } static void -esp_fifo_push(Fifo8 *fifo, uint8_t val) +esp_set_phase(esp_t *dev, uint8_t phase) { - if (fifo8_num_used(fifo) == fifo->capacity) { - return; - } - - fifo8_push(fifo, val); + dev->rregs[ESP_RSTAT] &= ~7; + dev->rregs[ESP_RSTAT] |= phase; } static uint8_t -esp_fifo_pop(Fifo8 *fifo) +esp_get_phase(esp_t *dev) { - if (fifo8_is_empty(fifo)) { - return 0; - } + return dev->rregs[ESP_RSTAT] & 7; +} - return fifo8_pop(fifo); +static void +esp_fifo_push(esp_t *dev, uint8_t val) +{ + if (fifo8_num_used(&dev->fifo) == dev->fifo.capacity) + return; + + fifo8_push(&dev->fifo, val); +} + +static uint8_t +esp_fifo_pop(esp_t *dev) +{ + uint8_t val; + + if (fifo8_is_empty(&dev->fifo)) + val = 0; + else + val = fifo8_pop(&dev->fifo); + + return val; } static uint32_t -esp_fifo_pop_buf(Fifo8 *fifo, uint8_t *dest, int maxlen) +esp_fifo_pop_buf(esp_t *dev, uint8_t *dest, int maxlen) { - const uint8_t *buf; - uint32_t n; + uint32_t len = fifo8_pop_buf(&dev->fifo, dest, maxlen); - if (maxlen == 0) { - return 0; - } - - buf = fifo8_pop_buf(fifo, maxlen, &n); - if (dest) { - memcpy(dest, buf, n); - } - - return n; + return len; } static uint32_t @@ -326,9 +393,14 @@ esp_get_tc(esp_t *dev) static void esp_set_tc(esp_t *dev, uint32_t dmalen) { + uint32_t old_tc = esp_get_tc(dev); + dev->rregs[ESP_TCLO] = dmalen; dev->rregs[ESP_TCMID] = dmalen >> 8; dev->rregs[ESP_TCHI] = dmalen >> 16; + + if (old_tc && !dmalen) + dev->rregs[ESP_RSTAT] |= STAT_TC; } static uint32_t @@ -343,64 +415,91 @@ esp_get_stc(esp_t *dev) return dmalen; } -static void -esp_dma_done(esp_t *dev) +static int +esp_select(esp_t *dev) { - dev->rregs[ESP_RSTAT] |= STAT_TC; - dev->rregs[ESP_RINTR] = INTR_BS; - dev->rregs[ESP_RSEQ] = 0; - dev->rregs[ESP_RFLAGS] = 0; - esp_set_tc(dev, 0); - esp_log("ESP DMA Finished\n"); - esp_raise_irq(dev); -} - -static uint32_t -esp_get_cmd(esp_t *dev, uint32_t maxlen) -{ - uint8_t buf[ESP_CMDFIFO_SZ]; - uint32_t dmalen; - uint32_t n; + scsi_device_t *sd; dev->id = dev->wregs[ESP_WBUSID] & BUSID_DID; - if (dev->dma) { - dmalen = MIN(esp_get_tc(dev), maxlen); - esp_log("ESP Get data, dmalen = %d\n", dmalen); - if (dmalen == 0) - return 0; - if (dev->mca) { - dma_set_drq(dev->DmaChannel, 1); - while (dev->dma_86c01.pos < dmalen) { - int val = dma_channel_read(dev->DmaChannel); - buf[dev->dma_86c01.pos++] = val & 0xff; - } - dev->dma_86c01.pos = 0; - dma_set_drq(dev->DmaChannel, 0); - } else { - esp_pci_dma_memory_rw(dev, buf, dmalen, WRITE_TO_DEVICE); - } - dmalen = MIN(fifo8_num_free(&dev->cmdfifo), dmalen); - fifo8_push_all(&dev->cmdfifo, buf, dmalen); - } else { - dmalen = MIN(fifo8_num_used(&dev->fifo), maxlen); - esp_log("ESP Get command, dmalen = %i\n", dmalen); - if (dmalen == 0) { - return 0; - } - n = esp_fifo_pop_buf(&dev->fifo, buf, dmalen); - n = MIN(fifo8_num_free(&dev->cmdfifo), n); - fifo8_push_all(&dev->cmdfifo, buf, n); - } + sd = &scsi_devices[dev->bus][dev->id]; dev->ti_size = 0; - fifo8_reset(&dev->fifo); + dev->rregs[ESP_RSEQ] = SEQ_0; - dev->rregs[ESP_RINTR] |= INTR_FC; - dev->rregs[ESP_RSEQ] = SEQ_CD; + if (!scsi_device_present(sd)) { + esp_log("ESP SCSI no devices on ID %d, LUN %d\n", dev->id, dev->lun); + /* No such drive */ + dev->rregs[ESP_RSTAT] = 0; + dev->rregs[ESP_RINTR] = INTR_DC; + esp_raise_irq(dev); + return -1; + } else + esp_log("ESP SCSI device present on ID %d, LUN %d\n", dev->id, dev->lun); - return dmalen; + return 0; } + /* Callback to indicate that the SCSI layer has completed a transfer. */ +static void +esp_transfer_data(esp_t *dev) +{ + if (!dev->data_ready) { + dev->data_ready = 1; + + switch (dev->rregs[ESP_CMD]) { + case CMD_SEL: + case (CMD_SEL | CMD_DMA): + case CMD_SELATN: + case (CMD_SELATN | CMD_DMA): + /* + * Initial incoming data xfer is complete for sequencer command + * so raise deferred bus service and function complete interrupt + */ + dev->rregs[ESP_RINTR] |= (INTR_BS | INTR_FC); + dev->rregs[ESP_RSEQ] = SEQ_CD; + break; + + case CMD_SELATNS: + case (CMD_SELATNS | CMD_DMA): + /* + * Initial incoming data xfer is complete so raise command + * completion interrupt + */ + dev->rregs[ESP_RINTR] |= INTR_BS; + dev->rregs[ESP_RSEQ] = SEQ_MO; + break; + + case CMD_TI: + case (CMD_TI | CMD_DMA): + /* + * Bus service interrupt raised because of initial change to + * DATA phase + */ + dev->rregs[ESP_CMD] = 0; + dev->rregs[ESP_RINTR] |= INTR_BS; + break; + } + + esp_raise_irq(dev); + } + + /* + * Always perform the initial transfer upon reception of the next TI + * command to ensure the DMA/non-DMA status of the command is correct. + * It is not possible to use s->dma directly in the section below as + * some OSs send non-DMA NOP commands after a DMA transfer. Hence if the + * async data transfer is delayed then s->dma is set incorrectly. + */ + + if (dev->rregs[ESP_CMD] == (CMD_TI | CMD_DMA)) { + /* When the SCSI layer returns more data, raise deferred INTR_BS */ + esp_dma_ti_check(dev); + esp_do_dma(dev); + } else if (dev->rregs[ESP_CMD] == CMD_TI) + esp_do_nodma(dev); +} + + static void esp_do_command_phase(esp_t *dev) { @@ -416,7 +515,7 @@ esp_do_command_phase(esp_t *dev) if (!cmdlen) return; - esp_fifo_pop_buf(&dev->cmdfifo, buf, cmdlen); + fifo8_pop_buf(&dev->cmdfifo, buf, cmdlen); for (int i = 0; i < cmdlen; i++) esp_log("CDB[%i] = %02x\n", i, buf[i]); @@ -427,46 +526,36 @@ esp_do_command_phase(esp_t *dev) dev->ti_size = sd->buffer_length; dev->xfer_counter = sd->buffer_length; - esp_log("ESP SCSI Command = 0x%02x, ID = %d, LUN = %d, len = %d\n", buf[0], dev->id, dev->lun, sd->buffer_length); + pclog("ESP SCSI Command = 0x%02x, ID = %d, LUN = %d, len = %d, phase = %02x.\n", buf[0], dev->id, dev->lun, sd->buffer_length, sd->phase); fifo8_reset(&dev->cmdfifo); + dev->data_ready = 0; if (sd->buffer_length > 0) { - /* This should be set to the underlying device's buffer by command phase 0. */ - dev->rregs[ESP_RSTAT] = STAT_TC; - dev->rregs[ESP_RSEQ] = SEQ_CD; - if (sd->phase == SCSI_PHASE_DATA_IN) { - dev->rregs[ESP_RSTAT] |= STAT_DI; + esp_set_phase(dev, STAT_DI); esp_log("ESP Data In\n"); esp_timer_on(dev, sd, scsi_device_get_callback(sd)); } else if (sd->phase == SCSI_PHASE_DATA_OUT) { - dev->rregs[ESP_RSTAT] |= STAT_DO; - esp_log("ESP Data Out\n"); + esp_set_phase(dev, STAT_DO); dev->ti_size = -sd->buffer_length; + esp_log("ESP Data Out\n"); esp_timer_on(dev, sd, scsi_device_get_callback(sd)); } esp_log("ESP SCSI Start reading/writing\n"); - esp_do_dma(dev, sd); + esp_do_dma(dev); } else { - esp_log("ESP SCSI Command with no length\n"); - if (dev->mca) { - if (buf[0] == 0x43) { - dev->rregs[ESP_RSTAT] = STAT_DI | STAT_TC; - dev->rregs[ESP_RSEQ] = SEQ_CD; - esp_do_dma(dev, sd); - } else - esp_command_complete(dev, sd->status); - } else - esp_pci_command_complete(dev, sd->status); + if (dev->mca && (buf[0] == 0x43) && (sd->phase == SCSI_PHASE_STATUS)) { + esp_set_phase(dev, STAT_DI); + scsi_device_command_phase1(sd); + } + pclog("ESP SCSI Command with no length\n"); + esp_command_complete(dev, sd->status); } - - scsi_device_identify(sd, SCSI_LUN_USE_CDB); - - dev->rregs[ESP_RINTR] |= (INTR_BS | INTR_FC); - esp_raise_irq(dev); + esp_transfer_data(dev); } + static void esp_do_message_phase(esp_t *dev) { @@ -474,19 +563,18 @@ esp_do_message_phase(esp_t *dev) uint8_t message; if (dev->cmdfifo_cdb_offset) { - message = esp_fifo_pop(&dev->cmdfifo); + message = fifo8_is_empty(&dev->cmdfifo) ? 0 : + fifo8_pop(&dev->cmdfifo); dev->lun = message & 7; dev->cmdfifo_cdb_offset--; if (scsi_device_present(&scsi_devices[dev->bus][dev->id]) && (dev->lun > 0)) { /* We only support LUN 0 */ - esp_log("LUN = %i\n", dev->lun); + pclog("LUN = %i\n", dev->lun); dev->rregs[ESP_RSTAT] = 0; dev->rregs[ESP_RINTR] = INTR_DC; - dev->rregs[ESP_RSEQ] = SEQ_0; esp_raise_irq(dev); - fifo8_reset(&dev->cmdfifo); return; } @@ -497,7 +585,7 @@ esp_do_message_phase(esp_t *dev) if (dev->cmdfifo_cdb_offset) { len = MIN(dev->cmdfifo_cdb_offset, fifo8_num_used(&dev->cmdfifo)); - esp_fifo_pop_buf(&dev->cmdfifo, NULL, len); + fifo8_drop(&dev->cmdfifo, len); dev->cmdfifo_cdb_offset = 0; } } @@ -505,9 +593,10 @@ esp_do_message_phase(esp_t *dev) static void esp_do_cmd(esp_t *dev) { + esp_log("DO CMD.\n"); esp_do_message_phase(dev); - if (dev->cmdfifo_cdb_offset == 0) - esp_do_command_phase(dev); + assert(dev->cmdfifo_cdb_offset == 0); + esp_do_command_phase(dev); } static void @@ -544,265 +633,550 @@ esp_hard_reset(esp_t *dev) esp_log("ESP Reset\n"); for (uint8_t i = 0; i < 16; i++) scsi_device_reset(&scsi_devices[dev->bus][i]); + timer_stop(&dev->timer); } -static void -esp_do_nodma(esp_t *dev, scsi_device_t *sd) +static int +esp_cdb_ready(esp_t *dev) { - int count; + int len = fifo8_num_used(&dev->cmdfifo) - dev->cmdfifo_cdb_offset; + const uint8_t *pbuf; + uint32_t n; + int cdblen; - esp_log("ESP SCSI Actual FIFO len = %d\n", dev->xfer_counter); + if (len <= 0) + return 0; - if (dev->do_cmd) { - esp_log("ESP Command on FIFO\n"); - dev->ti_size = 0; - - if ((dev->rregs[ESP_RSTAT] & 7) == STAT_CD) { - if (dev->cmdfifo_cdb_offset == fifo8_num_used(&dev->cmdfifo)) { - esp_log("CDB offset = %i used return\n", dev->cmdfifo_cdb_offset); - return; - } - - dev->do_cmd = 0; - esp_do_cmd(dev); - } else { - dev->cmdfifo_cdb_offset = fifo8_num_used(&dev->cmdfifo); - esp_log("CDB offset = %i used\n", dev->cmdfifo_cdb_offset); - - dev->rregs[ESP_RSTAT] = STAT_TC | STAT_CD; - dev->rregs[ESP_RSEQ] = SEQ_CD; - dev->rregs[ESP_RINTR] |= INTR_BS; - esp_raise_irq(dev); - } - return; + pbuf = fifo8_peek_bufptr(&dev->cmdfifo, len, &n); + if (n < len) { + /* + * In normal use the cmdfifo should never wrap, but include this check + * to prevent a malicious guest from reading past the end of the + * cmdfifo data buffer below + */ + return 0; } - if (dev->xfer_counter == 0) { - /* Wait until data is available. */ - esp_log("(ID=%02i LUN=%02i): FIFO no data available\n", dev->id, dev->lun); - return; - } + cdblen = esp_cdb_length((uint8_t *)&pbuf[dev->cmdfifo_cdb_offset]); - esp_log("ESP FIFO = %d, buffer length = %d\n", dev->xfer_counter, sd->buffer_length); + return (cdblen < 0) ? 0 : (len >= cdblen); +} - if (sd->phase == SCSI_PHASE_DATA_IN) { - if (fifo8_is_empty(&dev->fifo)) { - fifo8_push(&dev->fifo, sd->sc->temp_buffer[dev->buffer_pos]); - dev->buffer_pos++; - dev->ti_size--; - dev->xfer_counter--; - } - } else if (sd->phase == SCSI_PHASE_DATA_OUT) { - count = MIN(fifo8_num_used(&dev->fifo), ESP_FIFO_SZ); - esp_fifo_pop_buf(&dev->fifo, sd->sc->temp_buffer + dev->buffer_pos, count); - dev->buffer_pos += count; - dev->ti_size += count; - dev->xfer_counter -= count; - } - - esp_log("ESP FIFO Transfer bytes = %d\n", dev->xfer_counter); - if (dev->xfer_counter <= 0) { - if (sd->phase == SCSI_PHASE_DATA_OUT) { - if (dev->ti_size < 0) { - esp_log("ESP FIFO Keep writing\n"); - esp_do_nodma(dev, sd); - } else { - esp_log("ESP FIFO Write finished\n"); - scsi_device_command_phase1(sd); - if (dev->mca) { - esp_command_complete(dev, sd->status); - } else - esp_pci_command_complete(dev, sd->status); - } - } else if (sd->phase == SCSI_PHASE_DATA_IN) { - /* If there is still data to be read from the device then - complete the DMA operation immediately. Otherwise defer - until the scsi layer has completed. */ - if (dev->ti_size <= 0) { - esp_log("ESP FIFO Read finished\n"); - scsi_device_command_phase1(sd); - if (dev->mca) { - esp_command_complete(dev, sd->status); - } else - esp_pci_command_complete(dev, sd->status); - } else { - esp_log("ESP FIFO Keep reading\n"); - esp_do_nodma(dev, sd); - } - } - } else { - /* Partially filled a scsi buffer. Complete immediately. */ - esp_log("ESP SCSI Partially filled the FIFO buffer\n"); +static void +esp_dma_ti_check(esp_t *dev) +{ + if ((esp_get_tc(dev) == 0) && (fifo8_num_used(&dev->fifo) < 2)) { dev->rregs[ESP_RINTR] |= INTR_BS; esp_raise_irq(dev); } } static void -esp_do_dma(esp_t *dev, scsi_device_t *sd) +esp_do_dma(esp_t *dev) { + scsi_device_t *sd = &scsi_devices[dev->bus][dev->id]; uint8_t buf[ESP_CMDFIFO_SZ]; - uint32_t tdbc; - int count; + uint32_t len; - esp_log("ESP SCSI Actual DMA len = %d\n", esp_get_tc(dev)); + pclog("ESP SCSI Actual DMA len = %d\n", esp_get_tc(dev)); - if (!scsi_device_present(sd)) { - esp_log("ESP SCSI no devices on ID %d, LUN %d\n", dev->id, dev->lun); - /* No such drive */ - dev->rregs[ESP_RSTAT] = 0; - dev->rregs[ESP_RINTR] = INTR_DC; - dev->rregs[ESP_RSEQ] = SEQ_0; - esp_raise_irq(dev); - fifo8_reset(&dev->cmdfifo); - return; - } else { - esp_log("ESP SCSI device found on ID %d, LUN %d\n", dev->id, dev->lun); - } + len = esp_get_tc(dev); - count = tdbc = esp_get_tc(dev); + switch (esp_get_phase(dev)) { + case STAT_MO: + len = MIN(len, fifo8_num_free(&dev->cmdfifo)); + if (dev->mca) { + dma_set_drq(dev->DmaChannel, 1); + while (dev->dma_86c01.pos < len) { + int val = dma_channel_read(dev->DmaChannel); + buf[dev->dma_86c01.pos++] = val & 0xff; + } + dev->dma_86c01.pos = 0; + dma_set_drq(dev->DmaChannel, 0); + } else + esp_pci_dma_memory_rw(dev, buf, len, WRITE_TO_DEVICE); - if (dev->mca) { - if (sd->buffer_length < 0) { - if (dev->dma_enabled) - goto done; - else - goto partial; - } - } + esp_set_tc(dev, esp_get_tc(dev) - len); + fifo8_push_all(&dev->cmdfifo, buf, len); + dev->cmdfifo_cdb_offset += len; - if (dev->do_cmd) { - esp_log("ESP Command on DMA\n"); - count = MIN(count, fifo8_num_free(&dev->cmdfifo)); - if (dev->mca) { - dma_set_drq(dev->DmaChannel, 1); - while (dev->dma_86c01.pos < count) { - dma_channel_write(dev->DmaChannel, buf[dev->dma_86c01.pos]); - dev->dma_86c01.pos++; + switch (dev->rregs[ESP_CMD]) { + case (CMD_SELATN | CMD_DMA): + if (fifo8_num_used(&dev->cmdfifo) >= 1) { + /* First byte received, switch to command phase */ + esp_set_phase(dev, STAT_CD); + dev->rregs[ESP_RSEQ] = SEQ_CD; + dev->cmdfifo_cdb_offset = 1; + + if (fifo8_num_used(&dev->cmdfifo) > 1) { + /* Process any additional command phase data */ + esp_do_dma(dev); + } + } + break; + + case (CMD_SELATNS | CMD_DMA): + if (fifo8_num_used(&dev->cmdfifo) == 1) { + /* First byte received, stop in message out phase */ + dev->rregs[ESP_RSEQ] = SEQ_MO; + dev->cmdfifo_cdb_offset = 1; + + /* Raise command completion interrupt */ + dev->rregs[ESP_RINTR] |= (INTR_BS | INTR_FC); + esp_raise_irq(dev); + } + break; + + case (CMD_TI | CMD_DMA): + /* ATN remains asserted until TC == 0 */ + if (esp_get_tc(dev) == 0) { + esp_set_phase(dev, STAT_CD); + dev->rregs[ESP_CMD] = 0; + dev->rregs[ESP_RINTR] |= INTR_BS; + esp_raise_irq(dev); + } + break; + + default: + break; } - dev->dma_86c01.pos = 0; - dma_set_drq(dev->DmaChannel, 0); - } else - esp_pci_dma_memory_rw(dev, buf, count, READ_FROM_DEVICE); - fifo8_push_all(&dev->cmdfifo, buf, count); - dev->ti_size = 0; + break; - if ((dev->rregs[ESP_RSTAT] & 7) == STAT_CD) { - if (dev->cmdfifo_cdb_offset == fifo8_num_used(&dev->cmdfifo)) + case STAT_CD: + len = MIN(len, fifo8_num_free(&dev->cmdfifo)); + if (dev->mca) { + dma_set_drq(dev->DmaChannel, 1); + while (dev->dma_86c01.pos < len) { + int val = dma_channel_read(dev->DmaChannel); + buf[dev->dma_86c01.pos++] = val & 0xff; + } + dev->dma_86c01.pos = 0; + dma_set_drq(dev->DmaChannel, 0); + } else + esp_pci_dma_memory_rw(dev, buf, len, WRITE_TO_DEVICE); + + fifo8_push_all(&dev->cmdfifo, buf, len); + esp_set_tc(dev, esp_get_tc(dev) - len); + dev->ti_size = 0; + if (esp_get_tc(dev) == 0) { + /* Command has been received */ + esp_do_cmd(dev); + } + break; + + case STAT_DO: + if (!dev->xfer_counter && esp_get_tc(dev)) { + /* Defer until data is available. */ return; - - dev->do_cmd = 0; - esp_do_cmd(dev); - } else { - dev->cmdfifo_cdb_offset = fifo8_num_used(&dev->cmdfifo); - - dev->rregs[ESP_RSTAT] = STAT_TC | STAT_CD; - dev->rregs[ESP_RSEQ] = SEQ_CD; - dev->rregs[ESP_RINTR] |= INTR_BS; - esp_raise_irq(dev); - } - return; - } - - if (dev->xfer_counter == 0) { - /* Wait until data is available. */ - esp_log("(ID=%02i LUN=%02i): DMA no data available\n", dev->id, dev->lun); - return; - } - - esp_log("ESP SCSI dmaleft = %d, buffer length = %d\n", esp_get_tc(dev), sd->buffer_length); - - /* Make sure count is never bigger than buffer_length. */ - if (count > dev->xfer_counter) - count = dev->xfer_counter; - - if (sd->phase == SCSI_PHASE_DATA_IN) { - esp_log("ESP SCSI Read, dma cnt = %i, ti size = %i, positive len = %i\n", esp_get_tc(dev), dev->ti_size, count); - if (dev->mca) { - dma_set_drq(dev->DmaChannel, 1); - while (dev->dma_86c01.pos < count) { - dma_channel_write(dev->DmaChannel, sd->sc->temp_buffer[dev->buffer_pos + dev->dma_86c01.pos]); - esp_log("ESP SCSI DMA read for 53C9x: pos = %i, val = %02x\n", dev->dma_86c01.pos, sd->sc->temp_buffer[dev->buffer_pos + dev->dma_86c01.pos]); - dev->dma_86c01.pos++; } - dev->dma_86c01.pos = 0; - dma_set_drq(dev->DmaChannel, 0); - } else { - esp_pci_dma_memory_rw(dev, sd->sc->temp_buffer + dev->buffer_pos, count, READ_FROM_DEVICE); - } - } else if (sd->phase == SCSI_PHASE_DATA_OUT) { - esp_log("ESP SCSI Write, negative len = %i, ti size = %i, dma cnt = %i\n", count, -dev->ti_size, esp_get_tc(dev)); - if (dev->mca) { - dma_set_drq(dev->DmaChannel, 1); - while (dev->dma_86c01.pos < count) { - int val = dma_channel_read(dev->DmaChannel); - esp_log("ESP SCSI DMA write for 53C9x: pos = %i, val = %02x\n", dev->dma_86c01.pos, val & 0xff); - sd->sc->temp_buffer[dev->buffer_pos + dev->dma_86c01.pos] = val & 0xff; - dev->dma_86c01.pos++; - } - dma_set_drq(dev->DmaChannel, 0); - dev->dma_86c01.pos = 0; - } else - esp_pci_dma_memory_rw(dev, sd->sc->temp_buffer + dev->buffer_pos, count, WRITE_TO_DEVICE); - } - esp_set_tc(dev, esp_get_tc(dev) - count); - dev->buffer_pos += count; - dev->xfer_counter -= count; - if (sd->phase == SCSI_PHASE_DATA_IN) { - dev->ti_size -= count; - } else if (sd->phase == SCSI_PHASE_DATA_OUT) { - dev->ti_size += count; - } + if (len > dev->xfer_counter) + len = dev->xfer_counter; - esp_log("ESP SCSI Transfer bytes = %d\n", dev->xfer_counter); - if (dev->xfer_counter <= 0) { - if (sd->phase == SCSI_PHASE_DATA_OUT) { - if (dev->ti_size < 0) { - esp_log("ESP SCSI Keep writing\n"); - esp_do_dma(dev, sd); - } else { - esp_log("ESP SCSI Write finished\n"); - scsi_device_command_phase1(sd); - if (dev->mca) { + switch (dev->rregs[ESP_CMD]) { + case (CMD_TI | CMD_DMA): + if (dev->mca) { + dma_set_drq(dev->DmaChannel, 1); + while (dev->dma_86c01.pos < len) { + int val = dma_channel_read(dev->DmaChannel); + esp_log("ESP SCSI DMA write for 53C9x: pos = %i, val = %02x\n", dev->dma_86c01.pos, val & 0xff); + sd->sc->temp_buffer[dev->buffer_pos + dev->dma_86c01.pos] = val & 0xff; + dev->dma_86c01.pos++; + } + dma_set_drq(dev->DmaChannel, 0); + dev->dma_86c01.pos = 0; + } else + esp_pci_dma_memory_rw(dev, sd->sc->temp_buffer + dev->buffer_pos, len, WRITE_TO_DEVICE); + + esp_set_tc(dev, esp_get_tc(dev) - len); + + dev->buffer_pos += len; + dev->xfer_counter -= len; + dev->ti_size += len; + break; + + case (CMD_PAD | CMD_DMA): + /* Copy TC zero bytes into the incoming stream */ + memset(sd->sc->temp_buffer + dev->buffer_pos, 0, len); + + dev->buffer_pos += len; + dev->xfer_counter -= len; + dev->ti_size += len; + break; + + default: + break; + } + + if ((dev->xfer_counter <= 0) && (fifo8_num_used(&dev->fifo) < 2)) { + /* Defer until the scsi layer has completed */ + if (dev->ti_size < 0) { + esp_log("ESP SCSI Keep writing\n"); + esp_do_dma(dev); + } else { + esp_log("ESP SCSI Write finished\n"); + scsi_device_command_phase1(sd); esp_command_complete(dev, sd->status); - } else - esp_pci_command_complete(dev, sd->status); + } + return; } - } else if (sd->phase == SCSI_PHASE_DATA_IN) { - /* If there is still data to be read from the device then - complete the DMA operation immediately. Otherwise defer - until the scsi layer has completed. */ - if (dev->ti_size <= 0) { -done: - esp_log("ESP SCSI Read finished\n"); + + esp_dma_ti_check(dev); + break; + + case STAT_DI: + if (!dev->xfer_counter && esp_get_tc(dev)) { + /* Defer until data is available. */ + return; + } + if (len > dev->xfer_counter) + len = dev->xfer_counter; + + switch (dev->rregs[ESP_CMD]) { + case (CMD_TI | CMD_DMA): + if (dev->mca) { + dma_set_drq(dev->DmaChannel, 1); + while (dev->dma_86c01.pos < len) { + dma_channel_write(dev->DmaChannel, sd->sc->temp_buffer[dev->buffer_pos + dev->dma_86c01.pos]); + esp_log("ESP SCSI DMA read for 53C9x: pos = %i, val = %02x\n", dev->dma_86c01.pos, sd->sc->temp_buffer[dev->buffer_pos + dev->dma_86c01.pos]); + dev->dma_86c01.pos++; + } + dev->dma_86c01.pos = 0; + dma_set_drq(dev->DmaChannel, 0); + } else + esp_pci_dma_memory_rw(dev, sd->sc->temp_buffer + dev->buffer_pos, len, READ_FROM_DEVICE); + + dev->buffer_pos += len; + dev->xfer_counter -= len; + dev->ti_size -= len; + esp_set_tc(dev, esp_get_tc(dev) - len); + break; + + case (CMD_PAD | CMD_DMA): + dev->buffer_pos += len; + dev->xfer_counter -= len; + dev->ti_size -= len; + esp_set_tc(dev, esp_get_tc(dev) - len); + break; + + default: + break; + } + + if ((dev->xfer_counter <= 0) && !dev->ti_size && esp_get_tc(dev)) { + /* If the guest underflows TC then terminate SCSI request */ + pclog("ESP SCSI Read finished (underflow).\n"); scsi_device_command_phase1(sd); - if (dev->mca) { - esp_command_complete(dev, sd->status); - } else - esp_pci_command_complete(dev, sd->status); - } else { - esp_log("ESP SCSI Keep reading\n"); - esp_do_dma(dev, sd); + esp_command_complete(dev, sd->status); + return; } - } - } else { - /* Partially filled a scsi buffer. Complete immediately. */ -partial: - esp_log("ESP SCSI Partially filled the SCSI buffer\n"); - esp_dma_done(dev); + + if ((dev->xfer_counter <= 0) && (fifo8_num_used(&dev->fifo) < 2)) { + /* Defer until the scsi layer has completed */ + if (dev->ti_size <= 0) { + pclog("ESP SCSI Read finished\n"); + scsi_device_command_phase1(sd); + esp_command_complete(dev, sd->status); + } else { + pclog("ESP SCSI Keep reading\n"); + esp_do_dma(dev); + } + return; + } + esp_dma_ti_check(dev); + break; + + case STAT_ST: + switch (dev->rregs[ESP_CMD]) { + case (CMD_ICCS | CMD_DMA): + len = MIN(len, 1); + + if (len) { + buf[0] = dev->status; + + if (dev->mca) { + dma_set_drq(dev->DmaChannel, 1); + while (dev->dma_86c01.pos < len) { + dma_channel_write(dev->DmaChannel, buf[dev->dma_86c01.pos]); + dev->dma_86c01.pos++; + } + dev->dma_86c01.pos = 0; + dma_set_drq(dev->DmaChannel, 0); + } else + esp_pci_dma_memory_rw(dev, buf, len, READ_FROM_DEVICE); + + esp_set_tc(dev, esp_get_tc(dev) - len); + esp_set_phase(dev, STAT_MI); + + if (esp_get_tc(dev) > 0) { + /* Process any message in phase data */ + esp_do_dma(dev); + } + } + break; + + default: + /* Consume remaining data if the guest underflows TC */ + if (fifo8_num_used(&dev->fifo) < 2) { + dev->rregs[ESP_RINTR] |= INTR_BS; + esp_raise_irq(dev); + } + break; + } + break; + + case STAT_MI: + switch (dev->rregs[ESP_CMD]) { + case (CMD_ICCS | CMD_DMA): + len = MIN(len, 1); + + if (len) { + buf[0] = 0; + + if (dev->mca) { + dma_set_drq(dev->DmaChannel, 1); + while (dev->dma_86c01.pos < len) { + dma_channel_write(dev->DmaChannel, buf[dev->dma_86c01.pos]); + dev->dma_86c01.pos++; + } + dev->dma_86c01.pos = 0; + dma_set_drq(dev->DmaChannel, 0); + } else + esp_pci_dma_memory_rw(dev, buf, len, READ_FROM_DEVICE); + + esp_set_tc(dev, esp_get_tc(dev) - len); + + /* Raise end of command interrupt */ + dev->rregs[ESP_RINTR] |= INTR_FC; + esp_raise_irq(dev); + } + break; + } + break; + + default: + break; } } static void -esp_report_command_complete(esp_t *dev, uint32_t status) +esp_nodma_ti_dataout(esp_t *dev) { - esp_log("ESP Command complete\n"); + scsi_device_t *sd = &scsi_devices[dev->bus][dev->id]; + int len; - dev->ti_size = 0; - dev->status = status; - dev->rregs[ESP_RSTAT] = STAT_TC | STAT_ST; - esp_dma_done(dev); + if (!dev->xfer_counter) { + /* Defer until data is available. */ + return; + } + len = MIN(dev->xfer_counter, ESP_FIFO_SZ); + len = MIN(len, fifo8_num_used(&dev->fifo)); + esp_fifo_pop_buf(dev, sd->sc->temp_buffer + dev->buffer_pos, len); + dev->buffer_pos += len; + dev->xfer_counter -= len; + dev->ti_size += len; + + if (dev->xfer_counter <= 0) { + if (dev->ti_size < 0) { + esp_log("ESP SCSI Keep writing\n"); + esp_nodma_ti_dataout(dev); + } else { + esp_log("ESP SCSI Write finished\n"); + scsi_device_command_phase1(sd); + esp_command_complete(dev, sd->status); + } + return; + } + + dev->rregs[ESP_RINTR] |= INTR_BS; + esp_raise_irq(dev); +} + +static void +esp_do_nodma(esp_t *dev) +{ + scsi_device_t *sd = &scsi_devices[dev->bus][dev->id]; + uint8_t buf[ESP_FIFO_SZ]; + int len; + + switch (esp_get_phase(dev)) { + case STAT_MO: + switch (dev->rregs[ESP_CMD]) { + case CMD_SELATN: + /* Copy FIFO into cmdfifo */ + len = esp_fifo_pop_buf(dev, buf, fifo8_num_used(&dev->fifo)); + len = MIN(fifo8_num_free(&dev->cmdfifo), len); + fifo8_push_all(&dev->cmdfifo, buf, len); + + if (fifo8_num_used(&dev->cmdfifo) >= 1) { + /* First byte received, switch to command phase */ + esp_set_phase(dev, STAT_CD); + dev->rregs[ESP_RSEQ] = SEQ_CD; + dev->cmdfifo_cdb_offset = 1; + + if (fifo8_num_used(&dev->cmdfifo) > 1) { + /* Process any additional command phase data */ + esp_do_nodma(dev); + } + } + break; + + case CMD_SELATNS: + /* Copy one byte from FIFO into cmdfifo */ + len = esp_fifo_pop_buf(dev, buf, + MIN(fifo8_num_used(&dev->fifo), 1)); + len = MIN(fifo8_num_free(&dev->cmdfifo), len); + fifo8_push_all(&dev->cmdfifo, buf, len); + + if (fifo8_num_used(&dev->cmdfifo) >= 1) { + /* First byte received, stop in message out phase */ + dev->rregs[ESP_RSEQ] = SEQ_MO; + dev->cmdfifo_cdb_offset = 1; + + /* Raise command completion interrupt */ + dev->rregs[ESP_RINTR] |= (INTR_BS | INTR_FC); + esp_raise_irq(dev); + } + break; + + case CMD_TI: + /* Copy FIFO into cmdfifo */ + len = esp_fifo_pop_buf(dev, buf, fifo8_num_used(&dev->fifo)); + len = MIN(fifo8_num_free(&dev->cmdfifo), len); + fifo8_push_all(&dev->cmdfifo, buf, len); + + /* ATN remains asserted until FIFO empty */ + dev->cmdfifo_cdb_offset = fifo8_num_used(&dev->cmdfifo); + esp_set_phase(dev, STAT_CD); + dev->rregs[ESP_CMD] = 0; + dev->rregs[ESP_RINTR] |= INTR_BS; + esp_raise_irq(dev); + break; + + default: + break; + } + break; + + case STAT_CD: + switch (dev->rregs[ESP_CMD]) { + case CMD_TI: + /* Copy FIFO into cmdfifo */ + len = esp_fifo_pop_buf(dev, buf, fifo8_num_used(&dev->fifo)); + len = MIN(fifo8_num_free(&dev->cmdfifo), len); + fifo8_push_all(&dev->cmdfifo, buf, len); + + /* CDB may be transferred in one or more TI commands */ + if (esp_cdb_ready(dev)) { + /* Command has been received */ + esp_do_cmd(dev); + } else { + /* + * If data was transferred from the FIFO then raise bus + * service interrupt to indicate transfer complete. Otherwise + * defer until the next FIFO write. + */ + if (len) { + /* Raise interrupt to indicate transfer complete */ + dev->rregs[ESP_RINTR] |= INTR_BS; + esp_raise_irq(dev); + } + } + break; + + case (CMD_SEL | CMD_DMA): + case (CMD_SELATN | CMD_DMA): + /* Copy FIFO into cmdfifo */ + len = esp_fifo_pop_buf(dev, buf, fifo8_num_used(&dev->fifo)); + len = MIN(fifo8_num_free(&dev->cmdfifo), len); + fifo8_push_all(&dev->cmdfifo, buf, len); + + /* Handle when DMA transfer is terminated by non-DMA FIFO write */ + if (esp_cdb_ready(dev)) { + /* Command has been received */ + esp_do_cmd(dev); + } + break; + + case CMD_SEL: + case CMD_SELATN: + /* FIFO already contain entire CDB: copy to cmdfifo and execute */ + len = esp_fifo_pop_buf(dev, buf, fifo8_num_used(&dev->fifo)); + len = MIN(fifo8_num_free(&dev->cmdfifo), len); + fifo8_push_all(&dev->cmdfifo, buf, len); + + esp_do_cmd(dev); + break; + + default: + break; + } + break; + + case STAT_DO: + /* Accumulate data in FIFO until non-DMA TI is executed */ + break; + + case STAT_DI: + if (!dev->xfer_counter) { + /* Defer until data is available. */ + return; + } + if (fifo8_is_empty(&dev->fifo)) { + esp_fifo_push(dev, sd->sc->temp_buffer[dev->buffer_pos]); + dev->buffer_pos++; + dev->ti_size--; + dev->xfer_counter--; + } + + if (dev->xfer_counter <= 0) { + if (dev->ti_size <= 0) { + esp_log("ESP FIFO Read finished\n"); + scsi_device_command_phase1(sd); + esp_command_complete(dev, sd->status); + } else { + esp_log("ESP FIFO Keep reading\n"); + esp_do_nodma(dev); + } + return; + } + + /* If preloading the FIFO, defer until TI command issued */ + if (dev->rregs[ESP_CMD] != CMD_TI) + return; + + dev->rregs[ESP_RINTR] |= INTR_BS; + esp_raise_irq(dev); + break; + + case STAT_ST: + switch (dev->rregs[ESP_CMD]) { + case CMD_ICCS: + esp_fifo_push(dev, dev->status); + esp_set_phase(dev, STAT_MI); + + /* Process any message in phase data */ + esp_do_nodma(dev); + break; + default: + break; + } + break; + + case STAT_MI: + switch (dev->rregs[ESP_CMD]) { + case CMD_ICCS: + esp_fifo_push(dev, 0); + + /* Raise end of command interrupt */ + dev->rregs[ESP_RINTR] |= INTR_FC; + esp_raise_irq(dev); + break; + default: + break; + } + break; + } } /* Callback to indicate that the SCSI layer has completed a command. */ @@ -810,18 +1184,36 @@ static void esp_command_complete(void *priv, uint32_t status) { esp_t *dev = (esp_t *) priv; + scsi_device_t *sd = &scsi_devices[dev->bus][dev->id]; - esp_report_command_complete(dev, status); -} + dev->ti_size = 0; + dev->status = status; -static void -esp_pci_command_complete(void *priv, uint32_t status) -{ - esp_t *dev = (esp_t *) priv; + switch (dev->rregs[ESP_CMD]) { + case CMD_SEL: + case (CMD_SEL | CMD_DMA): + case CMD_SELATN: + case (CMD_SELATN | CMD_DMA): + /* + * Switch to status phase. For non-DMA transfers from the target the last + * byte is still in the FIFO + */ + dev->rregs[ESP_RINTR] |= (INTR_BS | INTR_FC); + dev->rregs[ESP_RSEQ] = SEQ_CD; + break; + case CMD_TI: + case (CMD_TI | CMD_DMA): + dev->rregs[ESP_CMD] = 0; + break; + default: + break; + } + /* Raise bus service interrupt to indicate change to STATUS phase */ + scsi_device_identify(sd, SCSI_LUN_USE_CDB); - esp_command_complete(dev, status); - dev->dma_regs[DMA_WBC] = 0; - dev->dma_regs[DMA_STAT] |= DMA_STAT_DONE; + esp_set_phase(dev, STAT_ST); + dev->rregs[ESP_RINTR] |= INTR_BS; + esp_raise_irq(dev); } static void @@ -838,18 +1230,31 @@ esp_timer_on(esp_t *dev, scsi_device_t *sd, double p) timer_on_auto(&dev->timer, dev->period + 40.0); } +static void +handle_pad(esp_t *dev) +{ + if (dev->dma) { + esp_log("ESP Handle PAD, do data, minlen = %i\n", esp_get_tc(dev)); + esp_do_dma(dev); + } else { + esp_log("ESP Handle PAD, do nodma, minlen = %i\n", dev->xfer_counter); + esp_do_nodma(dev); + } +} + static void handle_ti(void *priv) { esp_t *dev = (esp_t *) priv; - scsi_device_t *sd = &scsi_devices[dev->bus][dev->id]; if (dev->dma) { esp_log("ESP Handle TI, do data, minlen = %i\n", esp_get_tc(dev)); - esp_do_dma(dev, sd); + esp_do_dma(dev); } else { esp_log("ESP Handle TI, do nodma, minlen = %i\n", dev->xfer_counter); - esp_do_nodma(dev, sd); + esp_do_nodma(dev); + if (esp_get_phase(dev) == STAT_DO) + esp_nodma_ti_dataout(dev); } } @@ -857,95 +1262,59 @@ static void handle_s_without_atn(void *priv) { esp_t *dev = (esp_t *) priv; - int len; - len = esp_get_cmd(dev, ESP_CMDFIFO_SZ); - esp_log("ESP SEL w/o ATN len = %d, id = %d\n", len, dev->id); - if (len > 0) { - dev->cmdfifo_cdb_offset = 0; - dev->do_cmd = 0; - esp_do_cmd(dev); - } else if (len == 0) { - dev->do_cmd = 1; - /* Target present, but no cmd yet - switch to command phase */ - dev->rregs[ESP_RSEQ] = SEQ_CD; - dev->rregs[ESP_RSTAT] = STAT_CD; - } + if (esp_select(dev) < 0) + return; + + esp_set_phase(dev, STAT_CD); + dev->cmdfifo_cdb_offset = 0; + + if (dev->dma) + esp_do_dma(dev); + else + esp_do_nodma(dev); } static void handle_satn(void *priv) { esp_t *dev = (esp_t *) priv; - int len; - len = esp_get_cmd(dev, ESP_CMDFIFO_SZ); - esp_log("ESP SEL with ATN len = %d, id = %d\n", len, dev->id); - if (len > 0) { - dev->cmdfifo_cdb_offset = 1; - dev->do_cmd = 0; - esp_do_cmd(dev); - } else if (len == 0) { - dev->do_cmd = 1; - /* Target present, but no cmd yet - switch to command phase */ - dev->rregs[ESP_RSEQ] = SEQ_CD; - dev->rregs[ESP_RSTAT] = STAT_CD; - } + if (esp_select(dev) < 0) + return; + + esp_set_phase(dev, STAT_MO); + + if (dev->dma) + esp_do_dma(dev); + else + esp_do_nodma(dev); } static void handle_satn_stop(void *priv) { esp_t *dev = (esp_t *) priv; - int cmdlen; - cmdlen = esp_get_cmd(dev, 1); - if (cmdlen > 0) { - dev->do_cmd = 1; - dev->cmdfifo_cdb_offset = 1; - dev->rregs[ESP_RSTAT] = STAT_MO; - dev->rregs[ESP_RINTR] = INTR_BS | INTR_FC; - dev->rregs[ESP_RSEQ] = SEQ_MO; - esp_log("ESP SCSI Command len = %d, raising IRQ\n", cmdlen); - esp_raise_irq(dev); - } else if (cmdlen == 0) { - dev->do_cmd = 1; - /* Target present, switch to message out phase */ - dev->rregs[ESP_RSEQ] = SEQ_MO; - dev->rregs[ESP_RSTAT] = STAT_MO; - } + if (esp_select(dev) < 0) + return; + + esp_set_phase(dev, STAT_MO); + dev->cmdfifo_cdb_offset = 0; + + if (dev->dma) + esp_do_dma(dev); + else + esp_do_nodma(dev); } static void esp_write_response(esp_t *dev) { - uint8_t buf[2]; - - buf[0] = dev->status; - buf[1] = 0; - esp_log("esp_write_response(): %02X %02X\n", buf[0], buf[1]); - - if (dev->dma) { - if (dev->mca) { - dma_set_drq(dev->DmaChannel, 1); - while (dev->dma_86c01.pos < 2) { - int val = dma_channel_read(dev->DmaChannel); - buf[dev->dma_86c01.pos++] = val & 0xff; - } - dev->dma_86c01.pos = 0; - dma_set_drq(dev->DmaChannel, 0); - } else - esp_pci_dma_memory_rw(dev, buf, 2, WRITE_TO_DEVICE); - dev->rregs[ESP_RSTAT] = STAT_TC | STAT_ST; - dev->rregs[ESP_RINTR] = INTR_BS | INTR_FC; - dev->rregs[ESP_RSEQ] = SEQ_CD; - } else { - fifo8_reset(&dev->fifo); - fifo8_push_all(&dev->fifo, buf, 2); - dev->rregs[ESP_RFLAGS] = 2; - } - esp_log("ESP SCSI ICCS IRQ\n"); - esp_raise_irq(dev); + if (dev->dma) + esp_do_dma(dev); + else + esp_do_nodma(dev); } static void @@ -953,13 +1322,13 @@ esp_callback(void *priv) { esp_t *dev = (esp_t *) priv; - if (dev->dma_enabled || dev->do_cmd || ((dev->rregs[ESP_CMD] & CMD_CMD) == CMD_PAD)) { + if (dev->dma_enabled || !dev->dma || ((dev->rregs[ESP_CMD] & CMD_CMD) == CMD_PAD)) { if ((dev->rregs[ESP_CMD] & CMD_CMD) == CMD_TI) { esp_log("ESP SCSI Handle TI Callback\n"); handle_ti(dev); } else if ((dev->rregs[ESP_CMD] & CMD_CMD) == CMD_PAD) { esp_log("ESP SCSI Handle PAD Callback\n"); - handle_ti(dev); + handle_pad(dev); } } @@ -973,20 +1342,7 @@ esp_reg_read(esp_t *dev, uint32_t saddr) switch (saddr) { case ESP_FIFO: - if ((dev->rregs[ESP_RSTAT] & 7) == STAT_DI) { - if (dev->ti_size) { - esp_log("TI size FIFO = %i\n", dev->ti_size); - esp_do_nodma(dev, &scsi_devices[dev->bus][dev->id]); - } else { - /* - * The last byte of a non-DMA transfer has been read out - * of the FIFO so switch to status phase - */ - dev->rregs[ESP_RSTAT] = STAT_TC | STAT_ST; - } - } - - dev->rregs[ESP_FIFO] = esp_fifo_pop(&dev->fifo); + dev->rregs[ESP_FIFO] = esp_fifo_pop(dev); ret = dev->rregs[ESP_FIFO]; break; case ESP_RINTR: @@ -1033,21 +1389,10 @@ esp_reg_write(esp_t *dev, uint32_t saddr, uint32_t val) dev->rregs[ESP_RSTAT] &= ~STAT_TC; break; case ESP_FIFO: - if (dev->do_cmd) { - esp_fifo_push(&dev->cmdfifo, val); - esp_log("ESP CmdVal = %02x\n", val); - /* - * If any unexpected message out/command phase data is - * transferred using non-DMA, raise the interrupt - */ - if (dev->rregs[ESP_CMD] == CMD_TI) { - dev->rregs[ESP_RINTR] |= INTR_BS; - esp_raise_irq(dev); - } - } else { - esp_fifo_push(&dev->fifo, val); - esp_log("ESP fifoval = %02x\n", val); - } + if (!fifo8_is_full(&dev->fifo)) + esp_fifo_push(dev, val); + + esp_do_nodma(dev); break; case ESP_CMD: dev->rregs[saddr] = val; @@ -1056,6 +1401,8 @@ esp_reg_write(esp_t *dev, uint32_t saddr, uint32_t val) dev->dma = 1; /* Reload DMA counter. */ esp_set_tc(dev, esp_get_stc(dev)); + if (!esp_get_stc(dev)) + esp_set_tc(dev, 0x10000); } else { dev->dma = 0; esp_log("ESP Command not for DMA\n"); @@ -1091,6 +1438,11 @@ esp_reg_write(esp_t *dev, uint32_t saddr, uint32_t val) case CMD_TI: esp_log("Transfer Information val = %02X\n", val); break; + case CMD_ICCS: + esp_write_response(dev); + dev->rregs[ESP_RINTR] |= INTR_FC; + dev->rregs[ESP_RSTAT] |= STAT_MI; + break; case CMD_SEL: handle_s_without_atn(dev); break; @@ -1100,11 +1452,6 @@ esp_reg_write(esp_t *dev, uint32_t saddr, uint32_t val) case CMD_SELATNS: handle_satn_stop(dev); break; - case CMD_ICCS: - esp_write_response(dev); - dev->rregs[ESP_RINTR] |= INTR_FC; - dev->rregs[ESP_RSTAT] |= STAT_MI; - break; case CMD_MSGACC: dev->rregs[ESP_RINTR] |= INTR_DC; dev->rregs[ESP_RSEQ] = 0; @@ -1160,6 +1507,7 @@ esp_reg_write(esp_t *dev, uint32_t saddr, uint32_t val) static void esp_pci_dma_memory_rw(esp_t *dev, uint8_t *buf, uint32_t len, int dir) { + uint32_t addr; int expected_dir; if (dev->dma_regs[DMA_CMD] & DMA_CMD_DIR) @@ -1174,14 +1522,15 @@ esp_pci_dma_memory_rw(esp_t *dev, uint8_t *buf, uint32_t len, int dir) return; } + addr = dev->dma_regs[DMA_WAC]; if (dev->dma_regs[DMA_WBC] < len) len = dev->dma_regs[DMA_WBC]; - if (expected_dir) { - dma_bm_write(dev->dma_regs[DMA_SPA], buf, len, 4); - } else { - dma_bm_read(dev->dma_regs[DMA_SPA], buf, len, 4); - } + if (expected_dir) + dma_bm_write(addr, buf, len, 4); + else + dma_bm_read(addr, buf, len, 4); + esp_log("DMA: Address = %08X, Length = %08X (%02X %02X %02X %02X -> %02X %02X %02X %02X)\n", dev->dma_regs[DMA_SPA], len, ram[dev->dma_regs[DMA_SPA]], ram[dev->dma_regs[DMA_SPA] + 1], ram[dev->dma_regs[DMA_SPA] + 2], ram[dev->dma_regs[DMA_SPA] + 3], buf[0], buf[1], buf[2], buf[3]); @@ -1201,13 +1550,10 @@ esp_pci_dma_read(esp_t *dev, uint16_t saddr) ret = dev->dma_regs[saddr]; if (saddr == DMA_STAT) { - if (dev->rregs[ESP_RSTAT] & STAT_INT) { - ret |= DMA_STAT_SCSIINT; - esp_log("ESP PCI DMA Read SCSI interrupt issued\n"); - } if (!(dev->sbac & SBAC_STATUS)) { dev->dma_regs[DMA_STAT] &= ~(DMA_STAT_ERROR | DMA_STAT_ABORT | DMA_STAT_DONE); esp_log("ESP PCI DMA Read done cleared\n"); + esp_pci_update_irq(dev); } } @@ -1230,6 +1576,7 @@ esp_pci_dma_write(esp_t *dev, uint16_t saddr, uint32_t val) esp_log("PCI DMA disable\n"); break; case 1: /*BLAST*/ + dev->dma_regs[DMA_STAT] |= DMA_STAT_BCMBLT; break; case 2: /*ABORT*/ scsi_device_command_stop(&scsi_devices[dev->bus][dev->id]); @@ -1256,6 +1603,7 @@ esp_pci_dma_write(esp_t *dev, uint16_t saddr, uint32_t val) /* clear some bits on write */ mask = DMA_STAT_ERROR | DMA_STAT_ABORT | DMA_STAT_DONE; dev->dma_regs[DMA_STAT] &= ~(val & mask); + esp_pci_update_irq(dev); } break; @@ -1628,9 +1976,6 @@ dc390_load_eeprom(esp_t *dev) } } -uint8_t esp_pci_regs[256]; -bar_t esp_pci_bar[2]; - static uint8_t esp_pci_read(UNUSED(int func), int addr, void *priv) { @@ -1641,7 +1986,7 @@ esp_pci_read(UNUSED(int func), int addr, void *priv) switch (addr) { case 0x00: // esp_log("ESP PCI: Read DO line = %02x\n", dev->eeprom.out); - if (!dev->has_bios) + if (!dev->has_bios || dev->local) return 0x22; else { if (dev->eeprom.out) @@ -1651,6 +1996,7 @@ esp_pci_read(UNUSED(int func), int addr, void *priv) return 2; } } + break; case 0x01: return 0x10; case 0x02: @@ -1703,6 +2049,7 @@ esp_pci_read(UNUSED(int func), int addr, void *priv) return PCI_INTA; case 0x40 ... 0x4f: + pclog("ESP PCI: Read value %02X to register %02X, ID=%d\n", esp_pci_regs[addr], addr, dev->id); return esp_pci_regs[addr]; default: @@ -1722,15 +2069,17 @@ esp_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv) // esp_log("ESP PCI: Write value %02X to register %02X\n", val, addr); - if ((addr >= 0x80) && (addr <= 0xFF)) { - if (addr == 0x80) { - eesk = val & 0x80 ? 1 : 0; - eedi = val & 0x40 ? 1 : 0; - dc390_write_eeprom(dev, 1, eesk, eedi); - } else if (addr == 0xc0) - dc390_write_eeprom(dev, 0, 0, 0); - // esp_log("ESP PCI: Write value %02X to register %02X\n", val, addr); - return; + if (!dev->local) { + if ((addr >= 0x80) && (addr <= 0xFF)) { + if (addr == 0x80) { + eesk = val & 0x80 ? 1 : 0; + eedi = val & 0x40 ? 1 : 0; + dc390_write_eeprom(dev, 1, eesk, eedi); + } else if (addr == 0xc0) + dc390_write_eeprom(dev, 0, 0, 0); + // esp_log("ESP PCI: Write value %02X to register %02X\n", val, addr); + return; + } } switch (addr) { @@ -1809,6 +2158,7 @@ esp_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv) return; case 0x40 ... 0x4f: + esp_log("ESP PCI: Write value %02X to register %02X, ID=%i.\n", val, addr, dev->id); esp_pci_regs[addr] = val; return; @@ -1827,6 +2177,7 @@ dc390_init(UNUSED(const device_t *info)) dev->bus = scsi_get_bus(); + dev->local = info->local; dev->mca = 0; fifo8_create(&dev->fifo, ESP_FIFO_SZ); @@ -1843,23 +2194,27 @@ dc390_init(UNUSED(const device_t *info)) dev->has_bios = device_get_config_int("bios"); if (dev->has_bios) { dev->BIOSBase = 0xd0000; - rom_init(&dev->bios, DC390_ROM, 0xd0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + if (dev->local) { + ;//rom_init(&dev->bios, AM53C974_ROM, 0xd0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); + } else + rom_init(&dev->bios, DC390_ROM, 0xd0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL); } /* Enable our BIOS space in PCI, if needed. */ - if (dev->has_bios) { + if (dev->has_bios) esp_pci_bar[1].addr = 0xffff0000; - } else { + else esp_pci_bar[1].addr = 0; - } if (dev->has_bios) esp_bios_disable(dev); - sprintf(dev->nvr_path, "dc390_%i.nvr", device_get_instance()); + if (!dev->local) { + sprintf(dev->nvr_path, "dc390_%i.nvr", device_get_instance()); - /* Load the serial EEPROM. */ - dc390_load_eeprom(dev); + /* Load the serial EEPROM. */ + dc390_load_eeprom(dev); + } esp_pci_hard_reset(dev); @@ -2092,6 +2447,20 @@ const device_t dc390_pci_device = { .config = bios_enable_config }; +const device_t am53c974_pci_device = { + .name = "AMD 53c974 PCI", + .internal_name = "am53c974", + .flags = DEVICE_PCI, + .local = 1, + .init = dc390_init, + .close = esp_close, + .reset = NULL, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = bios_enable_config +}; + const device_t ncr53c90a_mca_device = { .name = "NCR 53c90a MCA", .internal_name = "ncr53c90a", From e79b722ebe9ddc12accfedc60549c704be3c3ae6 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Sun, 4 Aug 2024 22:30:50 +0200 Subject: [PATCH 02/38] Actually report the 86Box CD/DVD-ROM SCSI drive as SCSI-2 compliant --- src/scsi/scsi_cdrom.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/scsi/scsi_cdrom.c b/src/scsi/scsi_cdrom.c index a049c69d0..cd5f661ed 100644 --- a/src/scsi/scsi_cdrom.c +++ b/src/scsi/scsi_cdrom.c @@ -3231,9 +3231,6 @@ begin: if (dev->drv->bus_type == CDROM_BUS_SCSI) { dev->buffer[3] = 0x02; switch (dev->drv->type) { - case CDROM_TYPE_86BOX_100: - dev->buffer[2] = 0x05; /*SCSI-2 compliant*/ - break; case CDROM_TYPE_CHINON_CDS431_H42: case CDROM_TYPE_DEC_RRD45_0436: case CDROM_TYPE_MATSHITA_501_10b: From 862494222040b138866eab2b3f55b01e2c93c996 Mon Sep 17 00:00:00 2001 From: TC1995 Date: Mon, 5 Aug 2024 01:00:48 +0200 Subject: [PATCH 03/38] More ESP SCSI fixes (LUN mainly) This commit should fix the NT 3.1 AMD PCscsi drivers when they look for devices on LUN > 0 and causing havoc with them (BSOD). Basically clear the FIFO and set the SEQ_0 bit in the RSEQ read reg. AM53c974 side: a biosless card is biosless. General: fixed all the log excesses. --- src/scsi/scsi_pcscsi.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/src/scsi/scsi_pcscsi.c b/src/scsi/scsi_pcscsi.c index 720fcef82..a19d543ed 100644 --- a/src/scsi/scsi_pcscsi.c +++ b/src/scsi/scsi_pcscsi.c @@ -526,7 +526,7 @@ esp_do_command_phase(esp_t *dev) dev->ti_size = sd->buffer_length; dev->xfer_counter = sd->buffer_length; - pclog("ESP SCSI Command = 0x%02x, ID = %d, LUN = %d, len = %d, phase = %02x.\n", buf[0], dev->id, dev->lun, sd->buffer_length, sd->phase); + esp_log("ESP SCSI Command = 0x%02x, ID = %d, LUN = %d, len = %d, phase = %02x.\n", buf[0], dev->id, dev->lun, sd->buffer_length, sd->phase); fifo8_reset(&dev->cmdfifo); @@ -549,7 +549,7 @@ esp_do_command_phase(esp_t *dev) esp_set_phase(dev, STAT_DI); scsi_device_command_phase1(sd); } - pclog("ESP SCSI Command with no length\n"); + esp_log("ESP SCSI Command with no length\n"); esp_command_complete(dev, sd->status); } esp_transfer_data(dev); @@ -571,10 +571,12 @@ esp_do_message_phase(esp_t *dev) if (scsi_device_present(&scsi_devices[dev->bus][dev->id]) && (dev->lun > 0)) { /* We only support LUN 0 */ - pclog("LUN = %i\n", dev->lun); + esp_log("LUN = %i\n", dev->lun); dev->rregs[ESP_RSTAT] = 0; dev->rregs[ESP_RINTR] = INTR_DC; + dev->rregs[ESP_RSEQ] = SEQ_0; esp_raise_irq(dev); + fifo8_reset(&dev->cmdfifo); return; } @@ -679,7 +681,7 @@ esp_do_dma(esp_t *dev) uint8_t buf[ESP_CMDFIFO_SZ]; uint32_t len; - pclog("ESP SCSI Actual DMA len = %d\n", esp_get_tc(dev)); + esp_log("ESP SCSI Actual DMA len = %d\n", esp_get_tc(dev)); len = esp_get_tc(dev); @@ -865,7 +867,7 @@ esp_do_dma(esp_t *dev) if ((dev->xfer_counter <= 0) && !dev->ti_size && esp_get_tc(dev)) { /* If the guest underflows TC then terminate SCSI request */ - pclog("ESP SCSI Read finished (underflow).\n"); + esp_log("ESP SCSI Read finished (underflow).\n"); scsi_device_command_phase1(sd); esp_command_complete(dev, sd->status); return; @@ -874,11 +876,11 @@ esp_do_dma(esp_t *dev) if ((dev->xfer_counter <= 0) && (fifo8_num_used(&dev->fifo) < 2)) { /* Defer until the scsi layer has completed */ if (dev->ti_size <= 0) { - pclog("ESP SCSI Read finished\n"); + esp_log("ESP SCSI Read finished\n"); scsi_device_command_phase1(sd); esp_command_complete(dev, sd->status); } else { - pclog("ESP SCSI Keep reading\n"); + esp_log("ESP SCSI Keep reading\n"); esp_do_dma(dev); } return; @@ -2049,7 +2051,7 @@ esp_pci_read(UNUSED(int func), int addr, void *priv) return PCI_INTA; case 0x40 ... 0x4f: - pclog("ESP PCI: Read value %02X to register %02X, ID=%d\n", esp_pci_regs[addr], addr, dev->id); + esp_log("ESP PCI: Read value %02X to register %02X, ID=%d\n", esp_pci_regs[addr], addr, dev->id); return esp_pci_regs[addr]; default: @@ -2458,7 +2460,7 @@ const device_t am53c974_pci_device = { { .available = NULL }, .speed_changed = NULL, .force_redraw = NULL, - .config = bios_enable_config + .config = NULL }; const device_t ncr53c90a_mca_device = { From c2ec03954fd3be8d94686192169a8eef66c228ff Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 5 Aug 2024 01:22:39 +0200 Subject: [PATCH 04/38] Implemented B8000/C0000 video RAM access toggle on Tandy 1000 SX and HX, fixes #4670. --- src/machine/m_tandy.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/machine/m_tandy.c b/src/machine/m_tandy.c index e677ff8b4..6a9308627 100644 --- a/src/machine/m_tandy.c +++ b/src/machine/m_tandy.c @@ -1589,6 +1589,10 @@ tandy_write(uint16_t addr, uint8_t val, void *priv) mem_mapping_set_addr(&dev->ram_mapping, ((val >> 1) & 7) * 128 * 1024, 0x20000); } + if (val & 0x01) + mem_mapping_set_addr(&dev->vid->mapping, 0xc0000, 0x10000); + else + mem_mapping_set_addr(&dev->vid->mapping, 0xb8000, 0x8000); dev->ram_bank = val; break; From 9133ee25d9bb45aca1f8ef5a756ee4120c95c1cc Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 5 Aug 2024 01:33:33 +0200 Subject: [PATCH 05/38] Sound Blaster 16 on-card MPU-401 now correctly initializes without its own IRQ. --- src/sound/snd_sb.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/sound/snd_sb.c b/src/sound/snd_sb.c index b9e2dea5a..6f9a2b650 100644 --- a/src/sound/snd_sb.c +++ b/src/sound/snd_sb.c @@ -3190,7 +3190,8 @@ sb_16_init(UNUSED(const device_t *info)) if (mpu_addr) { sb->mpu = (mpu_t *) malloc(sizeof(mpu_t)); memset(sb->mpu, 0, sizeof(mpu_t)); - mpu401_init(sb->mpu, device_get_config_hex16("base401"), device_get_config_int("irq"), M_UART, device_get_config_int("receive_input401")); + mpu401_init(sb->mpu, device_get_config_hex16("base401"), 0, M_UART, + device_get_config_int("receive_input401")); } else sb->mpu = NULL; sb_dsp_set_mpu(&sb->dsp, sb->mpu); @@ -3534,7 +3535,8 @@ sb_awe32_init(UNUSED(const device_t *info)) if (mpu_addr) { sb->mpu = (mpu_t *) malloc(sizeof(mpu_t)); memset(sb->mpu, 0, sizeof(mpu_t)); - mpu401_init(sb->mpu, device_get_config_hex16("base401"), device_get_config_int("irq"), M_UART, device_get_config_int("receive_input401")); + mpu401_init(sb->mpu, device_get_config_hex16("base401"), 0, M_UART, + device_get_config_int("receive_input401")); } else sb->mpu = NULL; sb_dsp_set_mpu(&sb->dsp, sb->mpu); From 7d53c02c39deb4757fd4348c56a56bc10e91d8e7 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 5 Aug 2024 01:35:05 +0200 Subject: [PATCH 06/38] Call it DSP MIDI, not SB MIDI. --- src/sound/snd_sb.c | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/src/sound/snd_sb.c b/src/sound/snd_sb.c index 6f9a2b650..88a7d875a 100644 --- a/src/sound/snd_sb.c +++ b/src/sound/snd_sb.c @@ -4053,7 +4053,7 @@ static const device_config_t sb_config[] = { }, { .name = "receive_input", - .description = "Receive input (SB MIDI)", + .description = "Receive input (DSP MIDI)", .type = CONFIG_BINARY, .default_string = "", .default_int = 1 @@ -4163,7 +4163,7 @@ static const device_config_t sb15_config[] = { }, { .name = "receive_input", - .description = "Receive input (SB MIDI)", + .description = "Receive input (DSP MIDI)", .type = CONFIG_BINARY, .default_string = "", .default_int = 1 @@ -4292,7 +4292,7 @@ static const device_config_t sb2_config[] = { }, { .name = "receive_input", - .description = "Receive input (SB MIDI)", + .description = "Receive input (DSP MIDI)", .type = CONFIG_BINARY, .default_string = "", .default_int = 1 @@ -4358,7 +4358,7 @@ static const device_config_t sb_mcv_config[] = { }, { .name = "receive_input", - .description = "Receive input (SB MIDI)", + .description = "Receive input (DSP MIDI)", .type = CONFIG_BINARY, .default_string = "", .default_int = 1 @@ -4448,7 +4448,7 @@ static const device_config_t sb_pro_config[] = { }, { .name = "receive_input", - .description = "Receive input (SB MIDI)", + .description = "Receive input (DSP MIDI)", .type = CONFIG_BINARY, .default_string = "", .default_int = 1 @@ -4459,7 +4459,7 @@ static const device_config_t sb_pro_config[] = { static const device_config_t sb_pro_mcv_config[] = { { .name = "receive_input", - .description = "Receive input (SB MIDI)", + .description = "Receive input (DSP MIDI)", .type = CONFIG_BINARY, .default_string = "", .default_int = 1 @@ -4612,7 +4612,7 @@ static const device_config_t sb_16_config[] = { }, { .name = "receive_input", - .description = "Receive input (SB MIDI)", + .description = "Receive input (DSP MIDI)", .type = CONFIG_BINARY, .default_string = "", .default_int = 1 @@ -4637,7 +4637,7 @@ static const device_config_t sb_16_pnp_config[] = { }, { .name = "receive_input", - .description = "Receive input (SB MIDI)", + .description = "Receive input (DSP MIDI)", .type = CONFIG_BINARY, .default_string = "", .default_int = 1 @@ -4694,7 +4694,7 @@ static const device_config_t sb_32_pnp_config[] = { }, { .name = "receive_input", - .description = "Receive input (SB MIDI)", + .description = "Receive input (DSP MIDI)", .type = CONFIG_BINARY, .default_string = "", .default_int = 1 @@ -4914,7 +4914,7 @@ static const device_config_t sb_awe32_config[] = { }, { .name = "receive_input", - .description = "Receive input (SB MIDI)", + .description = "Receive input (DSP MIDI)", .type = CONFIG_BINARY, .default_string = "", .default_int = 1 @@ -4971,7 +4971,7 @@ static const device_config_t sb_awe32_pnp_config[] = { }, { .name = "receive_input", - .description = "Receive input (SB MIDI)", + .description = "Receive input (DSP MIDI)", .type = CONFIG_BINARY, .default_string = "", .default_int = 1 @@ -5048,7 +5048,7 @@ static const device_config_t sb_awe64_value_config[] = { }, { .name = "receive_input", - .description = "Receive input (SB MIDI)", + .description = "Receive input (DSP MIDI)", .type = CONFIG_BINARY, .default_string = "", .default_int = 1 @@ -5121,7 +5121,7 @@ static const device_config_t sb_awe64_config[] = { }, { .name = "receive_input", - .description = "Receive input (SB MIDI)", + .description = "Receive input (DSP MIDI)", .type = CONFIG_BINARY, .default_string = "", .default_int = 1 @@ -5186,7 +5186,7 @@ static const device_config_t sb_awe64_gold_config[] = { }, { .name = "receive_input", - .description = "Receive input (SB MIDI)", + .description = "Receive input (DSP MIDI)", .type = CONFIG_BINARY, .default_string = "", .default_int = 1 @@ -5316,7 +5316,7 @@ static const device_config_t ess_688_config[] = { }, { .name = "receive_input", - .description = "Receive input (SB MIDI)", + .description = "Receive input (DSP MIDI)", .type = CONFIG_BINARY, .default_string = "", .default_int = 1 @@ -5447,7 +5447,7 @@ static const device_config_t ess_1688_config[] = { }, { .name = "receive_input", - .description = "Receive input (SB MIDI)", + .description = "Receive input (DSP MIDI)", .type = CONFIG_BINARY, .default_string = "", .default_int = 1 @@ -5466,7 +5466,7 @@ static const device_config_t ess_1688_config[] = { static const device_config_t ess_688_pnp_config[] = { { .name = "receive_input", - .description = "Receive input (SB MIDI)", + .description = "Receive input (DSP MIDI)", .type = CONFIG_BINARY, .default_string = "", .default_int = 1 @@ -5485,7 +5485,7 @@ static const device_config_t ess_1688_pnp_config[] = { }, { .name = "receive_input", - .description = "Receive input (SB MIDI)", + .description = "Receive input (DSP MIDI)", .type = CONFIG_BINARY, .default_string = "", .default_int = 1 From 28c1e7b8fb98d39d84757ebb46838e45762621c1 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 5 Aug 2024 02:21:06 +0200 Subject: [PATCH 07/38] MPU-401: Revert some unnecessary changes, fixes the NT 3.1 Sound Blaster 16 driver regression. --- src/sound/snd_mpu401.c | 19 +++++++------------ 1 file changed, 7 insertions(+), 12 deletions(-) diff --git a/src/sound/snd_mpu401.c b/src/sound/snd_mpu401.c index 40853d98b..21595e373 100644 --- a/src/sound/snd_mpu401.c +++ b/src/sound/snd_mpu401.c @@ -342,11 +342,15 @@ MPU401_Reset(mpu_t *mpu) static uint8_t MPU401_ReadStatus(mpu_t *mpu) { - uint8_t ret = 0x3f; + uint8_t ret = 0x00; + if (mpu->state.cmd_pending) - ret |= STATUS_OUTPUT_NOT_READY; + ret = STATUS_OUTPUT_NOT_READY; if (!mpu->queue_used) - ret |= STATUS_INPUT_NOT_READY; + ret = STATUS_INPUT_NOT_READY; + + ret |= 0x3f; + return ret; } @@ -378,15 +382,6 @@ MPU401_WriteCommand(mpu_t *mpu, uint8_t val) if ((val != 0xff) && (mpu->mode == M_UART)) return; - if (mpu->state.reset) { - if (mpu->state.cmd_pending || (val != 0xff)) { - mpu->state.cmd_pending = val + 1; - return; - } - timer_disable(&mpu->mpu401_reset_callback); - mpu->state.reset = 0; - } - /* In Intelligent mode, UART-only variants of the MPU-401 only support commands 0x3F and 0xFF. */ if (!mpu->intelligent && (val != 0x3f) && (val != 0xff)) return; From 2f4b260499fdd9847e0b29429577e2ac11cc4e71 Mon Sep 17 00:00:00 2001 From: OBattler Date: Mon, 5 Aug 2024 04:34:24 +0200 Subject: [PATCH 08/38] Tandy: No longer incorrectly double the line scan timings in some modes, fixes #4687. --- src/machine/m_tandy.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/src/machine/m_tandy.c b/src/machine/m_tandy.c index 6a9308627..6e7fdfd40 100644 --- a/src/machine/m_tandy.c +++ b/src/machine/m_tandy.c @@ -715,13 +715,8 @@ recalc_timings(tandy_t *dev) double _dispofftime; double disptime; - if (vid->mode & 1) { - disptime = vid->crtc[0] + 1; - _dispontime = vid->crtc[1]; - } else { - disptime = (vid->crtc[0] + 1) << 1; - _dispontime = vid->crtc[1] << 1; - } + disptime = vid->crtc[0] + 1; + _dispontime = vid->crtc[1]; _dispofftime = disptime - _dispontime; _dispontime *= CGACONST; From 58310e02c15c3a7e327cb11e68112a992ac960a6 Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 6 Aug 2024 04:02:11 +0200 Subject: [PATCH 09/38] Tandy: Mask palette indexes read from video memories to the lower 4 bits in 16-color modes, fixes #4691. --- src/machine/m_tandy.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/src/machine/m_tandy.c b/src/machine/m_tandy.c index 6e7fdfd40..9d9d54577 100644 --- a/src/machine/m_tandy.c +++ b/src/machine/m_tandy.c @@ -979,10 +979,10 @@ vid_poll(void *priv) for (x = 0; x < vid->crtc[1]; x++) { dat = (vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 3) * 0x2000)] << 8) | vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 3) * 0x2000) + 1]; vid->ma++; - buffer32->line[vid->displine << 1][(x << 3) + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 8] = buffer32->line[vid->displine << 1][(x << 3) + 9] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 9] = vid->array[((dat >> 12) & vid->array[1]) + 16] + 16; - buffer32->line[vid->displine << 1][(x << 3) + 10] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 10] = buffer32->line[vid->displine << 1][(x << 3) + 11] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 11] = vid->array[((dat >> 8) & vid->array[1]) + 16] + 16; - buffer32->line[vid->displine << 1][(x << 3) + 12] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 12] = buffer32->line[vid->displine << 1][(x << 3) + 13] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 13] = vid->array[((dat >> 4) & vid->array[1]) + 16] + 16; - buffer32->line[vid->displine << 1][(x << 3) + 14] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 14] = buffer32->line[vid->displine << 1][(x << 3) + 15] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 15] = vid->array[(dat & vid->array[1]) + 16] + 16; + buffer32->line[vid->displine << 1][(x << 3) + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 8] = buffer32->line[vid->displine << 1][(x << 3) + 9] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 9] = vid->array[((dat >> 12) & vid->array[1] & 0x0f) + 16] + 16; + buffer32->line[vid->displine << 1][(x << 3) + 10] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 10] = buffer32->line[vid->displine << 1][(x << 3) + 11] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 11] = vid->array[((dat >> 8) & vid->array[1] & 0x0f) + 16] + 16; + buffer32->line[vid->displine << 1][(x << 3) + 12] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 12] = buffer32->line[vid->displine << 1][(x << 3) + 13] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 13] = vid->array[((dat >> 4) & vid->array[1] & 0x0f) + 16] + 16; + buffer32->line[vid->displine << 1][(x << 3) + 14] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 14] = buffer32->line[vid->displine << 1][(x << 3) + 15] = buffer32->line[(vid->displine << 1) + 1][(x << 3) + 15] = vid->array[(dat & vid->array[1] & 0x0f) + 16] + 16; } } else if (vid->array[3] & 0x10) { /*160x200x16*/ for (x = 0; x < vid->crtc[1]; x++) { @@ -992,10 +992,10 @@ vid_poll(void *priv) dat = (vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 3) * 0x2000)] << 8) | vid->vram[((vid->ma << 1) & 0x1fff) + ((vid->sc & 3) * 0x2000) + 1]; } vid->ma++; - buffer32->line[vid->displine << 1][(x << 4) + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 8] = buffer32->line[vid->displine << 1][(x << 4) + 9] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 9] = buffer32->line[vid->displine << 1][(x << 4) + 10] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 10] = buffer32->line[vid->displine << 1][(x << 4) + 11] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 11] = vid->array[((dat >> 12) & vid->array[1]) + 16] + 16; - buffer32->line[vid->displine << 1][(x << 4) + 12] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 12] = buffer32->line[vid->displine << 1][(x << 4) + 13] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 13] = buffer32->line[vid->displine << 1][(x << 4) + 14] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 14] = buffer32->line[vid->displine << 1][(x << 4) + 15] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 15] = vid->array[((dat >> 8) & vid->array[1]) + 16] + 16; - buffer32->line[vid->displine << 1][(x << 4) + 16] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 16] = buffer32->line[vid->displine << 1][(x << 4) + 17] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 17] = buffer32->line[vid->displine << 1][(x << 4) + 18] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 18] = buffer32->line[vid->displine << 1][(x << 4) + 19] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 19] = vid->array[((dat >> 4) & vid->array[1]) + 16] + 16; - buffer32->line[vid->displine << 1][(x << 4) + 20] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 20] = buffer32->line[vid->displine << 1][(x << 4) + 21] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 21] = buffer32->line[vid->displine << 1][(x << 4) + 22] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 22] = buffer32->line[vid->displine << 1][(x << 4) + 23] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 23] = vid->array[(dat & vid->array[1]) + 16] + 16; + buffer32->line[vid->displine << 1][(x << 4) + 8] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 8] = buffer32->line[vid->displine << 1][(x << 4) + 9] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 9] = buffer32->line[vid->displine << 1][(x << 4) + 10] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 10] = buffer32->line[vid->displine << 1][(x << 4) + 11] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 11] = vid->array[((dat >> 12) & vid->array[1] & 0x0f) + 16] + 16; + buffer32->line[vid->displine << 1][(x << 4) + 12] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 12] = buffer32->line[vid->displine << 1][(x << 4) + 13] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 13] = buffer32->line[vid->displine << 1][(x << 4) + 14] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 14] = buffer32->line[vid->displine << 1][(x << 4) + 15] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 15] = vid->array[((dat >> 8) & vid->array[1] & 0x0f) + 16] + 16; + buffer32->line[vid->displine << 1][(x << 4) + 16] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 16] = buffer32->line[vid->displine << 1][(x << 4) + 17] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 17] = buffer32->line[vid->displine << 1][(x << 4) + 18] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 18] = buffer32->line[vid->displine << 1][(x << 4) + 19] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 19] = vid->array[((dat >> 4) & vid->array[1] & 0x0f) + 16] + 16; + buffer32->line[vid->displine << 1][(x << 4) + 20] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 20] = buffer32->line[vid->displine << 1][(x << 4) + 21] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 21] = buffer32->line[vid->displine << 1][(x << 4) + 22] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 22] = buffer32->line[vid->displine << 1][(x << 4) + 23] = buffer32->line[(vid->displine << 1) + 1][(x << 4) + 23] = vid->array[(dat & vid->array[1] & 0x0f) + 16] + 16; } } else if (vid->array[3] & 0x08) { /*640x200x4 - this implementation is a complete guess!*/ for (x = 0; x < vid->crtc[1]; x++) { From 608165295bd49eb52188b8e7cc1a410ccd880c93 Mon Sep 17 00:00:00 2001 From: OBattler Date: Tue, 6 Aug 2024 06:06:02 +0200 Subject: [PATCH 10/38] Tandy 1000 HX control register fixes, fixes Space Quest 3. --- src/machine/m_tandy.c | 29 +++++++++++++++++++++-------- 1 file changed, 21 insertions(+), 8 deletions(-) diff --git a/src/machine/m_tandy.c b/src/machine/m_tandy.c index 9d9d54577..660710526 100644 --- a/src/machine/m_tandy.c +++ b/src/machine/m_tandy.c @@ -129,6 +129,7 @@ typedef struct tandy_t { uint32_t base; uint32_t mask; + int is_hx; int is_sl2; t1kvid_t *vid; @@ -1571,12 +1572,12 @@ tandy_write(uint16_t addr, uint8_t val, void *priv) switch (addr) { case 0x00a0: - if (val & 0x10) { + if (dev->is_hx && (val & 0x10)) { dev->base = (mem_size - 256) * 1024; dev->mask = 0x3ffff; mem_mapping_set_addr(&ram_low_mapping, 0, dev->base); mem_mapping_set_addr(&dev->ram_mapping, - ((val >> 1) & 7) * 128 * 1024, 0x40000); + (((val >> 1) & 7) - 1) * 128 * 1024, 0x40000); } else { dev->base = (mem_size - 128) * 1024; dev->mask = 0x1ffff; @@ -1584,10 +1585,22 @@ tandy_write(uint16_t addr, uint8_t val, void *priv) mem_mapping_set_addr(&dev->ram_mapping, ((val >> 1) & 7) * 128 * 1024, 0x20000); } - if (val & 0x01) - mem_mapping_set_addr(&dev->vid->mapping, 0xc0000, 0x10000); - else - mem_mapping_set_addr(&dev->vid->mapping, 0xb8000, 0x8000); + if (dev->is_hx) { + io_removehandler(0x03d0, 16, + vid_in, NULL, NULL, vid_out, NULL, NULL, dev); + if (val & 0x01) + mem_mapping_disable(&dev->vid->mapping); + else { + io_sethandler(0x03d0, 16, + vid_in, NULL, NULL, vid_out, NULL, NULL, dev); + mem_mapping_set_addr(&dev->vid->mapping, 0xb8000, 0x8000); + } + } else { + if (val & 0x01) + mem_mapping_set_addr(&dev->vid->mapping, 0xc0000, 0x10000); + else + mem_mapping_set_addr(&dev->vid->mapping, 0xb8000, 0x8000); + } dev->ram_bank = val; break; @@ -1717,8 +1730,7 @@ machine_tandy1k_init(const machine_t *model, int type) { tandy_t *dev; - dev = malloc(sizeof(tandy_t)); - memset(dev, 0x00, sizeof(tandy_t)); + dev = calloc(1, sizeof(tandy_t)); machine_common_init(model); @@ -1753,6 +1765,7 @@ machine_tandy1k_init(const machine_t *model, int type) break; case TYPE_TANDY1000HX: + dev->is_hx = 1; keyboard_set_table(scancode_tandy); io_sethandler(0x00a0, 1, tandy_read, NULL, NULL, tandy_write, NULL, NULL, dev); From 00035f7c69c50210abb46ce801668cefdb5f8383 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Tue, 6 Aug 2024 13:47:47 -0400 Subject: [PATCH 11/38] Fix Tandy 1000 SX minimum RAM --- src/machine/machine_table.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index 2608f1ead..a57261371 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -1521,7 +1521,7 @@ const machine_t machines[] = { .bus_flags = MACHINE_PC, .flags = MACHINE_VIDEO_FIXED, .ram = { - .min = 128, + .min = 384, .max = 640, .step = 128 }, From 7cb0c648117a2550530dce80efa8ba51f60f9242 Mon Sep 17 00:00:00 2001 From: gasiba Date: Tue, 6 Aug 2024 22:33:27 +0200 Subject: [PATCH 12/38] add helper script to download ROMS to user's home directory --- scripts/86Box-install-roms.sh | 73 +++++++++++++++++++++++++++++++++++ 1 file changed, 73 insertions(+) create mode 100755 scripts/86Box-install-roms.sh diff --git a/scripts/86Box-install-roms.sh b/scripts/86Box-install-roms.sh new file mode 100755 index 000000000..b13d93acc --- /dev/null +++ b/scripts/86Box-install-roms.sh @@ -0,0 +1,73 @@ +#!/bin/sh + +URL="https://github.com/86Box/roms/archive/refs/tags/v4.2.zip" +TMP_FILE="/tmp/86Box-ROMS.zip" +EXTRACT_DIR="/tmp/86Box-ROMS-extracted" +DEFAULT_TARGET_DIR="$HOME/.local/share/86Box/roms/" +TARGET_DIR=${TARGET_DIR:-$DEFAULT_TARGET_DIR} + +install_roms() { + if [ -d "$TARGET_DIR" ] && [ "$(ls -A $TARGET_DIR)" ]; then + echo "ROMS already installed in $TARGET_DIR" + echo "To (re)install, please first remove ROMS with -r parameter" + exit 1 + fi + fetch -o "$TMP_FILE" "$URL" + + if [ $? -ne 0 ]; then + echo "Failed to download the file from $URL" + exit 1 + fi + + mkdir -p "$EXTRACT_DIR" + unzip "$TMP_FILE" -d "$EXTRACT_DIR" + + if [ $? -ne 0 ]; then + echo "Failed to decompress the file" + rm "$TMP_FILE" + exit 1 + fi + + mkdir -p "$TARGET_DIR" + cd "$EXTRACT_DIR" + TOP_LEVEL_DIR=$(find . -mindepth 1 -maxdepth 1 -type d) + + if [ -d "$TOP_LEVEL_DIR" ]; then + mv "$TOP_LEVEL_DIR"/* "$TARGET_DIR" + fi + + rm -rf "$TMP_FILE" "$EXTRACT_DIR" + echo "ROMS installed successfully in $TARGET_DIR" +} + +remove_roms() { + if [ -d "$TARGET_DIR" ]; then + rm -rf "$TARGET_DIR" + echo "ROMS removed successfully from $TARGET_DIR" + else + echo "No ROMS directory found in $TARGET_DIR" + fi +} + +help() { + echo "" + echo "$0 [-h|-i|-r]" + echo " -h : this help" + echo " -i : install (this parameter can be omitted)" + echo " -r : remove the ROMS" + echo "" +} + +case "$1" in + -h) + help + ;; + -r) + remove_roms + ;; + -i|*) + install_roms + ;; +esac + +exit 0 From 50c79e1594b2bd839bb48b5849a94007dcb4ba4c Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Tue, 6 Aug 2024 14:10:52 -0400 Subject: [PATCH 13/38] Fix Tandy 1000 HX minimum RAM --- src/machine/machine_table.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index a57261371..460765d70 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -1560,7 +1560,7 @@ const machine_t machines[] = { .bus_flags = MACHINE_PC, .flags = MACHINE_VIDEO_FIXED, .ram = { - .min = 384, + .min = 256, .max = 640, .step = 128 }, From 834bcd09c15293693b6e418aed3de2f85d84ebe6 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Tue, 6 Aug 2024 16:18:56 -0400 Subject: [PATCH 14/38] Tidy up tandy 1000 SX --- src/include/86box/machine.h | 2 +- src/machine/m_tandy.c | 6 ++++-- src/machine/machine_table.c | 2 +- 3 files changed, 6 insertions(+), 4 deletions(-) diff --git a/src/include/86box/machine.h b/src/include/86box/machine.h index 42fb9a6d7..8afd5e28f 100644 --- a/src/include/86box/machine.h +++ b/src/include/86box/machine.h @@ -890,7 +890,7 @@ extern int machine_ps2_model_70_type4_init(const machine_t *); /* m_tandy.c */ extern int tandy1k_eeprom_read(void); -extern int machine_tandy_init(const machine_t *); +extern int machine_tandy1000sx_init(const machine_t *); extern int machine_tandy1000hx_init(const machine_t *); extern int machine_tandy1000sl2_init(const machine_t *); diff --git a/src/machine/m_tandy.c b/src/machine/m_tandy.c index 660710526..c5de74824 100644 --- a/src/machine/m_tandy.c +++ b/src/machine/m_tandy.c @@ -52,6 +52,7 @@ enum { enum { TYPE_TANDY = 0, + TYPE_TANDY1000SX, TYPE_TANDY1000HX, TYPE_TANDY1000SL2 }; @@ -1756,6 +1757,7 @@ machine_tandy1k_init(const machine_t *model, int type) switch (type) { case TYPE_TANDY: + case TYPE_TANDY1000SX: keyboard_set_table(scancode_tandy); io_sethandler(0x00a0, 1, tandy_read, NULL, NULL, tandy_write, NULL, NULL, dev); @@ -1802,7 +1804,7 @@ tandy1k_eeprom_read(void) } int -machine_tandy_init(const machine_t *model) +machine_tandy1000sx_init(const machine_t *model) { int ret; @@ -1812,7 +1814,7 @@ machine_tandy_init(const machine_t *model) if (bios_only || !ret) return ret; - machine_tandy1k_init(model, TYPE_TANDY); + machine_tandy1k_init(model, TYPE_TANDY1000SX); return ret; } diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index 460765d70..a9d83f241 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -1503,7 +1503,7 @@ const machine_t machines[] = { .internal_name = "tandy", .type = MACHINE_TYPE_8088, .chipset = MACHINE_CHIPSET_PROPRIETARY, - .init = machine_tandy_init, + .init = machine_tandy1000sx_init, .p1_handler = NULL, .gpio_handler = NULL, .available_flag = MACHINE_AVAILABLE, From 837c16f5468fa04dad7bc6b648d66c44cc34d6ad Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Tue, 6 Aug 2024 18:01:13 -0400 Subject: [PATCH 15/38] Less magic numbers in PIT code --- src/include/86box/pit.h | 4 +++- src/include/86box/pit_fast.h | 2 +- src/pit.c | 6 +++--- src/pit_fast.c | 6 +++--- 4 files changed, 10 insertions(+), 8 deletions(-) diff --git a/src/include/86box/pit.h b/src/include/86box/pit.h index eb03fd2c9..3c5a9cb52 100644 --- a/src/include/86box/pit.h +++ b/src/include/86box/pit.h @@ -19,6 +19,8 @@ #ifndef EMU_PIT_H #define EMU_PIT_H +#define NUM_COUNTERS 3 + typedef struct ctr_t { uint8_t m; uint8_t ctrl; @@ -68,7 +70,7 @@ typedef struct PIT { int clock; pc_timer_t callback_timer; - ctr_t counters[3]; + ctr_t counters[NUM_COUNTERS]; uint8_t ctrl; diff --git a/src/include/86box/pit_fast.h b/src/include/86box/pit_fast.h index 5650ffb4d..f824bad68 100644 --- a/src/include/86box/pit_fast.h +++ b/src/include/86box/pit_fast.h @@ -68,7 +68,7 @@ typedef struct ctrf_t { typedef struct pitf_t { int flags; - ctrf_t counters[3]; + ctrf_t counters[NUM_COUNTERS]; uint8_t ctrl; diff --git a/src/pit.c b/src/pit.c index 0816094cb..8b9f23a79 100644 --- a/src/pit.c +++ b/src/pit.c @@ -526,7 +526,7 @@ pit_timer_over(void *priv) dev->clock ^= 1; - for (uint8_t i = 0; i < 3; i++) + for (uint8_t i = 0; i < NUM_COUNTERS; i++) pit_ctr_set_clock_common(&dev->counters[i], dev->clock, dev); timer_advance_u64(&dev->callback_timer, dev->pit_const >> 1ULL); @@ -874,7 +874,7 @@ pit_device_reset(pit_t *dev) { dev->clock = 0; - for (uint8_t i = 0; i < 3; i++) + for (uint8_t i = 0; i < NUM_COUNTERS; i++) ctr_reset(&dev->counters[i]); } @@ -885,7 +885,7 @@ pit_reset(pit_t *dev) dev->clock = 0; - for (uint8_t i = 0; i < 3; i++) + for (uint8_t i = 0; i < NUM_COUNTERS; i++) ctr_reset(&dev->counters[i]); /* Disable speaker gate. */ diff --git a/src/pit_fast.c b/src/pit_fast.c index e986600ee..0f82d894d 100644 --- a/src/pit_fast.c +++ b/src/pit_fast.c @@ -670,7 +670,7 @@ pitf_reset(pitf_t *dev) { memset(dev, 0, sizeof(pitf_t)); - for (uint8_t i = 0; i < 3; i++) + for (uint8_t i = 0; i < NUM_COUNTERS; i++) ctr_reset(&dev->counters[i]); /* Disable speaker gate. */ @@ -683,7 +683,7 @@ pitf_set_pit_const(void *data, uint64_t pit_const) pitf_t *pit = (pitf_t *) data; ctrf_t *ctr; - for (uint8_t i = 0; i < 3; i++) { + for (uint8_t i = 0; i < NUM_COUNTERS; i++) { ctr = &pit->counters[i]; ctr->pit_const = pit_const; } @@ -728,7 +728,7 @@ pitf_init(const device_t *info) dev->flags = info->local; if (!(dev->flags & PIT_PS2) && !(dev->flags & PIT_CUSTOM_CLOCK)) { - for (int i = 0; i < 3; i++) { + for (int i = 0; i < NUM_COUNTERS; i++) { ctrf_t *ctr = &dev->counters[i]; ctr->priv = dev; timer_add(&ctr->timer, pitf_timer_over, (void *) ctr, 0); From b78ad87d67312a07037e475bd811c1501ef50d2b Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Tue, 6 Aug 2024 19:23:05 -0400 Subject: [PATCH 16/38] Fix compile error in pit_fast with logging enabled --- src/pit_fast.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/pit_fast.c b/src/pit_fast.c index 0f82d894d..e9befb202 100644 --- a/src/pit_fast.c +++ b/src/pit_fast.c @@ -476,7 +476,7 @@ pitf_write(uint16_t addr, uint8_t val, void *priv) pitf_ctr_set_out(ctr, 1, dev); ctr->disabled = 1; - pit_log("PIT %i: M = %i, RM/WM = %i, State = %i, Out = %i\n", t, ctr->m, ctr->rm, ctr->state, ctr->out); + pit_log("PIT %i: M = %i, RM/WM = %i, Out = %i\n", t, ctr->m, ctr->rm, ctr->out); } ctr->thit = 0; } From f04229280b25dbb7ec970653eb1fce8e0dc363dd Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Tue, 6 Aug 2024 19:45:10 -0400 Subject: [PATCH 17/38] Give pit_fast unique logging name --- src/pit_fast.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/src/pit_fast.c b/src/pit_fast.c index e9befb202..0d56a6616 100644 --- a/src/pit_fast.c +++ b/src/pit_fast.c @@ -47,22 +47,22 @@ #define PIT_CUSTOM_CLOCK 64 /* The PIT uses custom clock inputs provided by another provider. */ #define PIT_SECONDARY 128 /* The PIT is secondary (ports 0048-004B). */ -#ifdef ENABLE_PIT_LOG -int pit_do_log = ENABLE_PIT_LOG; +#ifdef ENABLE_PIT_FAST_LOG +int pit_fast_do_log = ENABLE_PIT_FAST_LOG; static void -pit_log(const char *fmt, ...) +pit_fast_log(const char *fmt, ...) { va_list ap; - if (pit_do_log) { + if (pit_fast_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); va_end(ap); } } #else -# define pit_log(fmt, ...) +# define pit_fast_log(fmt, ...) #endif static void @@ -420,7 +420,7 @@ pitf_write(uint16_t addr, uint8_t val, void *priv) int t = (addr & 3); ctrf_t *ctr; - pit_log("[%04X:%08X] pit_write(%04X, %02X, %08X)\n", CS, cpu_state.pc, addr, val, priv); + pit_fast_log("[%04X:%08X] pit_write(%04X, %02X, %08X)\n", CS, cpu_state.pc, addr, val, priv); cycles -= ISA_CYCLES(8); @@ -438,7 +438,7 @@ pitf_write(uint16_t addr, uint8_t val, void *priv) pitf_ctr_latch_count(&dev->counters[1]); if (val & 8) pitf_ctr_latch_count(&dev->counters[2]); - pit_log("PIT %i: Initiated readback command\n", t); + pit_fast_log("PIT %i: Initiated readback command\n", t); } if (!(val & 0x10)) { if (val & 2) @@ -456,7 +456,7 @@ pitf_write(uint16_t addr, uint8_t val, void *priv) if (!(dev->ctrl & 0x30)) { pitf_ctr_latch_count(ctr); dev->ctrl |= 0x30; - pit_log("PIT %i: Initiated latched read, %i bytes latched\n", + pit_fast_log("PIT %i: Initiated latched read, %i bytes latched\n", t, ctr->latched); } else { ctr->ctrl = val; @@ -476,7 +476,7 @@ pitf_write(uint16_t addr, uint8_t val, void *priv) pitf_ctr_set_out(ctr, 1, dev); ctr->disabled = 1; - pit_log("PIT %i: M = %i, RM/WM = %i, Out = %i\n", t, ctr->m, ctr->rm, ctr->out); + pit_fast_log("PIT %i: M = %i, RM/WM = %i, Out = %i\n", t, ctr->m, ctr->rm, ctr->out); } ctr->thit = 0; } @@ -619,7 +619,7 @@ pitf_read(uint16_t addr, void *priv) break; } - pit_log("[%04X:%08X] pit_read(%04X, %08X) = %02X\n", CS, cpu_state.pc, addr, priv, ret); + pit_fast_log("[%04X:%08X] pit_read(%04X, %08X) = %02X\n", CS, cpu_state.pc, addr, priv, ret); return ret; } From fbfb6849c4acbf855400bd2369ed8463e98e9318 Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 7 Aug 2024 05:08:41 +0200 Subject: [PATCH 18/38] Compaq EGA: Implement C&T behavior where reads in mode 0 return 0xFF if bit 2 of GDC register 4 is set, fixes video memory size detection, fixes #4571. --- src/video/vid_ega.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/video/vid_ega.c b/src/video/vid_ega.c index 8f995117c..9a0ebfc50 100644 --- a/src/video/vid_ega.c +++ b/src/video/vid_ega.c @@ -1278,6 +1278,10 @@ ega_read(uint32_t addr, void *priv) temp4 &= (ega->colournocare & 8) ? 0xff : 0; return ~(temp | temp2 | temp3 | temp4); } + + if ((ega_type == 2) && (ega->gdcreg[4] & 0x04)) + return 0xff; + return ega->vram[addr | readplane]; } From 3c8c66d64960f6957395a9cd80c702f464efac1b Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 7 Aug 2024 05:32:52 +0200 Subject: [PATCH 19/38] Re-add the English translations of the Fullscreen menu item, they're apparently needed for the keyboard shortcut to show up in the menu. --- src/qt/languages/en-GB.po | 3 +++ src/qt/languages/en-US.po | 3 +++ 2 files changed, 6 insertions(+) diff --git a/src/qt/languages/en-GB.po b/src/qt/languages/en-GB.po index fa6d1e2c3..b8b421f10 100644 --- a/src/qt/languages/en-GB.po +++ b/src/qt/languages/en-GB.po @@ -6,6 +6,9 @@ msgstr "" "X-Language: en_GB\n" "X-Source-Language: en_US\n" +msgid "&Fullscreen\tCtrl+Alt+PgUp" +msgstr "&Fullscreen\tCtrl+Alt+PgUp" + msgid "RGB &Color" msgstr "RGB &Colour" diff --git a/src/qt/languages/en-US.po b/src/qt/languages/en-US.po index e78536c66..9efb2ad0d 100644 --- a/src/qt/languages/en-US.po +++ b/src/qt/languages/en-US.po @@ -5,3 +5,6 @@ msgstr "" "Content-Transfer-Encoding: 8bit\n" "X-Language: en_US\n" "X-Source-Language: en_US\n" + +msgid "&Fullscreen\tCtrl+Alt+PgUp" +msgstr "&Fullscreen\tCtrl+Alt+PgUp" From f537ae792ea4817368e821154081c78b636b71b5 Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 7 Aug 2024 05:38:05 +0200 Subject: [PATCH 20/38] Actually fix that correctly now by actually adding the shortcut to the menu item. --- src/qt/languages/en-GB.po | 3 --- src/qt/languages/en-US.po | 3 --- src/qt/qt_mainwindow.ui | 3 +++ 3 files changed, 3 insertions(+), 6 deletions(-) diff --git a/src/qt/languages/en-GB.po b/src/qt/languages/en-GB.po index b8b421f10..fa6d1e2c3 100644 --- a/src/qt/languages/en-GB.po +++ b/src/qt/languages/en-GB.po @@ -6,9 +6,6 @@ msgstr "" "X-Language: en_GB\n" "X-Source-Language: en_US\n" -msgid "&Fullscreen\tCtrl+Alt+PgUp" -msgstr "&Fullscreen\tCtrl+Alt+PgUp" - msgid "RGB &Color" msgstr "RGB &Colour" diff --git a/src/qt/languages/en-US.po b/src/qt/languages/en-US.po index 9efb2ad0d..e78536c66 100644 --- a/src/qt/languages/en-US.po +++ b/src/qt/languages/en-US.po @@ -5,6 +5,3 @@ msgstr "" "Content-Transfer-Encoding: 8bit\n" "X-Language: en_US\n" "X-Source-Language: en_US\n" - -msgid "&Fullscreen\tCtrl+Alt+PgUp" -msgstr "&Fullscreen\tCtrl+Alt+PgUp" diff --git a/src/qt/qt_mainwindow.ui b/src/qt/qt_mainwindow.ui index 90dbfdab7..b1dc0ecf1 100644 --- a/src/qt/qt_mainwindow.ui +++ b/src/qt/qt_mainwindow.ui @@ -373,6 +373,9 @@ &Fullscreen + + Ctrl+Alt+PgUp + From 37ceea4ed04f4398817928804ca45a54647d34cc Mon Sep 17 00:00:00 2001 From: OBattler Date: Wed, 7 Aug 2024 06:11:50 +0200 Subject: [PATCH 21/38] Fix emulator-handled UI keyboard combinations when keyboard requires capture and is not captured, also fix keyboard input in full screen in such situations, fixes #4697. --- src/device/keyboard.c | 41 ++++++++++++++++++--------------- src/include/86box/keyboard.h | 1 + src/qt/qt_mainwindow.cpp | 12 +++++----- src/qt/qt_winrawinputfilter.cpp | 3 --- 4 files changed, 30 insertions(+), 27 deletions(-) diff --git a/src/device/keyboard.c b/src/device/keyboard.c index 5f9986d7b..ea81e7525 100644 --- a/src/device/keyboard.c +++ b/src/device/keyboard.c @@ -25,6 +25,7 @@ #include <86box/86box.h> #include <86box/machine.h> #include <86box/keyboard.h> +#include <86box/plat.h> #include "cpu.h" @@ -50,7 +51,8 @@ uint16_t key_uncapture_2 = 0x14f; /* End */ void (*keyboard_send)(uint16_t val); -static int recv_key[512]; /* keyboard input buffer */ +static int recv_key[512] = { 0 }; /* keyboard input buffer */ +static int recv_key_ui[512] = { 0 }; /* keyboard input buffer */ static int oldkey[512]; #if 0 static int keydelay[512]; @@ -238,16 +240,13 @@ keyboard_input(int down, uint16_t scan) } } - /* NOTE: Shouldn't this be some sort of bit shift? An array of 8 unsigned 64-bit integers - should be enough. */ -#if 0 - recv_key[scan >> 6] |= ((uint64_t) down << ((uint64_t) scan & 0x3fLL)); -#endif - /* pclog("Received scan code: %03X (%s)\n", scan & 0x1ff, down ? "down" : "up"); */ - recv_key[scan & 0x1ff] = down; + recv_key_ui[scan & 0x1ff] = down; - key_process(scan & 0x1ff, down); + if (mouse_capture || !kbd_req_capture || video_fullscreen) { + recv_key[scan & 0x1ff] = down; + key_process(scan & 0x1ff, down); + } } static uint8_t @@ -343,30 +342,36 @@ keyboard_recv(uint16_t key) return recv_key[key]; } +int +keyboard_recv_ui(uint16_t key) +{ + return recv_key_ui[key]; +} + /* Do we have Control-Alt-PgDn in the keyboard buffer? */ int keyboard_isfsenter(void) { - return ((recv_key[0x01d] || recv_key[0x11d]) && (recv_key[0x038] || recv_key[0x138]) && (recv_key[0x049] || recv_key[0x149])); + return ((recv_key_ui[0x01d] || recv_key_ui[0x11d]) && (recv_key_ui[0x038] || recv_key_ui[0x138]) && (recv_key_ui[0x049] || recv_key_ui[0x149])); } int keyboard_isfsenter_up(void) { - return (!recv_key[0x01d] && !recv_key[0x11d] && !recv_key[0x038] && !recv_key[0x138] && !recv_key[0x049] && !recv_key[0x149]); + return (!recv_key_ui[0x01d] && !recv_key_ui[0x11d] && !recv_key_ui[0x038] && !recv_key_ui[0x138] && !recv_key_ui[0x049] && !recv_key_ui[0x149]); } /* Do we have Control-Alt-PgDn in the keyboard buffer? */ int keyboard_isfsexit(void) { - return ((recv_key[0x01d] || recv_key[0x11d]) && (recv_key[0x038] || recv_key[0x138]) && (recv_key[0x051] || recv_key[0x151])); + return ((recv_key_ui[0x01d] || recv_key_ui[0x11d]) && (recv_key_ui[0x038] || recv_key_ui[0x138]) && (recv_key_ui[0x051] || recv_key_ui[0x151])); } int keyboard_isfsexit_up(void) { - return (!recv_key[0x01d] && !recv_key[0x11d] && !recv_key[0x038] && !recv_key[0x138] && !recv_key[0x051] && !recv_key[0x151]); + return (!recv_key_ui[0x01d] && !recv_key_ui[0x11d] && !recv_key_ui[0x038] && !recv_key_ui[0x138] && !recv_key_ui[0x051] && !recv_key_ui[0x151]); } /* Do we have the mouse uncapture combination in the keyboard buffer? */ @@ -374,10 +379,10 @@ int keyboard_ismsexit(void) { if ((key_prefix_2_1 != 0x000) || (key_prefix_2_2 != 0x000)) - return ((recv_key[key_prefix_1_1] || recv_key[key_prefix_1_2]) && - (recv_key[key_prefix_2_1] || recv_key[key_prefix_2_2]) && - (recv_key[key_uncapture_1] || recv_key[key_uncapture_2])); + return ((recv_key_ui[key_prefix_1_1] || recv_key_ui[key_prefix_1_2]) && + (recv_key_ui[key_prefix_2_1] || recv_key_ui[key_prefix_2_2]) && + (recv_key_ui[key_uncapture_1] || recv_key_ui[key_uncapture_2])); else - return ((recv_key[key_prefix_1_1] || recv_key[key_prefix_1_2]) && - (recv_key[key_uncapture_1] || recv_key[key_uncapture_2])); + return ((recv_key_ui[key_prefix_1_1] || recv_key_ui[key_prefix_1_2]) && + (recv_key_ui[key_uncapture_1] || recv_key_ui[key_uncapture_2])); } diff --git a/src/include/86box/keyboard.h b/src/include/86box/keyboard.h index bf9a76d73..eec64990e 100644 --- a/src/include/86box/keyboard.h +++ b/src/include/86box/keyboard.h @@ -272,6 +272,7 @@ extern uint8_t keyboard_get_shift(void); extern void keyboard_get_states(uint8_t *cl, uint8_t *nl, uint8_t *sl); extern void keyboard_set_states(uint8_t cl, uint8_t nl, uint8_t sl); extern int keyboard_recv(uint16_t key); +extern int keyboard_recv_ui(uint16_t key); extern int keyboard_isfsenter(void); extern int keyboard_isfsenter_up(void); extern int keyboard_isfsexit(void); diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index 0b7ebb33d..916f3eb5e 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -1218,7 +1218,7 @@ MainWindow::getTitle(wchar_t *title) bool MainWindow::eventFilter(QObject *receiver, QEvent *event) { - if (!dopause && (mouse_capture || !kbd_req_capture)) { + if (!dopause) { if (event->type() == QEvent::Shortcut) { auto shortcutEvent = (QShortcutEvent *) event; if (shortcutEvent->key() == ui->actionExit->shortcut()) { @@ -1299,7 +1299,7 @@ MainWindow::showMessage_(int flags, const QString &header, const QString &messag void MainWindow::keyPressEvent(QKeyEvent *event) { - if (send_keyboard_input && !(kbd_req_capture && !mouse_capture)) { + if (send_keyboard_input) { #ifdef Q_OS_MACOS processMacKeyboardInput(true, event); #else @@ -1312,10 +1312,10 @@ MainWindow::keyPressEvent(QKeyEvent *event) if (keyboard_ismsexit()) plat_mouse_capture(0); - if ((video_fullscreen > 0) && (keyboard_recv(0x1D) || keyboard_recv(0x11D))) { - if (keyboard_recv(0x57)) + if ((video_fullscreen > 0) && (keyboard_recv_ui(0x1D) || keyboard_recv_ui(0x11D))) { + if (keyboard_recv_ui(0x57)) ui->actionTake_screenshot->trigger(); - else if (keyboard_recv(0x58)) + else if (keyboard_recv_ui(0x58)) pc_send_cad(); } @@ -1338,7 +1338,7 @@ void MainWindow::keyReleaseEvent(QKeyEvent *event) { if (event->key() == Qt::Key_Pause) { - if (keyboard_recv(0x38) && keyboard_recv(0x138)) { + if (keyboard_recv_ui(0x38) && keyboard_recv_ui(0x138)) { plat_pause(dopause ^ 1); } } diff --git a/src/qt/qt_winrawinputfilter.cpp b/src/qt/qt_winrawinputfilter.cpp index 857ccef3b..66d8ad8e5 100644 --- a/src/qt/qt_winrawinputfilter.cpp +++ b/src/qt/qt_winrawinputfilter.cpp @@ -176,9 +176,6 @@ WindowsRawInputFilter::keyboard_handle(PRAWINPUT raw) RAWKEYBOARD rawKB = raw->data.keyboard; scancode = rawKB.MakeCode; - if (kbd_req_capture && !mouse_capture) - return; - /* If it's not a scan code that starts with 0xE1 */ if ((rawKB.Flags & RI_KEY_E1)) { if (rawKB.MakeCode == 0x1D) { From 7b73c015d72b985ab75d8b7d1a82210465930743 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Tue, 6 Aug 2024 23:47:45 -0400 Subject: [PATCH 22/38] Compile fix for sis_85c50x.c logging --- src/chipset/sis_85c50x.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/chipset/sis_85c50x.c b/src/chipset/sis_85c50x.c index 137ddb5cf..2286105ce 100644 --- a/src/chipset/sis_85c50x.c +++ b/src/chipset/sis_85c50x.c @@ -107,8 +107,8 @@ sis_85c50x_shadow_recalc(sis_85c50x_t *dev) if (dev->states[8 + i] != state) { mem_set_mem_state_both(base, 0x00004000, state); sis_85c50x_log("%05X-%05X: R%c, W%c\n", base, base + 0x3fff, - (dev->pci_conf[0x543 & (0x80 >> i)) ? - ((dev->pci_conf[0x54] & 0x40) ? 'I' : 'D') : 'E', + (dev->pci_conf[0x54] & (0x80 >> i)) ? + ((dev->pci_conf[0x53] & 0x40) ? 'I' : 'D') : 'E', (dev->pci_conf[0x54] & (0x80 >> i)) ? ((dev->pci_conf[0x53] & 0x20) ? 'P' : 'I') : 'E'); dev->states[8 + i] = state; From bda8fe7b9b8e7bfd02160c279956b24a3e366e18 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 7 Aug 2024 00:14:53 -0400 Subject: [PATCH 23/38] Compile fix for cpu/x86.c logging --- src/cpu/x86.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/cpu/x86.c b/src/cpu/x86.c index 5435f366d..4bf381ee4 100644 --- a/src/cpu/x86.c +++ b/src/cpu/x86.c @@ -83,7 +83,9 @@ int fpu_cycles = 0; int in_lock = 0; #ifdef ENABLE_X86_LOG +#if 0 void dumpregs(int); +#endif int x86_do_log = ENABLE_X86_LOG; int indump = 0; @@ -93,13 +95,14 @@ x86_log(const char *fmt, ...) { va_list ap; - if (x808x_do_log) { + if (x86_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); va_end(ap); } } +#if 0 void dumpregs(int force) { @@ -144,6 +147,7 @@ dumpregs(int force) x87_dumpregs(); indump = 0; } +#endif #else # define x86_log(fmt, ...) #endif From 7ffcf545cd080f4b84e67ebab804cb9d27ed6cb3 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 7 Aug 2024 00:32:23 -0400 Subject: [PATCH 24/38] Compile fix for dma.c logging --- src/dma.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/dma.c b/src/dma.c index 1c23c53c2..8bf60cdc8 100644 --- a/src/dma.c +++ b/src/dma.c @@ -18,6 +18,7 @@ * Copyright 2016-2020 Miran Grca. * Copyright 2017-2020 Fred N. van Kempen. */ +#include #include #include #include From 5b8b5d739bf5262021ce0e001bf6e0a3f1663e3f Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 7 Aug 2024 00:28:07 -0400 Subject: [PATCH 25/38] Deal with some magic numbers in vid_ega.c --- src/video/vid_ega.c | 48 +++++++++++++++++++++++++-------------------- 1 file changed, 27 insertions(+), 21 deletions(-) diff --git a/src/video/vid_ega.c b/src/video/vid_ega.c index 9a0ebfc50..712df923c 100644 --- a/src/video/vid_ega.c +++ b/src/video/vid_ega.c @@ -54,11 +54,17 @@ enum { EGA_TSENG }; +enum { + EGA_TYPE_IBM = 0; + EGA_TYPE_OTHER = 1; + EGA_TYPE_COMPAQ = 2; +}; + static video_timings_t timing_ega = { .type = VIDEO_ISA, .write_b = 8, .write_w = 16, .write_l = 32, .read_b = 8, .read_w = 16, .read_l = 32 }; static uint8_t ega_rotate[8][256]; static uint32_t pallook16[256]; static uint32_t pallook64[256]; -static int ega_type = 0; +static int ega_type = EGA_TYPE_IBM; static int old_overscan_color = 0; /* 3C2 controls default mode on EGA. On VGA, it determines monitor type (mono or colour): @@ -180,7 +186,7 @@ ega_out(uint16_t addr, uint8_t val, void *priv) } break; case 0x3c6: - if (ega_type == 2) + if (ega_type == EGA_TYPE_COMPAQ) ega->ctl_mode = val; break; case 0x3ce: @@ -295,47 +301,47 @@ ega_in(uint16_t addr, void *priv) break; case 0x3c0: - if (ega_type == 1) + if (ega_type == EGA_TYPE_OTHER) ret = ega->attraddr | ega->attr_palette_enable; break; case 0x3c1: - if (ega_type == 1) + if (ega_type == EGA_TYPE_OTHER) ret = ega->attrregs[ega->attraddr]; break; case 0x3c2: ret = (egaswitches & (8 >> egaswitchread)) ? 0x10 : 0x00; break; case 0x3c4: - if (ega_type == 1) + if (ega_type == EGA_TYPE_OTHER) ret = ega->seqaddr; break; case 0x3c5: - if (ega_type == 1) + if (ega_type == EGA_TYPE_OTHER) ret = ega->seqregs[ega->seqaddr & 0xf]; break; case 0x3c6: - if (ega_type == 2) + if (ega_type == EGA_TYPE_COMPAQ) ret = ega->ctl_mode; break; case 0x3c8: - if (ega_type == 1) + if (ega_type == EGA_TYPE_OTHER) ret = 2; break; case 0x3cc: - if (ega_type == 1) + if (ega_type == EGA_TYPE_OTHER) ret = ega->miscout; break; case 0x3ce: - if (ega_type == 1) + if (ega_type == EGA_TYPE_OTHER) ret = ega->gdcaddr; break; case 0x3cf: - if (ega_type == 1) + if (ega_type == EGA_TYPE_OTHER) ret = ega->gdcreg[ega->gdcaddr & 0xf]; break; case 0x3d0: case 0x3d4: - if (ega_type == 1) + if (ega_type == EGA_TYPE_OTHER) ret = ega->crtcreg; break; case 0x3d1: @@ -349,28 +355,28 @@ ega_in(uint16_t addr, void *priv) break; case 0x10: - if (ega_type == 1) + if (ega_type == EGA_TYPE_OTHER) ret = ega->crtc[ega->crtcreg]; else ret = ega->light_pen >> 8; break; case 0x11: - if (ega_type == 1) + if (ega_type == EGA_TYPE_OTHER) ret = ega->crtc[ega->crtcreg]; else ret = ega->light_pen & 0xff; break; default: - if (ega_type == 1) + if (ega_type == EGA_TYPE_OTHER) ret = ega->crtc[ega->crtcreg]; break; } break; case 0x3da: ega->attrff = 0; - if (ega_type == 2) { + if (ega_type == EGA_TYPE_COMPAQ) { ret = ega->stat & 0xcf; switch ((ega->attrregs[0x12] >> 4) & 0x03) { case 0x00: @@ -466,7 +472,7 @@ ega_recalctimings(ega_t *ega) ega->linedbl = ega->crtc[9] & 0x80; ega->rowcount = ega->crtc[9] & 0x1f; - if (ega_type == 2) { + if (ega_type == EGA_TYPE_COMPAQ) { color = (ega->miscout & 1); clksel = ((ega->miscout & 0xc) >> 2); @@ -1396,7 +1402,7 @@ ega_init(ega_t *ega, int monitor_type, int is_mono) ega->crtc[6] = 255; timer_add(&ega->timer, ega_poll, ega, 1); - if (ega_type == 2) + if (ega_type == EGA_TYPE_COMPAQ) timer_add(&ega->dot_timer, ega_dot_poll, ega, 1); } @@ -1416,11 +1422,11 @@ ega_standalone_init(const device_t *info) ega->y_add = 14; if ((info->local == EGA_IBM) || (info->local == EGA_ISKRA) || (info->local == EGA_TSENG)) - ega_type = 0; + ega_type = EGA_TYPE_IBM; else if (info->local == EGA_COMPAQ) - ega_type = 2; + ega_type = EGA_TYPE_COMPAQ; else - ega_type = 1; + ega_type = EGA_TYPE_OTHER; ega->actual_type = info->local; ega->chipset = 0; From de851d9173b71bd799ed124dad12efda97645f2f Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 7 Aug 2024 00:41:11 -0400 Subject: [PATCH 26/38] Compile fix for cpu/386.c logging --- src/cpu/386.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/cpu/386.c b/src/cpu/386.c index 657bd0894..3524e0d1e 100644 --- a/src/cpu/386.c +++ b/src/cpu/386.c @@ -279,7 +279,7 @@ exec386_2386(int32_t cycs) if (!cpu_state.abrt) { #ifdef ENABLE_386_LOG if (in_smm) - x386_2386_log("[%04X:%08X] %08X\n", CS, cpu_state.pc, fetchdat); + x386_log("[%04X:%08X] %08X\n", CS, cpu_state.pc, fetchdat); #endif opcode = fetchdat & 0xFF; fetchdat >>= 8; From 5b922c4747c8468ba409b0b2b3cbf027cfd4d7d5 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 7 Aug 2024 00:48:11 -0400 Subject: [PATCH 27/38] Cleanups to logging in cdrom_image_backend.c --- src/cdrom/cdrom_image_backend.c | 24 +++++++++--------------- 1 file changed, 9 insertions(+), 15 deletions(-) diff --git a/src/cdrom/cdrom_image_backend.c b/src/cdrom/cdrom_image_backend.c index 25085285c..7dcde1cdb 100644 --- a/src/cdrom/cdrom_image_backend.c +++ b/src/cdrom/cdrom_image_backend.c @@ -170,25 +170,23 @@ cleanup_error: static int bin_read(void *priv, uint8_t *buffer, uint64_t seek, size_t count) { - track_file_t *tf; - - cdrom_image_backend_log("CDROM: binary_read(%08lx, pos=%" PRIu64 " count=%lu)\n", - tf->fp, seek, count); + track_file_t *tf = NULL; if ((tf = (track_file_t *) priv)->fp == NULL) return 0; + cdrom_image_backend_log("CDROM: binary_read(%08lx, pos=%" PRIu64 " count=%lu)\n", + tf->fp, seek, count); + if (fseeko64(tf->fp, seek, SEEK_SET) == -1) { -#ifdef ENABLE_CDROM_IMAGE_BACKEND_LOG cdrom_image_backend_log("CDROM: binary_read failed during seek!\n"); -#endif + return 0; } if (fread(buffer, count, 1, tf->fp) != 1) { -#ifdef ENABLE_CDROM_IMAGE_BACKEND_LOG cdrom_image_backend_log("CDROM: binary_read failed during read!\n"); -#endif + return 0; } @@ -207,9 +205,7 @@ bin_read(void *priv, uint8_t *buffer, uint64_t seek, size_t count) static uint64_t bin_get_length(void *priv) { - track_file_t *tf; - - cdrom_image_backend_log("CDROM: binary_length(%08lx)\n", tf->fp); + track_file_t *tf = NULL; if ((tf = (track_file_t *) priv)->fp == NULL) return 0; @@ -1159,10 +1155,9 @@ cdi_load_cue(cd_img_t *cdi, const char *cuefile) trk.file = audio_init(filename, &error); } if (error) { -#ifdef ENABLE_CDROM_IMAGE_BACKEND_LOG cdrom_image_backend_log("CUE: cannot open file '%s' in cue sheet!\n", filename); -#endif + if (trk.file != NULL) { trk.file->close(trk.file); trk.file = NULL; @@ -1177,9 +1172,8 @@ cdi_load_cue(cd_img_t *cdi, const char *cuefile) /* Ignored commands. */ success = 1; } else { -#ifdef ENABLE_CDROM_IMAGE_BACKEND_LOG cdrom_image_backend_log("CUE: unsupported command '%s' in cue sheet!\n", command); -#endif + success = 0; } From 8be47d6781c349373cc9e36586de1a7b85fa5d93 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 7 Aug 2024 00:55:57 -0400 Subject: [PATCH 28/38] Fix some compile warns and update monster copyright --- src/floppy/fdc_monster.c | 21 +++++++++++---------- src/sound/snd_cs423x.c | 2 +- 2 files changed, 12 insertions(+), 11 deletions(-) diff --git a/src/floppy/fdc_monster.c b/src/floppy/fdc_monster.c index d2dedb5c0..504254ee0 100644 --- a/src/floppy/fdc_monster.c +++ b/src/floppy/fdc_monster.c @@ -11,10 +11,11 @@ * * * Authors: Jasmine Iwanek, + * Miran Grca, * - * Copyright 2022 Jasmine Iwanek. + * Copyright 2022-2024 Jasmine Iwanek. + * Copyright 2024 Miran Grca. */ - #include #include #include @@ -103,10 +104,10 @@ monster_fdc_close(void *priv) monster_fdc_t *dev = (monster_fdc_t *) priv; if (dev->nvr_path[0] != 0x00) { - FILE *f = nvr_fopen(dev->nvr_path, "wb"); - if (f != NULL) { - fwrite(dev->bios_rom.rom, 1, 0x2000, f); - fclose(f); + FILE *fp = nvr_fopen(dev->nvr_path, "wb"); + if (fp != NULL) { + fwrite(dev->bios_rom.rom, 1, 0x2000, fp); + fclose(fp); } } @@ -144,10 +145,10 @@ monster_fdc_init(UNUSED(const device_t *info)) if (rom_writes_enabled) { mem_mapping_set_write_handler(&dev->bios_rom.mapping, rom_write, rom_writew, rom_writel); sprintf(dev->nvr_path, "monster_fdc_%i.nvr", device_get_instance()); - FILE *f = nvr_fopen(dev->nvr_path, "rb"); - if (f != NULL) { - fread(dev->bios_rom.rom, 1, 0x2000, f); - fclose(f); + FILE *fp = nvr_fopen(dev->nvr_path, "rb"); + if (fp != NULL) { + (void) !fread(dev->bios_rom.rom, 1, 0x2000, fp); + fclose(fp); } } diff --git a/src/sound/snd_cs423x.c b/src/sound/snd_cs423x.c index 02ca16fa6..95d183e8f 100644 --- a/src/sound/snd_cs423x.c +++ b/src/sound/snd_cs423x.c @@ -752,7 +752,7 @@ cs423x_init(const device_t *info) FILE *fp = rom_fopen(PNP_ROM_CS4236B, "rb"); if (fp) { - fread(&(dev->eeprom_data[23]), 1, 8201, fp); + (void) !fread(&(dev->eeprom_data[23]), 1, 8201, fp); fclose(fp); } From 7b80e6dc159a7bf530779c641a0444e26525f0ef Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 7 Aug 2024 01:02:33 -0400 Subject: [PATCH 29/38] Compile fix for smbus_sis5595.c logging --- src/device/smbus_sis5595.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/device/smbus_sis5595.c b/src/device/smbus_sis5595.c index b76b38e17..191e7a6a5 100644 --- a/src/device/smbus_sis5595.c +++ b/src/device/smbus_sis5595.c @@ -148,7 +148,7 @@ smbus_sis5595_read_data(void *priv) break; } - smbus_sis5595_log("SMBus SIS5595: read(%02X) = %02x\n", addr, ret); + smbus_sis5595_log("SMBus SIS5595: read(%02X) = %02x\n", dev->addr, ret); return ret; } @@ -171,7 +171,7 @@ smbus_sis5595_write_data(void *priv, uint8_t val) uint16_t prev_stat; uint16_t timer_bytes = 0; - smbus_sis5595_log("SMBus SIS5595: write(%02X, %02X)\n", addr, val); + smbus_sis5595_log("SMBus SIS5595: write(%02X, %02X)\n", dev->addr, val); prev_stat = dev->next_stat; dev->next_stat = 0x0000; From fde5606799844669dcf43aee0c85975b6e1bc950 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Tue, 6 Aug 2024 22:51:05 -0400 Subject: [PATCH 30/38] Fix compilation when building the GDB stub --- src/gdbstub.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/gdbstub.c b/src/gdbstub.c index 8322c5ef6..900f40dab 100644 --- a/src/gdbstub.c +++ b/src/gdbstub.c @@ -40,6 +40,7 @@ #include <86box/86box.h> #include "cpu.h" #include "x86seg.h" +#include "x87_sf.h" #include "x87.h" #include "x87_ops_conv.h" #include <86box/io.h> From 493e82f4882764482ad20803aa3d6108512f0ebe Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 7 Aug 2024 01:29:13 -0400 Subject: [PATCH 31/38] Fix mistake in vid_ega.c --- src/video/vid_ega.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/video/vid_ega.c b/src/video/vid_ega.c index 712df923c..b05491bf0 100644 --- a/src/video/vid_ega.c +++ b/src/video/vid_ega.c @@ -55,9 +55,9 @@ enum { }; enum { - EGA_TYPE_IBM = 0; - EGA_TYPE_OTHER = 1; - EGA_TYPE_COMPAQ = 2; + EGA_TYPE_IBM = 0, + EGA_TYPE_OTHER = 1, + EGA_TYPE_COMPAQ = 2 }; static video_timings_t timing_ega = { .type = VIDEO_ISA, .write_b = 8, .write_w = 16, .write_l = 32, .read_b = 8, .read_w = 16, .read_l = 32 }; From 68437c22bf81a1d8d52b784d7dad284c4047a599 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 7 Aug 2024 01:32:36 -0400 Subject: [PATCH 32/38] Compile fix for hdc_ide_ali5213.c logging --- src/disk/hdc_ide_ali5213.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/disk/hdc_ide_ali5213.c b/src/disk/hdc_ide_ali5213.c index eee3844c4..8ff3d392c 100644 --- a/src/disk/hdc_ide_ali5213.c +++ b/src/disk/hdc_ide_ali5213.c @@ -83,7 +83,7 @@ ali5213_write(uint16_t addr, uint8_t val, void *priv) { ali5213_t *dev = (ali5213_t *) priv; - ali5213_log("[%04X:%08X] [W] %02X = %02X (%i)\n", CS, cpu_state.pc, port, val, dev->tries); + ali5213_log("[%04X:%08X] [W] %02X = %02X\n", CS, cpu_state.pc, addr, val); switch (addr) { case 0xf4: /* Usually it writes 30h here */ @@ -179,7 +179,7 @@ ali5213_read(uint16_t addr, void *priv) break; } - ali5213_log("[%04X:%08X] [R] %02X = %02X\n", CS, cpu_state.pc, port, ret); + ali5213_log("[%04X:%08X] [R] %02X = %02X\n", CS, cpu_state.pc, addr, ret); return ret; } From a6cd293baa1d0a0dd99babc4a07a0e7f65c9511f Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 7 Aug 2024 01:59:25 -0400 Subject: [PATCH 33/38] Compile fix for hdc_ide_um8673f.c logging --- src/disk/hdc_ide_um8673f.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/disk/hdc_ide_um8673f.c b/src/disk/hdc_ide_um8673f.c index 9ee149c7f..bc046dd26 100644 --- a/src/disk/hdc_ide_um8673f.c +++ b/src/disk/hdc_ide_um8673f.c @@ -79,7 +79,7 @@ um8673f_write(uint16_t addr, uint8_t val, void *priv) { um8673f_t *dev = (um8673f_t *) priv; - um8673f_log("[%04X:%08X] [W] %02X = %02X (%i)\n", CS, cpu_state.pc, port, val, dev->tries); + um8673f_log("[%04X:%08X] [W] %02X = %02X (%i)\n", CS, cpu_state.pc, addr, val, dev->tries); switch (addr) { case 0x108: @@ -140,7 +140,7 @@ um8673f_read(uint16_t addr, void *priv) break; } - um8673f_log("[%04X:%08X] [R] %02X = %02X\n", CS, cpu_state.pc, port, ret); + um8673f_log("[%04X:%08X] [R] %02X = %02X\n", CS, cpu_state.pc, addr, ret); return ret; } From 31f87b873a035e38d6f27df4ae361a7c1fe7e2fa Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 7 Aug 2024 02:02:50 -0400 Subject: [PATCH 34/38] Compile fix for hdc_ide_w83769f.c logging --- src/disk/hdc_ide_w83769f.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/disk/hdc_ide_w83769f.c b/src/disk/hdc_ide_w83769f.c index ed34bc9fc..c2b053814 100644 --- a/src/disk/hdc_ide_w83769f.c +++ b/src/disk/hdc_ide_w83769f.c @@ -59,7 +59,7 @@ w83769f_log(const char *fmt, ...) { va_list ap; - if (cmd640_do_log) { + if (w83769f_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); va_end(ap); From e1fffd155ac085c09680442d559b82831c66b5eb Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 7 Aug 2024 02:14:22 -0400 Subject: [PATCH 35/38] Compile fix for net_rtl8139.c logging --- src/network/net_rtl8139.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/network/net_rtl8139.c b/src/network/net_rtl8139.c index 2e85d67bf..bc44b3fb1 100644 --- a/src/network/net_rtl8139.c +++ b/src/network/net_rtl8139.c @@ -22,13 +22,14 @@ * Copyright 2011-2023 Benjamin Poirier. * Copyright 2023 Cacodemon345. */ +#include #include #include #include #include #include #include - +#define HAVE_STDARG_H #include <86box/86box.h> #include <86box/timer.h> #include <86box/pci.h> From 0ce0f477b563c081c8bd7c722d6fd8fde95adb55 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 7 Aug 2024 02:22:46 -0400 Subject: [PATCH 36/38] Compile fix for dummy_cdrom_ioctl.c logging --- src/unix/dummy_cdrom_ioctl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/unix/dummy_cdrom_ioctl.c b/src/unix/dummy_cdrom_ioctl.c index 5c533b216..ed19dfb1f 100644 --- a/src/unix/dummy_cdrom_ioctl.c +++ b/src/unix/dummy_cdrom_ioctl.c @@ -205,7 +205,7 @@ plat_cdrom_read_sector(uint8_t *buffer, int raw, uint32_t sector) /* Cooked */ } plat_cdrom_close(); - dummy_cdrom_ioctl_log("ReadSector status=%d, sector=%d, size=%" PRId64 ".\n", status, sector, (long long) size); + dummy_cdrom_ioctl_log("ReadSector sector=%d.\n", sector); return 0; } From 765e65e72a0ccd3a727ba16fda9587c3dae2e035 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 7 Aug 2024 02:30:56 -0400 Subject: [PATCH 37/38] Compile fix for cpu/x87.c logging --- src/cpu/x87.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/src/cpu/x87.c b/src/cpu/x87.c index 2aafd44e6..390c06dc2 100644 --- a/src/cpu/x87.c +++ b/src/cpu/x87.c @@ -26,22 +26,22 @@ uint32_t x87_op_off; uint16_t x87_pc_seg; uint16_t x87_op_seg; -#ifdef ENABLE_FPU_LOG -int fpu_do_log = ENABLE_FPU_LOG; +#ifdef ENABLE_FPU_X87_LOG +int fpu_x87_do_log = ENABLE_FPU_X87_LOG; void -fpu_log(const char *fmt, ...) +fpu_x87_log(const char *fmt, ...) { va_list ap; - if (fpu_do_log) { + if (fpu_x87_do_log) { va_start(ap, fmt); pclog_ex(fmt, ap); va_end(ap); } } #else -# define fpu_log(fmt, ...) +# define fpu_x87_log(fmt, ...) #endif #ifdef USE_NEW_DYNAREC @@ -546,17 +546,17 @@ unpack_FPU_TW(uint16_t tag_byte) return (twd >> 2); } -#ifdef ENABLE_808X_LOG +#ifdef ENABLE_FPU_X87_LOG void x87_dumpregs(void) { if (cpu_state.ismmx) { - fpu_log("MM0=%016llX\tMM1=%016llX\tMM2=%016llX\tMM3=%016llX\n", cpu_state.MM[0].q, cpu_state.MM[1].q, cpu_state.MM[2].q, cpu_state.MM[3].q); - fpu_log("MM4=%016llX\tMM5=%016llX\tMM6=%016llX\tMM7=%016llX\n", cpu_state.MM[4].q, cpu_state.MM[5].q, cpu_state.MM[6].q, cpu_state.MM[7].q); + fpu_x87_log("MM0=%016llX\tMM1=%016llX\tMM2=%016llX\tMM3=%016llX\n", cpu_state.MM[0].q, cpu_state.MM[1].q, cpu_state.MM[2].q, cpu_state.MM[3].q); + fpu_x87_log("MM4=%016llX\tMM5=%016llX\tMM6=%016llX\tMM7=%016llX\n", cpu_state.MM[4].q, cpu_state.MM[5].q, cpu_state.MM[6].q, cpu_state.MM[7].q); } else { - fpu_log("ST(0)=%f\tST(1)=%f\tST(2)=%f\tST(3)=%f\t\n", cpu_state.ST[cpu_state.TOP], cpu_state.ST[(cpu_state.TOP + 1) & 7], cpu_state.ST[(cpu_state.TOP + 2) & 7], cpu_state.ST[(cpu_state.TOP + 3) & 7]); - fpu_log("ST(4)=%f\tST(5)=%f\tST(6)=%f\tST(7)=%f\t\n", cpu_state.ST[(cpu_state.TOP + 4) & 7], cpu_state.ST[(cpu_state.TOP + 5) & 7], cpu_state.ST[(cpu_state.TOP + 6) & 7], cpu_state.ST[(cpu_state.TOP + 7) & 7]); + fpu_x87_log("ST(0)=%f\tST(1)=%f\tST(2)=%f\tST(3)=%f\t\n", cpu_state.ST[cpu_state.TOP], cpu_state.ST[(cpu_state.TOP + 1) & 7], cpu_state.ST[(cpu_state.TOP + 2) & 7], cpu_state.ST[(cpu_state.TOP + 3) & 7]); + fpu_x87_log("ST(4)=%f\tST(5)=%f\tST(6)=%f\tST(7)=%f\t\n", cpu_state.ST[(cpu_state.TOP + 4) & 7], cpu_state.ST[(cpu_state.TOP + 5) & 7], cpu_state.ST[(cpu_state.TOP + 6) & 7], cpu_state.ST[(cpu_state.TOP + 7) & 7]); } - fpu_log("Status = %04X Control = %04X Tag = %04X\n", cpu_state.npxs, cpu_state.npxc, x87_gettag()); + fpu_x87_log("Status = %04X Control = %04X Tag = %04X\n", cpu_state.npxs, cpu_state.npxc, x87_gettag()); } #endif From a4815fccfe7dab54fe7fea4d05228904fbe0f423 Mon Sep 17 00:00:00 2001 From: Jasmine Iwanek Date: Wed, 7 Aug 2024 02:43:19 -0400 Subject: [PATCH 38/38] Compile fix for cpu/808x.c logging --- src/cpu/808x.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/cpu/808x.c b/src/cpu/808x.c index 6705563c0..990f9ae87 100644 --- a/src/cpu/808x.c +++ b/src/cpu/808x.c @@ -130,10 +130,10 @@ typedef int (*OpFn)(uint32_t fetchdat); static int tempc_fpu = 0; #ifdef ENABLE_808X_LOG +#if 0 void dumpregs(int); - +#endif int x808x_do_log = ENABLE_808X_LOG; -int indump = 0; static void x808x_log(const char *fmt, ...)