diff --git a/src/acpi.c b/src/acpi.c
index 9daf9c32b..f15ca9fe3 100644
--- a/src/acpi.c
+++ b/src/acpi.c
@@ -914,7 +914,7 @@ acpi_reg_write_intel_ich2(int size, uint16_t addr, uint8_t val, void *p)
             break;
         case 0x2a: case 0x2b:
             /* GPE0_EN—General Purpose Event 0 Enables Register */
-           dev->regs.gpen = ((dev->regs.gpen & ~(0xff << shift16)) | (val << shift16)) & 0x097d;
+            dev->regs.gpen = ((dev->regs.gpen & ~(0xff << shift16)) | (val << shift16)) & 0x097d;
             break;
         case 0x2c: case 0x2d:
             /* GPE1_STS—General Purpose Event 1 Status Register */
diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c
index d3daf9f4e..9ceb5e2e9 100644
--- a/src/cpu/cpu.c
+++ b/src/cpu/cpu.c
@@ -2453,22 +2453,22 @@ amd_k_invalid_rdmsr:
 				EAX = msr.ecx187 & 0xffffffff;
 				EDX = msr.ecx187 >> 32;
 				break;
-			case 0x198:
-				EAX = msr.ecx198 & 0xffffffff;
-				EDX = msr.ecx198 >> 32;
-				break;
-			case 0x19a:
-				EAX = msr.ecx19a & 0xffffffff;
-				EDX = msr.ecx19a >> 32;
-				break;
-			case 0x19d:
-				EAX = msr.ecx19d & 0xffffffff;
-				EDX = msr.ecx19d >> 32;
-				break;
-			case 0x1a0:
-				EAX = msr.ecx1a0 & 0xffffffff;
-				EDX = msr.ecx1a0 >> 32;
-				break;
+            case 0x198:
+                EAX = msr.ecx198 & 0xffffffff;
+                EDX = msr.ecx198 >> 32;
+                break;
+            case 0x19a:
+                EAX = msr.ecx19a & 0xffffffff;
+                EDX = msr.ecx19a >> 32;
+                break;
+            case 0x19d:
+                EAX = msr.ecx19d & 0xffffffff;
+                EDX = msr.ecx19d >> 32;
+                break;
+            case 0x1a0:
+                EAX = msr.ecx1a0 & 0xffffffff;
+                EDX = msr.ecx1a0 >> 32;
+                break;
 			case 0x1e0:
 				EAX = msr.ecx1e0 & 0xffffffff;
 				EDX = msr.ecx1e0 >> 32;
@@ -2844,18 +2844,18 @@ amd_k_invalid_wrmsr:
 			case 0x187:
 				msr.ecx187 = EAX | ((uint64_t)EDX << 32);
 				break;
-			case 0x198:
-				msr.ecx198 = EAX | ((uint64_t)EDX << 32);
-				break;
-			case 0x19a:
-				msr.ecx19a = EAX | ((uint64_t)EDX << 32);
-				break;
-			case 0x19d:
-				msr.ecx19d = EAX | ((uint64_t)EDX << 32);
-				break;
-			case 0x1a0:
-				msr.ecx1a0 = EAX | ((uint64_t)EDX << 32);
-				break;
+            case 0x198:
+                msr.ecx198 = EAX | ((uint64_t)EDX << 32);
+                break;
+            case 0x19a:
+                msr.ecx19a = EAX | ((uint64_t)EDX << 32);
+                break;
+            case 0x19d:
+                msr.ecx19d = EAX | ((uint64_t)EDX << 32);
+                break;
+            case 0x1a0:
+                msr.ecx1a0 = EAX | ((uint64_t)EDX << 32);
+                break;
 			case 0x1e0:
 				msr.ecx1e0 = EAX | ((uint64_t)EDX << 32);
 				break;
diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h
index ba0bfd390..600a235f9 100644
--- a/src/cpu/cpu.h
+++ b/src/cpu/cpu.h
@@ -285,7 +285,7 @@ typedef struct {
     uint64_t	mtrr_deftype;		/* 0x000002ff */
 
     /* Pentium II/III/IV MSR's needed for late BIOS */
-    uint64_t	ecx1a0;			/* 0x000001a0 */
+    uint64_t    ecx1a0;         /* 0x000001a0 */
     uint64_t    ecx198;         /* 0x00000198 */
     uint64_t    ecx19a;         /* 0x0000019a */
     uint64_t    ecx19d;         /* 0x0000019d */
diff --git a/src/include/86box/spd.h b/src/include/86box/spd.h
index ad5e52bbb..a7e12b96f 100644
--- a/src/include/86box/spd.h
+++ b/src/include/86box/spd.h
@@ -25,11 +25,11 @@
 #define SPD_TYPE_FPM		0x01
 #define SPD_TYPE_EDO		0x02
 #define SPD_TYPE_SDRAM		0x04
-#define SPD_TYPE_DDR		0x07
+#define SPD_TYPE_DDR        0x07
 
 #define SPD_MIN_SIZE_EDO	8
 #define SPD_MIN_SIZE_SDRAM	8
-#define SPD_MIN_SIZE_DDR	8
+#define SPD_MIN_SIZE_DDR    8
 
 #define SPD_SIGNAL_LVTTL	0x01
 
diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c
index bd96f5f0e..2e623aee4 100644
--- a/src/machine/machine_table.c
+++ b/src/machine/machine_table.c
@@ -11712,7 +11712,6 @@ const machine_t machines[] = {
         .net_device = NULL
     },
 
-
     /* Intel 815EP Motherboards */
     {
         .name = "[Intel i815EP] ASUS CUSL2-C",
diff --git a/src/mem/sst_flash.c b/src/mem/sst_flash.c
index 7c3b59ae2..460ae9e0c 100644
--- a/src/mem/sst_flash.c
+++ b/src/mem/sst_flash.c
@@ -74,8 +74,8 @@ static char	flash_path[1024];
 
 #define SST			0xbf	/* SST Manufacturer's ID */
 
-#define SST29EE512		0x5d00
-#define SST29LE_VE512		0x3d00
+#define SST29EE512      0x5d00
+#define SST29LE_VE512   0x3d00
 #define SST29EE010		0x0700
 #define SST29LE_VE010		0x0800
 #define SST29EE020		0x1000
@@ -86,27 +86,27 @@ static char	flash_path[1024];
 #define SST39SF020		0xb600
 #define SST39SF040		0xb700
 
-#define SST39LF512		0xd400
-#define SST39LF010		0xd500
-#define SST39LF020		0xd600
-#define SST39LF040		0xd700
-#define SST39LF080		0xd800
-#define SST39LF016		0xd900
+#define SST39LF512      0xd400
+#define SST39LF010      0xd500
+#define SST39LF020      0xd600
+#define SST39LF040      0xd700
+#define SST39LF080      0xd800
+#define SST39LF016      0xd900
 
 /*
 // 16 wide
-#define SST39WF400		0x272f
-#define SST39WF400B		0x272e
-#define SST39WF800		0x273f
-#define SST39WF800B		0x273e
-#define SST39WF1601		0xbf274b
-#define SST39WF1602		0xbf274a
+#define SST39WF400      0x272f
+#define SST39WF400B     0x272e
+#define SST39WF800      0x273f
+#define SST39WF800B     0x273e
+#define SST39WF1601     0xbf274b
+#define SST39WF1602     0xbf274a
 
-#define SST39LF100		0x2788
-#define SST39LF200		0x2789
-#define SST39LF400		0x2780
-#define SST39LF800		0x2781
-#define SST39LF160		0x2782
+#define SST39LF100      0x2788
+#define SST39LF200      0x2789
+#define SST39LF400      0x2780
+#define SST39LF800      0x2781
+#define SST39LF160      0x2782
 */
 
 #define SST49LF002      0x5700
@@ -124,18 +124,18 @@ static char	flash_path[1024];
 #define SST49LF016      0x5c00
 
 #define WINBOND			0xda	/* Winbond Manufacturer's ID */
-#define W29C512			0xc800
-#define W29C010			0xc100
+#define W29C512         0xc800
+#define W29C010         0xc100
 #define W29C020			0x4500
-#define W29C040			0x4600
+#define W29C040         0x4600
 
 #define SIZE_512K		0x010000
 #define SIZE_1M			0x020000
 #define SIZE_2M			0x040000
-#define SIZE_3M			0x030000
+#define SIZE_3M         0x060000
 #define SIZE_4M			0x080000
-#define SIZE_8M			0x100000
-#define SIZE_16M		0x200000
+#define SIZE_8M         0x100000
+#define SIZE_16M        0x200000
 
 
 static void