mirror of
https://github.com/86Box/86Box.git
synced 2026-02-24 10:28:19 -07:00
Rewrote the recompiler interrupt checking in assembly (and removed it for the new dynamic compiler because the requires uops are not present), brings performance back up, and also did a number of CPU-related clean-ups (mostly removal of dead variables and associated code).
This commit is contained in:
@@ -334,8 +334,6 @@ exec386(int cycs)
|
||||
}
|
||||
}
|
||||
|
||||
ins++;
|
||||
|
||||
if (timetolive) {
|
||||
timetolive--;
|
||||
if (!timetolive)
|
||||
|
||||
@@ -47,8 +47,6 @@ int nmi_enable = 1;
|
||||
|
||||
int cpl_override=0;
|
||||
|
||||
int fpucount=0;
|
||||
|
||||
#ifdef USE_NEW_DYNAREC
|
||||
uint16_t cpu_cur_status = 0;
|
||||
#else
|
||||
|
||||
@@ -36,8 +36,6 @@
|
||||
|
||||
|
||||
int inrecomp = 0, cpu_block_end = 0;
|
||||
int cpu_recomp_blocks, cpu_recomp_full_ins, cpu_new_blocks;
|
||||
int cpu_recomp_blocks_latched, cpu_recomp_ins_latched, cpu_recomp_full_ins_latched, cpu_new_blocks_latched;
|
||||
|
||||
|
||||
#ifdef ENABLE_386_DYNAREC_LOG
|
||||
@@ -127,7 +125,6 @@ static __inline void fetch_ea_32_long(uint32_t rmdat)
|
||||
if (writelookup2[addr >> 12] != -1)
|
||||
eal_w = (uint32_t *)(writelookup2[addr >> 12] + addr);
|
||||
}
|
||||
cpu_state.last_ea = cpu_state.eaaddr;
|
||||
}
|
||||
|
||||
static __inline void fetch_ea_16_long(uint32_t rmdat)
|
||||
@@ -168,7 +165,6 @@ static __inline void fetch_ea_16_long(uint32_t rmdat)
|
||||
if (writelookup2[addr >> 12] != -1)
|
||||
eal_w = (uint32_t *)(writelookup2[addr >> 12] + addr);
|
||||
}
|
||||
cpu_state.last_ea = cpu_state.eaaddr;
|
||||
}
|
||||
|
||||
#define fetch_ea_16(rmdat) cpu_state.pc++; cpu_mod=(rmdat >> 6) & 3; cpu_reg=(rmdat >> 3) & 7; cpu_rm = rmdat & 7; if (cpu_mod != 3) { fetch_ea_16_long(rmdat); if (cpu_state.abrt) return 1; }
|
||||
@@ -278,7 +274,9 @@ static uint64_t tsc_old = 0;
|
||||
|
||||
int acycs = 0;
|
||||
|
||||
void update_tsc(void)
|
||||
|
||||
void
|
||||
update_tsc(void)
|
||||
{
|
||||
int cycdiff;
|
||||
uint64_t delta;
|
||||
@@ -299,27 +297,10 @@ void update_tsc(void)
|
||||
|
||||
if (cycdiff > 0) {
|
||||
if (TIMER_VAL_LESS_THAN_VAL(timer_target, (uint32_t)tsc))
|
||||
timer_process();
|
||||
timer_process_inline();
|
||||
}
|
||||
}
|
||||
|
||||
int int_check(void)
|
||||
{
|
||||
if (cpu_state.abrt)
|
||||
return 1;
|
||||
|
||||
if (trap)
|
||||
return 1;
|
||||
else if (smi_line)
|
||||
return 1;
|
||||
else if (nmi && nmi_enable && nmi_mask)
|
||||
return 1;
|
||||
else if ((cpu_state.flags & I_FLAG) && pic_intpending)
|
||||
return 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void exec386_dynarec(int cycs)
|
||||
{
|
||||
int vector;
|
||||
@@ -406,8 +387,6 @@ void exec386_dynarec(int cycs)
|
||||
CPU_BLOCK_END();
|
||||
else if ((cpu_state.flags & I_FLAG) && pic_intpending)
|
||||
CPU_BLOCK_END();
|
||||
|
||||
ins++;
|
||||
}
|
||||
}
|
||||
else
|
||||
@@ -561,7 +540,6 @@ void exec386_dynarec(int cycs)
|
||||
#ifndef USE_NEW_DYNAREC
|
||||
if (!use32) cpu_state.pc &= 0xffff;
|
||||
#endif
|
||||
cpu_recomp_blocks++;
|
||||
}
|
||||
else if (valid_block && !cpu_state.abrt)
|
||||
{
|
||||
@@ -574,8 +552,6 @@ void exec386_dynarec(int cycs)
|
||||
|
||||
cpu_block_end = 0;
|
||||
x86_was_reset = 0;
|
||||
|
||||
cpu_new_blocks++;
|
||||
|
||||
codegen_block_start_recompile(block);
|
||||
codegen_in_recompile = 1;
|
||||
@@ -644,7 +620,6 @@ void exec386_dynarec(int cycs)
|
||||
CPU_BLOCK_END();
|
||||
else if ((cpu_state.flags & I_FLAG) && pic_intpending)
|
||||
CPU_BLOCK_END();
|
||||
ins++;
|
||||
}
|
||||
|
||||
if (!cpu_state.abrt && !x86_was_reset)
|
||||
@@ -734,8 +709,6 @@ void exec386_dynarec(int cycs)
|
||||
CPU_BLOCK_END();
|
||||
else if ((cpu_state.flags & I_FLAG) && pic_intpending)
|
||||
CPU_BLOCK_END();
|
||||
|
||||
ins++;
|
||||
}
|
||||
|
||||
if (!cpu_state.abrt && !x86_was_reset)
|
||||
@@ -862,7 +835,7 @@ void exec386_dynarec(int cycs)
|
||||
|
||||
if (cycdiff > 0) {
|
||||
if (TIMER_VAL_LESS_THAN_VAL(timer_target, (uint32_t)tsc))
|
||||
timer_process();
|
||||
timer_process_inline();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -38,7 +38,6 @@ static __inline void fetch_ea_32_long(uint32_t rmdat)
|
||||
if (writelookup2[addr >> 12] != -1)
|
||||
eal_w = (uint32_t *)(writelookup2[addr >> 12] + addr);
|
||||
}
|
||||
cpu_state.last_ea = cpu_state.eaaddr;
|
||||
}
|
||||
|
||||
static __inline void fetch_ea_16_long(uint32_t rmdat)
|
||||
@@ -53,7 +52,6 @@ static __inline void fetch_ea_16_long(uint32_t rmdat)
|
||||
if (writelookup2[addr >> 12] != -1)
|
||||
eal_w = (uint32_t *)(writelookup2[addr >> 12] + addr);
|
||||
}
|
||||
cpu_state.last_ea = cpu_state.eaaddr;
|
||||
}
|
||||
|
||||
#define fetch_ea_16(rmdat) cpu_state.pc++; if (cpu_mod != 3) fetch_ea_16_long(rmdat);
|
||||
|
||||
@@ -58,13 +58,11 @@ static __inline void PUSH_W(uint16_t val)
|
||||
{
|
||||
writememw(ss, ESP - 2, val); if (cpu_state.abrt) return;
|
||||
ESP -= 2;
|
||||
cpu_state.last_ea = ESP;
|
||||
}
|
||||
else
|
||||
{
|
||||
writememw(ss, (SP - 2) & 0xFFFF, val); if (cpu_state.abrt) return;
|
||||
SP -= 2;
|
||||
cpu_state.last_ea = SP;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -74,13 +72,11 @@ static __inline void PUSH_L(uint32_t val)
|
||||
{
|
||||
writememl(ss, ESP - 4, val); if (cpu_state.abrt) return;
|
||||
ESP -= 4;
|
||||
cpu_state.last_ea = ESP;
|
||||
}
|
||||
else
|
||||
{
|
||||
writememl(ss, (SP - 4) & 0xFFFF, val); if (cpu_state.abrt) return;
|
||||
SP -= 4;
|
||||
cpu_state.last_ea = SP;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -91,13 +87,11 @@ static __inline uint16_t POP_W()
|
||||
{
|
||||
ret = readmemw(ss, ESP); if (cpu_state.abrt) return 0;
|
||||
ESP += 2;
|
||||
cpu_state.last_ea = ESP;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = readmemw(ss, SP); if (cpu_state.abrt) return 0;
|
||||
SP += 2;
|
||||
cpu_state.last_ea = SP;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
@@ -109,13 +103,11 @@ static __inline uint32_t POP_L()
|
||||
{
|
||||
ret = readmeml(ss, ESP); if (cpu_state.abrt) return 0;
|
||||
ESP += 4;
|
||||
cpu_state.last_ea = ESP;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = readmeml(ss, SP); if (cpu_state.abrt) return 0;
|
||||
SP += 4;
|
||||
cpu_state.last_ea = SP;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
@@ -127,13 +119,11 @@ static __inline uint16_t POP_W_seg(uint32_t seg)
|
||||
{
|
||||
ret = readmemw(seg, ESP); if (cpu_state.abrt) return 0;
|
||||
ESP += 2;
|
||||
cpu_state.last_ea = ESP;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = readmemw(seg, SP); if (cpu_state.abrt) return 0;
|
||||
SP += 2;
|
||||
cpu_state.last_ea = SP;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
@@ -145,13 +135,11 @@ static __inline uint32_t POP_L_seg(uint32_t seg)
|
||||
{
|
||||
ret = readmeml(seg, ESP); if (cpu_state.abrt) return 0;
|
||||
ESP += 4;
|
||||
cpu_state.last_ea = ESP;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = readmeml(seg, SP); if (cpu_state.abrt) return 0;
|
||||
SP += 4;
|
||||
cpu_state.last_ea = SP;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -110,7 +110,7 @@ typedef struct {
|
||||
typedef struct {
|
||||
const char *name;
|
||||
int cpu_type;
|
||||
const FPU *fpus;
|
||||
const FPU *fpus;
|
||||
int rspeed;
|
||||
double multi;
|
||||
uint32_t edx_reset;
|
||||
@@ -210,14 +210,11 @@ typedef union {
|
||||
} x86reg;
|
||||
|
||||
typedef struct {
|
||||
uint32_t base;
|
||||
uint32_t limit;
|
||||
uint8_t access;
|
||||
uint8_t ar_high;
|
||||
uint8_t access, ar_high;
|
||||
int8_t checked; /*Non-zero if selector is known to be valid*/
|
||||
uint16_t seg;
|
||||
uint32_t limit_low,
|
||||
limit_high;
|
||||
int checked; /*Non-zero if selector is known to be valid*/
|
||||
uint32_t base, limit,
|
||||
limit_low, limit_high;
|
||||
} x86seg;
|
||||
|
||||
typedef union {
|
||||
@@ -250,19 +247,24 @@ typedef struct {
|
||||
|
||||
uint8_t tag[8];
|
||||
|
||||
int8_t ssegs, ismmx,
|
||||
abrt, pad;
|
||||
|
||||
uint16_t npxs, npxc, flags, eflags,
|
||||
old_npxc, new_npxc;
|
||||
|
||||
uint16_t MM_w4[8];
|
||||
|
||||
int _cycles,
|
||||
flags_op, TOP;
|
||||
|
||||
uint32_t flags_res,
|
||||
flags_op1, flags_op2,
|
||||
pc, oldpc, eaaddr, op32;
|
||||
|
||||
cr0_t CR0;
|
||||
|
||||
x86seg *ea_seg;
|
||||
uint32_t eaaddr;
|
||||
|
||||
int flags_op;
|
||||
uint32_t flags_res;
|
||||
uint32_t flags_op1,
|
||||
flags_op2;
|
||||
|
||||
uint32_t pc;
|
||||
uint32_t oldpc;
|
||||
uint32_t op32;
|
||||
|
||||
int TOP;
|
||||
|
||||
union {
|
||||
struct {
|
||||
@@ -273,26 +275,10 @@ typedef struct {
|
||||
int32_t rm_mod_reg_data;
|
||||
} rm_data;
|
||||
|
||||
int8_t ssegs;
|
||||
int8_t ismmx;
|
||||
int8_t abrt;
|
||||
|
||||
int _cycles;
|
||||
int cpu_recomp_ins;
|
||||
|
||||
uint16_t npxs,
|
||||
npxc;
|
||||
|
||||
double ST[8];
|
||||
|
||||
uint16_t MM_w4[8];
|
||||
|
||||
MMX_REG MM[8];
|
||||
|
||||
uint16_t old_npxc,
|
||||
new_npxc;
|
||||
uint32_t last_ea;
|
||||
|
||||
#ifdef USE_NEW_DYNAREC
|
||||
uint32_t old_fp_control, new_fp_control;
|
||||
#if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86
|
||||
@@ -303,16 +289,8 @@ typedef struct {
|
||||
#endif
|
||||
#endif
|
||||
|
||||
x86seg seg_cs,
|
||||
seg_ds,
|
||||
seg_es,
|
||||
seg_ss,
|
||||
seg_fs,
|
||||
seg_gs;
|
||||
|
||||
uint16_t flags, eflags;
|
||||
|
||||
cr0_t CR0;
|
||||
x86seg seg_cs, seg_ds, seg_es, seg_ss,
|
||||
seg_fs, seg_gs;
|
||||
} cpu_state_t;
|
||||
|
||||
/*The cpu_state.flags below must match in both cpu_cur_status and block->status for a block
|
||||
@@ -345,7 +323,7 @@ typedef struct {
|
||||
# endif
|
||||
#endif
|
||||
|
||||
COMPILE_TIME_ASSERT(sizeof(cpu_state) <= 128)
|
||||
COMPILE_TIME_ASSERT(sizeof(cpu_state_t) <= 128)
|
||||
|
||||
#define cpu_state_offset(MEMBER) ((uint8_t)((uintptr_t)&cpu_state.MEMBER - (uintptr_t)&cpu_state - 128))
|
||||
|
||||
@@ -425,19 +403,14 @@ extern uint32_t cpu_cur_status;
|
||||
extern uint64_t cpu_CR4_mask;
|
||||
extern uint64_t tsc;
|
||||
extern msr_t msr;
|
||||
extern cpu_state_t cpu_state;
|
||||
extern cpu_state_t cpu_state;
|
||||
extern uint8_t opcode;
|
||||
extern int insc;
|
||||
extern int fpucount;
|
||||
extern float mips,flops;
|
||||
extern int clockrate;
|
||||
extern int cgate16;
|
||||
extern int cpl_override;
|
||||
extern int CPUID;
|
||||
extern uint64_t xt_cpu_multi;
|
||||
extern uint64_t xt_cpu_multi;
|
||||
extern int isa_cycles;
|
||||
extern uint32_t oldds,oldss,olddslimit,oldsslimit,olddslimitw,oldsslimitw;
|
||||
extern int ins,output;
|
||||
extern uint32_t pccache;
|
||||
extern uint8_t *pccache2;
|
||||
|
||||
@@ -503,7 +476,7 @@ extern int timing_misaligned;
|
||||
extern int in_sys, unmask_a20_in_smm;
|
||||
extern uint32_t old_rammask;
|
||||
|
||||
extern int acycs;
|
||||
extern int acycs, pic_pending;
|
||||
|
||||
extern uint16_t cpu_fast_off_count, cpu_fast_off_val;
|
||||
extern uint32_t cpu_fast_off_flags;
|
||||
@@ -601,6 +574,4 @@ extern const char *fpu_get_internal_name(int machine, int cpu_manufacturer, int
|
||||
extern const char *fpu_get_name_from_index(int machine, int cpu_manufacturer, int cpu, int c);
|
||||
extern int fpu_get_type_from_index(int machine, int cpu_manufacturer, int cpu, int c);
|
||||
|
||||
extern int int_check();
|
||||
|
||||
#endif /*EMU_CPU_H*/
|
||||
|
||||
@@ -11,7 +11,7 @@ extern int x86_was_reset, trap;
|
||||
extern int codegen_flat_ss, codegen_flat_ds;
|
||||
extern int timetolive, keyboardtimer, trap;
|
||||
extern int optype, stack32;
|
||||
extern int oldcpl, cgate32, cpl_override, fpucount;
|
||||
extern int oldcpl, cgate32, cpl_override;
|
||||
extern int nmi_enable;
|
||||
extern int oddeven, inttype;
|
||||
|
||||
|
||||
@@ -201,12 +201,10 @@ static int opREP_MOVSB_ ## size(uint32_t fetchdat)
|
||||
else { DEST_REG++; SRC_REG++; } \
|
||||
CNT_REG--; \
|
||||
cycles -= is486 ? 3 : 4; \
|
||||
ins++; \
|
||||
reads++; writes++; total_cycles += is486 ? 3 : 4; \
|
||||
if (cycles < cycles_end) \
|
||||
break; \
|
||||
} \
|
||||
ins--; \
|
||||
PREFETCH_RUN(total_cycles, 1, -1, reads, 0, writes, 0, 0); \
|
||||
if (CNT_REG > 0) \
|
||||
{ \
|
||||
@@ -240,12 +238,10 @@ static int opREP_MOVSW_ ## size(uint32_t fetchdat)
|
||||
else { DEST_REG += 2; SRC_REG += 2; } \
|
||||
CNT_REG--; \
|
||||
cycles -= is486 ? 3 : 4; \
|
||||
ins++; \
|
||||
reads++; writes++; total_cycles += is486 ? 3 : 4; \
|
||||
if (cycles < cycles_end) \
|
||||
break; \
|
||||
} \
|
||||
ins--; \
|
||||
PREFETCH_RUN(total_cycles, 1, -1, reads, 0, writes, 0, 0); \
|
||||
if (CNT_REG > 0) \
|
||||
{ \
|
||||
@@ -279,12 +275,10 @@ static int opREP_MOVSL_ ## size(uint32_t fetchdat)
|
||||
else { DEST_REG += 4; SRC_REG += 4; } \
|
||||
CNT_REG--; \
|
||||
cycles -= is486 ? 3 : 4; \
|
||||
ins++; \
|
||||
reads++; writes++; total_cycles += is486 ? 3 : 4; \
|
||||
if (cycles < cycles_end) \
|
||||
break; \
|
||||
} \
|
||||
ins--; \
|
||||
PREFETCH_RUN(total_cycles, 1, -1, reads, 0, writes, 0, 0); \
|
||||
if (CNT_REG > 0) \
|
||||
{ \
|
||||
@@ -313,7 +307,6 @@ static int opREP_STOSB_ ## size(uint32_t fetchdat)
|
||||
CNT_REG--; \
|
||||
cycles -= is486 ? 4 : 5; \
|
||||
writes++; total_cycles += is486 ? 4 : 5; \
|
||||
ins++; \
|
||||
if (cycles < cycles_end) \
|
||||
break; \
|
||||
} \
|
||||
@@ -343,7 +336,6 @@ static int opREP_STOSW_ ## size(uint32_t fetchdat)
|
||||
CNT_REG--; \
|
||||
cycles -= is486 ? 4 : 5; \
|
||||
writes++; total_cycles += is486 ? 4 : 5; \
|
||||
ins++; \
|
||||
if (cycles < cycles_end) \
|
||||
break; \
|
||||
} \
|
||||
@@ -373,7 +365,6 @@ static int opREP_STOSL_ ## size(uint32_t fetchdat)
|
||||
CNT_REG--; \
|
||||
cycles -= is486 ? 4 : 5; \
|
||||
writes++; total_cycles += is486 ? 4 : 5; \
|
||||
ins++; \
|
||||
if (cycles < cycles_end) \
|
||||
break; \
|
||||
} \
|
||||
@@ -404,7 +395,6 @@ static int opREP_LODSB_ ## size(uint32_t fetchdat)
|
||||
CNT_REG--; \
|
||||
cycles -= is486 ? 4 : 5; \
|
||||
reads++; total_cycles += is486 ? 4 : 5; \
|
||||
ins++; \
|
||||
if (cycles < cycles_end) \
|
||||
break; \
|
||||
} \
|
||||
@@ -434,7 +424,6 @@ static int opREP_LODSW_ ## size(uint32_t fetchdat)
|
||||
CNT_REG--; \
|
||||
cycles -= is486 ? 4 : 5; \
|
||||
reads++; total_cycles += is486 ? 4 : 5; \
|
||||
ins++; \
|
||||
if (cycles < cycles_end) \
|
||||
break; \
|
||||
} \
|
||||
@@ -464,7 +453,6 @@ static int opREP_LODSL_ ## size(uint32_t fetchdat)
|
||||
CNT_REG--; \
|
||||
cycles -= is486 ? 4 : 5; \
|
||||
reads++; total_cycles += is486 ? 4 : 5; \
|
||||
ins++; \
|
||||
if (cycles < cycles_end) \
|
||||
break; \
|
||||
} \
|
||||
@@ -597,11 +585,9 @@ static int opREP_SCASB_ ## size(uint32_t fetchdat)
|
||||
CNT_REG--; \
|
||||
cycles -= is486 ? 5 : 8; \
|
||||
reads++; total_cycles += is486 ? 5 : 8; \
|
||||
ins++; \
|
||||
if (cycles < cycles_end) \
|
||||
break; \
|
||||
} \
|
||||
ins--; \
|
||||
PREFETCH_RUN(total_cycles, 1, -1, reads, 0, 0, 0, 0); \
|
||||
if ((CNT_REG > 0) && (FV == tempz)) \
|
||||
{ \
|
||||
@@ -631,11 +617,9 @@ static int opREP_SCASW_ ## size(uint32_t fetchdat)
|
||||
CNT_REG--; \
|
||||
cycles -= is486 ? 5 : 8; \
|
||||
reads++; total_cycles += is486 ? 5 : 8; \
|
||||
ins++; \
|
||||
if (cycles < cycles_end) \
|
||||
break; \
|
||||
} \
|
||||
ins--; \
|
||||
PREFETCH_RUN(total_cycles, 1, -1, reads, 0, 0, 0, 0); \
|
||||
if ((CNT_REG > 0) && (FV == tempz)) \
|
||||
{ \
|
||||
@@ -665,11 +649,9 @@ static int opREP_SCASL_ ## size(uint32_t fetchdat)
|
||||
CNT_REG--; \
|
||||
cycles -= is486 ? 5 : 8; \
|
||||
reads++; total_cycles += is486 ? 5 : 8; \
|
||||
ins++; \
|
||||
if (cycles < cycles_end) \
|
||||
break; \
|
||||
} \
|
||||
ins--; \
|
||||
PREFETCH_RUN(total_cycles, 1, -1, 0, reads, 0, 0, 0); \
|
||||
if ((CNT_REG > 0) && (FV == tempz)) \
|
||||
{ \
|
||||
|
||||
@@ -431,7 +431,6 @@ typedef union
|
||||
|
||||
#ifdef FPU_8087
|
||||
#define FP_ENTER() { \
|
||||
fpucount++; \
|
||||
}
|
||||
#else
|
||||
#define FP_ENTER() do \
|
||||
@@ -441,7 +440,6 @@ typedef union
|
||||
x86_int(7); \
|
||||
return 1; \
|
||||
} \
|
||||
fpucount++; \
|
||||
} while (0)
|
||||
#endif
|
||||
|
||||
|
||||
Reference in New Issue
Block a user