More updates for the NEC PC-98x1 series.

Still preliminary, but I hope it's a good start to work with.
This commit is contained in:
TC1995
2024-02-12 20:58:06 +01:00
parent dad0b8c899
commit b36c0cb697
10 changed files with 2097 additions and 157 deletions

View File

@@ -336,6 +336,15 @@ typedef struct _machine_ {
#endif
} machine_t;
/*ToDo: preliminary, to improve.*/
typedef struct _machine_pc98_ {
char *font_rom;
char *hdd_rom;
char *pci_rom;
char *sound_rom;
int init;
} machine_pc98_t;
/* Global variables. */
extern const machine_filter_t machine_types[];
extern const machine_filter_t machine_chipsets[];
@@ -343,6 +352,7 @@ extern const machine_t machines[];
extern int bios_only;
extern int machine;
extern void * machine_snd;
extern machine_pc98_t machine_pc98;
/* Core functions. */
extern int machine_count(void);

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@@ -0,0 +1,149 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Emulation of the EGC graphics processor used by
* the NEC PC-98x1 series of computers.
*
*
*
* Authors: TAKEDA toshiya,
* yui/Neko Project II
*
* Copyright 2009-2023 TAKEDA, toshiya.
* Copyright 2008-2023 yui/Neko Project II.
*/
#ifndef VIDEO_PC98X1_DISP_H
# define VIDEO_PC98X1_DISP_H
#define TVRAM_SIZE 0x4000
#define VRAM16_SIZE 0x40000
#define VRAM256_SIZE 0x80000
#define EMS_SIZE 0x10000
enum {
MODE1_ATRSEL = 0x00,
MODE1_GRAPHIC = 0x01,
MODE1_COLUMN = 0x02,
MODE1_FONTSEL = 0x03,
MODE1_200LINE = 0x04,
MODE1_KAC = 0x05,
MODE1_MEMSW = 0x06,
MODE1_DISP = 0x07,
};
enum {
MODE2_16COLOR = 0x00,
MODE2_EGC = 0x02,
MODE2_WRITE_MASK = 0x03,
MODE2_256COLOR = 0x10,
MODE2_480LINE = 0x34,
};
enum {
MODE3_WRITE_MASK = 0x01,
MODE3_LINE_COLOR = 0x09,
MODE3_NPC_COLOR = 0x0b,
MODE3_LINE_CONNECT = 0x0f,
};
enum {
GRCG_PLANE_0 = 0x01,
GRCG_PLANE_1 = 0x02,
GRCG_PLANE_2 = 0x04,
GRCG_PLANE_3 = 0x08,
GRCG_PLANE_SEL = 0x30,
GRCG_RW_MODE = 0x40,
GRCG_CG_MODE = 0x80,
};
typedef struct pc98x1_vid_t {
/* vga */
uint8_t tvram_buffer[480 * 640];
uint8_t vram0_buffer[480 * 640];
uint8_t vram1_buffer[480 * 640];
uint8_t null_buffer[480 * 640];
int width;
int height;
int last_width;
int last_height;
uint8_t dirty;
uint8_t blink;
uint32_t palette_chr[8];
uint32_t palette_gfx[256];
uint8_t font[0x84000];
uint8_t tvram[TVRAM_SIZE];
uint8_t vram16[VRAM16_SIZE];
uint8_t vram256[VRAM256_SIZE];
uint8_t ems[EMS_SIZE];
uint8_t *vram16_disp_b;
uint8_t *vram16_disp_r;
uint8_t *vram16_disp_g;
uint8_t *vram16_disp_e;
uint8_t *vram16_draw_b;
uint8_t *vram16_draw_r;
uint8_t *vram16_draw_g;
uint8_t *vram16_draw_e;
uint8_t *vram256_disp;
uint8_t *vram256_draw_0;
uint8_t *vram256_draw_1;
GDCState gdc_chr;
GDCState gdc_gfx;
EGCState egc;
uint8_t grcg_mode;
uint8_t grcg_tile_cnt;
uint8_t grcg_tile_b[4];
uint16_t grcg_tile_w[4];
uint8_t crtv;
uint8_t pl;
uint8_t bl;
uint8_t cl;
uint8_t ssl;
uint8_t sur;
uint8_t sdr;
uint8_t mode1[8];
uint8_t mode2[128];
uint8_t mode3[128];
uint8_t mode_select;
uint8_t digipal[4];
uint8_t anapal[3][256];
uint8_t anapal_select;
uint8_t bank_draw;
uint8_t bank_disp;
uint8_t bank256_draw_0;
uint8_t bank256_draw_1;
uint16_t vram256_bank_0;
uint16_t vram256_bank_1;
uint8_t ems_selected;
uint16_t font_code;
uint8_t font_line;
uint32_t cgwindow_addr_low;
uint32_t cgwindow_addr_high;
int htotal;
int hblank;
uint64_t dispontime;
uint64_t dispofftime;
pc_timer_t timer;
double clock;
} pc98x1_vid_t;
# ifdef EMU_DEVICE_H
extern const device_t pc98x1_vid_device;
# endif // EMU_DEVICE_H
#endif /*VIDEO_PC98X1_EGC_H*/

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@@ -0,0 +1,83 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Emulation of the EGC graphics processor used by
* the NEC PC-98x1 series of computers.
*
*
*
* Authors: TAKEDA toshiya,
* yui/Neko Project II
*
* Copyright 2009-2024 TAKEDA, toshiya.
* Copyright 2008-2024 yui/Neko Project II.
*/
#ifndef VIDEO_PC98X1_EGC_H
# define VIDEO_PC98X1_EGC_H
typedef union {
uint8_t b[2];
uint16_t w;
} egcword_t;
typedef union {
uint8_t b[4][2];
uint16_t w[4];
uint32_t d[2];
uint64_t q;
} egcquad_t;
typedef struct egc_t {
void *priv;
uint16_t access;
uint16_t fgbg;
uint16_t ope;
uint16_t fg;
egcword_t mask;
uint16_t bg;
uint16_t sft;
uint16_t leng;
egcquad_t lastvram;
egcquad_t patreg;
egcquad_t fgc;
egcquad_t bgc;
int func;
uint32_t remain;
uint32_t stack;
uint8_t *inptr;
int inptr_vmstate;
uint8_t *outptr;
int outptr_vmstate;
egcword_t mask2;
egcword_t srcmask;
uint8_t srcbit;
uint8_t dstbit;
uint8_t sft8bitl;
uint8_t sft8bitr;
uint8_t buf[528]; /* 4096/8 + 4*4 */
/* vram */
uint8_t *vram_ptr;
uint8_t *vram_b;
uint8_t *vram_r;
uint8_t *vram_g;
uint8_t *vram_e;
egcquad_t vram_src;
egcquad_t vram_data;
} egc_t;
extern void egc_mem_writeb(egc_t *dev, uint32_t addr1, uint8_t value);
extern void egc_mem_writew(egc_t *dev, uint32_t addr1, uint16_t value);
extern uint8_t egc_mem_readb(egc_t *dev, uint32_t addr1);
extern uint16_t egc_mem_readw(egc_t *dev, uint32_t addr1);
extern void egc_set_vram(egc_t *dev, uint8_t *vram_ptr);
extern void egc_reset(egc_t *dev);
extern void egc_init(egc_t *dev, void *priv);
#endif /*VIDEO_PC98X1_EGC_H*/

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@@ -19,17 +19,63 @@
#ifndef VIDEO_UPD7220_H
# define VIDEO_UPD7220_H
#define TVRAM_SIZE 0x4000
#define VRAM16_SIZE 0x40000
#define VRAM256_SIZE 0x80000
#define EMS_SIZE 0x10000
#define GDC_BUFFERS 1024
#define GDC_TABLEMAX 0x1000
enum {
GDC_CMD_RESET = 0x00,
GDC_CMD_SYNC = 0x0e,
GDC_CMD_SLAVE = 0x6e,
GDC_CMD_MASTER = 0x6f,
GDC_CMD_START = 0x6b,
GDC_CMD_BCTRL = 0x0c,
GDC_CMD_ZOOM = 0x46,
GDC_CMD_SCROLL = 0x70,
GDC_CMD_CSRFORM = 0x4b,
GDC_CMD_PITCH = 0x47,
GDC_CMD_LPEN = 0xc0,
GDC_CMD_VECTW = 0x4c,
GDC_CMD_VECTE = 0x6c,
GDC_CMD_TEXTW = 0x78,
GDC_CMD_TEXTE = 0x68,
GDC_CMD_CSRW = 0x49,
GDC_CMD_CSRR = 0xe0,
GDC_CMD_MASK = 0x4a,
GDC_CMD_WRITE = 0x20,
GDC_CMD_READ = 0xa0,
GDC_CMD_DMAR = 0xa4,
GDC_CMD_DMAW = 0x24,
/* unknown command (3 params) */
GDC_CMD_UNK_5A = 0x5a,
};
enum {
GDC_STAT_DRDY = 0x01,
GDC_STAT_FULL = 0x02,
GDC_STAT_EMPTY = 0x04,
GDC_STAT_DRAW = 0x08,
GDC_STAT_DMA = 0x10,
GDC_STAT_VSYNC = 0x20,
GDC_STAT_HBLANK = 0x40,
GDC_STAT_LPEN = 0x80,
};
enum {
GDC_DIRTY_VRAM = 0x01,
GDC_DIRTY_START = 0x02,
GDC_DIRTY_SCROLL = 0x04,
GDC_DIRTY_CURSOR = 0x08,
GDC_DIRTY_GFX = GDC_DIRTY_VRAM | GDC_DIRTY_SCROLL,
GDC_DIRTY_CHR = GDC_DIRTY_GFX | GDC_DIRTY_CURSOR,
};
#define GDC_VTICKS 18
#define GDC_VSTICKS 2
#define GDC_MULBIT 15
#define GDC_TABLEBIT 12
typedef struct upd7220_t {
void *priv;
@@ -71,49 +117,15 @@ typedef struct upd7220_t {
uint16_t pattern;
} upd7220_t;
extern void upd7220_init(upd7220_t *dev, void *priv,
uint8_t (*vram_read)(uint32_t addr, void *priv),
void (*vram_write)(uint32_t addr, uint8_t val, void *priv));
extern void upd7220_init(upd7220_t *dev, void *priv,
uint8_t (*vram_read)(uint32_t addr, void *priv),
void (*vram_write)(uint32_t addr, uint8_t val, void *priv));
void upd7220_param_write(uint16_t addr, uint8_t value, void *priv);
uint8_t upd7220_statreg_read(uint16_t addr, void *priv);
void upd7220_cmdreg_write(uint16_t addr, uint8_t value, void *priv);
uint8_t upd7220_data_read(uint16_t addr, void *priv);
void upd7220_reset(upd7220_t *dev);
# ifdef EMU_DEVICE_H
extern const device_t ati68860_ramdac_device;
extern const device_t ati68875_ramdac_device;
extern const device_t att490_ramdac_device;
extern const device_t att491_ramdac_device;
extern const device_t att492_ramdac_device;
extern const device_t att498_ramdac_device;
extern const device_t av9194_device;
extern const device_t bt484_ramdac_device;
extern const device_t att20c504_ramdac_device;
extern const device_t bt485_ramdac_device;
extern const device_t att20c505_ramdac_device;
extern const device_t bt485a_ramdac_device;
extern const device_t gendac_ramdac_device;
extern const device_t ibm_rgb528_ramdac_device;
extern const device_t ics2494an_305_device;
extern const device_t ati18810_device;
extern const device_t ati18811_0_device;
extern const device_t ati18811_1_device;
extern const device_t ics2595_device;
extern const device_t icd2061_device;
extern const device_t ics9161_device;
extern const device_t sc11483_ramdac_device;
extern const device_t sc11487_ramdac_device;
extern const device_t sc11486_ramdac_device;
extern const device_t sc11484_nors2_ramdac_device;
extern const device_t sc1502x_ramdac_device;
extern const device_t sdac_ramdac_device;
extern const device_t stg_ramdac_device;
extern const device_t tkd8001_ramdac_device;
extern const device_t tseng_ics5301_ramdac_device;
extern const device_t tseng_ics5341_ramdac_device;
extern const device_t tvp3026_ramdac_device;
# endif
extern void upd7220_recalctimings(upd7220_t *dev);
extern void upd7220_param_write(uint16_t addr, uint8_t value, void *priv);
extern uint8_t upd7220_statreg_read(uint16_t addr, void *priv);
extern void upd7220_cmdreg_write(uint16_t addr, uint8_t value, void *priv);
extern uint8_t upd7220_data_read(uint16_t addr, void *priv);
extern void upd7220_reset(upd7220_t *dev);
#endif /*VIDEO_UPD7220_H*/