diff --git a/src/cdrom/cdrom.c b/src/cdrom/cdrom.c index 37795b845..062e3bf72 100644 --- a/src/cdrom/cdrom.c +++ b/src/cdrom/cdrom.c @@ -797,7 +797,7 @@ void cdrom_get_current_subchannel_sony(cdrom_t *dev, uint8_t *b, int msf) { subchannel_t subc; - int pos = 0, m, s, f; + int pos = 0; uint32_t dat; dev->ops->get_subchannel(dev, dev->seek_pos, &subc); @@ -833,7 +833,6 @@ cdrom_get_audio_status_sony(cdrom_t *dev, uint8_t *b, int msf) { uint8_t ret; subchannel_t subc; - int m, s, f; uint32_t dat; dev->ops->get_subchannel(dev, dev->seek_pos, &subc); @@ -1063,7 +1062,6 @@ read_toc_sony(cdrom_t *dev, unsigned char *b, unsigned char start_track, int msf { track_info_t ti; int i, len = 4; - int m, s, f; int first_track, last_track; uint32_t temp; @@ -1620,6 +1618,9 @@ cdrom_readsector_raw(cdrom_t *dev, uint8_t *buffer, int sector, int ismsf, int c lba = bcd2bin((sector >> 24) & 0xff); msf = sector; break; + /* Never used values but the compiler complains. */ + default: + lba = msf = 0; } } diff --git a/src/chipset/CMakeLists.txt b/src/chipset/CMakeLists.txt index d93f86219..0a6a5fbe5 100644 --- a/src/chipset/CMakeLists.txt +++ b/src/chipset/CMakeLists.txt @@ -13,7 +13,7 @@ # Copyright 2020-2021 David Hrdlička. # -add_library(chipset OBJECT 82c100.c acc2168.c cs8230.c ali1429.c ali1489.c ali1531.c ali1541.c ali1543.c +add_library(chipset OBJECT 82c100.c acc2168.c cs8230.c ali1429.c ali1435.c ali1489.c ali1531.c ali1541.c ali1543.c ali1621.c ali6117.c headland.c ims8848.c intel_82335.c contaq_82c59x.c cs4031.c intel_420ex.c intel_4x0.c intel_i450kx.c intel_sio.c intel_piix.c ../ioapic.c neat.c opti283.c opti291.c opti391.c opti495.c opti822.c opti895.c opti5x7.c scamp.c scat.c sis_85c310.c sis_85c4xx.c diff --git a/src/chipset/ali1429.c b/src/chipset/ali1429.c index 36ac2fdf9..500b1c6a0 100644 --- a/src/chipset/ali1429.c +++ b/src/chipset/ali1429.c @@ -1,23 +1,21 @@ /* - * 86Box A hypervisor and IBM PC system emulator that specializes in - * running old operating systems and software designed for IBM - * PC systems and compatibles from 1981 through fairly recent - * system designs based on the PCI bus. + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. * - * This file is part of the 86Box distribution. + * This file is part of the 86Box distribution. * - * Implementation of the ALi M1429 chipset. + * Implementation of the ALi M1429 chipset. * - * Note: This chipset has no datasheet, everything were done via - * reverse engineering the BIOS of various machines using it. + * Note: This chipset has no datasheet, everything were done via + * reverse engineering the BIOS of various machines using it. * + * Authors: Tiseno100, + * Miran Grca, * - * - * Authors: Tiseno100, - * Miran Grca, - * - * Copyright 2020-2021 Tiseno100. - * Copyright 2021-2021 Miran Grca. + * Copyright 2020,2021 Tiseno100. + * Copyright 2021,2021 Miran Grca. */ /* @@ -66,14 +64,15 @@ Register 20h: Bits 2-1-0: Bus Clock Speed 0 0 0: 7.1519Mhz (ATCLK2) - 0 0 1: CLK2IN/4 - 0 1 0: CLK2IN/5 - 0 1 1: CLK2IN/6 - 1 0 0: CLK2IN/8 - 1 0 1: CLK2IN/10 - 1 1 0: CLK2IN/12 + 0 0 1: CLK2IN/4 + 0 1 0: CLK2IN/5 + 0 1 1: CLK2IN/6 + 1 0 0: CLK2IN/8 + 1 0 1: CLK2IN/10 + 1 1 0: CLK2IN/12 */ + #include #include #include @@ -95,11 +94,13 @@ #include <86box/smram.h> #include <86box/chipset.h> -#define GREEN dev->is_g /* Is G Variant */ +#define GREEN dev->is_g /* Is G Variant */ + #ifdef ENABLE_ALI1429_LOG int ali1429_do_log = ENABLE_ALI1429_LOG; + static void ali1429_log(const char *fmt, ...) { @@ -112,25 +113,27 @@ ali1429_log(const char *fmt, ...) } } #else -# define ali1429_log(fmt, ...) +#define ali1429_log(fmt, ...) #endif + typedef struct { - uint8_t is_g, index, cfg_locked, reg_57h, - regs[90]; + uint8_t is_g, index, cfg_locked, reg_57h, + regs[90]; } ali1429_t; + static void ali1429_shadow_recalc(ali1429_t *dev) { uint32_t base, i, can_write, can_read; - shadowbios = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x01); + shadowbios = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x01); shadowbios_write = (dev->regs[0x13] & 0x40) && (dev->regs[0x14] & 0x02); can_write = (dev->regs[0x14] & 0x02) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; - can_read = (dev->regs[0x14] & 0x01) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; + can_read = (dev->regs[0x14] & 0x01) ? MEM_READ_INTERNAL : MEM_READ_EXTANY; for (i = 0; i < 8; i++) { base = 0xc0000 + (i << 15); @@ -144,149 +147,149 @@ ali1429_shadow_recalc(ali1429_t *dev) flushmmucache_nopc(); } + static void ali1429_write(uint16_t addr, uint8_t val, void *priv) { - ali1429_t *dev = (ali1429_t *) priv; + ali1429_t *dev = (ali1429_t *)priv; switch (addr) { - case 0x22: - dev->index = val; - break; + case 0x22: + dev->index = val; + break; - case 0x23: + case 0x23: #ifdef ENABLE_ALI1429_LOG - if (dev->index != 0x03) - ali1429_log("M1429: dev->regs[%02x] = %02x\n", dev->index, val); + if (dev->index != 0x03) + ali1429_log("M1429: dev->regs[%02x] = %02x\n", dev->index, val); #endif - if (dev->index == 0x03) - dev->cfg_locked = !(val == 0xc5); + if (dev->index == 0x03) + dev->cfg_locked = (val != 0xc5); - if (!dev->cfg_locked) { - /* Common M1429 Registers */ - switch (dev->index) { - case 0x10: - case 0x11: - dev->regs[dev->index] = val; - break; + if (!dev->cfg_locked) { + pclog("M1429: dev->regs[%02x] = %02x\n", dev->index, val); - case 0x12: - dev->regs[dev->index] = val; - if (val & 4) - mem_remap_top(128); - else - mem_remap_top(0); - break; + /* Common M1429 Registers */ + switch (dev->index) { + case 0x10: case 0x11: + dev->regs[dev->index] = val; + break; - case 0x13: - case 0x14: - dev->regs[dev->index] = val; - ali1429_shadow_recalc(dev); - break; + case 0x12: + dev->regs[dev->index] = val; + if(val & 4) + mem_remap_top(128); + else + mem_remap_top(0); + break; - case 0x15: - case 0x16: - case 0x17: - dev->regs[dev->index] = val; - break; + case 0x13: case 0x14: + dev->regs[dev->index] = val; + ali1429_shadow_recalc(dev); + break; - case 0x18: - dev->regs[dev->index] = (val & 0x8f) | 0x20; - cpu_cache_ext_enabled = !!(val & 2); - cpu_update_waitstates(); - break; + case 0x15: case 0x16: + case 0x17: + dev->regs[dev->index] = val; + break; - case 0x19: - case 0x1a: - case 0x1e: - dev->regs[dev->index] = val; - break; + case 0x18: + dev->regs[dev->index] = (val & 0x8f) | 0x20; + cpu_cache_ext_enabled = !!(val & 2); + cpu_update_waitstates(); + break; - case 0x20: - dev->regs[dev->index] = val; + case 0x19: case 0x1a: + case 0x1e: + dev->regs[dev->index] = val; + break; - switch (val & 7) { - case 0: - case 7: /* Illegal */ - cpu_set_isa_speed(7159091); - break; + case 0x20: + dev->regs[dev->index] = val; - case 1: - cpu_set_isa_speed(cpu_busspeed / 4); - break; + switch(val & 7) { + case 0: case 7: /* Illegal */ + cpu_set_isa_speed(7159091); + break; - case 2: - cpu_set_isa_speed(cpu_busspeed / 5); - break; + case 1: + cpu_set_isa_speed(cpu_busspeed / 4); + break; - case 3: - cpu_set_isa_speed(cpu_busspeed / 6); - break; + case 2: + cpu_set_isa_speed(cpu_busspeed / 5); + break; - case 4: - cpu_set_isa_speed(cpu_busspeed / 8); - break; + case 3: + cpu_set_isa_speed(cpu_busspeed / 6); + break; - case 5: - cpu_set_isa_speed(cpu_busspeed / 10); - break; + case 4: + cpu_set_isa_speed(cpu_busspeed / 8); + break; - case 6: - cpu_set_isa_speed(cpu_busspeed / 12); - break; - } - break; + case 5: + cpu_set_isa_speed(cpu_busspeed / 10); + break; - case 0x21 ... 0x27: - dev->regs[dev->index] = val; - break; - } + case 6: + cpu_set_isa_speed(cpu_busspeed / 12); + break; + } + break; - /* M1429G Only Registers */ - if (GREEN) { - switch (dev->index) { - case 0x30 ... 0x41: - case 0x43: - case 0x45: - case 0x4a: - dev->regs[dev->index] = val; - break; + case 0x21 ... 0x27: + dev->regs[dev->index] = val; + break; + } - case 0x57: - dev->reg_57h = val; - break; - } - } - } - break; + /* M1429G Only Registers */ + if (GREEN) { + switch (dev->index) { + case 0x30 ... 0x41: + case 0x43: case 0x45: + case 0x4a: + dev->regs[dev->index] = val; + break; + + case 0x57: + dev->reg_57h = val; + break; + } + } + } + break; } } + static uint8_t ali1429_read(uint16_t addr, void *priv) { - ali1429_t *dev = (ali1429_t *) priv; - uint8_t ret = 0xff; + ali1429_t *dev = (ali1429_t *)priv; + uint8_t ret = 0xff; if ((addr == 0x23) && (dev->index >= 0x10) && (dev->index <= 0x4a)) - ret = dev->regs[dev->index]; + ret = dev->regs[dev->index]; else if ((addr == 0x23) && (dev->index == 0x57)) - ret = dev->reg_57h; + ret = dev->reg_57h; else if (addr == 0x22) - ret = dev->index; + ret = dev->index; return ret; } + static void ali1429_close(void *priv) { - ali1429_t *dev = (ali1429_t *) priv; + ali1429_t *dev = (ali1429_t *)priv; free(dev); } + static void ali1429_defaults(ali1429_t *dev) { @@ -305,27 +308,28 @@ ali1429_defaults(ali1429_t *dev) /* M1429G Default Registers */ if (GREEN) { - dev->regs[0x31] = 0x88; - dev->regs[0x32] = 0xc0; - dev->regs[0x38] = 0xe5; - dev->regs[0x40] = 0xe3; - dev->regs[0x41] = 2; - dev->regs[0x45] = 0x80; + dev->regs[0x31] = 0x88; + dev->regs[0x32] = 0xc0; + dev->regs[0x38] = 0xe5; + dev->regs[0x40] = 0xe3; + dev->regs[0x41] = 2; + dev->regs[0x45] = 0x80; } } + static void * ali1429_init(const device_t *info) { - ali1429_t *dev = (ali1429_t *) malloc(sizeof(ali1429_t)); + ali1429_t *dev = (ali1429_t *)malloc(sizeof(ali1429_t)); memset(dev, 0, sizeof(ali1429_t)); dev->cfg_locked = 1; - GREEN = info->local; + GREEN = info->local; /* M1429 Ports: - 22h Index Port - 23h Data Port + 22h Index Port + 23h Data Port */ io_sethandler(0x0022, 0x0002, ali1429_read, NULL, NULL, ali1429_write, NULL, NULL, dev); @@ -337,29 +341,29 @@ ali1429_init(const device_t *info) } const device_t ali1429_device = { - .name = "ALi M1429", + .name = "ALi M1429", .internal_name = "ali1429", - .flags = 0, - .local = 0, - .init = ali1429_init, - .close = ali1429_close, - .reset = NULL, + .flags = 0, + .local = 0, + .init = ali1429_init, + .close = ali1429_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; const device_t ali1429g_device = { - .name = "ALi M1429G", + .name = "ALi M1429G", .internal_name = "ali1429g", - .flags = 0, - .local = 1, - .init = ali1429_init, - .close = ali1429_close, - .reset = NULL, + .flags = 0, + .local = 1, + .init = ali1429_init, + .close = ali1429_close, + .reset = NULL, { .available = NULL }, .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL + .force_redraw = NULL, + .config = NULL }; diff --git a/src/chipset/ali1435.c b/src/chipset/ali1435.c new file mode 100644 index 000000000..4497ad338 --- /dev/null +++ b/src/chipset/ali1435.c @@ -0,0 +1,323 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * Emulation of ALi M1435 chipset that acts as both the + * southbridge. + * + * + * + * Authors: Miran Grca, + * + * Copyright 2020 Miran Grca. + */ +#include +#include +#include +#include +#include +#include +#define HAVE_STDARG_H +#include <86box/86box.h> +#include <86box/device.h> +#include <86box/io.h> +#include <86box/apm.h> +#include <86box/dma.h> +#include <86box/mem.h> +#include <86box/smram.h> +#include <86box/pci.h> +#include <86box/timer.h> +#include <86box/pic.h> +#include <86box/pit.h> +#include <86box/port_92.h> +#include <86box/hdc_ide.h> +#include <86box/hdc.h> +#include <86box/machine.h> +#include <86box/chipset.h> +#include <86box/spd.h> + + +#define MEM_STATE_SHADOW_R 0x01 +#define MEM_STATE_SHADOW_W 0x02 +#define MEM_STATE_SMRAM 0x04 + + +typedef struct +{ + uint8_t index, cfg_locked, + regs[16], pci_regs[256]; +} ali1435_t; + + +#define ENABLE_ALI1435_LOG 1 +#ifdef ENABLE_ALI1435_LOG +int ali1435_do_log = ENABLE_ALI1435_LOG; + + +static void +ali1435_log(const char *fmt, ...) +{ + va_list ap; + + if (ali1435_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } +} +#else +#define ali1435_log(fmt, ...) +#endif + + +/* NOTE: We cheat here. The real ALi M1435 uses a level to edge triggered IRQ converter + when the most siginificant bit is set. We work around that by manipulating the + emulated PIC's ELCR register. */ +static void +ali1435_update_irqs(ali1435_t *dev, int set) +{ + uint8_t val; + int i, reg; + int shift, irq; + int irq_map[8] = { -1, 5, 9, 10, 11, 12, 14, 15 }; + pic_t *temp_pic; + + for (i = 0; i < 4; i++) { + reg = 0x80 + (i >> 1); + shift = (i & 1) << 2; + val = (dev->pci_regs[reg] >> shift) & 0x0f; + irq = irq_map[val & 0x07]; + if (irq == -1) + continue; + temp_pic = (irq >= 8) ? &pic2 : &pic; + irq &= 7; + if (set && (val & 0x08)) + temp_pic->elcr |= (1 << irq); + else + temp_pic->elcr &= ~(1 << irq); + } +} + + +static void +ali1435_pci_write(int func, int addr, uint8_t val, void *priv) +{ + ali1435_t *dev = (ali1435_t *) priv; + int irq, irq_map[8] = { -1, 5, 9, 10, 11, 12, 14, 15 }; + + ali1435_log("ali1435_write(%02X, %02X, %02X)\n", func, addr, val); + + if (func > 0) + return; + + if ((addr < 0x04) || (addr == 0x06) || ((addr >= 0x08) && (addr <= 0x0b))) + return; + + if ((addr >= 0x0f) && (addr < 0x30)) + return; + + if ((addr >= 0x34) && (addr < 0x40)) + return; + + switch (addr) { + /* Dummy PCI Config */ + case 0x04: + dev->pci_regs[addr] = (val & 0x7f) | 0x07; + break; + + case 0x05: + dev->pci_regs[addr] = (val & 0x01); + break; + + /* Dummy PCI Status */ + case 0x07: + dev->pci_regs[addr] &= ~(val & 0xb8); + break; + + case 0x80: case 0x81: + dev->pci_regs[addr] = val; + ali1435_update_irqs(dev, 0); + irq = irq_map[val & 0x07]; + if (irq >= 0) { + ali1435_log("Set IRQ routing: INT %c -> %02X\n", 0x41 + ((addr & 0x01) << 1), irq); + pci_set_irq_routing(PCI_INTA + ((addr & 0x01) << 1), irq); + } else { + ali1435_log("Set IRQ routing: INT %c -> FF\n", 0x41 + ((addr & 0x01) << 1)); + pci_set_irq_routing(PCI_INTA + ((addr & 0x01) << 1), PCI_IRQ_DISABLED); + } + irq = irq_map[(val >> 4) & 0x07]; + if (irq >= 0) { + ali1435_log("Set IRQ routing: INT %c -> %02X\n", 0x42 + ((addr & 0x01) << 1), irq); + pci_set_irq_routing(PCI_INTB + ((addr & 0x01) << 1), irq); + } else { + ali1435_log("Set IRQ routing: INT %c -> FF\n", 0x42 + ((addr & 0x01) << 1)); + pci_set_irq_routing(PCI_INTB + ((addr & 0x01) << 1), PCI_IRQ_DISABLED); + } + ali1435_update_irqs(dev, 1); + break; + + default: + dev->pci_regs[addr] = val; + break; + } +} + + +static uint8_t +ali1435_pci_read(int func, int addr, void *priv) +{ + ali1435_t *dev = (ali1435_t *) priv; + uint8_t ret; + + ret = 0xff; + + if (func == 0) + ret = dev->pci_regs[addr]; + + ali1435_log("ali1435_read(%02X, %02X) = %02X\n", func, addr, ret); + + return ret; +} + + +static void +ali1435_write(uint16_t addr, uint8_t val, void *priv) +{ + ali1435_t *dev = (ali1435_t *)priv; + + switch (addr) { + case 0x22: + dev->index = val; + break; + + case 0x23: +/* #ifdef ENABLE_ALI1435_LOG + if (dev->index != 0x03) + ali1435_log("M1435: dev->regs[%02x] = %02x\n", dev->index, val); +#endif */ + + if (dev->index == 0x03) + dev->cfg_locked = (val != 0x69); + + if (!dev->cfg_locked) { + pclog("M1435: dev->regs[%02x] = %02x\n", dev->index, val); + + switch (dev->index) { + /* PCI Mechanism select? */ + case 0x00: + dev->regs[dev->index] = val; + pclog("PMC = %i\n", val != 0xc8); + pci_set_pmc(val != 0xc8); + break; + + /* ???? */ + case 0x06: + dev->regs[dev->index] = val; + break; + + /* ???? */ + case 0x07: + dev->regs[dev->index] = val; + break; + } + } + break; + } +} + + +static uint8_t +ali1435_read(uint16_t addr, void *priv) +{ + ali1435_t *dev = (ali1435_t *)priv; + uint8_t ret = 0xff; + + if ((addr == 0x23) && (dev->index < 0x10)) + ret = dev->regs[dev->index]; + else if (addr == 0x22) + ret = dev->index; + + return ret; +} + + +static void +ali1435_reset(void *priv) +{ + ali1435_t *dev = (ali1435_t *) priv; + + memset(dev->regs, 0, 16); + + dev->regs[0x00] = 0xff; + + pci_set_pmc(0); + + dev->cfg_locked = 1; + + memset(dev->pci_regs, 0, 256); + + dev->pci_regs[0x00] = 0x25; dev->pci_regs[0x01] = 0x10; /*ALi*/ + dev->pci_regs[0x02] = 0x35; dev->pci_regs[0x03] = 0x14; /*M1435*/ + dev->pci_regs[0x04] = 0x07; + dev->pci_regs[0x07] = 0x04; + dev->pci_regs[0x0b] = 0x06; + + dev->pci_regs[0x80] = 0x80; dev->pci_regs[0x81] = 0x00; + + pci_set_irq_routing(PCI_INTA, PCI_IRQ_DISABLED); + pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED); + pci_set_irq_routing(PCI_INTC, PCI_IRQ_DISABLED); + pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED); +} + + +static void +ali1435_close(void *p) +{ + ali1435_t *dev = (ali1435_t *)p; + + free(dev); +} + + +static void * +ali1435_init(const device_t *info) +{ + ali1435_t *dev = (ali1435_t *) malloc(sizeof(ali1435_t)); + memset(dev, 0, sizeof(ali1435_t)); + + dev->cfg_locked = 1; + + /* M1435 Ports: + 22h Index Port + 23h Data Port + */ + io_sethandler(0x0022, 0x0002, ali1435_read, NULL, NULL, ali1435_write, NULL, NULL, dev); + + pci_add_card(PCI_ADD_NORTHBRIDGE, ali1435_pci_read, ali1435_pci_write, dev); + + ali1435_reset(dev); + + /* pci_set_irq_level(PCI_INTA, 0); + pci_set_irq_level(PCI_INTB, 0); + pci_set_irq_level(PCI_INTC, 0); + pci_set_irq_level(PCI_INTD, 0); */ + + return dev; +} + +const device_t ali1435_device = { + .name = "Intel ALi M1435", + .internal_name = "ali1435", + .flags = DEVICE_PCI, + .local = 0x00, + .init = ali1435_init, + .close = ali1435_close, + .reset = ali1435_reset, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; diff --git a/src/device/keyboard_at.c b/src/device/keyboard_at.c index 5b777eaf3..dc385c011 100644 --- a/src/device/keyboard_at.c +++ b/src/device/keyboard_at.c @@ -1947,7 +1947,7 @@ kbd_write(uint16_t port, uint8_t val, void *priv) val &= ~0x0c; val |= (dev->output_port & 0x0c); } - write_output(dev, val); + write_output(dev, val | 0x01); break; case 0xd2: /* write to keyboard output buffer */ diff --git a/src/include/86box/chipset.h b/src/include/86box/chipset.h index 0a3e988f6..9d6bd64cf 100644 --- a/src/include/86box/chipset.h +++ b/src/include/86box/chipset.h @@ -24,6 +24,7 @@ extern const device_t acc2168_device; extern const device_t ali1217_device; extern const device_t ali1429_device; extern const device_t ali1429g_device; +extern const device_t ali1435_device; extern const device_t ali1489_device; extern const device_t ali1531_device; extern const device_t ali1541_device; diff --git a/src/include/86box/machine.h b/src/include/86box/machine.h index dbbe7566f..ea1830c31 100644 --- a/src/include/86box/machine.h +++ b/src/include/86box/machine.h @@ -513,6 +513,9 @@ extern int machine_at_atc1415_init(const machine_t *); extern int machine_at_actionpc2600_init(const machine_t *); extern int machine_at_m919_init(const machine_t *); extern int machine_at_spc7700plw_init(const machine_t *); +extern int machine_at_ms4134_init(const machine_t *); +extern int machine_at_tg486gp_init(const machine_t *); +extern int machine_at_tg486g_init(const machine_t *); /* m_at_commodore.c */ extern int machine_at_cmdpc_init(const machine_t *); diff --git a/src/include/86box/sio.h b/src/include/86box/sio.h index 09b5b1c40..8b95b55b5 100644 --- a/src/include/86box/sio.h +++ b/src/include/86box/sio.h @@ -29,6 +29,7 @@ extern const device_t fdc37c663_device; extern const device_t fdc37c663_ide_device; extern const device_t fdc37c665_device; extern const device_t fdc37c665_ide_device; +extern const device_t fdc37c665_ide_pri_device; extern const device_t fdc37c666_device; extern const device_t fdc37c67x_device; extern const device_t fdc37c669_device; diff --git a/src/machine/m_at_386dx_486.c b/src/machine/m_at_386dx_486.c index b9583f72e..036eac550 100644 --- a/src/machine/m_at_386dx_486.c +++ b/src/machine/m_at_386dx_486.c @@ -1719,3 +1719,94 @@ machine_at_spc7700plw_init(const machine_t *model) return ret; } + +int +machine_at_ms4134_init(const machine_t *model) +{ + int ret; + + ret = bios_load_linear("roms/machines/ms4134/4alm001.bin", + 0x000e0000, 131072, 0); + + if (bios_only || !ret) + return ret; + + machine_at_common_ide_init(model); + + device_add(&ali1429g_device); + + device_add(&fdc37c665_ide_pri_device); + + pci_init(PCI_CAN_SWITCH_TYPE | PCI_ALWAYS_EXPOSE_DEV0); + pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); + + pci_register_slot(0x0B, PCI_CARD_SCSI, 4, 1, 2, 3); + pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4); + pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1); + pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2); + pci_register_slot(0x10, PCI_CARD_NORMAL, 1, 2, 3, 4); + + device_add(&ali1435_device); + device_add(&sst_flash_29ee010_device); + + device_add(&keyboard_ps2_ami_device); + + return ret; +} + +int +machine_at_tg486gp_init(const machine_t *model) +{ + int ret; + + ret = bios_load_linear("roms/machines/tg486gp/tg486gp.bin", + 0x000e0000, 131072, 0); + + if (bios_only || !ret) + return ret; + + machine_at_common_ide_init(model); + + device_add(&ali1429g_device); + + device_add(&fdc37c665_ide_pri_device); + + pci_init(PCI_CAN_SWITCH_TYPE | PCI_ALWAYS_EXPOSE_DEV0); + pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0); + + pci_register_slot(0x0F, PCI_CARD_NORMAL, 1, 2, 3, 4); + pci_register_slot(0x0D, PCI_CARD_NORMAL, 2, 3, 4, 1); + pci_register_slot(0x0B, PCI_CARD_NORMAL, 3, 4, 1, 2); + pci_register_slot(0x10, PCI_CARD_NORMAL, 1, 2, 3, 4); + + device_add(&ali1435_device); + device_add(&sst_flash_29ee010_device); + + device_add(&keyboard_ps2_ami_device); + + return ret; +} + +int +machine_at_tg486g_init(const machine_t *model) +{ + int ret; + + ret = bios_load_linear("roms/machines/tg486g/tg486g.bin", + 0x000c0000, 262144, 0); + + if (bios_only || !ret) + return ret; + else { + mem_mapping_set_addr(&bios_mapping, 0x0c0000, 0x40000); + mem_mapping_set_exec(&bios_mapping, rom); + } + + machine_at_common_init(model); + device_add(&sis_85c471_device); + device_add(&ide_isa_device); + device_add(&fdc37c651_ide_device); + device_add(&keyboard_ps2_intel_ami_pci_device); + + return ret; +} diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index 3365f1014..137537b75 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -5765,8 +5765,119 @@ const machine_t machines[] = { .snd_device = NULL, .net_device = NULL }, + /* TriGem AMIBIOS Pre-Color with TriGem AMI 'Z' keyboard controller */ + { + .name = "[SiS 471] TriGem 486G", + .internal_name = "tg486g", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_SIS_471, + .init = machine_at_tg486g_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_VLB, + .flags = MACHINE_IDE, + .ram = { + .min = 1024, + .max = 65536, + .step = 1024 + }, + .nvrmask = 127, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL + }, /* 486 machines which utilize the PCI bus */ + /* Machine with ALi M1429G chipset and M1435 southbridge */ + { + .name = "[ALi M1429G] MSI MS-4134", + .internal_name = "ms4134", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_ALI_M1429G, + .init = machine_at_ms4134_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2_PCIV, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 131072, + .step = 1024 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL + }, + /* TriGem machine with M1429G and PhoenixBIOS */ + { + .name = "[ALi M1429G] TriGem 486GP", + .internal_name = "tg486gp", + .type = MACHINE_TYPE_486_S3, + .chipset = MACHINE_CHIPSET_ALI_M1429G, + .init = machine_at_tg486gp_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_SOCKET3, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PS2_PCIV, + .flags = MACHINE_IDE_DUAL, + .ram = { + .min = 1024, + .max = 131072, + .step = 1024 + }, + .nvrmask = 255, + .kbc = KBC_UNKNOWN, + .kbc_p1 = 0, + .gpio = 0, + .device = NULL, + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL + }, /* This has an AMIKey-2, which is an updated version of type 'H'. */ { .name = "[ALi M1489] AAEON SBC-490", diff --git a/src/scsi/scsi_cdrom.c b/src/scsi/scsi_cdrom.c index b635bcb10..38693f590 100644 --- a/src/scsi/scsi_cdrom.c +++ b/src/scsi/scsi_cdrom.c @@ -858,11 +858,10 @@ scsi_cdrom_update_request_length(scsi_cdrom_t *dev, int len, int block_len) that a media access comand does not DRQ in the middle of a sector. One of the drivers that relies on the correctness of this behavior is MTMCDAI.SYS (the Mitsumi CD-ROM driver) for DOS which uses the READ CD command to read data on some CD types. */ - if ((dev->current_cdb[0] == 0xb9) || (dev->current_cdb[0] == 0xbe)) { - /* Round to sector length. */ - dlen = ((double) dev->max_transfer_len) / ((double) block_len); - dev->max_transfer_len = ((uint16_t) floor(dlen)) * block_len; - } + + /* Round to sector length. */ + dlen = ((double) dev->max_transfer_len) / ((double) block_len); + dev->max_transfer_len = ((uint16_t) floor(dlen)) * block_len; } else { /* Round it to the nearest 2048 bytes. */ dev->max_transfer_len = (dev->max_transfer_len >> 11) << 11; @@ -929,7 +928,7 @@ scsi_cdrom_bus_speed(scsi_cdrom_t *dev) static void scsi_cdrom_command_common(scsi_cdrom_t *dev) { - double bytes_per_second, period; + double bytes_per_second = 0.0, period; dev->status = BUSY_STAT; dev->phase = 1; @@ -2641,7 +2640,8 @@ begin: break; } - ret = cdrom_audio_play(dev->drv, pos, len, msf); + /* In this case, len is unused so just pass a fixed value of 1 intead. */ + ret = cdrom_audio_play(dev->drv, pos, 1 /*len*/, msf); if (ret) scsi_cdrom_command_complete(dev); diff --git a/src/scsi/scsi_spock.c b/src/scsi/scsi_spock.c index 0f618df95..f8dc3282e 100644 --- a/src/scsi/scsi_spock.c +++ b/src/scsi/scsi_spock.c @@ -516,7 +516,7 @@ spock_process_imm_cmd(spock_t *scsi) static void spock_execute_cmd(spock_t *scsi, scb_t *scb) { - int c, j; + int c, j = 0; int old_scb_state; if (scsi->in_reset) { diff --git a/src/sio/sio_fdc37c6xx.c b/src/sio/sio_fdc37c6xx.c index f9c911402..8400ca1e0 100644 --- a/src/sio/sio_fdc37c6xx.c +++ b/src/sio/sio_fdc37c6xx.c @@ -216,7 +216,7 @@ static uint8_t fdc37c6xx_read(uint16_t port, void *priv) { fdc37c6xx_t *dev = (fdc37c6xx_t *) priv; - uint8_t ret = 0x00; + uint8_t ret = 0xff; if (dev->tries == 2) { if (port == 0x3f1) @@ -437,6 +437,20 @@ const device_t fdc37c665_ide_device = { .config = NULL }; +const device_t fdc37c665_ide_pri_device = { + .name = "SMC FDC37C665 Super I/O (With Primary IDE)", + .internal_name = "fdc37c665_ide_pri", + .flags = 0, + .local = 0x165, + .init = fdc37c6xx_init, + .close = fdc37c6xx_close, + .reset = NULL, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; + const device_t fdc37c666_device = { .name = "SMC FDC37C666 Super I/O", .internal_name = "fdc37c666", diff --git a/src/win/Makefile.mingw b/src/win/Makefile.mingw index e39792966..0daf65323 100644 --- a/src/win/Makefile.mingw +++ b/src/win/Makefile.mingw @@ -549,7 +549,7 @@ CPUOBJ := $(DYNARECOBJ) \ CHIPSETOBJ := 82c100.o acc2168.o \ contaq_82c59x.o \ cs4031.o cs8230.o \ - ali1429.o ali1489.o ali1531.o ali1541.o ali1543.o ali1621.o ali6117.o \ + ali1429.o ali1435.o ali1489.o ali1531.o ali1541.o ali1543.o ali1621.o ali6117.o \ gc100.o headland.o \ ims8848.o intel_82335.o intel_420ex.o intel_4x0.o intel_i450kx.o intel_sio.o intel_piix.o \ ioapic.o \