fix crossbuffer blit, use custom render functions

This commit is contained in:
starfrost013
2025-04-06 18:08:42 +01:00
parent c9f6f87fcc
commit c1506772de
9 changed files with 186 additions and 18 deletions

View File

@@ -270,8 +270,8 @@ typedef struct nv3_color_argb_s
/* Generic 16-bit position*/
typedef struct nv3_position_16_s
{
uint16_t y;
uint16_t x;
uint16_t y;
} nv3_position_16_t;
/* A big position format with 30:16 = y, 15:11 = nothing, 10:0 = x */
@@ -287,8 +287,8 @@ typedef struct nv3_position_16_bigy_s
/* Generic 16-bit size */
typedef struct nv3_size_16_s
{
uint16_t h;
uint16_t w;
uint16_t h;
} nv3_size_16_t;
/* Generic 32-bit colour + 16-bit position */

View File

@@ -18,6 +18,9 @@
#pragma once
/* Core */
void nv3_render_15bpp(svga_t *svga);
void nv3_render_16bpp(svga_t *svga);
void nv3_render_32bpp(svga_t *svga);
void nv3_render_write_pixel(nv3_position_16_t position, uint32_t color, nv3_grobj_t grobj);
uint8_t nv3_render_read_pixel_8(nv3_position_16_t position, nv3_grobj_t grobj, bool use_destination);
uint16_t nv3_render_read_pixel_16(nv3_position_16_t position, nv3_grobj_t grobj, bool use_destination);

View File

@@ -121,6 +121,7 @@ typedef struct nv_base_s
bool memory_clock_enabled; // Memory Clock Enabled - stupid crap used to prevent us eanbling the timer multiple times
void* i2c; // I2C for monitor EDID
void* ddc; // Display Data Channel for EDID
uint32_t last_buffer_address; // Last buffer address.
} nv_base_t;
#define NV_REG_LIST_END 0xD15EA5E

View File

@@ -1194,8 +1194,8 @@ typedef struct nv3_pgraph_s
nv3_pgraph_dma_settings_t dma_settings;
uint8_t rop; // Current GDI Ternary Render Operation
// SURFACE STUFF - PGRAPH CAN OPERATE ON 4 SURFACES/BUFFERS AT A TIME
uint32_t boffset[NV3_PGRAPH_MAX_BUFFERS]; // 22-bit linear VRAM offset for the start of a surface.
uint16_t bpitch[NV3_PGRAPH_MAX_BUFFERS]; // 12-bit linear VRAM offset for the pitch of a surfac.e
uint32_t boffset[NV3_PGRAPH_MAX_BUFFERS]; // 22-bit linear VRAM offset for the start of a buffer.
uint16_t bpitch[NV3_PGRAPH_MAX_BUFFERS]; // 12-bit linear VRAM offset for the pitch of a buffer
uint32_t bpixel[NV3_PGRAPH_MAX_BUFFERS]; // Pixel format for each possible surfaces.
// CLIP
nv3_pgraph_clip_misc_settings_t clip_misc_settings;