diff --git a/.ci/AppImageBuilder.yml b/.ci/AppImageBuilder.yml index 1ef99d612..11a41394a 100644 --- a/.ci/AppImageBuilder.yml +++ b/.ci/AppImageBuilder.yml @@ -60,7 +60,6 @@ AppDir: - libslirp0 # if SLIRP_EXTERNAL:BOOL=ON - libsndio7.0 # if OPENAL:BOOL=ON - libvdeplug-dev # -dev also pulls in libvdeplug2. -dev is required to get the proper .so symlink to the library - - libwayland-client0 # if QT:BOOL=ON - libx11-6 # if QT:BOOL=ON - libx11-xcb1 # if QT:BOOL=ON - libxcb1 # if QT:BOOL=ON diff --git a/.ci/build.sh b/.ci/build.sh index e425cc65a..50d5a9d2b 100755 --- a/.ci/build.sh +++ b/.ci/build.sh @@ -24,8 +24,8 @@ # - For Windows (MSYS MinGW) builds: # - Packaging requires 7-Zip on Program Files # - Packaging the Ghostscript DLL requires 32-bit and/or 64-bit Ghostscript on Program Files -# - Packaging the FluidSynth DLL requires it to be at /home/86Box/dll32/libfluidsynth.dll -# and/or /home/86Box/dll64/libfluidsynth64.dll (for 32-bit and 64-bit builds respectively) +# - Packaging the XAudio2 DLL for FAudio requires it to be at /home/86Box/dll32/xaudio2*.dll +# and/or /home/86Box/dll64/xaudio2*.dll (for 32-bit and 64-bit builds respectively) # - For Linux builds: # - Only Debian and derivatives are supported # - dpkg and apt-get are called through sudo to manage dependencies; make sure those @@ -259,6 +259,7 @@ case $arch in esac [ ! -e "cmake/$toolchain.cmake" ] && toolchain=flags-gcc toolchain_file="cmake/$toolchain.cmake" +toolchain_file_libs= # Perform platform-specific setup. strip_binary=strip @@ -577,7 +578,7 @@ else pkgs="$pkgs build-essential" else # Add foreign architecture if required. - if ! dpkg --print-foreign-architectures | grep -Fx "$arch_deb" + if ! dpkg --print-foreign-architectures | grep -Fqx "$arch_deb" then sudo dpkg --add-architecture "$arch_deb" @@ -594,7 +595,7 @@ else # ...and the ones we do want listed. Non-dev packages fill missing spots on the list. libpkgs="" longest_libpkg=0 - for pkg in libc6-dev libstdc++6 libopenal-dev libfreetype6-dev libx11-dev libsdl2-dev libpng-dev librtmidi-dev qtdeclarative5-dev libwayland-dev libevdev-dev libxkbcommon-x11-dev libglib2.0-dev libslirp-dev libfaudio-dev libaudio-dev libjack-jackd2-dev libpipewire-0.3-dev libsamplerate0-dev libsndio-dev libvdeplug-dev + for pkg in libc6-dev libstdc++6 libopenal-dev libfreetype6-dev libx11-dev libsdl2-dev libpng-dev librtmidi-dev qtdeclarative5-dev libwayland-dev libevdev-dev libxkbcommon-x11-dev libglib2.0-dev libslirp-dev libfaudio-dev libaudio-dev libjack-jackd2-dev libpipewire-0.3-dev libsamplerate0-dev libsndio-dev libvdeplug-dev libfluidsynth-dev do libpkgs="$libpkgs $pkg:$arch_deb" length=$(echo -n $pkg | sed 's/-dev$//' | sed "s/qtdeclarative/qt/" | wc -c) @@ -615,10 +616,7 @@ else *) libdir="$arch_triplet";; esac - # Create CMake cross toolchain file. The file is saved on a fixed location for - # the library builds we do later, since running CMake again on a library we've - # already built before will *not* update its toolchain file path; therefore, we - # cannot point them to our working directory, which may change across builds. + # Create CMake cross toolchain file. toolchain_file_new="$cache_dir/toolchain.$arch_deb.cmake" cat << EOF > "$toolchain_file_new" set(CMAKE_SYSTEM_NAME Linux) @@ -646,6 +644,14 @@ EOF toolchain_file="$toolchain_file_new" strip_binary="$arch_triplet-strip" + # Create a separate toolchain file for library compilation without including + # our own toolchain files, letting libraries set their own C(XX)FLAGS instead. + # The file is saved on a fixed location, since running CMake again on a library + # we've already built before will *not* update its toolchain file path; therefore, + # we cannot point them to our working directory, which may change across builds. + toolchain_file_libs="$cache_dir/toolchain.$arch_deb.libs.cmake" + grep -Ev "^include\(" "$toolchain_file" > "$toolchain_file_libs" + # Install dependencies only if we're in a new build and/or architecture. if check_buildtag "$arch_deb" then @@ -804,8 +810,8 @@ then "$sevenzip" e -y -o"archive_tmp" "$discord_zip" "lib/$arch_discord/discord_game_sdk.dll" [ ! -e "archive_tmp/discord_game_sdk.dll" ] && echo [!] No Discord Game SDK for architecture [$arch_discord] - # Archive other DLLs from local directory. - cp -p "/home/$project/dll$arch/"* archive_tmp/ + # Archive XAudio2 DLL if required. + grep -q "OPENAL:BOOL=ON" build/CMakeCache.txt || cp -p "/home/$project/dll$arch/xaudio2"* archive_tmp/ # Archive executable, while also stripping it if requested. if [ $strip -ne 0 ] @@ -885,11 +891,6 @@ else cwd_root="$(pwd)" check_buildtag "libs.$arch_deb" - cp cmake/flags-gcc.cmake cmake/flags-gcc.cmake.old - sed -i -e 's/ -Werror=.*\([" ]\)/\1/g' cmake/flags-gcc.cmake # temporary hack for -Werror=old-style-definition non-compliance on FluidSynth and SDL2 - sed -i -e 's/ C;CXX/ IGNORED/' cmake/flags-gcc.cmake # workaround for dynamic c(xx)flags system overwriting library flags and breaking (at least) openal-soft - sed -i -e 's/_INIT / /g' cmake/flags-gcc.cmake # still append our own flags - if grep -q "OPENAL:BOOL=ON" build/CMakeCache.txt then # Build openal-soft 1.23.1 manually to fix audio issues. This is a temporary @@ -906,7 +907,7 @@ else sed -i -e 's/PW_KEY_CONFIG_NAME/"config.name"/g' "$prefix/alc/backends/pipewire.cpp" prefix_build="$prefix/build-$arch_deb" - cmake -G Ninja -D "CMAKE_TOOLCHAIN_FILE=$toolchain_file" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" -S "$prefix" -B "$prefix_build" || exit 99 + cmake -G Ninja -D "CMAKE_TOOLCHAIN_FILE=$toolchain_file_libs" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" -S "$prefix" -B "$prefix_build" || exit 99 cmake --build "$prefix_build" -j$(nproc) || exit 99 cmake --install "$prefix_build" || exit 99 @@ -922,7 +923,7 @@ else wget -qO - https://github.com/FNA-XNA/FAudio/archive/refs/tags/22.03.tar.gz | tar zxf - -C "$cache_dir" || rm -rf "$prefix" fi prefix_build="$prefix/build-$arch_deb" - cmake -G Ninja -D "CMAKE_TOOLCHAIN_FILE=$toolchain_file" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" -S "$prefix" -B "$prefix_build" || exit 99 + cmake -G Ninja -D "CMAKE_TOOLCHAIN_FILE=$toolchain_file_libs" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" -S "$prefix" -B "$prefix_build" || exit 99 cmake --build "$prefix_build" -j$(nproc) || exit 99 cmake --install "$prefix_build" || exit 99 @@ -943,7 +944,7 @@ else wget -qO - https://github.com/thestk/rtmidi/archive/refs/tags/4.0.0.tar.gz | tar zxf - -C "$cache_dir" || rm -rf "$prefix" fi prefix_build="$prefix/build-$arch_deb" - cmake -G Ninja -D RTMIDI_API_JACK=OFF -D "CMAKE_TOOLCHAIN_FILE=$toolchain_file" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" -S "$prefix" -B "$prefix_build" || exit 99 + cmake -G Ninja -D RTMIDI_API_JACK=OFF -D "CMAKE_TOOLCHAIN_FILE=$toolchain_file_libs" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" -S "$prefix" -B "$prefix_build" || exit 99 cmake --build "$prefix_build" -j$(nproc) || exit 99 cmake --install "$prefix_build" || exit 99 @@ -957,7 +958,7 @@ else fi prefix_build="$prefix/build-$arch_deb" cmake -G Ninja -D enable-dbus=OFF -D enable-jack=OFF -D enable-oss=OFF -D enable-sdl2=OFF -D enable-pulseaudio=OFF -D enable-pipewire=OFF -D enable-alsa=OFF \ - -D "CMAKE_TOOLCHAIN_FILE=$toolchain_file" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" \ + -D "CMAKE_TOOLCHAIN_FILE=$toolchain_file_libs" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" \ -S "$prefix" -B "$prefix_build" || exit 99 cmake --build "$prefix_build" -j$(nproc) || exit 99 cmake --install "$prefix_build" || exit 99 @@ -988,12 +989,19 @@ else -D SDL_ATOMIC=OFF -D SDL_EVENTS=ON -D SDL_HAPTIC=OFF -D SDL_POWER=OFF -D SDL_THREADS=ON -D SDL_TIMERS=ON -D SDL_FILE=OFF \ -D SDL_LOADSO=ON -D SDL_CPUINFO=ON -D SDL_FILESYSTEM=$sdl_ui -D SDL_DLOPEN=OFF -D SDL_SENSOR=OFF -D SDL_LOCALE=OFF \ \ - -D "CMAKE_TOOLCHAIN_FILE=$toolchain_file" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" \ + -D "CMAKE_TOOLCHAIN_FILE=$toolchain_file_libs" -D "CMAKE_INSTALL_PREFIX=$cwd_root/archive_tmp/usr" \ -S "$prefix" -B "$prefix_build" || exit 99 cmake --build "$prefix_build" -j$(nproc) || exit 99 cmake --install "$prefix_build" || exit 99 - mv cmake/flags-gcc.cmake.old cmake/flags-gcc.cmake + # We rely on the host to provide Vulkan libs to sidestep any potential + # dependency issues. While Qt expects libvulkan.so, at least Debian only + # ships libvulkan.so.1 without a symlink, so make our own as a workaround. + # The relative paths prevent appimage-builder from flattening the links. + mkdir -p "archive_tmp/usr/lib/$libdir" + relroot="../../../../../../../../../../../../../../../../../../../../../../../../../../../../.." + ln -s "$relroot/usr/lib/libvulkan.so.1" "archive_tmp/usr/lib/libvulkan.so" + ln -s "$relroot/usr/lib/$libdir/libvulkan.so.1" "archive_tmp/usr/lib/$libdir/libvulkan.so" # Archive Discord Game SDK library. 7z e -y -o"archive_tmp/usr/lib" "$discord_zip" "lib/$arch_discord/discord_game_sdk.so" diff --git a/.ci/dependencies_macports.txt b/.ci/dependencies_macports.txt index e78d4a6da..5ec71d07c 100644 --- a/.ci/dependencies_macports.txt +++ b/.ci/dependencies_macports.txt @@ -13,4 +13,5 @@ qt5 wget fluidsynth ghostscript +libslirp vde2 diff --git a/.ci/dependencies_msys.txt b/.ci/dependencies_msys.txt index df4932352..1b9ccdcc8 100644 --- a/.ci/dependencies_msys.txt +++ b/.ci/dependencies_msys.txt @@ -8,5 +8,6 @@ SDL2 zlib libpng rtmidi +libslirp qt5-static qt5-translations diff --git a/.github/workflows/cmake.yml b/.github/workflows/cmake.yml index 49ea8c890..20c42a713 100644 --- a/.github/workflows/cmake.yml +++ b/.github/workflows/cmake.yml @@ -104,6 +104,7 @@ jobs: libpng:p openal:p rtmidi:p + libslirp:p libvncserver:p ${{ matrix.ui.packages }} @@ -329,6 +330,7 @@ jobs: librtmidi-dev libopenal-dev libvncserver-dev + libslirp-dev ${{ matrix.ui.packages }} - name: Checkout repository diff --git a/.github/workflows/codeql.yml b/.github/workflows/codeql.yml index 107755af6..b9f38b29d 100644 --- a/.github/workflows/codeql.yml +++ b/.github/workflows/codeql.yml @@ -107,6 +107,7 @@ jobs: libpng:p openal:p rtmidi:p + libslirp:p libvncserver:p ${{ matrix.ui.packages }} @@ -191,6 +192,7 @@ jobs: libc6-dev librtmidi-dev libopenal-dev + libslirp-dev libvncserver-dev ${{ matrix.ui.packages }} diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md new file mode 100644 index 000000000..4f4f32b2e --- /dev/null +++ b/CONTRIBUTING.md @@ -0,0 +1,13 @@ +# Contribution guidelines +The 86Box project welcomes contributions from anyone, as long as some basic guidelines are followed. + +## Emulated hardware +In order to accept new emulated hardware, the following criteria must be met: + +* A ROM must be available and be added to [our ROM repository](https://github.com/86Box/roms) +* Documentation must be available or it must be feasible to reverse engineer with a reasonable amount of time and effort +* It must be feasible to implement with a reasonable amount of time and effort +* It has to fall inside the project's scope + +## Questions +If you're unsure about any aspect of contributing, don't hesitate to get in touch via any of our official communities linked in our [readme](README.md#community) or [GitHub Discussions](https://github.com/86Box/86Box/discussions). diff --git a/README.md b/README.md index e251356ed..fb35f0218 100644 --- a/README.md +++ b/README.md @@ -45,6 +45,10 @@ We operate an IRC channel and a Discord server for discussing 86Box, its develop [![Visit our Discord server](https://discordapp.com/api/guilds/262614059009048590/embed.png)](https://discord.gg/QXK9XTv) +Contributions +--------- +We welcome all contributions to the project, as long as the [contribution guidelines](CONTRIBUTING.md) are followed. + Licensing --------- 86Box is released under the [GNU General Public License, version 2](https://www.gnu.org/licenses/old-licenses/gpl-2.0.html) or later. For more information, see the `COPYING` file in the root of the repository. diff --git a/src/86box.c b/src/86box.c index e2541f55d..8db2fc75a 100644 --- a/src/86box.c +++ b/src/86box.c @@ -208,16 +208,20 @@ char exe_path[2048]; /* path (dir) of executable */ char usr_path[1024]; /* path (dir) of user data */ char cfg_path[1024]; /* full path of config file */ FILE *stdlog = NULL; /* file to log output to */ -// int scrnsz_x = SCREEN_RES_X; /* current screen size, X */ -// int scrnsz_y = SCREEN_RES_Y; /* current screen size, Y */ +#if 0 +int scrnsz_x = SCREEN_RES_X; /* current screen size, X */ +int scrnsz_y = SCREEN_RES_Y; /* current screen size, Y */ +#endif int config_changed; /* config has changed */ int title_update; int framecountx = 0; int hard_reset_pending = 0; -// int unscaled_size_x = SCREEN_RES_X; /* current unscaled size X */ -// int unscaled_size_y = SCREEN_RES_Y; /* current unscaled size Y */ -// int efscrnsz_y = SCREEN_RES_Y; +#if 0 +int unscaled_size_x = SCREEN_RES_X; /* current unscaled size X */ +int unscaled_size_y = SCREEN_RES_Y; /* current unscaled size Y */ +int efscrnsz_y = SCREEN_RES_Y; +#endif static wchar_t mouse_msg[3][200]; @@ -416,7 +420,6 @@ pc_init(int argc, char *argv[]) time_t now; int c; int lvmp = 0; - int i; #ifdef ENABLE_NG int ng = 0; #endif @@ -467,7 +470,7 @@ pc_init(int argc, char *argv[]) if (!strcasecmp(argv[c], "--help") || !strcasecmp(argv[c], "-?")) { usage: - for (i = 0; i < FDD_NUM; i++) { + for (uint8_t i = 0; i < FDD_NUM; i++) { if (fn[i] != NULL) { free(fn[i]); fn[i] = NULL; @@ -776,7 +779,7 @@ usage: /* Load the configuration file. */ config_load(); - for (i = 0; i < FDD_NUM; i++) { + for (uint8_t i = 0; i < FDD_NUM; i++) { if (fn[i] != NULL) { if (strlen(fn[i]) <= 511) strncpy(floppyfns[i], fn[i], 511); @@ -1272,7 +1275,9 @@ pc_run(void) #ifdef USE_GDBSTUB /* avoid a KBC FIFO overflow when CPU emulation is stalled */ // if (gdbstub_step == GDBSTUB_EXEC) #endif - // mouse_process(); +#if 0 + mouse_process(); +#endif joystick_process(); endblit(); @@ -1413,6 +1418,9 @@ set_screen_size_monitor(int x, int y, int monitor_index) monitors[monitor_index].mon_scrnsz_x = (monitors[monitor_index].mon_unscaled_size_x << 3); monitors[monitor_index].mon_scrnsz_y = (monitors[monitor_index].mon_unscaled_size_y << 3); break; + + default: + break; } plat_resize_request(monitors[monitor_index].mon_scrnsz_x, monitors[monitor_index].mon_scrnsz_y, monitor_index); @@ -1433,14 +1441,14 @@ reset_screen_size_monitor(int monitor_index) void reset_screen_size(void) { - for (int i = 0; i < MONITORS_NUM; i++) + for (uint8_t i = 0; i < MONITORS_NUM; i++) set_screen_size(monitors[i].mon_unscaled_size_x, monitors[i].mon_efscrnsz_y); } void set_screen_size_natural(void) { - for (int i = 0; i < MONITORS_NUM; i++) + for (uint8_t i = 0; i < MONITORS_NUM; i++) set_screen_size(monitors[i].mon_unscaled_size_x, monitors[i].mon_unscaled_size_y); } diff --git a/src/acpi.c b/src/acpi.c index 539da644b..495419f4e 100644 --- a/src/acpi.c +++ b/src/acpi.c @@ -169,9 +169,9 @@ acpi_raise_smi(void *priv, int do_smi) } static uint32_t -acpi_reg_read_common_regs(int size, uint16_t addr, void *p) +acpi_reg_read_common_regs(UNUSED(int size), uint16_t addr, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; uint32_t ret = 0x00000000; int shift16; int shift32; @@ -211,6 +211,9 @@ acpi_reg_read_common_regs(int size, uint16_t addr, void *p) update_tsc(); #endif break; + + default: + break; } #ifdef ENABLE_ACPI_LOG @@ -221,9 +224,9 @@ acpi_reg_read_common_regs(int size, uint16_t addr, void *p) } static uint32_t -acpi_reg_read_ali(int size, uint16_t addr, void *p) +acpi_reg_read_ali(int size, uint16_t addr, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; uint32_t ret = 0x00000000; int shift16; int shift32; @@ -277,7 +280,7 @@ acpi_reg_read_ali(int size, uint16_t addr, void *p) ret = dev->regs.pmcntrl; break; default: - ret = acpi_reg_read_common_regs(size, addr, p); + ret = acpi_reg_read_common_regs(size, addr, priv); break; } @@ -289,9 +292,9 @@ acpi_reg_read_ali(int size, uint16_t addr, void *p) } static uint32_t -acpi_reg_read_intel(int size, uint16_t addr, void *p) +acpi_reg_read_intel(int size, uint16_t addr, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; uint32_t ret = 0x00000000; int shift16; int shift32; @@ -374,7 +377,7 @@ acpi_reg_read_intel(int size, uint16_t addr, void *p) ret = dev->regs.gporeg[addr & 3]; break; default: - ret = acpi_reg_read_common_regs(size, addr, p); + ret = acpi_reg_read_common_regs(size, addr, priv); break; } @@ -386,9 +389,9 @@ acpi_reg_read_intel(int size, uint16_t addr, void *p) } static uint32_t -acpi_reg_read_via_common(int size, uint16_t addr, void *p) +acpi_reg_read_via_common(int size, uint16_t addr, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; uint32_t ret = 0x00000000; int shift16; int shift32; @@ -470,7 +473,7 @@ acpi_reg_read_via_common(int size, uint16_t addr, void *p) ret = (dev->regs.gptren >> shift32) & 0xff; break; default: - ret = acpi_reg_read_common_regs(size, addr, p); + ret = acpi_reg_read_common_regs(size, addr, priv); break; } @@ -482,9 +485,9 @@ acpi_reg_read_via_common(int size, uint16_t addr, void *p) } static uint32_t -acpi_reg_read_via(int size, uint16_t addr, void *p) +acpi_reg_read_via(int size, uint16_t addr, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; uint32_t ret = 0x00000000; int shift16; @@ -527,7 +530,7 @@ acpi_reg_read_via(int size, uint16_t addr, void *p) ret = (dev->regs.gpi_val >> shift16) & 0xff; break; default: - ret = acpi_reg_read_via_common(size, addr, p); + ret = acpi_reg_read_via_common(size, addr, priv); break; } @@ -539,9 +542,9 @@ acpi_reg_read_via(int size, uint16_t addr, void *p) } static uint32_t -acpi_reg_read_via_596b(int size, uint16_t addr, void *p) +acpi_reg_read_via_596b(int size, uint16_t addr, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; uint32_t ret = 0x00000000; int shift16; int shift32; @@ -577,7 +580,7 @@ acpi_reg_read_via_596b(int size, uint16_t addr, void *p) ret = (dev->regs.gpo_val >> shift32) & 0xff; break; default: - ret = acpi_reg_read_via_common(size, addr, p); + ret = acpi_reg_read_via_common(size, addr, priv); break; } @@ -589,13 +592,13 @@ acpi_reg_read_via_596b(int size, uint16_t addr, void *p) } static uint32_t -acpi_reg_read_smc(int size, uint16_t addr, void *p) +acpi_reg_read_smc(int size, uint16_t addr, void *priv) { uint32_t ret = 0x00000000; addr &= 0x0f; - ret = acpi_reg_read_common_regs(size, addr, p); + ret = acpi_reg_read_common_regs(size, addr, priv); #ifdef ENABLE_ACPI_LOG if (size != 1) @@ -605,9 +608,9 @@ acpi_reg_read_smc(int size, uint16_t addr, void *p) } static uint32_t -acpi_aux_reg_read_smc(int size, uint16_t addr, void *p) +acpi_aux_reg_read_smc(UNUSED(int size), uint16_t addr, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; uint32_t ret = 0x00000000; int shift16; @@ -638,6 +641,9 @@ acpi_aux_reg_read_smc(int size, uint16_t addr, void *p) /* Miscellaneous Control Register */ ret = dev->regs.glbctl & 0xff; break; + + default: + break; } acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret); @@ -645,9 +651,9 @@ acpi_aux_reg_read_smc(int size, uint16_t addr, void *p) } static void -acpi_reg_write_common_regs(int size, uint16_t addr, uint8_t val, void *p) +acpi_reg_write_common_regs(UNUSED(int size), uint16_t addr, uint8_t val, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; int shift16; int sus_typ; @@ -719,13 +725,16 @@ acpi_reg_write_common_regs(int size, uint16_t addr, uint8_t val, void *p) } dev->regs.pmcntrl = ((dev->regs.pmcntrl & ~(0xff << shift16)) | (val << shift16)) & 0x3f07 /* 0x3c07 */; break; + + default: + break; } } static void -acpi_reg_write_ali(int size, uint16_t addr, uint8_t val, void *p) +acpi_reg_write_ali(int size, uint16_t addr, uint8_t val, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; int shift16; int shift32; @@ -782,7 +791,7 @@ acpi_reg_write_ali(int size, uint16_t addr, uint8_t val, void *p) dev->regs.pmcntrl = val & 1; break; default: - acpi_reg_write_common_regs(size, addr, val, p); + acpi_reg_write_common_regs(size, addr, val, priv); /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */ if ((addr == 0x00) && !(dev->regs.pmsts & 0x20)) dev->regs.gpcntrl &= ~0x0002; @@ -795,9 +804,9 @@ acpi_reg_write_ali(int size, uint16_t addr, uint8_t val, void *p) } static void -acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *p) +acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; int shift16; int shift32; @@ -878,7 +887,7 @@ acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *p) dev->regs.gporeg[addr & 3] = val; break; default: - acpi_reg_write_common_regs(size, addr, val, p); + acpi_reg_write_common_regs(size, addr, val, priv); /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */ if ((addr == 0x00) && !(dev->regs.pmsts & 0x20)) dev->regs.glbctl &= ~0x0002; @@ -892,9 +901,9 @@ acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *p) } static void -acpi_reg_write_via_common(int size, uint16_t addr, uint8_t val, void *p) +acpi_reg_write_via_common(int size, uint16_t addr, uint8_t val, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; int shift16; int shift32; @@ -965,7 +974,7 @@ acpi_reg_write_via_common(int size, uint16_t addr, uint8_t val, void *p) dev->regs.gptren = ((dev->regs.gptren & ~(0xff << shift32)) | (val << shift32)) & 0x000000d9; break; default: - acpi_reg_write_common_regs(size, addr, val, p); + acpi_reg_write_common_regs(size, addr, val, priv); /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */ if ((addr == 0x00) && !(dev->regs.pmsts & 0x20)) dev->regs.glbctl &= ~0x0002; @@ -986,9 +995,9 @@ acpi_i2c_set(acpi_t *dev) } static void -acpi_reg_write_via(int size, uint16_t addr, uint8_t val, void *p) +acpi_reg_write_via(int size, uint16_t addr, uint8_t val, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; int shift16; int shift32; @@ -1044,15 +1053,15 @@ acpi_reg_write_via(int size, uint16_t addr, uint8_t val, void *p) dev->regs.gpo_val = ((dev->regs.gpo_val & ~(0xff << shift16)) | (val << shift16)) & 0xffff; break; default: - acpi_reg_write_via_common(size, addr, val, p); + acpi_reg_write_via_common(size, addr, val, priv); break; } } static void -acpi_reg_write_via_596b(int size, uint16_t addr, uint8_t val, void *p) +acpi_reg_write_via_596b(int size, uint16_t addr, uint8_t val, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; int shift16; int shift32; @@ -1102,20 +1111,20 @@ acpi_reg_write_via_596b(int size, uint16_t addr, uint8_t val, void *p) dev->regs.gpo_val = ((dev->regs.gpo_val & ~(0xff << shift32)) | (val << shift32)) & 0x7fffffff; break; default: - acpi_reg_write_via_common(size, addr, val, p); + acpi_reg_write_via_common(size, addr, val, priv); break; } } static void -acpi_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p) +acpi_reg_write_smc(int size, uint16_t addr, uint8_t val, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; addr &= 0x0f; acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val); - acpi_reg_write_common_regs(size, addr, val, p); + acpi_reg_write_common_regs(size, addr, val, priv); /* Setting GBL_RLS also sets BIOS_STS and generates SMI. */ if ((addr == 0x00) && !(dev->regs.pmsts & 0x20)) dev->regs.glbctl &= ~0x0001; @@ -1127,9 +1136,9 @@ acpi_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p) } static void -acpi_aux_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p) +acpi_aux_reg_write_smc(UNUSED(int size), uint16_t addr, uint8_t val, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; int shift16; addr &= 0x07; @@ -1171,76 +1180,79 @@ acpi_aux_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p) acpi_update_irq(dev); } break; + + default: + break; } } static uint32_t -acpi_reg_read_common(int size, uint16_t addr, void *p) +acpi_reg_read_common(int size, uint16_t addr, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; uint8_t ret = 0xff; if (dev->vendor == VEN_ALI) - ret = acpi_reg_read_ali(size, addr, p); + ret = acpi_reg_read_ali(size, addr, priv); else if (dev->vendor == VEN_VIA) - ret = acpi_reg_read_via(size, addr, p); + ret = acpi_reg_read_via(size, addr, priv); else if (dev->vendor == VEN_VIA_596B) - ret = acpi_reg_read_via_596b(size, addr, p); + ret = acpi_reg_read_via_596b(size, addr, priv); else if (dev->vendor == VEN_INTEL) - ret = acpi_reg_read_intel(size, addr, p); + ret = acpi_reg_read_intel(size, addr, priv); else if (dev->vendor == VEN_SMC) - ret = acpi_reg_read_smc(size, addr, p); + ret = acpi_reg_read_smc(size, addr, priv); return ret; } static void -acpi_reg_write_common(int size, uint16_t addr, uint8_t val, void *p) +acpi_reg_write_common(int size, uint16_t addr, uint8_t val, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; if (dev->vendor == VEN_ALI) - acpi_reg_write_ali(size, addr, val, p); + acpi_reg_write_ali(size, addr, val, priv); else if (dev->vendor == VEN_VIA) - acpi_reg_write_via(size, addr, val, p); + acpi_reg_write_via(size, addr, val, priv); else if (dev->vendor == VEN_VIA_596B) - acpi_reg_write_via_596b(size, addr, val, p); + acpi_reg_write_via_596b(size, addr, val, priv); else if (dev->vendor == VEN_INTEL) - acpi_reg_write_intel(size, addr, val, p); + acpi_reg_write_intel(size, addr, val, priv); else if (dev->vendor == VEN_SMC) - acpi_reg_write_smc(size, addr, val, p); + acpi_reg_write_smc(size, addr, val, priv); } static uint32_t -acpi_aux_reg_read_common(int size, uint16_t addr, void *p) +acpi_aux_reg_read_common(int size, uint16_t addr, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; uint8_t ret = 0xff; if (dev->vendor == VEN_SMC) - ret = acpi_aux_reg_read_smc(size, addr, p); + ret = acpi_aux_reg_read_smc(size, addr, priv); return ret; } static void -acpi_aux_reg_write_common(int size, uint16_t addr, uint8_t val, void *p) +acpi_aux_reg_write_common(int size, uint16_t addr, uint8_t val, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; if (dev->vendor == VEN_SMC) - acpi_aux_reg_write_smc(size, addr, val, p); + acpi_aux_reg_write_smc(size, addr, val, priv); } static uint32_t -acpi_reg_readl(uint16_t addr, void *p) +acpi_reg_readl(uint16_t addr, void *priv) { uint32_t ret = 0x00000000; - ret = acpi_reg_read_common(4, addr, p); - ret |= (acpi_reg_read_common(4, addr + 1, p) << 8); - ret |= (acpi_reg_read_common(4, addr + 2, p) << 16); - ret |= (acpi_reg_read_common(4, addr + 3, p) << 24); + ret = acpi_reg_read_common(4, addr, priv); + ret |= (acpi_reg_read_common(4, addr + 1, priv) << 8); + ret |= (acpi_reg_read_common(4, addr + 2, priv) << 16); + ret |= (acpi_reg_read_common(4, addr + 3, priv) << 24); acpi_log("ACPI: Read L %08X from %04X\n", ret, addr); @@ -1248,12 +1260,12 @@ acpi_reg_readl(uint16_t addr, void *p) } static uint16_t -acpi_reg_readw(uint16_t addr, void *p) +acpi_reg_readw(uint16_t addr, void *priv) { uint16_t ret = 0x0000; - ret = acpi_reg_read_common(2, addr, p); - ret |= (acpi_reg_read_common(2, addr + 1, p) << 8); + ret = acpi_reg_read_common(2, addr, priv); + ret |= (acpi_reg_read_common(2, addr + 1, priv) << 8); acpi_log("ACPI: Read W %08X from %04X\n", ret, addr); @@ -1261,11 +1273,11 @@ acpi_reg_readw(uint16_t addr, void *p) } static uint8_t -acpi_reg_read(uint16_t addr, void *p) +acpi_reg_read(uint16_t addr, void *priv) { uint8_t ret = 0x00; - ret = acpi_reg_read_common(1, addr, p); + ret = acpi_reg_read_common(1, addr, priv); acpi_log("ACPI: Read B %02X from %04X\n", ret, addr); @@ -1273,14 +1285,14 @@ acpi_reg_read(uint16_t addr, void *p) } static uint32_t -acpi_aux_reg_readl(uint16_t addr, void *p) +acpi_aux_reg_readl(uint16_t addr, void *priv) { uint32_t ret = 0x00000000; - ret = acpi_aux_reg_read_common(4, addr, p); - ret |= (acpi_aux_reg_read_common(4, addr + 1, p) << 8); - ret |= (acpi_aux_reg_read_common(4, addr + 2, p) << 16); - ret |= (acpi_aux_reg_read_common(4, addr + 3, p) << 24); + ret = acpi_aux_reg_read_common(4, addr, priv); + ret |= (acpi_aux_reg_read_common(4, addr + 1, priv) << 8); + ret |= (acpi_aux_reg_read_common(4, addr + 2, priv) << 16); + ret |= (acpi_aux_reg_read_common(4, addr + 3, priv) << 24); acpi_log("ACPI: Read Aux L %08X from %04X\n", ret, addr); @@ -1288,12 +1300,12 @@ acpi_aux_reg_readl(uint16_t addr, void *p) } static uint16_t -acpi_aux_reg_readw(uint16_t addr, void *p) +acpi_aux_reg_readw(uint16_t addr, void *priv) { uint16_t ret = 0x0000; - ret = acpi_aux_reg_read_common(2, addr, p); - ret |= (acpi_aux_reg_read_common(2, addr + 1, p) << 8); + ret = acpi_aux_reg_read_common(2, addr, priv); + ret |= (acpi_aux_reg_read_common(2, addr + 1, priv) << 8); acpi_log("ACPI: Read Aux W %04X from %04X\n", ret, addr); @@ -1301,11 +1313,11 @@ acpi_aux_reg_readw(uint16_t addr, void *p) } static uint8_t -acpi_aux_reg_read(uint16_t addr, void *p) +acpi_aux_reg_read(uint16_t addr, void *priv) { uint8_t ret = 0x00; - ret = acpi_aux_reg_read_common(1, addr, p); + ret = acpi_aux_reg_read_common(1, addr, priv); acpi_log("ACPI: Read Aux B %02X from %04X\n", ret, addr); @@ -1313,59 +1325,59 @@ acpi_aux_reg_read(uint16_t addr, void *p) } static void -acpi_reg_writel(uint16_t addr, uint32_t val, void *p) +acpi_reg_writel(uint16_t addr, uint32_t val, void *priv) { acpi_log("ACPI: Write L %08X to %04X\n", val, addr); - acpi_reg_write_common(4, addr, val & 0xff, p); - acpi_reg_write_common(4, addr + 1, (val >> 8) & 0xff, p); - acpi_reg_write_common(4, addr + 2, (val >> 16) & 0xff, p); - acpi_reg_write_common(4, addr + 3, (val >> 24) & 0xff, p); + acpi_reg_write_common(4, addr, val & 0xff, priv); + acpi_reg_write_common(4, addr + 1, (val >> 8) & 0xff, priv); + acpi_reg_write_common(4, addr + 2, (val >> 16) & 0xff, priv); + acpi_reg_write_common(4, addr + 3, (val >> 24) & 0xff, priv); } static void -acpi_reg_writew(uint16_t addr, uint16_t val, void *p) +acpi_reg_writew(uint16_t addr, uint16_t val, void *priv) { acpi_log("ACPI: Write W %04X to %04X\n", val, addr); - acpi_reg_write_common(2, addr, val & 0xff, p); - acpi_reg_write_common(2, addr + 1, (val >> 8) & 0xff, p); + acpi_reg_write_common(2, addr, val & 0xff, priv); + acpi_reg_write_common(2, addr + 1, (val >> 8) & 0xff, priv); } static void -acpi_reg_write(uint16_t addr, uint8_t val, void *p) +acpi_reg_write(uint16_t addr, uint8_t val, void *priv) { acpi_log("ACPI: Write B %02X to %04X\n", val, addr); - acpi_reg_write_common(1, addr, val, p); + acpi_reg_write_common(1, addr, val, priv); } static void -acpi_aux_reg_writel(uint16_t addr, uint32_t val, void *p) +acpi_aux_reg_writel(uint16_t addr, uint32_t val, void *priv) { acpi_log("ACPI: Write Aux L %08X to %04X\n", val, addr); - acpi_aux_reg_write_common(4, addr, val & 0xff, p); - acpi_aux_reg_write_common(4, addr + 1, (val >> 8) & 0xff, p); - acpi_aux_reg_write_common(4, addr + 2, (val >> 16) & 0xff, p); - acpi_aux_reg_write_common(4, addr + 3, (val >> 24) & 0xff, p); + acpi_aux_reg_write_common(4, addr, val & 0xff, priv); + acpi_aux_reg_write_common(4, addr + 1, (val >> 8) & 0xff, priv); + acpi_aux_reg_write_common(4, addr + 2, (val >> 16) & 0xff, priv); + acpi_aux_reg_write_common(4, addr + 3, (val >> 24) & 0xff, priv); } static void -acpi_aux_reg_writew(uint16_t addr, uint16_t val, void *p) +acpi_aux_reg_writew(uint16_t addr, uint16_t val, void *priv) { acpi_log("ACPI: Write Aux W %04X to %04X\n", val, addr); - acpi_aux_reg_write_common(2, addr, val & 0xff, p); - acpi_aux_reg_write_common(2, addr + 1, (val >> 8) & 0xff, p); + acpi_aux_reg_write_common(2, addr, val & 0xff, priv); + acpi_aux_reg_write_common(2, addr + 1, (val >> 8) & 0xff, priv); } static void -acpi_aux_reg_write(uint16_t addr, uint8_t val, void *p) +acpi_aux_reg_write(uint16_t addr, uint8_t val, void *priv) { acpi_log("ACPI: Write Aux B %02X to %04X\n", val, addr); - acpi_aux_reg_write_common(1, addr, val, p); + acpi_aux_reg_write_common(1, addr, val, priv); } void @@ -1374,9 +1386,9 @@ acpi_update_io_mapping(acpi_t *dev, uint32_t base, int chipset_en) int size; switch (dev->vendor) { + default: case VEN_ALI: case VEN_INTEL: - default: size = 0x040; break; case VEN_SMC: @@ -1545,9 +1557,9 @@ acpi_pwrbtn_timer(void *priv) } static void -acpi_apm_out(uint16_t port, uint8_t val, void *p) +acpi_apm_out(uint16_t port, uint8_t val, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; acpi_log("[%04X:%08X] APM write: %04X = %02X (AX = %04X, BX = %04X, CX = %04X)\n", CS, cpu_state.pc, port, val, AX, BX, CX); @@ -1557,7 +1569,9 @@ acpi_apm_out(uint16_t port, uint8_t val, void *p) if (port == 0x0001) { acpi_log("ALi SOFT SMI# status set (%i)\n", dev->apm->do_smi); dev->apm->cmd = val; - // acpi_raise_smi(dev, dev->apm->do_smi); +#if 0 + acpi_raise_smi(dev, dev->apm->do_smi); +#endif if (dev->apm->do_smi) smi_raise(); dev->regs.ali_soft_smi = 1; @@ -1575,9 +1589,9 @@ acpi_apm_out(uint16_t port, uint8_t val, void *p) } static uint8_t -acpi_apm_in(uint16_t port, void *p) +acpi_apm_in(uint16_t port, void *priv) { - acpi_t *dev = (acpi_t *) p; + acpi_t *dev = (acpi_t *) priv; uint8_t ret = 0xff; port &= 0x0001; @@ -1731,6 +1745,9 @@ acpi_init(const device_t *info) dev->suspend_types[3] = SUS_SUSPEND | SUS_RESET_CACHE; dev->suspend_types[4] = SUS_SUSPEND; break; + + default: + break; } timer_add(&dev->timer, acpi_timer_overflow, dev, 0); diff --git a/src/apm.c b/src/apm.c index 76fc24257..8ea3f435d 100644 --- a/src/apm.c +++ b/src/apm.c @@ -52,9 +52,9 @@ apm_set_do_smi(apm_t *dev, uint8_t do_smi) } static void -apm_out(uint16_t port, uint8_t val, void *p) +apm_out(uint16_t port, uint8_t val, void *priv) { - apm_t *dev = (apm_t *) p; + apm_t *dev = (apm_t *) priv; apm_log("[%04X:%08X] APM write: %04X = %02X (BX = %04X, CX = %04X)\n", CS, cpu_state.pc, port, val, BX, CX); @@ -69,9 +69,9 @@ apm_out(uint16_t port, uint8_t val, void *p) } static uint8_t -apm_in(uint16_t port, void *p) +apm_in(uint16_t port, void *priv) { - apm_t *dev = (apm_t *) p; + apm_t *dev = (apm_t *) priv; uint8_t ret = 0xff; port &= 0x0001; @@ -87,17 +87,17 @@ apm_in(uint16_t port, void *p) } static void -apm_reset(void *p) +apm_reset(void *priv) { - apm_t *dev = (apm_t *) p; + apm_t *dev = (apm_t *) priv; dev->cmd = dev->stat = 0x00; } static void -apm_close(void *p) +apm_close(void *priv) { - apm_t *dev = (apm_t *) p; + apm_t *dev = (apm_t *) priv; free(dev); } diff --git a/src/cdrom/cdrom.c b/src/cdrom/cdrom.c index 37128fbcc..d7cd6f734 100644 --- a/src/cdrom/cdrom.c +++ b/src/cdrom/cdrom.c @@ -422,6 +422,8 @@ cdrom_seek(cdrom_t *dev, uint32_t pos, uint8_t vendor_type) case 0x80: pos = bcd2bin((pos >> 24) & 0xff); break; + default: + break; } dev->seek_pos = pos; @@ -611,6 +613,8 @@ cdrom_audio_track_search(cdrom_t *dev, uint32_t pos, int type, uint8_t playbit) } dev->seek_pos = (pos >> 24) & 0xff; break; + default: + break; } /* Unlike standard commands, if there's a data track on an Audio CD (mixed mode) @@ -652,6 +656,8 @@ cdrom_audio_play_toshiba(cdrom_t *dev, uint32_t pos, int type) } dev->cd_end = pos; break; + default: + break; } cdrom_log("Toshiba/NEC Play Audio: MSF = %06x, type = %02x, cdstatus = %02x\n", pos, type, dev->cd_status); @@ -698,6 +704,8 @@ cdrom_audio_scan(cdrom_t *dev, uint32_t pos, int type) case 0x80: dev->seek_pos = (pos >> 24) & 0xff; break; + default: + break; } /* Do this at this point, since it's at this point that we know the @@ -1331,13 +1339,15 @@ cdrom_read_disc_info_toc(cdrom_t *dev, unsigned char *b, unsigned char track, in b[2] = 0; b[3] = 0; break; + default: + break; } return 1; } static int -track_type_is_valid(uint8_t id, int type, int flags, int audio, int mode2) +track_type_is_valid(UNUSED(uint8_t id), int type, int flags, int audio, int mode2) { if (!(flags & 0x70) && (flags & 0xf8)) { /* 0x08/0x80/0x88 are illegal modes */ cdrom_log("CD-ROM %i: [Any Mode] 0x08/0x80/0x88 are illegal modes\n", id); diff --git a/src/cdrom/cdrom_image_backend.c b/src/cdrom/cdrom_image_backend.c index 5d8294213..7dae28bf4 100644 --- a/src/cdrom/cdrom_image_backend.c +++ b/src/cdrom/cdrom_image_backend.c @@ -283,7 +283,7 @@ cdi_get_audio_track_pre(cd_img_t *cdi, int track) /* This replaces both Info and EndInfo, they are specified by a variable. */ int -cdi_get_audio_track_info(cd_img_t *cdi, int end, int track, int *track_num, TMSF *start, uint8_t *attr) +cdi_get_audio_track_info(cd_img_t *cdi, UNUSED(int end), int track, int *track_num, TMSF *start, uint8_t *attr) { track_t *trk = &cdi->tracks[track - 1]; int pos = trk->start + 150; @@ -302,7 +302,7 @@ cdi_get_audio_track_info(cd_img_t *cdi, int end, int track, int *track_num, TMSF } int -cdi_get_audio_track_info_lba(cd_img_t *cdi, int end, int track, int *track_num, uint32_t *start, uint8_t *attr) +cdi_get_audio_track_info_lba(cd_img_t *cdi, UNUSED(int end), int track, int *track_num, uint32_t *start, uint8_t *attr) { track_t *trk = &cdi->tracks[track - 1]; diff --git a/src/cdrom/cdrom_image_viso.c b/src/cdrom/cdrom_image_viso.c index 2feff2aff..e1625c5e3 100644 --- a/src/cdrom/cdrom_image_viso.c +++ b/src/cdrom/cdrom_image_viso.c @@ -114,8 +114,10 @@ typedef struct _viso_entry_ { } viso_entry_t; typedef struct { - uint64_t vol_size_offsets[2], pt_meta_offsets[2]; - int format, use_version_suffix : 1; + uint64_t vol_size_offsets[2]; + uint64_t pt_meta_offsets[2]; + int format; + uint8_t use_version_suffix : 1; size_t metadata_sectors, all_sectors, entry_map_size, sector_size, file_fifo_pos; uint8_t *metadata; @@ -629,6 +631,9 @@ pad_susp: if (!(*q & 1)) /* padding for even file ID lengths */ *p++ = 0; break; + + default: + break; } if ((p - data) > 255) diff --git a/src/cdrom/cdrom_mitsumi.c b/src/cdrom/cdrom_mitsumi.c index e7e12bb94..079ae3556 100644 --- a/src/cdrom/cdrom_mitsumi.c +++ b/src/cdrom/cdrom_mitsumi.c @@ -116,7 +116,9 @@ typedef struct { /* The addresses sent from the guest are absolute, ie. a LBA of 0 corresponds to a MSF of 00:00:00. Otherwise, the counter displayed by the guest is wrong: there is a seeming 2 seconds in which audio plays but counter does not move, while a data track before audio jumps to 2 seconds before the actual start of the audio while audio still plays. With an absolute conversion, the counter is fine. */ +#ifdef MSFtoLBA #undef MSFtoLBA +#endif #define MSFtoLBA(m, s, f) ((((m * 60) + s) * 75) + f) #define CD_BCD(x) (((x) % 10) | (((x) / 10) << 4)) @@ -242,9 +244,11 @@ mitsumi_cdrom_in(uint16_t port, void *priv) ret |= FLAG_NOSTAT; pclog("Read port 1: ret = %02x\n", ret | FLAG_UNK); return ret | FLAG_UNK; + default: + break; } - return (0xff); + return 0xff; } static void @@ -283,6 +287,8 @@ mitsumi_cdrom_out(uint16_t port, uint8_t val, void *priv) case 0x10: dev->enable_irq = val; break; + default: + break; } dev->cmdbuf[1] = 0; dev->cmdbuf_count = 2; @@ -297,6 +303,8 @@ mitsumi_cdrom_out(uint16_t port, uint8_t val, void *priv) if (dev->conf == 1) dev->cmdrd_count++; break; + default: + break; } break; case CMD_READ1X: @@ -320,8 +328,12 @@ mitsumi_cdrom_out(uint16_t port, uint8_t val, void *priv) case 3: dev->readmsf |= CD_DCB(val) << ((dev->cmdrd_count - 3) << 3); break; + default: + break; } break; + default: + break; } if (!dev->cmdrd_count) dev->stat = cdrom.host_drive ? (STAT_READY | (dev->change ? STAT_CHANGE : 0)) : 0; @@ -406,11 +418,13 @@ mitsumi_cdrom_out(uint16_t port, uint8_t val, void *priv) case 1: mitsumi_cdrom_reset(dev); break; + default: + break; } } static void * -mitsumi_cdrom_init(const device_t *info) +mitsumi_cdrom_init(UNUSED(const device_t *info)) { mcd_t *dev; diff --git a/src/chipset/82c100.c b/src/chipset/82c100.c index 4d75ca387..abac4b618 100644 --- a/src/chipset/82c100.c +++ b/src/chipset/82c100.c @@ -28,23 +28,24 @@ #include <86box/io.h> #include <86box/mem.h> #include <86box/nmi.h> +#include <86box/plat_unused.h> #include <86box/port_92.h> #include <86box/rom.h> #include <86box/chipset.h> -typedef struct -{ +typedef struct ems_page_t { int enabled; - uint32_t virt, phys; + uint32_t virt; + uint32_t phys; } ems_page_t; -typedef struct -{ - uint8_t index, access; - uint16_t ems_io_base; - uint32_t ems_window_base; - uint8_t ems_page_regs[4], - regs[256]; +typedef struct ct_82c100_t { + uint8_t index; + uint8_t access; + uint16_t ems_io_base; + uint32_t ems_window_base; + uint8_t ems_page_regs[4]; + uint8_t regs[256]; ems_page_t ems_pages[4]; mem_mapping_t ems_mappings[4]; } ct_82c100_t; @@ -119,9 +120,7 @@ ct_82c100_ems_in(uint16_t port, void *priv) static void ct_82c100_ems_update(ct_82c100_t *dev) { - int i; - - for (i = 0; i < 4; i++) { + for (uint8_t i = 0; i < 4; i++) { ct_82c100_log("Disabling EMS I/O handler %i at %04X\n", i, dev->ems_io_base + (i << 14)); io_handler(0, dev->ems_io_base + (i << 14), 1, ct_82c100_ems_in, NULL, NULL, ct_82c100_ems_out, NULL, NULL, dev); @@ -129,7 +128,7 @@ ct_82c100_ems_update(ct_82c100_t *dev) dev->ems_io_base = 0x0208 + (dev->regs[0x4c] & 0xf0); - for (i = 0; i < 4; i++) { + for (uint8_t i = 0; i < 4; i++) { ct_82c100_log("Enabling EMS I/O handler %i at %04X\n", i, dev->ems_io_base + (i << 14)); io_handler(1, dev->ems_io_base + (i << 14), 1, ct_82c100_ems_in, NULL, NULL, ct_82c100_ems_out, NULL, NULL, dev); @@ -221,6 +220,9 @@ ct_82c100_out(uint16_t port, uint8_t val, void *priv) dev->regs[0x4c] = val; ct_82c100_ems_update(dev); break; + + default: + break; } dev->access = 0; } @@ -257,6 +259,9 @@ ct_82c100_in(uint16_t port, void *priv) case 0x4c: ret = dev->regs[dev->index]; break; + + default: + break; } dev->access = 0; } @@ -349,7 +354,7 @@ ct_82c100_close(void *priv) } static void * -ct_82c100_init(const device_t *info) +ct_82c100_init(UNUSED(const device_t *info)) { ct_82c100_t *dev; diff --git a/src/chipset/acc2168.c b/src/chipset/acc2168.c index 765913672..6f58cd8c2 100644 --- a/src/chipset/acc2168.c +++ b/src/chipset/acc2168.c @@ -30,6 +30,7 @@ #include <86box/io.h> #include <86box/mem.h> #include <86box/port_92.h> +#include <86box/plat_unused.h> #include <86box/chipset.h> #define ENABLED_SHADOW (MEM_READ_INTERNAL | ((dev->regs[0x02] & 0x20) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL)) @@ -57,20 +58,21 @@ acc2168_log(const char *fmt, ...) #endif typedef struct acc2168_t { - uint8_t reg_idx, regs[256]; + uint8_t reg_idx; + uint8_t regs[256]; } acc2168_t; static void acc2168_shadow_recalc(acc2168_t *dev) { - for (uint32_t i = 0; i < 5; i++) + for (uint8_t i = 0; i < 5; i++) mem_set_mem_state_both(SHADOW_ADDR, SHADOW_SIZE, SHADOW_RECALC); } static void -acc2168_write(uint16_t addr, uint8_t val, void *p) +acc2168_write(uint16_t addr, uint8_t val, void *priv) { - acc2168_t *dev = (acc2168_t *) p; + acc2168_t *dev = (acc2168_t *) priv; switch (addr) { case 0xf2: @@ -158,13 +160,15 @@ acc2168_write(uint16_t addr, uint8_t val, void *p) break; } break; + default: + break; } } static uint8_t -acc2168_read(uint16_t addr, void *p) +acc2168_read(uint16_t addr, void *priv) { - acc2168_t *dev = (acc2168_t *) p; + acc2168_t *dev = (acc2168_t *) priv; return (addr == 0xf3) ? dev->regs[dev->reg_idx] : dev->reg_idx; } @@ -178,7 +182,7 @@ acc2168_close(void *priv) } static void * -acc2168_init(const device_t *info) +acc2168_init(UNUSED(const device_t *info)) { acc2168_t *dev = (acc2168_t *) malloc(sizeof(acc2168_t)); memset(dev, 0, sizeof(acc2168_t)); diff --git a/src/chipset/ali1429.c b/src/chipset/ali1429.c index e245603a9..c91e2dd4b 100644 --- a/src/chipset/ali1429.c +++ b/src/chipset/ali1429.c @@ -115,10 +115,12 @@ ali1429_log(const char *fmt, ...) # define ali1429_log(fmt, ...) #endif -typedef struct -{ - uint8_t is_g, index, cfg_locked, reg_57h, - regs[90]; +typedef struct ali_1429_t { + uint8_t is_g; + uint8_t index; + uint8_t cfg_locked; + uint8_t reg_57h; + uint8_t regs[90]; } ali1429_t; static void @@ -239,12 +241,16 @@ ali1429_write(uint16_t addr, uint8_t val, void *priv) case 6: cpu_set_isa_speed(cpu_busspeed / 12); break; + default: + break; } break; case 0x21 ... 0x27: dev->regs[dev->index] = val; break; + default: + break; } /* M1429G Only Registers */ @@ -260,10 +266,14 @@ ali1429_write(uint16_t addr, uint8_t val, void *priv) case 0x57: dev->reg_57h = val; break; + default: + break; } } } break; + default: + break; } } diff --git a/src/chipset/ali1435.c b/src/chipset/ali1435.c index c80611e1b..c2ff89abb 100644 --- a/src/chipset/ali1435.c +++ b/src/chipset/ali1435.c @@ -31,6 +31,7 @@ #include <86box/timer.h> #include <86box/pic.h> #include <86box/pit.h> +#include <86box/plat_unused.h> #include <86box/port_92.h> #include <86box/hdc_ide.h> #include <86box/hdc.h> @@ -42,10 +43,11 @@ #define MEM_STATE_SHADOW_W 0x02 #define MEM_STATE_SMRAM 0x04 -typedef struct -{ - uint8_t index, cfg_locked, - regs[16], pci_regs[256]; +typedef struct ali_1435_t { + uint8_t index; + uint8_t cfg_locked; + uint8_t regs[16]; + uint8_t pci_regs[256]; } ali1435_t; #define ENABLE_ALI1435_LOG 1 @@ -188,11 +190,12 @@ ali1435_write(uint16_t addr, uint8_t val, void *priv) break; case 0x23: - /* #ifdef ENABLE_ALI1435_LOG - if (dev->index != 0x03) - ali1435_log("M1435: dev->regs[%02x] = %02x\n", dev->index, val); - #endif */ - +#if 0 +#ifdef ENABLE_ALI1435_LOG + if (dev->index != 0x03) + ali1435_log("M1435: dev->regs[%02x] = %02x\n", dev->index, val); +#endif +#endif if (dev->index == 0x03) dev->cfg_locked = (val != 0x69); @@ -216,9 +219,14 @@ ali1435_write(uint16_t addr, uint8_t val, void *priv) case 0x07: dev->regs[dev->index] = val; break; + + default: + break; } } break; + default: + break; } } @@ -269,15 +277,15 @@ ali1435_reset(void *priv) } static void -ali1435_close(void *p) +ali1435_close(void *priv) { - ali1435_t *dev = (ali1435_t *) p; + ali1435_t *dev = (ali1435_t *) priv; free(dev); } static void * -ali1435_init(const device_t *info) +ali1435_init(UNUSED(const device_t *info)) { ali1435_t *dev = (ali1435_t *) malloc(sizeof(ali1435_t)); memset(dev, 0, sizeof(ali1435_t)); @@ -294,10 +302,12 @@ ali1435_init(const device_t *info) ali1435_reset(dev); - /* pci_set_irq_level(PCI_INTA, 0); +#if 0 + pci_set_irq_level(PCI_INTA, 0); pci_set_irq_level(PCI_INTB, 0); pci_set_irq_level(PCI_INTC, 0); - pci_set_irq_level(PCI_INTD, 0); */ + pci_set_irq_level(PCI_INTD, 0); +#endif return dev; } diff --git a/src/chipset/ali1489.c b/src/chipset/ali1489.c index c7139612a..c4488ffd6 100644 --- a/src/chipset/ali1489.c +++ b/src/chipset/ali1489.c @@ -35,6 +35,7 @@ #include <86box/nmi.h> #include <86box/pic.h> #include <86box/pci.h> +#include <86box/plat_unused.h> #include <86box/port_92.h> #include <86box/smram.h> @@ -61,10 +62,14 @@ ali1489_log(const char *fmt, ...) # define ali1489_log(fmt, ...) #endif -typedef struct -{ - uint8_t index, ide_index, ide_chip_id, pci_slot, - regs[256], pci_conf[256], ide_regs[256]; +typedef struct ali1489_t { + uint8_t index; + uint8_t ide_index; + uint8_t ide_chip_id; + uint8_t pci_slot; + uint8_t regs[256]; + uint8_t pci_conf[256]; + uint8_t ide_regs[256]; port_92_t *port_92; smram_t *smram; @@ -75,11 +80,9 @@ static void ali1489_ide_handler(ali1489_t *dev); static void ali1489_shadow_recalc(ali1489_t *dev) { - uint32_t i; - shadowbios = shadowbios_write = 0; - for (i = 0; i < 8; i++) { + for (uint8_t i = 0; i < 8; i++) { if (dev->regs[0x13] & (1 << i)) { ali1489_log("%06Xh-%06Xh region shadow enabled: read = %i, write = %i\n", 0xc0000 + (i << 14), 0xc3fff + (i << 14), !!(dev->regs[0x14] & 0x10), !!(dev->regs[0x14] & 0x20)); @@ -90,7 +93,7 @@ ali1489_shadow_recalc(ali1489_t *dev) } } - for (i = 0; i < 4; i++) { + for (uint8_t i = 0; i < 4; i++) { if (dev->regs[0x14] & (1 << i)) { ali1489_log("%06Xh-%06Xh region shadow enabled: read = %i, write = %i\n", 0xe0000 + (i << 15), 0xe7fff + (i << 15), !!(dev->regs[0x14] & 0x10), !!(dev->regs[0x14] & 0x20)); @@ -126,6 +129,8 @@ ali1489_smram_recalc(ali1489_t *dev) else smram_enable(dev->smram, 0x38000, 0xa8000, 0x08000, (dev->regs[0x19] & 0x08), 1); break; + default: + break; } if ((dev->regs[0x19] & 0x31) == 0x11) { @@ -320,6 +325,8 @@ ali1489_write(uint16_t addr, uint8_t val, void *priv) case 0x30: picint(1 << 10); break; + default: + break; } dev->regs[0x35] |= 0x0e; } else if (!(val & 0x10)) @@ -381,6 +388,8 @@ ali1489_write(uint16_t addr, uint8_t val, void *priv) /* TODO: When doing the IRQ and PCI IRQ rewrite, bits 0 to 3 toggle edge/level output. */ dev->regs[dev->index] = val; break; + default: + break; } if (dev->index != 0x03) { @@ -390,6 +399,9 @@ ali1489_write(uint16_t addr, uint8_t val, void *priv) dev->regs[dev->index] = val; break; + + default: + break; } } @@ -409,6 +421,8 @@ ali1489_read(uint16_t addr, void *priv) else ret = dev->regs[dev->index]; break; + default: + break; } ali1489_log("M1489: dev->regs[%02x] (%02x)\n", dev->index, ret); @@ -417,7 +431,7 @@ ali1489_read(uint16_t addr, void *priv) } static void -ali1489_pci_write(int func, int addr, uint8_t val, void *priv) +ali1489_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv) { ali1489_t *dev = (ali1489_t *) priv; @@ -433,11 +447,14 @@ ali1489_pci_write(int func, int addr, uint8_t val, void *priv) case 0x07: dev->pci_conf[0x07] &= ~(val & 0xb8); break; + + default: + break; } } static uint8_t -ali1489_pci_read(int func, int addr, void *priv) +ali1489_pci_read(UNUSED(int func), int addr, void *priv) { ali1489_t *dev = (ali1489_t *) priv; uint8_t ret = 0xff; @@ -529,8 +546,14 @@ ali1489_ide_write(uint16_t addr, uint8_t val, void *priv) dev->ide_regs[dev->ide_index] = val; ali1489_ide_handler(dev); break; + + default: + break; } break; + + default: + break; } } @@ -548,6 +571,9 @@ ali1489_ide_read(uint16_t addr, void *priv) ret = dev->ide_regs[dev->ide_index]; ali1489_log("M1489-IDE: dev->regs[%02x] (%02x)\n", dev->ide_index, ret); break; + + default: + break; } return ret; @@ -576,7 +602,7 @@ ali1489_close(void *priv) } static void * -ali1489_init(const device_t *info) +ali1489_init(UNUSED(const device_t *info)) { ali1489_t *dev = (ali1489_t *) malloc(sizeof(ali1489_t)); memset(dev, 0, sizeof(ali1489_t)); diff --git a/src/chipset/ali1531.c b/src/chipset/ali1531.c index 8d8358731..20be9857c 100644 --- a/src/chipset/ali1531.c +++ b/src/chipset/ali1531.c @@ -28,6 +28,7 @@ #include <86box/io.h> #include <86box/mem.h> #include <86box/pci.h> +#include <86box/plat_unused.h> #include <86box/smram.h> #include <86box/spd.h> @@ -82,6 +83,9 @@ ali1531_smram_recalc(uint8_t val, ali1531_t *dev) if (val & 0x10) mem_set_mem_state_smram_ex(1, 0x30000, 0x10000, 0x02); break; + + default: + break; } } @@ -89,7 +93,7 @@ ali1531_smram_recalc(uint8_t val, ali1531_t *dev) } static void -ali1531_shadow_recalc(int cur_reg, ali1531_t *dev) +ali1531_shadow_recalc(UNUSED(int cur_reg), ali1531_t *dev) { int bit; int r_reg; @@ -124,7 +128,7 @@ ali1531_shadow_recalc(int cur_reg, ali1531_t *dev) } static void -ali1531_write(int func, int addr, uint8_t val, void *priv) +ali1531_write(UNUSED(int func), int addr, uint8_t val, void *priv) { ali1531_t *dev = (ali1531_t *) priv; @@ -228,8 +232,10 @@ ali1531_write(int func, int addr, uint8_t val, void *priv) case 0x57: /* H2PO */ dev->pci_conf[addr] = val & 0x60; /* Find where the Shut-down Special cycle is initiated. */ - // if (!(val & 0x20)) - // outb(0x92, 0x01); +#if 0 + if (!(val & 0x20)) + outb(0x92, 0x01); +#endif break; case 0x58: @@ -288,11 +294,14 @@ ali1531_write(int func, int addr, uint8_t val, void *priv) case 0x83: dev->pci_conf[addr] = val & 0x10; break; + + default: + break; } } static uint8_t -ali1531_read(int func, int addr, void *priv) +ali1531_read(UNUSED(int func), int addr, void *priv) { ali1531_t *dev = (ali1531_t *) priv; uint8_t ret = 0xff; @@ -306,7 +315,6 @@ static void ali1531_reset(void *priv) { ali1531_t *dev = (ali1531_t *) priv; - int i; /* Default Registers */ dev->pci_conf[0x00] = 0xb9; @@ -342,10 +350,10 @@ ali1531_reset(void *priv) ali1531_write(0, 0x47, 0x00, dev); ali1531_write(0, 0x48, 0x00, dev); - for (i = 0; i < 4; i++) + for (uint8_t i = 0; i < 4; i++) ali1531_write(0, 0x4c + i, 0x00, dev); - for (i = 0; i < 16; i += 2) { + for (uint8_t i = 0; i < 16; i += 2) { ali1531_write(0, 0x60 + i, 0x08, dev); ali1531_write(0, 0x61 + i, 0x40, dev); } @@ -361,7 +369,7 @@ ali1531_close(void *priv) } static void * -ali1531_init(const device_t *info) +ali1531_init(UNUSED(const device_t *info)) { ali1531_t *dev = (ali1531_t *) malloc(sizeof(ali1531_t)); memset(dev, 0, sizeof(ali1531_t)); diff --git a/src/chipset/ali1541.c b/src/chipset/ali1541.c index 509bb95f2..5d8db1547 100644 --- a/src/chipset/ali1541.c +++ b/src/chipset/ali1541.c @@ -28,6 +28,7 @@ #include <86box/io.h> #include <86box/mem.h> #include <86box/pci.h> +#include <86box/plat_unused.h> #include <86box/smram.h> #include <86box/spd.h> @@ -83,6 +84,8 @@ ali1541_smram_recalc(uint8_t val, ali1541_t *dev) if (val & 0x10) mem_set_mem_state_smram_ex(1, 0x30000, 0x10000, 0x02); break; + default: + break; } } @@ -90,7 +93,7 @@ ali1541_smram_recalc(uint8_t val, ali1541_t *dev) } static void -ali1541_shadow_recalc(int cur_reg, ali1541_t *dev) +ali1541_shadow_recalc(UNUSED(int cur_reg), ali1541_t *dev) { int bit; int r_reg; @@ -131,8 +134,8 @@ ali1541_mask_bar(ali1541_t *dev) uint32_t mask; switch (dev->pci_conf[0xbc] & 0x0f) { - case 0x00: default: + case 0x00: mask = 0x00000000; break; case 0x01: @@ -170,7 +173,7 @@ ali1541_mask_bar(ali1541_t *dev) } static void -ali1541_write(int func, int addr, uint8_t val, void *priv) +ali1541_write(UNUSED(int func), int addr, uint8_t val, void *priv) { ali1541_t *dev = (ali1541_t *) priv; @@ -367,8 +370,10 @@ ali1541_write(int func, int addr, uint8_t val, void *priv) case 0x87: /* H2PO */ dev->pci_conf[addr] = val; /* Find where the Shut-down Special cycle is initiated. */ - // if (!(val & 0x20)) - // outb(0x92, 0x01); +#if 0 + if (!(val & 0x20)) + outb(0x92, 0x01); +#endif break; case 0x88: @@ -546,11 +551,14 @@ ali1541_write(int func, int addr, uint8_t val, void *priv) case 0xf7: dev->pci_conf[addr] = val & 0x43; break; + + default: + break; } } static uint8_t -ali1541_read(int func, int addr, void *priv) +ali1541_read(UNUSED(int func), int addr, void *priv) { ali1541_t *dev = (ali1541_t *) priv; uint8_t ret = 0xff; @@ -564,7 +572,6 @@ static void ali1541_reset(void *priv) { ali1541_t *dev = (ali1541_t *) priv; - int i; /* Default Registers */ dev->pci_conf[0x00] = 0xb9; @@ -607,12 +614,13 @@ ali1541_reset(void *priv) ali1541_write(0, 0x54, 0x00, dev); ali1541_write(0, 0x55, 0x00, dev); - for (i = 0; i < 4; i++) + for (uint8_t i = 0; i < 4; i++) ali1541_write(0, 0x56 + i, 0x00, dev); - ali1541_write(0, 0x60 + i, 0x07, dev); - ali1541_write(0, 0x61 + i, 0x40, dev); - for (i = 0; i < 14; i += 2) { + ali1541_write(0, 0x60, 0x07, dev); + ali1541_write(0, 0x61, 0x40, dev); + + for (uint8_t i = 0; i < 14; i += 2) { ali1541_write(0, 0x62 + i, 0x00, dev); ali1541_write(0, 0x63 + i, 0x00, dev); } @@ -628,7 +636,7 @@ ali1541_close(void *priv) } static void * -ali1541_init(const device_t *info) +ali1541_init(UNUSED(const device_t *info)) { ali1541_t *dev = (ali1541_t *) malloc(sizeof(ali1541_t)); memset(dev, 0, sizeof(ali1541_t)); diff --git a/src/chipset/ali1543.c b/src/chipset/ali1543.c index fcad2486a..f0c1347db 100644 --- a/src/chipset/ali1543.c +++ b/src/chipset/ali1543.c @@ -36,6 +36,7 @@ #include <86box/nvr.h> #include <86box/pci.h> #include <86box/pic.h> +#include <86box/plat_unused.h> #include <86box/port_92.h> #include <86box/sio.h> #include <86box/smbus.h> @@ -46,10 +47,19 @@ #include <86box/chipset.h> typedef struct ali1543_t { - uint8_t pci_conf[256], pmu_conf[256], usb_conf[256], ide_conf[256], - pci_slot, ide_slot, usb_slot, pmu_slot, usb_dev_enable, ide_dev_enable, - pmu_dev_enable, type; - int offset; + uint8_t pci_conf[256]; + uint8_t pmu_conf[256]; + uint8_t usb_conf[256]; + uint8_t ide_conf[256]; + uint8_t pci_slot; + uint8_t ide_slot; + uint8_t usb_slot; + uint8_t pmu_slot; + uint8_t usb_dev_enable; + uint8_t ide_dev_enable; + uint8_t pmu_dev_enable; + uint8_t type; + int offset; apm_t *apm; acpi_t *acpi; @@ -95,7 +105,7 @@ ali1543_log(const char *fmt, ...) #endif static void -ali1533_ddma_handler(ali1543_t *dev) +ali1533_ddma_handler(UNUSED(ali1543_t *dev)) { /* TODO: Find any documentation that actually explains the ALi southbridge DDMA mapping. */ } @@ -168,6 +178,8 @@ ali1533_write(int func, int addr, uint8_t val, void *priv) case 6: cpu_set_isa_pci_div((val & 7) + 1); break; + default: + break; } break; @@ -227,8 +239,10 @@ ali1533_write(int func, int addr, uint8_t val, void *priv) dev->pci_conf[addr] = val; ali1543_log("SIRQI = IRQ %i; SIRQII = IRQ %i\n", ali1533_irq_routing[(val >> 4) & 0x0f], ali1533_irq_routing[val & 0x0f]); - // pci_set_mirq_routing(PCI_MIRQ0, ali1533_irq_routing[(val >> 4) & 0x0f]); - // pci_set_mirq_routing(PCI_MIRQ1, ali1533_irq_routing[val & 0x0f]); +#if 0 + pci_set_mirq_routing(PCI_MIRQ0, ali1533_irq_routing[(val >> 4) & 0x0f]); + pci_set_mirq_routing(PCI_MIRQ1, ali1533_irq_routing[val & 0x0f]); +#endif } break; @@ -293,6 +307,8 @@ ali1533_write(int func, int addr, uint8_t val, void *priv) case 0x30: dev->ide_slot = 0x0d; /* A24 = slot 13 */ break; + default: + break; } pci_relocate_slot(PCI_CARD_SOUTHBRIDGE_IDE, ((int) dev->ide_slot) + dev->offset); ali1543_log("IDE slot = %02X (A%0i)\n", ((int) dev->ide_slot) + dev->offset, dev->ide_slot + 11); @@ -364,6 +380,8 @@ ali1533_write(int func, int addr, uint8_t val, void *priv) case 0x0c: dev->pmu_slot = 0x04; /* A15 = slot 04 */ break; + default: + break; } pci_relocate_slot(PCI_CARD_SOUTHBRIDGE_PMU, ((int) dev->pmu_slot) + dev->offset); ali1543_log("PMU slot = %02X (A%0i)\n", ((int) dev->pmu_slot) + dev->offset, dev->pmu_slot + 11); @@ -380,6 +398,8 @@ ali1533_write(int func, int addr, uint8_t val, void *priv) case 0x03: dev->usb_slot = 0x01; /* A12 = slot 01 */ break; + default: + break; } pci_relocate_slot(PCI_CARD_SOUTHBRIDGE_USB, ((int) dev->usb_slot) + dev->offset); ali1543_log("USB slot = %02X (A%0i)\n", ((int) dev->usb_slot) + dev->offset, dev->usb_slot + 11); @@ -437,6 +457,9 @@ ali1533_write(int func, int addr, uint8_t val, void *priv) dev->pmu_dev_enable = 0; } break; + + default: + break; } } @@ -509,6 +532,9 @@ ali5229_ide_irq_handler(ali1543_t *dev) sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 0); sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 2); break; + + default: + break; } } @@ -546,6 +572,9 @@ ali5229_ide_irq_handler(ali1543_t *dev) sff_set_irq_mode(dev->ide_controller[ctl], 0 ^ ch, 0); sff_set_irq_mode(dev->ide_controller[ctl], 1 ^ ch, 2); break; + + default: + break; } } } @@ -857,6 +886,9 @@ ali5229_write(int func, int addr, uint8_t val, void *priv) case 0x5f: dev->ide_conf[addr] = val & 0x7f; break; + + default: + break; } } @@ -942,6 +974,9 @@ ali5237_write(int func, int addr, uint8_t val, void *priv) if (!(dev->usb_conf[0x42] & 0x10)) dev->usb_conf[addr] = val; break; + + default: + break; } } @@ -1426,6 +1461,9 @@ ali7101_read(int func, int addr, void *priv) case 0x74: dev->pmu_conf[addr] &= 0xcc; break; + + default: + break; } } } diff --git a/src/chipset/ali1621.c b/src/chipset/ali1621.c index aba05e776..73b65d801 100644 --- a/src/chipset/ali1621.c +++ b/src/chipset/ali1621.c @@ -28,6 +28,7 @@ #include <86box/io.h> #include <86box/mem.h> #include <86box/pci.h> +#include <86box/plat_unused.h> #include <86box/smram.h> #include <86box/spd.h> @@ -111,6 +112,8 @@ ali1621_smram_recalc(uint8_t val, ali1621_t *dev) case 0x30: /* Protect. */ access_smm |= ACCESS_SMRAM_R; break; + default: + break; } } @@ -122,6 +125,8 @@ ali1621_smram_recalc(uint8_t val, ali1621_t *dev) case 0x30: /* Protect. */ access_smm |= ACCESS_SMRAM_W; break; + default: + break; } smram_enable(dev->smram[0], 0xa0000, 0xa0000, 0x20000, ((val & 0x30) == 0x10), (val & 0x30)); @@ -137,7 +142,7 @@ ali1621_smram_recalc(uint8_t val, ali1621_t *dev) } static void -ali1621_shadow_recalc(int cur_reg, ali1621_t *dev) +ali1621_shadow_recalc(UNUSED(int cur_reg), ali1621_t *dev) { int r_bit; int w_bit; @@ -207,8 +212,8 @@ ali1621_mask_bar(ali1621_t *dev) uint32_t mask; switch (dev->pci_conf[0xbc] & 0x0f) { - case 0x00: default: + case 0x00: mask = 0x00000000; break; case 0x01: @@ -246,7 +251,7 @@ ali1621_mask_bar(ali1621_t *dev) } static void -ali1621_write(int func, int addr, uint8_t val, void *priv) +ali1621_write(UNUSED(int func), int addr, uint8_t val, void *priv) { ali1621_t *dev = (ali1621_t *) priv; @@ -565,11 +570,14 @@ ali1621_write(int func, int addr, uint8_t val, void *priv) case 0xf0 ... 0xff: dev->pci_conf[addr] = val; break; + + default: + break; } } static uint8_t -ali1621_read(int func, int addr, void *priv) +ali1621_read(UNUSED(int func), int addr, void *priv) { ali1621_t *dev = (ali1621_t *) priv; uint8_t ret = 0xff; @@ -653,7 +661,7 @@ ali1621_close(void *priv) } static void * -ali1621_init(const device_t *info) +ali1621_init(UNUSED(const device_t *info)) { ali1621_t *dev = (ali1621_t *) malloc(sizeof(ali1621_t)); memset(dev, 0, sizeof(ali1621_t)); diff --git a/src/chipset/ali6117.c b/src/chipset/ali6117.c index 3d86fbcd2..433316c50 100644 --- a/src/chipset/ali6117.c +++ b/src/chipset/ali6117.c @@ -38,7 +38,8 @@ typedef struct ali6117_t { uint32_t local; /* Main registers (port 22h/23h) */ - uint8_t unlocked, mode; + uint8_t unlocked; + uint8_t mode; uint8_t reg_offset; uint8_t regs[256]; } ali6117_t; @@ -277,6 +278,9 @@ ali6117_reg_write(uint16_t addr, uint8_t val, void *priv) case 0x7: cpu_set_isa_speed(cpu_busspeed / 6); break; + + default: + break; } break; @@ -372,6 +376,9 @@ ali6117_reg_write(uint16_t addr, uint8_t val, void *priv) case 0x71: val &= 0x1f; break; + + default: + break; } dev->regs[dev->reg_offset] = val; diff --git a/src/chipset/contaq_82c59x.c b/src/chipset/contaq_82c59x.c index 720d7c81e..ec7050b1e 100644 --- a/src/chipset/contaq_82c59x.c +++ b/src/chipset/contaq_82c59x.c @@ -48,16 +48,17 @@ contaq_82c59x_log(const char *fmt, ...) # define contaq_82c59x_log(fmt, ...) #endif -typedef struct -{ - uint32_t phys, virt; +typedef struct mem_remapping_t { + uint32_t phys; + uint32_t virt; } mem_remapping_t; -typedef struct -{ - uint8_t index, green, - smi_status_set, - regs[256], smi_status[2]; +typedef struct contaq_82c59x_t { + uint8_t index; + uint8_t green; + uint8_t smi_status_set; + uint8_t regs[256]; + uint8_t smi_status[2]; smram_t *smram[2]; } contaq_82c59x_t; @@ -82,6 +83,8 @@ contaq_82c59x_isa_speed_recalc(contaq_82c59x_t *dev) case 0x03: cpu_set_isa_speed(cpu_busspeed / 5); break; + default: + break; } } } @@ -274,8 +277,14 @@ contaq_82c59x_write(uint16_t addr, uint8_t val, void *priv) case 0x7c: dev->regs[dev->index] = val; break; + + default: + break; } break; + + default: + break; } } diff --git a/src/chipset/cs4031.c b/src/chipset/cs4031.c index a2cef50b9..b4e62b8f5 100644 --- a/src/chipset/cs4031.c +++ b/src/chipset/cs4031.c @@ -27,13 +27,13 @@ #include <86box/io.h> #include <86box/device.h> #include <86box/mem.h> +#include <86box/plat_unused.h> #include <86box/port_92.h> #include <86box/chipset.h> -typedef struct -{ - uint8_t index, - regs[256]; +typedef struct cs4031_t { + uint8_t index; + uint8_t regs[256]; port_92_t *port_92; } cs4031_t; @@ -134,8 +134,14 @@ cs4031_write(uint16_t addr, uint8_t val, void *priv) dev->regs[dev->index] = val & 0xb3; port_92_set_features(dev->port_92, val & 0x10, val & 0x20); break; + + default: + break; } break; + + default: + break; } } @@ -156,7 +162,7 @@ cs4031_close(void *priv) } static void * -cs4031_init(const device_t *info) +cs4031_init(UNUSED(const device_t *info)) { cs4031_t *dev = (cs4031_t *) malloc(sizeof(cs4031_t)); memset(dev, 0, sizeof(cs4031_t)); diff --git a/src/chipset/cs8230.c b/src/chipset/cs8230.c index edf4ac8c2..8e5377ed2 100644 --- a/src/chipset/cs8230.c +++ b/src/chipset/cs8230.c @@ -25,12 +25,12 @@ #include <86box/io.h> #include <86box/device.h> #include <86box/mem.h> +#include <86box/plat_unused.h> #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/chipset.h> -typedef struct -{ +typedef struct cs8230_t { int idx; uint8_t regs[256]; } cs8230_t; @@ -51,6 +51,8 @@ shadow_control(uint32_t addr, uint32_t size, int state) case 0x11: mem_set_mem_state(addr, size, MEM_READ_EXTANY | MEM_WRITE_EXTANY); break; + default: + break; } flushmmucache_nopc(); @@ -59,9 +61,7 @@ shadow_control(uint32_t addr, uint32_t size, int state) static void rethink_shadow_mappings(cs8230_t *cs8230) { - int c; - - for (c = 0; c < 32; c++) { + for (uint8_t c = 0; c < 32; c++) { /* Addresses 40000-bffff in 16k blocks */ if (cs8230->regs[0xa + (c >> 3)] & (1 << (c & 7))) mem_set_mem_state(0x40000 + (c << 14), 0x4000, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL); /* I/O channel */ @@ -69,7 +69,7 @@ rethink_shadow_mappings(cs8230_t *cs8230) mem_set_mem_state(0x40000 + (c << 14), 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); /* System board */ } - for (c = 0; c < 16; c++) { + for (uint8_t c = 0; c < 16; c++) { /* Addresses c0000-fffff in 16k blocks. System board ROM can be mapped here */ if (cs8230->regs[0xe + (c >> 3)] & (1 << (c & 7))) mem_set_mem_state(0xc0000 + (c << 14), 0x4000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); /* I/O channel */ @@ -79,9 +79,9 @@ rethink_shadow_mappings(cs8230_t *cs8230) } static uint8_t -cs8230_read(uint16_t port, void *p) +cs8230_read(uint16_t port, void *priv) { - cs8230_t *cs8230 = (cs8230_t *) p; + cs8230_t *cs8230 = (cs8230_t *) priv; uint8_t ret = 0xff; if (port & 1) { @@ -112,6 +112,9 @@ cs8230_read(uint16_t port, void *p) case 0x2a: ret = cs8230->regs[cs8230->idx]; break; + + default: + break; } } @@ -119,9 +122,9 @@ cs8230_read(uint16_t port, void *p) } static void -cs8230_write(uint16_t port, uint8_t val, void *p) +cs8230_write(uint16_t port, uint8_t val, void *priv) { - cs8230_t *cs8230 = (cs8230_t *) p; + cs8230_t *cs8230 = (cs8230_t *) priv; if (!(port & 1)) cs8230->idx = val; @@ -137,6 +140,8 @@ cs8230_write(uint16_t port, uint8_t val, void *p) case 0x0f: /* Address maps */ rethink_shadow_mappings(cs8230); break; + default: + break; } } } @@ -149,9 +154,8 @@ cs8230_close(void *priv) free(cs8230); } -static void - * - cs8230_init(const device_t *info) +static void * +cs8230_init(UNUSED(const device_t *info)) { cs8230_t *cs8230 = (cs8230_t *) malloc(sizeof(cs8230_t)); memset(cs8230, 0, sizeof(cs8230_t)); diff --git a/src/chipset/et6000.c b/src/chipset/et6000.c index ca011e33c..44739c698 100644 --- a/src/chipset/et6000.c +++ b/src/chipset/et6000.c @@ -28,14 +28,15 @@ #include <86box/device.h> #include <86box/mem.h> #include <86box/pit.h> +#include <86box/plat_unused.h> #include <86box/port_92.h> #include <86box/chipset.h> #define INDEX (dev->index - 0x10) -typedef struct -{ - uint8_t index, regs[256]; +typedef struct et6000_t { + uint8_t index; + uint8_t regs[256]; } et6000_t; #ifdef ENABLE_ET6000_LOG @@ -105,9 +106,15 @@ et6000_write(uint16_t addr, uint8_t val, void *priv) et6000_shadow_control(0xe0000, 0x10000, val & 0x20, (val & 0x20) && (val & 0x10)); et6000_shadow_control(0xf0000, 0x10000, val & 0x40, !(val & 0x40)); break; + + default: + break; } et6000_log("ET6000: dev->regs[%02x] = %02x\n", dev->index, dev->regs[dev->index]); break; + + default: + break; } } @@ -128,7 +135,7 @@ et6000_close(void *priv) } static void * -et6000_init(const device_t *info) +et6000_init(UNUSED(const device_t *info)) { et6000_t *dev = (et6000_t *) malloc(sizeof(et6000_t)); memset(dev, 0, sizeof(et6000_t)); diff --git a/src/chipset/gc100.c b/src/chipset/gc100.c index 0df25b1d6..a6616ea29 100644 --- a/src/chipset/gc100.c +++ b/src/chipset/gc100.c @@ -44,8 +44,7 @@ #include <86box/io.h> #include <86box/video.h> -typedef struct -{ +typedef struct gc100_t { uint8_t reg[0x10]; } gc100_t; @@ -70,7 +69,7 @@ gc100_log(const char *fmt, ...) static uint8_t get_fdd_switch_settings(void) { - int fdd_count = 0; + uint8_t fdd_count = 0; for (uint8_t i = 0; i < FDD_NUM; i++) { if (fdd_get_flags(i)) @@ -135,6 +134,9 @@ gc100_write(uint16_t port, uint8_t val, void *priv) /* addr 0x6 */ /* addr 0x7 */ + + default: + break; } gc100_log("GC100: Write %02x at %02x\n", val, port); @@ -187,6 +189,9 @@ gc100_read(uint16_t port, void *priv) /* addr 0x6 */ /* addr 0x7 */ + + default: + break; } return ret; diff --git a/src/chipset/headland.c b/src/chipset/headland.c index 31cb75253..30ee44b0f 100644 --- a/src/chipset/headland.c +++ b/src/chipset/headland.c @@ -34,6 +34,7 @@ #include <86box/device.h> #include <86box/fdd.h> #include <86box/fdc.h> +#include <86box/plat_unused.h> #include <86box/port_92.h> #include <86box/chipset.h> @@ -52,8 +53,9 @@ enum { #define HEADLAND_HAS_CRI 0x10 #define HEADLAND_HAS_SLEEP 0x20 -typedef struct { - uint8_t valid, enabled; +typedef struct headland_mr_t { + uint8_t valid; + uint8_t enabled; uint16_t mr; uint32_t virt_base; @@ -62,7 +64,8 @@ typedef struct { typedef struct headland_t { uint8_t revision; - uint8_t has_cri, has_sleep; + uint8_t has_cri; + uint8_t has_sleep; uint8_t cri; uint8_t cr[7]; @@ -72,8 +75,8 @@ typedef struct headland_t { uint8_t ems_mar; - headland_mr_t null_mr, - ems_mr[64]; + headland_mr_t null_mr; + headland_mr_t ems_mr[64]; mem_mapping_t low_mapping; mem_mapping_t ems_mapping[64]; @@ -205,7 +208,7 @@ hl_ems_update(headland_t *dev, uint8_t mar) } static void -set_global_EMS_state(headland_t *dev, int state) +set_global_EMS_state(headland_t *dev, UNUSED(int state)) { for (uint8_t i = 0; i < 32; i++) { hl_ems_update(dev, i | (((dev->cr[0] & 0x01) << 5) ^ 0x20)); @@ -590,7 +593,6 @@ headland_init(const device_t *info) { headland_t *dev; int ht386 = 0; - uint32_t i; dev = (headland_t *) malloc(sizeof(headland_t)); memset(dev, 0x00, sizeof(headland_t)); @@ -615,7 +617,7 @@ headland_init(const device_t *info) dev->null_mr.mr = 0xff; dev->null_mr.headland = dev; - for (i = 0; i < 64; i++) { + for (uint8_t i = 0; i < 64; i++) { dev->ems_mr[i].valid = 1; dev->ems_mr[i].mr = 0x00; dev->ems_mr[i].headland = dev; @@ -647,7 +649,7 @@ headland_init(const device_t *info) mem_mapping_enable(&dev->high_mapping); } - for (i = 0; i < 24; i++) { + for (uint8_t i = 0; i < 24; i++) { mem_mapping_add(&dev->upper_mapping[i], 0x40000 + (i << 14), 0x4000, mem_read_b, mem_read_w, mem_read_l, @@ -673,7 +675,7 @@ headland_init(const device_t *info) MEM_MAPPING_INTERNAL, &dev->null_mr); mem_mapping_disable(&dev->shadow_mapping[1]); - for (i = 0; i < 64; i++) { + for (uint8_t i = 0; i < 64; i++) { dev->ems_mr[i].mr = 0x00; mem_mapping_add(&dev->ems_mapping[i], ((i & 31) + ((i & 31) >= 24 ? 24 : 16)) << 14, 0x04000, diff --git a/src/chipset/ims8848.c b/src/chipset/ims8848.c index 34a09ae35..0da686d49 100644 --- a/src/chipset/ims8848.c +++ b/src/chipset/ims8848.c @@ -31,6 +31,7 @@ #include <86box/smram.h> #include <86box/pci.h> #include <86box/pic.h> +#include <86box/plat_unused.h> #include <86box/port_92.h> #include <86box/chipset.h> @@ -118,10 +119,11 @@ Bit 0: HADS# Delay After LB. Cycle (1: Enabled / 0: Disable) */ -typedef struct -{ - uint8_t idx, access_data, - regs[256], pci_conf[256]; +typedef struct ims8848_t { + uint8_t idx; + uint8_t access_data; + uint8_t regs[256]; + uint8_t pci_conf[256]; smram_t *smram; } ims8848_t; @@ -148,7 +150,6 @@ ims8848_log(const char *fmt, ...) static void ims8848_recalc(ims8848_t *dev) { - int i; int state_on; uint32_t base; ims8848_log("SHADOW: 00 = %02X, 08 = %02X, 1B = %02X, 1C = %02X\n", @@ -157,7 +158,7 @@ ims8848_recalc(ims8848_t *dev) state_on = MEM_READ_INTERNAL; state_on |= (dev->regs[0x08] & 0x04) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY; - for (i = 0; i < 2; i++) { + for (uint8_t i = 0; i < 2; i++) { base = 0xe0000 + (i << 16); if (dev->regs[0x00] & (1 << (i + 2))) mem_set_mem_state_both(base, 0x10000, state_on); @@ -165,7 +166,7 @@ ims8848_recalc(ims8848_t *dev) mem_set_mem_state_both(base, 0x10000, MEM_READ_EXTANY | MEM_WRITE_INTERNAL); } - for (i = 0; i < 4; i++) { + for (uint8_t i = 0; i < 4; i++) { base = 0xc0000 + (i << 14); if (dev->regs[0x1c] & (1 << i)) mem_set_mem_state_both(base, 0x4000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); @@ -244,10 +245,16 @@ ims8848_write(uint16_t addr, uint8_t val, void *priv) /* Base Memory */ ims8848_base_memory(dev); break; + + default: + break; } dev->access_data = 0; } break; + + default: + break; } } @@ -276,6 +283,8 @@ ims8848_read(uint16_t addr, void *priv) } ims8848_log("[R] [%i] REG %02X = %02X\n", old_ad, dev->idx, ret); break; + default: + break; } return ret; @@ -309,6 +318,9 @@ ims8849_pci_write(int func, int addr, uint8_t val, void *priv) case 0x52 ... 0x55: dev->pci_conf[addr] = val; break; + + default: + break; } } @@ -364,7 +376,7 @@ ims8848_close(void *priv) } static void * -ims8848_init(const device_t *info) +ims8848_init(UNUSED(const device_t *info)) { ims8848_t *dev = (ims8848_t *) malloc(sizeof(ims8848_t)); memset(dev, 0, sizeof(ims8848_t)); diff --git a/src/chipset/intel_420ex.c b/src/chipset/intel_420ex.c index b2a0e082b..4f7951047 100644 --- a/src/chipset/intel_420ex.c +++ b/src/chipset/intel_420ex.c @@ -34,6 +34,7 @@ #include <86box/pic.h> #include <86box/timer.h> #include <86box/pit.h> +#include <86box/plat_unused.h> #include <86box/port_92.h> #include <86box/hdc_ide.h> #include <86box/hdc.h> @@ -45,19 +46,20 @@ #define MEM_STATE_SHADOW_W 0x02 #define MEM_STATE_SMRAM 0x04 -typedef struct -{ - uint8_t has_ide, smram_locked, - regs[256]; +typedef struct i420ex_t { + uint8_t has_ide; + uint8_t smram_locked; + uint8_t regs[256]; - uint16_t timer_base, - timer_latch; + uint16_t timer_base; + uint16_t timer_latch; smram_t *smram; double fast_off_period; - pc_timer_t timer, fast_off_timer; + pc_timer_t timer; + pc_timer_t fast_off_timer; apm_t *apm; port_92_t *port_92; @@ -97,6 +99,8 @@ i420ex_map(uint32_t addr, uint32_t size, int state) case 3: mem_set_mem_state_both(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); break; + default: + break; } flushmmucache_nopc(); } @@ -118,9 +122,9 @@ i420ex_smram_handler_phase1(i420ex_t *dev) uint32_t size = 0x00010000; switch (regs[0x70] & 0x07) { + default: case 0: case 1: - default: host_base = ram_base = 0x00000000; size = 0x00000000; break; @@ -195,6 +199,8 @@ i420ex_write(int func, int addr, uint8_t val, void *priv) ide_set_side(0, 0x0376); ide_pri_enable(); break; + default: + break; } } break; @@ -356,6 +362,8 @@ i420ex_write(int func, int addr, uint8_t val, void *priv) cpu_fast_off_count = val + 1; cpu_fast_off_period_set(cpu_fast_off_val, dev->fast_off_period); break; + default: + break; } } @@ -411,9 +419,9 @@ i420ex_reset_hard(void *priv) } static void -i420ex_apm_out(uint16_t port, uint8_t val, void *p) +i420ex_apm_out(UNUSED(uint16_t port), UNUSED(uint8_t val), void *priv) { - i420ex_t *dev = (i420ex_t *) p; + i420ex_t *dev = (i420ex_t *) priv; if (dev->apm->do_smi) dev->regs[0xaa] |= 0x80; @@ -431,42 +439,41 @@ i420ex_fast_off_count(void *priv) } static void -i420ex_reset(void *p) +i420ex_reset(void *priv) { - i420ex_t *dev = (i420ex_t *) p; - int i; + i420ex_t *dev = (i420ex_t *) priv; - i420ex_write(0, 0x48, 0x00, p); + i420ex_write(0, 0x48, 0x00, priv); /* Disable the PIC mouse latch. */ - i420ex_write(0, 0x4e, 0x03, p); + i420ex_write(0, 0x4e, 0x03, priv); - for (i = 0; i < 7; i++) - i420ex_write(0, 0x59 + i, 0x00, p); + for (uint8_t i = 0; i < 7; i++) + i420ex_write(0, 0x59 + i, 0x00, priv); - for (i = 0; i <= 4; i++) - i420ex_write(0, 0x60 + i, 0x01, p); + for (uint8_t i = 0; i <= 4; i++) + i420ex_write(0, 0x60 + i, 0x01, priv); dev->regs[0x70] &= 0xef; /* Forcibly unlock the SMRAM register. */ dev->smram_locked = 0; - i420ex_write(0, 0x70, 0x00, p); + i420ex_write(0, 0x70, 0x00, priv); mem_set_mem_state(0x000a0000, 0x00060000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); mem_set_mem_state_smm(0x000a0000, 0x00060000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - i420ex_write(0, 0xa0, 0x08, p); - i420ex_write(0, 0xa2, 0x00, p); - i420ex_write(0, 0xa4, 0x00, p); - i420ex_write(0, 0xa5, 0x00, p); - i420ex_write(0, 0xa6, 0x00, p); - i420ex_write(0, 0xa7, 0x00, p); - i420ex_write(0, 0xa8, 0x0f, p); + i420ex_write(0, 0xa0, 0x08, priv); + i420ex_write(0, 0xa2, 0x00, priv); + i420ex_write(0, 0xa4, 0x00, priv); + i420ex_write(0, 0xa5, 0x00, priv); + i420ex_write(0, 0xa6, 0x00, priv); + i420ex_write(0, 0xa7, 0x00, priv); + i420ex_write(0, 0xa8, 0x0f, priv); } static void -i420ex_close(void *p) +i420ex_close(void *priv) { - i420ex_t *dev = (i420ex_t *) p; + i420ex_t *dev = (i420ex_t *) priv; smram_del(dev->smram); diff --git a/src/chipset/intel_4x0.c b/src/chipset/intel_4x0.c index bebfa6ade..ab34ddd02 100644 --- a/src/chipset/intel_4x0.c +++ b/src/chipset/intel_4x0.c @@ -28,6 +28,7 @@ #include <86box/io.h> #include <86box/device.h> #include <86box/pci.h> +#include <86box/plat_unused.h> #include <86box/chipset.h> #include <86box/spd.h> #include <86box/machine.h> @@ -50,17 +51,20 @@ enum { INTEL_440ZX }; -typedef struct -{ - uint8_t pm2_cntrl, - smram_locked, max_drb, - drb_unit, drb_default; - uint8_t regs[256], regs_locked[256]; +typedef struct i4x0_t { + uint8_t pm2_cntrl; + uint8_t smram_locked; + uint8_t max_drb; + uint8_t drb_unit; + uint8_t drb_default; + uint8_t regs[256]; + uint8_t regs_locked[256]; uint8_t mem_state[256]; int type; - smram_t *smram_low, *smram_high; + smram_t *smram_low; + smram_t *smram_high; agpgart_t *agpgart; - void (*write_drbs)(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit); + void (*write_drbs)(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit); } i4x0_t; #ifdef ENABLE_I4X0_LOG @@ -165,8 +169,8 @@ i4x0_smram_handler_phase1(i4x0_t *dev) } else { size[0] = 0x00010000; switch (*reg & 0x03) { - case 0: default: + case 0: base[0] = (mem_size << 10) - size[0]; s = 1; break; @@ -222,17 +226,17 @@ i4x0_mask_bar(uint8_t *regs, void *agpgart) } static uint8_t -pm2_cntrl_read(uint16_t addr, void *p) +pm2_cntrl_read(UNUSED(uint16_t addr), void *priv) { - i4x0_t *dev = (i4x0_t *) p; + i4x0_t *dev = (i4x0_t *) priv; return dev->pm2_cntrl & 0x01; } static void -pm2_cntrl_write(uint16_t addr, uint8_t val, void *p) +pm2_cntrl_write(UNUSED(uint16_t addr), uint8_t val, void *priv) { - i4x0_t *dev = (i4x0_t *) p; + i4x0_t *dev = (i4x0_t *) priv; dev->pm2_cntrl = val & 0x01; } @@ -251,6 +255,7 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) switch (addr) { case 0x04: /*Command register*/ switch (dev->type) { + default: case INTEL_420TX: case INTEL_420ZX: case INTEL_430LX: @@ -258,7 +263,6 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440BX: case INTEL_440GX: case INTEL_440ZX: - default: regs[0x04] = (regs[0x04] & ~0x42) | (val & 0x42); break; case INTEL_430FX: @@ -291,16 +295,18 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440EX: regs[0x05] = val & 0x01; break; + default: + break; } break; case 0x07: switch (dev->type) { + default: case INTEL_420TX: case INTEL_420ZX: case INTEL_430LX: case INTEL_430NX: case INTEL_430HX: - default: regs[0x07] &= ~(val & 0x70); break; case INTEL_430FX: @@ -343,6 +349,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_430TX: regs[0x0f] = (val & 0x40); break; + default: + break; } break; case 0x12: @@ -355,6 +363,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) regs[0x12] = (val & 0xc0); i4x0_mask_bar(regs, dev->agpgart); break; + default: + break; } break; case 0x13: @@ -367,6 +377,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) regs[0x13] = val; i4x0_mask_bar(regs, dev->agpgart); break; + default: + break; } break; case 0x2c: @@ -382,6 +394,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) regs_l[addr] = 1; } break; + default: + break; } break; @@ -396,14 +410,16 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_430TX: regs[0x4f] = (val & 0x80); break; + default: + break; } break; case 0x50: switch (dev->type) { + default: case INTEL_420TX: case INTEL_420ZX: case INTEL_430LX: - default: regs[0x50] = (val & 0xe5); break; case INTEL_430NX: @@ -467,17 +483,19 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) regs[0x51] = (regs[0x51] & 0xb0) | (val & 0x4f); i4x0_mask_bar(regs, dev->agpgart); break; + default: + break; } break; case 0x52: /* Cache Control Register */ switch (dev->type) { + default: case INTEL_420TX: case INTEL_420ZX: case INTEL_430LX: case INTEL_430FX: case INTEL_430VX: case INTEL_430TX: - default: regs[0x52] = (val & 0xfb); break; case INTEL_430NX: @@ -515,6 +533,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) /* Not applicable to 440ZX as that does not support ECC. */ regs[0x53] = val; break; + default: + break; } break; case 0x54: @@ -534,6 +554,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440FX: regs[0x54] = val & 0x82; break; + default: + break; } break; case 0x55: @@ -553,6 +575,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440EX: regs[0x55] = val; break; + default: + break; } break; case 0x56: @@ -577,6 +601,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440EX: regs[0x56] = val; break; + default: + break; } break; case 0x57: @@ -628,10 +654,10 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) break; case 0x58: switch (dev->type) { + default: case INTEL_420TX: case INTEL_420ZX: case INTEL_430LX: - default: regs[0x58] = val & 0x01; break; case INTEL_430NX: @@ -720,6 +746,7 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) break; } switch (dev->type) { + default: case INTEL_420TX: case INTEL_420ZX: case INTEL_430LX: @@ -731,7 +758,6 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440BX: case INTEL_440ZX: case INTEL_440GX: - default: regs[addr] = val; break; case INTEL_430FX: @@ -768,6 +794,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_430TX: regs[addr] = val & 0x7f; break; + default: + break; } break; case 0x66: @@ -786,6 +814,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440ZX: regs[addr] = val; break; + default: + break; } break; case 0x67: @@ -810,6 +840,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_430TX: regs[addr] = val & 0xb7; break; + default: + break; } break; case 0x68: @@ -838,6 +870,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440ZX: regs[0x68] = (regs[0x68] & 0x3f) | (val & 0xc0); break; + default: + break; } break; case 0x69: @@ -856,6 +890,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440ZX: regs[0x69] = val & 0x3f; break; + default: + break; } break; case 0x6a: @@ -880,6 +916,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) else regs[addr] = val & 0x33; break; + default: + break; } break; case 0x6c: @@ -899,6 +937,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) else if (addr == 0x6d) regs[addr] = val & 0xcf; break; + default: + break; } break; case 0x6f: @@ -909,6 +949,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440EX: regs[addr] = val & 0xcf; break; + default: + break; } break; case 0x70: @@ -930,6 +972,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440EX: regs[addr] = val & 0xf8; break; + default: + break; } break; case 0x71: @@ -953,6 +997,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440LX: regs[addr] = val & 0x1f; break; + default: + break; } break; case 0x72: /* SMRAM */ @@ -998,6 +1044,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) i4x0_smram_handler_phase1(dev); } break; + default: + break; } break; case 0x74: @@ -1008,6 +1056,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440GX: regs[0x74] = val; break; + default: + break; } break; case 0x75: @@ -1018,6 +1068,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440ZX: case INTEL_440GX: regs[addr] = val; + default: + break; } break; case 0x77: @@ -1025,6 +1077,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440BX: case INTEL_440ZX: regs[0x77] = val & 0x03; + default: + break; } break; case 0x78: @@ -1039,6 +1093,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440GX: regs[0x78] = val & 0x1f; break; + default: + break; } break; case 0x79: @@ -1054,6 +1110,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440GX: regs[0x79] = val; break; + default: + break; } break; case 0x7a: @@ -1066,6 +1124,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) if (val & 0x40) io_sethandler(0x0022, 0x01, pm2_cntrl_read, NULL, NULL, pm2_cntrl_write, NULL, NULL, dev); break; + default: + break; } break; case 0x7c: @@ -1081,6 +1141,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440ZX: regs[0x7c] = val & 0x1f; break; + default: + break; } break; case 0x7d: @@ -1091,6 +1153,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_430NX: regs[0x7d] = val & 0x32; break; + default: + break; } break; case 0x7e: @@ -1102,6 +1166,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_430NX: regs[addr] = val; break; + default: + break; } break; case 0x80: @@ -1111,6 +1177,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440GX: regs[0x80] &= ~(val & 0x03); break; + default: + break; } break; case 0x90: @@ -1132,6 +1200,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440GX: regs[0x90] = val; break; + default: + break; } break; case 0x91: @@ -1144,6 +1214,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) /* Not applicable on 82443EX and 82443ZX. */ regs[0x91] &= ~(val & 0x11); break; + default: + break; } break; case 0x92: @@ -1157,6 +1229,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440GX: regs[0x92] &= ~(val & 0x1f); break; + default: + break; } break; case 0x93: @@ -1170,6 +1244,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) regs[0x93] = (val & 0x0e); trc_write(0x0093, val & 0x06, NULL); break; + default: + break; } break; case 0xa7: @@ -1178,6 +1254,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440EX: regs[0xa7] = val & 0x1f; break; + default: + break; } break; case 0xa8: @@ -1190,6 +1268,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440GX: regs[addr] = (val & 0x03); break; + default: + break; } break; case 0xb0: @@ -1201,6 +1281,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440GX: regs[0xb0] = (val & 0x80); break; + default: + break; } break; case 0xb1: @@ -1214,6 +1296,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440GX: regs[0xb1] = (val & 0xa0); break; + default: + break; } break; case 0xb4: @@ -1226,6 +1310,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) regs[0xb4] = (val & 0x3f); i4x0_mask_bar(regs, dev->agpgart); break; + default: + break; } break; case 0xb9: @@ -1238,6 +1324,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) regs[0xb9] = (val & 0xf0); i4x0_mask_bar(regs, dev->agpgart); break; + default: + break; } break; @@ -1252,6 +1340,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) regs[addr] = val; i4x0_mask_bar(regs, dev->agpgart); break; + default: + break; } break; @@ -1261,6 +1351,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440EX: regs[addr] = (val & 0xf8); break; + default: + break; } break; @@ -1270,6 +1362,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440EX: regs[addr] = (val & 0xf8); break; + default: + break; } break; @@ -1287,6 +1381,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440GX: regs[addr] = val; break; + default: + break; } break; case 0xca: @@ -1298,6 +1394,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440ZX: regs[addr] = val & 0xe7; break; + default: + break; } break; case 0xcb: @@ -1309,6 +1407,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440ZX: regs[addr] = val & 0xa7; break; + default: + break; } break; case 0xcc: @@ -1320,6 +1420,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440ZX: regs[0xcc] = (val & 0x58); break; + default: + break; } break; case 0xe0: @@ -1339,6 +1441,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) if (!regs_l[addr]) regs[addr] = val; break; + default: + break; } break; case 0xe5: @@ -1350,6 +1454,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) if (!regs_l[addr]) regs[addr] = (val & 0x3f); break; + default: + break; } break; case 0xe7: @@ -1364,6 +1470,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) regs[0xe7] |= (val & 0x7f); } break; + default: + break; } break; case 0xf0: @@ -1373,6 +1481,8 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440GX: regs[0xf0] = (val & 0xc0); break; + default: + break; } break; case 0xf1: @@ -1382,8 +1492,13 @@ i4x0_write(int func, int addr, uint8_t val, void *priv) case INTEL_440GX: regs[0xf1] = (val & 0x03); break; + default: + break; } break; + + default: + break; } } @@ -1409,7 +1524,6 @@ static void i4x0_reset(void *priv) { i4x0_t *dev = (i4x0_t *) priv; - int i; if ((dev->type == INTEL_440LX) || (dev->type == INTEL_440BX) || (dev->type == INTEL_440ZX)) memset(dev->regs_locked, 0x00, 256 * sizeof(uint8_t)); @@ -1419,10 +1533,10 @@ i4x0_reset(void *priv) else i4x0_write(0, 0x59, 0x0f, priv); - for (i = 0; i < 6; i++) + for (uint8_t i = 0; i < 6; i++) i4x0_write(0, 0x5a + i, 0x00, priv); - for (i = 0; i <= dev->max_drb; i++) + for (uint8_t i = 0; i <= dev->max_drb; i++) i4x0_write(0, 0x60 + i, dev->drb_default, priv); if (dev->type >= INTEL_430FX) { @@ -1443,9 +1557,9 @@ i4x0_reset(void *priv) } static void -i4x0_close(void *p) +i4x0_close(void *priv) { - i4x0_t *dev = (i4x0_t *) p; + i4x0_t *dev = (i4x0_t *) priv; smram_del(dev->smram_high); smram_del(dev->smram_low); @@ -1453,9 +1567,8 @@ i4x0_close(void *p) free(dev); } -static void - * - i4x0_init(const device_t *info) +static void * +i4x0_init(const device_t *info) { i4x0_t *dev = (i4x0_t *) malloc(sizeof(i4x0_t)); uint8_t *regs; @@ -1746,6 +1859,8 @@ static void dev->drb_unit = 8; dev->drb_default = 0x01; break; + default: + break; } regs[0x04] = 0x06; diff --git a/src/chipset/intel_82335.c b/src/chipset/intel_82335.c index 678c868f3..d4e62dd71 100644 --- a/src/chipset/intel_82335.c +++ b/src/chipset/intel_82335.c @@ -28,6 +28,7 @@ #include <86box/device.h> #include <86box/mem.h> #include <86box/chipset.h> +#include <86box/plat_unused.h> /* Shadow capabilities */ #define DISABLED_SHADOW (MEM_READ_EXTANY | MEM_WRITE_EXTANY) @@ -56,12 +57,10 @@ #define DEFINE_RC1_REMAP_SIZE ((dev->regs[0x24] & 0x02) ? 128 : 256) #define DEFINE_RC2_REMAP_SIZE ((dev->regs[0x26] & 0x02) ? 128 : 256) -typedef struct -{ +typedef struct intel_82335_t { + uint16_t regs[256]; - uint16_t regs[256], - - cfg_locked; + uint16_t cfg_locked; } intel_82335_t; @@ -109,7 +108,9 @@ intel_82335_write(uint16_t addr, uint16_t val, void *priv) shadowbios_write = !!(dev->regs[0x22] & 0x01); /* Base System 512/640KB set */ - // mem_set_mem_state_both(0x80000, 0x20000, (dev->regs[0x22] & 0x08) ? ENABLE_TOP_128KB : DISABLE_TOP_128KB); +#if 0 + mem_set_mem_state_both(0x80000, 0x20000, (dev->regs[0x22] & 0x08) ? ENABLE_TOP_128KB : DISABLE_TOP_128KB); +#endif /* Video RAM shadow*/ mem_set_mem_state_both(0xa0000, 0x20000, (dev->regs[0x22] & (0x04 << 8)) ? DETERMINE_VIDEO_RAM_WRITE_ACCESS : DISABLED_SHADOW); @@ -137,8 +138,11 @@ intel_82335_write(uint16_t addr, uint16_t val, void *priv) shadowbios_write = (dev->regs[0x2e] & (1 << i)) && (base == romsize); mem_set_mem_state_both(base, 0x8000, GRANULARITY_RECALC); } - break; } + break; + + default: + break; } } @@ -165,7 +169,7 @@ intel_82335_close(void *priv) } static void * -intel_82335_init(const device_t *info) +intel_82335_init(UNUSED(const device_t *info)) { intel_82335_t *dev = (intel_82335_t *) malloc(sizeof(intel_82335_t)); memset(dev, 0, sizeof(intel_82335_t)); diff --git a/src/chipset/intel_i450kx.c b/src/chipset/intel_i450kx.c index de6d25422..d2c82d4bd 100644 --- a/src/chipset/intel_i450kx.c +++ b/src/chipset/intel_i450kx.c @@ -35,6 +35,7 @@ i450GX is way more popular of an option but needs more stuff. #include <86box/device.h> #include <86box/mem.h> #include <86box/pci.h> +#include <86box/plat_unused.h> #include <86box/smram.h> #include <86box/spd.h> #include <86box/chipset.h> @@ -61,7 +62,8 @@ i450kx_log(const char *fmt, ...) typedef struct i450kx_t { smram_t *smram[2]; - uint8_t pb_pci_conf[256], mc_pci_conf[256]; + uint8_t pb_pci_conf[256]; + uint8_t mc_pci_conf[256]; uint8_t mem_state[2][256]; uint8_t bus_index; @@ -112,7 +114,9 @@ i450kx_vid_buf_recalc(i450kx_t *dev, int bus) { uint8_t *regs = bus ? dev->pb_pci_conf : dev->mc_pci_conf; +#if 0 // int state = (regs[0x58] & 0x02) ? (MEM_READ_EXTANY | MEM_WRITE_EXTANY) : (MEM_READ_DISABLED | MEM_WRITE_DISABLED); +#endif int state = (regs[0x58] & 0x02) ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY); if (bus) @@ -167,8 +171,10 @@ pb_write(int func, int addr, uint8_t val, void *priv) case 0x4a: case 0x4b: dev->pb_pci_conf[addr] = val; - // if (addr == 0x4a) - // pci_remap_bus(dev->bus_index, val); +#if 0 + if (addr == 0x4a) + pci_remap_bus(dev->bus_index, val); +#endif break; case 0x4c: @@ -366,6 +372,9 @@ pb_write(int func, int addr, uint8_t val, void *priv) case 0xcb: dev->pb_pci_conf[addr] = val; break; + + default: + break; } } @@ -590,6 +599,9 @@ mc_write(int func, int addr, uint8_t val, void *priv) case 0xcb: dev->mc_pci_conf[addr] = val; break; + + default: + break; } } @@ -613,7 +625,9 @@ i450kx_reset(void *priv) i450kx_t *dev = (i450kx_t *) priv; uint32_t i; +#if 0 // pclog("i450KX: i450kx_reset()\n"); +#endif /* Defaults PB */ dev->pb_pci_conf[0x00] = 0x86; @@ -671,8 +685,10 @@ i450kx_reset(void *priv) dev->pb_pci_conf[0xa6] = 0xfe; dev->pb_pci_conf[0xa7] = 0x00; /* Note: Do NOT reset these two registers on programmed (TRC) hard reset! */ - // dev->pb_pci_conf[0xb0] = 0x00; - // dev->pb_pci_conf[0xb1] = 0x00; +#if 0 + dev->pb_pci_conf[0xb0] = 0x00; + dev->pb_pci_conf[0xb1] = 0x00; +#endif dev->pb_pci_conf[0xb4] = 0x00; dev->pb_pci_conf[0xb5] = 0x00; dev->pb_pci_conf[0xb8] = 0x05; @@ -693,7 +709,9 @@ i450kx_reset(void *priv) dev->pb_pci_conf[0xca] = 0x00; dev->pb_pci_conf[0xcb] = 0x00; - // pci_remap_bus(dev->bus_index, 0x00); +#if 0 + pci_remap_bus(dev->bus_index, 0x00); +#endif i450kx_smram_recalc(dev, 1); i450kx_vid_buf_recalc(dev, 1); pb_write(0, 0x59, 0x30, dev); @@ -786,7 +804,7 @@ i450kx_close(void *priv) } static void * -i450kx_init(const device_t *info) +i450kx_init(UNUSED(const device_t *info)) { i450kx_t *dev = (i450kx_t *) malloc(sizeof(i450kx_t)); memset(dev, 0, sizeof(i450kx_t)); diff --git a/src/chipset/intel_piix.c b/src/chipset/intel_piix.c index 3a65d5de3..7ee28030c 100644 --- a/src/chipset/intel_piix.c +++ b/src/chipset/intel_piix.c @@ -40,6 +40,7 @@ #include <86box/pci.h> #include <86box/pic.h> #include <86box/pit.h> +#include <86box/plat.h> #include <86box/port_92.h> #include <86box/scsi_device.h> #include <86box/hdc.h> @@ -50,7 +51,7 @@ #include <86box/smbus.h> #include <86box/chipset.h> -typedef struct { +typedef struct piix_io_trap_t { struct _piix_ *dev; void *trap; uint8_t dev_id; @@ -58,14 +59,20 @@ typedef struct { } piix_io_trap_t; typedef struct _piix_ { - uint8_t cur_readout_reg, rev, - type, func_shift, - max_func, pci_slot, - no_mirq0, pad, - regs[4][256], - readout_regs[256], board_config[2]; - uint16_t func0_id, nvr_io_base, - acpi_io_base; + uint8_t cur_readout_reg; + uint8_t rev; + uint8_t type; + uint8_t func_shift; + uint8_t max_func; + uint8_t pci_slot; + uint8_t no_mirq0; + uint8_t pad; + uint8_t regs[4][256]; + uint8_t readout_regs[256]; + uint8_t board_config[2]; + uint16_t func0_id; + uint16_t nvr_io_base; + uint16_t acpi_io_base; double fast_off_period; sff8038i_t *bm[2]; smbus_piix4_t *smbus; @@ -135,6 +142,8 @@ smsc_ide_irqs(piix_t *dev) case 0x07: irq_line = 15; break; + default: + break; } sff_set_irq_line(dev->bm[0], irq_line); @@ -203,7 +212,7 @@ piix_ide_bm_handlers(piix_t *dev) } static uint8_t -kbc_alias_reg_read(uint16_t addr, void *p) +kbc_alias_reg_read(UNUSED(uint16_t addr), UNUSED(void *priv)) { uint8_t ret = inb(0x61); @@ -211,7 +220,7 @@ kbc_alias_reg_read(uint16_t addr, void *p) } static void -kbc_alias_reg_write(uint16_t addr, uint8_t val, void *p) +kbc_alias_reg_write(UNUSED(uint16_t addr), uint8_t val, UNUSED(void *priv)) { outb(0x61, val); } @@ -267,7 +276,7 @@ nvr_update_io_mapping(piix_t *dev) } static void -piix_trap_io(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv) +piix_trap_io(UNUSED(int size), UNUSED(uint16_t addr), UNUSED(uint8_t write), UNUSED(uint8_t val), void *priv) { piix_io_trap_t *trap = (piix_io_trap_t *) priv; @@ -555,8 +564,8 @@ piix_write(int func, int addr, uint8_t val, void *priv) break; case 0x6a: switch (dev->type) { - case 1: default: + case 1: fregs[0x6a] = (fregs[0x6a] & 0xfb) | (val & 0x04); fregs[0x0e] = (val & 0x04) ? 0x80 : 0x00; piix_log("PIIX: Write %02X\n", val); @@ -791,6 +800,8 @@ piix_write(int func, int addr, uint8_t val, void *priv) } } break; + default: + break; } else if (func == 1) switch (addr) { /* IDE */ @@ -1012,6 +1023,8 @@ piix_write(int func, int addr, uint8_t val, void *priv) nvr_read_addr_set(!!(val & 0x10), dev->nvr); } break; + default: + break; } else if (func == 3) switch (addr) { /* Power Management */ @@ -1145,6 +1158,8 @@ piix_write(int func, int addr, uint8_t val, void *priv) fregs[0x91] = val; smbus_update_io_mapping(dev); break; + default: + break; } } @@ -1409,9 +1424,9 @@ piix_reset_hard(piix_t *dev) } static void -piix_apm_out(uint16_t port, uint8_t val, void *p) +piix_apm_out(UNUSED(uint16_t port), UNUSED(uint8_t val), void *priv) { - piix_t *dev = (piix_t *) p; + piix_t *dev = (piix_t *) priv; if (dev->apm->do_smi) { if (dev->type < 4) @@ -1440,73 +1455,73 @@ piix_usb_update_interrupt(usb_t* usb, void *priv) } static void -piix_reset(void *p) +piix_reset(void *priv) { - piix_t *dev = (piix_t *) p; + piix_t *dev = (piix_t *) priv; if (dev->type > 3) { - piix_write(3, 0x04, 0x00, p); - piix_write(3, 0x5b, 0x00, p); + piix_write(3, 0x04, 0x00, priv); + piix_write(3, 0x5b, 0x00, priv); } else { - piix_write(0, 0xa0, 0x08, p); - piix_write(0, 0xa2, 0x00, p); - piix_write(0, 0xa4, 0x00, p); - piix_write(0, 0xa5, 0x00, p); - piix_write(0, 0xa6, 0x00, p); - piix_write(0, 0xa7, 0x00, p); - piix_write(0, 0xa8, 0x0f, p); + piix_write(0, 0xa0, 0x08, priv); + piix_write(0, 0xa2, 0x00, priv); + piix_write(0, 0xa4, 0x00, priv); + piix_write(0, 0xa5, 0x00, priv); + piix_write(0, 0xa6, 0x00, priv); + piix_write(0, 0xa7, 0x00, priv); + piix_write(0, 0xa8, 0x0f, priv); } /* Disable the PIC mouse latch. */ - piix_write(0, 0x4e, 0x03, p); + piix_write(0, 0x4e, 0x03, priv); if (dev->type == 5) - piix_write(0, 0xe1, 0x40, p); - piix_write(1, 0x04, 0x00, p); + piix_write(0, 0xe1, 0x40, priv); + piix_write(1, 0x04, 0x00, priv); if (dev->type == 5) { - piix_write(1, 0x09, 0x8a, p); - piix_write(1, 0x10, 0xf1, p); - piix_write(1, 0x11, 0x01, p); - piix_write(1, 0x14, 0xf5, p); - piix_write(1, 0x15, 0x03, p); - piix_write(1, 0x18, 0x71, p); - piix_write(1, 0x19, 0x01, p); - piix_write(1, 0x1c, 0x75, p); - piix_write(1, 0x1d, 0x03, p); + piix_write(1, 0x09, 0x8a, priv); + piix_write(1, 0x10, 0xf1, priv); + piix_write(1, 0x11, 0x01, priv); + piix_write(1, 0x14, 0xf5, priv); + piix_write(1, 0x15, 0x03, priv); + piix_write(1, 0x18, 0x71, priv); + piix_write(1, 0x19, 0x01, priv); + piix_write(1, 0x1c, 0x75, priv); + piix_write(1, 0x1d, 0x03, priv); } else - piix_write(1, 0x09, 0x80, p); - piix_write(1, 0x20, 0x01, p); - piix_write(1, 0x21, 0x00, p); - piix_write(1, 0x41, 0x00, p); - piix_write(1, 0x43, 0x00, p); + piix_write(1, 0x09, 0x80, priv); + piix_write(1, 0x20, 0x01, priv); + piix_write(1, 0x21, 0x00, priv); + piix_write(1, 0x41, 0x00, priv); + piix_write(1, 0x43, 0x00, priv); ide_pri_disable(); ide_sec_disable(); if (dev->type >= 3) { - piix_write(2, 0x04, 0x00, p); + piix_write(2, 0x04, 0x00, priv); if (dev->type == 5) { - piix_write(2, 0x10, 0x00, p); - piix_write(2, 0x11, 0x00, p); - piix_write(2, 0x12, 0x00, p); - piix_write(2, 0x13, 0x00, p); + piix_write(2, 0x10, 0x00, priv); + piix_write(2, 0x11, 0x00, priv); + piix_write(2, 0x12, 0x00, priv); + piix_write(2, 0x13, 0x00, priv); } else { - piix_write(2, 0x20, 0x01, p); - piix_write(2, 0x21, 0x00, p); - piix_write(2, 0x22, 0x00, p); - piix_write(2, 0x23, 0x00, p); + piix_write(2, 0x20, 0x01, priv); + piix_write(2, 0x21, 0x00, priv); + piix_write(2, 0x22, 0x00, priv); + piix_write(2, 0x23, 0x00, priv); } } if (dev->type >= 4) { - piix_write(0, 0xb0, is_pentium ? 0x00 : 0x04, p); - piix_write(3, 0x40, 0x01, p); - piix_write(3, 0x41, 0x00, p); - piix_write(3, 0x5b, 0x00, p); - piix_write(3, 0x80, 0x00, p); - piix_write(3, 0x90, 0x01, p); - piix_write(3, 0x91, 0x00, p); - piix_write(3, 0xd2, 0x00, p); + piix_write(0, 0xb0, is_pentium ? 0x00 : 0x04, priv); + piix_write(3, 0x40, 0x01, priv); + piix_write(3, 0x41, 0x00, priv); + piix_write(3, 0x5b, 0x00, priv); + piix_write(3, 0x80, 0x00, priv); + piix_write(3, 0x90, 0x01, priv); + piix_write(3, 0x91, 0x00, priv); + piix_write(3, 0xd2, 0x00, priv); } sff_set_irq_mode(dev->bm[0], 0, 0); @@ -1695,7 +1710,9 @@ piix_init(const device_t *info) else dev->board_config[1] |= 0x00; - // device_add(&i8254_sec_device); +#if 0 + device_add(&i8254_sec_device); +#endif return dev; } diff --git a/src/chipset/intel_sio.c b/src/chipset/intel_sio.c index 26f3cb422..fbfdb90fd 100644 --- a/src/chipset/intel_sio.c +++ b/src/chipset/intel_sio.c @@ -33,18 +33,19 @@ #include <86box/port_92.h> #include <86box/machine.h> #include <86box/chipset.h> +#include <86box/plat_unused.h> -typedef struct -{ - uint8_t id, - regs[256]; +typedef struct sio_t { + uint8_t id; + uint8_t regs[256]; - uint16_t timer_base, - timer_latch; + uint16_t timer_base; + uint16_t timer_latch; double fast_off_period; - pc_timer_t timer, fast_off_timer; + pc_timer_t timer; + pc_timer_t fast_off_timer; apm_t *apm; port_92_t *port_92; @@ -315,6 +316,8 @@ sio_write(int func, int addr, uint8_t val, void *priv) cpu_fast_off_count = val + 1; cpu_fast_off_period_set(cpu_fast_off_val, dev->fast_off_period); break; + default: + break; } } @@ -333,12 +336,13 @@ sio_read(int func, int addr, void *priv) } static void -sio_config_write(uint16_t addr, uint8_t val, void *priv) +sio_config_write(UNUSED(uint16_t addr), UNUSED(uint8_t val), UNUSED(void *priv)) { + // } static uint8_t -sio_config_read(uint16_t port, void *priv) +sio_config_read(uint16_t port, UNUSED(void *priv)) { uint8_t ret = 0x00; @@ -365,6 +369,9 @@ sio_config_read(uint16_t port, void *priv) break; } break; + + default: + break; } return ret; @@ -425,9 +432,9 @@ sio_reset_hard(void *priv) } static void -sio_apm_out(uint16_t port, uint8_t val, void *p) +sio_apm_out(UNUSED(uint16_t port), UNUSED(uint8_t val), void *priv) { - sio_t *dev = (sio_t *) p; + sio_t *dev = (sio_t *) priv; if (dev->apm->do_smi) dev->regs[0xaa] |= 0x80; @@ -443,32 +450,32 @@ sio_fast_off_count(void *priv) } static void -sio_reset(void *p) +sio_reset(void *priv) { - sio_t *dev = (sio_t *) p; + sio_t *dev = (sio_t *) priv; /* Disable the PIC mouse latch. */ - sio_write(0, 0x4d, 0x40, p); + sio_write(0, 0x4d, 0x40, priv); - sio_write(0, 0x57, 0x04, p); + sio_write(0, 0x57, 0x04, priv); dma_set_params(1, 0xffffffff); if (dev->id == 0x03) { - sio_write(0, 0xa0, 0x08, p); - sio_write(0, 0xa2, 0x00, p); - sio_write(0, 0xa4, 0x00, p); - sio_write(0, 0xa5, 0x00, p); - sio_write(0, 0xa6, 0x00, p); - sio_write(0, 0xa7, 0x00, p); - sio_write(0, 0xa8, 0x0f, p); + sio_write(0, 0xa0, 0x08, priv); + sio_write(0, 0xa2, 0x00, priv); + sio_write(0, 0xa4, 0x00, priv); + sio_write(0, 0xa5, 0x00, priv); + sio_write(0, 0xa6, 0x00, priv); + sio_write(0, 0xa7, 0x00, priv); + sio_write(0, 0xa8, 0x0f, priv); } } static void -sio_close(void *p) +sio_close(void *priv) { - sio_t *dev = (sio_t *) p; + sio_t *dev = (sio_t *) priv; free(dev); } @@ -542,7 +549,9 @@ sio_init(const device_t *info) timer_add(&dev->timer, NULL, NULL, 0); - // device_add(&i8254_sec_device); +#if 0 + device_add(&i8254_sec_device); +#endif return dev; } diff --git a/src/chipset/neat.c b/src/chipset/neat.c index 2613b8de9..bb13f23da 100644 --- a/src/chipset/neat.c +++ b/src/chipset/neat.c @@ -30,6 +30,7 @@ #include <86box/device.h> #include <86box/io.h> #include <86box/mem.h> +#include <86box/plat_unused.h> #include <86box/chipset.h> #define NEAT_DEBUG 0 @@ -200,7 +201,7 @@ #define RB11_EMSLEN 0xe0 /* EMS memory chunk size */ #define RB11_EMSLEN_SH 5 -typedef struct { +typedef struct emspage_t { int8_t enabled; /* 1=ENABLED */ char pad; uint16_t page; /* selected page in EMS block */ @@ -209,18 +210,18 @@ typedef struct { mem_mapping_t mapping; /* mapping entry for page */ } emspage_t; -typedef struct { +typedef struct neat_t { uint8_t regs[128]; /* all the CS8221 registers */ uint8_t indx; /* programmed index into registers */ char pad; - uint16_t ems_base, /* configured base address */ - ems_oldbase; - uint32_t ems_frame, /* configured frame address */ - ems_oldframe; - uint16_t ems_size, /* EMS size in KB */ - ems_pages; /* EMS size in pages */ + uint16_t ems_base; /* configured base address */ + uint16_t ems_oldbase; + uint32_t ems_frame; /* configured frame address */ + uint32_t ems_oldframe; + uint16_t ems_size; /* EMS size in KB */ + uint16_t ems_pages; /* EMS size in pages */ emspage_t ems[EMS_MAXPAGE]; /* EMS page registers */ } neat_t; @@ -340,6 +341,8 @@ ems_write(uint16_t port, uint8_t val, void *priv) ems->page |= (val & 0x7f); /* add new bits */ ems_recalc(dev, ems); break; + default: + break; } } @@ -359,6 +362,8 @@ ems_read(uint16_t port, void *priv) if (dev->ems[vpage].enabled) ret |= 0x80; break; + default: + break; } #if NEAT_DEBUG > 1 @@ -372,12 +377,12 @@ ems_read(uint16_t port, void *priv) static void ems_init(neat_t *dev, int en) { - int i; + uint8_t j; /* Remove if needed. */ if (!en) { if (dev->ems_base > 0) - for (i = 0; i < EMS_MAXPAGE; i++) { + for (uint8_t i = 0; i < EMS_MAXPAGE; i++) { /* Disable for now. */ mem_mapping_disable(&dev->ems[i].mapping); @@ -394,19 +399,19 @@ ems_init(neat_t *dev, int en) } /* Get configured I/O address. */ - i = (dev->regs[REG_RB9] & RB9_BASE) >> RB9_BASE_SH; - dev->ems_base = 0x0208 + (0x10 * i); + j = (dev->regs[REG_RB9] & RB9_BASE) >> RB9_BASE_SH; + dev->ems_base = 0x0208 + (0x10 * j); /* Get configured frame address. */ - i = (dev->regs[REG_RB9] & RB9_FRAME) >> RB9_FRAME_SH; - dev->ems_frame = 0xC0000 + (EMS_PGSIZE * i); + j = (dev->regs[REG_RB9] & RB9_FRAME) >> RB9_FRAME_SH; + dev->ems_frame = 0xC0000 + (EMS_PGSIZE * j); /* * For each supported page (we can have a maximum of 4), * create, initialize and disable the mappings, and set * up the I/O control handler. */ - for (i = 0; i < EMS_MAXPAGE; i++) { + for (uint8_t i = 0; i < EMS_MAXPAGE; i++) { /* Create and initialize a page mapping. */ mem_mapping_add(&dev->ems[i].mapping, dev->ems_frame + (EMS_PGSIZE * i), EMS_PGSIZE, @@ -608,6 +613,8 @@ neat_write(uint16_t port, uint8_t val, void *priv) case 7: /* 7 MB */ dev->ems_size = i << 10; break; + default: + break; } dev->ems_pages = (dev->ems_size << 10) / EMS_PGSIZE; if (dev->regs[REG_RB7] & RB7_EMSEN) { @@ -622,6 +629,8 @@ neat_write(uint16_t port, uint8_t val, void *priv) break; } break; + default: + break; } } @@ -660,17 +669,17 @@ neat_close(void *priv) } static void * -neat_init(const device_t *info) +neat_init(UNUSED(const device_t *info)) { neat_t *dev; - int i; + uint8_t dram_mode = 0; /* Create an instance. */ dev = (neat_t *) malloc(sizeof(neat_t)); memset(dev, 0x00, sizeof(neat_t)); /* Initialize some of the registers to specific defaults. */ - for (i = REG_RA0; i <= REG_RB11; i++) { + for (uint8_t i = REG_RA0; i <= REG_RB11; i++) { dev->indx = i; neat_write(0x0023, 0x00, dev); } @@ -682,7 +691,6 @@ neat_init(const device_t *info) * TODO: We might also want to set 'valid' waitstate * bits, based on our cpu speed. */ - i = 0; switch (mem_size) { case 512: /* 512KB */ /* 256K, 0, 0, 0 */ @@ -690,7 +698,7 @@ neat_init(const device_t *info) dev->regs[REG_RB6] |= (RTYPE_256K << RTYPE_SH); /* 256K */ dev->regs[REG_RB8] &= ~RB8_BANKS; /* one bank */ dev->regs[REG_RB8] |= (RTYPE_NONE << RTYPE_SH); /* NONE */ - i = 2; + dram_mode = 2; break; case 640: /* 640KB */ @@ -699,7 +707,7 @@ neat_init(const device_t *info) dev->regs[REG_RB6] |= (RTYPE_MIXED << RTYPE_SH); /* mixed */ dev->regs[REG_RB8] &= ~RB8_BANKS; /* one bank */ dev->regs[REG_RB8] |= (RTYPE_NONE << RTYPE_SH); /* NONE */ - i = 4; + dram_mode = 4; break; case 1024: /* 1MB */ @@ -708,7 +716,7 @@ neat_init(const device_t *info) dev->regs[REG_RB6] |= (RTYPE_256K << RTYPE_SH); /* 256K */ dev->regs[REG_RB8] &= ~RB8_BANKS; /* one bank */ dev->regs[REG_RB8] |= (RTYPE_NONE << RTYPE_SH); /* NONE */ - i = 5; + dram_mode = 5; break; case 1536: /* 1.5MB */ @@ -717,7 +725,7 @@ neat_init(const device_t *info) dev->regs[REG_RB6] |= (RTYPE_256K << RTYPE_SH); /* 256K */ dev->regs[REG_RB8] &= ~RB8_BANKS; /* one bank */ dev->regs[REG_RB8] |= (RTYPE_256K << RTYPE_SH); /* 256K */ - i = 7; + dram_mode = 7; break; case 1664: /* 1.64MB */ @@ -726,7 +734,7 @@ neat_init(const device_t *info) dev->regs[REG_RB6] |= (RTYPE_MIXED << RTYPE_SH); /* mixed */ dev->regs[REG_RB8] |= RB8_BANKS; /* two banks */ dev->regs[REG_RB8] |= (RTYPE_256K << RTYPE_SH); /* 256K */ - i = 10; + dram_mode = 10; break; case 2048: /* 2MB */ @@ -737,14 +745,14 @@ neat_init(const device_t *info) dev->regs[REG_RB8] |= RB8_BANKS; /* two banks */ dev->regs[REG_RB8] |= (RTYPE_256K << RTYPE_SH); /* 256K */ dev->regs[REG_RB8] |= RB8_4WAY; /* 4way intl */ - i = 11; + dram_mode = 11; #else /* 1M, 0, 0, 0 */ dev->regs[REG_RB6] &= ~RB6_BANKS; /* one bank */ dev->regs[REG_RB6] |= (RTYPE_1M << RTYPE_SH); /* 1M */ dev->regs[REG_RB8] &= ~RB8_BANKS; /* one bank */ dev->regs[REG_RB8] |= (RTYPE_NONE << RTYPE_SH); /* NONE */ - i = 3; + dram_mode = 3; #endif break; @@ -754,7 +762,7 @@ neat_init(const device_t *info) dev->regs[REG_RB6] |= (RTYPE_256K << RTYPE_SH); /* 256K */ dev->regs[REG_RB8] &= ~RB8_BANKS; /* one bank */ dev->regs[REG_RB8] |= (RTYPE_1M << RTYPE_SH); /* 1M */ - i = 8; + dram_mode = 8; break; case 4096: /* 4MB */ @@ -763,7 +771,7 @@ neat_init(const device_t *info) dev->regs[REG_RB6] |= (RTYPE_1M << RTYPE_SH); /* 1M */ dev->regs[REG_RB8] &= ~RB8_BANKS; /* one bank */ dev->regs[REG_RB8] |= (RTYPE_NONE << RTYPE_SH); /* NONE */ - i = 6; + dram_mode = 6; break; case 4224: /* 4.64MB */ @@ -772,7 +780,7 @@ neat_init(const device_t *info) dev->regs[REG_RB6] |= (RTYPE_MIXED << RTYPE_SH); /* mixed */ dev->regs[REG_RB8] |= RB8_BANKS; /* two banks */ dev->regs[REG_RB8] |= (RTYPE_1M << RTYPE_SH); /* 1M */ - i = 12; + dram_mode = 12; break; case 5120: /* 5MB */ @@ -781,7 +789,7 @@ neat_init(const device_t *info) dev->regs[REG_RB6] |= (RTYPE_256K << RTYPE_SH); /* 256K */ dev->regs[REG_RB8] |= RB8_BANKS; /* two banks */ dev->regs[REG_RB8] |= (RTYPE_1M << RTYPE_SH); /* 1M */ - i = 13; + dram_mode = 13; break; case 6144: /* 6MB */ @@ -790,7 +798,7 @@ neat_init(const device_t *info) dev->regs[REG_RB6] |= (RTYPE_1M << RTYPE_SH); /* 1M */ dev->regs[REG_RB8] &= ~RB8_BANKS; /* one bank */ dev->regs[REG_RB8] |= (RTYPE_1M << RTYPE_SH); /* 1M */ - i = 9; + dram_mode = 9; break; case 8192: /* 8MB */ @@ -800,13 +808,13 @@ neat_init(const device_t *info) dev->regs[REG_RB8] |= RB8_BANKS; /* two banks */ dev->regs[REG_RB8] |= (RTYPE_1M << RTYPE_SH); /* 1M */ dev->regs[REG_RB8] |= RB8_4WAY; /* 4way intl */ - i = 14; + dram_mode = 14; break; default: neat_log("NEAT: **INVALID DRAM SIZE %iKB !**\n", mem_size); } - if (i > 0) { + if (dram_mode > 0) { neat_log("NEAT: using DRAM mode #%i (mem=%iKB)\n", i, mem_size); } diff --git a/src/chipset/olivetti_eva.c b/src/chipset/olivetti_eva.c index ce9ba9a1f..2f43a01f1 100644 --- a/src/chipset/olivetti_eva.c +++ b/src/chipset/olivetti_eva.c @@ -32,9 +32,9 @@ #include <86box/chipset.h> #include <86box/video.h> #include <86box/mem.h> +#include <86box/plat_unused.h> -typedef struct -{ +typedef struct olivetti_eva_t { uint8_t reg_065; uint8_t reg_067; uint8_t reg_069; @@ -77,20 +77,24 @@ olivetti_eva_write(uint16_t addr, uint8_t val, void *priv) * Unfortunately, if triggered, the BIOS remapping function fails causing * a fatal error. Therefore, this code section is currently commented. */ - // if (val & 1){ - // /* - // * Set the register to 7 or above for the BIOS to trigger the - // * memory remapping function if shadowing is active. - // */ - // dev->reg_069 = 0x7; - // } - // if (val & 8) { - // /* - // * Activate shadowing for region e0000-fffff - // */ - // mem_remap_top(256); - // mem_set_mem_state_both(0xa0000, 0x60000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); - // } +#if 0 + if (val & 1) { + /* + * Set the register to 7 or above for the BIOS to trigger the + * memory remapping function if shadowing is active. + */ + dev->reg_069 = 0x7; + } + if (val & 8) { + /* + * Activate shadowing for region e0000-fffff + */ + mem_remap_top(256); + mem_set_mem_state_both(0xa0000, 0x60000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); + } +#endif + break; + default: break; } } @@ -111,6 +115,8 @@ olivetti_eva_read(uint16_t addr, void *priv) case 0x069: ret = dev->reg_069; break; + default: + break; } olivetti_eva_log("Olivetti EVA Gate Array: Read %02x at %02x\n", ret, addr); return ret; @@ -125,7 +131,7 @@ olivetti_eva_close(void *priv) } static void * -olivetti_eva_init(const device_t *info) +olivetti_eva_init(UNUSED(const device_t *info)) { olivetti_eva_t *dev = (olivetti_eva_t *) malloc(sizeof(olivetti_eva_t)); memset(dev, 0, sizeof(olivetti_eva_t)); diff --git a/src/chipset/opti283.c b/src/chipset/opti283.c index 8989139e4..1a6b21221 100644 --- a/src/chipset/opti283.c +++ b/src/chipset/opti283.c @@ -29,6 +29,7 @@ #include <86box/io.h> #include <86box/device.h> #include <86box/mem.h> +#include <86box/plat_unused.h> #include <86box/chipset.h> #ifdef ENABLE_OPTI283_LOG @@ -49,15 +50,15 @@ opti283_log(const char *fmt, ...) # define opti283_log(fmt, ...) #endif -typedef struct -{ - uint32_t phys, virt; +typedef struct mem_remapping_t { + uint32_t phys; + uint32_t virt; } mem_remapping_t; -typedef struct -{ - uint8_t index, shadow_high, - regs[256]; +typedef struct opti283_t { + uint8_t index; + uint8_t shadow_high; + uint8_t regs[256]; mem_remapping_t mem_remappings[2]; mem_mapping_t mem_mappings[2]; } opti283_t; @@ -234,8 +235,14 @@ opti283_write(uint16_t addr, uint8_t val, void *priv) dev->regs[dev->index] = val; opti283_shadow_recalc(dev); break; + + default: + break; } break; + + default: + break; } } @@ -260,7 +267,7 @@ opti283_close(void *priv) } static void * -opti283_init(const device_t *info) +opti283_init(UNUSED(const device_t *info)) { opti283_t *dev = (opti283_t *) malloc(sizeof(opti283_t)); memset(dev, 0x00, sizeof(opti283_t)); diff --git a/src/chipset/opti291.c b/src/chipset/opti291.c index b15b71260..b13ceab89 100644 --- a/src/chipset/opti291.c +++ b/src/chipset/opti291.c @@ -28,6 +28,7 @@ #include <86box/io.h> #include <86box/device.h> #include <86box/mem.h> +#include <86box/plat_unused.h> #include <86box/port_92.h> #include <86box/chipset.h> @@ -49,9 +50,9 @@ opti291_log(const char *fmt, ...) # define opti291_log(fmt, ...) #endif -typedef struct -{ - uint8_t index, regs[256]; +typedef struct opti291_t { + uint8_t index; + uint8_t regs[256]; port_92_t *port_92; } opti291_t; @@ -107,8 +108,14 @@ opti291_write(uint16_t addr, uint8_t val, void *priv) case 0x2c: dev->regs[dev->index] = val; break; + + default: + break; } break; + + default: + break; } } @@ -129,7 +136,7 @@ opti291_close(void *priv) } static void * -opti291_init(const device_t *info) +opti291_init(UNUSED(const device_t *info)) { opti291_t *dev = (opti291_t *) malloc(sizeof(opti291_t)); memset(dev, 0, sizeof(opti291_t)); diff --git a/src/chipset/opti391.c b/src/chipset/opti391.c index 1aad0a8cc..4c774a654 100644 --- a/src/chipset/opti391.c +++ b/src/chipset/opti391.c @@ -27,6 +27,7 @@ #include <86box/io.h> #include <86box/device.h> #include <86box/mem.h> +#include <86box/plat_unused.h> #include <86box/chipset.h> #ifdef ENABLE_OPTI391_LOG @@ -47,20 +48,19 @@ opti391_log(const char *fmt, ...) # define opti391_log(fmt, ...) #endif -typedef struct -{ - uint32_t phys, virt; +typedef struct mem_remapping_t { + uint32_t phys; + uint32_t virt; } mem_remapping_t; -typedef struct -{ - uint8_t index, regs[256]; +typedef struct opti391_t { + uint8_t index; + uint8_t regs[256]; } opti391_t; static void opti391_shadow_recalc(opti391_t *dev) { - uint32_t i; uint32_t base; uint8_t sh_enable; uint8_t sh_master; @@ -78,7 +78,7 @@ opti391_shadow_recalc(opti391_t *dev) sh_write_internal = (dev->regs[0x26] & 0x40); /* D0000-EFFFF */ - for (i = 0; i < 8; i++) { + for (uint8_t i = 0; i < 8; i++) { base = 0xd0000 + (i << 14); if (base >= 0xe0000) { sh_master = (dev->regs[0x22] & 0x40); @@ -108,7 +108,7 @@ opti391_shadow_recalc(opti391_t *dev) /* C0000-CFFFF */ sh_master = !(dev->regs[0x26] & 0x10); sh_wp = (dev->regs[0x26] & 0x20); - for (i = 0; i < 4; i++) { + for (uint8_t i = 0; i < 4; i++) { base = 0xc0000 + (i << 14); sh_enable = dev->regs[0x26] & (1 << i); @@ -164,8 +164,14 @@ opti391_write(uint16_t addr, uint8_t val, void *priv) dev->regs[dev->index] = val; opti391_shadow_recalc(dev); break; + + default: + break; } break; + + default: + break; } } @@ -190,7 +196,7 @@ opti391_close(void *priv) } static void * -opti391_init(const device_t *info) +opti391_init(UNUSED(const device_t *info)) { opti391_t *dev = (opti391_t *) malloc(sizeof(opti391_t)); memset(dev, 0x00, sizeof(opti391_t)); diff --git a/src/chipset/opti495.c b/src/chipset/opti495.c index c02f19e10..608a4eea5 100644 --- a/src/chipset/opti495.c +++ b/src/chipset/opti495.c @@ -31,11 +31,10 @@ #include <86box/port_92.h> #include <86box/chipset.h> -typedef struct -{ - uint8_t idx, - regs[256], - scratch[2]; +typedef struct opti495_t { + uint8_t idx; + uint8_t regs[256]; + uint8_t scratch[2]; } opti495_t; #ifdef ENABLE_OPTI495_LOG @@ -60,7 +59,6 @@ static void opti495_recalc(opti495_t *dev) { uint32_t base; - uint32_t i; uint32_t shflags = 0; shadowbios = 0; @@ -78,7 +76,7 @@ opti495_recalc(opti495_t *dev) mem_set_mem_state_both(0xf0000, 0x10000, shflags); - for (i = 0; i < 8; i++) { + for (uint8_t i = 0; i < 8; i++) { base = 0xd0000 + (i << 14); if ((dev->regs[0x22] & ((base >= 0xe0000) ? 0x20 : 0x40)) && (dev->regs[0x23] & (1 << i))) { @@ -95,7 +93,7 @@ opti495_recalc(opti495_t *dev) mem_set_mem_state_both(base, 0x4000, shflags); } - for (i = 0; i < 4; i++) { + for (uint8_t i = 0; i < 4; i++) { base = 0xc0000 + (i << 14); if ((dev->regs[0x26] & 0x10) && (dev->regs[0x26] & (1 << i))) { @@ -141,6 +139,8 @@ opti495_write(uint16_t addr, uint8_t val, void *priv) case 0x26: opti495_recalc(dev); break; + default: + break; } } break; @@ -149,6 +149,8 @@ opti495_write(uint16_t addr, uint8_t val, void *priv) case 0xe2: dev->scratch[~addr & 0x01] = val; break; + default: + break; } } @@ -172,6 +174,8 @@ opti495_read(uint16_t addr, void *priv) case 0xe2: ret = dev->scratch[~addr & 0x01]; break; + default: + break; } return ret; diff --git a/src/chipset/opti499.c b/src/chipset/opti499.c index b6219b1a4..acac4d87b 100644 --- a/src/chipset/opti499.c +++ b/src/chipset/opti499.c @@ -29,12 +29,13 @@ #include <86box/device.h> #include <86box/mem.h> #include <86box/port_92.h> +#include <86box/plat_unused.h> #include <86box/chipset.h> -typedef struct -{ +typedef struct opti499_t { uint8_t idx, - regs[256], scratch[2]; + uint8_t regs[256]; + uint8_t scratch[2]; } opti499_t; #ifdef ENABLE_OPTI499_LOG @@ -59,7 +60,6 @@ static void opti499_recalc(opti499_t *dev) { uint32_t base; - uint32_t i; uint32_t shflags = 0; shadowbios = 0; @@ -77,7 +77,7 @@ opti499_recalc(opti499_t *dev) mem_set_mem_state_both(0xf0000, 0x10000, shflags); - for (i = 0; i < 8; i++) { + for (uint8_t i = 0; i < 8; i++) { base = 0xd0000 + (i << 14); if ((dev->regs[0x22] & ((base >= 0xe0000) ? 0x20 : 0x40)) && (dev->regs[0x23] & (1 << i))) { @@ -93,7 +93,7 @@ opti499_recalc(opti499_t *dev) mem_set_mem_state_both(base, 0x4000, shflags); } - for (i = 0; i < 4; i++) { + for (uint8_t i = 0; i < 4; i++) { base = 0xc0000 + (i << 14); if ((dev->regs[0x26] & 0x10) && (dev->regs[0x26] & (1 << i))) { @@ -154,6 +154,9 @@ opti499_write(uint16_t addr, uint8_t val, void *priv) case 0x2d: opti499_recalc(dev); break; + + default: + break; } } break; @@ -162,6 +165,9 @@ opti499_write(uint16_t addr, uint8_t val, void *priv) case 0xe2: dev->scratch[~addr & 0x01] = val; break; + + default: + break; } } @@ -188,6 +194,9 @@ opti499_read(uint16_t addr, void *priv) case 0xe2: ret = dev->scratch[~addr & 0x01]; break; + + default: + break; } return ret; @@ -230,7 +239,7 @@ opti499_close(void *priv) } static void * -opti499_init(const device_t *info) +opti499_init(UNUSED(const device_t *info)) { opti499_t *dev = (opti499_t *) malloc(sizeof(opti499_t)); memset(dev, 0, sizeof(opti499_t)); diff --git a/src/chipset/opti5x7.c b/src/chipset/opti5x7.c index fdcb4fc3e..240be8241 100644 --- a/src/chipset/opti5x7.c +++ b/src/chipset/opti5x7.c @@ -32,10 +32,10 @@ #include <86box/port_92.h> #include <86box/chipset.h> -typedef struct -{ - uint8_t idx, is_pci, - regs[16]; +typedef struct opti5x7_t { + uint8_t idx; + uint8_t is_pci; + uint8_t regs[16]; } opti5x7_t; #ifdef ENABLE_OPTI5X7_LOG @@ -84,7 +84,7 @@ opti5x7_shadow_map(int cur_reg, opti5x7_t *dev) mem_set_mem_state_both(0xf0000, 0x10000, ((dev->regs[6] & 4) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[6] & 8) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY)); } } else { - for (int i = 0; i < 4; i++) { + for (uint8_t i = 0; i < 4; i++) { if (dev->is_pci) mem_set_mem_state_cpu_both(0xc0000 + ((cur_reg & 1) << 16) + (i << 14), 0x4000, ((dev->regs[cur_reg] & (1 << (2 * i))) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[cur_reg] & (2 << (2 * i))) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY)); else @@ -143,9 +143,13 @@ opti5x7_write(uint16_t addr, uint8_t val, void *priv) case 0x11: /* Master Cycle Control Register */ dev->regs[dev->idx] = val; break; + default: + break; } opti5x7_log("OPTi 5x7: dev->regs[%02x] = %02x\n", dev->idx, dev->regs[dev->idx]); break; + default: + break; } } diff --git a/src/chipset/opti822.c b/src/chipset/opti822.c index f9b0bf8a7..6f63e55ab 100644 --- a/src/chipset/opti822.c +++ b/src/chipset/opti822.c @@ -33,6 +33,7 @@ #include <86box/timer.h> #include <86box/pic.h> #include <86box/pit.h> +#include <86box/plat_unused.h> #include <86box/port_92.h> #include <86box/hdc_ide.h> #include <86box/hdc.h> @@ -40,10 +41,9 @@ #include <86box/chipset.h> #include <86box/spd.h> -typedef struct -{ - uint8_t irq_convert, - pci_regs[256]; +typedef struct opti822_t { + uint8_t irq_convert; + uint8_t pci_regs[256]; } opti822_t; // #define ENABLE_OPTI822_LOG 1 @@ -107,7 +107,9 @@ opti822_update_irqs(opti822_t *dev, int set) int irq_map[8] = { -1, 5, 9, 10, 11, 12, 14, 15 }; pic_t *temp_pic; - // dev->irq_convert = (dev->pci_regs[0x53] & 0x08); +#if 0 + dev->irq_convert = (dev->pci_regs[0x53] & 0x08); +#endif dev->irq_convert = 1; for (uint8_t i = 0; i < 16; i++) { @@ -325,6 +327,9 @@ opti822_pci_write(int func, int addr, uint8_t val, void *priv) } opti822_update_irqs(dev, 1); break; + + default: + break; } } @@ -383,7 +388,7 @@ opti822_close(void *p) } static void * -opti822_init(const device_t *info) +opti822_init(UNUSED(const device_t *info)) { opti822_t *dev = (opti822_t *) malloc(sizeof(opti822_t)); memset(dev, 0, sizeof(opti822_t)); diff --git a/src/chipset/opti895.c b/src/chipset/opti895.c index 18f1791e8..9c01e2ddf 100644 --- a/src/chipset/opti895.c +++ b/src/chipset/opti895.c @@ -32,12 +32,12 @@ #include <86box/port_92.h> #include <86box/chipset.h> -typedef struct -{ - uint8_t idx, forced_green, - is_pci, - regs[256], - scratch[2]; +typedef struct opti895_t { + uint8_t idx; + uint8_t forced_green; + uint8_t is_pci; + uint8_t regs[256]; + uint8_t scratch[2]; smram_t *smram; } opti895_t; @@ -64,7 +64,6 @@ static void opti895_recalc(opti895_t *dev) { uint32_t base; - uint32_t i; uint32_t shflags = 0; shadowbios = 0; @@ -85,7 +84,7 @@ opti895_recalc(opti895_t *dev) else mem_set_mem_state_both(0xf0000, 0x10000, shflags); - for (i = 0; i < 8; i++) { + for (uint8_t i = 0; i < 8; i++) { base = 0xd0000 + (i << 14); if (dev->regs[0x23] & (1 << i)) { @@ -109,7 +108,7 @@ opti895_recalc(opti895_t *dev) mem_set_mem_state_both(base, 0x4000, shflags); } - for (i = 0; i < 4; i++) { + for (uint8_t i = 0; i < 4; i++) { base = 0xc0000 + (i << 14); if (dev->regs[0x26] & (1 << i)) { @@ -185,6 +184,9 @@ opti895_write(uint16_t addr, uint8_t val, void *priv) break; } break; + + default: + break; } } break; @@ -193,6 +195,9 @@ opti895_write(uint16_t addr, uint8_t val, void *priv) case 0xe2: dev->scratch[addr - 0xe1] = val; break; + + default: + break; } } @@ -218,6 +223,9 @@ opti895_read(uint16_t addr, void *priv) case 0xe2: ret = dev->scratch[addr - 0xe1]; break; + + default: + break; } return ret; diff --git a/src/chipset/scamp.c b/src/chipset/scamp.c index 1ab5749f7..469450d4e 100644 --- a/src/chipset/scamp.c +++ b/src/chipset/scamp.c @@ -31,6 +31,7 @@ #include <86box/io.h> #include <86box/mem.h> #include <86box/nmi.h> +#include <86box/plat_unused.h> #include <86box/port_92.h> #include <86box/chipset.h> @@ -66,20 +67,21 @@ enum { BANK_4M_INTERLEAVED }; -typedef struct { +typedef struct ram_struct_t { void *parent; int bank; } ram_struct_t; -typedef struct { +typedef struct ems_struct_t { void *parent; int segment; } ems_struct_t; -typedef struct { +typedef struct scamp_t { int cfg_index; uint8_t cfg_regs[256]; - int cfg_enable, ram_config; + int cfg_enable; + int ram_config; int ems_index; int ems_autoinc; @@ -91,21 +93,23 @@ typedef struct { ram_struct_t ram_struct[2]; ems_struct_t ems_struct[20]; - uint32_t ram_virt_base[2], ram_phys_base[2]; + uint32_t ram_virt_base[2]; + uint32_t ram_phys_base[2]; uint32_t ram_mask[2]; - int row_virt_shift[2], row_phys_shift[2]; - int ram_interleaved[2], ibank_shift[2]; + int row_virt_shift[2]; + int row_phys_shift[2]; + int ram_interleaved[2]; + int ibank_shift[2]; port_92_t *port_92; } scamp_t; -static const struct -{ +static const struct { int size_kb; int rammap; int bank[2]; } ram_configs[] = { - {512, 0x0, { BANK_256K, BANK_NONE } }, + { 512, 0x0, { BANK_256K, BANK_NONE } }, { 1024, 0x1, { BANK_256K_INTERLEAVED, BANK_NONE } }, { 1536, 0x2, { BANK_256K_INTERLEAVED, BANK_256K } }, { 2048, 0x3, { BANK_256K_INTERLEAVED, BANK_256K_INTERLEAVED }}, @@ -118,12 +122,11 @@ static const struct { 16384, 0x9, { BANK_4M_INTERLEAVED, BANK_NONE } }, }; -static const struct -{ +static const struct { int bank[2]; int remapped; } rammap[16] = { - {{ BANK_256K, BANK_NONE }, 0}, + { { BANK_256K, BANK_NONE }, 0}, { { BANK_256K_INTERLEAVED, BANK_NONE }, 0}, { { BANK_256K_INTERLEAVED, BANK_256K }, 0}, { { BANK_256K_INTERLEAVED, BANK_256K_INTERLEAVED }, 0}, @@ -424,6 +427,9 @@ recalc_mappings(void *priv) virt_base += (1 << 24); dev->row_virt_shift[bank_nr] = 12; break; + + default: + break; } } else { switch (rammap[cur_rammap].bank[bank_nr]) { @@ -489,6 +495,9 @@ recalc_mappings(void *priv) virt_base += (1 << 24); dev->row_virt_shift[bank_nr] = 12; break; + + default: + break; } } switch (rammap[cur_rammap].bank[bank_nr]) { @@ -534,6 +543,9 @@ recalc_mappings(void *priv) ram_mirrored_interleaved_write, NULL, NULL); } break; + + default: + break; } } } @@ -584,7 +596,6 @@ scamp_ems_write(uint32_t addr, uint8_t val, void *priv) static void recalc_ems(scamp_t *dev) { - int segment; const uint32_t ems_base[12] = { 0xc0000, 0xc4000, 0xc8000, 0xcc000, 0xd0000, 0xd4000, 0xd8000, 0xdc000, @@ -593,7 +604,7 @@ recalc_ems(scamp_t *dev) uint32_t new_mappings[20]; uint16_t ems_enable; - for (segment = 0; segment < 20; segment++) + for (int segment = 0; segment < 20; segment++) new_mappings[segment] = 0xa0000 + segment * 0x4000; if (dev->cfg_regs[CFG_EMSEN1] & EMSEN1_EMSENAB) @@ -601,7 +612,7 @@ recalc_ems(scamp_t *dev) else ems_enable = 0; - for (segment = 0; segment < 12; segment++) { + for (int segment = 0; segment < 12; segment++) { if (ems_enable & (1 << segment)) { uint32_t phys_addr = dev->ems[segment] << 14; @@ -613,7 +624,7 @@ recalc_ems(scamp_t *dev) } } - for (segment = 0; segment < 20; segment++) { + for (int segment = 0; segment < 20; segment++) { if (new_mappings[segment] != dev->mappings[segment]) { dev->mappings[segment] = new_mappings[segment]; if (new_mappings[segment] < (mem_size * 1024)) { @@ -644,6 +655,8 @@ shadow_control(uint32_t addr, uint32_t size, int state, int ems_enable) case 3: mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); break; + default: + break; } flushmmucache_nopc(); @@ -756,6 +769,8 @@ scamp_write(uint16_t addr, uint8_t val, void *priv) case CFG_FEAXS: shadow_recalc(dev); break; + default: + break; } } break; @@ -767,6 +782,9 @@ scamp_write(uint16_t addr, uint8_t val, void *priv) mem_a20_recalc(); } break; + + default: + break; } } @@ -809,6 +827,9 @@ scamp_read(uint16_t addr, void *priv) softresetx86(); cpu_set_edx(); break; + + default: + break; } return ret; @@ -823,10 +844,9 @@ scamp_close(void *priv) } static void * -scamp_init(const device_t *info) +scamp_init(UNUSED(const device_t *info)) { uint32_t addr; - int c; scamp_t *dev = (scamp_t *) malloc(sizeof(scamp_t)); memset(dev, 0x00, sizeof(scamp_t)); @@ -847,7 +867,7 @@ scamp_init(const device_t *info) dev->ram_config = 0; /* Find best fit configuration for the requested memory size */ - for (c = 0; c < NR_ELEMS(ram_configs); c++) { + for (uint8_t c = 0; c < NR_ELEMS(ram_configs); c++) { if (mem_size < ram_configs[c].size_kb) break; @@ -863,7 +883,7 @@ scamp_init(const device_t *info) mem_mapping_set_exec(&ram_mid_mapping, ram + 0xf0000); addr = 0; - for (c = 0; c < 2; c++) { + for (uint8_t c = 0; c < 2; c++) { dev->ram_struct[c].parent = dev; dev->ram_struct[c].bank = c; mem_mapping_add(&dev->ram_mapping[c], 0, 0, @@ -924,12 +944,15 @@ scamp_init(const device_t *info) dev->ibank_shift[c] = 23; dev->ram_interleaved[c] = 1; break; + + default: + break; } } mem_set_mem_state(0xfe0000, 0x20000, MEM_READ_EXTANY | MEM_WRITE_EXTANY); - for (c = 0; c < 20; c++) { + for (uint8_t c = 0; c < 20; c++) { dev->ems_struct[c].parent = dev; dev->ems_struct[c].segment = c; mem_mapping_add(&dev->ems_mappings[c], diff --git a/src/chipset/scat.c b/src/chipset/scat.c index e2c1bf103..d6c620fd1 100644 --- a/src/chipset/scat.c +++ b/src/chipset/scat.c @@ -55,8 +55,9 @@ #define SCATSX_HIGH_PERFORMANCE_REFRESH 0x63 #define SCATSX_CAS_TIMING_FOR_DMA 0x64 -typedef struct { - uint8_t valid, pad; +typedef struct ems_page_t { + uint8_t valid; + uint8_t pad; uint8_t regs_2x8; uint8_t regs_2x9; @@ -75,7 +76,8 @@ typedef struct scat_t { int external_is_RAS; - ems_page_t null_page, page[32]; + ems_page_t null_page; + ems_page_t page[32]; mem_mapping_t low_mapping[32]; mem_mapping_t remap_mapping[6]; @@ -931,9 +933,8 @@ static void memmap_state_update(scat_t *dev) { uint32_t addr; - int i; - for (i = (((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? 0 : 16); i < 44; i++) { + for (uint8_t i = (((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? 0 : 16); i < 44; i++) { addr = get_addr(dev, 0x40000 + (i << 14), &dev->null_page); mem_mapping_set_exec(&dev->efff_mapping[i], addr < ((uint32_t) mem_size << 10) ? ram + addr : NULL); @@ -947,37 +948,40 @@ memmap_state_update(scat_t *dev) mem_mapping_set_exec(&dev->low_mapping[1], addr < ((uint32_t) mem_size << 10) ? ram + addr : NULL); - for (i = 2; i < 32; i++) { + for (uint8_t i = 2; i < 32; i++) { addr = get_addr(dev, i << 19, &dev->null_page); mem_mapping_set_exec(&dev->low_mapping[i], addr < ((uint32_t) mem_size << 10) ? ram + addr : NULL); } if ((dev->regs[SCAT_VERSION] & 0xf0) == 0) { - for (i = 0; i < max_map[(dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) | ((dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x40) >> 2)]; i++) - mem_mapping_enable(&dev->low_mapping[i]); + uint8_t j = 0; - for (; i < 32; i++) - mem_mapping_disable(&dev->low_mapping[i]); + for (j = 0; j < max_map[(dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) | ((dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x40) >> 2)]; j++) + mem_mapping_enable(&dev->low_mapping[j]); - for (i = 24; i < 36; i++) { + for (; j < 32; j++) + mem_mapping_disable(&dev->low_mapping[j]); + + for (j = 24; j < 36; j++) { if (((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) | (dev->regs[SCAT_EXTENDED_BOUNDARY] & 0x40)) < 4) - mem_mapping_disable(&dev->efff_mapping[i]); + mem_mapping_disable(&dev->efff_mapping[j]); else - mem_mapping_enable(&dev->efff_mapping[i]); + mem_mapping_enable(&dev->efff_mapping[j]); } } else { - for (i = 0; i < max_map_sx[dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f]; i++) - mem_mapping_enable(&dev->low_mapping[i]); + uint8_t j = 0; + for (j = 0; j < max_map_sx[dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f]; j++) + mem_mapping_enable(&dev->low_mapping[j]); - for (; i < 32; i++) - mem_mapping_disable(&dev->low_mapping[i]); + for (; j < 32; j++) + mem_mapping_disable(&dev->low_mapping[j]); - for (i = 24; i < 36; i++) { + for (j = 24; j < 36; j++) { if ((dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) < 2 || (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) == 3) - mem_mapping_disable(&dev->efff_mapping[i]); + mem_mapping_disable(&dev->efff_mapping[j]); else - mem_mapping_enable(&dev->efff_mapping[i]); + mem_mapping_enable(&dev->efff_mapping[j]); } } @@ -985,21 +989,21 @@ memmap_state_update(scat_t *dev) if ((((dev->regs[SCAT_VERSION] & 0xf0) == 0) && (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) == 3) || (((dev->regs[SCAT_VERSION] & 0xf0) != 0) && (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) == 3)) { mem_mapping_disable(&dev->low_mapping[2]); - for (i = 0; i < 6; i++) { + for (uint8_t i = 0; i < 6; i++) { addr = get_addr(dev, 0x100000 + (i << 16), &dev->null_page); mem_mapping_set_exec(&dev->remap_mapping[i], addr < ((uint32_t) mem_size << 10) ? ram + addr : NULL); mem_mapping_enable(&dev->remap_mapping[i]); } } else { - for (i = 0; i < 6; i++) + for (uint8_t i = 0; i < 6; i++) mem_mapping_disable(&dev->remap_mapping[i]); if ((((dev->regs[SCAT_VERSION] & 0xf0) == 0) && (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x0f) > 4) || (((dev->regs[SCAT_VERSION] & 0xf0) != 0) && (dev->regs[SCAT_DRAM_CONFIGURATION] & 0x1f) > 3)) mem_mapping_enable(&dev->low_mapping[2]); } } else { - for (i = 0; i < 6; i++) + for (uint8_t i = 0; i < 6; i++) mem_mapping_disable(&dev->remap_mapping[i]); mem_mapping_enable(&dev->low_mapping[2]); @@ -1191,6 +1195,9 @@ scat_out(uint16_t port, uint8_t val, void *priv) if ((dev->regs[SCAT_EMS_CONTROL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) dev->reg_2xA = ((dev->regs[SCAT_VERSION] & 0xf0) == 0) ? val : val & 0xc3; break; + + default: + break; } } @@ -1258,6 +1265,8 @@ scat_in(uint16_t port, void *priv) if ((dev->regs[SCAT_EMS_CONTROL] & 0x41) == (0x40 | ((port & 0x10) >> 4))) ret = dev->reg_2xA; break; + default: + break; } return ret; @@ -1374,7 +1383,7 @@ static void * scat_init(const device_t *info) { scat_t *dev; - uint32_t i; + uint32_t j; uint32_t k; int sx; @@ -1384,7 +1393,7 @@ scat_init(const device_t *info) sx = (dev->type == 32) ? 1 : 0; - for (i = 0; i < sizeof(dev->regs); i++) + for (uint32_t i = 0; i < sizeof(dev->regs); i++) dev->regs[i] = 0xff; if (sx) { @@ -1445,7 +1454,7 @@ scat_init(const device_t *info) mem_write_scatb, mem_write_scatw, mem_write_scatl, ram + 0xf0000, MEM_MAPPING_INTERNAL, &dev->null_page); - for (i = 2; i < 32; i++) { + for (uint8_t i = 2; i < 32; i++) { mem_mapping_add(&dev->low_mapping[i], (i << 19), 0x80000, mem_read_scatb, mem_read_scatw, mem_read_scatl, mem_write_scatb, mem_write_scatw, mem_write_scatl, @@ -1453,27 +1462,27 @@ scat_init(const device_t *info) } if (sx) { - i = 16; + j = 16; k = 0x40000; } else { - i = 0; + j = 0; k = (dev->regs[SCAT_VERSION] < 4) ? 0x40000 : 0x60000; } mem_mapping_set_addr(&dev->low_mapping[31], 0xf80000, k); - for (; i < 44; i++) { - mem_mapping_add(&dev->efff_mapping[i], 0x40000 + (i << 14), 0x4000, + for (; j < 44; j++) { + mem_mapping_add(&dev->efff_mapping[j], 0x40000 + (j << 14), 0x4000, mem_read_scatb, mem_read_scatw, mem_read_scatl, mem_write_scatb, mem_write_scatw, mem_write_scatl, - mem_size > (256 + (i << 4)) ? ram + 0x40000 + (i << 14) : NULL, + mem_size > (256 + (j << 4)) ? ram + 0x40000 + (j << 14) : NULL, MEM_MAPPING_INTERNAL, &dev->null_page); if (sx) - mem_mapping_enable(&dev->efff_mapping[i]); + mem_mapping_enable(&dev->efff_mapping[j]); } if (sx) { - for (i = 24; i < 32; i++) { + for (uint8_t i = 24; i < 32; i++) { dev->page[i].valid = 1; dev->page[i].regs_2x8 = 0xff; dev->page[i].regs_2x9 = 0x03; @@ -1485,7 +1494,7 @@ scat_init(const device_t *info) mem_mapping_disable(&dev->ems_mapping[i]); } } else { - for (i = 0; i < 32; i++) { + for (uint8_t i = 0; i < 32; i++) { dev->page[i].valid = 1; dev->page[i].regs_2x8 = 0xff; dev->page[i].regs_2x9 = 0x03; @@ -1498,7 +1507,7 @@ scat_init(const device_t *info) } } - for (i = 0; i < 6; i++) { + for (uint8_t i = 0; i < 6; i++) { mem_mapping_add(&dev->remap_mapping[i], 0x100000 + (i << 16), 0x10000, mem_read_scatb, mem_read_scatw, mem_read_scatl, mem_write_scatb, mem_write_scatw, mem_write_scatl, diff --git a/src/chipset/sis_5511.c b/src/chipset/sis_5511.c index 462db88ea..d2010198a 100644 --- a/src/chipset/sis_5511.c +++ b/src/chipset/sis_5511.c @@ -32,6 +32,7 @@ #include <86box/hdc_ide.h> #include <86box/hdc_ide_sff8038i.h> #include <86box/pci.h> +#include <86box/plat_unused.h> #include <86box/port_92.h> #include <86box/smram.h> @@ -65,10 +66,13 @@ sis_5511_log(const char *fmt, ...) #endif typedef struct sis_5511_t { - uint8_t pci_conf[256], pci_conf_sb[2][256], - index, regs[16]; + uint8_t pci_conf[256]; + uint8_t pci_conf_sb[2][256]; + uint8_t index; + uint8_t regs[16]; - int nb_pci_slot, sb_pci_slot; + int nb_pci_slot; + int sb_pci_slot; sff8038i_t *ide_drive[2]; smram_t *smram; @@ -121,6 +125,9 @@ sis_5511_smram_recalc(sis_5511_t *dev) case 2: smram_enable(dev->smram, 0x000e0000, 0x000b0000, 0x8000, dev->pci_conf[0x65] & 0x10, 1); break; + + default: + break; } flushmmucache(); @@ -153,7 +160,7 @@ sis_5513_bm_handler(sis_5511_t *dev) } static void -sis_5511_write(int func, int addr, uint8_t val, void *priv) +sis_5511_write(UNUSED(int func), int addr, uint8_t val, void *priv) { sis_5511_t *dev = (sis_5511_t *) priv; @@ -331,12 +338,15 @@ sis_5511_write(int func, int addr, uint8_t val, void *priv) case 0x93: /* 5512 General Purpose Register Index */ dev->pci_conf[addr] = val; break; + + default: + break; } sis_5511_log("SiS 5511: dev->pci_conf[%02x] = %02x POST: %02x\n", addr, dev->pci_conf[addr], inb(0x80)); } static uint8_t -sis_5511_read(int func, int addr, void *priv) +sis_5511_read(UNUSED(int func), int addr, void *priv) { sis_5511_t *dev = (sis_5511_t *) priv; sis_5511_log("SiS 5511: dev->pci_conf[%02x] (%02x) POST %02x\n", addr, dev->pci_conf[addr], inb(0x80)); @@ -428,6 +438,9 @@ sis_5513_pci_to_isa_write(int addr, uint8_t val, sis_5511_t *dev) case 0x6a: /* GPIO Status Register */ dev->pci_conf_sb[0][addr] &= val & 0x15; break; + + default: + break; } } @@ -514,6 +527,9 @@ sis_5513_ide_write(int addr, uint8_t val, sis_5511_t *dev) case 0x4f: /* Prefetch Count of Secondary Channel (High Byte) */ dev->pci_conf_sb[1][addr] = val; break; + + default: + break; } } @@ -528,6 +544,9 @@ sis_5513_write(int func, int addr, uint8_t val, void *priv) case 1: sis_5513_ide_write(addr, val, dev); break; + + default: + break; } sis_5511_log("SiS 5513: dev->pci_conf[%02x][%02x] = %02x POST: %02x\n", func, addr, dev->pci_conf_sb[func][addr], inb(0x80)); } @@ -567,6 +586,9 @@ sis_5513_isa_write(uint16_t addr, uint8_t val, void *priv) case 2: cpu_set_isa_pci_div(3); break; + + default: + break; } break; case 0x01: @@ -587,9 +609,15 @@ sis_5513_isa_write(uint16_t addr, uint8_t val, void *priv) case 0x0b: dev->regs[dev->index] = val; break; + + default: + break; } sis_5511_log("SiS 5513-ISA: dev->regs[%02x] = %02x POST: %02x\n", dev->index + 0x50, dev->regs[dev->index], inb(0x80)); break; + + default: + break; } } @@ -700,7 +728,7 @@ sis_5511_close(void *priv) } static void * -sis_5511_init(const device_t *info) +sis_5511_init(UNUSED(const device_t *info)) { sis_5511_t *dev = (sis_5511_t *) malloc(sizeof(sis_5511_t)); memset(dev, 0, sizeof(sis_5511_t)); diff --git a/src/chipset/sis_5571.c b/src/chipset/sis_5571.c index c158e2d63..950146ed4 100644 --- a/src/chipset/sis_5571.c +++ b/src/chipset/sis_5571.c @@ -30,6 +30,7 @@ #include <86box/mem.h> #include <86box/pci.h> #include <86box/pic.h> +#include <86box/plat_unused.h> #include <86box/port_92.h> #include <86box/hdc_ide.h> #include <86box/hdc_ide_sff8038i.h> @@ -74,9 +75,11 @@ sis_5571_log(const char *fmt, ...) #endif typedef struct sis_5571_t { - uint8_t pci_conf[256], pci_conf_sb[3][256]; + uint8_t pci_conf[256]; + uint8_t pci_conf_sb[3][256]; - int nb_pci_slot, sb_pci_slot; + int nb_pci_slot; + int sb_pci_slot; port_92_t *port_92; sff8038i_t *ide_drive[2]; @@ -117,6 +120,9 @@ sis_5571_smm_recalc(sis_5571_t *dev) case 0x03: smram_enable(dev->smram, 0xa0000, 0xa0000, 0x10000, (dev->pci_conf[0xa3] & 0x10), 1); break; + + default: + break; } flushmmucache(); @@ -149,7 +155,7 @@ sis_5571_bm_handler(sis_5571_t *dev) } static void -memory_pci_bridge_write(int func, int addr, uint8_t val, void *priv) +memory_pci_bridge_write(UNUSED(int func), int addr, uint8_t val, void *priv) { sis_5571_t *dev = (sis_5571_t *) priv; @@ -324,12 +330,15 @@ memory_pci_bridge_write(int func, int addr, uint8_t val, void *priv) dev->pci_conf[addr] = val & 0xd0; sis_5571_smm_recalc(dev); break; + + default: + break; } sis_5571_log("SiS5571: dev->pci_conf[%02x] = %02x\n", addr, val); } static uint8_t -memory_pci_bridge_read(int func, int addr, void *priv) +memory_pci_bridge_read(UNUSED(int func), int addr, void *priv) { sis_5571_t *dev = (sis_5571_t *) priv; sis_5571_log("SiS5571: dev->pci_conf[%02x] (%02x)\n", addr, dev->pci_conf[addr]); @@ -375,6 +384,9 @@ pci_isa_bridge_write(int func, int addr, uint8_t val, void *priv) case 2: cpu_set_isa_pci_div(3); break; + + default: + break; } break; @@ -498,6 +510,9 @@ pci_isa_bridge_write(int func, int addr, uint8_t val, void *priv) case 0x77: /* Monitor Standby Timer Reload And Monitor Standby State ExitControl */ dev->pci_conf_sb[0][addr] = val; break; + + default: + break; } sis_5571_log("SiS5571-SB: dev->pci_conf[%02x] = %02x\n", addr, val); break; @@ -577,6 +592,9 @@ pci_isa_bridge_write(int func, int addr, uint8_t val, void *priv) case 0x4f: /* Prefetch Count of Secondary Channel (High Byte) */ dev->pci_conf_sb[1][addr] = val; break; + + default: + break; } sis_5571_log("SiS5571-IDE: dev->pci_conf[%02x] = %02x\n", addr, val); break; @@ -615,8 +633,14 @@ pci_isa_bridge_write(int func, int addr, uint8_t val, void *priv) case 0x3c: /* Interrupt Line */ dev->pci_conf_sb[2][addr] = val; break; + + default: + break; } sis_5571_log("SiS5571-USB: dev->pci_conf[%02x] = %02x\n", addr, val); + + default: + break; } } @@ -635,6 +659,7 @@ pci_isa_bridge_read(int func, int addr, void *priv) case 2: sis_5571_log("SiS5571-USB: dev->pci_conf[%02x] (%02x)\n", addr, dev->pci_conf_sb[2][addr]); return dev->pci_conf_sb[2][addr]; + default: return 0xff; } @@ -654,6 +679,7 @@ sis_5571_usb_update_interrupt(usb_t* usb, void* priv) case 0x08: case 0x0d: break; + default: if (usb->irq_level) picint(1 << dev->pci_conf_sb[0][0x68] & 0x0f); @@ -670,7 +696,7 @@ sis_5571_usb_update_interrupt(usb_t* usb, void* priv) } static uint8_t -sis_5571_usb_handle_smi(usb_t* usb, void* priv) +sis_5571_usb_handle_smi(UNUSED(usb_t* usb), UNUSED(void* priv)) { /* Left unimplemented for now. */ return 1; @@ -740,7 +766,7 @@ sis_5571_close(void *priv) } static void * -sis_5571_init(const device_t *info) +sis_5571_init(UNUSED(const device_t *info)) { sis_5571_t *dev = (sis_5571_t *) malloc(sizeof(sis_5571_t)); memset(dev, 0x00, sizeof(sis_5571_t)); diff --git a/src/chipset/sis_85c310.c b/src/chipset/sis_85c310.c index 64efba5bb..296307fe1 100644 --- a/src/chipset/sis_85c310.c +++ b/src/chipset/sis_85c310.c @@ -10,12 +10,13 @@ #include <86box/io.h> #include <86box/device.h> #include <86box/mem.h> +#include <86box/plat_unused.h> #include <86box/chipset.h> -typedef struct -{ - uint8_t cur_reg, tries, - regs[258]; +typedef struct rabbit_t { + uint8_t cur_reg; + uint8_t tries; + uint8_t regs[258]; } rabbit_t; static void @@ -64,6 +65,8 @@ rabbit_recalcmapping(rabbit_t *dev) /* 128K at 0E0000-0FFFFF */ mem_set_mem_state(0x000e0000, 0x00020000, shflags); break; + default: + break; } flushmmucache(); @@ -89,6 +92,8 @@ rabbit_write(uint16_t addr, uint8_t val, void *priv) } else dev->regs[dev->cur_reg] = val; break; + default: + break; } } @@ -106,6 +111,9 @@ rabbit_read(uint16_t addr, void *priv) } else ret = dev->regs[dev->cur_reg]; break; + + default: + break; } return ret; @@ -120,7 +128,7 @@ rabbit_close(void *priv) } static void * -rabbit_init(const device_t *info) +rabbit_init(UNUSED(const device_t *info)) { rabbit_t *dev = (rabbit_t *) malloc(sizeof(rabbit_t)); memset(dev, 0, sizeof(rabbit_t)); diff --git a/src/chipset/sis_85c496.c b/src/chipset/sis_85c496.c index 6b09cf87e..6c0c1d0d3 100644 --- a/src/chipset/sis_85c496.c +++ b/src/chipset/sis_85c496.c @@ -32,6 +32,7 @@ #include <86box/dma.h> #include <86box/nvr.h> #include <86box/pic.h> +#include <86box/plat_unused.h> #include <86box/port_92.h> #include <86box/hdc_ide.h> #include <86box/machine.h> @@ -39,9 +40,10 @@ #include <86box/spd.h> typedef struct sis_85c496_t { - uint8_t cur_reg, rmsmiblk_count, - regs[127], - pci_conf[256]; + uint8_t cur_reg; + uint8_t rmsmiblk_count; + uint8_t regs[127]; + uint8_t pci_conf[256]; smram_t *smram; pc_timer_t rmsmiblk_timer; port_92_t *port_92; @@ -98,6 +100,8 @@ sis_85c497_isa_write(uint16_t port, uint8_t val, void *priv) dev->regs[dev->cur_reg] = val & 0xfc; dma_set_mask((val & 0x80) ? 0xffffffff : 0x00ffffff); break; + default: + break; } } @@ -182,7 +186,7 @@ sis_85c496_ide_handler(sis_85c496_t *dev) /* 00 - 3F = PCI Configuration, 40 - 7F = 85C496, 80 - FF = 85C497 */ static void -sis_85c49x_pci_write(int func, int addr, uint8_t val, void *priv) +sis_85c49x_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv) { sis_85c496_t *dev = (sis_85c496_t *) priv; uint8_t old; @@ -255,7 +259,9 @@ sis_85c49x_pci_write(int func, int addr, uint8_t val, void *priv) case 0x4d: case 0x4e: case 0x4f: - // dev->pci_conf[addr] = val; +#if 0 + dev->pci_conf[addr] = val; +#endif spd_write_drbs(dev->pci_conf, 0x48, 0x4f, 1); break; case 0x50: @@ -321,6 +327,8 @@ sis_85c49x_pci_write(int func, int addr, uint8_t val, void *priv) host_base = 0x000e0000; ram_base = 0x000b0000; break; + default: + break; } smram_enable(dev->smram, host_base, ram_base, size, @@ -459,11 +467,14 @@ sis_85c49x_pci_write(int func, int addr, uint8_t val, void *priv) dev->pci_conf[addr] = val & 0x6e; nvr_bank_set(0, !!(val & 0x40), dev->nvr); break; + + default: + break; } } static uint8_t -sis_85c49x_pci_read(int func, int addr, void *priv) +sis_85c49x_pci_read(UNUSED(int func), int addr, void *priv) { sis_85c496_t *dev = (sis_85c496_t *) priv; uint8_t ret = dev->pci_conf[addr]; @@ -481,6 +492,9 @@ sis_85c49x_pci_read(int func, int addr, void *priv) case 0x83: /*Port 70h Mirror*/ ret = inb(0x70); break; + + default: + break; } sis_85c496_log("[%04X:%08X] PCI Read %02X from %02X:%02X\n", CS, cpu_state.pc, ret, func, addr); @@ -607,7 +621,9 @@ static void pci_add_card(PCI_ADD_NORTHBRIDGE, sis_85c49x_pci_read, sis_85c49x_pci_write, dev); - // sis_85c497_isa_reset(dev); +#if 0 + sis_85c497_isa_reset(dev); +#endif dev->port_92 = device_add(&port_92_device); port_92_set_period(dev->port_92, 2ULL * TIMER_USEC); diff --git a/src/chipset/sis_85c4xx.c b/src/chipset/sis_85c4xx.c index 94a1fc876..97c989b73 100644 --- a/src/chipset/sis_85c4xx.c +++ b/src/chipset/sis_85c4xx.c @@ -28,6 +28,7 @@ #include <86box/timer.h> #include <86box/io.h> #include <86box/device.h> +#include <86box/plat_unused.h> #include <86box/port_92.h> #include <86box/mem.h> #include <86box/smram.h> @@ -35,14 +36,19 @@ #include <86box/machine.h> #include <86box/chipset.h> -typedef struct -{ - uint8_t cur_reg, tries, - reg_base, reg_last, - reg_00, is_471, - force_flush, shadowed, - smram_enabled, pad, - regs[39], scratch[2]; +typedef struct sis_85c4xx_t { + uint8_t cur_reg; + uint8_t tries; + uint8_t reg_base; + uint8_t reg_last; + uint8_t reg_00; + uint8_t is_471; + uint8_t force_flush; + uint8_t shadowed; + uint8_t smram_enabled; + uint8_t pad; + uint8_t regs[39]; + uint8_t scratch[2]; uint32_t mem_state[8]; smram_t *smram; port_92_t *port_92; @@ -124,7 +130,7 @@ sis_85c4xx_recalcmapping(sis_85c4xx_t *dev) } static void -sis_85c4xx_sw_smi_out(uint16_t port, uint8_t val, void *priv) +sis_85c4xx_sw_smi_out(UNUSED(uint16_t port), UNUSED(uint8_t val), void *priv) { sis_85c4xx_t *dev = (sis_85c4xx_t *) priv; @@ -235,6 +241,8 @@ sis_85c4xx_out(uint16_t port, uint8_t val, void *priv) port_92_add(dev->port_92); } break; + default: + break; } } else if ((dev->reg_base == 0x60) && (dev->cur_reg == 0x00)) dev->reg_00 = val; @@ -245,6 +253,8 @@ sis_85c4xx_out(uint16_t port, uint8_t val, void *priv) case 0xe2: dev->scratch[port - 0xe1] = val; return; + default: + break; } } @@ -273,6 +283,10 @@ sis_85c4xx_in(uint16_t port, void *priv) case 0xe1: case 0xe2: ret = dev->scratch[port - 0xe1]; + break; + + default: + break; } return ret; diff --git a/src/chipset/sis_85c50x.c b/src/chipset/sis_85c50x.c index db274a60b..8375c44c3 100644 --- a/src/chipset/sis_85c50x.c +++ b/src/chipset/sis_85c50x.c @@ -31,6 +31,7 @@ #include <86box/apm.h> #include <86box/machine.h> #include <86box/pic.h> +#include <86box/plat_unused.h> #include <86box/mem.h> #include <86box/smram.h> #include <86box/pci.h> @@ -57,9 +58,10 @@ sis_85c50x_log(const char *fmt, ...) #endif typedef struct sis_85c50x_t { - uint8_t index, - pci_conf[256], pci_conf_sb[256], - regs[256]; + uint8_t index; + uint8_t pci_conf[256]; + uint8_t pci_conf_sb[256]; + uint8_t regs[256]; smram_t *smram[2]; port_92_t *port_92; @@ -133,6 +135,8 @@ sis_85c50x_smm_recalc(sis_85c50x_t *dev) smram_enable(dev->smram[0], host_base, 0xb0000, 0x8000, (dev->pci_conf[0x65] & 0x10), 1); smram_enable(dev->smram[1], host_base ^ 0x00100000, 0xa0000, 0x8000, (dev->pci_conf[0x65] & 0x10), 1); break; + default: + break; } } @@ -213,7 +217,10 @@ sis_85c50x_write(int func, int addr, uint8_t val, void *priv) dev->pci_conf[addr] = (val & 0x7f); break; case 0x69: - dev->pci_conf[addr] &= ~(val); + dev->pci_conf[addr] &= ~val; + break; + + default: break; } } @@ -267,6 +274,9 @@ sis_85c50x_sb_write(int func, int addr, uint8_t val, void *priv) case 0x4b: /* ISA Master/DMA Memory Cycle Control Register 4 */ dev->pci_conf_sb[addr] = val; break; + + default: + break; } } @@ -314,8 +324,14 @@ sis_85c50x_isa_write(uint16_t addr, uint8_t val, void *priv) case 0x85: outb(0x70, val); break; + + default: + break; } break; + + default: + break; } } @@ -336,6 +352,9 @@ sis_85c50x_isa_read(uint16_t addr, void *priv) else ret = dev->regs[dev->index]; break; + + default: + break; } sis_85c50x_log("85C503 ISA: [R] (%04X) = %02X\n", addr, ret); @@ -401,7 +420,7 @@ sis_85c50x_close(void *priv) } static void * -sis_85c50x_init(const device_t *info) +sis_85c50x_init(UNUSED(const device_t *info)) { sis_85c50x_t *dev = (sis_85c50x_t *) malloc(sizeof(sis_85c50x_t)); memset(dev, 0x00, sizeof(sis_85c50x_t)); diff --git a/src/chipset/stpc.c b/src/chipset/stpc.c index eecaa0a58..6964e4221 100644 --- a/src/chipset/stpc.c +++ b/src/chipset/stpc.c @@ -30,6 +30,7 @@ #include <86box/timer.h> #include <86box/pit.h> #include <86box/device.h> +#include <86box/plat_unused.h> #include <86box/port_92.h> #include <86box/usb.h> #include <86box/hdc_ide.h> @@ -248,6 +249,9 @@ stpc_nb_write(int func, int addr, uint8_t val, void *priv) case 0x52: val &= 0x70; break; + + default: + break; } dev->pci_conf[0][addr] = val; @@ -432,6 +436,9 @@ stpc_ide_write(int func, int addr, uint8_t val, void *priv) sff_bus_master_set_irq(0x00, dev->bm[1]); } break; + + default: + break; } } @@ -489,6 +496,9 @@ stpc_isab_write(int func, int addr, uint8_t val, void *priv) case 0x05: val &= 0x01; break; + + default: + break; } dev->pci_conf[1][addr] = val; @@ -551,6 +561,8 @@ stpc_usb_write(int func, int addr, uint8_t val, void *priv) dev->pci_conf[3][addr] = val; ohci_update_mem_mapping(dev->usb, dev->pci_conf[3][0x11], dev->pci_conf[3][0x12], dev->pci_conf[3][0x13], 1); break; + default: + break; } dev->pci_conf[3][addr] = val; @@ -720,6 +732,9 @@ stpc_reg_write(uint16_t addr, uint8_t val, void *priv) val &= 0xf1; stpc_serial_handlers(val); break; + + default: + break; } dev->regs[dev->reg_offset] = val; @@ -957,7 +972,7 @@ stpc_serial_close(void *priv) } static void * -stpc_serial_init(const device_t *info) +stpc_serial_init(UNUSED(const device_t *info)) { stpc_log("STPC: serial_init()\n"); @@ -990,6 +1005,8 @@ stpc_lpt_handlers(stpc_lpt_t *dev, uint8_t val) case 0x3: lpt2_remove(); break; + default: + break; } switch (new_addr) { @@ -1068,7 +1085,7 @@ stpc_lpt_close(void *priv) } static void * -stpc_lpt_init(const device_t *info) +stpc_lpt_init(UNUSED(const device_t *info)) { stpc_log("STPC: lpt_init()\n"); diff --git a/src/chipset/umc_8886.c b/src/chipset/umc_8886.c index dea5ac99a..40d21ba2d 100644 --- a/src/chipset/umc_8886.c +++ b/src/chipset/umc_8886.c @@ -121,10 +121,10 @@ umc_8886_log(const char *fmt, ...) #define SB_ID dev->sb_id typedef struct umc_8886_t { - uint8_t max_func, /* Last function number */ - pci_conf_sb[2][256]; /* PCI Registers */ - uint16_t sb_id; /* Southbridge Revision */ - int has_ide; /* Check if Southbridge Revision is AF or F */ + uint8_t max_func; /* Last function number */ + uint8_t pci_conf_sb[2][256]; /* PCI Registers */ + uint16_t sb_id; /* Southbridge Revision */ + int has_ide; /* Check if Southbridge Revision is AF or F */ } umc_8886_t; static void @@ -212,6 +212,8 @@ umc_8886_write(int func, int addr, uint8_t val, void *priv) case 2: cpu_set_isa_pci_div(2); break; + default: + break; } break; @@ -250,6 +252,9 @@ umc_8886_write(int func, int addr, uint8_t val, void *priv) case 0xa5 ... 0xa8: dev->pci_conf_sb[func][addr] = val; break; + + default: + break; } break; @@ -271,8 +276,13 @@ umc_8886_write(int func, int addr, uint8_t val, void *priv) case 0x41: dev->pci_conf_sb[func][addr] = val; break; + + default: + break; } break; + default: + break; } } @@ -339,7 +349,7 @@ umc_8886_reset(void *priv) umc_8886_ide_handler(1); } - for (int i = 1; i < 5; i++) /* Disable all IRQ interrupts */ + for (uint8_t i = 1; i < 5; i++) /* Disable all IRQ interrupts */ pci_set_irq_routing(i, PCI_IRQ_DISABLED); cpu_set_isa_pci_div(3); diff --git a/src/chipset/umc_hb4.c b/src/chipset/umc_hb4.c index e3174be8a..04f10200f 100644 --- a/src/chipset/umc_hb4.c +++ b/src/chipset/umc_hb4.c @@ -106,6 +106,7 @@ #include <86box/mem.h> #include <86box/pci.h> +#include <86box/plat_unused.h> #include <86box/port_92.h> #include <86box/smram.h> @@ -142,9 +143,10 @@ hb4_log(const char *fmt, ...) #endif typedef struct hb4_t { - uint8_t shadow, - shadow_read, shadow_write, - pci_conf[256]; /* PCI Registers */ + uint8_t shadow; + uint8_t shadow_read; + uint8_t shadow_write; + uint8_t pci_conf[256]; /* PCI Registers */ int mem_state[9]; smram_t *smram[3]; /* SMRAM Handlers */ } hb4_t; @@ -261,7 +263,7 @@ hb4_smram(hb4_t *dev) } static void -hb4_write(int func, int addr, uint8_t val, void *priv) +hb4_write(UNUSED(int func), int addr, uint8_t val, void *priv) { hb4_t *dev = (hb4_t *) priv; @@ -322,6 +324,9 @@ hb4_write(int func, int addr, uint8_t val, void *priv) case 0x61: dev->pci_conf[addr] = val; break; + + default: + break; } } @@ -383,7 +388,7 @@ hb4_close(void *priv) } static void * -hb4_init(const device_t *info) +hb4_init(UNUSED(const device_t *info)) { hb4_t *dev = (hb4_t *) malloc(sizeof(hb4_t)); memset(dev, 0, sizeof(hb4_t)); diff --git a/src/chipset/via_apollo.c b/src/chipset/via_apollo.c index 61485fc91..0a6013a93 100644 --- a/src/chipset/via_apollo.c +++ b/src/chipset/via_apollo.c @@ -69,6 +69,8 @@ apollo_map(uint32_t addr, uint32_t size, int state) case 3: mem_set_mem_state_both(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL); break; + default: + break; } flushmmucache_nopc(); @@ -392,8 +394,8 @@ via_apollo_host_bridge_write(int func, int addr, uint8_t val, void *priv) smram_disable_all(); if (dev->id >= VIA_691) switch (val & 0x03) { - case 0x00: default: + case 0x00: apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 1); /* SMM: Code DRAM, Data DRAM */ apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 0); /* Non-SMM: Code PCI, Data PCI */ break; @@ -412,8 +414,8 @@ via_apollo_host_bridge_write(int func, int addr, uint8_t val, void *priv) } else if (dev->id >= VIA_597) switch (val & 0x03) { - case 0x00: default: + case 0x00: /* Disable SMI Address Redirection (default) */ apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 0); apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 0); @@ -458,6 +460,9 @@ via_apollo_host_bridge_write(int func, int addr, uint8_t val, void *priv) apollo_smram_map(dev, 1, 0x000a0000, 0x00020000, 3); apollo_smram_map(dev, 0, 0x000a0000, 0x00020000, 3); break; + + default: + break; } break; case 0x65: @@ -673,6 +678,8 @@ via_apollo_read(int func, int addr, void *priv) case 0: ret = dev->pci_conf[addr]; break; + default: + break; } return ret; @@ -685,6 +692,8 @@ via_apollo_write(int func, int addr, uint8_t val, void *priv) case 0: via_apollo_host_bridge_write(func, addr, val, priv); break; + default: + break; } } @@ -728,6 +737,9 @@ via_apollo_init(const device_t *info) case VIA_694: device_add(&via_mvp3_agp_device); break; + + default: + break; } if (dev->id >= VIA_597) diff --git a/src/chipset/via_pipc.c b/src/chipset/via_pipc.c index aa83c99b9..b39c21a1d 100644 --- a/src/chipset/via_pipc.c +++ b/src/chipset/via_pipc.c @@ -41,6 +41,7 @@ #include <86box/ddma.h> #include <86box/pci.h> #include <86box/pic.h> +#include <86box/plat_unused.h> #include <86box/port_92.h> #include <86box/hdc.h> #include <86box/hdc_ide.h> @@ -109,22 +110,28 @@ enum { typedef struct { struct _pipc_ *dev; void *trap; - uint32_t *sts_reg, *en_reg, mask; + uint32_t *sts_reg; + uint32_t *en_reg; + uint32_t mask; } pipc_io_trap_t; typedef struct _pipc_ { uint32_t local; - uint8_t max_func, max_pcs; + uint8_t max_func; + uint8_t max_pcs; - uint8_t pci_isa_regs[256], - ide_regs[256], - usb_regs[2][256], - power_regs[256], - ac97_regs[2][256], fmnmi_regs[4], fmnmi_status; + uint8_t pci_isa_regs[256]; + uint8_t ide_regs[256]; + uint8_t usb_regs[2][256]; + uint8_t power_regs[256]; + uint8_t ac97_regs[2][256]; + uint8_t fmnmi_regs[4]; + uint8_t fmnmi_status; sff8038i_t *bm[2]; nvr_t *nvr; - int nvr_enabled, slot; + int nvr_enabled; + int slot; ddma_t *ddma; smbus_piix4_t *smbus; usb_t *usb[2]; @@ -132,9 +139,14 @@ typedef struct _pipc_ { acpi_t *acpi; pipc_io_trap_t io_traps[TRAP_MAX]; - void *gameport, *ac97, *sio, *hwm; + void *gameport; + void *ac97; + void *sio; + void *hwm; sb_t *sb; - uint16_t midigame_base, sb_base, fmnmi_base; + uint16_t midigame_base; + uint16_t sb_base; + uint16_t fmnmi_base; } pipc_t; #ifdef ENABLE_PIPC_LOG @@ -162,7 +174,7 @@ static uint8_t pipc_read(int func, int addr, void *priv); static void pipc_write(int func, int addr, uint8_t val, void *priv); static void -pipc_io_trap_pact(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv) +pipc_io_trap_pact(UNUSED(int size), UNUSED(uint16_t addr), UNUSED(uint8_t write), UNUSED(uint8_t val), void *priv) { pipc_io_trap_t *trap = (pipc_io_trap_t *) priv; @@ -175,7 +187,7 @@ pipc_io_trap_pact(int size, uint16_t addr, uint8_t write, uint8_t val, void *pri } static void -pipc_io_trap_glb(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv) +pipc_io_trap_glb(UNUSED(int size), UNUSED(uint16_t addr), uint8_t write, UNUSED(uint8_t val), void *priv) { pipc_io_trap_t *trap = (pipc_io_trap_t *) priv; @@ -332,6 +344,8 @@ pipc_reset_hard(void *priv) case VIA_PIPC_8231: dev->usb_regs[i][0x08] = 0x1e; break; + default: + break; } dev->usb_regs[i][0x0a] = 0x03; @@ -392,6 +406,9 @@ pipc_reset_hard(void *priv) case VIA_PIPC_686B: dev->power_regs[0x08] = 0x40; break; + + default: + break; } if (dev->local == VIA_PIPC_686B) dev->power_regs[0x34] = 0x68; @@ -453,6 +470,9 @@ pipc_reset_hard(void *priv) case VIA_PIPC_8231: dev->ac97_regs[i][0x08] = (i == 0) ? 0x40 : 0x20; break; + + default: + break; } if (i == 0) { @@ -1567,36 +1587,36 @@ pipc_write(int func, int addr, uint8_t val, void *priv) } static void -pipc_reset(void *p) +pipc_reset(void *priv) { - pipc_t *dev = (pipc_t *) p; + pipc_t *dev = (pipc_t *) priv; uint8_t pm_func = dev->usb[1] ? 4 : 3; - pipc_write(pm_func, 0x41, 0x00, p); - pipc_write(pm_func, 0x48, 0x01, p); - pipc_write(pm_func, 0x49, 0x00, p); + pipc_write(pm_func, 0x41, 0x00, priv); + pipc_write(pm_func, 0x48, 0x01, priv); + pipc_write(pm_func, 0x49, 0x00, priv); - pipc_write(1, 0x04, 0x80, p); - pipc_write(1, 0x09, 0x85, p); - pipc_write(1, 0x10, 0xf1, p); - pipc_write(1, 0x11, 0x01, p); - pipc_write(1, 0x14, 0xf5, p); - pipc_write(1, 0x15, 0x03, p); - pipc_write(1, 0x18, 0x71, p); - pipc_write(1, 0x19, 0x01, p); - pipc_write(1, 0x1c, 0x75, p); - pipc_write(1, 0x1d, 0x03, p); - pipc_write(1, 0x20, 0x01, p); - pipc_write(1, 0x21, 0xcc, p); + pipc_write(1, 0x04, 0x80, priv); + pipc_write(1, 0x09, 0x85, priv); + pipc_write(1, 0x10, 0xf1, priv); + pipc_write(1, 0x11, 0x01, priv); + pipc_write(1, 0x14, 0xf5, priv); + pipc_write(1, 0x15, 0x03, priv); + pipc_write(1, 0x18, 0x71, priv); + pipc_write(1, 0x19, 0x01, priv); + pipc_write(1, 0x1c, 0x75, priv); + pipc_write(1, 0x1d, 0x03, priv); + pipc_write(1, 0x20, 0x01, priv); + pipc_write(1, 0x21, 0xcc, priv); if (dev->local <= VIA_PIPC_586B) - pipc_write(1, 0x40, 0x04, p); + pipc_write(1, 0x40, 0x04, priv); else - pipc_write(1, 0x40, 0x00, p); + pipc_write(1, 0x40, 0x00, priv); if (dev->local < VIA_PIPC_586B) - pipc_write(0, 0x44, 0x00, p); + pipc_write(0, 0x44, 0x00, priv); - pipc_write(0, 0x77, 0x00, p); + pipc_write(0, 0x77, 0x00, priv); } static void * @@ -1682,13 +1702,13 @@ pipc_init(const device_t *info) } static void -pipc_close(void *p) +pipc_close(void *priv) { - pipc_t *dev = (pipc_t *) p; + pipc_t *dev = (pipc_t *) priv; pipc_log("PIPC: close()\n"); - for (int i = 0; i < TRAP_MAX; i++) + for (uint8_t i = 0; i < TRAP_MAX; i++) io_trap_remove(dev->io_traps[i].trap); free(dev); diff --git a/src/chipset/via_vt82c49x.c b/src/chipset/via_vt82c49x.c index 3be28b155..2da72032b 100644 --- a/src/chipset/via_vt82c49x.c +++ b/src/chipset/via_vt82c49x.c @@ -35,13 +35,14 @@ #include <86box/port_92.h> #include <86box/chipset.h> -typedef struct -{ - uint8_t has_ide, index, - regs[256]; +typedef struct vt82c49x_t { + uint8_t has_ide; + uint8_t index; + uint8_t regs[256]; - smram_t *smram_smm, *smram_low, - *smram_high; + smram_t *smram_smm; + smram_t *smram_low; + smram_t *smram_high; } vt82c49x_t; #ifdef ENABLE_VT82C49X_LOG @@ -65,7 +66,6 @@ vt82c49x_log(const char *fmt, ...) static void vt82c49x_recalc(vt82c49x_t *dev) { - int i; int relocate; uint8_t reg; uint8_t bit; @@ -78,7 +78,7 @@ vt82c49x_recalc(vt82c49x_t *dev) shadowbios = 0; shadowbios_write = 0; - for (i = 0; i < 8; i++) { + for (uint8_t i = 0; i < 8; i++) { base = 0xc0000 + (i << 14); reg = 0x30 + (i >> 2); bit = (i & 3) << 1; @@ -123,7 +123,7 @@ vt82c49x_recalc(vt82c49x_t *dev) mem_set_mem_state_both(base, 0x4000, state); } - for (i = 0; i < 4; i++) { + for (uint8_t i = 0; i < 4; i++) { base = 0xe0000 + (i << 15); bit = 6 - (i & 2); @@ -189,6 +189,8 @@ vt82c49x_recalc(vt82c49x_t *dev) if (!shadow_bitmap) mem_remap_top(384); break; + default: + break; } } @@ -280,8 +282,14 @@ vt82c49x_write(uint16_t addr, uint8_t val, void *priv) (val & 0x40) ? "second" : "prim"); } break; + + default: + break; } break; + + default: + break; } } @@ -303,6 +311,9 @@ vt82c49x_read(uint16_t addr, void *priv) else if (dev->index < 0x80) ret = dev->regs[dev->index]; break; + + default: + break; } return ret; diff --git a/src/chipset/via_vt82c505.c b/src/chipset/via_vt82c505.c index 5d494d7c1..a45638c33 100644 --- a/src/chipset/via_vt82c505.c +++ b/src/chipset/via_vt82c505.c @@ -26,6 +26,7 @@ #include <86box/io.h> #include <86box/pic.h> #include <86box/pci.h> +#include <86box/plat_unused.h> #include <86box/device.h> #include <86box/chipset.h> @@ -116,6 +117,9 @@ vt82c505_write(int func, int addr, uint8_t val, void *priv) case 0x93: dev->pci_conf[addr] = val & 0xe0; break; + + default: + break; } } @@ -194,7 +198,7 @@ vt82c505_close(void *priv) } static void * -vt82c505_init(const device_t *info) +vt82c505_init(UNUSED(const device_t *info)) { vt82c505_t *dev = (vt82c505_t *) malloc(sizeof(vt82c505_t)); memset(dev, 0, sizeof(vt82c505_t)); diff --git a/src/chipset/vl82c480.c b/src/chipset/vl82c480.c index 4b9df40fa..055d91183 100644 --- a/src/chipset/vl82c480.c +++ b/src/chipset/vl82c480.c @@ -29,9 +29,9 @@ #include <86box/port_92.h> #include <86box/chipset.h> -typedef struct { - uint8_t idx, - regs[256]; +typedef struct vl82c480_t { + uint8_t idx; + uint8_t regs[256]; } vl82c480_t; static int @@ -40,8 +40,8 @@ vl82c480_shflags(uint8_t access) int ret = MEM_READ_EXTANY | MEM_WRITE_EXTANY; switch (access) { - case 0x00: default: + case 0x00: ret = MEM_READ_EXTANY | MEM_WRITE_EXTANY; break; case 0x01: @@ -81,9 +81,9 @@ vl82c480_recalc(vl82c480_t *dev) } static void -vl82c480_write(uint16_t addr, uint8_t val, void *p) +vl82c480_write(uint16_t addr, uint8_t val, void *priv) { - vl82c480_t *dev = (vl82c480_t *) p; + vl82c480_t *dev = (vl82c480_t *) priv; switch (addr) { case 0xec: @@ -121,17 +121,23 @@ vl82c480_write(uint16_t addr, uint8_t val, void *p) } break; +/* TODO: This is actually Fast A20 disable. */ +#if 0 case 0xee: if (mem_a20_alt) outb(0x92, inb(0x92) & ~2); break; +#endif + + default: + break; } } static uint8_t -vl82c480_read(uint16_t addr, void *p) +vl82c480_read(uint16_t addr, void *priv) { - vl82c480_t *dev = (vl82c480_t *) p; + vl82c480_t *dev = (vl82c480_t *) priv; uint8_t ret = 0xff; switch (addr) { @@ -143,24 +149,30 @@ vl82c480_read(uint16_t addr, void *p) ret = dev->regs[dev->idx]; break; +/* TODO: This is actually Fast A20 enable. */ +#if 0 case 0xee: if (!mem_a20_alt) outb(0x92, inb(0x92) | 2); break; +#endif case 0xef: softresetx86(); cpu_set_edx(); break; + + default: + break; } return ret; } static void -vl82c480_close(void *p) +vl82c480_close(void *priv) { - vl82c480_t *dev = (vl82c480_t *) p; + vl82c480_t *dev = (vl82c480_t *) priv; free(dev); } diff --git a/src/chipset/wd76c10.c b/src/chipset/wd76c10.c index 41fad0418..8d3f77d0c 100644 --- a/src/chipset/wd76c10.c +++ b/src/chipset/wd76c10.c @@ -37,6 +37,7 @@ #include <86box/hdc_ide.h> #include <86box/lpt.h> #include <86box/mem.h> +#include <86box/plat_unused.h> #include <86box/port_92.h> #include <86box/serial.h> #include <86box/chipset.h> @@ -63,17 +64,33 @@ wd76c10_log(const char *fmt, ...) # define wd76c10_log(fmt, ...) #endif -typedef struct -{ - uint16_t lock_reg, oscillator_40mhz, cache_flush, ems_page_reg, - ems_page_reg_pointer, port_shadow, pmc_interrupt, - high_mem_protect_boundry, delay_line, diagnostic, - nmi_status, pmc_input, pmc_timer, - pmc_output, ems_control_low_address_boundry, shadow_ram, - split_addr, bank32staddr, bank10staddr, - non_page_mode_dram_timing, mem_control, - refresh_control, disk_chip_select, prog_chip_sel_addr, - bus_timing_power_down_ctl, clk_control; +typedef struct wd76c10_t { + uint16_t lock_reg; + uint16_t oscillator_40mhz; + uint16_t cache_flush; + uint16_t ems_page_reg; + uint16_t ems_page_reg_pointer; + uint16_t port_shadow; + uint16_t pmc_interrupt; + uint16_t high_mem_protect_boundry; + uint16_t delay_line; + uint16_t diagnostic; + uint16_t nmi_status; + uint16_t pmc_input; + uint16_t pmc_timer; + uint16_t pmc_output; + uint16_t ems_control_low_address_boundry; + uint16_t shadow_ram; + uint16_t split_addr; + uint16_t bank32staddr; + uint16_t bank10staddr; + uint16_t non_page_mode_dram_timing; + uint16_t mem_control; + uint16_t refresh_control; + uint16_t disk_chip_select; + uint16_t prog_chip_sel_addr; + uint16_t bus_timing_power_down_ctl; + uint16_t clk_control; int lock; @@ -100,6 +117,8 @@ wd76c10_refresh_control(wd76c10_t *dev) case 4: serial_setup(dev->uart[1], 0x2e8, 3); break; + default: + break; } serial_remove(dev->uart[0]); @@ -117,6 +136,8 @@ wd76c10_refresh_control(wd76c10_t *dev) case 4: serial_setup(dev->uart[0], 0x2e8, 4); break; + default: + break; } lpt1_remove(); @@ -134,6 +155,9 @@ wd76c10_refresh_control(wd76c10_t *dev) lpt1_init(0x278); lpt1_irq(7); break; + + default: + break; } } @@ -153,6 +177,8 @@ wd76c10_split_addr(wd76c10_t *dev) if (((dev->shadow_ram >> 8) & 3) == 3) mem_remap_top(384); break; + default: + break; } } @@ -187,6 +213,8 @@ wd76c10_shadow_recalc(wd76c10_t *dev) case 3: mem_set_mem_state_both(0x20000, 0x80000, MEM_READ_DISABLED | MEM_WRITE_DISABLED); break; + default: + break; } switch ((dev->shadow_ram >> 8) & 3) { @@ -203,6 +231,8 @@ wd76c10_shadow_recalc(wd76c10_t *dev) case 3: mem_set_mem_state_both(0x20000, 0x80000, MEM_READ_DISABLED | (!!(dev->shadow_ram & 0x1000) ? MEM_WRITE_DISABLED : MEM_WRITE_INTERNAL)); break; + default: + break; } } @@ -309,6 +339,9 @@ wd76c10_write(uint16_t addr, uint16_t val, void *priv) dev->cache_flush = val; flushmmucache(); break; + + default: + break; } wd76c10_log("WD76C10: dev->regs[%04x] = %04x\n", addr, val); } @@ -326,6 +359,9 @@ wd76c10_write(uint16_t addr, uint16_t val, void *priv) dev->lock_reg = val & 0x00ff; LOCK = !(val & 0x00da); break; + + default: + break; } } @@ -424,7 +460,7 @@ wd76c10_close(void *priv) } static void * -wd76c10_init(const device_t *info) +wd76c10_init(UNUSED(const device_t *info)) { wd76c10_t *dev = (wd76c10_t *) malloc(sizeof(wd76c10_t)); memset(dev, 0, sizeof(wd76c10_t)); diff --git a/src/config.c b/src/config.c index 3a66bc01d..32824c2d4 100644 --- a/src/config.c +++ b/src/config.c @@ -515,13 +515,8 @@ load_machine(void) cpu_use_dynarec = !!ini_section_get_int(cat, "cpu_use_dynarec", 0); fpu_softfloat = !!ini_section_get_int(cat, "fpu_softfloat", 0); - /*The IBM PS/2 model 70 type 4 BIOS does heavy tests to the FPU in 80-bit precision mode, requiring softfloat - otherwise it would always throw error 12903 on POST, so always disable dynarec and enable softfloat for this - machine only.*/ - if (!strcmp(machines[machine].internal_name, "ibmps2_m70_type4")) { - cpu_use_dynarec = 0; + if (machine_has_flags(machine, MACHINE_SOFTFLOAT_ONLY)) fpu_softfloat = 1; - } p = ini_section_get_string(cat, "time_sync", NULL); if (p != NULL) { @@ -898,11 +893,11 @@ load_ports(void) sprintf(temp, "serial%d_enabled", c + 1); com_ports[c].enabled = !!ini_section_get_int(cat, temp, (c >= 2) ? 0 : 1); - /* +#if 0 sprintf(temp, "serial%d_device", c + 1); p = (char *) ini_section_get_string(cat, temp, "none"); com_ports[c].device = com_device_get_from_internal_name(p); - */ +#endif sprintf(temp, "serial%d_passthrough_enabled", c + 1); serial_passthrough_enabled[c] = !!ini_section_get_int(cat, temp, 0); @@ -1008,9 +1003,11 @@ load_storage_controllers(void) ide_ter_enabled = !!ini_section_get_int(cat, "ide_ter", 0); ide_qua_enabled = !!ini_section_get_int(cat, "ide_qua", 0); - /* TODO: Re-enable by default after we actually have a proper machine flag for this. */ - cassette_enable = !!ini_section_get_int(cat, "cassette_enabled", 0); - p = ini_section_get_string(cat, "cassette_file", ""); + if (machine_has_bus(machine, MACHINE_BUS_CASSETTE)) + cassette_enable = !!ini_section_get_int(cat, "cassette_enabled", 0); + else + cassette_enable = 0; + p = ini_section_get_string(cat, "cassette_file", ""); if (strlen(p) > 511) fatal("load_storage_controllers(): strlen(p) > 511\n"); else @@ -1078,8 +1075,8 @@ load_hard_disks(void) hdd[c].bus = hdd_string_to_bus(s, 0); switch (hdd[c].bus) { - case HDD_BUS_DISABLED: default: + case HDD_BUS_DISABLED: max_spt = max_hpc = max_tracks = 0; break; @@ -1309,8 +1306,10 @@ load_floppy_drives(void) else strncpy(floppyfns[c], p, 511); - /* if (*wp != L'\0') - config_log("Floppy%d: %ls\n", c, floppyfns[c]); */ +#if 0 + if (*wp != L'\0') + config_log("Floppy%d: %ls\n", c, floppyfns[c]); +#endif sprintf(temp, "fdd_%02i_writeprot", c + 1); ui_writeprot[c] = !!ini_section_get_int(cat, temp, 0); ini_section_delete_var(cat, temp); @@ -1375,8 +1374,10 @@ load_floppy_and_cdrom_drives(void) else strncpy(floppyfns[c], p, 511); - /* if (*wp != L'\0') - config_log("Floppy%d: %ls\n", c, floppyfns[c]); */ +#if 0 + if (*wp != L'\0') + config_log("Floppy%d: %ls\n", c, floppyfns[c]); +#endif sprintf(temp, "fdd_%02i_writeprot", c + 1); ui_writeprot[c] = !!ini_section_get_int(cat, temp, 0); sprintf(temp, "fdd_%02i_turbo", c + 1); @@ -1971,8 +1972,7 @@ config_load(void) for (i = 0; i < ISAMEM_MAX; i++) isamem_type[i] = 0; - /* TODO: Re-enable by default when we have a proper machine flag for this. */ - cassette_enable = 0; + cassette_enable = 1; memset(cassette_fname, 0x00, sizeof(cassette_fname)); memcpy(cassette_mode, "load", strlen("load") + 1); cassette_pos = 0; @@ -2532,6 +2532,9 @@ save_network(void) case NET_TYPE_VDE: ini_section_set_string(cat, temp, "vde"); break; + + default: + break; } sprintf(temp, "net_%02i_host_device", c + 1); @@ -2541,7 +2544,9 @@ save_network(void) else ini_section_set_string(cat, temp, net_cards_conf[c].host_dev_name); } else { - /* ini_section_set_string(cat, temp, "none"); */ +#if 0 + ini_section_set_string(cat, temp, "none"); +#endif ini_section_delete_var(cat, temp); } @@ -2572,7 +2577,7 @@ save_ports(void) else ini_section_set_int(cat, temp, com_ports[c].enabled); - /* +#if 0 sprintf(temp, "serial%d_type", c + 1); if (!com_ports[c].enabled)) ini_section_delete_var(cat, temp); @@ -2585,7 +2590,7 @@ save_ports(void) else ini_section_set_string(cat, temp, (char *) com_device_get_internal_name(com_ports[c].device)); - */ +#endif sprintf(temp, "serial%d_passthrough_enabled", c + 1); if (serial_passthrough_enabled[c]) { diff --git a/src/cpu/386_dynarec.c b/src/cpu/386_dynarec.c index daeef5568..d7b3751b2 100644 --- a/src/cpu/386_dynarec.c +++ b/src/cpu/386_dynarec.c @@ -431,7 +431,7 @@ exec386_dynarec_dyn(void) uint64_t mask = (uint64_t) 1 << ((phys_addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); # ifdef USE_NEW_DYNAREC int byte_offset = (phys_addr >> PAGE_BYTE_MASK_SHIFT) & PAGE_BYTE_MASK_OFFSET_MASK; - uint64_t byte_mask = 1ull << (PAGE_BYTE_MASK_MASK & 0x3f); + uint64_t byte_mask = 1ULL << (PAGE_BYTE_MASK_MASK & 0x3f); if ((page->code_present_mask & mask) || (page->byte_code_present_mask[byte_offset] & byte_mask)) # else diff --git a/src/cpu/808x.c b/src/cpu/808x.c index 925594a11..9ed605647 100644 --- a/src/cpu/808x.c +++ b/src/cpu/808x.c @@ -151,7 +151,7 @@ x808x_log(const char *fmt, ...) # define x808x_log(fmt, ...) #endif -static void pfq_add(int c, int add); +static void pfq_add(void); static void set_pzs(int bits); uint16_t @@ -170,52 +170,146 @@ static void clock_end(void) { int diff = cycdiff - cycles; +#if 0 + uint64_t i; +#endif /* On 808x systems, clock speed is usually crystal frequency divided by an integer. */ - tsc += (uint64_t) diff * ((uint64_t) xt_cpu_multi >> 32ULL); /* Shift xt_cpu_multi by 32 bits to the right and then multiply. */ + tsc += ((uint64_t) diff * ((uint64_t) xt_cpu_multi >> 32ULL)); /* Shift xt_cpu_multi by 32 bits to the right and then multiply. */ +#if 0 + tsc--; + for (i = 0; i < ((uint64_t) xt_cpu_multi >> 32ULL); i++) { + tsc++; + if (TIMER_VAL_LESS_THAN_VAL(timer_target, (uint32_t) tsc)) + timer_process(); + } +#else if (TIMER_VAL_LESS_THAN_VAL(timer_target, (uint32_t) tsc)) timer_process(); +#endif } static void -fetch_and_bus(int c, int bus) -{ - if (refresh > 0) { - /* Finish the current fetch, if any. */ - cycles -= ((4 - (biu_cycles & 3)) & 3); - pfq_add((4 - (biu_cycles & 3)) & 3, 1); - /* Add 4 memory access cycles. */ - cycles -= 4; - pfq_add(4, 0); - - refresh--; - } - - pfq_add(c, !bus); - if (bus < 2) { - clock_end(); - clock_start(); - } +process_timers(void) +{ + clock_end(); + clock_start(); } static void -wait(int c, int bus) +cycles_forward(int c) { cycles -= c; - fetch_and_bus(c, bus); -} - -/* This is for external subtraction of cycles. */ -void -sub_cycles(int c) -{ - if (c <= 0) - return; - - cycles -= c; if (!is286) - fetch_and_bus(c, 2); + process_timers(); +} + +static int access_code = 0; + +/* TODO: Proper BIU implementation with six states: T1-T4, Ti (idle), and TW (wait). + Type: 0 = idle, 1 = wait, 2 = bus. */ +static void +cycles_biu(int bus, int init) +{ + /* T1, T2 = Nothing, T3 = Schedule, T4 = Start */ + // int schedule_fetch = prefetching && (pfq_pos < pfq_size) && (biu_cycles > 1); + int schedule_fetch = prefetching && (pfq_pos < pfq_size) && (biu_cycles > 2); + int left; + int idle = !bus && !schedule_fetch; + int d; + + // pclog("cycles_biu(%i, %i): %i, %i, %i, %i\n", bus, init, prefetching, pfq_pos, pfq_size, biu_cycles); + if (bus) { + /* CPU wants non-code bus access. */ + if (init) { + if (schedule_fetch) { + if ((biu_cycles & 3) == 2) { + /* If a fetch has been scheduled but not started, abort it and insert two idle cycles. */ + for (d = 0; d < 2; d++) + cycles_forward(1); + access_code = 0; + } else { + /* If a fetch has been started, finish it. */ + left = 4 - (biu_cycles & 3); + for (d = 0; d < left; d++) { + cycles_forward(1); + + if (pfq_pos < pfq_size) { + if (biu_cycles == 3) { + // pclog("%04X:%04X %02X %i pfq_add()\n", CS, cpu_state.pc, opcode, bus); + pfq_add(); + } + biu_cycles = (biu_cycles + 1) & 3; + } + } + } + } + } + + biu_cycles = (biu_cycles + 1) & 3; + } else { + /* CPU wants idle or code bus access. */ + if (schedule_fetch) { + if (biu_cycles == 0) + access_code = 1; + + if (biu_cycles == 3) { + // pclog("%04X:%04X %02X %i pfq_add()\n", CS, cpu_state.pc, opcode, bus); + pfq_add(); + } + } + biu_cycles = (biu_cycles + 1) & 3; + } + + if ((refresh > 0) && (idle || (biu_cycles >= 2))) { + /* Refresh pending and it's either non-bus cycle or T3-T4, + insert the 6 wait states. */ + cycles_forward(6); + /* Decrease the refresh count. */ + refresh--; + } +} + +static int last_was_code = 0; + +static void +bus_init(void) +{ + /* Replacement for the old access() stuff. */ + if ((biu_cycles == 3) && last_was_code && (opcode != 0x8f) && (opcode != 0xc7) && (opcode != 0xcc) && (opcode != 0xcd) && (opcode != 0xce) && ((opcode & 0xf0) != 0xa0)) + cycles_forward(1); + + cycles_forward(2); + + if (biu_cycles == 1) + cycles_forward(1); +} + +/* Bus: + 0 CPU cycles without bus access. + 1 CPU cycle T1-T4, bus access. + 2 CPU cycle Tw (wait state). + 3 CPU cycle Ti (idle). + */ +/* This is used for cycle forwards that are not wait states. */ +static void +wait(int c, int bus) +{ + int d; + + for (d = 0; d < c; d++) { + cycles_biu(bus, !d); + cycles_forward(1); + } +} + +/* This is for external subtraction of cycles, ie. wait states. */ +void +sub_cycles(int c) +{ + if (c > 0) + cycles_forward(c); } void @@ -240,6 +334,8 @@ cpu_io(int bits, int out, uint16_t port) { int old_cycles = cycles; + bus_init(); + if (out) { wait(4, 1); if (bits == 16) { @@ -275,6 +371,8 @@ cpu_io(int bits, int out, uint16_t port) } resub_cycles(old_cycles); + + last_was_code = 0; } /* Reads a byte from the memory and advances the BIU. */ @@ -283,9 +381,13 @@ readmemb(uint32_t a) { uint8_t ret; + bus_init(); + wait(4, 1); ret = read_mem_b(a); + last_was_code = 0; + return ret; } @@ -298,6 +400,8 @@ readmembf(uint32_t a) a = cs + (a & 0xffff); ret = read_mem_b(a); + last_was_code = 1; + return ret; } @@ -307,6 +411,8 @@ readmemw(uint32_t s, uint16_t a) { uint16_t ret; + bus_init(); + wait(4, 1); if (is8086 && !(a & 1)) ret = read_mem_w(s + a); @@ -316,6 +422,8 @@ readmemw(uint32_t s, uint16_t a) ret |= read_mem_b(s + ((is186 && !is_nec) ? (a + 1) : (a + 1) & 0xffff)) << 8; } + last_was_code = 0; + return ret; } @@ -326,6 +434,8 @@ readmemwf(uint16_t a) ret = read_mem_w(cs + (a & 0xffff)); + last_was_code = 1; + return ret; } @@ -357,6 +467,8 @@ readmemq(uint32_t s, uint16_t a) temp = (uint64_t) (readmeml(s, a + 4)) << 32; temp |= readmeml(s, a); + last_was_code = 0; + return temp; } @@ -366,11 +478,15 @@ writememb(uint32_t s, uint32_t a, uint8_t v) { uint32_t addr = s + a; + bus_init(); + wait(4, 1); write_mem_b(addr, v); if ((addr >= 0xf0000) && (addr <= 0xfffff)) last_addr = addr & 0xffff; + + last_was_code = 0; } /* Writes a word to the memory and advances the BIU. */ @@ -379,6 +495,8 @@ writememw(uint32_t s, uint32_t a, uint16_t v) { uint32_t addr = s + a; + bus_init(); + wait(4, 1); if (is8086 && !(a & 1)) write_mem_w(addr, v); @@ -391,6 +509,8 @@ writememw(uint32_t s, uint32_t a, uint16_t v) if ((addr >= 0xf0000) && (addr <= 0xfffff)) last_addr = addr & 0xffff; + + last_was_code = 0; } static void @@ -420,21 +540,26 @@ static void pfq_write(void) { uint16_t tempw; + /* Byte fetch on odd addres on 8086 to simulate the HL toggle. */ + int fetch_word = is8086 && !(pfq_ip & 1); - if (is8086 && (pfq_pos < (pfq_size - 1))) { + if (fetch_word && (pfq_pos < (pfq_size - 1))) { /* The 8086 fetches 2 bytes at a time, and only if there's at least 2 bytes free in the queue. */ tempw = readmemwf(pfq_ip); *(uint16_t *) &(pfq[pfq_pos]) = tempw; pfq_ip = (pfq_ip + 2) & 0xffff; pfq_pos += 2; - } else if (!is8086 && (pfq_pos < pfq_size)) { + } else if (!fetch_word && (pfq_pos < pfq_size)) { /* The 8088 fetches 1 byte at a time, and only if there's at least 1 byte free in the queue. */ pfq[pfq_pos] = readmembf(pfq_ip); pfq_ip = (pfq_ip + 1) & 0xffff; pfq_pos++; } + + if (pfq_pos >= pfq_size) + pfq_pos = pfq_size; } static uint8_t @@ -446,12 +571,18 @@ pfq_read(void) for (int i = 0; i < (pfq_size - 1); i++) pfq[i] = pfq[i + 1]; pfq_pos--; + if (pfq_pos < 0) + pfq_pos = 0; cpu_state.pc = (cpu_state.pc + 1) & 0xffff; return temp; } /* Fetches a byte from the prefetch queue, or from memory if the queue has - been drained. */ + been drained. + + Cycles: 1 If fetching from the queue; + (4 - (biu_cycles & 3)) If fetching from the bus - fetch into the queue; + 1 If fetching from the bus - delay. */ static uint8_t pfq_fetchb_common(void) { @@ -461,7 +592,8 @@ pfq_fetchb_common(void) /* Reset prefetch queue internal position. */ pfq_ip = cpu_state.pc; /* Fill the queue. */ - wait(4 - (biu_cycles & 3), 0); + while (pfq_pos == 0) + wait(1, 0); } /* Fetch. */ @@ -469,6 +601,7 @@ pfq_fetchb_common(void) return temp; } +/* The timings are above. */ static uint8_t pfq_fetchb(void) { @@ -504,18 +637,10 @@ pfq_fetch(void) /* Adds bytes to the prefetch queue based on the instruction's cycle count. */ static void -pfq_add(int c, int add) +pfq_add(void) { - int d; - - if ((c <= 0) || (pfq_pos >= pfq_size)) - return; - - for (d = 0; d < c; d++) { - biu_cycles = (biu_cycles + 1) & 0x03; - if (prefetching && add && (biu_cycles == 0x00)) - pfq_write(); - } + if (prefetching && (pfq_pos < pfq_size)) + pfq_write(); } /* Clear the prefetch queue - called on reset and on anything that affects either CS or IP. */ @@ -524,6 +649,18 @@ pfq_clear(void) { pfq_pos = 0; prefetching = 0; + + biu_cycles = 0; +} + +static void +pfq_suspend(void) +{ + pfq_clear(); + wait(2, 0); + if (biu_cycles != 3) + wait(1, 0); + wait(1, 0); } static void @@ -575,6 +712,8 @@ reset_808x(int hard) prefetching = 1; cpu_alu_op = 0; + biu_cycles = 0; + use_custom_nmi_vector = 0x00; custom_nmi_vector = 0x00000000; } @@ -626,34 +765,34 @@ do_mod_rm(void) if (cpu_mod == 3) return; - wait(1, 0); + wait(2, 0); if ((rmdat & 0xc7) == 0x06) { - wait(1, 0); cpu_state.eaaddr = pfq_fetchw(); easeg = ovr_seg ? *ovr_seg : ds; - wait(1, 0); + wait(2, 0); return; - } else - switch (cpu_rm) { - case 0: - case 3: - wait(2, 0); - break; - case 1: - case 2: - wait(3, 0); - break; - } + } else switch (cpu_rm) { + case 0: + case 3: + wait(2, 0); + break; + case 1: + case 2: + wait(3, 0); + break; + } cpu_state.eaaddr = (*mod1add[0][cpu_rm]) + (*mod1add[1][cpu_rm]); easeg = ovr_seg ? *ovr_seg : *mod1seg[cpu_rm]; switch (rmdat & 0xc0) { case 0x40: - wait(3, 0); + wait(2, 0); cpu_state.eaaddr += sign_extend(pfq_fetchb()); + wait(1, 0); break; case 0x80: - wait(3, 0); + wait(2, 0); cpu_state.eaaddr += pfq_fetchw(); + wait(1, 0); break; } cpu_state.eaaddr &= 0xffff; @@ -817,130 +956,6 @@ pop(void) static void access(int num, int bits) { - switch (num) { - case 0: - case 61: - case 63: - case 64: - case 67: - case 69: - case 71: - case 72: - default: - break; - case 1: - case 6: - case 7: - case 8: - case 9: - case 17: - case 20: - case 21: - case 24: - case 28: - case 47: - case 48: - case 49: - case 50: - case 51: - case 55: - case 56: - case 62: - case 66: - case 68: - wait(1, 0); - break; - case 3: - case 11: - case 15: - case 22: - case 23: - case 25: - case 26: - case 35: - case 44: - case 45: - case 46: - case 52: - case 53: - case 54: - wait(2, 0); - break; - case 16: - case 18: - case 19: - case 27: - case 32: - case 37: - case 42: - wait(3, 0); - break; - case 10: - case 12: - case 13: - case 14: - case 29: - case 30: - case 33: - case 34: - case 39: - case 41: - case 60: - wait(4, 0); - break; - case 4: - case 70: - wait(5, 0); - break; - case 31: - case 38: - case 40: - wait(6, 0); - break; - case 5: - if (opcode == 0xcc) - wait(7, 0); - else - wait(4, 0); - break; - case 36: - wait(1, 0); - pfq_clear(); - wait(1, 0); - if (cpu_mod != 3) - wait(1, 0); - wait(3, 0); - break; - case 43: - wait(2, 0); - pfq_clear(); - wait(1, 0); - break; - case 57: - if (cpu_mod != 3) - wait(2, 0); - wait(4, 0); - break; - case 58: - if (cpu_mod != 3) - wait(1, 0); - wait(4, 0); - break; - case 59: - wait(2, 0); - pfq_clear(); - if (cpu_mod != 3) - wait(1, 0); - wait(3, 0); - break; - case 65: - wait(1, 0); - pfq_clear(); - wait(2, 0); - if (cpu_mod != 3) - wait(1, 0); - break; - } } /* Calls an interrupt. */ @@ -954,7 +969,6 @@ interrupt(uint16_t addr) addr <<= 2; cpu_state.eaaddr = addr; old_cs = CS; - access(5, 16); new_ip = readmemw(0, cpu_state.eaaddr); wait(1, 0); cpu_state.eaaddr = (cpu_state.eaaddr + 2) & 0xffff; @@ -963,17 +977,20 @@ interrupt(uint16_t addr) prefetching = 0; pfq_clear(); ovr_seg = NULL; - access(39, 16); + wait(2, 0); + access(25, 16); tempf = cpu_state.flags & (is_nec ? 0x8fd7 : 0x0fd7); push(&tempf); cpu_state.flags &= ~(I_FLAG | T_FLAG); - access(40, 16); + wait(5, 0); + access(25, 16); push(&old_cs); old_ip = cpu_state.pc; load_cs(new_cs); - access(68, 16); + pfq_suspend(); set_ip(new_ip); - access(41, 16); + wait(2, 0); + access(25, 16); push(&old_ip); } @@ -992,7 +1009,6 @@ custom_nmi(void) cpu_state.eaaddr = 0x0002; old_cs = CS; - access(5, 16); (void) readmemw(0, cpu_state.eaaddr); new_ip = custom_nmi_vector & 0xffff; wait(1, 0); @@ -1003,17 +1019,20 @@ custom_nmi(void) prefetching = 0; pfq_clear(); ovr_seg = NULL; - access(39, 16); + wait(2, 0); + access(25, 16); tempf = cpu_state.flags & (is_nec ? 0x8fd7 : 0x0fd7); push(&tempf); cpu_state.flags &= ~(I_FLAG | T_FLAG); - access(40, 16); + wait(5, 0); + access(25, 16); push(&old_cs); old_ip = cpu_state.pc; load_cs(new_cs); - access(68, 16); + pfq_suspend(); set_ip(new_ip); - access(41, 16); + wait(2, 0); + access(25, 16); push(&old_ip); } @@ -1027,6 +1046,13 @@ irq_pending(void) return temp; } +static int +bus_pic_ack(void) +{ + wait(4, 1); + return pic_irq_ack(); +} + static void check_interrupts(void) { @@ -1039,6 +1065,7 @@ check_interrupts(void) } if (nmi && nmi_enable && nmi_mask) { nmi_enable = 0; + wait(2, 0); if (use_custom_nmi_vector) custom_nmi(); else @@ -1052,26 +1079,61 @@ check_interrupts(void) repeating = 0; completed = 1; ovr_seg = NULL; - wait(3, 0); + wait(4, 0); /* ACK to PIC */ - temp = pic_irq_ack(); - wait(4, 1); + temp = bus_pic_ack(); wait(1, 0); /* ACK to PIC */ - temp = pic_irq_ack(); - wait(4, 1); + temp = bus_pic_ack(); wait(1, 0); in_lock = 0; clear_lock = 0; - wait(1, 0); + if (biu_cycles != 2) + wait(1, 0); + wait(5, 0); /* Here is where temp should be filled, but we cheat. */ - wait(3, 0); opcode = 0x00; interrupt(temp); } } } +static uint16_t tmpc; + +static int +rep_setup(void) +{ + if (repeating) + return 0; + wait(2, 0); + if (in_rep == 0) + return 0; + wait(4, 0); + tmpc = CX; + if (tmpc == 0) + return 1; + wait(3, 0); + return 0; +} + +static int +rep_interrupt(void) +{ + if (!irq_pending()) { + repeating = 1; + completed = 0; + return 0; + } + completed = 1; + CX = tmpc; + pfq_clear(); + if (is_nec && (ovr_seg != NULL)) + set_ip(cpu_state.pc - 3); + else + set_ip(cpu_state.pc - 2); + return 1; +} + static int rep_action(int bits) { @@ -1108,9 +1170,12 @@ static uint16_t jump(uint16_t delta) { uint16_t old_ip; - access(67, 8); + wait(1, 0); pfq_clear(); - wait(5, 0); + wait(2, 0); + if (biu_cycles == 3) + wait(1, 0); + wait(2, 0); old_ip = cpu_state.pc; set_ip((cpu_state.pc + delta) & 0xffff); return old_ip; @@ -1658,6 +1723,7 @@ execx86(int cycs) uint16_t tempw_int, size, tempbp, lowbound; uint16_t highbound, regval, orig_sp, wordtopush; uint16_t immediate, old_flags; + uint16_t tmpa; int bits; uint32_t dest_seg, i, carry, nibble; uint32_t srcseg, byteaddr; @@ -1669,7 +1735,8 @@ execx86(int cycs) if (!repeating) { cpu_state.oldpc = cpu_state.pc; - opcode = pfq_fetchb(); + // opcode = pfq_fetchb(); + opcode = pfq_fetchb_common(); handled = 0; oldc = cpu_state.flags & C_FLAG; if (clear_lock) { @@ -1955,6 +2022,7 @@ execx86(int cycs) case 0x0E: case 0x16: case 0x1E: /* PUSH seg */ + wait(3, 0); access(29, 16); push(&(_opseg[(opcode >> 3) & 0x03]->seg)); break; @@ -2251,19 +2319,16 @@ execx86(int cycs) cpu_state.pc = (cpu_state.pc - 1) & 0xffff; break; } - } else - handled = 0; - if (handled) - break; - access(22, 16); - if (opcode == 0x0F) { - load_cs(pop()); - pfq_pos = 0; - } else - load_seg(pop(), _opseg[(opcode >> 3) & 0x03]); - wait(1, 0); - /* All POP segment instructions suppress interrupts for one instruction. */ - noint = 1; + } else { + wait(1, 0); + if (opcode == 0x0F) { + load_cs(pop()); + pfq_pos = 0; + } else + load_seg(pop(), _opseg[(opcode >> 3) & 0x03]); + /* All POP segment instructions suppress interrupts for one instruction. */ + noint = 1; + } break; case 0x26: /*ES:*/ @@ -2310,7 +2375,7 @@ execx86(int cycs) /* alu rm, r / r, rm */ bits = 8 << (opcode & 1); do_mod_rm(); - access(46, bits); + // access(46, bits); tempw = get_ea(); cpu_alu_op = (opcode >> 3) & 7; if ((opcode & 2) == 0) { @@ -2320,22 +2385,20 @@ execx86(int cycs) cpu_dest = get_reg(cpu_reg); cpu_src = tempw; } - if (cpu_mod != 3) - wait(2, 0); wait(1, 0); + if (cpu_mod != 3) + wait(1, 0); alu_op(bits); + wait(1, 0); if (cpu_alu_op != 7) { if ((opcode & 2) == 0) { - access(10, bits); - set_ea(cpu_data); if (cpu_mod == 3) - wait(1, 0); - } else { + wait(2, 0); + access(25, bits); + set_ea(cpu_data); + } else set_reg(cpu_reg, cpu_data); - wait(1, 0); - } - } else - wait(1, 0); + } break; case 0x04: @@ -2485,7 +2548,7 @@ execx86(int cycs) case 0x55: case 0x56: case 0x57: - access(30, 16); + wait(3, 0); push(&(cpu_state.regs[opcode & 0x07].w)); break; case 0x58: @@ -2496,9 +2559,8 @@ execx86(int cycs) case 0x5D: case 0x5E: case 0x5F: - access(23, 16); - cpu_state.regs[opcode & 0x07].w = pop(); wait(1, 0); + cpu_state.regs[opcode & 0x07].w = pop(); break; case 0x60: /*JO alias*/ @@ -2565,14 +2627,11 @@ execx86(int cycs) cpu_data = get_ea(); cpu_dest = cpu_data; if (cpu_mod != 3) - wait(3, 0); - if (opcode == 0x81) { - if (cpu_mod == 3) - wait(1, 0); + wait(1, 0); + wait(1, 0); + if (opcode == 0x81) cpu_src = pfq_fetchw(); - } else { - if (cpu_mod == 3) - wait(1, 0); + else { if (opcode == 0x83) cpu_src = sign_extend(pfq_fetchb()); else @@ -2582,7 +2641,9 @@ execx86(int cycs) cpu_alu_op = (rmdat & 0x38) >> 3; alu_op(bits); if (cpu_alu_op != 7) { - access(11, bits); + if (cpu_mod != 3) + wait(1, 0); + access(16, bits); set_ea(cpu_data); } else { if (cpu_mod != 3) @@ -2598,8 +2659,8 @@ execx86(int cycs) access(48, bits); cpu_data = get_ea(); test(bits, cpu_data, get_reg(cpu_reg)); - if (cpu_mod == 3) - wait(2, 0); + if (cpu_mod != 3) + wait(1, 0); wait(2, 0); break; case 0x86: @@ -2612,7 +2673,9 @@ execx86(int cycs) cpu_src = get_reg(cpu_reg); set_reg(cpu_reg, cpu_data); wait(3, 0); - access(12, bits); + if (cpu_mod != 3) + wait(3, 0); + access(16, bits); set_ea(cpu_src); break; @@ -2622,7 +2685,9 @@ execx86(int cycs) bits = 8 << (opcode & 1); do_mod_rm(); wait(1, 0); - access(13, bits); + if (cpu_mod != 3) + wait(3, 0); + access(16, bits); set_ea(get_reg(cpu_reg)); break; case 0x8A: @@ -2630,18 +2695,18 @@ execx86(int cycs) /* MOV reg, rm */ bits = 8 << (opcode & 1); do_mod_rm(); - access(50, bits); set_reg(cpu_reg, get_ea()); wait(1, 0); if (cpu_mod != 3) - wait(2, 0); + wait(1, 0); break; case 0x8C: /*MOV w,sreg*/ do_mod_rm(); - if (cpu_mod == 3) - wait(1, 0); - access(14, 16); + wait(1, 0); + if (cpu_mod != 3) + wait(2, 0); + access(16, 16); seteaw(_opseg[(rmdat & 0x18) >> 3]->seg); break; @@ -2650,12 +2715,11 @@ execx86(int cycs) cpu_state.regs[cpu_reg].w = cpu_state.eaaddr; wait(1, 0); if (cpu_mod != 3) - wait(2, 0); + wait(1, 0); break; case 0x8E: /*MOV sreg,w*/ do_mod_rm(); - access(51, 16); tempw = geteaw(); if ((rmdat & 0x18) == 0x08) { load_cs(tempw); @@ -2664,22 +2728,24 @@ execx86(int cycs) load_seg(tempw, _opseg[(rmdat & 0x18) >> 3]); wait(1, 0); if (cpu_mod != 3) - wait(2, 0); + wait(1, 0); if (((rmdat & 0x18) >> 3) == 2) noint = 1; break; case 0x8F: /*POPW*/ do_mod_rm(); - wait(1, 0); + wait(2, 0); cpu_src = cpu_state.eaaddr; - access(24, 16); + if (cpu_mod != 3) + wait(1, 0); + access(20, 16); + wait(1, 0); if (cpu_mod != 3) wait(2, 0); cpu_data = pop(); cpu_state.eaaddr = cpu_src; - wait(2, 0); - access(15, 16); + access(16, 16); seteaw(cpu_data); break; @@ -2717,14 +2783,16 @@ execx86(int cycs) new_ip = pfq_fetchw(); wait(1, 0); new_cs = pfq_fetchw(); - pfq_clear(); - access(31, 16); + wait(1, 0); + pfq_suspend(); + access(25, 16); push(&(CS)); - access(60, 16); + wait(4, 0); cpu_state.oldpc = cpu_state.pc; load_cs(new_cs); set_ip(new_ip); - access(32, 16); + wait(1, 0); + access(25, 16); push((uint16_t *) &(cpu_state.oldpc)); break; case 0x9B: /*WAIT*/ @@ -2746,7 +2814,8 @@ execx86(int cycs) #endif break; case 0x9C: /*PUSHF*/ - access(33, 16); + wait(4, 0); + access(16, 16); if (is_nec) tempw = (cpu_state.flags & 0x8fd7) | 0x7000; else @@ -2755,11 +2824,11 @@ execx86(int cycs) break; case 0x9D: /*POPF*/ access(25, 16); + wait(1, 0); if (is_nec) cpu_state.flags = pop() | 0x8002; else cpu_state.flags = pop() | 0x0002; - wait(1, 0); break; case 0x9E: /*SAHF*/ wait(1, 0); @@ -2775,20 +2844,20 @@ execx86(int cycs) case 0xA1: /* MOV A, [iw] */ bits = 8 << (opcode & 1); - wait(1, 0); + wait(2, 0); cpu_state.eaaddr = pfq_fetchw(); - access(1, bits); + access(6, bits); set_accum(bits, readmem((ovr_seg ? *ovr_seg : ds))); - wait(1, 0); break; case 0xA2: case 0xA3: /* MOV [iw], A */ bits = 8 << (opcode & 1); - wait(1, 0); + wait(2, 0); cpu_state.eaaddr = pfq_fetchw(); - access(7, bits); + access(46, bits); writemem((ovr_seg ? *ovr_seg : ds), get_accum(bits)); + wait(2, 0); break; case 0xA4: @@ -2796,37 +2865,33 @@ execx86(int cycs) case 0xAC: case 0xAD: /* LODS */ bits = 8 << (opcode & 1); - if (!repeating) { - wait(1, 0); - if ((opcode & 8) == 0 && in_rep != 0) - wait(1, 0); - } - if (rep_action(bits)) { - wait(1, 0); - if ((opcode & 8) != 0) - wait(1, 0); + if (rep_setup()) break; - } - if (in_rep != 0 && (opcode & 8) != 0) + if (in_rep != 0 && (biu_cycles == 3)) wait(1, 0); - access(20, bits); lods(bits); if ((opcode & 8) == 0) { - access(27, bits); + wait(1, 0); stos(bits); - } else { + } else set_accum(bits, cpu_data); - if (in_rep != 0) + wait(3, 0); + if (in_rep == 0) + break; + --tmpc; + if (rep_interrupt()) + break; + CX = tmpc; + if (tmpc == 0) { + completed = 1; + wait(1, 0); + if ((opcode & 8) != 0) + wait(2, 0); + } else { + wait(2, 0); + if ((opcode & 8) != 0) wait(2, 0); } - if (in_rep == 0) { - wait(3, 0); - if ((opcode & 8) != 0) - wait(1, 0); - break; - } - repeating = 1; - clock_end(); break; case 0xA6: @@ -2834,40 +2899,39 @@ execx86(int cycs) case 0xAE: case 0xAF: /* SCAS */ bits = 8 << (opcode & 1); - if (!repeating) - wait(1, 0); - if (rep_action(bits)) { - wait(2, 0); + if (rep_setup()) break; - } - if (in_rep != 0) - wait(1, 0); - wait(1, 0); - cpu_dest = get_accum(bits); + tmpa = AX; if ((opcode & 8) == 0) { - access(21, bits); - lods(bits); wait(1, 0); - cpu_dest = cpu_data; + lods(bits); + tmpa = cpu_data; } - access(2, bits); + wait(2, 0); cpu_state.eaaddr = DI; cpu_data = readmem(es); - DI = string_increment(bits); + DI = string_increment(bits); cpu_src = cpu_data; + cpu_dest = tmpa; sub(bits); wait(2, 0); if (in_rep == 0) { + wait(2, 0); + break; + } + --tmpc; + CX = tmpc; + if ((!!(cpu_state.flags & (rep_c_flag ? C_FLAG : Z_FLAG))) == (in_rep == 1)) { wait(3, 0); break; } - if ((!!(cpu_state.flags & (rep_c_flag ? C_FLAG : Z_FLAG))) == (in_rep == 1)) { - completed = 1; - wait(4, 0); + if (rep_interrupt()) break; - } - repeating = 1; - clock_end(); + wait(4, 0); + if (tmpc == 0) + completed = 1; + else + wait(1, 0); break; case 0xA8: @@ -2883,24 +2947,24 @@ execx86(int cycs) case 0xAA: case 0xAB: /* STOS */ bits = 8 << (opcode & 1); - if (!repeating) { - wait(1, 0); - if (in_rep != 0) - wait(1, 0); - } - if (rep_action(bits)) { - wait(1, 0); + if (rep_setup()) break; - } cpu_data = AX; - access(28, bits); + if (in_rep == 0 && (biu_cycles == 3)) + wait(1, 0); stos(bits); - if (in_rep == 0) { - wait(3, 0); + wait(3, 0); + if (in_rep == 0) break; - } - repeating = 1; - clock_end(); + --tmpc; + if (rep_interrupt()) + break; + CX = tmpc; + if (tmpc == 0) { + completed = 1; + wait(1, 0); + } else + wait(2, 0); break; case 0xB0: @@ -2942,32 +3006,29 @@ execx86(int cycs) case 0xCB: /* RET */ bits = 8 + (opcode & 0x08); - if ((opcode & 9) != 1) - wait(1, 0); + wait(1, 0); if (!(opcode & 1)) { cpu_src = pfq_fetchw(); - wait(1, 0); + wait(2, 0); } if ((opcode & 9) == 9) - wait(1, 0); + wait(2, 0); pfq_clear(); - access(26, bits); + access(25, bits); new_ip = pop(); - wait(2, 0); - if ((opcode & 8) == 0) + wait(1, 0); + if ((opcode & 8) == 0) { new_cs = CS; - else { - access(42, bits); - new_cs = pop(); if (opcode & 1) wait(1, 0); + } else { + wait(2, 0); + access(6, bits); + new_cs = pop(); } - if (!(opcode & 1)) { + if (!(opcode & 1)) SP += cpu_src; - wait(1, 0); - } load_cs(new_cs); - access(72, bits); set_ip(new_ip); break; @@ -2976,13 +3037,13 @@ execx86(int cycs) /* LsS rw, rmd */ do_mod_rm(); bits = 16; - access(52, bits); read_ea(1, bits); cpu_state.regs[cpu_reg].w = cpu_data; - access(57, bits); + if (cpu_mod != 3) + wait(2, 0); + access(6, bits); read_ea2(bits); load_seg(cpu_data, (opcode & 0x01) ? &cpu_state.seg_ds : &cpu_state.seg_es); - wait(1, 0); break; case 0xC6: @@ -2991,40 +3052,43 @@ execx86(int cycs) bits = 8 << (opcode & 1); do_mod_rm(); wait(1, 0); - if (cpu_mod != 3) - wait(2, 0); cpu_data = pfq_fetch(); - if (cpu_mod == 3) - wait(1, 0); - access(16, bits); + wait(2, 0); set_ea(cpu_data); break; case 0xCC: /*INT 3*/ + wait(7, 0); interrupt(3); break; case 0xCD: /*INT*/ wait(1, 0); - interrupt(pfq_fetchb()); + temp = pfq_fetchb(); + wait(1, 0); + if (biu_cycles != 3) + wait(1, 0); + wait(1, 0); + + interrupt(temp); break; case 0xCE: /*INTO*/ wait(3, 0); if (cpu_state.flags & V_FLAG) { - wait(2, 0); + wait(5, 0); interrupt(4); } break; case 0xCF: /*IRET*/ - access(43, 8); - new_ip = pop(); wait(3, 0); - access(44, 8); + pfq_clear(); + access(6, 8); + new_ip = pop(); + access(6, 8); new_cs = pop(); load_cs(new_cs); - access(62, 8); set_ip(new_ip); - access(45, 8); + access(6, 8); if (is_nec) cpu_state.flags = pop() | 0x8002; else @@ -3041,10 +3105,9 @@ execx86(int cycs) /* rot rm */ bits = 8 << (opcode & 1); do_mod_rm(); + cpu_data = get_ea(); if (cpu_mod == 3) wait(1, 0); - access(53, bits); - cpu_data = get_ea(); if ((opcode & 2) == 0) { cpu_src = 1; wait((cpu_mod != 3) ? 4 : 0, 0); @@ -3125,7 +3188,7 @@ execx86(int cycs) wait(4, 0); --cpu_src; } - access(17, bits); + access(16, bits); set_ea(cpu_data); break; @@ -3159,9 +3222,9 @@ execx86(int cycs) break; case 0xD7: /*XLATB*/ cpu_state.eaaddr = (BX + AL) & 0xffff; - access(4, 8); + wait(4, 0); + access(3, 8); AL = readmemb((ovr_seg ? *ovr_seg : ds) + cpu_state.eaaddr); - wait(1, 0); break; case 0xD8: @@ -3174,11 +3237,12 @@ execx86(int cycs) case 0xDF: /* esc i, r, rm */ do_mod_rm(); - access(54, 16); tempw = cpu_state.pc; - if (!hasfpu) - geteaw(); - else { + geteaw(); + wait(1, 0); + if (cpu_mod != 3) + wait(1, 0); + if (hasfpu) { if (fpu_softfloat) { switch (opcode) { case 0xD8: @@ -3237,9 +3301,6 @@ execx86(int cycs) } cpu_state.pc = tempw; /* Do this as the x87 code advances it, which is needed on the 286+ core, but not here. */ - wait(1, 0); - if (cpu_mod != 3) - wait(2, 0); break; case 0xE0: @@ -3272,43 +3333,51 @@ execx86(int cycs) case 0xE4: case 0xE5: + bits = 8 << (opcode & 1); + wait(1, 0); + cpu_data = pfq_fetchb(); + cpu_state.eaaddr = cpu_data; + access(46, bits); + wait(1, 0); + cpu_io(bits, 0, cpu_state.eaaddr); + break; case 0xE6: case 0xE7: + bits = 8 << (opcode & 1); + wait(1, 0); + cpu_data = pfq_fetchb(); + cpu_state.eaaddr = cpu_data; + cpu_data = (bits == 16) ? AX : AL; + access(46, bits); + wait(2, 0); + cpu_io(bits, 1, cpu_state.eaaddr); + break; case 0xEC: case 0xED: + bits = 8 << (opcode & 1); + cpu_data = DX; + cpu_state.eaaddr = cpu_data; + access(3, bits); + wait(1, 0); + cpu_io(bits, 0, cpu_state.eaaddr); + break; case 0xEE: case 0xEF: bits = 8 << (opcode & 1); - if ((opcode & 0x0e) != 0x0c) - wait(1, 0); - if ((opcode & 8) == 0) - cpu_data = pfq_fetchb(); - else - cpu_data = DX; + wait(2, 0); + cpu_data = DX; cpu_state.eaaddr = cpu_data; - if ((opcode & 2) == 0) { - access(3, bits); - if (opcode & 1) - cpu_io(16, 0, cpu_data); - else - cpu_io(8, 0, cpu_data); - wait(1, 0); - } else { - if ((opcode & 8) == 0) - access(8, bits); - else - access(9, bits); - if (opcode & 1) - cpu_io(16, 1, cpu_data); - else - cpu_io(8, 1, cpu_data); - } + cpu_data = (bits == 16) ? AX : AL; + access(3, bits); + cpu_io(bits, 1, cpu_state.eaaddr); + wait(1, 0); break; case 0xE8: /*CALL rel 16*/ wait(1, 0); cpu_state.oldpc = jump_near(); - access(34, 8); + wait(2, 0); + access(25, 16); push((uint16_t *) &(cpu_state.oldpc)); break; case 0xE9: /*JMP rel 16*/ @@ -3321,8 +3390,8 @@ execx86(int cycs) wait(1, 0); tempw = pfq_fetchw(); load_cs(tempw); - access(70, 8); pfq_clear(); + wait(4, 0); set_ip(addr); break; case 0xEB: /*JMP rel*/ @@ -3349,17 +3418,22 @@ execx86(int cycs) case 0xF4: /*HLT*/ if (!repeating) { - wait(1, 0); + if ((biu_cycles == 3) || !last_was_code) + cpu_data = 1; + else + cpu_data = 2; + wait(2, 0); pfq_clear(); } wait(1, 0); if (irq_pending()) { - wait(cycles & 1, 0); + wait(1, 0); + if (cpu_data == 2) + wait(1, 0); check_interrupts(); } else { repeating = 1; completed = 0; - clock_end(); } break; case 0xF5: /*CMC*/ @@ -3371,15 +3445,12 @@ execx86(int cycs) case 0xF7: bits = 8 << (opcode & 1); do_mod_rm(); - access(55, bits); cpu_data = get_ea(); switch (rmdat & 0x38) { case 0x00: case 0x08: /* TEST */ wait(2, 0); - if (cpu_mod != 3) - wait(1, 0); cpu_src = pfq_fetch(); wait(1, 0); test(bits, cpu_data, cpu_src); @@ -3396,7 +3467,9 @@ execx86(int cycs) cpu_dest = 0; sub(bits); } - access(18, bits); + if (cpu_mod != 3) + wait(2, 0); + access(16, bits); set_ea(cpu_data); break; case 0x20: /* MUL */ @@ -3418,8 +3491,6 @@ execx86(int cycs) } set_sf(bits); set_pf(); - if (cpu_mod != 3) - wait(1, 0); /* NOTE: When implementing the V20, care should be taken to not change the zero flag. */ if (is_nec) @@ -3427,8 +3498,6 @@ execx86(int cycs) break; case 0x30: /* DIV */ case 0x38: /* IDIV */ - if (cpu_mod != 3) - wait(1, 0); cpu_src = cpu_data; if (x86_div(AL, AH)) wait(1, 0); @@ -3477,61 +3546,66 @@ execx86(int cycs) do_af(); set_pzs(bits); wait(2, 0); - access(19, bits); + access(16, bits); set_ea(cpu_data); break; case 0x10: /* CALL rm */ cpu_data_opff_rm(); - access(63, bits); - wait(1, 0); + wait(2, 0); pfq_clear(); - wait(4, 0); - if (cpu_mod != 3) - wait(1, 0); - wait(1, 0); /* Wait. */ + wait(5, 0); cpu_state.oldpc = cpu_state.pc; set_ip(cpu_data); wait(2, 0); - access(35, bits); + access(25, bits); push((uint16_t *) &(cpu_state.oldpc)); break; case 0x18: /* CALL rmd */ new_ip = cpu_data; - access(58, bits); + wait(3, 0); + access(6, bits); read_ea2(bits); if (!(opcode & 1)) cpu_data |= 0xff00; new_cs = cpu_data; - access(36, bits); + wait(1, 0); + pfq_clear(); + access(25, bits); push(&(CS)); - access(64, bits); wait(4, 0); cpu_state.oldpc = cpu_state.pc; load_cs(new_cs); set_ip(new_ip); - access(37, bits); + wait(1, 0); + access(25, bits); push((uint16_t *) &(cpu_state.oldpc)); break; case 0x20: /* JMP rm */ cpu_data_opff_rm(); - access(65, bits); + wait(2, 0); + pfq_clear(); + if (biu_cycles != 3) + wait(1, 0); set_ip(cpu_data); break; case 0x28: /* JMP rmd */ new_ip = cpu_data; - access(59, bits); + wait(3, 0); + pfq_clear(); + wait(1, 0); + access(25, bits); read_ea2(bits); if (!(opcode & 1)) cpu_data |= 0xff00; new_cs = cpu_data; load_cs(new_cs); - access(66, bits); set_ip(new_ip); break; case 0x30: /* PUSH rm */ case 0x38: if (cpu_mod != 3) wait(1, 0); + wait(4, 0); access(38, bits); push((uint16_t *) &(cpu_data)); break; diff --git a/src/cpu/cpu.c b/src/cpu/cpu.c index ed5b465b3..26373769d 100644 --- a/src/cpu/cpu.c +++ b/src/cpu/cpu.c @@ -80,66 +80,147 @@ fpu_state_t fpu_state; uint32_t abrt_error; #ifdef USE_DYNAREC -const OpFn *x86_dynarec_opcodes, *x86_dynarec_opcodes_0f, - *x86_dynarec_opcodes_d8_a16, *x86_dynarec_opcodes_d8_a32, - *x86_dynarec_opcodes_d9_a16, *x86_dynarec_opcodes_d9_a32, - *x86_dynarec_opcodes_da_a16, *x86_dynarec_opcodes_da_a32, - *x86_dynarec_opcodes_db_a16, *x86_dynarec_opcodes_db_a32, - *x86_dynarec_opcodes_dc_a16, *x86_dynarec_opcodes_dc_a32, - *x86_dynarec_opcodes_dd_a16, *x86_dynarec_opcodes_dd_a32, - *x86_dynarec_opcodes_de_a16, *x86_dynarec_opcodes_de_a32, - *x86_dynarec_opcodes_df_a16, *x86_dynarec_opcodes_df_a32, - *x86_dynarec_opcodes_REPE, *x86_dynarec_opcodes_REPNE, - *x86_dynarec_opcodes_3DNOW; +const OpFn *x86_dynarec_opcodes; +const OpFn *x86_dynarec_opcodes_0f; +const OpFn *x86_dynarec_opcodes_d8_a16; +const OpFn *x86_dynarec_opcodes_d8_a32; +const OpFn *x86_dynarec_opcodes_d9_a16; +const OpFn *x86_dynarec_opcodes_d9_a32; +const OpFn *x86_dynarec_opcodes_da_a16; +const OpFn *x86_dynarec_opcodes_da_a32; +const OpFn *x86_dynarec_opcodes_db_a16; +const OpFn *x86_dynarec_opcodes_db_a32; +const OpFn *x86_dynarec_opcodes_dc_a16; +const OpFn *x86_dynarec_opcodes_dc_a32; +const OpFn *x86_dynarec_opcodes_dd_a16; +const OpFn *x86_dynarec_opcodes_dd_a32; +const OpFn *x86_dynarec_opcodes_de_a16; +const OpFn *x86_dynarec_opcodes_de_a32; +const OpFn *x86_dynarec_opcodes_df_a16; +const OpFn *x86_dynarec_opcodes_df_a32; +const OpFn *x86_dynarec_opcodes_REPE; +const OpFn *x86_dynarec_opcodes_REPNE; +const OpFn *x86_dynarec_opcodes_3DNOW; #endif -const OpFn *x86_opcodes, *x86_opcodes_0f, - *x86_opcodes_d8_a16, *x86_opcodes_d8_a32, - *x86_opcodes_d9_a16, *x86_opcodes_d9_a32, - *x86_opcodes_da_a16, *x86_opcodes_da_a32, - *x86_opcodes_db_a16, *x86_opcodes_db_a32, - *x86_opcodes_dc_a16, *x86_opcodes_dc_a32, - *x86_opcodes_dd_a16, *x86_opcodes_dd_a32, - *x86_opcodes_de_a16, *x86_opcodes_de_a32, - *x86_opcodes_df_a16, *x86_opcodes_df_a32, - *x86_opcodes_REPE, *x86_opcodes_REPNE, - *x86_opcodes_3DNOW; +const OpFn *x86_opcodes; +const OpFn *x86_opcodes_0f; +const OpFn *x86_opcodes_d8_a16; +const OpFn *x86_opcodes_d8_a32; +const OpFn *x86_opcodes_d9_a16; +const OpFn *x86_opcodes_d9_a32; +const OpFn *x86_opcodes_da_a16; +const OpFn *x86_opcodes_da_a32; +const OpFn *x86_opcodes_db_a16; +const OpFn *x86_opcodes_db_a32; +const OpFn *x86_opcodes_dc_a16; +const OpFn *x86_opcodes_dc_a32; +const OpFn *x86_opcodes_dd_a16; +const OpFn *x86_opcodes_dd_a32; +const OpFn *x86_opcodes_de_a16; +const OpFn *x86_opcodes_de_a32; +const OpFn *x86_opcodes_df_a16; +const OpFn *x86_opcodes_df_a32; +const OpFn *x86_opcodes_REPE; +const OpFn *x86_opcodes_REPNE; +const OpFn *x86_opcodes_3DNOW; -uint16_t cpu_fast_off_count, cpu_fast_off_val; +uint16_t cpu_fast_off_count; +uint16_t cpu_fast_off_val; uint16_t temp_seg_data[4] = { 0, 0, 0, 0 }; -int isa_cycles, cpu_inited, +int isa_cycles; +int cpu_inited; - cpu_cycles_read, cpu_cycles_read_l, cpu_cycles_write, cpu_cycles_write_l, - cpu_prefetch_cycles, cpu_prefetch_width, cpu_mem_prefetch_cycles, cpu_rom_prefetch_cycles, - cpu_waitstates, cpu_cache_int_enabled, cpu_cache_ext_enabled, - cpu_isa_speed, cpu_pci_speed, cpu_isa_pci_div, cpu_agp_speed, cpu_alt_reset, +int cpu_cycles_read; +int cpu_cycles_read_l; +int cpu_cycles_write; +int cpu_cycles_write_l; +int cpu_prefetch_cycles; +int cpu_prefetch_width; +int cpu_mem_prefetch_cycles; +int cpu_rom_prefetch_cycles; +int cpu_waitstates; +int cpu_cache_int_enabled; +int cpu_cache_ext_enabled; +int cpu_isa_speed; +int cpu_pci_speed; +int cpu_isa_pci_div; +int cpu_agp_speed; +int cpu_alt_reset; - cpu_override, cpu_effective, cpu_multi, cpu_16bitbus, cpu_64bitbus, - cpu_cyrix_alignment, CPUID, +int cpu_override; +int cpu_effective; +int cpu_multi; +int cpu_16bitbus; +int cpu_64bitbus; +int cpu_cyrix_alignment; +int CPUID; - is186, is_nec, - is286, is386, is6117, is486 = 1, - cpu_isintel, cpu_iscyrix, hascache, isibm486, israpidcad, is_vpc, - is_am486, is_am486dxl, is_pentium, is_k5, is_k6, is_p6, is_cxsmm, hasfpu, +int is186; +int is_nec; +int is286; +int is386; +int is6117; +int is486 = 1; +int cpu_isintel; +int cpu_iscyrix; +int hascache; +int isibm486; +int israpidcad; +int is_vpc; +int is_am486; +int is_am486dxl; +int is_pentium; +int is_k5; +int is_k6; +int is_p6; +int is_cxsmm; +int hasfpu; - timing_rr, timing_mr, timing_mrl, timing_rm, timing_rml, - timing_mm, timing_mml, timing_bt, timing_bnt, - timing_int, timing_int_rm, timing_int_v86, timing_int_pm, - timing_int_pm_outer, timing_iret_rm, timing_iret_v86, timing_iret_pm, - timing_iret_pm_outer, timing_call_rm, timing_call_pm, timing_call_pm_gate, - timing_call_pm_gate_inner, timing_retf_rm, timing_retf_pm, timing_retf_pm_outer, - timing_jmp_rm, timing_jmp_pm, timing_jmp_pm_gate, timing_misaligned; -uint32_t cpu_features, cpu_fast_off_flags; +int timing_rr; +int timing_mr; +int timing_mrl; +int timing_rm; +int timing_rml; +int timing_mm; +int timing_mml; +int timing_bt; +int timing_bnt; +int timing_int; +int timing_int_rm; +int timing_int_v86; +int timing_int_pm; +int timing_int_pm_outer; +int timing_iret_rm; +int timing_iret_v86; +int timing_iret_pm; +int timing_iret_pm_outer; +int timing_call_rm; +int timing_call_pm; +int timing_call_pm_gate; +int timing_call_pm_gate_inner; +int timing_retf_rm; +int timing_retf_pm; +int timing_retf_pm_outer; +int timing_jmp_rm; +int timing_jmp_pm; +int timing_jmp_pm_gate; +int timing_misaligned; + +uint32_t cpu_features; +uint32_t cpu_fast_off_flags; uint32_t _tr[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; uint32_t cache_index = 0; uint8_t _cache[2048]; -uint64_t cpu_CR4_mask, tsc = 0; +uint64_t cpu_CR4_mask; +uint64_t tsc = 0; uint64_t pmc[2] = { 0, 0 }; -double cpu_dmulti, cpu_busspeed; +double cpu_dmulti; +double cpu_busspeed; msr_t msr; @@ -148,11 +229,18 @@ cyrix_t cyrix; cpu_family_t *cpu_f; CPU *cpu_s; -uint8_t do_translate = 0, do_translate2 = 0; +uint8_t do_translate = 0; +uint8_t do_translate2 = 0; void (*cpu_exec)(int cycs); -static uint8_t ccr0, ccr1, ccr2, ccr3, ccr4, ccr5, ccr6; +static uint8_t ccr0; +static uint8_t ccr1; +static uint8_t ccr2; +static uint8_t ccr3; +static uint8_t ccr4; +static uint8_t ccr5; +static uint8_t ccr6; void cpu_INVD(uint8_t wb) @@ -231,7 +319,8 @@ cpu_is_eligible(const cpu_family_t *cpu_family, int cpu, int machine) { const machine_t *machine_s = &machines[machine]; const CPU *cpu_s = &cpu_family->cpus[cpu]; - uint32_t packages, bus_speed; + uint32_t packages; + uint32_t bus_speed; uint8_t i; double multi; @@ -1653,7 +1742,7 @@ cpu_current_pc(char *bufp) sprintf(bufp, "%04X:%04X", CS, cpu_state.pc); - return (bufp); + return bufp; } void @@ -3258,7 +3347,7 @@ cpu_write(uint16_t addr, uint8_t val, void *priv) if (!(ccr3 & CCR3_SMI_LOCK) || in_smm) { cyrix.arr[3].base = (cyrix.arr[3].base & ~0x0000f000) | ((val & 0xf0) << 8); if ((val & 0xf) == 0xf) - cyrix.arr[3].size = 1ull << 32; /* 4 GB */ + cyrix.arr[3].size = 1ULL << 32; /* 4 GB */ else if (val & 0xf) cyrix.arr[3].size = 2048 << (val & 0xf); else @@ -3320,6 +3409,9 @@ cpu_read(uint16_t addr, void *priv) return cpu_s->cyrix_id & 0xff; case 0xff: return cpu_s->cyrix_id >> 8; + + default: + break; } if ((cyrix_addr & 0xf0) == 0xc0) diff --git a/src/cpu/cpu.h b/src/cpu/cpu.h index 8fc8a126a..dcf681e0f 100644 --- a/src/cpu/cpu.h +++ b/src/cpu/cpu.h @@ -150,8 +150,10 @@ typedef struct { uint32_t cpuid_model; uint16_t cyrix_id; uint8_t cpu_flags; - int8_t mem_read_cycles, mem_write_cycles; - int8_t cache_read_cycles, cache_write_cycles; + int8_t mem_read_cycles; + int8_t mem_write_cycles; + int8_t cache_read_cycles; + int8_t cache_write_cycles; int8_t atclk_div; } CPU; @@ -215,17 +217,19 @@ typedef union { uint32_t l; uint16_t w; struct { - uint8_t l, - h; + uint8_t l; + uint8_t h; } b; } x86reg; typedef struct { uint32_t base; uint32_t limit; - uint8_t access, ar_high; + uint8_t access; + uint8_t ar_high; uint16_t seg; - uint32_t limit_low, limit_high; + uint32_t limit_low; + uint32_t limit_high; int checked; /*Non-zero if selector is known to be valid*/ } x86seg; @@ -243,8 +247,9 @@ typedef union { typedef struct { /* IDT WinChip and WinChip 2 MSR's */ - uint32_t tr1, tr12; /* 0x00000002, 0x0000000e */ - uint32_t cesr; /* 0x00000011 */ + uint32_t tr1; /* 0x00000002, 0x0000000e */ + uint32_t tr12; /* 0x00000002, 0x0000000e */ + uint32_t cesr; /* 0x00000011 */ /* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */ uint64_t apic_base; /* 0x0000001b - Should the Pentium not also have this? */ @@ -259,8 +264,9 @@ typedef struct { uint64_t mtrr_cap; /* 0x000000fe */ /* IDT WinChip and WinChip 2 MSR's that are also on the VIA Cyrix III */ - uint32_t fcr; /* 0x00000107 (IDT), 0x00001107 (VIA) */ - uint64_t fcr2, fcr3; /* 0x00000108 (IDT), 0x00001108 (VIA) */ + uint32_t fcr; /* 0x00000107 (IDT), 0x00001107 (VIA) */ + uint64_t fcr2; /* 0x00000108 (IDT), 0x00001108 (VIA) */ + uint64_t fcr3; /* 0x00000108 (IDT), 0x00001108 (VIA) */ /* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */ uint64_t ecx116; /* 0x00000116 */ @@ -276,8 +282,9 @@ typedef struct { uint64_t mcg_ctl; /* 0x0000017b - Machine Check Architecture */ /* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */ - uint64_t ecx186, ecx187; /* 0x00000186, 0x00000187 */ - uint64_t ecx1e0; /* 0x000001e0 */ + uint64_t ecx186; /* 0x00000186, 0x00000187 */ + uint64_t ecx187; /* 0x00000186, 0x00000187 */ + uint64_t ecx1e0; /* 0x000001e0 */ /* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's that are also on the VIA Cyrix III */ @@ -325,7 +332,8 @@ typedef struct { uint64_t amd_epmr; /* 0xc0000086 */ /* AMD K6-2C, K6-3, K6-2P, and K6-3P MSR's */ - uint64_t amd_psor, amd_pfir; /* 0xc0000087, 0xc0000088 */ + uint64_t amd_psor; /* 0xc0000087, 0xc0000088 */ + uint64_t amd_pfir; /* 0xc0000087, 0xc0000088 */ /* K6-3, K6-2P, and K6-3P MSR's */ uint64_t amd_l2aar; /* 0xc0000089 */ @@ -345,33 +353,38 @@ typedef struct { uint32_t eaaddr; int flags_op; - uint32_t flags_res, - flags_op1, flags_op2; + uint32_t flags_res; + uint32_t flags_op1; + uint32_t flags_op2; - uint32_t pc, - oldpc, op32; + uint32_t pc; + uint32_t oldpc; + uint32_t op32; int TOP; union { struct { - int8_t rm, - mod, - reg; + int8_t rm; + int8_t mod; + int8_t reg; } rm_mod_reg; int32_t rm_mod_reg_data; } rm_data; - uint8_t ssegs, ismmx, - abrt, _smi_line; + uint8_t ssegs; + uint8_t ismmx; + uint8_t abrt; + uint8_t _smi_line; + int _cycles; #ifdef FPU_CYCLES - int _cycles, _fpu_cycles, _in_smm; -#else - int _cycles, _in_smm; + int _fpu_cycles; #endif + int _in_smm; - uint16_t npxs, npxc; + uint16_t npxs; + uint16_t npxc; double ST[8]; @@ -380,26 +393,34 @@ typedef struct { MMX_REG MM[8]; #ifdef USE_NEW_DYNAREC - uint32_t old_fp_control, new_fp_control; + uint32_t old_fp_control; + uint32_t new_fp_control; # if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86 - uint16_t old_fp_control2, new_fp_control2; + uint16_t old_fp_control2; + uint16_t new_fp_control2; # endif # if defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined _M_IX86 || defined __amd64__ || defined _M_X64 - uint32_t trunc_fp_control; + uint32_t trunc_fp_control; # endif #else - uint16_t old_npxc, new_npxc; + uint16_t old_npxc; + uint16_t new_npxc; #endif - x86seg seg_cs, seg_ds, seg_es, seg_ss, - seg_fs, seg_gs; + x86seg seg_cs; + x86seg seg_ds; + x86seg seg_es; + x86seg seg_ss; + x86seg seg_fs; + x86seg seg_gs; union { uint32_t l; uint16_t w; } CR0; - uint16_t flags, eflags; + uint16_t flags; + uint16_t eflags; uint32_t _smbase; } cpu_state_t; @@ -415,13 +436,15 @@ typedef struct { uint16_t fds; floatx80 st_space[8]; unsigned char tos; - unsigned char align1, align2, align3; + unsigned char align1; + unsigned char align2; + unsigned char align3; } fpu_state_t; #define in_smm cpu_state._in_smm #define smi_line cpu_state._smi_line -#define smbase cpu_state._smbase +#define smbase cpu_state._smbase /*The cpu_state.flags below must match in both cpu_cur_status and block->status for a block to be valid*/ @@ -508,7 +531,8 @@ extern int cpu_override; extern int cpu_isintel; extern int cpu_iscyrix; -extern int cpu_16bitbus, cpu_64bitbus; +extern int cpu_16bitbus; +extern int cpu_64bitbus; extern int cpu_pci_speed; extern int cpu_multi; extern double cpu_dmulti; @@ -517,8 +541,19 @@ extern double cpu_busspeed; extern int cpu_cyrix_alignment; /*Cyrix 5x86/6x86 only has data misalignment penalties when crossing 8-byte boundaries*/ -extern int is8086, is186, is286, is386, is6117, is486; -extern int is_am486, is_am486dxl, is_pentium, is_k5, is_k6, is_p6, is_cxsmm; +extern int is8086; +extern int is186; +extern int is286; +extern int is386; +extern int is6117; +extern int is486; +extern int is_am486; +extern int is_am486dxl; +extern int is_pentium; +extern int is_k5; +extern int is_k6; +extern int is_p6; +extern int is_cxsmm; extern int hascache; extern int isibm486; extern int is_nec; @@ -536,7 +571,8 @@ extern int hasfpu; extern uint32_t cpu_features; -extern int smi_latched, smm_in_hlt; +extern int smi_latched; +extern int smm_in_hlt; extern int smi_block; #ifdef USE_NEW_DYNAREC @@ -552,12 +588,21 @@ extern int cgate16; extern int cpl_override; extern int CPUID; extern uint64_t xt_cpu_multi; -extern int isa_cycles, cpu_inited; -extern uint32_t oldds, oldss, olddslimit, oldsslimit, olddslimitw, oldsslimitw; +extern int isa_cycles; +extern int cpu_inited; +extern uint32_t oldds; +extern uint32_t oldss; +extern uint32_t olddslimit; +extern uint32_t oldsslimit; +extern uint32_t olddslimitw; +extern uint32_t oldsslimitw; extern uint32_t pccache; extern uint8_t *pccache2; -extern double bus_timing, isa_timing, pci_timing, agp_timing; +extern double bus_timing; +extern double isa_timing; +extern double pci_timing; +extern double agp_timing; extern uint64_t pmc[2]; extern uint16_t temp_seg_data[4]; extern uint16_t cs_msr; @@ -565,13 +610,16 @@ extern uint32_t esp_msr; extern uint32_t eip_msr; /* For the AMD K6. */ -extern uint64_t amd_efer, star; +extern uint64_t amd_efer; +extern uint64_t star; #define FPU_CW_Reserved_Bits (0xe0c0) -#define cr0 cpu_state.CR0.l -#define msw cpu_state.CR0.w -extern uint32_t cr2, cr3, cr4; +#define cr0 cpu_state.CR0.l +#define msw cpu_state.CR0.w +extern uint32_t cr2; +extern uint32_t cr3; +extern uint32_t cr4; extern uint32_t dr[8]; extern uint32_t _tr[8]; extern uint32_t cache_index; @@ -581,7 +629,10 @@ extern uint8_t _cache[2048]; _cs,_ds,_es,_ss are the segment structures CS,DS,ES,SS is the 16-bit data cs,ds,es,ss are defines to the bases*/ -extern x86seg gdt, ldt, idt, tr; +extern x86seg gdt; +extern x86seg ldt; +extern x86seg idt; +extern x86seg tr; extern x86seg _oldds; #define CS cpu_state.seg_cs.seg #define DS cpu_state.seg_ds.seg @@ -598,37 +649,67 @@ extern x86seg _oldds; #define ISA_CYCLES(x) (x * isa_cycles) -extern int cpu_cycles_read, cpu_cycles_read_l, cpu_cycles_write, cpu_cycles_write_l; -extern int cpu_prefetch_cycles, cpu_prefetch_width, cpu_mem_prefetch_cycles, cpu_rom_prefetch_cycles; +extern int cpu_cycles_read; +extern int cpu_cycles_read_l; +extern int cpu_cycles_write; +extern int cpu_cycles_write_l; +extern int cpu_prefetch_cycles; +extern int cpu_prefetch_width; +extern int cpu_mem_prefetch_cycles; +extern int cpu_rom_prefetch_cycles; extern int cpu_waitstates; -extern int cpu_cache_int_enabled, cpu_cache_ext_enabled; -extern int cpu_isa_speed, cpu_pci_speed, cpu_agp_speed; +extern int cpu_cache_int_enabled; +extern int cpu_cache_ext_enabled; +extern int cpu_isa_speed; +extern int cpu_pci_speed; +extern int cpu_agp_speed; extern int timing_rr; -extern int timing_mr, timing_mrl; -extern int timing_rm, timing_rml; -extern int timing_mm, timing_mml; -extern int timing_bt, timing_bnt; -extern int timing_int, timing_int_rm, timing_int_v86, timing_int_pm; -extern int timing_int_pm_outer, timing_iret_rm, timing_iret_v86, timing_iret_pm; -extern int timing_iret_pm_outer, timing_call_rm, timing_call_pm; -extern int timing_call_pm_gate, timing_call_pm_gate_inner; -extern int timing_retf_rm, timing_retf_pm, timing_retf_pm_outer; -extern int timing_jmp_rm, timing_jmp_pm, timing_jmp_pm_gate; +extern int timing_mr; +extern int timing_mrl; +extern int timing_rm; +extern int timing_rml; +extern int timing_mm; +extern int timing_mml; +extern int timing_bt; +extern int timing_bnt; +extern int timing_int; +extern int timing_int_rm; +extern int timing_int_v86; +extern int timing_int_pm; +extern int timing_int_pm_outer; +extern int timing_iret_rm; +extern int timing_iret_v86; +extern int timing_iret_pm; +extern int timing_iret_pm_outer; +extern int timing_call_rm; +extern int timing_call_pm; +extern int timing_call_pm_gate; +extern int timing_call_pm_gate_inner; +extern int timing_retf_rm; +extern int timing_retf_pm; +extern int timing_retf_pm_outer; +extern int timing_jmp_rm; +extern int timing_jmp_pm; +extern int timing_jmp_pm_gate; extern int timing_misaligned; -extern int in_sys, unmask_a20_in_smm; +extern int in_sys; +extern int unmask_a20_in_smm; extern int cycles_main; extern uint32_t old_rammask; #ifdef USE_ACYCS extern int acycs; #endif -extern int pic_pending, is_vpc; -extern int soft_reset_mask, alt_access; +extern int pic_pending; +extern int is_vpc; +extern int soft_reset_mask; +extern int alt_access; extern int cpu_end_block_after_ins; -extern uint16_t cpu_fast_off_count, cpu_fast_off_val; +extern uint16_t cpu_fast_off_count; +extern uint16_t cpu_fast_off_val; extern uint32_t cpu_fast_off_flags; /* Functions. */ @@ -704,7 +785,8 @@ extern void x87_dumpregs(void); extern void x87_reset(void); #endif -extern int cpu_effective, cpu_alt_reset; +extern int cpu_effective; +extern int cpu_alt_reset; extern void cpu_dynamic_switch(int new_cpu); extern void cpu_ven_reset(void); @@ -729,22 +811,23 @@ void cyrix_write_seg_descriptor(uint32_t addr, x86seg *seg); #define SMHR_VALID (1 << 0) #define SMHR_ADDR_MASK (0xfffffffc) -typedef struct -{ - struct - { +typedef struct { + struct { uint32_t base; uint64_t size; } arr[8]; uint32_t smhr; } cyrix_t; -extern uint32_t addr64, addr64_2; -extern uint32_t addr64a[8], addr64a_2[8]; +extern uint32_t addr64; +extern uint32_t addr64_2; +extern uint32_t addr64a[8]; +extern uint32_t addr64a_2[8]; extern int soft_reset_pci; -extern int reset_on_hlt, hlt_reset_pending; +extern int reset_on_hlt; +extern int hlt_reset_pending; extern cyrix_t cyrix; @@ -752,7 +835,8 @@ extern uint8_t use_custom_nmi_vector; extern uint32_t custom_nmi_vector; extern void (*cpu_exec)(int cycs); -extern uint8_t do_translate, do_translate2; +extern uint8_t do_translate; +extern uint8_t do_translate2; extern void SF_FPU_reset(void); diff --git a/src/ddma.c b/src/ddma.c index 7623dc0df..098b1c573 100644 --- a/src/ddma.c +++ b/src/ddma.c @@ -34,6 +34,7 @@ #include <86box/pit.h> #include <86box/dma.h> #include <86box/ddma.h> +#include <86box/plat_unused.h> #ifdef ENABLE_DDMA_LOG int ddma_do_log = ENABLE_DDMA_LOG; @@ -54,9 +55,9 @@ ddma_log(const char *fmt, ...) #endif static uint8_t -ddma_reg_read(uint16_t addr, void *p) +ddma_reg_read(uint16_t addr, void *priv) { - ddma_channel_t *dev = (ddma_channel_t *) p; + ddma_channel_t *dev = (ddma_channel_t *) priv; uint8_t ret = 0xff; int ch = dev->channel; int dmab = (ch >= 4) ? 0xc0 : 0x00; @@ -80,15 +81,18 @@ ddma_reg_read(uint16_t addr, void *p) case 0x09: ret = inb(dmab + 0x08); break; + + default: + break; } return ret; } static void -ddma_reg_write(uint16_t addr, uint8_t val, void *p) +ddma_reg_write(uint16_t addr, uint8_t val, void *priv) { - ddma_channel_t *dev = (ddma_channel_t *) p; + ddma_channel_t *dev = (ddma_channel_t *) priv; int ch = dev->channel; int page_regs[4] = { 7, 3, 1, 2 }; int dmab = (ch >= 4) ? 0xc0 : 0x00; @@ -138,6 +142,9 @@ ddma_reg_write(uint16_t addr, uint8_t val, void *p) case 0x0f: outb(dmab + 0x0a, (val << 2) | (ch & 3)); break; + + default: + break; } } @@ -163,7 +170,7 @@ ddma_close(void *priv) } static void * -ddma_init(const device_t *info) +ddma_init(UNUSED(const device_t *info)) { ddma_t *dev; diff --git a/src/device.c b/src/device.c index 7d8f5e88e..47dae84cf 100644 --- a/src/device.c +++ b/src/device.c @@ -88,46 +88,46 @@ device_init(void) } void -device_set_context(device_context_t *c, const device_t *d, int inst) +device_set_context(device_context_t *c, const device_t *dev, int inst) { void *sec; void *single_sec; memset(c, 0, sizeof(device_context_t)); - c->dev = d; + c->dev = dev; c->instance = inst; if (inst) { - sprintf(c->name, "%s #%i", d->name, inst); + sprintf(c->name, "%s #%i", dev->name, inst); /* If this is the first instance and a numbered section is not present, but a non-numbered section of the same name is, rename the non-numbered section to numbered. */ if (inst == 1) { sec = config_find_section(c->name); - single_sec = config_find_section((char *) d->name); + single_sec = config_find_section((char *) dev->name); if ((sec == NULL) && (single_sec != NULL)) config_rename_section(single_sec, c->name); } } else - sprintf(c->name, "%s", d->name); + sprintf(c->name, "%s", dev->name); } static void -device_context_common(const device_t *d, int inst) +device_context_common(const device_t *dev, int inst) { memcpy(&device_prev, &device_current, sizeof(device_context_t)); - device_set_context(&device_current, d, inst); + device_set_context(&device_current, dev, inst); } void -device_context(const device_t *d) +device_context(const device_t *dev) { - device_context_common(d, 0); + device_context_common(dev, 0); } void -device_context_inst(const device_t *d, int inst) +device_context_inst(const device_t *dev, int inst) { - device_context_common(d, inst); + device_context_common(dev, inst); } void @@ -137,13 +137,13 @@ device_context_restore(void) } static void * -device_add_common(const device_t *d, const device_t *cd, void *p, void *params, int inst) +device_add_common(const device_t *dev, const device_t *cd, void *p, void *params, int inst) { void *priv = NULL; int c; for (c = 0; c < 256; c++) { - if (!inst && (devices[c] == (device_t *) d)) { + if (!inst && (devices[c] == (device_t *) dev)) { device_log("DEVICE: device already exists!\n"); return (NULL); } @@ -157,17 +157,17 @@ device_add_common(const device_t *d, const device_t *cd, void *p, void *params, /* Do this so that a chained device_add will not identify the same ID its master device is already trying to assign. */ - devices[c] = (device_t *) d; + devices[c] = (device_t *) dev; if (p == NULL) { memcpy(&device_prev, &device_current, sizeof(device_context_t)); device_set_context(&device_current, cd, inst); - if (d->init != NULL) { - priv = (d->flags & DEVICE_EXTPARAMS) ? d->init_ext(d, params) : d->init(d); + if (dev->init != NULL) { + priv = (dev->flags & DEVICE_EXTPARAMS) ? dev->init_ext(dev, params) : dev->init(dev); if (priv == NULL) { - if (d->name) - device_log("DEVICE: device '%s' init failed\n", d->name); + if (dev->name) + device_log("DEVICE: device '%s' init failed\n", dev->name); else device_log("DEVICE: device init failed\n"); @@ -178,8 +178,8 @@ device_add_common(const device_t *d, const device_t *cd, void *p, void *params, } } - if (d->name) - device_log("DEVICE: device '%s' init successful\n", d->name); + if (dev->name) + device_log("DEVICE: device '%s' init successful\n", dev->name); else device_log("DEVICE: device init successful\n"); @@ -192,114 +192,114 @@ device_add_common(const device_t *d, const device_t *cd, void *p, void *params, } char * -device_get_internal_name(const device_t *d) +device_get_internal_name(const device_t *dev) { - if (d == NULL) + if (dev == NULL) return ""; - return (char *) d->internal_name; + return (char *) dev->internal_name; } void * -device_add(const device_t *d) +device_add(const device_t *dev) { - return device_add_common(d, d, NULL, NULL, 0); + return device_add_common(dev, dev, NULL, NULL, 0); } void * -device_add_parameters(const device_t *d, void *params) +device_add_parameters(const device_t *dev, void *params) { - return device_add_common(d, d, NULL, params, 0); + return device_add_common(dev, dev, NULL, params, 0); } /* For devices that do not have an init function (internal video etc.) */ void -device_add_ex(const device_t *d, void *priv) +device_add_ex(const device_t *dev, void *priv) { - device_add_common(d, d, priv, NULL, 0); + device_add_common(dev, dev, priv, NULL, 0); } void -device_add_ex_parameters(const device_t *d, void *priv, void *params) +device_add_ex_parameters(const device_t *dev, void *priv, void *params) { - device_add_common(d, d, priv, params, 0); + device_add_common(dev, dev, priv, params, 0); } void * -device_add_inst(const device_t *d, int inst) +device_add_inst(const device_t *dev, int inst) { - return device_add_common(d, d, NULL, NULL, inst); + return device_add_common(dev, dev, NULL, NULL, inst); } void * -device_add_inst_parameters(const device_t *d, int inst, void *params) +device_add_inst_parameters(const device_t *dev, int inst, void *params) { - return device_add_common(d, d, NULL, params, inst); + return device_add_common(dev, dev, NULL, params, inst); } /* For devices that do not have an init function (internal video etc.) */ void -device_add_inst_ex(const device_t *d, void *priv, int inst) +device_add_inst_ex(const device_t *dev, void *priv, int inst) { - device_add_common(d, d, priv, NULL, inst); + device_add_common(dev, dev, priv, NULL, inst); } void -device_add_inst_ex_parameters(const device_t *d, void *priv, int inst, void *params) +device_add_inst_ex_parameters(const device_t *dev, void *priv, int inst, void *params) { - device_add_common(d, d, priv, params, inst); + device_add_common(dev, dev, priv, params, inst); } /* These eight are to add a device with another device's context - will be used to add machines' internal devices. */ void * -device_cadd(const device_t *d, const device_t *cd) +device_cadd(const device_t *dev, const device_t *cd) { - return device_add_common(d, cd, NULL, NULL, 0); + return device_add_common(dev, cd, NULL, NULL, 0); } void * -device_cadd_parameters(const device_t *d, const device_t *cd, void *params) +device_cadd_parameters(const device_t *dev, const device_t *cd, void *params) { - return device_add_common(d, cd, NULL, params, 0); + return device_add_common(dev, cd, NULL, params, 0); } /* For devices that do not have an init function (internal video etc.) */ void -device_cadd_ex(const device_t *d, const device_t *cd, void *priv) +device_cadd_ex(const device_t *dev, const device_t *cd, void *priv) { - device_add_common(d, cd, priv, NULL, 0); + device_add_common(dev, cd, priv, NULL, 0); } void -device_cadd_ex_parameters(const device_t *d, const device_t *cd, void *priv, void *params) +device_cadd_ex_parameters(const device_t *dev, const device_t *cd, void *priv, void *params) { - device_add_common(d, cd, priv, params, 0); + device_add_common(dev, cd, priv, params, 0); } void * -device_cadd_inst(const device_t *d, const device_t *cd, int inst) +device_cadd_inst(const device_t *dev, const device_t *cd, int inst) { - return device_add_common(d, cd, NULL, NULL, inst); + return device_add_common(dev, cd, NULL, NULL, inst); } void * -device_cadd_inst_parameters(const device_t *d, const device_t *cd, int inst, void *params) +device_cadd_inst_parameters(const device_t *dev, const device_t *cd, int inst, void *params) { - return device_add_common(d, cd, NULL, params, inst); + return device_add_common(dev, cd, NULL, params, inst); } /* For devices that do not have an init function (internal video etc.) */ void -device_cadd_inst_ex(const device_t *d, const device_t *cd, void *priv, int inst) +device_cadd_inst_ex(const device_t *dev, const device_t *cd, void *priv, int inst) { - device_add_common(d, cd, priv, NULL, inst); + device_add_common(dev, cd, priv, NULL, inst); } void -device_cadd_inst_ex_parameters(const device_t *d, const device_t *cd, void *priv, int inst, void *params) +device_cadd_inst_ex_parameters(const device_t *dev, const device_t *cd, void *priv, int inst, void *params) { - device_add_common(d, cd, priv, params, inst); + device_add_common(dev, cd, priv, params, inst); } void @@ -328,11 +328,11 @@ device_reset_all(uint32_t match_flags) } void * -device_get_priv(const device_t *d) +device_get_priv(const device_t *dev) { for (uint16_t c = 0; c < DEVICE_MAX; c++) { if (devices[c] != NULL) { - if (devices[c] == d) + if (devices[c] == dev) return (device_priv[c]); } } @@ -341,15 +341,15 @@ device_get_priv(const device_t *d) } int -device_available(const device_t *d) +device_available(const device_t *dev) { device_config_t *config = NULL; device_config_bios_t *bios = NULL; int roms_present = 0; int i = 0; - if (d != NULL) { - config = (device_config_t *) d->config; + if (dev != NULL) { + config = (device_config_t *) dev->config; if (config != NULL) { while (config->type != -1) { if (config->type == CONFIG_BIOS) { @@ -372,8 +372,8 @@ device_available(const device_t *d) } /* No CONFIG_BIOS field present, use the classic available(). */ - if (d->available != NULL) - return (d->available()); + if (dev->available != NULL) + return (dev->available()); else return 1; } @@ -383,13 +383,13 @@ device_available(const device_t *d) } const char * -device_get_bios_file(const device_t *d, const char *internal_name, int file_no) +device_get_bios_file(const device_t *dev, const char *internal_name, int file_no) { device_config_t *config = NULL; device_config_bios_t *bios = NULL; - if (d != NULL) { - config = (device_config_t *) d->config; + if (dev != NULL) { + config = (device_config_t *) dev->config; if (config != NULL) { while (config->type != -1) { if (config->type == CONFIG_BIOS) { @@ -416,18 +416,18 @@ device_get_bios_file(const device_t *d, const char *internal_name, int file_no) } int -device_has_config(const device_t *d) +device_has_config(const device_t *dev) { int c = 0; device_config_t *config; - if (d == NULL) + if (dev == NULL) return 0; - if (d->config == NULL) + if (dev->config == NULL) return 0; - config = (device_config_t *) d->config; + config = (device_config_t *) dev->config; while (config->type != -1) { if (config->type != CONFIG_MAC) @@ -439,11 +439,11 @@ device_has_config(const device_t *d) } int -device_poll(const device_t *d, int x, int y, int z, int b) +device_poll(const device_t *dev, int x, int y, int z, int b) { for (uint16_t c = 0; c < DEVICE_MAX; c++) { if (devices[c] != NULL) { - if (devices[c] == d) { + if (devices[c] == dev) { if (devices[c]->poll) return (devices[c]->poll(x, y, z, b, 0, 0, device_priv[c])); } @@ -454,11 +454,11 @@ device_poll(const device_t *d, int x, int y, int z, int b) } void -device_register_pci_slot(const device_t *d, int device, int type, int inta, int intb, int intc, int intd) +device_register_pci_slot(const device_t *dev, int device, int type, int inta, int intb, int intc, int intd) { for (uint16_t c = 0; c < DEVICE_MAX; c++) { if (devices[c] != NULL) { - if (devices[c] == d) { + if (devices[c] == dev) { if (devices[c]->register_pci_slot) devices[c]->register_pci_slot(device, type, inta, intb, intc, intd, device_priv[c]); return; @@ -470,38 +470,38 @@ device_register_pci_slot(const device_t *d, int device, int type, int inta, int } void -device_get_name(const device_t *d, int bus, char *name) +device_get_name(const device_t *dev, int bus, char *name) { char *sbus = NULL; char *fbus; char *tname; char pbus[8] = { 0 }; - if (d == NULL) + if (dev == NULL) return; name[0] = 0x00; if (bus) { - if (d->flags & DEVICE_ISA) - sbus = (d->flags & DEVICE_AT) ? "ISA16" : "ISA"; - else if (d->flags & DEVICE_CBUS) + if (dev->flags & DEVICE_ISA) + sbus = (dev->flags & DEVICE_AT) ? "ISA16" : "ISA"; + else if (dev->flags & DEVICE_CBUS) sbus = "C-BUS"; - else if (d->flags & DEVICE_MCA) + else if (dev->flags & DEVICE_MCA) sbus = "MCA"; - else if (d->flags & DEVICE_EISA) + else if (dev->flags & DEVICE_EISA) sbus = "EISA"; - else if (d->flags & DEVICE_VLB) + else if (dev->flags & DEVICE_VLB) sbus = "VLB"; - else if (d->flags & DEVICE_PCI) + else if (dev->flags & DEVICE_PCI) sbus = "PCI"; - else if (d->flags & DEVICE_AGP) + else if (dev->flags & DEVICE_AGP) sbus = "AGP"; - else if (d->flags & DEVICE_AC97) + else if (dev->flags & DEVICE_AC97) sbus = "AMR"; - else if (d->flags & DEVICE_COM) + else if (dev->flags & DEVICE_COM) sbus = "COM"; - else if (d->flags & DEVICE_LPT) + else if (dev->flags & DEVICE_LPT) sbus = "LPT"; if (sbus != NULL) { @@ -515,7 +515,7 @@ device_get_name(const device_t *d, int bus, char *name) sbus = "ISA"; else if (!strcmp(sbus, "COM") || !strcmp(sbus, "LPT")) { sbus = NULL; - strcat(name, d->name); + strcat(name, dev->name); return; } @@ -525,17 +525,17 @@ device_get_name(const device_t *d, int bus, char *name) strcat(pbus, ")"); /* Allocate the temporary device name string and set it to all zeroes. */ - tname = (char *) malloc(strlen(d->name) + 1); - memset(tname, 0x00, strlen(d->name) + 1); + tname = (char *) malloc(strlen(dev->name) + 1); + memset(tname, 0x00, strlen(dev->name) + 1); /* First strip the bus string with parentheses. */ - fbus = strstr(d->name, pbus); - if (fbus == d->name) - strcat(tname, d->name + strlen(pbus) + 1); + fbus = strstr(dev->name, pbus); + if (fbus == dev->name) + strcat(tname, dev->name + strlen(pbus) + 1); else if (fbus == NULL) - strcat(tname, d->name); + strcat(tname, dev->name); else { - strncat(tname, d->name, fbus - d->name - 1); + strncat(tname, dev->name, fbus - dev->name - 1); strcat(tname, fbus + strlen(pbus)); } @@ -556,9 +556,9 @@ device_get_name(const device_t *d, int bus, char *name) free(tname); tname = NULL; } else - strcat(name, d->name); + strcat(name, dev->name); } else - strcat(name, d->name); + strcat(name, dev->name); } void @@ -771,7 +771,7 @@ device_is_valid(const device_t *device, int m) if ((device->flags & DEVICE_AGP) && !machine_has_bus(m, MACHINE_BUS_AGP)) return 0; - if ((device->flags & DEVICE_PS2) && !machine_has_bus(m, MACHINE_BUS_PS2)) + if ((device->flags & DEVICE_PS2) && !machine_has_bus(m, MACHINE_BUS_PS2_PORTS)) return 0; if ((device->flags & DEVICE_AC97) && !machine_has_bus(m, MACHINE_BUS_AC97)) diff --git a/src/device/bugger.c b/src/device/bugger.c index 05df6530e..c2678d66a 100644 --- a/src/device/bugger.c +++ b/src/device/bugger.c @@ -266,7 +266,7 @@ bug_reset(void) /* Handle a WRITE operation to one of our registers. */ static void -bug_write(uint16_t port, uint8_t val, void *priv) +bug_write(uint16_t port, uint8_t val, UNUSED(void *priv)) { switch (port - BUGGER_ADDR) { case BUG_CTRL: /* control register */ @@ -284,12 +284,14 @@ bug_write(uint16_t port, uint8_t val, void *priv) bug_wdata(val); } break; + default: + break; } } /* Handle a READ operation from one of our registers. */ static uint8_t -bug_read(uint16_t port, void *priv) +bug_read(uint16_t port, UNUSED(void *priv)) { uint8_t ret = 0xff; @@ -319,7 +321,7 @@ bug_read(uint16_t port, void *priv) /* Initialize the ISA BusBugger emulator. */ static void * -bug_init(const device_t *info) +bug_init(UNUSED(const device_t *info)) { bugger_log("%s, I/O=%04x\n", info->name, BUGGER_ADDR); diff --git a/src/device/cartridge.c b/src/device/cartridge.c index 6f8424f70..6e399cd33 100644 --- a/src/device/cartridge.c +++ b/src/device/cartridge.c @@ -29,8 +29,7 @@ #include <86box/machine.h> #include <86box/cartridge.h> -typedef struct -{ +typedef struct cart_t { uint8_t *buf; uint32_t base; } cart_t; @@ -68,7 +67,7 @@ cart_read(uint32_t addr, void *priv) } static void -cart_load_error(int drive, char *fn) +cart_load_error(int drive, UNUSED(char *fn)) { cartridge_log("Cartridge: could not load '%s'\n", fn); memset(cart_fns[drive], 0, sizeof(cart_fns[drive])); diff --git a/src/device/cassette.c b/src/device/cassette.c index 4582e0751..17b650e81 100644 --- a/src/device/cassette.c +++ b/src/device/cassette.c @@ -544,7 +544,7 @@ pc_cas_set_out(pc_cassette_t *cas, unsigned char val) } void -pc_cas_print_state(const pc_cassette_t *cas) +pc_cas_print_state(UNUSED(const pc_cassette_t *cas)) { cassette_log("%s %s %lu %s %lu\n", (cas->fname != NULL) ? cas->fname : "", cas->pcm ? "pcm" : "cas", cas->srate, cas->save ? "save" : "load", cas->position); } @@ -552,9 +552,8 @@ pc_cas_print_state(const pc_cassette_t *cas) static void pc_cas_clock_pcm(pc_cassette_t *cas, unsigned long cnt) { - unsigned long i; - unsigned long n; - int v = 0; + uint64_t n; + int v = 0; n = cas->srate * cnt + cas->clk_pcm; @@ -567,11 +566,11 @@ pc_cas_clock_pcm(pc_cassette_t *cas, unsigned long cnt) } if (cas->save) { - for (i = 0; i < n; i++) { + for (uint64_t i = 0; i < n; i++) { pc_cas_write_smp(cas, cas->pcm_out_val); } } else { - for (i = 0; i < n; i++) { + for (uint64_t i = 0; i < n; i++) { v = pc_cas_read_smp(cas); } @@ -642,7 +641,7 @@ pc_cas_advance(pc_cassette_t *cas) } static void -cassette_close(void *p) +cassette_close(UNUSED(void *priv)) { if (cassette != NULL) { free(cassette); @@ -664,7 +663,7 @@ cassette_callback(void *p) } static void * -cassette_init(const device_t *info) +cassette_init(UNUSED(const device_t *info)) { cassette = NULL; diff --git a/src/device/clock_ics9xxx.c b/src/device/clock_ics9xxx.c index 0fedfaef7..21a4c14ba 100644 --- a/src/device/clock_ics9xxx.c +++ b/src/device/clock_ics9xxx.c @@ -26,6 +26,7 @@ #include <86box/i2c.h> #include "cpu.h" #include <86box/clock.h> +#include <86box/plat_unused.h> #ifdef ENABLE_ICS9xxx_LOG int ics9xxx_do_log = ENABLE_ICS9xxx_LOG; @@ -51,26 +52,26 @@ ics9xxx_log(const char *fmt, ...) , #define agp_div ram_mult /* temporarily saves space while neither field matters */ -typedef struct { +typedef struct ics9xxx_frequency_t { uint16_t bus : 15; uint8_t ram_mult : 2; /* change to full float when this becomes useful */ uint8_t pci_div : 3; } ics9xxx_frequency_t; -typedef struct { +typedef struct ics9xxx_model_t { #if defined(ENABLE_ICS9xxx_LOG) || defined(ENABLE_ICS9xxx_DETECT) const char *name; /* populated by macro */ #endif uint8_t max_reg : 3; /* largest register index */ uint8_t regs[7]; /* default registers */ - struct { /* for each hardware frequency select bit [FS0:FS4]: */ + struct fs_regs { /* for each hardware frequency select bit [FS0:FS4]: */ uint8_t normal_reg : 3; /* which register (or -1) for non-inverted input (FSn) */ uint8_t normal_bit : 3; /* which bit (0-7) for non-inverted input (FSn) */ uint8_t inv_reg : 3; /* which register (or -1) for inverted input (FSn#) */ uint8_t inv_bit : 3; /* which bit (0-7) for inverted input (FSn#) */ } fs_regs[5]; uint8_t normal_bits_fixed : 1; /* set to 1 if the non-inverted bits are straps (hardware select only) */ - struct { /* hardware select bit, which should be cleared for hardware select (latched inputs), or set for programming */ + struct hw_select { /* hardware select bit, which should be cleared for hardware select (latched inputs), or set for programming */ uint8_t normal_reg : 3; /* which register (or -1) */ uint8_t normal_bit : 3; /* which bit (0-7) */ } hw_select; @@ -79,7 +80,7 @@ typedef struct { const ics9xxx_frequency_t *frequencies; /* frequency table, if not using another model's table */ } ics9xxx_model_t; -typedef struct { +typedef struct ics9xxx_t { uint8_t model_idx; ics9xxx_model_t *model; device_t *dyn_device; @@ -941,7 +942,10 @@ ics9xxx_detect(ics9xxx_t *dev) if (!(dev->regs[detect_reg] & 0x40)) pclog("Bit 3 of register %d is clear, probably in hardware select mode!\n", detect_reg); - uint8_t i = 0, matches = 0, val, bitmask; + uint8_t i = 0; + uint8_t matches = 0; + uint8_t val; + uint8_t bitmask; ics9xxx_frequency_t *frequencies_ptr; uint32_t delta; for (uint8_t j = 0; j < ICS9xxx_MAX; j++) { @@ -983,7 +987,7 @@ ics9xxx_detect(ics9xxx_t *dev) #endif static uint8_t -ics9xxx_start(void *bus, uint8_t addr, uint8_t read, void *priv) +ics9xxx_start(UNUSED(void *bus), UNUSED(uint8_t addr), UNUSED(uint8_t read), void *priv) { ics9xxx_t *dev = (ics9xxx_t *) priv; @@ -995,7 +999,7 @@ ics9xxx_start(void *bus, uint8_t addr, uint8_t read, void *priv) } static uint8_t -ics9xxx_read(void *bus, uint8_t addr, void *priv) +ics9xxx_read(UNUSED(void *bus), UNUSED(uint8_t addr), void *priv) { ics9xxx_t *dev = (ics9xxx_t *) priv; uint8_t ret = 0xff; @@ -1049,7 +1053,7 @@ ics9xxx_set(ics9xxx_t *dev, uint8_t val) } static uint8_t -ics9xxx_write(void *bus, uint8_t addr, uint8_t data, void *priv) +ics9xxx_write(UNUSED(void *bus), UNUSED(uint8_t addr), uint8_t data, void *priv) { ics9xxx_t *dev = (ics9xxx_t *) priv; diff --git a/src/device/hasp.c b/src/device/hasp.c index 8c71e1f3f..9873c3460 100644 --- a/src/device/hasp.c +++ b/src/device/hasp.c @@ -52,9 +52,11 @@ enum { HASP_TYPE_SAVQUEST = 0 }; -typedef struct { - const uint8_t *password, *prodinfo; - const uint8_t password_size, prodinfo_size; +typedef struct hasp_type_t { + const uint8_t *password; + const uint8_t *prodinfo; + const uint8_t password_size; + const uint8_t prodinfo_size; } hasp_type_t; typedef struct @@ -62,8 +64,13 @@ typedef struct void *lpt; const hasp_type_t *type; - int index, state, passindex, passmode, prodindex; - uint8_t tmppass[0x29], status; + int index; + int state; + int passindex; + int passmode; + int prodindex; + uint8_t tmppass[0x29]; + uint8_t status; } hasp_t; static const hasp_type_t hasp_types[] = { @@ -131,6 +138,8 @@ hasp_write_data(uint8_t val, void *priv) return; } break; + default: + break; } dev->status = 0; @@ -163,6 +172,8 @@ hasp_write_data(uint8_t val, void *priv) I guessed the implicit ones with a bit of trial and error */ dev->status = 0x20; return; + default: + break; } } @@ -199,6 +210,8 @@ hasp_write_data(uint8_t val, void *priv) /* again, just the relevant bits instead of the true values */ dev->status = 0x20; break; + default: + break; } } else if (dev->state == HASP_STATE_PASSWORD_END) { if (val & 1) { diff --git a/src/device/hwm_gl518sm.c b/src/device/hwm_gl518sm.c index 730e2f2ce..01f917b32 100644 --- a/src/device/hwm_gl518sm.c +++ b/src/device/hwm_gl518sm.c @@ -27,6 +27,8 @@ #include <86box/io.h> #include <86box/i2c.h> #include <86box/hwm.h> +#include <86box/plat_unused.h> + #define CLAMP(a, min, max) (((a) < (min)) ? (min) : (((a) > (max)) ? (max) : (a))) /* Formulas and factors derived from Linux's gl518sm.c driver. */ @@ -34,14 +36,16 @@ #define GL518SM_VOLTAGE_TO_REG(v) ((uint8_t) round((v) / 19.0)) #define GL518SM_VDD_TO_REG(v) ((uint8_t) (((v) *4) / 95.0)) -typedef struct { +typedef struct gl518sm_t { uint32_t local; hwm_values_t *values; uint16_t regs[32]; uint8_t addr_register : 5; - uint8_t i2c_addr : 7, i2c_state : 2, i2c_enabled : 1; + uint8_t i2c_addr : 7; + uint8_t i2c_state : 2; + uint8_t i2c_enabled : 1; } gl518sm_t; static uint8_t gl518sm_i2c_start(void *bus, uint8_t addr, uint8_t read, void *priv); @@ -85,7 +89,7 @@ gl518sm_remap(gl518sm_t *dev, uint8_t addr) } static uint8_t -gl518sm_i2c_start(void *bus, uint8_t addr, uint8_t read, void *priv) +gl518sm_i2c_start(UNUSED(void *bus), UNUSED(uint8_t addr), UNUSED(uint8_t read), void *priv) { gl518sm_t *dev = (gl518sm_t *) priv; @@ -95,7 +99,7 @@ gl518sm_i2c_start(void *bus, uint8_t addr, uint8_t read, void *priv) } static uint8_t -gl518sm_i2c_read(void *bus, uint8_t addr, void *priv) +gl518sm_i2c_read(UNUSED(void *bus), UNUSED(uint8_t addr), void *priv) { gl518sm_t *dev = (gl518sm_t *) priv; uint16_t read = gl518sm_read(dev, dev->addr_register); @@ -159,7 +163,7 @@ gl518sm_read(gl518sm_t *dev, uint8_t reg) } static uint8_t -gl518sm_i2c_write(void *bus, uint8_t addr, uint8_t data, void *priv) +gl518sm_i2c_write(UNUSED(void *bus), UNUSED(uint8_t addr), uint8_t data, void *priv) { gl518sm_t *dev = (gl518sm_t *) priv; diff --git a/src/device/hwm_lm75.c b/src/device/hwm_lm75.c index fdfff0e44..14b638365 100644 --- a/src/device/hwm_lm75.c +++ b/src/device/hwm_lm75.c @@ -25,6 +25,7 @@ #include <86box/device.h> #include <86box/i2c.h> #include <86box/hwm.h> +#include <86box/plat_unused.h> #define LM75_TEMP_TO_REG(t) ((t) << 8) @@ -47,7 +48,7 @@ lm75_log(const char *fmt, ...) #endif static uint8_t -lm75_i2c_start(void *bus, uint8_t addr, uint8_t read, void *priv) +lm75_i2c_start(UNUSED(void *bus), UNUSED(uint8_t addr), UNUSED(uint8_t read), void *priv) { lm75_t *dev = (lm75_t *) priv; @@ -74,7 +75,7 @@ lm75_read(lm75_t *dev, uint8_t reg) } static uint8_t -lm75_i2c_read(void *bus, uint8_t addr, void *priv) +lm75_i2c_read(UNUSED(void *bus), UNUSED(uint8_t addr), void *priv) { lm75_t *dev = (lm75_t *) priv; uint8_t ret = 0; @@ -103,6 +104,8 @@ lm75_i2c_read(void *bus, uint8_t addr, void *priv) case 0x3: /* Tos */ ret = lm75_read(dev, (dev->i2c_state == 1) ? 0x5 : 0x6); break; + default: + break; } } @@ -128,7 +131,7 @@ lm75_write(lm75_t *dev, uint8_t reg, uint8_t val) } static uint8_t -lm75_i2c_write(void *bus, uint8_t addr, uint8_t data, void *priv) +lm75_i2c_write(UNUSED(void *bus), UNUSED(uint8_t addr), uint8_t data, void *priv) { lm75_t *dev = (lm75_t *) priv; @@ -164,6 +167,9 @@ lm75_i2c_write(void *bus, uint8_t addr, uint8_t data, void *priv) case 0x3: /* Tos */ lm75_write(dev, (dev->i2c_state == 1) ? 0x5 : 0x6, data); break; + + default: + break; } } diff --git a/src/device/hwm_lm78.c b/src/device/hwm_lm78.c index 9455a2ebd..5fe05bb6d 100644 --- a/src/device/hwm_lm78.c +++ b/src/device/hwm_lm78.c @@ -27,6 +27,7 @@ #include <86box/timer.h> #include <86box/machine.h> #include <86box/nvr.h> +#include <86box/plat_unused.h> #include "cpu.h" #include <86box/i2c.h> #include <86box/hwm.h> @@ -48,7 +49,7 @@ #define LM78_NEG_VOLTAGE(v, r) (v * (604.0 / ((double) r))) /* negative voltage formula from the W83781D datasheet */ #define LM78_NEG_VOLTAGE2(v, r) (((3600 + v) * (((double) r) / (((double) r) + 56.0))) - v) /* negative voltage formula from the W83782D datasheet */ -typedef struct { +typedef struct lm78_t { uint32_t local; hwm_values_t *values; device_t *lm75[2]; @@ -56,10 +57,10 @@ typedef struct { uint8_t regs[256]; union { - struct { + struct w83782d { uint8_t regs[2][16]; } w83782d; - struct { + struct as99127f { uint8_t regs[3][128]; uint8_t nvram[1024], nvram_i2c_state : 2, nvram_updated : 1; @@ -69,9 +70,12 @@ typedef struct { uint8_t security_i2c_state : 1, security_addr_register : 7; } as99127f; }; - uint8_t addr_register, data_register; + uint8_t addr_register; + uint8_t data_register; - uint8_t i2c_addr : 7, i2c_state : 1, i2c_enabled : 1; + uint8_t i2c_addr : 7; + uint8_t i2c_state : 1; + uint8_t i2c_enabled : 1; } lm78_t; static void lm78_remap(lm78_t *dev, uint8_t addr); @@ -114,7 +118,7 @@ lm78_nvram(lm78_t *dev, uint8_t save) } static uint8_t -lm78_nvram_start(void *bus, uint8_t addr, uint8_t read, void *priv) +lm78_nvram_start(UNUSED(void *bus), UNUSED(uint8_t addr), UNUSED(uint8_t read), void *priv) { lm78_t *dev = (lm78_t *) priv; @@ -124,7 +128,7 @@ lm78_nvram_start(void *bus, uint8_t addr, uint8_t read, void *priv) } static uint8_t -lm78_nvram_read(void *bus, uint8_t addr, void *priv) +lm78_nvram_read(UNUSED(void *bus), UNUSED(uint8_t addr), void *priv) { lm78_t *dev = (lm78_t *) priv; uint8_t ret = 0xff; @@ -158,7 +162,7 @@ lm78_nvram_read(void *bus, uint8_t addr, void *priv) } static uint8_t -lm78_nvram_write(void *bus, uint8_t addr, uint8_t val, void *priv) +lm78_nvram_write(UNUSED(void *bus), uint8_t addr, uint8_t val, void *priv) { lm78_t *dev = (lm78_t *) priv; @@ -195,7 +199,7 @@ lm78_nvram_write(void *bus, uint8_t addr, uint8_t val, void *priv) } static uint8_t -lm78_security_start(void *bus, uint8_t addr, uint8_t read, void *priv) +lm78_security_start(UNUSED(void *bus), UNUSED(uint8_t addr), UNUSED(uint8_t read), void *priv) { lm78_t *dev = (lm78_t *) priv; @@ -205,7 +209,7 @@ lm78_security_start(void *bus, uint8_t addr, uint8_t read, void *priv) } static uint8_t -lm78_security_read(void *bus, uint8_t addr, void *priv) +lm78_security_read(UNUSED(void *bus), UNUSED(uint8_t addr), void *priv) { lm78_t *dev = (lm78_t *) priv; @@ -213,7 +217,7 @@ lm78_security_read(void *bus, uint8_t addr, void *priv) } static uint8_t -lm78_security_write(void *bus, uint8_t addr, uint8_t val, void *priv) +lm78_security_write(UNUSED(void *bus), UNUSED(uint8_t addr), uint8_t val, void *priv) { lm78_t *dev = (lm78_t *) priv; @@ -229,6 +233,8 @@ lm78_security_write(void *bus, uint8_t addr, uint8_t val, void *priv) case 0xe7: /* read-only registers */ return 1; + default: + break; } dev->as99127f.regs[2][dev->as99127f.security_addr_register++] = val; @@ -316,7 +322,7 @@ lm78_reset(void *priv) } static uint8_t -lm78_i2c_start(void *bus, uint8_t addr, uint8_t read, void *priv) +lm78_i2c_start(UNUSED(void *bus), UNUSED(uint8_t addr), UNUSED(uint8_t read), void *priv) { lm78_t *dev = (lm78_t *) priv; @@ -405,7 +411,7 @@ lm78_isa_read(uint16_t port, void *priv) } static uint8_t -lm78_i2c_read(void *bus, uint8_t addr, void *priv) +lm78_i2c_read(UNUSED(void *bus), UNUSED(uint8_t addr), void *priv) { lm78_t *dev = (lm78_t *) priv; @@ -446,6 +452,8 @@ lm78_write(lm78_t *dev, uint8_t reg, uint8_t val, uint8_t bank) case 0x20: val &= 0x7f; break; + default: + break; } dev->as99127f.regs[0][reg] = val; @@ -477,6 +485,8 @@ lm78_write(lm78_t *dev, uint8_t reg, uint8_t val, uint8_t bank) case 0x5f: /* read-only registers */ return 0; + default: + break; } dev->w83782d.regs[0][reg & 0x0f] = val; @@ -497,6 +507,8 @@ lm78_write(lm78_t *dev, uint8_t reg, uint8_t val, uint8_t bank) case 0x5f: /* read-only registers */ return 0; + default: + break; } dev->w83782d.regs[1][reg & 0x0f] = val; @@ -559,6 +571,8 @@ lm78_write(lm78_t *dev, uint8_t reg, uint8_t val, uint8_t bank) if (!(dev->local & LM78_WINBOND)) return 0; break; + default: + break; } if ((reg >= 0x60) && (reg <= 0x94)) /* write auto-increment value RAM registers to their non-auto-increment locations */ @@ -613,6 +627,9 @@ lm78_write(lm78_t *dev, uint8_t reg, uint8_t val, uint8_t bank) i2c_sethandler(i2c_smbus, (val & 0xf8) >> 1, 4, lm78_nvram_start, lm78_nvram_read, lm78_nvram_write, NULL, dev); } break; + + default: + break; } return 1; @@ -644,7 +661,7 @@ lm78_isa_write(uint16_t port, uint8_t val, void *priv) } static uint8_t -lm78_i2c_write(void *bus, uint8_t addr, uint8_t val, void *priv) +lm78_i2c_write(UNUSED(void *bus), UNUSED(uint8_t addr), uint8_t val, void *priv) { lm78_t *dev = (lm78_t *) priv; @@ -694,13 +711,16 @@ lm78_as99127f_write(void *priv, uint8_t reg, uint8_t val) resetx86(); } break; + + default: + break; } return 1; } static void -lm78_reset_timer(void *priv) +lm78_reset_timer(UNUSED(void *priv)) { pc_reset_hard(); } diff --git a/src/device/hwm_vt82c686.c b/src/device/hwm_vt82c686.c index 877138a4a..bdd560b23 100644 --- a/src/device/hwm_vt82c686.c +++ b/src/device/hwm_vt82c686.c @@ -25,6 +25,7 @@ #include <86box/device.h> #include <86box/io.h> #include <86box/hwm.h> +#include <86box/plat_unused.h> #define CLAMP(a, min, max) (((a) < (min)) ? (min) : (((a) > (max)) ? (max) : (a))) /* Formulas and factors derived from Linux's via686a.c driver. */ @@ -32,7 +33,7 @@ #define VT82C686_TEMP_TO_REG(t) (-1.160370e-10 * (t * t * t * t * t * t) + 3.193693e-08 * (t * t * t * t * t) - 1.464447e-06 * (t * t * t * t) - 2.525453e-04 * (t * t * t) + 1.424593e-02 * (t * t) + 2.148941e+00 * t + 7.275808e+01) #define VT82C686_VOLTAGE_TO_REG(v, f) CLAMP((((v) * (2.628 / (f))) - 120.5) / 25, 0, 255) -typedef struct { +typedef struct vt82c686_t { hwm_values_t *values; uint8_t enable; @@ -113,6 +114,9 @@ vt82c686_write(uint16_t port, uint8_t val, void *priv) case 0x48: val &= 0x7f; break; + + default: + break; } dev->regs[reg] = val; @@ -143,6 +147,9 @@ vt82c686_hwm_write(uint8_t addr, uint8_t val, void *priv) case 0x74: dev->enable = val & 0x01; break; + + default: + break; } if (dev->enable && dev->io_base) @@ -174,7 +181,7 @@ vt82c686_close(void *priv) } static void * -vt82c686_init(const device_t *info) +vt82c686_init(UNUSED(const device_t *info)) { vt82c686_t *dev = (vt82c686_t *) malloc(sizeof(vt82c686_t)); memset(dev, 0, sizeof(vt82c686_t)); diff --git a/src/device/i2c.c b/src/device/i2c.c index 7937aa10d..63494cac7 100644 --- a/src/device/i2c.c +++ b/src/device/i2c.c @@ -38,9 +38,10 @@ typedef struct _i2c_ { struct _i2c_ *prev, *next; } i2c_t; -typedef struct { +typedef struct i2c_bus_t { char *name; - i2c_t *devices[NADDRS], *last[NADDRS]; + i2c_t *devices[NADDRS]; + i2c_t *last[NADDRS]; } i2c_bus_t; void *i2c_smbus; diff --git a/src/device/i2c_gpio.c b/src/device/i2c_gpio.c index cb7cf6147..3eda0c4f7 100644 --- a/src/device/i2c_gpio.c +++ b/src/device/i2c_gpio.c @@ -24,11 +24,18 @@ #include <86box/86box.h> #include <86box/i2c.h> -typedef struct { +typedef struct i2c_gpio_t { char *bus_name; void *i2c; - uint8_t prev_scl, prev_sda, slave_sda, started, - slave_addr_received, slave_addr, slave_read, pos, byte; + uint8_t prev_scl; + uint8_t prev_sda; + uint8_t slave_sda; + uint8_t started; + uint8_t slave_addr_received; + uint8_t slave_addr; + uint8_t slave_read; + uint8_t pos; + uint8_t byte; } i2c_gpio_t; #ifdef ENABLE_I2C_GPIO_LOG @@ -136,6 +143,9 @@ i2c_gpio_set(void *dev_handle, uint8_t scl, uint8_t sda) dev->slave_sda = !i2c_write(dev->i2c, dev->slave_addr, dev->byte); i2c_gpio_log(2, "I2C GPIO %s: Write %02X %sACK\n", dev->bus_name, dev->byte, dev->slave_sda ? "N" : ""); break; + + default: + break; } } else if (dev->pos == 9) { switch (dev->slave_read) { diff --git a/src/device/ibm_5161.c b/src/device/ibm_5161.c index ea62c2abf..cc9d54936 100644 --- a/src/device/ibm_5161.c +++ b/src/device/ibm_5161.c @@ -26,11 +26,11 @@ #include <86box/pci.h> #include <86box/timer.h> #include <86box/pit.h> +#include <86box/plat_unused.h> #include <86box/port_92.h> #include <86box/machine.h> -typedef struct -{ +typedef struct ibm_5161_t { uint8_t regs[8]; } ibm_5161_t; @@ -76,21 +76,24 @@ ibm_5161_in(uint16_t port, void *priv) 0 =On */ ret = dev->regs[3] & 0x01; break; + + default: + break; } return ret; } static void -ibm_5161_close(void *p) +ibm_5161_close(void *priv) { - ibm_5161_t *dev = (ibm_5161_t *) p; + ibm_5161_t *dev = (ibm_5161_t *) priv; free(dev); } static void * -ibm_5161_init(const device_t *info) +ibm_5161_init(UNUSED(const device_t *info)) { ibm_5161_t *dev = (ibm_5161_t *) malloc(sizeof(ibm_5161_t)); memset(dev, 0, sizeof(ibm_5161_t)); diff --git a/src/device/isamem.c b/src/device/isamem.c index 708274fca..7e9126e85 100644 --- a/src/device/isamem.c +++ b/src/device/isamem.c @@ -112,7 +112,7 @@ #define EXTRAM_HIGH 1 #define EXTRAM_XMS 2 -typedef struct { +typedef struct emsreg_t { int8_t enabled; /* 1=ENABLED */ uint8_t page; /* page# in EMS RAM */ uint8_t frame; /* (varies with board) */ @@ -121,15 +121,15 @@ typedef struct { mem_mapping_t mapping; /* mapping entry for page */ } emsreg_t; -typedef struct { +typedef struct ext_ram_t { uint32_t base; uint8_t *ptr; } ext_ram_t; -typedef struct { +typedef struct memdev_t { const char *name; - uint8_t board : 6, /* board type */ - reserved : 2; + uint8_t board : 6; /* board type */ + uint8_t reserved : 2; uint8_t flags; #define FLAG_CONFIG 0x01 /* card is configured */ @@ -138,12 +138,12 @@ typedef struct { #define FLAG_EMS 0x40 /* card has EMS mode enabled */ uint16_t total_size; /* configured size in KB */ - uint32_t base_addr, /* configured I/O address */ - start_addr, /* configured memory start */ - frame_addr; /* configured frame address */ + uint32_t base_addr; /* configured I/O address */ + uint32_t start_addr; /* configured memory start */ + uint32_t frame_addr; /* configured frame address */ - uint16_t ems_size, /* EMS size in KB */ - ems_pages; /* EMS size in pages */ + uint16_t ems_size; /* EMS size in KB */ + uint16_t ems_pages; /* EMS size in pages */ uint32_t ems_start; /* start of EMS in RAM */ uint8_t *ram; /* allocated RAM buffer */ @@ -305,6 +305,9 @@ ems_read(uint16_t port, void *priv) case 0x0001: /* W/O */ break; + + default: + break; } #if ISAMEM_DEBUG @@ -383,6 +386,9 @@ ems_write(uint16_t port, uint8_t val, void *priv) if (val) dev->flags |= FLAG_CONFIG; break; + + default: + break; } } @@ -458,6 +464,9 @@ isamem_init(const device_t *info) if (!!device_get_config_int("speed")) dev->flags |= FLAG_FAST; break; + + default: + break; } /* Fix up the memory start address. */ @@ -471,6 +480,7 @@ isamem_init(const device_t *info) isamem_log(", FAST"); if (dev->flags & FLAG_WIDE) isamem_log(", 16BIT"); + isamem_log(")\n"); /* Force (back to) 8-bit bus if needed. */ @@ -617,6 +627,7 @@ isamem_init(const device_t *info) dev->base_addr, dev->ems_size, dev->ems_pages); if (dev->frame_addr > 0) isamem_log(", Frame=%05XH", dev->frame_addr); + isamem_log("\n"); /* diff --git a/src/device/isapnp.c b/src/device/isapnp.c index fcf6053ae..33d5e7192 100644 --- a/src/device/isapnp.c +++ b/src/device/isapnp.c @@ -26,6 +26,7 @@ #include <86box/device.h> #include <86box/io.h> #include <86box/isapnp.h> +#include <86box/plat_unused.h> #define CHECK_CURRENT_LD() \ if (!dev->current_ld) { \ @@ -81,34 +82,48 @@ enum { typedef struct _isapnp_device_ { uint8_t number; uint8_t regs[256]; - uint8_t mem_upperlimit, irq_types, io_16bit, io_len[8]; + uint8_t mem_upperlimit; + uint8_t irq_types; + uint8_t io_16bit; + uint8_t io_len[8]; const isapnp_device_config_t *defaults; struct _isapnp_device_ *next; } isapnp_device_t; typedef struct _isapnp_card_ { - uint8_t enable, state, csn, id_checksum, serial_read, serial_read_pair, serial_read_pos, *rom; - uint16_t rom_pos, rom_size; + uint8_t enable; + uint8_t state; + uint8_t csn; + uint8_t id_checksum; + uint8_t serial_read; + uint8_t serial_read_pair; + uint8_t serial_read_pos; + uint8_t *rom; + uint16_t rom_pos; + uint16_t rom_size; void *priv; /* ISAPnP memory and I/O addresses are awkwardly big endian, so we populate this structure whenever something on some device changes, and pass it on instead. */ isapnp_device_config_t config; - void (*config_changed)(uint8_t ld, isapnp_device_config_t *config, void *priv); - void (*csn_changed)(uint8_t csn, void *priv); + void (*config_changed)(uint8_t ld, isapnp_device_config_t *config, void *priv); + void (*csn_changed)(uint8_t csn, void *priv); uint8_t (*read_vendor_reg)(uint8_t ld, uint8_t reg, void *priv); - void (*write_vendor_reg)(uint8_t ld, uint8_t reg, uint8_t val, void *priv); + void (*write_vendor_reg)(uint8_t ld, uint8_t reg, uint8_t val, void *priv); isapnp_device_t *first_ld; struct _isapnp_card_ *next; } isapnp_card_t; typedef struct { - uint8_t reg, key_pos : 5; + uint8_t reg; + uint8_t key_pos : 5; uint16_t read_data_addr; - isapnp_card_t *first_card, *isolated_card, *current_ld_card; + isapnp_card_t *first_card; + isapnp_card_t *isolated_card; + isapnp_card_t *current_ld_card; isapnp_device_t *current_ld; } isapnp_t; @@ -121,36 +136,35 @@ isapnp_device_config_changed(isapnp_card_t *card, isapnp_device_t *ld) /* Populate config structure, performing endianness conversion as needed. */ card->config.activate = ld->regs[0x30] & 0x01; - uint8_t i; uint8_t reg_base; - for (i = 0; i < 4; i++) { + for (uint8_t i = 0; i < 4; i++) { reg_base = 0x40 + (8 * i); card->config.mem[i].base = (ld->regs[reg_base] << 16) | (ld->regs[reg_base + 1] << 8); card->config.mem[i].size = (ld->regs[reg_base + 3] << 16) | (ld->regs[reg_base + 4] << 8); if (ld->regs[reg_base + 2] & 0x01) /* upper limit */ card->config.mem[i].size -= card->config.mem[i].base; } - for (i = 0; i < 4; i++) { + for (uint8_t i = 0; i < 4; i++) { reg_base = (i == 0) ? 0x76 : (0x80 + (16 * i)); card->config.mem32[i].base = (ld->regs[reg_base] << 24) | (ld->regs[reg_base + 1] << 16) | (ld->regs[reg_base + 2] << 8) | ld->regs[reg_base + 3]; card->config.mem32[i].size = (ld->regs[reg_base + 5] << 24) | (ld->regs[reg_base + 6] << 16) | (ld->regs[reg_base + 7] << 8) | ld->regs[reg_base + 8]; if (ld->regs[reg_base + 4] & 0x01) /* upper limit */ card->config.mem32[i].size -= card->config.mem32[i].base; } - for (i = 0; i < 8; i++) { + for (uint8_t i = 0; i < 8; i++) { reg_base = 0x60 + (2 * i); if (ld->regs[0x31] & 0x02) card->config.io[i].base = 0; /* let us handle I/O range check reads */ else card->config.io[i].base = (ld->regs[reg_base] << 8) | ld->regs[reg_base + 1]; } - for (i = 0; i < 2; i++) { + for (uint8_t i = 0; i < 2; i++) { reg_base = 0x70 + (2 * i); card->config.irq[i].irq = ld->regs[reg_base]; card->config.irq[i].level = ld->regs[reg_base + 1] & 0x02; card->config.irq[i].type = ld->regs[reg_base + 1] & 0x01; } - for (i = 0; i < 2; i++) { + for (uint8_t i = 0; i < 2; i++) { reg_base = 0x74 + i; card->config.dma[i].dma = ld->regs[reg_base]; } @@ -169,10 +183,9 @@ isapnp_reset_ld_config(isapnp_device_t *ld) /* Populate configuration registers. */ ld->regs[0x30] = !!config->activate; - uint8_t i; uint8_t reg_base; uint32_t size; - for (i = 0; i < 4; i++) { + for (uint8_t i = 0; i < 4; i++) { reg_base = 0x40 + (8 * i); ld->regs[reg_base] = config->mem[i].base >> 16; ld->regs[reg_base + 1] = config->mem[i].base >> 8; @@ -182,7 +195,7 @@ isapnp_reset_ld_config(isapnp_device_t *ld) ld->regs[reg_base + 3] = size >> 16; ld->regs[reg_base + 4] = size >> 8; } - for (i = 0; i < 4; i++) { + for (uint8_t i = 0; i < 4; i++) { reg_base = (i == 0) ? 0x76 : (0x80 + (16 * i)); ld->regs[reg_base] = config->mem32[i].base >> 24; ld->regs[reg_base + 1] = config->mem32[i].base >> 16; @@ -196,17 +209,17 @@ isapnp_reset_ld_config(isapnp_device_t *ld) ld->regs[reg_base + 7] = size >> 8; ld->regs[reg_base + 8] = size; } - for (i = 0; i < 8; i++) { + for (uint8_t i = 0; i < 8; i++) { reg_base = 0x60 + (2 * i); ld->regs[reg_base] = config->io[i].base >> 8; ld->regs[reg_base + 1] = config->io[i].base; } - for (i = 0; i < 2; i++) { + for (uint8_t i = 0; i < 2; i++) { reg_base = 0x70 + (2 * i); ld->regs[reg_base] = config->irq[i].irq; ld->regs[reg_base + 1] = (!!config->irq[i].level << 1) | !!config->irq[i].type; } - for (i = 0; i < 2; i++) { + for (uint8_t i = 0; i < 2; i++) { reg_base = 0x74 + i; ld->regs[reg_base] = config->dma[i].dma; } @@ -221,15 +234,14 @@ isapnp_reset_ld_regs(isapnp_device_t *ld) ld->regs[0x74] = ld->regs[0x75] = ISAPNP_DMA_DISABLED; /* Set the upper limit bit on memory ranges which require it. */ - uint8_t i; - for (i = 0; i < 4; i++) + for (uint8_t i = 0; i < 4; i++) ld->regs[0x42 + (8 * i)] |= !!(ld->mem_upperlimit & (1 << i)); ld->regs[0x7a] |= !!(ld->mem_upperlimit & (1 << 4)); - for (i = 1; i < 4; i++) + for (uint8_t i = 1; i < 4; i++) ld->regs[0x84 + (16 * i)] |= !!(ld->mem_upperlimit & (1 << (4 + i))); /* Set the default IRQ type bits. */ - for (i = 0; i < 2; i++) { + for (uint8_t i = 0; i < 2; i++) { if (ld->irq_types & (0x1 << (4 * i))) ld->regs[0x70 + (2 * i)] = 0x02; else if (ld->irq_types & (0x2 << (4 * i))) @@ -245,14 +257,14 @@ isapnp_reset_ld_regs(isapnp_device_t *ld) } static uint8_t -isapnp_read_rangecheck(uint16_t addr, void *priv) +isapnp_read_rangecheck(UNUSED(uint16_t addr), void *priv) { isapnp_device_t *dev = (isapnp_device_t *) priv; return (dev->regs[0x31] & 0x01) ? 0x55 : 0xaa; } static uint8_t -isapnp_read_data(uint16_t addr, void *priv) +isapnp_read_data(UNUSED(uint16_t addr), void *priv) { isapnp_t *dev = (isapnp_t *) priv; uint8_t ret = 0xff; @@ -418,7 +430,7 @@ isapnp_set_read_data(uint16_t addr, isapnp_t *dev) } static void -isapnp_write_addr(uint16_t addr, uint8_t val, void *priv) +isapnp_write_addr(UNUSED(uint16_t addr), uint8_t val, void *priv) { isapnp_t *dev = (isapnp_t *) priv; isapnp_card_t *card = dev->first_card; @@ -449,7 +461,7 @@ isapnp_write_addr(uint16_t addr, uint8_t val, void *priv) } static void -isapnp_write_data(uint16_t addr, uint8_t val, void *priv) +isapnp_write_data(UNUSED(uint16_t addr), uint8_t val, void *priv) { isapnp_t *dev = (isapnp_t *) priv; isapnp_card_t *card; @@ -681,6 +693,9 @@ isapnp_write_data(uint16_t addr, uint8_t val, void *priv) val |= 0x02; break; + + default: + break; } dev->current_ld->regs[dev->reg] = val; @@ -691,7 +706,7 @@ isapnp_write_data(uint16_t addr, uint8_t val, void *priv) } static void * -isapnp_init(const device_t *info) +isapnp_init(UNUSED(const device_t *info)) { isapnp_t *dev = (isapnp_t *) malloc(sizeof(isapnp_t)); memset(dev, 0, sizeof(isapnp_t)); @@ -862,6 +877,9 @@ isapnp_update_card_rom(void *priv, uint8_t *rom, uint16_t rom_size) default: isapnp_log("ISAPnP: >%s%s Large resource %02X (length %d)\n", ldn ? ">" : "", in_df ? ">" : "", res, (card->rom[i + 2] << 8) | card->rom[i + 1]); break; +#else + default: + break; #endif } @@ -1022,11 +1040,11 @@ isapnp_update_card_rom(void *priv, uint8_t *rom, uint16_t rom_size) card->rom_size = i + 2; break; -#ifdef ENABLE_ISAPNP_LOG default: +#ifdef ENABLE_ISAPNP_LOG isapnp_log("ISAPnP: >%s%s Small resource %02X (length %d)\n", ldn ? ">" : "", in_df ? ">" : "", res, card->rom[i] & 0x07); - break; #endif + break; } i++; /* header */ diff --git a/src/device/isartc.c b/src/device/isartc.c index d2127146d..280c6210a 100644 --- a/src/device/isartc.c +++ b/src/device/isartc.c @@ -90,7 +90,7 @@ #define ISARTC_DEBUG 0 -typedef struct { +typedef struct rtcdev_t { const char *name; /* board name */ uint8_t board; /* board type */ @@ -103,18 +103,18 @@ typedef struct { uint32_t base_addr; /* configured I/O address */ /* Fields for the specific driver. */ - void (*f_wr)(uint16_t, uint8_t, void *); + void (*f_wr)(uint16_t, uint8_t, void *); uint8_t (*f_rd)(uint16_t, void *); - int8_t year; /* register for YEAR value */ - char pad[3]; + int8_t year; /* register for YEAR value */ + char pad[3]; nvr_t nvr; /* RTC/NVR */ } rtcdev_t; /************************************************************************ - * * - * Driver for the NatSemi MM58167 chip. * - * * + * * + * Driver for the NatSemi MM58167 chip. * + * * ************************************************************************/ #define MM67_REGS 32 @@ -427,7 +427,6 @@ mm67_write(uint16_t port, uint8_t val, void *priv) { rtcdev_t *dev = (rtcdev_t *) priv; int reg = port - dev->base_addr; - int i; #if ISARTC_DEBUG isartc_log("ISARTC: write(%04x, %02x)\n", port - dev->base_addr, val); @@ -452,7 +451,7 @@ mm67_write(uint16_t port, uint8_t val, void *priv) case MM67_RSTRAM: if (val == 0xff) { - for (i = MM67_AL_MSEC; i <= MM67_AL_MON; i++) + for (uint8_t i = MM67_AL_MSEC; i <= MM67_AL_MON; i++) dev->nvr.regs[i] = RTC_BCD(0); dev->nvr.regs[MM67_DOW] = RTC_BCD(1); dev->nvr.regs[MM67_DOM] = RTC_BCD(1); @@ -500,9 +499,9 @@ mm67_write(uint16_t port, uint8_t val, void *priv) } /************************************************************************ - * * - * Generic code for all supported chips. * - * * + * * + * Generic code for all supported chips. * + * * ************************************************************************/ /* Initialize the device for use. */ diff --git a/src/device/kbc_at.c b/src/device/kbc_at.c index 5395f3ac2..37ccf3555 100644 --- a/src/device/kbc_at.c +++ b/src/device/kbc_at.c @@ -29,6 +29,7 @@ #include <86box/io.h> #include <86box/pic.h> #include <86box/pit.h> +#include <86box/plat_unused.h> #include <86box/ppi.h> #include <86box/mem.h> #include <86box/device.h> @@ -80,6 +81,7 @@ #define KBC_VEN_ACER 0x20 #define KBC_VEN_NCR 0x24 #define KBC_VEN_ALI 0x28 +#define KBC_VEN_SIEMENS 0x2c #define KBC_VEN_MASK 0x3c #define FLAG_CLOCK 0x01 @@ -103,12 +105,27 @@ enum { STATE_SCAN_AUX /* KBC is waiting for the auxiliary command response. */ }; -typedef struct { - uint8_t state, command, command_phase, status, - wantdata, ib, ob, sc_or, - mem_addr, p1, p2, old_p2, - misc_flags, ami_flags, key_ctrl_queue_start, key_ctrl_queue_end, - val, channel, stat_hi, pending; +typedef struct atkbc_t { + uint8_t state; + uint8_t command; + uint8_t command_phase; + uint8_t status; + uint8_t wantdata; + uint8_t ib; + uint8_t ob; + uint8_t sc_or; + uint8_t mem_addr; + uint8_t p1; + uint8_t p2; + uint8_t old_p2; + uint8_t misc_flags; + uint8_t ami_flags; + uint8_t key_ctrl_queue_start; + uint8_t key_ctrl_queue_end; + uint8_t val; + uint8_t channel; + uint8_t stat_hi; + uint8_t pending; uint8_t mem[0x100]; @@ -279,6 +296,8 @@ kbc_translate(atkbc_t *dev, uint8_t val) case 0x4d: t3100e_notify_set(0x0f); break; /* Right */ + default: + break; } kbc_at_log("ATkbc: translate is %s, ", translate ? "on" : "off"); @@ -305,7 +324,7 @@ static void kbc_send_to_ob(atkbc_t *dev, uint8_t val, uint8_t channel, uint8_t stat_hi) { uint8_t kbc_ven = dev->flags & KBC_VEN_MASK; - int temp = (channel == 1) ? kbc_translate(dev, val) : val; + int temp = (channel == 1) ? kbc_translate(dev, val) : ((int) val); if (temp == -1) return; @@ -399,10 +418,14 @@ kbc_scan_kbd_at(atkbc_t *dev) kbc_ibf_process(dev); /* AT mode. */ } else { - // dev->t = dev->mem[0x28]; +#if 0 + dev->t = dev->mem[0x28]; +#endif if (dev->mem[0x2e] != 0x00) { - // if (!(dev->t & 0x02)) - // return; +#if 0 + if (!(dev->t & 0x02)) + return; +#endif dev->mem[0x2e] = 0x00; } dev->p2 &= 0xbf; @@ -422,7 +445,8 @@ kbc_scan_kbd_at(atkbc_t *dev) } } -static void write_p2(atkbc_t *dev, uint8_t val); +static void +write_p2(atkbc_t *dev, uint8_t val); static void kbc_at_poll_at(atkbc_t *dev) @@ -466,7 +490,9 @@ at_main_ibf: /* Keyboard controller command want to output a single byte. */ kbc_at_log("ATkbc: %02X coming from channel %i with high status %02X\n", dev->val, dev->channel, dev->stat_hi); kbc_send_to_ob(dev, dev->val, dev->channel, dev->stat_hi); - // dev->state = (dev->pending == 2) ? STATE_KBC_AMI_OUT : STATE_MAIN_IBF; +#if 0 + dev->state = (dev->pending == 2) ? STATE_KBC_AMI_OUT : STATE_MAIN_IBF; +#endif dev->state = STATE_MAIN_IBF; dev->pending = 0; goto at_main_ibf; @@ -608,7 +634,9 @@ ps2_main_ibf: /* Keyboard controller command want to output a single byte. */ kbc_at_log("ATkbc: %02X coming from channel %i with high status %02X\n", dev->val, dev->channel, dev->stat_hi); kbc_send_to_ob(dev, dev->val, dev->channel, dev->stat_hi); - // dev->state = (dev->pending == 2) ? STATE_KBC_AMI_OUT : STATE_MAIN_IBF; +#if 0 + dev->state = (dev->pending == 2) ? STATE_KBC_AMI_OUT : STATE_MAIN_IBF; +#endif dev->state = STATE_MAIN_IBF; dev->pending = 0; goto ps2_main_ibf; @@ -720,6 +748,12 @@ write_p2(atkbc_t *dev, uint8_t val) flushmmucache(); if (kbc_ven == KBC_VEN_ALI) smbase = 0x00030000; + /* Yes, this is a hack, but until someone gets ahold of the real PCD-2L + and can find out what they actually did to make it boot from FFFFF0 + correctly despite A20 being gated when the CPU is reset, this will + have to do. */ + else if (kbc_ven == KBC_VEN_SIEMENS) + loadcs(0xF000); } } } @@ -1004,7 +1038,7 @@ write60_ami(void *priv, uint8_t val) switch (dev->command) { /* 0x40 - 0x5F are aliases for 0x60-0x7F */ case 0x40 ... 0x5f: - kbc_at_log("ATkbc: AMI - alias write to %08X\n", dev->command); + kbc_at_log("ATkbc: AMI - alias write to %02X\n", dev->command & 0x1f); dev->mem[(dev->command & 0x1f) + 0x20] = val; if (dev->command == 0x60) write_cmd(dev, val); @@ -1041,6 +1075,9 @@ write60_ami(void *priv, uint8_t val) kbc_at_do_poll = kbc_at_poll_at; } return 0; + + default: + break; } return 1; @@ -1140,7 +1177,7 @@ write64_ami(void *priv, uint8_t val) break; case 0xaf: /* set extended controller RAM */ - if (kbc_ven != KBC_VEN_ALI) { + if ((kbc_ven != KBC_VEN_SIEMENS) && (kbc_ven != KBC_VEN_ALI)) { kbc_at_log("ATkbc: set extended controller RAM\n"); dev->wantdata = 1; dev->state = STATE_KBC_PARAM; @@ -1244,13 +1281,49 @@ write64_ami(void *priv, uint8_t val) case 0xef: /* ??? - sent by AMI486 */ kbc_at_log("ATkbc: ??? - sent by AMI486\n"); return 0; + + default: + break; } return write64_generic(dev, val); } static uint8_t -write60_quadtel(void *priv, uint8_t val) +write64_siemens(void *priv, uint8_t val) +{ + atkbc_t *dev = (atkbc_t *) priv; + + switch (val) { + case 0x92: /*Siemens Award - 92 sent by PCD-2L BIOS*/ + kbc_at_log("Siemens Award - 92 sent by PCD-2L BIOS\n"); + return 0; + + case 0x94: /*Siemens Award - 94 sent by PCD-2L BIOS*/ + kbc_at_log("Siemens Award - 94 sent by PCD-2L BIOS\n"); + return 0; + + case 0x9a: /*Siemens Award - 9A sent by PCD-2L BIOS*/ + kbc_at_log("Siemens Award - 9A sent by PCD-2L BIOS\n"); + return 0; + + case 0x9c: /*Siemens Award - 9C sent by PCD-2L BIOS*/ + kbc_at_log("Siemens Award - 9C sent by PCD-2L BIOS\n"); + return 0; + + case 0xa9: /*Siemens Award - A9 sent by PCD-2L BIOS*/ + kbc_at_log("Siemens Award - A9 sent by PCD-2L BIOS\n"); + return 0; + + default: + break; + } + + return write64_ami(dev, val); +} + +static uint8_t +write60_quadtel(void *priv, UNUSED(uint8_t val)) { atkbc_t *dev = (atkbc_t *) priv; @@ -1258,6 +1331,8 @@ write60_quadtel(void *priv, uint8_t val) case 0xcf: /*??? - sent by MegaPC BIOS*/ kbc_at_log("ATkbc: ??? - sent by MegaPC BIOS\n"); return 0; + default: + break; } return 1; @@ -1280,6 +1355,9 @@ write64_olivetti(void *priv, uint8_t val) kbc_delay_to_ob(dev, (0x0c | (is386 ? 0x00 : 0x80)) & 0xdf, 0, 0x00); dev->p1 = ((dev->p1 + 1) & 3) | (dev->p1 & 0xfc); return 0; + + default: + break; } return write64_generic(dev, val); @@ -1300,6 +1378,9 @@ write64_quadtel(void *priv, uint8_t val) dev->wantdata = 1; dev->state = STATE_KBC_PARAM; return 0; + + default: + break; } return write64_generic(dev, val); @@ -1315,6 +1396,9 @@ write60_toshiba(void *priv, uint8_t val) kbc_at_log("ATkbc: T3100e - set color/mono switch\n"); t3100e_mono_set(val); return 0; + + default: + break; } return 1; @@ -1405,6 +1489,9 @@ write64_toshiba(void *priv, uint8_t val) dev->p1 = (t3100e_mono_get() & 1) ? 0xff : 0xbf; kbc_delay_to_ob(dev, dev->p1, 0, 0x00); return 0; + + default: + break; } return write64_generic(dev, val); @@ -1682,13 +1769,15 @@ static void kbc_at_write(uint16_t port, uint8_t val, void *priv) { atkbc_t *dev = (atkbc_t *) priv; + uint8_t kbc_ven = dev->flags & KBC_VEN_MASK; + uint8_t fast_a20 = (kbc_ven != KBC_VEN_SIEMENS); kbc_at_log("ATkbc: [%04X:%08X] write(%04X) = %02X\n", CS, cpu_state.pc, port, val); switch (port) { case 0x60: dev->status &= ~STAT_CD; - if (dev->wantdata && (dev->command == 0xd1)) { + if (fast_a20 && dev->wantdata && (dev->command == 0xd1)) { kbc_at_log("ATkbc: write P2\n"); #if 0 @@ -1718,7 +1807,7 @@ kbc_at_write(uint16_t port, uint8_t val, void *priv) case 0x64: dev->status |= STAT_CD; - if (val == 0xd1) { + if (fast_a20 && (val == 0xd1)) { kbc_at_log("ATkbc: write P2\n"); dev->wantdata = 1; dev->state = STATE_KBC_PARAM; @@ -1726,6 +1815,9 @@ kbc_at_write(uint16_t port, uint8_t val, void *priv) return; } break; + + default: + break; } dev->ib = val; @@ -1865,6 +1957,13 @@ kbc_at_init(const device_t *info) kbc_award_revision = 0x42; switch (dev->flags & KBC_VEN_MASK) { + case KBC_VEN_SIEMENS: + kbc_ami_revision = '8'; + kbc_award_revision = 0x42; + dev->write60_ven = write60_ami; + dev->write64_ven = write64_siemens; + break; + case KBC_VEN_ACER: case KBC_VEN_GENERIC: case KBC_VEN_NCR: @@ -1922,6 +2021,9 @@ kbc_at_init(const device_t *info) dev->write60_ven = write60_toshiba; dev->write64_ven = write64_toshiba; break; + + default: + break; } max_ports = ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_1) ? 2 : 1; @@ -1955,6 +2057,20 @@ const device_t keyboard_at_device = { .config = NULL }; +const device_t keyboard_at_siemens_device = { + .name = "PC/AT Keyboard", + .internal_name = "keyboard_at", + .flags = DEVICE_KBC, + .local = KBC_TYPE_ISA | KBC_VEN_SIEMENS, + .init = kbc_at_init, + .close = kbc_at_close, + .reset = kbc_at_reset, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; + const device_t keyboard_at_ami_device = { .name = "PC/AT Keyboard (AMI)", .internal_name = "keyboard_at_ami", diff --git a/src/device/kbc_at_dev.c b/src/device/kbc_at_dev.c index 2715f94fa..32323ceeb 100644 --- a/src/device/kbc_at_dev.c +++ b/src/device/kbc_at_dev.c @@ -169,6 +169,8 @@ kbc_at_dev_poll(void *priv) if (dev->cmd_queue_start == dev->cmd_queue_end) dev->state = DEV_STATE_EXECUTE_BAT; break; + default: + break; } } diff --git a/src/device/keyboard.c b/src/device/keyboard.c index 9d15db79b..10d127c77 100644 --- a/src/device/keyboard.c +++ b/src/device/keyboard.c @@ -167,6 +167,9 @@ keyboard_input(int down, uint16_t scan) case 0x138: /* Right Alt */ shift |= 0x40; break; + + default: + break; } } else { switch (scan & 0x1ff) { @@ -197,13 +200,18 @@ keyboard_input(int down, uint16_t scan) case 0x046: scroll_lock ^= 1; break; + + default: + break; } } } /* NOTE: Shouldn't this be some sort of bit shift? An array of 8 unsigned 64-bit integers should be enough. */ - /* recv_key[scan >> 6] |= ((uint64_t) down << ((uint64_t) scan & 0x3fLL)); */ +#if 0 + recv_key[scan >> 6] |= ((uint64_t) down << ((uint64_t) scan & 0x3fLL)); +#endif /* pclog("Received scan code: %03X (%s)\n", scan & 0x1ff, down ? "down" : "up"); */ recv_key[scan & 0x1ff] = down; diff --git a/src/device/keyboard_at.c b/src/device/keyboard_at.c index 516303137..3b167d66f 100644 --- a/src/device/keyboard_at.c +++ b/src/device/keyboard_at.c @@ -67,7 +67,7 @@ uint8_t keyboard_set3_all_break; /* Global keyboard mode: Bits 0 - 1 = scan code set. */ -uint8_t keyboard_mode = 0x02; +uint8_t keyboard_mode = 0x02; static atkbc_dev_t *SavedKbd = NULL; @@ -491,8 +491,8 @@ static void keyboard_at_set_scancode_set(void) { switch (keyboard_mode) { - case 0x01: default: + case 0x01: keyboard_set_table(scancode_set1); break; diff --git a/src/device/keyboard_xt.c b/src/device/keyboard_xt.c index bdc1cc51b..f24d53f0e 100644 --- a/src/device/keyboard_xt.c +++ b/src/device/keyboard_xt.c @@ -68,14 +68,18 @@ #define KBD_TYPE_PRAVETZ 10 #define KBD_TYPE_XTCLONE 11 -typedef struct { +typedef struct xtkbd_t { int want_irq; int blocked; int tandy; - uint8_t pa, pb, pd, clock; + uint8_t pa; + uint8_t pb; + uint8_t pd; + uint8_t clock; uint8_t key_waiting; - uint8_t type, pravetz_flags; + uint8_t type; + uint8_t pravetz_flags; pc_timer_t send_delay_timer; } xtkbd_t; @@ -454,6 +458,9 @@ kbd_adddata(uint16_t val) case 0x54: /* SysRQ => toggle window */ t1000_syskey(0x00, 0x00, 0x08); break; + + default: + break; } } else t1000_syskey(0x04, 0x00, 0x00); /* Reset 'Fn' indicator */ @@ -578,6 +585,9 @@ kbd_write(uint16_t port, uint8_t val, void *priv) kbd->pravetz_flags = (kbd->pravetz_flags & ~(1 << bit)) | set; } break; + + default: + break; } } @@ -686,6 +696,9 @@ kbd_read(uint16_t port, void *priv) ret = kbd->pravetz_flags; kbd_log("XTkbd: Port %02X in : %02X\n", port, ret); break; + + default: + break; } return ret; diff --git a/src/device/mouse.c b/src/device/mouse.c index 9409fa3cb..2acfd905e 100644 --- a/src/device/mouse.c +++ b/src/device/mouse.c @@ -30,8 +30,9 @@ #include <86box/timer.h> #include <86box/gdbstub.h> #include <86box/mouse.h> +#include <86box/plat_unused.h> -typedef struct { +typedef struct mouse_t { const device_t *device; } mouse_t; @@ -152,7 +153,7 @@ mouse_close(void) } static void -mouse_timer_poll(void *priv) +mouse_timer_poll(UNUSED(void *priv)) { /* Poll at 255 Hz, maximum supported by PS/2 mic. */ timer_on_auto(&mouse_timer, 1000000.0 / sample_rate); diff --git a/src/device/mouse_bus.c b/src/device/mouse_bus.c index 5025871d8..675686280 100644 --- a/src/device/mouse_bus.c +++ b/src/device/mouse_bus.c @@ -80,6 +80,7 @@ #include <86box/timer.h> #include <86box/device.h> #include <86box/mouse.h> +#include <86box/plat_unused.h> #include <86box/random.h> #define IRQ_MASK ((1 << 5) >> dev->irq) @@ -132,16 +133,26 @@ static const uint8_t periods[4] = { 30, 50, 100, 200 }; /* Our mouse device. */ typedef struct mouse { - uint8_t current_b, control_val, - config_val, sig_val, - command_val, pad; + uint8_t current_b; + uint8_t control_val; + uint8_t config_val; + uint8_t sig_val; + uint8_t command_val; + uint8_t pad; - int8_t current_x, current_y; + int8_t current_x; + int8_t current_y; - int base, irq, bn, flags, - mouse_delayed_dx, mouse_delayed_dy, - mouse_buttons, mouse_buttons_last, - toggle_counter, timer_enabled; + int base; + int irq; + int bn; + int flags; + int mouse_delayed_dx; + int mouse_delayed_dy; + int mouse_buttons; + int mouse_buttons_last; + int toggle_counter; + int timer_enabled; double period; pc_timer_t timer; /* mouse event timer */ @@ -216,6 +227,9 @@ lt_read(uint16_t port, void *priv) else return 0xff; break; + + default: + break; } bm_log("DEBUG: read from address 0x%04x, value = 0x%02x\n", port, value); @@ -249,6 +263,7 @@ ms_read(uint16_t port, void *priv) case INP_CTRL_COMMAND: value = dev->control_val; break; + default: bm_log("ERROR: Reading data port in unsupported mode 0x%02x\n", dev->control_val); } @@ -263,6 +278,9 @@ ms_read(uint16_t port, void *priv) case INP_PORT_CONFIG: bm_log("ERROR: Unsupported read from port 0x%04x\n", port); break; + + default: + break; } bm_log("DEBUG: read from address 0x%04x, value = 0x%02x\n", port, value); @@ -355,6 +373,9 @@ lt_write(uint16_t port, uint8_t val, void *priv) dev->control_val &= ~bit; /* Reset */ } break; + + default: + break; } } @@ -380,6 +401,7 @@ ms_write(uint16_t port, uint8_t val, void *priv) case INP_CTRL_READ_Y: dev->command_val = val & 0x07; break; + default: bm_log("ERROR: Unsupported command written to port 0x%04x (value = 0x%02x)\n", port, val); } @@ -429,6 +451,7 @@ ms_write(uint16_t port, uint8_t val, void *priv) dev->control_val &= INP_PERIOD_MASK; dev->control_val |= (val & ~INP_PERIOD_MASK); return; + default: bm_log("ERROR: Unsupported period written to port 0x%04x (value = 0x%02x)\n", port, val); } @@ -436,6 +459,7 @@ ms_write(uint16_t port, uint8_t val, void *priv) dev->control_val = val; break; + default: bm_log("ERROR: Unsupported write to port 0x%04x (value = 0x%02x)\n", port, val); } @@ -444,12 +468,15 @@ ms_write(uint16_t port, uint8_t val, void *priv) case INP_PORT_CONFIG: bm_log("ERROR: Unsupported write to port 0x%04x (value = 0x%02x)\n", port, val); break; + + default: + break; } } /* The emulator calls us with an update on the host mouse device. */ static int -bm_poll(int x, int y, int z, int b, double abs_x, double abs_y, void *priv) +bm_poll(int x, int y, UNUSED(int z), int b, UNUSED(double abs_x), UNUSED(double abs_y), void *priv) { mouse_t *dev = (mouse_t *) priv; int xor ; diff --git a/src/device/mouse_ps2.c b/src/device/mouse_ps2.c index 46144e02e..2d150b5ed 100644 --- a/src/device/mouse_ps2.c +++ b/src/device/mouse_ps2.c @@ -23,6 +23,7 @@ #include <86box/device.h> #include <86box/keyboard.h> #include <86box/mouse.h> +#include <86box/plat_unused.h> enum { MODE_STREAM, @@ -310,7 +311,7 @@ ps2_write(void *priv) } static int -ps2_poll(int x, int y, int z, int b, double abs_x, double abs_y, void *priv) +ps2_poll(int x, int y, int z, int b, UNUSED(double abs_x), UNUSED(double abs_y), void *priv) { atkbc_dev_t *dev = (atkbc_dev_t *) priv; int packet_size = (dev->flags & FLAG_INTMODE) ? 4 : 3; diff --git a/src/device/mouse_serial.c b/src/device/mouse_serial.c index 37dc6b4a0..7e50bd49d 100644 --- a/src/device/mouse_serial.c +++ b/src/device/mouse_serial.c @@ -26,6 +26,7 @@ #include <86box/timer.h> #include <86box/serial.h> #include <86box/mouse.h> +#include <86box/plat_unused.h> #define SERMOUSE_PORT 0 /* attach to Serial0 */ @@ -47,27 +48,40 @@ enum { REPORT_PHASE_TRANSMIT }; -typedef struct { - const char *name; /* name of this device */ - int8_t type, /* type of this device */ - port; - uint8_t flags, but, /* device flags */ - want_data, - status, format, - prompt, on_change, - id_len, id[255], - data_len, data[5]; - int abs_x, abs_y, - rel_x, rel_y, - rel_z, - oldb, lastb; +typedef struct mouse_t { + const char *name; /* name of this device */ + int8_t type; /* type of this device */ + int8_t port; + uint8_t flags; /* device flags */ + uint8_t but; + uint8_t want_data; + uint8_t status; + uint8_t format; + uint8_t prompt; + uint8_t on_change; + uint8_t id_len; + uint8_t id[255]; + uint8_t data_len; + uint8_t data[5]; + int abs_x; + int abs_y; + int rel_x; + int rel_y; + int rel_z; + int oldb; + int lastb; - int command_pos, command_phase, - report_pos, report_phase, - command_enabled, report_enabled; - double transmit_period, report_period, - auto_period; - pc_timer_t command_timer, report_timer; + int command_pos; + int command_phase; + int report_pos; + int report_phase; + int command_enabled; + int report_enabled; + double transmit_period; + double report_period; + double auto_period; + pc_timer_t command_timer; + pc_timer_t report_timer; serial_t *serial; } mouse_t; @@ -138,8 +152,8 @@ sermouse_transmit_period(mouse_t *dev, int bps, int rps) case 5: /* MM Series format: 8 data, odd parity, 1 stop, 1 start */ word_len = 11; break; - default: case 7: /* Microsoft-compatible format: 7 data, no parity, 1 stop, 1 start */ + default: word_len = 9; break; } @@ -158,7 +172,7 @@ sermouse_transmit_period(mouse_t *dev, int bps, int rps) /* Callback from serial driver: RTS was toggled. */ static void -sermouse_callback(struct serial_s *serial, void *priv) +sermouse_callback(UNUSED(struct serial_s *serial), void *priv) { mouse_t *dev = (mouse_t *) priv; @@ -332,6 +346,9 @@ sermouse_report(int x, int y, int z, int b, mouse_t *dev) case 7: len = sermouse_data_ms(dev, x, y, z, b); break; + + default: + break; } dev->data_len = len; @@ -527,7 +544,7 @@ sermouse_command_timer(void *priv) } static int -sermouse_poll(int x, int y, int z, int b, double abs_x, double abs_y, void *priv) +sermouse_poll(int x, int y, int z, int b, UNUSED(double abs_x), UNUSED(double abs_y), void *priv) { mouse_t *dev = (mouse_t *) priv; @@ -613,7 +630,7 @@ ltsermouse_switch_baud_rate(mouse_t *dev, int phase) } static void -ltsermouse_write(struct serial_s *serial, void *priv, uint8_t data) +ltsermouse_write(UNUSED(struct serial_s *serial), void *priv, uint8_t data) { mouse_t *dev = (mouse_t *) priv; @@ -644,6 +661,8 @@ ltsermouse_write(struct serial_s *serial, void *priv, uint8_t data) } ltsermouse_switch_baud_rate(dev, PHASE_BAUD_RATE); break; + default: + break; } else switch (data) { @@ -728,11 +747,14 @@ ltsermouse_write(struct serial_s *serial, void *priv, uint8_t data) case 0x6B: ltsermouse_command_phase(dev, PHASE_BUTTONS); break; + + default: + break; } } static void -ltsermouse_transmit_period(serial_t *serial, void *priv, double transmit_period) +ltsermouse_transmit_period(UNUSED(serial_t *serial), void *priv, double transmit_period) { mouse_t *dev = (mouse_t *) priv; @@ -796,8 +818,8 @@ sermouse_init(const device_t *info) dev->id_len = 1; dev->id[0] = 'M'; switch (dev->but) { - case 2: default: + case 2: dev->type = info->local ? MOUSE_TYPE_LOGITECH : MOUSE_TYPE_MICROSOFT; break; case 3: @@ -846,7 +868,7 @@ sermouse_init(const device_t *info) mouse_set_buttons((dev->flags & FLAG_3BTN) ? 3 : 2); /* Return our private data to the I/O layer. */ - return (dev); + return dev; } static const device_config_t mssermouse_config[] = { diff --git a/src/device/mouse_wacom_tablet.c b/src/device/mouse_wacom_tablet.c index fa5c4651f..32856634e 100644 --- a/src/device/mouse_wacom_tablet.c +++ b/src/device/mouse_wacom_tablet.c @@ -66,37 +66,49 @@ static const uint32_t wacom_resolution_values[4] = { 1270 }; -typedef struct { +typedef struct mouse_wacom_t { const char *name; /* name of this device */ - int8_t type, /* type of this device */ - port; - uint8_t flags, but, /* device flags */ - status, bits, - data_rec[0x200]; - int abs_x, abs_y, - rel_x, rel_y, - oldb, b; + int8_t type; /* type of this device */ + int8_t port; + uint8_t flags; /* device flags */ + uint8_t but; + uint8_t status; + uint8_t bits; + uint8_t data_rec[0x200]; + int abs_x; + int abs_y; + int rel_x; + int rel_y; + int oldb; + int b; Fifo8 data; - int data_rec_pos, mode, interval; - int increment, suppressed_increment; + int data_rec_pos; + int mode; + int interval; + int increment; + int suppressed_increment; int transmission_stopped; int reset; - int transmit_id, transmit_id_pending; + int transmit_id; + int transmit_id_pending; int pressure_mode; - int suppressed, measurement; + int suppressed; + int measurement; int remote_req; - uint32_t x_res, y_res; - const wacom_tablet_id* tablet_type; + uint32_t x_res; + uint32_t y_res; + const wacom_tablet_id *tablet_type; - int last_abs_x, last_abs_y; /* Suppressed/Increment Mode. */ + int last_abs_x; /* Suppressed/Increment Mode. */ + int last_abs_y; /* Suppressed/Increment Mode. */ union { uint32_t settings; /* Settings DWORD */ /* We don't target any architectures except x86/x64/ARM32/ARM64. (The ABIs for those are explicit in little-endian bit ordering) */ - struct { + struct settings_bits { uint8_t remote_mode : 1; uint8_t bitpad_two_cursor_data : 1; uint8_t mm961_orientation : 1; @@ -128,7 +140,8 @@ typedef struct { }; double transmit_period; - double old_tsc, reset_tsc; + double old_tsc; + double reset_tsc; pc_timer_t report_timer; serial_t *serial; @@ -197,6 +210,9 @@ wacom_process_settings_dword(mouse_wacom_t *wacom, uint32_t dword) case 3: wacom->transmit_period = wacom_transmit_period(wacom, 19200, -1); break; + + default: + break; } mouse_mode = !wacom->settings_bits.coord_sys; @@ -245,7 +261,7 @@ wacom_reset_artpad(mouse_wacom_t *wacom) } static void -wacom_callback(struct serial_s *serial, void *priv) +wacom_callback(UNUSED(struct serial_s *serial), void *priv) { mouse_wacom_t *wacom = (mouse_wacom_t *) priv; @@ -265,13 +281,16 @@ wacom_callback(struct serial_s *serial, void *priv) case 3: wacom->transmit_period = wacom_transmit_period(wacom, 19200, -1); break; + + default: + break; } timer_stop(&wacom->report_timer); timer_on_auto(&wacom->report_timer, wacom->transmit_period); } static void -wacom_write(struct serial_s *serial, void *priv, uint8_t data) +wacom_write(UNUSED(struct serial_s *serial), void *priv, uint8_t data) { mouse_wacom_t *wacom = (mouse_wacom_t *) priv; static int special_command = 0; @@ -295,6 +314,8 @@ wacom_write(struct serial_s *serial, void *priv, uint8_t data) wacom->data_rec[wacom->data_rec_pos++] = data; break; } + default: + break; } special_command = 0; return; @@ -403,7 +424,7 @@ wacom_write(struct serial_s *serial, void *priv, uint8_t data) } static int -wacom_poll(int x, int y, int z, int b, double abs_x, double abs_y, void *priv) +wacom_poll(int x, int y, UNUSED(int z), int b, double abs_x, double abs_y, void *priv) { mouse_wacom_t *wacom = (mouse_wacom_t *) priv; @@ -563,8 +584,8 @@ wacom_report_timer(void *priv) return; switch (wacom->mode) { - case WACOM_MODE_STREAM: default: + case WACOM_MODE_STREAM: break; case WACOM_MODE_POINT: diff --git a/src/device/pci_bridge.c b/src/device/pci_bridge.c index e54cdea74..3901d266b 100644 --- a/src/device/pci_bridge.c +++ b/src/device/pci_bridge.c @@ -47,10 +47,10 @@ #define AGP_BRIDGE_VIA(x) (((x) >> 16) == 0x1106) #define AGP_BRIDGE(x) ((x) >= AGP_BRIDGE_ALI_M5243) -typedef struct -{ +typedef struct pci_bridge_t { uint32_t local; - uint8_t type, ctl; + uint8_t type; + uint8_t ctl; uint8_t regs[256]; uint8_t bus_index; @@ -352,6 +352,9 @@ pci_bridge_write(int func, int addr, uint8_t val, void *priv) return; } break; + + default: + break; } dev->regs[addr] = val; @@ -434,6 +437,9 @@ pci_bridge_reset(void *priv) dev->regs[0x06] = 0x20; dev->regs[0x07] = 0x02; break; + + default: + break; } /* class */ @@ -477,7 +483,6 @@ pci_bridge_init(const device_t *info) uint8_t interrupt_count; uint8_t interrupt_mask; uint8_t slot_count; - uint8_t i; pci_bridge_t *dev = (pci_bridge_t *) malloc(sizeof(pci_bridge_t)); memset(dev, 0, sizeof(pci_bridge_t)); @@ -493,7 +498,7 @@ pci_bridge_init(const device_t *info) interrupt_count = sizeof(interrupts); interrupt_mask = interrupt_count - 1; if (dev->slot < 32) { - for (i = 0; i < interrupt_count; i++) + for (uint8_t i = 0; i < interrupt_count; i++) interrupts[i] = pci_get_int(dev->slot, PCI_INTA + i); } pci_bridge_log("PCI Bridge %d: upstream bus %02X slot %02X interrupts %02X %02X %02X %02X\n", dev->bus_index, (dev->slot >> 5) & 0xff, dev->slot & 31, interrupts[0], interrupts[1], interrupts[2], interrupts[3]); @@ -503,7 +508,7 @@ pci_bridge_init(const device_t *info) else slot_count = 1; /* AGP bridges always have 1 slot */ - for (i = 0; i < slot_count; i++) { + for (uint8_t i = 0; i < slot_count; i++) { /* Interrupts for bridge slots are assigned in round-robin: ABCD, BCDA, CDAB and so on. */ pci_bridge_log("PCI Bridge %d: downstream slot %02X interrupts %02X %02X %02X %02X\n", dev->bus_index, i, interrupts[i & interrupt_mask], interrupts[(i + 1) & interrupt_mask], interrupts[(i + 2) & interrupt_mask], interrupts[(i + 3) & interrupt_mask]); pci_register_bus_slot(dev->bus_index, i, AGP_BRIDGE(dev->local) ? PCI_CARD_AGP : PCI_CARD_NORMAL, diff --git a/src/device/phoenix_486_jumper.c b/src/device/phoenix_486_jumper.c index d5e833404..7151872e9 100644 --- a/src/device/phoenix_486_jumper.c +++ b/src/device/phoenix_486_jumper.c @@ -1,148 +1,149 @@ -/* - * 86Box A hypervisor and IBM PC system emulator that specializes in - * running old operating systems and software designed for IBM - * PC systems and compatibles from 1981 through fairly recent - * system designs based on the PCI bus. - * - * This file is part of the 86Box distribution. - * - * Implementation of the Phoenix 486 Jumper Readout - * - * - * - * Authors: Tiseno100 - * - * Copyright 2020 Tiseno100 - */ - -#include -#include -#include -#include -#include -#include -#define HAVE_STDARG_H -#include <86box/86box.h> -#include "cpu.h" -#include <86box/timer.h> -#include <86box/io.h> -#include <86box/device.h> -#include <86box/chipset.h> - -/* - Bit 7 = Super I/O chip: 1 = enabled, 0 = disabled; - Bit 6 = Graphics card: 1 = standalone, 0 = on-board; - Bit 5 = ???? (if 1, siren and hangs); - Bit 4 = ????; - Bit 3 = ????; - Bit 2 = ????; - Bit 1 = ????; - Bit 0 = ????. -*/ - -typedef struct -{ - uint8_t type, jumper; -} phoenix_486_jumper_t; - -#ifdef ENABLE_PHOENIX_486_JUMPER_LOG -int phoenix_486_jumper_do_log = ENABLE_PHOENIX_486_JUMPER_LOG; - -static void -phoenix_486_jumper_log(const char *fmt, ...) -{ - va_list ap; - - if (phoenix_486_jumper_do_log) { - va_start(ap, fmt); - pclog_ex(fmt, ap); - va_end(ap); - } -} -#else -# define phoenix_486_jumper_log(fmt, ...) -#endif - -static void -phoenix_486_jumper_write(uint16_t addr, uint8_t val, void *priv) -{ - phoenix_486_jumper_t *dev = (phoenix_486_jumper_t *) priv; - phoenix_486_jumper_log("Phoenix 486 Jumper: Write %02x\n", val); - if (dev->type == 1) - dev->jumper = val & 0xbf; - else - dev->jumper = val; -} - -static uint8_t -phoenix_486_jumper_read(uint16_t addr, void *priv) -{ - phoenix_486_jumper_t *dev = (phoenix_486_jumper_t *) priv; - phoenix_486_jumper_log("Phoenix 486 Jumper: Read %02x\n", dev->jumper); - return dev->jumper; -} - -static void -phoenix_486_jumper_reset(void *priv) -{ - phoenix_486_jumper_t *dev = (phoenix_486_jumper_t *) priv; - - if (dev->type == 1) - dev->jumper = 0x00; - else { - dev->jumper = 0x9f; - if (gfxcard[0] != 0x01) - dev->jumper |= 0x40; - } -} - -static void -phoenix_486_jumper_close(void *priv) -{ - phoenix_486_jumper_t *dev = (phoenix_486_jumper_t *) priv; - - free(dev); -} - -static void * -phoenix_486_jumper_init(const device_t *info) -{ - phoenix_486_jumper_t *dev = (phoenix_486_jumper_t *) malloc(sizeof(phoenix_486_jumper_t)); - memset(dev, 0, sizeof(phoenix_486_jumper_t)); - - dev->type = info->local; - - phoenix_486_jumper_reset(dev); - - io_sethandler(0x0078, 0x0001, phoenix_486_jumper_read, NULL, NULL, phoenix_486_jumper_write, NULL, NULL, dev); - - return dev; -} - -const device_t phoenix_486_jumper_device = { - .name = "Phoenix 486 Jumper Readout", - .internal_name = "phoenix_486_jumper", - .flags = 0, - .local = 0, - .init = phoenix_486_jumper_init, - .close = phoenix_486_jumper_close, - .reset = phoenix_486_jumper_reset, - { .available = NULL }, - .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL -}; - -const device_t phoenix_486_jumper_pci_device = { - .name = "Phoenix 486 Jumper Readout (PCI machines)", - .internal_name = "phoenix_486_jumper_pci", - .flags = 0, - .local = 1, - .init = phoenix_486_jumper_init, - .close = phoenix_486_jumper_close, - .reset = phoenix_486_jumper_reset, - { .available = NULL }, - .speed_changed = NULL, - .force_redraw = NULL, - .config = NULL -}; +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Implementation of the Phoenix 486 Jumper Readout + * + * + * + * Authors: Tiseno100 + * + * Copyright 2020 Tiseno100 + */ + +#include +#include +#include +#include +#include +#include +#define HAVE_STDARG_H +#include <86box/86box.h> +#include "cpu.h" +#include <86box/timer.h> +#include <86box/io.h> +#include <86box/device.h> +#include <86box/chipset.h> +#include <86box/plat_unused.h> + +/* + Bit 7 = Super I/O chip: 1 = enabled, 0 = disabled; + Bit 6 = Graphics card: 1 = standalone, 0 = on-board; + Bit 5 = ???? (if 1, siren and hangs); + Bit 4 = ????; + Bit 3 = ????; + Bit 2 = ????; + Bit 1 = ????; + Bit 0 = ????. +*/ + +typedef struct phoenix_486_jumper_t { + uint8_t type; + uint8_t jumper; +} phoenix_486_jumper_t; + +#ifdef ENABLE_PHOENIX_486_JUMPER_LOG +int phoenix_486_jumper_do_log = ENABLE_PHOENIX_486_JUMPER_LOG; + +static void +phoenix_486_jumper_log(const char *fmt, ...) +{ + va_list ap; + + if (phoenix_486_jumper_do_log) { + va_start(ap, fmt); + pclog_ex(fmt, ap); + va_end(ap); + } +} +#else +# define phoenix_486_jumper_log(fmt, ...) +#endif + +static void +phoenix_486_jumper_write(UNUSED(uint16_t addr), uint8_t val, void *priv) +{ + phoenix_486_jumper_t *dev = (phoenix_486_jumper_t *) priv; + phoenix_486_jumper_log("Phoenix 486 Jumper: Write %02x\n", val); + if (dev->type == 1) + dev->jumper = val & 0xbf; + else + dev->jumper = val; +} + +static uint8_t +phoenix_486_jumper_read(UNUSED(uint16_t addr), void *priv) +{ + phoenix_486_jumper_t *dev = (phoenix_486_jumper_t *) priv; + phoenix_486_jumper_log("Phoenix 486 Jumper: Read %02x\n", dev->jumper); + return dev->jumper; +} + +static void +phoenix_486_jumper_reset(void *priv) +{ + phoenix_486_jumper_t *dev = (phoenix_486_jumper_t *) priv; + + if (dev->type == 1) + dev->jumper = 0x00; + else { + dev->jumper = 0x9f; + if (gfxcard[0] != 0x01) + dev->jumper |= 0x40; + } +} + +static void +phoenix_486_jumper_close(void *priv) +{ + phoenix_486_jumper_t *dev = (phoenix_486_jumper_t *) priv; + + free(dev); +} + +static void * +phoenix_486_jumper_init(const device_t *info) +{ + phoenix_486_jumper_t *dev = (phoenix_486_jumper_t *) malloc(sizeof(phoenix_486_jumper_t)); + memset(dev, 0, sizeof(phoenix_486_jumper_t)); + + dev->type = info->local; + + phoenix_486_jumper_reset(dev); + + io_sethandler(0x0078, 0x0001, phoenix_486_jumper_read, NULL, NULL, phoenix_486_jumper_write, NULL, NULL, dev); + + return dev; +} + +const device_t phoenix_486_jumper_device = { + .name = "Phoenix 486 Jumper Readout", + .internal_name = "phoenix_486_jumper", + .flags = 0, + .local = 0, + .init = phoenix_486_jumper_init, + .close = phoenix_486_jumper_close, + .reset = phoenix_486_jumper_reset, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; + +const device_t phoenix_486_jumper_pci_device = { + .name = "Phoenix 486 Jumper Readout (PCI machines)", + .internal_name = "phoenix_486_jumper_pci", + .flags = 0, + .local = 1, + .init = phoenix_486_jumper_init, + .close = phoenix_486_jumper_close, + .reset = phoenix_486_jumper_reset, + { .available = NULL }, + .speed_changed = NULL, + .force_redraw = NULL, + .config = NULL +}; diff --git a/src/device/postcard.c b/src/device/postcard.c index 8475f76fc..f5e85dafb 100644 --- a/src/device/postcard.c +++ b/src/device/postcard.c @@ -86,7 +86,7 @@ postcard_reset(void) } static void -postcard_write(uint16_t port, uint8_t val, void *priv) +postcard_write(UNUSED(uint16_t port), uint8_t val, UNUSED(void *priv)) { if (postcard_written && (val == postcard_code)) return; @@ -100,7 +100,7 @@ postcard_write(uint16_t port, uint8_t val, void *priv) } static void * -postcard_init(const device_t *info) +postcard_init(UNUSED(const device_t *info)) { postcard_reset(); diff --git a/src/device/serial.c b/src/device/serial.c index bc4b3053d..a36e4f99f 100644 --- a/src/device/serial.c +++ b/src/device/serial.c @@ -154,7 +154,9 @@ serial_receive_timer(void *priv) { serial_t *dev = (serial_t *) priv; - // serial_log("serial_receive_timer()\n"); +#if 0 + serial_log("serial_receive_timer()\n"); +#endif timer_on_auto(&dev->receive_timer, /* dev->bits * */ dev->transmit_period); @@ -174,7 +176,9 @@ serial_receive_timer(void *priv) } else { /* We can input data into the FIFO. */ dev->rcvr_fifo[dev->rcvr_fifo_end] = (uint8_t) (dev->out_new & 0xff); - // dev->rcvr_fifo_end = (dev->rcvr_fifo_end + 1) & 0x0f; +#if 0 + dev->rcvr_fifo_end = (dev->rcvr_fifo_end + 1) & 0x0f; +#endif /* Do not wrap around, makes sure it still triggers the interrupt at 16 bytes. */ dev->rcvr_fifo_end++; @@ -557,6 +561,8 @@ serial_write(uint16_t addr, uint8_t val, void *p) case 3: dev->rcvr_fifo_len = 14; break; + default: + break; } dev->out_new = 0xffff; serial_log("FIFO now %sabled, receive FIFO length = %i\n", dev->fifo_enabled ? "en" : "dis", dev->rcvr_fifo_len); @@ -624,8 +630,10 @@ serial_write(uint16_t addr, uint8_t val, void *p) serial_update_ints(dev); break; case 6: - // dev->msr = (val & 0xf0) | (dev->msr & 0x0f); - // dev->msr = val; +#if 0 + dev->msr = (val & 0xf0) | (dev->msr & 0x0f); + dev->msr = val; +#endif /* The actual condition bits of the MSR are read-only, but the delta bits are undocumentedly writable, and the PCjr BIOS uses them to raise MSR interrupts. */ dev->msr = (dev->msr & 0xf0) | (val & 0x0f); @@ -637,6 +645,8 @@ serial_write(uint16_t addr, uint8_t val, void *p) if (dev->type >= SERIAL_16450) dev->scratch = val; break; + default: + break; } } @@ -736,6 +746,8 @@ serial_read(uint16_t addr, void *p) case 7: ret = dev->scratch; break; + default: + break; } // serial_log("UART: Read %02X from port %02X\n", ret, addr); @@ -914,7 +926,7 @@ serial_set_next_inst(int ni) void serial_standalone_init(void) { - for (; next_inst < SERIAL_MAX;) + while (next_inst < SERIAL_MAX) device_add_inst(&ns8250_device, next_inst + 1); }; diff --git a/src/device/serial_passthrough.c b/src/device/serial_passthrough.c index 441d3e339..a8c531f07 100644 --- a/src/device/serial_passthrough.c +++ b/src/device/serial_passthrough.c @@ -29,6 +29,7 @@ #include <86box/serial.h> #include <86box/serial_passthrough.h> #include <86box/plat_serial_passthrough.h> +#include <86box/plat_unused.h> #define ENABLE_SERIAL_PASSTHROUGH_LOG 1 #ifdef ENABLE_SERIAL_PASSTHROUGH_LOG @@ -61,7 +62,7 @@ serial_passthrough_init(void) } static void -serial_passthrough_write(serial_t *s, void *priv, uint8_t val) +serial_passthrough_write(UNUSED(serial_t *s), void *priv, uint8_t val) { plat_serpt_write(priv, val); } @@ -86,24 +87,32 @@ host_to_serial_cb(void *priv) } } if (plat_serpt_read(dev, &byte)) { - // printf("got byte %02X\n", byte); +#if 0 + printf("got byte %02X\n", byte); +#endif serial_write_fifo(dev->serial, byte); - // serial_set_dsr(dev->serial, 1); +#if 0 + serial_set_dsr(dev->serial, 1); +#endif } no_write_to_machine: - // serial_device_timeout(dev->serial); +#if 0 + serial_device_timeout(dev->serial); +#endif timer_on_auto(&dev->host_to_serial_timer, (1000000.0 / dev->baudrate) * (double) dev->bits); } static void -serial_passthrough_rcr_cb(struct serial_s *serial, void *priv) +serial_passthrough_rcr_cb(UNUSED(struct serial_s *serial), void *priv) { serial_passthrough_t *dev = (serial_passthrough_t *) priv; timer_stop(&dev->host_to_serial_timer); /* FIXME: do something to dev->baudrate */ timer_on_auto(&dev->host_to_serial_timer, (1000000.0 / dev->baudrate) * (double) dev->bits); - // serial_clear_fifo(dev->serial); +#if 0 + serial_clear_fifo(dev->serial); +#endif } static void @@ -114,7 +123,9 @@ serial_passthrough_speed_changed(void *priv) timer_stop(&dev->host_to_serial_timer); /* FIXME: do something to dev->baudrate */ timer_on_auto(&dev->host_to_serial_timer, (1000000.0 / dev->baudrate) * (double) dev->bits); - // serial_clear_fifo(dev->serial); +#if 0 + serial_clear_fifo(dev->serial); +#endif } static void @@ -131,28 +142,28 @@ serial_passthrough_dev_close(void *priv) } void -serial_passthrough_transmit_period(serial_t *serial, void *p, double transmit_period) +serial_passthrough_transmit_period(UNUSED(serial_t *serial), void *priv, double transmit_period) { - serial_passthrough_t *dev = (serial_passthrough_t *) p; + serial_passthrough_t *dev = (serial_passthrough_t *) priv; if (dev->mode != SERPT_MODE_HOSTSER) return; dev->baudrate = 1000000.0 / transmit_period; - serial_passthrough_speed_changed(p); + serial_passthrough_speed_changed(priv); plat_serpt_set_params(dev); } void -serial_passthrough_lcr_callback(serial_t *serial, void *p, uint8_t lcr) +serial_passthrough_lcr_callback(serial_t *serial, void *priv, uint8_t lcr) { - serial_passthrough_t *dev = (serial_passthrough_t *) p; + serial_passthrough_t *dev = (serial_passthrough_t *) priv; if (dev->mode != SERPT_MODE_HOSTSER) return; dev->bits = serial->bits; dev->data_bits = ((lcr & 0x03) + 5); - serial_passthrough_speed_changed(p); + serial_passthrough_speed_changed(priv); plat_serpt_set_params(dev); } @@ -350,12 +361,12 @@ static const device_config_t serial_passthrough_config[] = { // clang-format on const device_t serial_passthrough_device = { - .name = "Serial Passthrough Device", - .flags = 0, - .local = 0, - .init = serial_passthrough_dev_init, - .close = serial_passthrough_dev_close, - .reset = NULL, + .name = "Serial Passthrough Device", + .flags = 0, + .local = 0, + .init = serial_passthrough_dev_init, + .close = serial_passthrough_dev_close, + .reset = NULL, { .poll = NULL }, .speed_changed = serial_passthrough_speed_changed, .force_redraw = NULL, diff --git a/src/device/smbus_ali7101.c b/src/device/smbus_ali7101.c index 9ca89456a..d48749d28 100644 --- a/src/device/smbus_ali7101.c +++ b/src/device/smbus_ali7101.c @@ -79,6 +79,9 @@ smbus_ali7101_read(uint16_t addr, void *priv) case 0x07: ret = dev->cmd; break; + + default: + break; } smbus_ali7101_log("SMBus ALI7101: read(%02X) = %02x\n", addr, ret); @@ -223,6 +226,9 @@ smbus_ali7101_write(uint16_t addr, uint8_t val, void *priv) case 0x07: dev->cmd = val; break; + + default: + break; } if (dev->next_stat != 0x04) { /* schedule dispatch of any pending status register update */ diff --git a/src/device/smbus_piix4.c b/src/device/smbus_piix4.c index 670a9adf4..48a04451e 100644 --- a/src/device/smbus_piix4.c +++ b/src/device/smbus_piix4.c @@ -83,6 +83,9 @@ smbus_piix4_read(uint16_t addr, void *priv) if (dev->index >= SMBUS_PIIX4_BLOCK_DATA_SIZE) dev->index = 0; break; + + default: + break; } smbus_piix4_log("SMBus PIIX4: read(%02X) = %02x\n", addr, ret); @@ -309,6 +312,9 @@ unknown_protocol: if (dev->index >= SMBUS_PIIX4_BLOCK_DATA_SIZE) dev->index = 0; break; + + default: + break; } if (dev->next_stat) { /* schedule dispatch of any pending status register update */ diff --git a/src/disk/hdc_esdi_at.c b/src/disk/hdc_esdi_at.c index 7c0d08fca..014212b1d 100644 --- a/src/disk/hdc_esdi_at.c +++ b/src/disk/hdc_esdi_at.c @@ -70,7 +70,7 @@ #define CMD_SET_PARAMETERS 0x91 #define CMD_READ_PARAMETERS 0xec -typedef struct { +typedef struct drive_t { int cfg_spt; int cfg_hpc; int current_cylinder; @@ -81,10 +81,14 @@ typedef struct { int hdd_num; } drive_t; -typedef struct { +typedef struct esdi_t { uint8_t status; uint8_t error; - int secount, sector, cylinder, head, cylprecomp; + int secount; + int sector; + int cylinder; + int head; + int cylprecomp; uint8_t command; uint8_t fdisk; int pos; @@ -132,13 +136,13 @@ irq_raise(esdi_t *esdi) } static __inline void -irq_lower(esdi_t *esdi) +irq_lower(UNUSED(esdi_t *esdi)) { picintc(1 << 14); } static __inline void -irq_update(esdi_t *esdi) +irq_update(UNUSED(esdi_t *esdi)) { if (esdi->irqstat && !((pic2.irr | pic2.isr) & 0x40) && !(esdi->fdisk & 2)) picint(1 << 14); @@ -159,7 +163,7 @@ esdi_set_callback(esdi_t *esdi, double callback) } double -esdi_get_xfer_time(esdi_t *esdi, int size) +esdi_get_xfer_time(UNUSED(esdi_t *esdi), int size) { /* 390.625 us per sector at 10 Mbit/s = 1280 kB/s. */ return (3125.0 / 8.0) * (double) size; @@ -417,6 +421,9 @@ esdi_write(uint16_t port, uint8_t val, void *priv) esdi->fdisk = val; irq_update(esdi); break; + + default: + break; } } @@ -498,6 +505,9 @@ esdi_read(uint16_t port, void *priv) irq_lower(esdi); temp = esdi->status; break; + + default: + break; } esdi_at_log("WD1007 read(%04x) = %02x\n", port, temp); @@ -791,7 +801,7 @@ esdi_callback(void *priv) } static void -loadhd(esdi_t *esdi, int hdd_num, int d, const char *fn) +loadhd(esdi_t *esdi, int hdd_num, int d, UNUSED(const char *fn)) { drive_t *drive = &esdi->drives[hdd_num]; @@ -811,9 +821,9 @@ loadhd(esdi_t *esdi, int hdd_num, int d, const char *fn) } static void -esdi_rom_write(uint32_t addr, uint8_t val, void *p) +esdi_rom_write(uint32_t addr, uint8_t val, void *priv) { - rom_t *rom = (rom_t *) p; + rom_t *rom = (rom_t *) priv; addr &= rom->mask; @@ -822,7 +832,7 @@ esdi_rom_write(uint32_t addr, uint8_t val, void *p) } static void * -wd1007vse1_init(const device_t *info) +wd1007vse1_init(UNUSED(const device_t *info)) { int c; diff --git a/src/disk/hdc_esdi_mca.c b/src/disk/hdc_esdi_mca.c index f8686ba4e..712ab900b 100644 --- a/src/disk/hdc_esdi_mca.c +++ b/src/disk/hdc_esdi_mca.c @@ -82,6 +82,7 @@ #include <86box/ui.h> #include <86box/hdc.h> #include <86box/hdd.h> +#include <86box/plat_unused.h> /* These are hardwired. */ #define ESDI_IOADDR_PRI 0x3510 @@ -95,7 +96,8 @@ #define CMD_ADAPTER 0 typedef struct esdi_drive_t { - int spt, hpc; + int spt; + int hpc; int tracks; int sectors; int present; @@ -117,8 +119,8 @@ typedef struct esdi_t { uint16_t cmd_data[4]; int cmd_dev; - int status_pos, - status_len; + int status_pos; + int status_len; uint16_t status_data[256]; @@ -138,7 +140,7 @@ typedef struct esdi_t { uint32_t rba; - struct { + struct cmds { int req_in_progress; } cmds[3]; @@ -221,7 +223,7 @@ set_irq(esdi_t *dev) } static __inline void -clear_irq(esdi_t *dev) +clear_irq(UNUSED(esdi_t *dev)) { picintc(1 << 14); } @@ -241,7 +243,7 @@ esdi_mca_set_callback(esdi_t *dev, double callback) } static double -esdi_mca_get_xfer_time(esdi_t *esdi, int size) +esdi_mca_get_xfer_time(UNUSED(esdi_t *esdi), int size) { /* 390.625 us per sector at 10 Mbit/s = 1280 kB/s. */ return (3125.0 / 8.0) * (double) size; @@ -440,6 +442,9 @@ esdi_callback(void *priv) dev->irq_in_progress = 1; set_irq(dev); break; + + default: + break; } break; @@ -513,6 +518,9 @@ esdi_callback(void *priv) dev->irq_in_progress = 1; set_irq(dev); break; + + default: + break; } break; @@ -546,6 +554,9 @@ esdi_callback(void *priv) dev->irq_in_progress = 1; set_irq(dev); break; + + default: + break; } break; @@ -577,6 +588,9 @@ esdi_callback(void *priv) dev->irq_in_progress = 1; set_irq(dev); break; + + default: + break; } break; @@ -695,7 +709,6 @@ esdi_callback(void *priv) } dev->data[dev->data_pos++] = val & 0xffff; - ; } memcpy(dev->sector_buffer[dev->sector_pos++], dev->data, 512); @@ -714,6 +727,9 @@ esdi_callback(void *priv) set_irq(dev); ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); break; + + default: + break; } break; @@ -771,6 +787,9 @@ esdi_callback(void *priv) set_irq(dev); ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0); break; + + default: + break; } break; @@ -839,6 +858,9 @@ esdi_callback(void *priv) dev->irq_in_progress = 1; set_irq(dev); break; + + default: + break; } break; @@ -1085,6 +1107,9 @@ esdi_mca_write(int port, uint8_t val, void *priv) case 0x10: dev->dma = 4; break; + + default: + break; } if (dev->pos_regs[2] & 1) { @@ -1113,7 +1138,7 @@ esdi_mca_feedb(void *priv) } static void * -esdi_init(const device_t *info) +esdi_init(UNUSED(const device_t *info)) { drive_t *drive; esdi_t *dev; diff --git a/src/disk/hdc_ide.c b/src/disk/hdc_ide.c index 2bd1b8b8a..041d8ffc4 100644 --- a/src/disk/hdc_ide.c +++ b/src/disk/hdc_ide.c @@ -110,16 +110,20 @@ #define IDE_TIME 10.0 -typedef struct { - int bit32, cur_dev, - irq, inited, - diag, force_ata3; - uint16_t base_main, side_main; +typedef struct ide_board_t { + int bit32; + int cur_dev; + int irq; + int inited; + int diag; + int force_ata3; + uint16_t base_main; + uint16_t side_main; pc_timer_t timer; ide_t *ide[2]; } ide_board_t; -typedef struct { +typedef struct ide_bm_t { int (*dma)(int channel, uint8_t *data, int transfer_length, int out, void *priv); void (*set_irq)(int channel, void *priv); void *priv; @@ -240,6 +244,9 @@ ide_get_xfer_time(ide_t *ide, int size) case 0x10: period = (50.0 / 3.0); break; + + default: + break; } break; case 0x100: /* Single Word DMA */ @@ -253,6 +260,9 @@ ide_get_xfer_time(ide_t *ide, int size) case 0x04: period = (25.0 / 3.0); break; + + default: + break; } break; case 0x200: /* Multiword DMA */ @@ -266,6 +276,9 @@ ide_get_xfer_time(ide_t *ide, int size) case 0x04: period = (50.0 / 3.0); break; + + default: + break; } break; case 0x300: /* Ultra DMA */ @@ -288,8 +301,14 @@ ide_get_xfer_time(ide_t *ide, int size) case 0x20: period = 100.0; break; + + default: + break; } break; + + default: + break; } period = (1.0 / period); /* get us for 1 byte */ @@ -717,7 +736,7 @@ ide_next_sector(ide_t *ide) } static void -loadhd(ide_t *ide, int d, const char *fn) +loadhd(ide_t *ide, int d, UNUSED(const char *fn)) { if (!hdd_image_load(d)) { ide->type = IDE_NONE; @@ -746,7 +765,9 @@ ide_set_signature(ide_t *ide) ide->cylinder = ide->sc->request_length; } else { ide->secount = 1; - // ide->cylinder = ((ide->type == IDE_HDD) ? 0 : 0xFFFF); +#if 0 + ide->cylinder = ((ide->type == IDE_HDD) ? 0 : 0xFFFF); +#endif ide->cylinder = ((ide->type == IDE_HDD) ? 0 : 0x7F7F); if (ide->type == IDE_HDD) ide->drive = 0; @@ -851,7 +872,7 @@ ide_set_sector(ide_t *ide, int64_t sector_num) if (ide->lba) { ide->head = (sector_num >> 24); ide->cylinder = (sector_num >> 8); - ide->sector = (sector_num); + ide->sector = sector_num; } else { cyl = sector_num / (hdd[ide->hdd_num].hpc * hdd[ide->hdd_num].spt); r = sector_num % (hdd[ide->hdd_num].hpc * hdd[ide->hdd_num].spt); @@ -1334,7 +1355,7 @@ dev_reset(ide_t *ide) } void -ide_write_devctl(uint16_t addr, uint8_t val, void *priv) +ide_write_devctl(UNUSED(uint16_t addr), uint8_t val, void *priv) { ide_board_t *dev = (ide_board_t *) priv; @@ -2048,7 +2069,7 @@ ide_readb(uint16_t addr, void *priv) } uint8_t -ide_read_alt_status(uint16_t addr, void *priv) +ide_read_alt_status(UNUSED(uint16_t addr), void *priv) { uint8_t temp = 0xff; @@ -2570,6 +2591,9 @@ ide_callback(void *priv) case 0xFF: goto abort_cmd; + + default: + break; } abort_cmd: @@ -2957,7 +2981,7 @@ ide_ter_init(const device_t *info) /* Close a standalone IDE unit. */ static void -ide_ter_close(void *priv) +ide_ter_close(UNUSED(void *priv)) { ide_board_close(2); } @@ -2988,7 +3012,7 @@ ide_qua_init(const device_t *info) /* Close a standalone IDE unit. */ static void -ide_qua_close(void *priv) +ide_qua_close(UNUSED(void *priv)) { ide_board_close(3); } @@ -3037,6 +3061,9 @@ ide_init(const device_t *info) if (info->local & 1) ide_board_init(1, 15, 0x170, 0x376, info->local); break; + + default: + break; } return ide_drives; @@ -3087,7 +3114,7 @@ ide_board_reset(int board) /* Reset a standalone IDE unit. */ static void -ide_reset(void *p) +ide_reset(UNUSED(void *priv)) { ide_log("Resetting IDE...\n"); @@ -3100,7 +3127,7 @@ ide_reset(void *p) /* Close a standalone IDE unit. */ static void -ide_close(void *priv) +ide_close(UNUSED(void *priv)) { ide_log("Closing IDE...\n"); diff --git a/src/disk/hdc_ide_cmd640.c b/src/disk/hdc_ide_cmd640.c index 6f8580cba..6299bf7f4 100644 --- a/src/disk/hdc_ide_cmd640.c +++ b/src/disk/hdc_ide_cmd640.c @@ -37,14 +37,17 @@ #include <86box/zip.h> #include <86box/mo.h> -typedef struct -{ - uint8_t vlb_idx, id, - in_cfg, single_channel, - pci, regs[256]; +typedef struct cmd640_t { + uint8_t vlb_idx; + uint8_t id; + uint8_t in_cfg; + uint8_t single_channel; + uint8_t pci, regs[256]; uint32_t local; - int slot, irq_mode[2], - irq_pin, irq_line; + int slot; + int irq_mode[2]; + int irq_pin; + int irq_line; } cmd640_t; static int next_id = 0; @@ -166,6 +169,9 @@ cmd640_common_write(int addr, uint8_t val, cmd640_t *dev) case 0x5b: /* Undocumented register that Linux attempts to use! */ dev->regs[addr] = val; break; + + default: + break; } } @@ -188,6 +194,9 @@ cmd640_vlb_write(uint16_t addr, uint8_t val, void *priv) if (dev->regs[0x50] & 0x80) dev->in_cfg = 0; break; + + default: + break; } } @@ -227,6 +236,9 @@ cmd640_vlb_read(uint16_t addr, void *priv) if (dev->regs[0x50] & 0x80) dev->in_cfg = 0; break; + + default: + break; } return ret; @@ -462,7 +474,9 @@ cmd640_init(const device_t *info) ide_board_set_force_ata3(0, 1); ide_board_set_force_ata3(1, 1); - // ide_pri_disable(); +#if 0 + ide_pri_disable(); +#endif } else if (info->flags & DEVICE_VLB) { device_add(&ide_vlb_2ch_device); diff --git a/src/disk/hdc_ide_cmd646.c b/src/disk/hdc_ide_cmd646.c index a9f5eb883..00f765bf7 100644 --- a/src/disk/hdc_ide_cmd646.c +++ b/src/disk/hdc_ide_cmd646.c @@ -37,13 +37,15 @@ #include <86box/zip.h> #include <86box/mo.h> -typedef struct -{ - uint8_t vlb_idx, single_channel, - in_cfg, regs[256]; - uint32_t local; - int slot, irq_mode[2], - irq_pin; +typedef struct cmd646_t { + uint8_t vlb_idx; + uint8_t single_channel; + uint8_t in_cfg; + uint8_t regs[256]; + uint32_t local; + int slot; + int irq_mode[2]; + int irq_pin; sff8038i_t *bm[2]; } cmd646_t; @@ -262,6 +264,9 @@ cmd646_pci_write(int func, int addr, uint8_t val, void *priv) case 0x78 ... 0x7f: sff_bus_master_write(addr & 0x0f, val, dev->bm[1]); break; + + default: + break; } } diff --git a/src/disk/hdc_ide_opti611.c b/src/disk/hdc_ide_opti611.c index 06eecb68f..4e44c55f8 100644 --- a/src/disk/hdc_ide_opti611.c +++ b/src/disk/hdc_ide_opti611.c @@ -28,12 +28,13 @@ #include <86box/mem.h> #include <86box/hdc.h> #include <86box/hdc_ide.h> +#include <86box/plat_unused.h> -typedef struct -{ - uint8_t tries, - in_cfg, cfg_locked, - regs[19]; +typedef struct opti611_t { + uint8_t tries; + uint8_t in_cfg; + uint8_t cfg_locked; + uint8_t regs[19]; } opti611_t; static void opti611_ide_handler(opti611_t *dev); @@ -68,6 +69,9 @@ opti611_cfg_write(uint16_t addr, uint8_t val, void *priv) case 0x0006: dev->regs[0x06] = val; break; + + default: + break; } } @@ -109,6 +113,9 @@ opti611_cfg_read(uint16_t addr, void *priv) case 0x0006: ret = dev->regs[addr]; break; + + default: + break; } return ret; @@ -153,7 +160,7 @@ opti611_ide_write(uint16_t addr, uint8_t val, void *priv) } static void -opti611_ide_writew(uint16_t addr, uint16_t val, void *priv) +opti611_ide_writew(uint16_t addr, UNUSED(uint16_t val), void *priv) { opti611_t *dev = (opti611_t *) priv; @@ -169,7 +176,7 @@ opti611_ide_writew(uint16_t addr, uint16_t val, void *priv) } static void -opti611_ide_writel(uint16_t addr, uint32_t val, void *priv) +opti611_ide_writel(uint16_t addr, UNUSED(uint32_t val), void *priv) { opti611_t *dev = (opti611_t *) priv; @@ -281,7 +288,7 @@ opti611_close(void *priv) } static void * -opti611_init(const device_t *info) +opti611_init(UNUSED(const device_t *info)) { opti611_t *dev = (opti611_t *) malloc(sizeof(opti611_t)); memset(dev, 0, sizeof(opti611_t)); diff --git a/src/disk/hdc_ide_sff8038i.c b/src/disk/hdc_ide_sff8038i.c index a2c80ac7f..fb16c8788 100644 --- a/src/disk/hdc_ide_sff8038i.c +++ b/src/disk/hdc_ide_sff8038i.c @@ -42,6 +42,7 @@ #include <86box/hdc_ide_sff8038i.h> #include <86box/zip.h> #include <86box/mo.h> +#include <86box/plat_unused.h> static int next_id = 0; @@ -160,6 +161,9 @@ sff_bus_master_write(uint16_t port, uint8_t val, void *priv) dev->ptr = (dev->ptr & 0x00fffffc) | (val << 24); dev->ptr %= (mem_size * 1024); break; + + default: + break; } } @@ -185,6 +189,9 @@ sff_bus_master_writew(uint16_t port, uint16_t val, void *priv) dev->ptr = (dev->ptr & 0x0000fffc) | (val << 16); dev->ptr %= (mem_size * 1024); break; + + default: + break; } } @@ -206,6 +213,9 @@ sff_bus_master_writel(uint16_t port, uint32_t val, void *priv) dev->ptr %= (mem_size * 1024); dev->ptr0 = val & 0xff; break; + + default: + break; } } @@ -238,6 +248,9 @@ sff_bus_master_read(uint16_t port, void *priv) case 7: ret = dev->ptr >> 24; break; + + default: + break; } sff_log("SFF-8038i Bus master BYTE read : %04X %02X\n", port, ret); @@ -264,6 +277,9 @@ sff_bus_master_readw(uint16_t port, void *priv) case 6: ret = dev->ptr >> 16; break; + + default: + break; } sff_log("SFF-8038i Bus master WORD read : %04X %04X\n", port, ret); @@ -287,6 +303,9 @@ sff_bus_master_readl(uint16_t port, void *priv) case 4: ret = dev->ptr0 | (dev->ptr & 0xffffff00); break; + + default: + break; } sff_log("sff Bus master DWORD read : %04X %08X\n", port, ret); @@ -295,7 +314,7 @@ sff_bus_master_readl(uint16_t port, void *priv) } int -sff_bus_master_dma(int channel, uint8_t *data, int transfer_length, int out, void *priv) +sff_bus_master_dma(UNUSED(int channel), uint8_t *data, int transfer_length, int out, void *priv) { sff8038i_t *dev = (sff8038i_t *) priv; #ifdef ENABLE_SFF_LOG @@ -379,8 +398,8 @@ sff_bus_master_set_irq(int channel, void *priv) channel &= 0x01; switch (dev->irq_mode[channel]) { - case 0: default: + case 0: /* Legacy IRQ mode. */ if (irq) picint(1 << (14 + channel)); @@ -443,29 +462,27 @@ sff_bus_master_reset(sff8038i_t *dev, uint16_t old_base) } static void -sff_reset(void *p) +sff_reset(void *priv) { - int i = 0; - #ifdef ENABLE_SFF_LOG sff_log("SFF8038i: Reset\n"); #endif - for (i = 0; i < CDROM_NUM; i++) { + for (uint8_t i = 0; i < CDROM_NUM; i++) { if ((cdrom[i].bus_type == CDROM_BUS_ATAPI) && (cdrom[i].ide_channel < 4) && cdrom[i].priv) scsi_cdrom_reset((scsi_common_t *) cdrom[i].priv); } - for (i = 0; i < ZIP_NUM; i++) { + for (uint8_t i = 0; i < ZIP_NUM; i++) { if ((zip_drives[i].bus_type == ZIP_BUS_ATAPI) && (zip_drives[i].ide_channel < 4) && zip_drives[i].priv) zip_reset((scsi_common_t *) zip_drives[i].priv); } - for (i = 0; i < MO_NUM; i++) { + for (uint8_t i = 0; i < MO_NUM; i++) { if ((mo_drives[i].bus_type == MO_BUS_ATAPI) && (mo_drives[i].ide_channel < 4) && mo_drives[i].priv) mo_reset((scsi_common_t *) mo_drives[i].priv); } - sff_bus_master_set_irq(0x00, p); - sff_bus_master_set_irq(0x01, p); + sff_bus_master_set_irq(0x00, priv); + sff_bus_master_set_irq(0x01, priv); } void @@ -481,7 +498,7 @@ sff_set_irq_line(sff8038i_t *dev, int irq_line) } void -sff_set_irq_level(sff8038i_t *dev, int channel, int irq_level) +sff_set_irq_level(sff8038i_t *dev, int channel, UNUSED(int irq_level)) { dev->irq_level[channel] = 0; } @@ -492,8 +509,8 @@ sff_set_irq_mode(sff8038i_t *dev, int channel, int irq_mode) dev->irq_mode[channel] = irq_mode; switch (dev->irq_mode[channel]) { - case 0: default: + case 0: /* Legacy IRQ mode. */ sff_log("[%08X] Setting channel %i to legacy IRQ %i\n", dev, channel, 14 + channel); break; @@ -524,9 +541,9 @@ sff_set_irq_pin(sff8038i_t *dev, int irq_pin) } static void -sff_close(void *p) +sff_close(void *priv) { - sff8038i_t *dev = (sff8038i_t *) p; + sff8038i_t *dev = (sff8038i_t *) priv; free(dev); @@ -535,9 +552,8 @@ sff_close(void *p) next_id = 0; } -static void - * - sff_init(const device_t *info) +static void * +sff_init(UNUSED(const device_t *info)) { sff8038i_t *dev = (sff8038i_t *) malloc(sizeof(sff8038i_t)); memset(dev, 0, sizeof(sff8038i_t)); diff --git a/src/disk/hdc_st506_at.c b/src/disk/hdc_st506_at.c index 88fd7192b..b202ebe47 100644 --- a/src/disk/hdc_st506_at.c +++ b/src/disk/hdc_st506_at.c @@ -74,36 +74,36 @@ #define CMD_DIAGNOSE 0x90 #define CMD_SET_PARAMETERS 0x91 -typedef struct { - int8_t present, /* drive is present */ - hdd_num, /* drive number in system */ - steprate, /* current servo step rate */ - spt, /* physical #sectors per track */ - hpc, /* physical #heads per cylinder */ - pad; - int16_t tracks; /* physical #tracks per cylinder */ +typedef struct drive_t { + int8_t present; /* drive is present */ + int8_t hdd_num; /* drive number in system */ + int8_t steprate; /* current servo step rate */ + int8_t spt; /* physical #sectors per track */ + int8_t hpc; /* physical #heads per cylinder */ + int8_t pad; + int16_t tracks; /* physical #tracks per cylinder */ - int8_t cfg_spt, /* configured #sectors per track */ - cfg_hpc; /* configured #heads per track */ + int8_t cfg_spt; /* configured #sectors per track */ + int8_t cfg_hpc; /* configured #heads per track */ - int16_t curcyl; /* current track number */ + int16_t curcyl; /* current track number */ } drive_t; -typedef struct { - uint8_t precomp, /* 1: precomp/error register */ - error, - secount, /* 2: sector count register */ - sector, /* 3: sector number */ - head, /* 6: head number + drive select */ - command, /* 7: command/status */ - status, - fdisk; /* 8: control register */ +typedef struct mfm_t { + uint8_t precomp; /* 1: precomp/error register */ + uint8_t error; + uint8_t secount; /* 2: sector count register */ + uint8_t sector; /* 3: sector number */ + uint8_t head; /* 6: head number + drive select */ + uint8_t command; /* 7: command/status */ + uint8_t status; + uint8_t fdisk; /* 8: control register */ uint16_t cylinder; /* 4/5: cylinder LOW and HIGH */ - int8_t reset, /* controller in reset */ - irqstat, /* current IRQ status */ - drvsel, /* current selected drive */ - pad; + int8_t reset; /* controller in reset */ + int8_t irqstat; /* current IRQ status */ + int8_t drvsel; /* current selected drive */ + int8_t pad; int pos; /* offset within data buffer */ pc_timer_t callback_timer; /* callback delay timer */ @@ -144,7 +144,7 @@ irq_raise(mfm_t *mfm) } static inline void -irq_lower(mfm_t *mfm) +irq_lower(UNUSED(mfm_t *mfm)) { picintc(1 << 14); } @@ -435,6 +435,9 @@ mfm_write(uint16_t port, uint8_t val, void *priv) mfm->fdisk = val; irq_update(mfm); break; + + default: + break; } } @@ -668,7 +671,7 @@ do_callback(void *priv) } static void -loadhd(mfm_t *mfm, int c, int d, const char *fn) +loadhd(mfm_t *mfm, int c, int d, UNUSED(const char *fn)) { drive_t *drive = &mfm->drives[c]; @@ -686,7 +689,7 @@ loadhd(mfm_t *mfm, int c, int d, const char *fn) } static void * -mfm_init(const device_t *info) +mfm_init(UNUSED(const device_t *info)) { mfm_t *mfm; int c; diff --git a/src/disk/hdc_st506_xt.c b/src/disk/hdc_st506_xt.c index 6f9358e0a..c895aab45 100644 --- a/src/disk/hdc_st506_xt.c +++ b/src/disk/hdc_st506_xt.c @@ -229,7 +229,7 @@ enum { STATE_DONE }; -typedef struct { +typedef struct drive_t { int8_t present; uint8_t hdd_num; @@ -238,30 +238,33 @@ typedef struct { uint16_t cylinder; /* current cylinder */ - uint8_t spt, /* physical parameters */ - hpc; + uint8_t spt; /* physical parameters */ + uint8_t hpc; uint16_t tracks; - uint8_t cfg_spt, /* configured parameters */ - cfg_hpc; + uint8_t cfg_spt; /* configured parameters */ + uint8_t cfg_hpc; uint16_t cfg_cyl; } drive_t; -typedef struct { +typedef struct hdc_t { uint8_t type; /* controller type */ uint8_t spt; /* sectors-per-track for controller */ uint16_t base; /* controller configuration */ - int8_t irq, - dma; + int8_t irq; + int8_t dma; uint8_t switches; uint8_t misc; - uint8_t nr_err, err_bv, cur_sec, pad; - uint32_t bios_addr, - bios_size, - bios_ram; - rom_t bios_rom; + uint8_t nr_err; + uint8_t err_bv; + uint8_t cur_sec; + uint8_t pad; + uint32_t bios_addr; + uint32_t bios_size; + uint32_t bios_ram; + rom_t bios_rom; int state; /* operational data */ uint8_t irq_dma; @@ -272,14 +275,14 @@ typedef struct { uint8_t command[6]; /* current command request */ int drive_sel; - int sector, - head, - cylinder, - count; + int sector; + int head; + int cylinder; + int count; uint8_t compl ; /* current request completion code */ - int buff_pos, /* pointers to the RAM buffer */ - buff_cnt; + int buff_pos; /* pointers to the RAM buffer */ + int buff_cnt; drive_t drives[MFM_NUM]; /* the attached drives */ uint8_t scratch[64]; /* ST-11 scratchpad RAM */ @@ -287,7 +290,7 @@ typedef struct { } hdc_t; /* Supported drives table for the Xebec controller. */ -typedef struct { +typedef struct hd_type_t { uint16_t tracks; uint8_t hpc; uint8_t spt; @@ -505,6 +508,9 @@ st506_callback(void *priv) case STATE_DONE: st506_complete(dev); break; + + default: + break; } break; @@ -531,6 +537,9 @@ st506_callback(void *priv) case STATE_SENT_DATA: st506_complete(dev); break; + + default: + break; } break; @@ -567,6 +576,9 @@ st506_callback(void *priv) ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); st506_complete(dev); break; + + default: + break; } break; @@ -599,6 +611,9 @@ st506_callback(void *priv) timer_advance_u64(&dev->timer, ST506_TIME); break; + + default: + break; } break; @@ -642,6 +657,9 @@ st506_callback(void *priv) ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0); st506_complete(dev); break; + + default: + break; } break; @@ -734,6 +752,9 @@ st506_callback(void *priv) } dev->state = STATE_SEND_DATA; break; + + default: + break; } break; @@ -829,6 +850,9 @@ st506_callback(void *priv) } dev->state = STATE_RECEIVE_DATA; break; + + default: + break; } break; @@ -884,6 +908,9 @@ st506_callback(void *priv) } st506_complete(dev); break; + + default: + break; } break; @@ -903,6 +930,9 @@ st506_callback(void *priv) case STATE_SENT_DATA: st506_complete(dev); break; + + default: + break; } break; @@ -943,6 +973,9 @@ st506_callback(void *priv) case STATE_SENT_DATA: st506_complete(dev); break; + + default: + break; } break; @@ -984,6 +1017,9 @@ st506_callback(void *priv) case STATE_RECEIVED_DATA: st506_complete(dev); break; + + default: + break; } break; @@ -1005,6 +1041,9 @@ st506_callback(void *priv) case STATE_SENT_DATA: st506_complete(dev); break; + + default: + break; } else { st506_error(dev, ERR_BAD_COMMAND); @@ -1117,6 +1156,9 @@ st506_callback(void *priv) case STATE_SENT_DATA: st506_complete(dev); break; + + default: + break; } break; @@ -1136,6 +1178,9 @@ st506_callback(void *priv) /* FIXME: ignore the results. */ st506_complete(dev); break; + + default: + break; } break; @@ -1158,6 +1203,9 @@ st506_callback(void *priv) case STATE_SENT_DATA: st506_complete(dev); break; + + default: + break; } break; @@ -1202,6 +1250,9 @@ st506_read(uint16_t port, void *priv) timer_set_delay_u64(&dev->timer, ST506_TIME); } break; + + default: + break; } break; @@ -1214,6 +1265,9 @@ st506_read(uint16_t port, void *priv) case 2: /* read option jumpers */ ret = dev->switches; break; + + default: + break; } st506_xt_log("ST506: read(%04x) = %02x\n", port, ret); @@ -1254,6 +1308,9 @@ st506_write(uint16_t port, uint8_t val, void *priv) timer_set_delay_u64(&dev->timer, ST506_TIME); } break; + + default: + break; } break; @@ -1279,6 +1336,9 @@ st506_write(uint16_t port, uint8_t val, void *priv) picintc(1 << dev->irq); } break; + + default: + break; } } @@ -1362,9 +1422,10 @@ mem_read(uint32_t addr, void *priv) case ST506_XT_TYPE_ST11R: /* ST-11R */ mask = 0x1fff; /* ST-11 decodes RAM on each 8K block */ break; - - /* default: - break; */ +#if 0 + default: + break; +#endif } addr = addr & dev->bios_rom.mask; @@ -1429,7 +1490,7 @@ loadrom(hdc_t *dev, const char *fn) } static void -loadhd(hdc_t *dev, int c, int d, const char *fn) +loadhd(hdc_t *dev, int c, int d, UNUSED(const char *fn)) { drive_t *drive = &dev->drives[c]; @@ -1557,6 +1618,9 @@ st506_init(const device_t *info) case 19: /* v2.0 */ fn = ST11_BIOS_FILE_NEW; break; + + default: + break; } dev->base = device_get_config_hex16("base"); dev->irq = device_get_config_int("irq"); @@ -1661,6 +1725,9 @@ st506_init(const device_t *info) dev->base = 0x01f0; dev->switches = 0x0c; break; + + default: + break; } /* Load the ROM BIOS. */ diff --git a/src/disk/hdc_xta.c b/src/disk/hdc_xta.c index e698df7ff..99e638335 100644 --- a/src/disk/hdc_xta.c +++ b/src/disk/hdc_xta.c @@ -182,15 +182,15 @@ enum { /* The device control block (6 bytes) */ #pragma pack(push, 1) -typedef struct { +typedef struct dcb_t { uint8_t cmd; /* [7:5] class, [4:0] opcode */ - uint8_t head : 5, /* [4:0] head number */ - drvsel : 1, /* [5] drive select */ - mbz : 2; /* [7:6] 00 */ + uint8_t head : 5; /* [4:0] head number */ + uint8_t drvsel : 1; /* [5] drive select */ + uint8_t mbz : 2; /* [7:6] 00 */ - uint8_t sector : 6, /* [5:0] sector number 0-63 */ - cyl_high : 2; /* [7:6] cylinder [9:8] bits */ + uint8_t sector : 6; /* [5:0] sector number 0-63 */ + uint8_t cyl_high : 2; /* [7:6] cylinder [9:8] bits */ uint8_t cyl_low; /* [7:0] cylinder [7:0] bits */ @@ -202,7 +202,7 @@ typedef struct { /* The (configured) Drive Parameters. */ #pragma pack(push, 1) -typedef struct { +typedef struct dprm_t { uint8_t cyl_high; /* (MSB) number of cylinders */ uint8_t cyl_low; /* (LSB) number of cylinders */ uint8_t heads; /* number of heads per cylinder */ @@ -215,24 +215,24 @@ typedef struct { #pragma pack(pop) /* Define an attached drive. */ -typedef struct { - int8_t id, /* drive ID on bus */ - present, /* drive is present */ - hdd_num, /* index to global disk table */ - type; /* drive type ID */ +typedef struct drive_t { + int8_t id; /* drive ID on bus */ + int8_t present; /* drive is present */ + int8_t hdd_num; /* index to global disk table */ + int8_t type; /* drive type ID */ uint16_t cur_cyl; /* last known position of heads */ - uint8_t spt, /* active drive parameters */ - hpc; + uint8_t spt; /* active drive parameters */ + uint8_t hpc; uint16_t tracks; - uint8_t cfg_spt, /* configured drive parameters */ - cfg_hpc; + uint8_t cfg_spt; /* configured drive parameters */ + uint8_t cfg_hpc; uint16_t cfg_tracks; } drive_t; -typedef struct { +typedef struct hdc_t { const char *name; /* controller name */ uint16_t base; /* controller base I/O address */ @@ -252,17 +252,17 @@ typedef struct { pc_timer_t timer; /* Data transfer. */ - int16_t buf_idx, /* buffer index and pointer */ - buf_len; + int16_t buf_idx; /* buffer index and pointer */ + int16_t buf_len; uint8_t *buf_ptr; /* Current operation parameters. */ - dcb_t dcb; /* device control block */ - uint16_t track; /* requested track# */ - uint8_t head, /* requested head# */ - sector, /* requested sector# */ - comp; /* operation completion byte */ - int count; /* requested sector count */ + dcb_t dcb; /* device control block */ + uint16_t track; /* requested track# */ + uint8_t head; /* requested head# */ + uint8_t sector; /* requested sector# */ + uint8_t comp; /* operation completion byte */ + int count; /* requested sector count */ drive_t drives[XTA_NUM]; /* the attached drive(s) */ @@ -436,6 +436,9 @@ do_fmt: /* This saves us a LOT of code. */ goto do_fmt; + + default: + break; } /* De-activate the status icon. */ @@ -497,6 +500,10 @@ hdc_callback(void *priv) case STATE_SDONE: set_intr(dev); + break; + + default: + break; } break; @@ -606,6 +613,9 @@ do_send: /* This saves us a LOT of code. */ dev->state = STATE_SEND; goto do_send; + + default: + break; } break; @@ -710,6 +720,9 @@ do_recv: /* This saves us a LOT of code. */ dev->state = STATE_RECV; goto do_recv; + + default: + break; } break; @@ -758,6 +771,9 @@ do_recv: dev->status &= ~STAT_REQ; set_intr(dev); break; + + default: + break; } break; @@ -802,6 +818,9 @@ do_recv: dev->data, dev->buf_len); set_intr(dev); break; + + default: + break; } break; @@ -815,6 +834,9 @@ do_recv: case STATE_RDONE: set_intr(dev); break; + + default: + break; } break; @@ -834,6 +856,9 @@ do_recv: case STATE_RDONE: set_intr(dev); break; + + default: + break; } break; @@ -847,6 +872,9 @@ do_recv: case STATE_RDONE: set_intr(dev); break; + + default: + break; } break; @@ -900,6 +928,9 @@ hdc_read(uint16_t port, void *priv) case 2: /* "read option jumpers" */ ret = 0xff; /* all switches off */ break; + + default: + break; } return ret; @@ -958,9 +989,14 @@ hdc_write(uint16_t port, uint8_t val, void *priv) break; case 3: /* DMA/IRQ intr register */ - // xta_log("%s: WriteMASK(%02X)\n", dev->name, val); +#if 0 + xta_log("%s: WriteMASK(%02X)\n", dev->name, val); +#endif dev->intr = val; break; + + default: + break; } } @@ -998,12 +1034,16 @@ xta_init(const device_t *info) dev->irq = 5; dev->dma = 3; break; + + default: + break; } xta_log("%s: initializing (I/O=%04X, IRQ=%d, DMA=%d", dev->name, dev->base, dev->irq, dev->dma); if (dev->rom_addr != 0x000000) xta_log(", BIOS=%06X", dev->rom_addr); + xta_log(")\n"); /* Load any disks for this device class. */ diff --git a/src/disk/hdc_xtide.c b/src/disk/hdc_xtide.c index d1baba8be..91bf5a2e3 100644 --- a/src/disk/hdc_xtide.c +++ b/src/disk/hdc_xtide.c @@ -43,6 +43,7 @@ #include <86box/device.h> #include <86box/hdc.h> #include <86box/hdc_ide.h> +#include <86box/plat_unused.h> #define ROM_PATH_XT "roms/hdd/xtide/ide_xt.bin" #define ROM_PATH_XTP "roms/hdd/xtide/ide_xtp.bin" @@ -51,7 +52,7 @@ #define ROM_PATH_PS2AT "roms/hdd/xtide/ide_at_1_1_5.bin" #define ROM_PATH_AT_386 "roms/hdd/xtide/ide_386.bin" -typedef struct { +typedef struct xtide_t { void *ide_board; uint8_t data_high; rom_t bios_rom; @@ -84,6 +85,9 @@ xtide_write(uint16_t port, uint8_t val, void *priv) case 0xe: ide_write_devctl(0x0, val, xtide->ide_board); return; + + default: + break; } } @@ -193,7 +197,7 @@ xtide_at_386_available(void) } static void * -xtide_acculogic_init(const device_t *info) +xtide_acculogic_init(UNUSED(const device_t *info)) { xtide_t *xtide = malloc(sizeof(xtide_t)); @@ -228,7 +232,7 @@ xtide_close(void *priv) } static void * -xtide_at_ps2_init(const device_t *info) +xtide_at_ps2_init(UNUSED(const device_t *info)) { xtide_t *xtide = malloc(sizeof(xtide_t)); diff --git a/src/disk/hdd.c b/src/disk/hdd.c index 6135c31d8..a4b8a6f73 100644 --- a/src/disk/hdd.c +++ b/src/disk/hdd.c @@ -102,13 +102,13 @@ no_cdrom: } char * -hdd_bus_to_string(int bus, int cdrom) +hdd_bus_to_string(int bus, UNUSED(int cdrom)) { char *s = "none"; switch (bus) { - case HDD_BUS_DISABLED: default: + case HDD_BUS_DISABLED: break; case HDD_BUS_MFM: @@ -165,7 +165,7 @@ hdd_seek_get_time(hard_disk_t *hdd, uint32_t dst_addr, uint8_t operation, uint8_ fatal("hdd_seek_get_time(): hdd->num_zones < 0)\n"); return 0.0; } - for (int i = 0; i < hdd->num_zones; i++) { + for (uint32_t i = 0; i < hdd->num_zones; i++) { zone = &hdd->zones[i]; if (zone->end_sector >= dst_addr) break; diff --git a/src/disk/hdd_image.c b/src/disk/hdd_image.c index 856fc382c..4d3e354f2 100644 --- a/src/disk/hdd_image.c +++ b/src/disk/hdd_image.c @@ -40,12 +40,12 @@ #define HDD_IMAGE_HDX 2 #define HDD_IMAGE_VHD 3 -typedef struct -{ +typedef struct hdd_image_t { FILE *file; /* Used for HDD_IMAGE_RAW, HDD_IMAGE_HDI, and HDD_IMAGE_HDX. */ MVHDMeta *vhd; /* Used for HDD_IMAGE_VHD. */ uint32_t base; - uint32_t pos, last_sector; + uint32_t pos; + uint32_t last_sector; uint8_t type; /* HDD_IMAGE_RAW, HDD_IMAGE_HDI, HDD_IMAGE_HDX, or HDD_IMAGE_VHD */ uint8_t loaded; } hdd_image_t; @@ -637,7 +637,7 @@ hdd_image_get_type(uint8_t id) } void -hdd_image_unload(uint8_t id, int fn_preserve) +hdd_image_unload(uint8_t id, UNUSED(int fn_preserve)) { if (strlen(hdd[id].fn) == 0) return; diff --git a/src/disk/mo.c b/src/disk/mo.c index 5a76d4394..d7dbba895 100644 --- a/src/disk/mo.c +++ b/src/disk/mo.c @@ -498,6 +498,9 @@ mo_atapi_phase_to_scsi(mo_t *dev) return 1; case 3: return 7; + + default: + break; } } else { if ((dev->phase & 3) == 3) @@ -569,6 +572,9 @@ mo_mode_sense_read(mo_t *dev, uint8_t page_control, uint8_t page, uint8_t pos) else return mo_mode_sense_pages_default.pages[page][pos]; break; + + default: + break; } return 0; @@ -793,7 +799,7 @@ mo_data_command_finish(mo_t *dev, int len, int block_len, int alloc_len, int dir } static void -mo_sense_clear(mo_t *dev, int command) +mo_sense_clear(mo_t *dev, UNUSED(int command)) { mo_sense_key = mo_asc = mo_ascq = 0; } @@ -938,7 +944,7 @@ mo_invalid_field_pl(mo_t *dev) } static int -mo_blocks(mo_t *dev, int32_t *len, int first_batch, int out) +mo_blocks(mo_t *dev, int32_t *len, UNUSED(int first_batch), int out) { *len = 0; @@ -1179,7 +1185,9 @@ mo_pre_execution_check(mo_t *dev, uint8_t *cdb) static void mo_seek(mo_t *dev, uint32_t pos) { - /* mo_log("MO %i: Seek %08X\n", dev->id, pos); */ +#if 0 + mo_log("MO %i: Seek %08X\n", dev->id, pos); +#endif dev->sector_pos = pos; } @@ -1417,6 +1425,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb) dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); mo_log("MO %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, dev->sector_pos); break; + + default: + break; } if (!dev->sector_len) { @@ -1510,6 +1521,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb) dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); break; + + default: + break; } if ((dev->sector_pos >= dev->drv->medium_size) /* || @@ -1635,6 +1649,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb) case 3: /* Load the disk (close tray). */ mo_reload(dev->id); break; + + default: + break; } mo_command_complete(dev); @@ -1687,7 +1704,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb) dev->buffer[1] = 0x80; /*Removable*/ dev->buffer[2] = (dev->drv->bus_type == MO_BUS_SCSI) ? 0x02 : 0x00; /*SCSI-2 compliant*/ dev->buffer[3] = (dev->drv->bus_type == MO_BUS_SCSI) ? 0x02 : 0x21; - // dev->buffer[4] = 31; +#if 0 + dev->buffer[4] = 31; +#endif dev->buffer[4] = 0; if (dev->drv->bus_type == MO_BUS_SCSI) { dev->buffer[6] = 1; /* 16-bit transfers supported */ @@ -1740,6 +1759,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb) case GPCMD_SEEK_10: pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; break; + + default: + break; } mo_seek(dev, pos); mo_command_complete(dev); @@ -1778,6 +1800,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb) case GPCMD_ERASE_12: dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); break; + + default: + break; } /*Erase all remaining sectors*/ @@ -1800,6 +1825,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb) case GPCMD_ERASE_12: dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); break; + + default: + break; } dev->sector_pos += previous_pos; @@ -1830,7 +1858,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb) break; } - /* mo_log("MO %i: Phase: %02X, request length: %i\n", dev->id, dev->phase, dev->request_length); */ +#if 0 + mo_log("MO %i: Phase: %02X, request length: %i\n", dev->id, dev->phase, dev->request_length); +#endif if (mo_atapi_phase_to_scsi(dev) == SCSI_PHASE_STATUS) mo_buf_free(dev); @@ -1952,6 +1982,9 @@ mo_phase_data_out(scsi_common_t *sc) return 0; } break; + + default: + break; } mo_command_stop((scsi_common_t *) dev); diff --git a/src/disk/zip.c b/src/disk/zip.c index 62b8f0fe1..648182cc3 100644 --- a/src/disk/zip.c +++ b/src/disk/zip.c @@ -643,6 +643,9 @@ zip_atapi_phase_to_scsi(zip_t *dev) return 1; case 3: return 7; + + default: + break; } } else { if ((dev->phase & 3) == 3) @@ -713,13 +716,11 @@ zip_mode_sense_read(zip_t *dev, uint8_t page_control, uint8_t page, uint8_t pos) if (dev->drv->is_250 && (page == 5) && (pos == 9) && (dev->drv->medium_size == ZIP_SECTORS)) return 0x60; return dev->ms_pages_saved.pages[page][pos]; - break; case 1: if (dev->drv->is_250) return zip_250_mode_sense_pages_changeable.pages[page][pos]; else return zip_mode_sense_pages_changeable.pages[page][pos]; - break; case 2: if (dev->drv->is_250) { if ((page == 5) && (pos == 9) && (dev->drv->medium_size == ZIP_SECTORS)) @@ -734,6 +735,8 @@ zip_mode_sense_read(zip_t *dev, uint8_t page_control, uint8_t page, uint8_t pos) else return zip_mode_sense_pages_default.pages[page][pos]; } + + default: break; } @@ -962,7 +965,7 @@ zip_data_command_finish(zip_t *dev, int len, int block_len, int alloc_len, int d } static void -zip_sense_clear(zip_t *dev, int command) +zip_sense_clear(zip_t *dev, UNUSED(int command)) { zip_sense_key = zip_asc = zip_ascq = 0; } @@ -1116,7 +1119,7 @@ zip_data_phase_error(zip_t *dev) } static int -zip_blocks(zip_t *dev, int32_t *len, int first_batch, int out) +zip_blocks(zip_t *dev, int32_t *len, UNUSED(int first_batch), int out) { *len = 0; @@ -1251,7 +1254,9 @@ zip_pre_execution_check(zip_t *dev, uint8_t *cdb) static void zip_seek(zip_t *dev, uint32_t pos) { - /* zip_log("ZIP %i: Seek %08X\n", dev->id, pos); */ +#if 0 + zip_log("ZIP %i: Seek %08X\n", dev->id, pos); +#endif dev->sector_pos = pos; } @@ -1513,6 +1518,9 @@ zip_command(scsi_common_t *sc, uint8_t *cdb) dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); break; + + default: + break; } if (!dev->sector_len) { @@ -1597,6 +1605,9 @@ zip_command(scsi_common_t *sc, uint8_t *cdb) dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]); dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]); break; + + default: + break; } if ((dev->sector_pos >= dev->drv->medium_size) /* || @@ -1768,11 +1779,16 @@ zip_command(scsi_common_t *sc, uint8_t *cdb) case 1: /* Start the disc and read the TOC. */ break; case 2: /* Eject the disc if possible. */ - /* zip_eject(dev->id); */ +#if 0 + zip_eject(dev->id); +#endif break; case 3: /* Load the disc (close tray). */ zip_reload(dev->id); break; + + default: + break; } zip_command_complete(dev); @@ -1850,7 +1866,9 @@ zip_command(scsi_common_t *sc, uint8_t *cdb) dev->buffer[1] = 0x80; /*Removable*/ dev->buffer[2] = (dev->drv->bus_type == ZIP_BUS_SCSI) ? 0x02 : 0x00; /*SCSI-2 compliant*/ dev->buffer[3] = (dev->drv->bus_type == ZIP_BUS_SCSI) ? 0x02 : 0x21; - // dev->buffer[4] = 31; +#if 0 + dev->buffer[4] = 31; +#endif dev->buffer[4] = 0; if (dev->drv->bus_type == ZIP_BUS_SCSI) { dev->buffer[6] = 1; /* 16-bit transfers supported */ @@ -1907,6 +1925,9 @@ atapi_out: case GPCMD_SEEK_10: pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5]; break; + + default: + break; } zip_seek(dev, pos); zip_command_complete(dev); @@ -2010,7 +2031,9 @@ atapi_out: break; } - /* zip_log("ZIP %i: Phase: %02X, request length: %i\n", dev->id, dev->phase, dev->request_length); */ +#if 0 + zip_log("ZIP %i: Phase: %02X, request length: %i\n", dev->id, dev->phase, dev->request_length); +#endif if (zip_atapi_phase_to_scsi(dev) == SCSI_PHASE_STATUS) zip_buf_free(dev); @@ -2171,6 +2194,9 @@ zip_phase_data_out(scsi_common_t *sc) return 0; } break; + + default: + break; } zip_command_stop((scsi_common_t *) dev); diff --git a/src/dma.c b/src/dma.c index 710ea0abf..9dc984125 100644 --- a/src/dma.c +++ b/src/dma.c @@ -31,6 +31,7 @@ #include <86box/io.h> #include <86box/pic.h> #include <86box/dma.h> +#include <86box/plat_unused.h> dma_t dma[8]; uint8_t dma_e; @@ -50,9 +51,9 @@ static uint16_t dma_sg_base; static uint16_t dma16_buffer[65536]; static uint32_t dma_mask; -static struct { - int xfr_command, - xfr_channel; +static struct dma_ps2_t { + int xfr_command; + int xfr_channel; int byte_ptr; int is_ps2; @@ -228,6 +229,9 @@ dma_sg_write(uint16_t port, uint8_t val, void *priv) dev->ptr = (dev->ptr & 0x00fffffc) | (val << 24); dev->ptr %= (mem_size * 1024); break; + + default: + break; } } @@ -258,6 +262,9 @@ dma_sg_writew(uint16_t port, uint16_t val, void *priv) dev->ptr = (dev->ptr & 0x0000fffc) | (val << 16); dev->ptr %= (mem_size * 1024); break; + + default: + break; } } @@ -284,6 +291,9 @@ dma_sg_writel(uint16_t port, uint32_t val, void *priv) dev->ptr %= (mem_size * 1024); dev->ptr0 = val & 0xff; break; + + default: + break; } } @@ -325,6 +335,9 @@ dma_sg_read(uint16_t port, void *priv) case 0x23: ret = dev->ptr >> 24; break; + + default: + break; } dma_log("DMA S/G BYTE read : %04X %02X\n", port, ret); @@ -356,6 +369,9 @@ dma_sg_readw(uint16_t port, void *priv) case 0x22: ret = dev->ptr >> 16; break; + + default: + break; } dma_log("DMA S/G WORD read : %04X %04X\n", port, ret); @@ -384,6 +400,9 @@ dma_sg_readl(uint16_t port, void *priv) case 0x20: ret = dev->ptr0 | (dev->ptr & 0xffffff00); break; + + default: + break; } dma_log("DMA S/G DWORD read : %04X %08X\n", port, ret); @@ -392,7 +411,7 @@ dma_sg_readl(uint16_t port, void *priv) } static void -dma_ext_mode_write(uint16_t addr, uint8_t val, void *priv) +dma_ext_mode_write(uint16_t addr, uint8_t val, UNUSED(void *priv)) { int channel = (val & 0x03); @@ -416,11 +435,14 @@ dma_ext_mode_write(uint16_t addr, uint8_t val, void *priv) case 0x03: dma[channel].transfer_mode = 0x0102; break; + + default: + break; } } static uint8_t -dma_sg_int_status_read(uint16_t addr, void *priv) +dma_sg_int_status_read(UNUSED(uint16_t addr), UNUSED(void *priv)) { uint8_t ret = 0x00; @@ -433,7 +455,7 @@ dma_sg_int_status_read(uint16_t addr, void *priv) } static uint8_t -dma_read(uint16_t addr, void *priv) +dma_read(uint16_t addr, UNUSED(void *priv)) { int channel = (addr >> 1) & 3; uint8_t temp; @@ -468,13 +490,16 @@ dma_read(uint16_t addr, void *priv) case 0xd: /*Temporary register*/ return 0; + + default: + break; } return (dmaregs[0][addr & 0xf]); } static void -dma_write(uint16_t addr, uint8_t val, void *priv) +dma_write(uint16_t addr, uint8_t val, UNUSED(void *priv)) { int channel = (addr >> 1) & 3; @@ -562,11 +587,14 @@ dma_write(uint16_t addr, uint8_t val, void *priv) case 0xf: /*Mask write*/ dma_m = (dma_m & 0xf0) | (val & 0xf); return; + + default: + break; } } static uint8_t -dma_ps2_read(uint16_t addr, void *priv) +dma_ps2_read(uint16_t addr, UNUSED(void *priv)) { dma_t *dma_c = &dma[dma_ps2.xfr_channel]; uint8_t temp = 0xff; @@ -589,6 +617,9 @@ dma_ps2_read(uint16_t addr, void *priv) temp = (dma_c->ac >> 16) & 0xff; dma_ps2.byte_ptr = 0; break; + + default: + break; } break; @@ -626,12 +657,15 @@ dma_ps2_read(uint16_t addr, void *priv) fatal("Bad XFR Read command %i channel %i\n", dma_ps2.xfr_command, dma_ps2.xfr_channel); } break; + + default: + break; } return temp; } static void -dma_ps2_write(uint16_t addr, uint8_t val, void *priv) +dma_ps2_write(uint16_t addr, uint8_t val, UNUSED(void *priv)) { dma_t *dma_c = &dma[dma_ps2.xfr_channel]; uint8_t mode; @@ -654,6 +688,9 @@ dma_ps2_write(uint16_t addr, uint8_t val, void *priv) if (!(dma_m & (1 << dma_ps2.xfr_channel))) dma_ps2_run(dma_ps2.xfr_channel); break; + + default: + break; } break; @@ -683,6 +720,9 @@ dma_ps2_write(uint16_t addr, uint8_t val, void *priv) dma_c->ac = (dma_c->ac & 0x00ffff) | (val << 16); dma_ps2.byte_ptr = 0; break; + + default: + break; } dma_c->ab = dma_c->ac; break; @@ -719,11 +759,14 @@ dma_ps2_write(uint16_t addr, uint8_t val, void *priv) fatal("Bad XFR command %i channel %i val %02x\n", dma_ps2.xfr_command, dma_ps2.xfr_channel, val); } break; + + default: + break; } } static uint8_t -dma16_read(uint16_t addr, void *priv) +dma16_read(uint16_t addr, UNUSED(void *priv)) { int channel = ((addr >> 2) & 3) + 4; uint8_t temp; @@ -760,13 +803,16 @@ dma16_read(uint16_t addr, void *priv) temp |= dma_stat >> 4; dma_stat &= ~0xf0; return temp; + + default: + break; } return (dmaregs[1][addr & 0xf]); } static void -dma16_write(uint16_t addr, uint8_t val, void *priv) +dma16_write(uint16_t addr, uint8_t val, UNUSED(void *priv)) { int channel = ((addr >> 2) & 3) + 4; addr >>= 1; @@ -855,6 +901,9 @@ dma16_write(uint16_t addr, uint8_t val, void *priv) case 0xf: /*Mask write*/ dma_m = (dma_m & 0x0f) | ((val & 0xf) << 4); return; + + default: + break; } } @@ -864,7 +913,7 @@ dma16_write(uint16_t addr, uint8_t val, void *priv) } static void -dma_page_write(uint16_t addr, uint8_t val, void *priv) +dma_page_write(uint16_t addr, uint8_t val, UNUSED(void *priv)) { uint8_t convert[8] = CHANNELS; @@ -897,7 +946,7 @@ dma_page_write(uint16_t addr, uint8_t val, void *priv) } static uint8_t -dma_page_read(uint16_t addr, void *priv) +dma_page_read(uint16_t addr, UNUSED(void *priv)) { uint8_t convert[8] = CHANNELS; uint8_t ret = 0xff; @@ -917,7 +966,7 @@ dma_page_read(uint16_t addr, void *priv) } static void -dma_high_page_write(uint16_t addr, uint8_t val, void *priv) +dma_high_page_write(uint16_t addr, uint8_t val, UNUSED(void *priv)) { uint8_t convert[8] = CHANNELS; @@ -937,7 +986,7 @@ dma_high_page_write(uint16_t addr, uint8_t val, void *priv) } static uint8_t -dma_high_page_read(uint16_t addr, void *priv) +dma_high_page_read(uint16_t addr, UNUSED(void *priv)) { uint8_t convert[8] = CHANNELS; uint8_t ret = 0xff; diff --git a/src/floppy/fdc.c b/src/floppy/fdc.c index c3bdf293a..99767d857 100644 --- a/src/floppy/fdc.c +++ b/src/floppy/fdc.c @@ -36,6 +36,7 @@ #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/fdc_ext.h> +#include <86box/plat_unused.h> extern uint64_t motoron[FDD_NUM]; @@ -94,7 +95,7 @@ fdc_log(const char *fmt, ...) # define fdc_log(fmt, ...) #endif -/* +#if 0 const device_t fdc_none_device = { .name = "None", .internal_name = "none", @@ -108,7 +109,7 @@ const device_t fdc_none_device = { .force_redraw = NULL, .config = NULL }; -*/ +#endif const device_t fdc_internal_device = { .name = "Internal", @@ -130,7 +131,9 @@ typedef const struct { static fdc_cards_t fdc_cards[] = { // clang-format off -// { &fdc_none_device }, +#if 0 + { &fdc_none_device }, +#endif { &fdc_internal_device }, { &fdc_b215_device }, { &fdc_pii151b_device }, @@ -200,9 +203,9 @@ fdc_get_current_drive(void) } void -fdc_ctrl_reset(void *p) +fdc_ctrl_reset(void *priv) { - fdc_t *fdc = (fdc_t *) p; + fdc_t *fdc = (fdc_t *) priv; fdc->stat = 0x80; fdc->pnum = fdc->ptot = 0; @@ -224,8 +227,8 @@ int fdc_get_compare_condition(fdc_t *fdc) { switch (fdc->interrupt) { - case 0x11: default: + case 0x11: return 0; case 0x19: return 1; @@ -514,6 +517,9 @@ fdc_update_rate(fdc_t *fdc, int drive) case 2: fdc->bit_rate = 2000; break; + + default: + break; } break; case 2: /*Double density*/ @@ -522,6 +528,9 @@ fdc_update_rate(fdc_t *fdc, int drive) case 3: /*Extended density*/ fdc->bit_rate = 1000; break; + + default: + break; } fdc->bitcell_period = (1000000 / fdc->bit_rate) * 2; /*Bitcell period in ns*/ @@ -541,8 +550,9 @@ fdc_get_bit_rate(fdc_t *fdc) return 2; case 1000: return 3; + default: - return 2; + break; } return 2; } @@ -563,6 +573,9 @@ fdc_get_densel(fdc_t *fdc, int drive) return 0; case 2: return 1; + + default: + break; } } @@ -572,6 +585,9 @@ fdc_get_densel(fdc_t *fdc, int drive) return 1; case 3: return 0; + + default: + break; } } else { switch (fdc->densel_force) { @@ -579,6 +595,9 @@ fdc_get_densel(fdc_t *fdc, int drive) return 0; case 1: return 1; + + default: + break; } } @@ -589,6 +608,9 @@ fdc_get_densel(fdc_t *fdc, int drive) case 1: case 2: return fdc->densel_polarity ? 0 : 1; + + default: + break; } return 0; @@ -598,7 +620,9 @@ static void fdc_rate(fdc_t *fdc, int drive) { fdc_update_rate(fdc, drive); - // fdc_log("FDD %c: Setting rate: %i, %i, %i (%i, %i)\n", 0x41 + drive, fdc->drvrate[drive], fdc->rate, fdc_get_densel(fdc, drive), fdc->rwc[drive], fdc->densel_force); +#if 0 + fdc_log("FDD %c: Setting rate: %i, %i, %i (%i, %i)\n", 0x41 + drive, fdc->drvrate[drive], fdc->rate, fdc_get_densel(fdc, drive), fdc->rwc[drive], fdc->densel_force); +#endif fdc_log("FDD %c: [%i] Setting rate: %i, %i, %i (%i, %i, %i)\n", 0x41 + drive, fdc->enh_mode, fdc->drvrate[drive], fdc->rate, fdc_get_densel(fdc, drive), fdc->rwc[drive], fdc->densel_force, fdc->densel_polarity); fdd_set_densel(fdc_get_densel(fdc, drive)); fdc_log("FDD %c: [%i] Densel: %i\n", 0x41 + drive, fdc->enh_mode, fdc_get_densel(fdc, drive)); @@ -1136,7 +1160,9 @@ fdc_write(uint16_t addr, uint8_t val, void *priv) fdc->stat = (1 << fdc->drive); if (!(fdc->flags & FDC_FLAG_PCJR)) fdc->stat |= 0x80; - /* fdc->head = (fdc->params[0] & 4) ? 1 : 0; */ +#if 0 + fdc->head = (fdc->params[0] & 4) ? 1 : 0; +#endif fdc->head = 0; /* TODO: See if this is correct. */ fdc->st0 = fdc->params[0] & 0x03; fdc->st0 |= (fdc->params[0] & 4); @@ -1223,6 +1249,9 @@ fdc_write(uint16_t addr, uint8_t val, void *priv) fdc->perp |= (fdc->params[0] & 0x03); } return; + + default: + break; } } else fdc->stat = 0x90 | (fdc->stat & 0xf); @@ -1235,6 +1264,9 @@ fdc_write(uint16_t addr, uint8_t val, void *priv) if (fdc->flags & FDC_FLAG_PS1) fdc->noprec = !!(val & 0x04); return; + + default: + break; } } @@ -1293,6 +1325,9 @@ fdc_read(uint16_t addr, void *priv) case 3: ret |= 0x61; break; + + default: + break; } } else { if (is486 || !fdc->enable_3f1) @@ -1677,6 +1712,9 @@ fdc_callback(void *priv) fdc->stat = 0x90; } break; + + default: + break; } fdc->inread = 1; return; @@ -1780,6 +1818,9 @@ fdc_callback(void *priv) fdc->paramstogo = 1; fdc->interrupt = 0; return; + + default: + break; } } @@ -2113,7 +2154,7 @@ fdc_getdata(fdc_t *fdc, int last) } void -fdc_sectorid(fdc_t *fdc, uint8_t track, uint8_t side, uint8_t sector, uint8_t size, uint8_t crc1, uint8_t crc2) +fdc_sectorid(fdc_t *fdc, uint8_t track, uint8_t side, uint8_t sector, uint8_t size, UNUSED(uint8_t crc1), UNUSED(uint8_t crc2)) { fdc_int(fdc, 1); fdc->stat = 0xD0; diff --git a/src/floppy/fdc_magitronic.c b/src/floppy/fdc_magitronic.c index d71721d7b..084ce8c81 100644 --- a/src/floppy/fdc_magitronic.c +++ b/src/floppy/fdc_magitronic.c @@ -29,19 +29,19 @@ #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/fdc_ext.h> +#include <86box/plat_unused.h> #define ROM_B215 "roms/floppy/magitronic/Magitronic B215 - BIOS ROM.bin" #define ROM_ADDR (uint32_t)(device_get_config_hex20("bios_addr") & 0x000fffff) #define DRIVE_SELECT (int) (real_drive(dev->fdc_controller, i)) -typedef struct -{ +typedef struct b215_t { fdc_t *fdc_controller; rom_t rom; } b215_t; static uint8_t -b215_read(uint16_t addr, void *priv) +b215_read(UNUSED(uint16_t addr), void *priv) { b215_t *dev = (b215_t *) priv; @@ -58,7 +58,7 @@ b215_read(uint16_t addr, void *priv) */ int drive_spec[2]; - for (int i = 0; i <= 1; i++) { + for (uint8_t i = 0; i <= 1; i++) { if (fdd_is_525(DRIVE_SELECT)) { if (!fdd_is_dd(DRIVE_SELECT)) drive_spec[i] = 1; @@ -88,7 +88,7 @@ b215_close(void *priv) } static void * -b215_init(const device_t *info) +b215_init(UNUSED(const device_t *info)) { b215_t *dev = (b215_t *) malloc(sizeof(b215_t)); memset(dev, 0, sizeof(b215_t)); diff --git a/src/floppy/fdc_monster.c b/src/floppy/fdc_monster.c index 00a9d968a..1629ac1c4 100644 --- a/src/floppy/fdc_monster.c +++ b/src/floppy/fdc_monster.c @@ -32,12 +32,12 @@ #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/fdc_ext.h> +#include <86box/plat_unused.h> #define BIOS_ADDR (uint32_t)(device_get_config_hex20("bios_addr") & 0x000fffff) #define ROM_MONSTER_FDC "roms/floppy/monster-fdc/floppy_bios.bin" -typedef struct -{ +typedef struct monster_fdc_t { rom_t bios_rom; fdc_t *fdc_pri; fdc_t *fdc_sec; @@ -52,7 +52,7 @@ monster_fdc_close(void *priv) } static void * -monster_fdc_init(const device_t *info) +monster_fdc_init(UNUSED(const device_t *info)) { monster_fdc_t *dev; diff --git a/src/floppy/fdc_pii15xb.c b/src/floppy/fdc_pii15xb.c index be471face..5fd38d250 100644 --- a/src/floppy/fdc_pii15xb.c +++ b/src/floppy/fdc_pii15xb.c @@ -80,8 +80,7 @@ MiniMicro 4 also won't work with the XT FDC which the Zilog claims to be. #define ROM_PII_151B "roms/floppy/dtk/pii-151b.rom" #define ROM_PII_158B "roms/floppy/dtk/pii-158b.rom" -typedef struct -{ +typedef struct pii_t { rom_t bios_rom; } pii_t; diff --git a/src/floppy/fdd_86f.c b/src/floppy/fdd_86f.c index f0bf6b7f7..f2c0ffbbc 100644 --- a/src/floppy/fdd_86f.c +++ b/src/floppy/fdd_86f.c @@ -125,32 +125,38 @@ enum { FMT_POSTTRK_GAP4 }; -typedef struct { +typedef struct sliding_buffer_t { uint8_t buffer[10]; uint32_t pos; uint32_t len; } sliding_buffer_t; -typedef struct { +typedef struct find_t { uint32_t bits_obtained; uint16_t bytes_obtained; uint16_t sync_marks; uint32_t sync_pos; } find_t; -typedef struct { +typedef struct split_byte_t { unsigned nibble0 : 4; unsigned nibble1 : 4; } split_byte_t; -typedef union { +typedef union decoded_t { uint8_t byte; split_byte_t nibbles; } decoded_t; -typedef struct { - uint8_t c, h, r, n; - uint8_t flags, pad, pad0, pad1; +typedef struct sector_t { + uint8_t c; + uint8_t h; + uint8_t r; + uint8_t n; + uint8_t flags; + uint8_t pad; + uint8_t pad0; + uint8_t pad1; void *prev; } sector_t; @@ -173,11 +179,18 @@ typedef struct { * If bits 6, 5 are 0, and bit 7 is 1, the extra bitcell count * specifies the entire bitcell count */ -typedef struct { +typedef struct d86f_t { FILE *f; - uint8_t state, fill, sector_count, format_state, - error_condition, id_found; - uint16_t version, disk_flags, satisfying_bytes, turbo_pos; + uint8_t state; + uint8_t fill; + uint8_t sector_count; + uint8_t format_state; + uint8_t error_condition; + uint8_t id_found; + uint16_t version; + uint16_t disk_flags; + uint16_t satisfying_bytes; + uint16_t turbo_pos; uint16_t cur_track; uint16_t track_encoded_data[2][53048]; uint16_t *track_surface_data[2]; @@ -191,9 +204,13 @@ typedef struct { #ifdef D86F_COMPRESS int is_compressed; #endif - int32_t extra_bit_cells[2]; - uint32_t file_size, index_count, track_pos, datac, - id_pos, dma_over; + int32_t extra_bit_cells[2]; + uint32_t file_size; + uint32_t index_count; + uint32_t track_pos; + uint32_t datac; + uint32_t id_pos; + uint32_t dma_over; uint32_t index_hole_pos[2]; uint32_t track_offset[512]; sector_id_t last_sector; @@ -203,7 +220,8 @@ typedef struct { crc_t calc_crc; crc_t track_crc; char original_file_name[2048]; - uint8_t *filebuf, *outbuf; + uint8_t *filebuf; + uint8_t *outbuf; sector_t *last_side_sector[2]; } d86f_t; @@ -351,43 +369,43 @@ d86f_index_hole_pos(int drive, int side) } uint32_t -null_index_hole_pos(int drive, int side) +null_index_hole_pos(UNUSED(int drive), UNUSED(int side)) { return 0; } uint16_t -null_disk_flags(int drive) +null_disk_flags(UNUSED(int drive)) { return 0x09; } uint16_t -null_side_flags(int drive) +null_side_flags(UNUSED(int drive)) { return 0x0A; } void -null_writeback(int drive) +null_writeback(UNUSED(int drive)) { return; } void -null_set_sector(int drive, int side, uint8_t c, uint8_t h, uint8_t r, uint8_t n) +null_set_sector(UNUSED(int drive), UNUSED(int side), UNUSED(uint8_t c), UNUSED(uint8_t h), UNUSED(uint8_t r), UNUSED(uint8_t n)) { return; } void -null_write_data(int drive, int side, uint16_t pos, uint8_t data) +null_write_data(UNUSED(int drive), UNUSED(int side), UNUSED(uint16_t pos), UNUSED(uint8_t data)) { return; } int -null_format_conditions(int drive) +null_format_conditions(UNUSED(int drive)) { return 0; } @@ -401,7 +419,7 @@ d86f_extra_bit_cells(int drive, int side) } int32_t -null_extra_bit_cells(int drive, int side) +null_extra_bit_cells(UNUSED(int drive), UNUSED(int side)) { return 0; } @@ -415,7 +433,7 @@ common_encoded_data(int drive, int side) } void -common_read_revolution(int drive) +common_read_revolution(UNUSED(int drive)) { return; } @@ -619,9 +637,9 @@ d86f_get_array_size(int drive, int side, int words) array_size = 0; else switch (hole) { + default: case 0: case 1: - default: array_size = 12500; switch (rm) { case 1: @@ -812,7 +830,7 @@ d86f_has_extra_bit_cells(int drive) } uint32_t -d86f_header_size(int drive) +d86f_header_size(UNUSED(int drive)) { return 8; } @@ -884,15 +902,14 @@ d86f_wrong_densel(int drive) is_3mode = 1; switch (d86f_hole(drive)) { - case 0: default: + case 0: if (fdd_is_dd(drive)) return 0; if (fdd_get_densel(drive)) return 1; else return 0; - break; case 1: if (fdd_is_dd(drive)) @@ -905,7 +922,6 @@ d86f_wrong_densel(int drive) else return 1; } - break; case 2: if (fdd_is_dd(drive) || !fdd_is_ed(drive)) @@ -914,7 +930,6 @@ d86f_wrong_densel(int drive) return 0; else return 1; - break; } } @@ -965,6 +980,9 @@ d86f_encode_byte(int drive, int sync, decoded_t b, decoded_t prev_b) case 0xfc: return result | d86f_encode_get_clock(0x01); + + default: + break; } } else { switch (b.byte) { @@ -975,6 +993,9 @@ d86f_encode_byte(int drive, int sync, decoded_t b, decoded_t prev_b) case 0xfc: return result | d86f_encode_get_clock(0xd7); + + default: + break; } } } @@ -1022,6 +1043,9 @@ d86f_get_bitcell_period(int drive) case 5: rate = 2000.0; break; + + default: + break; } if (!mfm) @@ -1176,7 +1200,7 @@ d86f_put_bit(int drive, int side, int bit) } static uint8_t -decodefm(int drive, uint16_t dat) +decodefm(UNUSED(int drive), uint16_t dat) { uint8_t temp = 0; @@ -1524,6 +1548,9 @@ d86f_compare_byte(int drive, uint8_t received_byte, uint8_t disk_byte) if ((received_byte >= disk_byte) || (received_byte == 0xFF)) dev->satisfying_bytes++; break; + + default: + break; } } @@ -1832,7 +1859,7 @@ endian_swap(uint16_t word) } void -d86f_format_finish(int drive, int side, int mfm, uint16_t sc, uint16_t gap_fill, int do_write) +d86f_format_finish(int drive, int side, int mfm, UNUSED(uint16_t sc), uint16_t gap_fill, int do_write) { d86f_t *dev = d86f[drive]; @@ -1853,7 +1880,7 @@ d86f_format_finish(int drive, int side, int mfm, uint16_t sc, uint16_t gap_fill, } void -d86f_format_turbo_finish(int drive, int side, int do_write) +d86f_format_turbo_finish(int drive, UNUSED(int side), int do_write) { d86f_t *dev = d86f[drive]; @@ -2053,13 +2080,14 @@ d86f_format_track(int drive, int side, int do_write) /* Sector within allotted amount, change state to SECTOR_ID_SYNC. */ dev->format_state = FMT_SECTOR_ID_SYNC; fdc_request_next_sector_id(d86f_fdc); - break; } else { dev->format_state = FMT_POSTTRK_GAP4; dev->sector_count = 0; - break; } break; + + default: + break; } } } @@ -2904,8 +2932,8 @@ d86f_read_track(int drive, int track, int thin_track, int side, uint16_t *da, ui } else { if (!thin_track) { switch ((dev->disk_flags >> 1) & 3) { - case 0: default: + case 0: dev->side_flags[side] = 0x0A; break; @@ -3156,7 +3184,7 @@ d86f_stop(int drive) } int -d86f_common_command(int drive, int sector, int track, int side, int rate, int sector_size) +d86f_common_command(int drive, int sector, int track, int side, UNUSED(int rate), int sector_size) { d86f_t *dev = d86f[drive]; @@ -3240,7 +3268,7 @@ d86f_comparesector(int drive, int sector, int track, int side, int rate, int sec } void -d86f_readaddress(int drive, int side, int rate) +d86f_readaddress(int drive, UNUSED(int side), UNUSED(int rate)) { d86f_t *dev = d86f[drive]; @@ -3290,7 +3318,7 @@ d86f_add_track(int drive, int track, int side) } void -d86f_common_format(int drive, int side, int rate, uint8_t fill, int proxy) +d86f_common_format(int drive, int side, UNUSED(int rate), uint8_t fill, int proxy) { d86f_t *dev = d86f[drive]; uint16_t temp; @@ -3735,8 +3763,8 @@ d86f_load(int drive, char *fn) } } else { switch ((dev->disk_flags >> 1) >> 3) { - case 0: default: + case 0: dev->side_flags[1] = 0x0a; break; diff --git a/src/floppy/fdd_common.c b/src/floppy/fdd_common.c index 78434a2ad..d0659d990 100644 --- a/src/floppy/fdd_common.c +++ b/src/floppy/fdd_common.c @@ -359,7 +359,7 @@ fdd_get_gap3_size(int rate, int size, int sector) uint8_t fdd_sector_size_code(int size) { - int ret = 2; + uint8_t ret = 2; switch (size) { case 128: diff --git a/src/floppy/fdd_imd.c b/src/floppy/fdd_imd.c index c03481db3..211b18373 100644 --- a/src/floppy/fdd_imd.c +++ b/src/floppy/fdd_imd.c @@ -51,7 +51,8 @@ typedef struct { FILE *f; char *buffer; uint32_t start_offs; - int track_count, sides; + int track_count; + int sides; int track; uint16_t disk_flags; int track_width; @@ -895,7 +896,9 @@ imd_load(int drive, char *fn) if (dev->sides == 2) dev->disk_flags |= 8; - /* imd_log("%i tracks, %i sides\n", dev->track_count, dev->sides); */ +#if 0 + imd_log("%i tracks, %i sides\n", dev->track_count, dev->sides); +#endif /* Attach this format to the D86F engine. */ d86f_handler[drive].disk_flags = disk_flags; diff --git a/src/floppy/fdd_img.c b/src/floppy/fdd_img.c index d9ffaf92d..589f04292 100644 --- a/src/floppy/fdd_img.c +++ b/src/floppy/fdd_img.c @@ -450,7 +450,7 @@ side_flags(int drive) } static void -set_sector(int drive, int side, uint8_t c, uint8_t h, uint8_t r, uint8_t n) +set_sector(int drive, UNUSED(int side), UNUSED(uint8_t c), uint8_t h, uint8_t r, UNUSED(uint8_t n)) { img_t *dev = img[drive]; @@ -459,7 +459,7 @@ set_sector(int drive, int side, uint8_t c, uint8_t h, uint8_t r, uint8_t n) } static uint8_t -poll_read_data(int drive, int side, uint16_t pos) +poll_read_data(int drive, UNUSED(int side), uint16_t pos) { img_t *dev = img[drive]; @@ -467,7 +467,7 @@ poll_read_data(int drive, int side, uint16_t pos) } static void -poll_write_data(int drive, int side, uint16_t pos, uint8_t data) +poll_write_data(int drive, UNUSED(int side), uint16_t pos, uint8_t data) { img_t *dev = img[drive]; @@ -1031,9 +1031,6 @@ jump_if_fdf: } else if (size <= (320 * 1024)) { dev->sectors = 8; dev->tracks = 40; - } else if (size <= (320 * 1024)) { - dev->sectors = 8; - dev->tracks = 40; } else if (size <= (360 * 1024)) { /*DD 360K*/ dev->sectors = 9; dev->tracks = 40; diff --git a/src/floppy/fdd_json.c b/src/floppy/fdd_json.c index 4b8fafb23..1b70d8fc8 100644 --- a/src/floppy/fdd_json.c +++ b/src/floppy/fdd_json.c @@ -63,25 +63,25 @@ #define NSECTORS 256 typedef struct { - uint8_t track, /* ID: track number */ - side, /* side number */ - sector; /* sector number 1.. */ - uint16_t size; /* encoded size of sector */ - uint8_t *data; /* allocated data for it */ + uint8_t track; /* ID: track number */ + uint8_t side; /* side number */ + uint8_t sector; /* sector number 1.. */ + uint16_t size; /* encoded size of sector */ + uint8_t *data; /* allocated data for it */ } sector_t; typedef struct { FILE *f; /* Geometry. */ - uint8_t tracks, /* number of tracks */ - sides, /* number of sides */ - sectors, /* number of sectors per track */ - spt[NTRACKS][NSIDES]; /* number of sectors per track */ + uint8_t tracks; /* number of tracks */ + uint8_t sides; /* number of sides */ + uint8_t sectors; /* number of sectors per track */ + uint8_t spt[NTRACKS][NSIDES]; /* number of sectors per track */ - uint8_t track, /* current track */ - side, /* current side */ - sector[NSIDES]; /* current sector */ + uint8_t track; /* current track */ + uint8_t side; /* current side */ + uint8_t sector[NSIDES]; /* current sector */ uint8_t dmf; /* disk is DMF format */ uint8_t interleave; @@ -92,8 +92,8 @@ typedef struct { uint8_t gap3_len; int track_width; - uint16_t disk_flags, /* flags for the entire disk */ - track_flags; /* flags for the current track */ + uint16_t disk_flags; /* flags for the entire disk */ + uint16_t track_flags; /* flags for the current track */ uint8_t interleave_ordered[NTRACKS][NSIDES]; diff --git a/src/floppy/fdd_mfm.c b/src/floppy/fdd_mfm.c index 55c549150..5719c3672 100644 --- a/src/floppy/fdd_mfm.c +++ b/src/floppy/fdd_mfm.c @@ -69,11 +69,14 @@ typedef struct { mfm_track_t *tracks; mfm_adv_track_t *adv_tracks; - uint16_t disk_flags, pad; + uint16_t disk_flags; + uint16_t pad; uint16_t side_flags[2]; - int br_rounded, rpm_rounded, - total_tracks, cur_track; + int br_rounded; + int rpm_rounded; + int total_tracks; + int cur_track; uint8_t track_data[2][256 * 1024]; } mfm_t; @@ -170,14 +173,14 @@ set_disk_flags(int drive) } switch (br) { - case 500: - temp_disk_flags |= 2; + default: + case 250: + case 300: + temp_disk_flags |= 0; break; - case 300: - case 250: - default: - temp_disk_flags |= 0; + case 500: + temp_disk_flags |= 2; break; case 1000: @@ -285,8 +288,8 @@ get_raw_size(int drive, int side) if (track_index == -1) { mfm_log("MFM: Unable to find track (%i, %i)\n", dev->cur_track, side); switch (br) { - case 250: default: + case 250: return is_300_rpm ? 100000 : 83333; case 300: return is_300_rpm ? 120000 : 100000; diff --git a/src/floppy/fdd_td0.c b/src/floppy/fdd_td0.c index 56f594c0b..87856b904 100644 --- a/src/floppy/fdd_td0.c +++ b/src/floppy/fdd_td0.c @@ -61,12 +61,15 @@ /* reaches to this value */ typedef struct { - uint16_t r, - bufcnt, bufndx, bufpos, /* string buffer */ - /* the following to allow block reads - from input in next_word() */ - ibufcnt, ibufndx; /* input buffer counters */ - uint8_t inbuf[BUFSZ]; /* input buffer */ + uint16_t r; + uint16_t bufcnt; /* string buffer */ + uint16_t bufndx; /* string buffer */ + uint16_t bufpos; /* string buffer */ + /* the following to allow block reads + from input in next_word() */ + uint16_t ibufcnt; /* input buffer counters */ + uint16_t ibufndx; /* input buffer counters */ + uint8_t inbuf[BUFSZ]; /* input buffer */ } tdlzhuf; typedef struct { @@ -364,7 +367,7 @@ state_reconst(td0dsk_t *state) for (i = 0, j = N_CHAR; j < T; i += 2, j++) { k = i + 1; f = state->freq[j] = state->freq[i] + state->freq[k]; - for (k = j - 1; f < state->freq[k]; k--) { }; + for (k = j - 1; f < state->freq[k]; k--) { } k++; l = (j - k) * 2; @@ -405,7 +408,7 @@ state_update(td0dsk_t *state, int c) /* swap nodes to keep the tree freq-ordered */ if (k > state->freq[l = c + 1]) { - while (k > state->freq[++l]) { }; + while (k > state->freq[++l]) { } l--; state->freq[c] = state->freq[l]; state->freq[l] = k; diff --git a/src/floppy/fdi2raw.c b/src/floppy/fdi2raw.c index 0be984d8a..7210c89b2 100644 --- a/src/floppy/fdi2raw.c +++ b/src/floppy/fdi2raw.c @@ -30,15 +30,11 @@ #include #include -/* IF UAE */ -/*#include "sysconfig.h" -#include "sysdeps.h" -#include "zfile.h"*/ -/* ELSE */ #define xmalloc malloc #define HAVE_STDARG_H #include <86box/86box.h> #include +#include <86box/plat_unused.h> #undef DEBUG #define VERBOSE @@ -69,7 +65,8 @@ datalog(uint8_t *src, int len) { static char buf[1000]; static int offset; - int i = 0, offset2; + int i = 0; + int offset2; offset2 = offset; buf[offset++] = '\''; @@ -360,7 +357,7 @@ decode_raw_track(FDI *fdi) /* unknown track */ static void -zxx(FDI *fdi) +zxx(UNUSED(FDI *fdi)) { fdi2raw_log("track %d: unknown track type 0x%02.2X\n", fdi->current_track, fdi->track_type); } @@ -373,7 +370,7 @@ static void zyy (FDI *fdi) #endif /* empty track */ static void -track_empty(FDI *fdi) +track_empty(UNUSED(FDI *fdi)) { return; } @@ -647,8 +644,9 @@ s0d(FDI *fdi) /* ***** */ /* just for testing integrity of Amiga sectors */ - -/*static void rotateonebit (uint8_t *start, uint8_t *end, int shift) +#if 0 +static void +rotateonebit (uint8_t *start, uint8_t *end, int shift) { if (shift == 0) return; @@ -657,9 +655,10 @@ s0d(FDI *fdi) start[0] |= start[1] >> (8 - shift); start++; } -}*/ +} -/*static uint16_t getmfmword (uint8_t *mbuf) +static uint16_t +getmfmword (uint8_t *mbuf) { uint32_t v; @@ -670,13 +669,15 @@ s0d(FDI *fdi) v |= mbuf[2]; v >>= check_offset; return (uint16_t)v; -}*/ +} #define MFMMASK 0x55555555 -/*static uint32_t getmfmlong (uint8_t * mbuf) +static uint32_t +getmfmlong (uint8_t * mbuf) { return ((getmfmword (mbuf) << 16) | getmfmword (mbuf + 2)) & MFMMASK; -}*/ +} +#endif #if 0 static int amiga_check_track (FDI *fdi) @@ -1237,7 +1238,7 @@ s1d(FDI *fdi) /* end marker */ static void -sff(FDI *fdi) +sff(UNUSED(FDI *fdi)) { } @@ -1493,7 +1494,7 @@ fdi_decompress(int pulses, uint8_t *sizep, uint8_t *src, int *dofree) } static void -dumpstream(int track, uint8_t *stream, int len) +dumpstream(UNUSED(int track), UNUSED(uint8_t *stream), UNUSED(int len)) { #if 0 char name[100]; @@ -1713,7 +1714,9 @@ fdi2_decode(FDI *fdi, uint32_t totalavg, uint32_t *avgp, uint32_t *minp, uint32_ /* calculates the current average bitrate from previous decoded data */ uint32_t avg_size = (uint32_t) ((total << (2 + mfm)) / totaldiv); /* this is the new average size for one MFM bit */ - /* uint32_t avg_size = (uint32_t)((((float)total)*((float)(mfm+1))*4.0) / ((float)totaldiv)); */ +#if 0 + uint32_t avg_size = (uint32_t)((((float)total)*((float)(mfm+1))*4.0) / ((float)totaldiv)); +#endif /* you can try tighter ranges than 25%, or wider ranges. I would probably go for tighter... */ if ((avg_size < (standard_MFM_8_bit_cell_size - (pulse_limitval * standard_MFM_8_bit_cell_size / 100))) || (avg_size > (standard_MFM_8_bit_cell_size + (pulse_limitval * standard_MFM_8_bit_cell_size / 100)))) { avg_size = standard_MFM_8_bit_cell_size; @@ -2056,8 +2059,10 @@ decode_lowlevel_track(FDI *fdi, int track, struct fdi_cache *cache) idxp[i] = sum; } len = totalavg / 100000; - /* fdi2raw_log("totalavg=%u index=%d (%d) maxidx=%d weakbits=%d len=%d\n", - totalavg, indexoffset, maxidx, weakbits, len); */ +#if 0 + fdi2raw_log("totalavg=%u index=%d (%d) maxidx=%d weakbits=%d len=%d\n", + totalavg, indexoffset, maxidx, weakbits, len); +#endif cache->avgp = avgp; cache->idxp = idxp; cache->minp = minp; @@ -2239,8 +2244,10 @@ fdi2raw_loadrevolution_2(FDI *fdi, uint16_t *mfmbuf, uint16_t *tracktiming, int fdi2_decode(fdi, cache->totalavg, cache->avgp, cache->minp, cache->maxp, cache->idxp, cache->maxidx, &idx, cache->pulses, mfm); - /* fdi2raw_log("track %d: nbits=%d avg len=%.2f weakbits=%d idx=%d\n", - track, bitoffset, (double)cache->totalavg / bitoffset, cache->weakbits, cache->indexoffset); */ +#if 0 + fdi2raw_log("track %d: nbits=%d avg len=%.2f weakbits=%d idx=%d\n", + track, bitoffset, (double)cache->totalavg / bitoffset, cache->weakbits, cache->indexoffset); +#endif len = fdi->out; if (cache->weakbits >= 10 && multirev) *multirev = 1; @@ -2298,8 +2305,10 @@ fdi2raw_loadtrack(FDI *fdi, uint16_t *mfmbuf, uint16_t *tracktiming, int track, else fdi->bit_rate = 250; - /* fdi2raw_log("track %d: srclen: %d track_type: %02.2X, bitrate: %d\n", - fdi->current_track, fdi->track_src_len, fdi->track_type, fdi->bit_rate); */ +#if 0 + fdi2raw_log("track %d: srclen: %d track_type: %02.2X, bitrate: %d\n", + fdi->current_track, fdi->track_src_len, fdi->track_type, fdi->bit_rate); +#endif if ((fdi->track_type & 0xc0) == 0x80) { diff --git a/src/game/gameport.c b/src/game/gameport.c index 110b884ec..413a1ff5a 100644 --- a/src/game/gameport.c +++ b/src/game/gameport.c @@ -35,8 +35,9 @@ #include <86box/joystick_standard.h> #include <86box/joystick_sw_pad.h> #include <86box/joystick_tm_fcs.h> +#include <86box/plat_unused.h> -typedef struct { +typedef struct g_axis_t { pc_timer_t timer; int axis_nr; struct _joystick_instance_ *joystick; @@ -115,9 +116,10 @@ static uint8_t gameport_pnp_rom[] = { }; static const isapnp_device_config_t gameport_pnp_defaults[] = { {.activate = 1, - .io = { - { .base = 0x200 }, - }} + .io = { + { .base = 0x200 }, + } + } }; const device_t *standalone_gameport_type; @@ -214,7 +216,7 @@ gameport_time(joystick_instance_t *joystick, int nr, int axis) } static void -gameport_write(uint16_t addr, uint8_t val, void *priv) +gameport_write(UNUSED(uint16_t addr), UNUSED(uint8_t val), void *priv) { gameport_t *dev = (gameport_t *) priv; joystick_instance_t *joystick = dev->joystick; @@ -238,7 +240,7 @@ gameport_write(uint16_t addr, uint8_t val, void *priv) } static uint8_t -gameport_read(uint16_t addr, void *priv) +gameport_read(UNUSED(uint16_t addr), void *priv) { gameport_t *dev = (gameport_t *) priv; joystick_instance_t *joystick = dev->joystick; @@ -400,7 +402,7 @@ gameport_init(const device_t *info) } static void * -tmacm_init(const device_t *info) +tmacm_init(UNUSED(const device_t *info)) { uint16_t port = 0x0000; gameport_t *dev = NULL; diff --git a/src/game/joystick_ch_flightstick_pro.c b/src/game/joystick_ch_flightstick_pro.c index f5785d6f4..49ce824bc 100644 --- a/src/game/joystick_ch_flightstick_pro.c +++ b/src/game/joystick_ch_flightstick_pro.c @@ -44,6 +44,7 @@ #include <86box/timer.h> #include <86box/gameport.h> #include <86box/joystick_standard.h> +#include <86box/plat_unused.h> static void * ch_flightstick_pro_init(void) @@ -52,12 +53,13 @@ ch_flightstick_pro_init(void) } static void -ch_flightstick_pro_close(void *p) +ch_flightstick_pro_close(UNUSED(void *priv)) { + // } static uint8_t -ch_flightstick_pro_read(void *p) +ch_flightstick_pro_read(UNUSED(void *priv)) { uint8_t ret = 0xf0; @@ -86,12 +88,13 @@ ch_flightstick_pro_read(void *p) } static void -ch_flightstick_pro_write(void *p) +ch_flightstick_pro_write(UNUSED(void *priv)) { + // } static int -ch_flightstick_pro_read_axis(void *p, int axis) +ch_flightstick_pro_read_axis(UNUSED(void *priv), int axis) { if (!JOYSTICK_PRESENT(0)) return AXIS_NOT_PRESENT; @@ -111,8 +114,9 @@ ch_flightstick_pro_read_axis(void *p, int axis) } static void -ch_flightstick_pro_a0_over(void *p) +ch_flightstick_pro_a0_over(UNUSED(void *priv)) { + // } const joystick_if_t joystick_ch_flightstick_pro = { diff --git a/src/game/joystick_standard.c b/src/game/joystick_standard.c index 55a28acee..b9c449f99 100644 --- a/src/game/joystick_standard.c +++ b/src/game/joystick_standard.c @@ -44,6 +44,7 @@ #include <86box/timer.h> #include <86box/gameport.h> #include <86box/joystick_standard.h> +#include <86box/plat_unused.h> static void * joystick_standard_init(void) @@ -52,12 +53,13 @@ joystick_standard_init(void) } static void -joystick_standard_close(void *p) +joystick_standard_close(UNUSED(void *priv)) { + // } static uint8_t -joystick_standard_read(void *p) +joystick_standard_read(UNUSED(void *priv)) { uint8_t ret = 0xf0; @@ -78,7 +80,7 @@ joystick_standard_read(void *p) } static uint8_t -joystick_standard_read_4button(void *p) +joystick_standard_read_4button(UNUSED(void *priv)) { uint8_t ret = 0xf0; @@ -97,12 +99,13 @@ joystick_standard_read_4button(void *p) } static void -joystick_standard_write(void *p) +joystick_standard_write(UNUSED(void *priv)) { + // } static int -joystick_standard_read_axis(void *p, int axis) +joystick_standard_read_axis(UNUSED(void *priv), int axis) { switch (axis) { case 0: @@ -127,7 +130,7 @@ joystick_standard_read_axis(void *p, int axis) } static int -joystick_standard_read_axis_4button(void *p, int axis) +joystick_standard_read_axis_4button(UNUSED(void *priv), int axis) { if (!JOYSTICK_PRESENT(0)) return AXIS_NOT_PRESENT; @@ -147,7 +150,7 @@ joystick_standard_read_axis_4button(void *p, int axis) } static int -joystick_standard_read_axis_3axis(void *p, int axis) +joystick_standard_read_axis_3axis(UNUSED(void *priv), int axis) { if (!JOYSTICK_PRESENT(0)) return AXIS_NOT_PRESENT; @@ -167,7 +170,7 @@ joystick_standard_read_axis_3axis(void *p, int axis) } static int -joystick_standard_read_axis_4axis(void *p, int axis) +joystick_standard_read_axis_4axis(UNUSED(void *priv), int axis) { if (!JOYSTICK_PRESENT(0)) return AXIS_NOT_PRESENT; @@ -187,7 +190,7 @@ joystick_standard_read_axis_4axis(void *p, int axis) } static int -joystick_standard_read_axis_6button(void *p, int axis) +joystick_standard_read_axis_6button(UNUSED(void *priv), int axis) { if (!JOYSTICK_PRESENT(0)) return AXIS_NOT_PRESENT; @@ -206,7 +209,7 @@ joystick_standard_read_axis_6button(void *p, int axis) } } static int -joystick_standard_read_axis_8button(void *p, int axis) +joystick_standard_read_axis_8button(UNUSED(void *priv), int axis) { if (!JOYSTICK_PRESENT(0)) return AXIS_NOT_PRESENT; @@ -234,8 +237,9 @@ joystick_standard_read_axis_8button(void *p, int axis) } static void -joystick_standard_a0_over(void *p) +joystick_standard_a0_over(UNUSED(void *priv)) { + // } const joystick_if_t joystick_2axis_2button = { diff --git a/src/game/joystick_sw_pad.c b/src/game/joystick_sw_pad.c index 9f3fd492c..5c91ee1e9 100644 --- a/src/game/joystick_sw_pad.c +++ b/src/game/joystick_sw_pad.c @@ -65,9 +65,9 @@ #include <86box/timer.h> #include <86box/gameport.h> #include <86box/joystick_sw_pad.h> +#include <86box/plat_unused.h> -typedef struct -{ +typedef struct sw_data { pc_timer_t poll_timer; int poll_left; int poll_clock; @@ -79,9 +79,9 @@ typedef struct } sw_data; static void -sw_timer_over(void *p) +sw_timer_over(void *priv) { - sw_data *sw = (sw_data *) p; + sw_data *sw = (sw_data *) priv; sw->poll_clock = !sw->poll_clock; @@ -99,9 +99,9 @@ sw_timer_over(void *p) } static void -sw_trigger_timer_over(void *p) +sw_trigger_timer_over(void *priv) { - sw_data *sw = (sw_data *) p; + sw_data *sw = (sw_data *) priv; timer_disable(&sw->trigger_timer); } @@ -132,17 +132,17 @@ sw_init(void) } static void -sw_close(void *p) +sw_close(void *priv) { - sw_data *sw = (sw_data *) p; + sw_data *sw = (sw_data *) priv; free(sw); } static uint8_t -sw_read(void *p) +sw_read(void *priv) { - sw_data *sw = (sw_data *) p; + sw_data *sw = (sw_data *) priv; uint8_t temp = 0; if (!JOYSTICK_PRESENT(0)) @@ -166,9 +166,9 @@ sw_read(void *p) } static void -sw_write(void *p) +sw_write(void *priv) { - sw_data *sw = (sw_data *) p; + sw_data *sw = (sw_data *) priv; int64_t time_since_last = timer_get_remaining_us(&sw->trigger_timer); if (!JOYSTICK_PRESENT(0)) @@ -234,7 +234,7 @@ sw_write(void *p) } static int -sw_read_axis(void *p, int axis) +sw_read_axis(UNUSED(void *priv), UNUSED(int axis)) { if (!JOYSTICK_PRESENT(0)) return AXIS_NOT_PRESENT; @@ -243,9 +243,9 @@ sw_read_axis(void *p, int axis) } static void -sw_a0_over(void *p) +sw_a0_over(void *priv) { - sw_data *sw = (sw_data *) p; + sw_data *sw = (sw_data *) priv; timer_set_delay_u64(&sw->trigger_timer, TIMER_USEC * 10000); } diff --git a/src/game/joystick_tm_fcs.c b/src/game/joystick_tm_fcs.c index 7bcb15742..d54d0e37d 100644 --- a/src/game/joystick_tm_fcs.c +++ b/src/game/joystick_tm_fcs.c @@ -44,6 +44,7 @@ #include <86box/timer.h> #include <86box/gameport.h> #include <86box/joystick_standard.h> +#include <86box/plat_unused.h> static void * tm_fcs_init(void) @@ -52,12 +53,13 @@ tm_fcs_init(void) } static void -tm_fcs_close(void *p) +tm_fcs_close(UNUSED(void *priv)) { + // } static uint8_t -tm_fcs_read(void *p) +tm_fcs_read(UNUSED(void *priv)) { uint8_t ret = 0xf0; @@ -76,12 +78,13 @@ tm_fcs_read(void *p) } static void -tm_fcs_write(void *p) +tm_fcs_write(UNUSED(void *priv)) { + // } static int -tm_fcs_read_axis(void *p, int axis) +tm_fcs_read_axis(UNUSED(void *priv), int axis) { if (!JOYSTICK_PRESENT(0)) return AXIS_NOT_PRESENT; @@ -111,8 +114,9 @@ tm_fcs_read_axis(void *p, int axis) } static void -tm_fcs_a0_over(void *p) +tm_fcs_a0_over(UNUSED(void *priv)) { + // } const joystick_if_t joystick_tm_fcs = { diff --git a/src/include/86box/86box.h b/src/include/86box/86box.h index 977d3db63..2f16c92d7 100644 --- a/src/include/86box/86box.h +++ b/src/include/86box/86box.h @@ -193,7 +193,7 @@ extern uint16_t get_last_addr(void); /* This is for external subtraction of cycles; should be in cpu.c but I put it here to avoid - having to include cpu.c everywhere. */ + having to include cpu.h everywhere. */ extern void sub_cycles(int c); extern void resub_cycles(int old_cycles); diff --git a/src/include/86box/acpi.h b/src/include/86box/acpi.h index 18f40d874..11be67278 100644 --- a/src/include/86box/acpi.h +++ b/src/include/86box/acpi.h @@ -59,46 +59,79 @@ extern "C" { #define VEN_VIA 0x01106 #define VEN_VIA_596B 0x11106 -typedef struct -{ - uint8_t acpitst, auxen, auxsts, plvl2, plvl3, - smicmd, gpio_dir, - gpio_val, muxcntrl, ali_soft_smi, - timer32, smireg, - gpireg[3], gporeg[4], - extiotrapsts, extiotrapen; - uint16_t pmsts, pmen, - pmcntrl, gpsts, gpsts1, - gpen, gpen1, gpscien, - gpcntrl, gplvl, gpmux, - gpsel, gpsmien, pscntrl, - gpscists; - int smi_lock, smi_active; - uint32_t pcntrl, p2cntrl, glbsts, - devsts, glben, - glbctl, devctl, - padsts, paden, - gptren, gptimer, - gpo_val, gpi_val, - extsmi_val, pad0; +typedef struct acpi_regs_t { + uint8_t acpitst; + uint8_t auxen; + uint8_t auxsts; + uint8_t plvl2; + uint8_t plvl3; + uint8_t smicmd; + uint8_t gpio_dir; + uint8_t gpio_val; + uint8_t muxcntrl; + uint8_t ali_soft_smi; + uint8_t timer32; + uint8_t smireg; + uint8_t gpireg[3]; + uint8_t gporeg[4]; + uint8_t extiotrapsts; + uint8_t extiotrapen; + uint16_t pmsts; + uint16_t pmen; + uint16_t pmcntrl; + uint16_t gpsts; + uint16_t gpsts1; + uint16_t gpen; + uint16_t gpen1; + uint16_t gpscien; + uint16_t gpcntrl; + uint16_t gplvl; + uint16_t gpmux; + uint16_t gpsel; + uint16_t gpsmien; + uint16_t pscntrl; + uint16_t gpscists; + int smi_lock; + int smi_active; + uint32_t pcntrl; + uint32_t p2cntrl; + uint32_t glbsts; + uint32_t devsts; + uint32_t glben; + uint32_t glbctl; + uint32_t devctl; + uint32_t padsts; + uint32_t paden; + uint32_t gptren; + uint32_t gptimer; + uint32_t gpo_val; + uint32_t gpi_val; + uint32_t extsmi_val; + uint32_t pad0; } acpi_regs_t; -typedef struct -{ +typedef struct acpi_t { acpi_regs_t regs; - uint8_t gpireg2_default, pad[3], - gporeg_default[4], - suspend_types[8]; - uint16_t io_base, aux_io_base; - int vendor, - slot, irq_mode, - irq_pin, irq_line, - mirq_is_level; - pc_timer_t timer, resume_timer, pwrbtn_timer; - nvr_t *nvr; - apm_t *apm; - void *i2c, - (*trap_update)(void *priv), *trap_priv; + uint8_t gpireg2_default; + uint8_t pad[3]; + uint8_t gporeg_default[4]; + uint8_t suspend_types[8]; + uint16_t io_base; + uint16_t aux_io_base; + int vendor; + int slot; + int irq_mode; + int irq_pin; + int irq_line; + int mirq_is_level; + pc_timer_t timer; + pc_timer_t resume_timer; + pc_timer_t pwrbtn_timer; + nvr_t *nvr; + apm_t *apm; + void *i2c; + void (*trap_update)(void *priv); + void *trap_priv; } acpi_t; /* Global variables. */ diff --git a/src/include/86box/agpgart.h b/src/include/86box/agpgart.h index d73e95e86..fc2976c88 100644 --- a/src/include/86box/agpgart.h +++ b/src/include/86box/agpgart.h @@ -20,7 +20,10 @@ typedef struct agpgart_s { int aperture_enable; - uint32_t aperture_base, aperture_size, aperture_mask, gart_base; + uint32_t aperture_base; + uint32_t aperture_size; + uint32_t aperture_mask; + uint32_t gart_base; mem_mapping_t aperture_mapping; } agpgart_t; diff --git a/src/include/86box/apm.h b/src/include/86box/apm.h index 854969f3d..2d5f0f117 100644 --- a/src/include/86box/apm.h +++ b/src/include/86box/apm.h @@ -21,10 +21,10 @@ extern "C" { #endif -typedef struct -{ - uint8_t cmd, - stat, do_smi; +typedef struct apm_t { + uint8_t cmd; + uint8_t stat; + uint8_t do_smi; } apm_t; /* Global variables. */ diff --git a/src/include/86box/cassette.h b/src/include/86box/cassette.h index 85e510225..3706ca632 100644 --- a/src/include/86box/cassette.h +++ b/src/include/86box/cassette.h @@ -24,7 +24,7 @@ #include -typedef struct { +typedef struct pc_cassette_t { char save; char pcm; diff --git a/src/include/86box/cdrom.h b/src/include/86box/cdrom.h index a32177b05..69b4e90f3 100644 --- a/src/include/86box/cdrom.h +++ b/src/include/86box/cdrom.h @@ -55,9 +55,9 @@ extern "C" { enum { CDROM_BUS_DISABLED = 0, CDROM_BUS_ATAPI = 5, - CDROM_BUS_SCSI, - CDROM_BUS_MITSUMI, - CDROM_BUS_USB + CDROM_BUS_SCSI = 6, + CDROM_BUS_MITSUMI = 7, + CDROM_BUS_USB = 8 }; #define KNOWN_CDROM_DRIVE_TYPES 35 @@ -65,71 +65,77 @@ enum { #define BUS_TYPE_IDE 1 #define BUS_TYPE_SCSI 2 -static const struct -{ - const char vendor[9]; - const char model[17]; - const char revision[5]; +static const struct { + const char vendor[9]; + const char model[17]; + const char revision[5]; const char *name; const char *internal_name; - const int bus_type; -} cdrom_drive_types[] = -{ - { "86BOX", "CD-ROM", "1.00", "(ATAPI/SCSI) 86BOX CD-ROM 1.00", "86BOX_CD-ROM_1.00", BUS_TYPE_ALL}, /*1*/ - { "AZT", "CDA46802I", "1.15", "(ATAPI) AZT CDA46802I 1.15", "AZT_CDA46802I_1.15", BUS_TYPE_IDE}, /*2*/ - { "BTC", "CD-ROM BCD36XH", "U1.0", "(ATAPI) BTC CD-ROM BCD36XH U1.0", "BTC_CD-ROM_BCD36XH_U1.0", BUS_TYPE_IDE}, /*3*/ - { "GOLDSTAR", "CRD-8160B", "3.14", "(ATAPI) GOLDSTAR CRD-8160B 3.14", "GOLDSTAR_CRD-8160B_3.14", BUS_TYPE_IDE}, /*4*/ - { "HITACHI", "CDR-8130", "0020", "(ATAPI) HITACHI CDR-8130 0020", "HITACHI_CDR-8130_0020", BUS_TYPE_IDE}, /*5*/ - { "KENWOOD", "CD-ROM UCR-421", "208E", "(ATAPI) KENWOOD CD-ROM UCR-421 208E", "KENWOOD_CD-ROM_UCR-421_208E", BUS_TYPE_IDE}, /*6*/ - { "MATSHITA", "CD-ROM CR-587", "7S13", "(ATAPI) MATSHITA CD-ROM CR-587 7S13", "MATSHITA_CD-ROM_CR-587_7S13", BUS_TYPE_IDE}, /*7*/ - { "MATSHITA", "CD-ROM CR-588", "LS15", "(ATAPI) MATSHITA CD-ROM CR-588 LS15", "MATSHITA_CD-ROM_CR-588_LS15", BUS_TYPE_IDE}, /*8*/ - { "MATSHITA", "CR-571", "1.0e", "(ATAPI) MATSHITA CR-571 1.0e", "MATSHITA_CR-571_1.0e", BUS_TYPE_IDE}, /*9*/ - { "MATSHITA", "CR-572", "1.0j", "(ATAPI) MATSHITA CR-572 1.0j", "MATSHITA_CR-572_1.0j", BUS_TYPE_IDE}, /*10*/ - { "MITSUMI", "CRMC-FX4820T", "D02A", "(ATAPI) MITSUMI CRMC-FX4820T D02A", "MITSUMI_CRMC-FX4820T_D02A", BUS_TYPE_IDE}, /*11*/ - { "NEC", "CD-ROM DRIVE:260", "1.00", "(ATAPI) NEC CD-ROM DRIVE:260 1.00", "NEC_CD-ROM_DRIVE260_1.00", BUS_TYPE_IDE}, /*12*/ - { "NEC", "CD-ROM DRIVE:260", "1.01", "(ATAPI) NEC CD-ROM DRIVE:260 1.01", "NEC_CD-ROM_DRIVE260_1.01", BUS_TYPE_IDE}, /*13*/ - { "NEC", "CD-ROM DRIVE:273", "4.20", "(ATAPI) NEC CD-ROM DRIVE:273 4.20", "NEC_CD-ROM_DRIVE273_4.20", BUS_TYPE_IDE}, /*14*/ - { "NEC", "CD-ROM DRIVE:280", "1.05", "(ATAPI) NEC CD-ROM DRIVE:280 1.05", "NEC_CD-ROM_DRIVE280_1.05", BUS_TYPE_IDE}, /*15*/ - { "NEC", "CD-ROM DRIVE:280", "3.08", "(ATAPI) NEC CD-ROM DRIVE:280 3.08", "NEC_CD-ROM_DRIVE280_3.08", BUS_TYPE_IDE}, /*16*/ - { "PHILIPS", "CD-ROM PCA403CD", "U31P", "(ATAPI) PHILIPS CD-ROM PCA403CD U31P", "PHILIPS_CD-ROM_PCA403CD_U31P", BUS_TYPE_IDE}, /*17*/ - { "SONY", "CD-ROM CDU76", "1.0i", "(ATAPI) SONY CD-ROM CDU76 1.0i", "SONY_CD-ROM_CDU76_1.0i", BUS_TYPE_IDE}, /*18*/ - { "SONY", "CD-ROM CDU311", "3.0h", "(ATAPI) SONY CD-ROM CDU311 3.0h", "SONY_CD-ROM_CDU311_3.0h", BUS_TYPE_IDE}, /*19*/ - { "TOSHIBA", "CD-ROM XM-5302TA", "0305", "(ATAPI) TOSHIBA CD-ROM XM-5302TA 0305", "TOSHIBA_CD-ROM_XM-5302TA_0305", BUS_TYPE_IDE}, /*20*/ - { "TOSHIBA", "CD-ROM XM-5702B", "TA70", "(ATAPI) TOSHIBA CD-ROM XM-5702B TA70", "TOSHIBA_CD-ROM_XM-5702B_TA70", BUS_TYPE_IDE}, /*21*/ - { "CHINON", "CD-ROM CDS-431", "H42 ", "(SCSI) CHINON CD-ROM CDS-431 H42", "CHINON_CD-ROM_CDS-431_H42", BUS_TYPE_SCSI}, /*22*/ - { "DEC", "RRD45 (C) DEC", "0436", "(SCSI) DEC RRD45 0436", "DEC_RRD45_0436", BUS_TYPE_SCSI}, /*23*/ - { "MATSHITA", "CD-ROM CR-501", "1.0b", "(SCSI) MATSHITA CD-ROM CR-501 1.0b", "MATSHITA_CD-ROM_CR-501_1.0b", BUS_TYPE_SCSI}, /*24*/ - { "NEC", "CD-ROM DRIVE:74", "1.00", "(SCSI) NEC CD-ROM DRIVE:74 1.00", "NEC_CD-ROM_DRIVE74_1.00", BUS_TYPE_SCSI}, /*25*/ - { "NEC", "CD-ROM DRIVE:464", "1.05", "(SCSI) NEC CD-ROM DRIVE:464 1.05", "NEC_CD-ROM_DRIVE464_1.05", BUS_TYPE_SCSI}, /*26*/ - { "SONY", "CD-ROM CDU-541", "1.0i", "(SCSI) SONY CD-ROM CDU-541 1.0i", "SONY_CD-ROM_CDU-541_1.0i", BUS_TYPE_SCSI}, /*27*/ - { "SONY", "CD-ROM CDU-76S", "1.00", "(SCSI) SONY CD-ROM CDU-76S 1.00", "SONY_CD-ROM_CDU-76S_1.00", BUS_TYPE_SCSI}, /*28*/ - { "PHILIPS", "CDD2600", "1.07", "(SCSI) PHILIPS CDD2600 1.07", "PHILIPS_CDD2600_1.07", BUS_TYPE_SCSI}, /*29*/ - { "PIONEER", "CD-ROM DRM-604X", "2403", "(SCSI) PIONEER CD-ROM DRM-604X 2403", "PIONEER_CD-ROM_DRM-604X_2403", BUS_TYPE_SCSI}, /*30*/ - { "PLEXTOR", "CD-ROM PX-32TS", "1.03", "(SCSI) PLEXTOR CD-ROM PX-32TS 1.03", "PLEXTOR_CD-ROM_PX-32TS_1.03", BUS_TYPE_SCSI}, /*31*/ - { "TEAC", "CD-R55S", "1.0R", "(SCSI) TEAC CD-R55S 1.0R", "TEAC_CD-R55S_1.0R", BUS_TYPE_SCSI}, /*32*/ - { "TOSHIBA", "CD-ROM DRIVE:XM", "3433", "(SCSI) TOSHIBA CD-ROM DRIVE:XM 3433", "TOSHIBA_CD-ROM_DRIVEXM_3433", BUS_TYPE_SCSI}, /*33*/ - { "TOSHIBA", "CD-ROM XM-3301TA", "0272", "(SCSI) TOSHIBA CD-ROM XM-3301TA 0272", "TOSHIBA_CD-ROM_XM-3301TA_0272", BUS_TYPE_SCSI}, /*34*/ - { "TOSHIBA", "CD-ROM XM-5701TA", "3136", "(SCSI) TOSHIBA CD-ROM XM-5701TA 3136", "TOSHIBA_CD-ROM_XM-5701TA_3136", BUS_TYPE_SCSI}, /*35*/ - { "", "", "", "", "", -1}, + const int bus_type; +} cdrom_drive_types[] = { + { "86BOX", "CD-ROM", "1.00", "(ATAPI/SCSI) 86BOX CD-ROM 1.00", "86BOX_CD-ROM_1.00", BUS_TYPE_ALL }, /*1*/ + { "AZT", "CDA46802I", "1.15", "(ATAPI) AZT CDA46802I 1.15", "AZT_CDA46802I_1.15", BUS_TYPE_IDE }, /*2*/ + { "BTC", "CD-ROM BCD36XH", "U1.0", "(ATAPI) BTC CD-ROM BCD36XH U1.0", "BTC_CD-ROM_BCD36XH_U1.0", BUS_TYPE_IDE }, /*3*/ + { "GOLDSTAR", "CRD-8160B", "3.14", "(ATAPI) GOLDSTAR CRD-8160B 3.14", "GOLDSTAR_CRD-8160B_3.14", BUS_TYPE_IDE }, /*4*/ + { "HITACHI", "CDR-8130", "0020", "(ATAPI) HITACHI CDR-8130 0020", "HITACHI_CDR-8130_0020", BUS_TYPE_IDE }, /*5*/ + { "KENWOOD", "CD-ROM UCR-421", "208E", "(ATAPI) KENWOOD CD-ROM UCR-421 208E", "KENWOOD_CD-ROM_UCR-421_208E", BUS_TYPE_IDE }, /*6*/ + { "MATSHITA", "CD-ROM CR-587", "7S13", "(ATAPI) MATSHITA CD-ROM CR-587 7S13", "MATSHITA_CD-ROM_CR-587_7S13", BUS_TYPE_IDE }, /*7*/ + { "MATSHITA", "CD-ROM CR-588", "LS15", "(ATAPI) MATSHITA CD-ROM CR-588 LS15", "MATSHITA_CD-ROM_CR-588_LS15", BUS_TYPE_IDE }, /*8*/ + { "MATSHITA", "CR-571", "1.0e", "(ATAPI) MATSHITA CR-571 1.0e", "MATSHITA_CR-571_1.0e", BUS_TYPE_IDE }, /*9*/ + { "MATSHITA", "CR-572", "1.0j", "(ATAPI) MATSHITA CR-572 1.0j", "MATSHITA_CR-572_1.0j", BUS_TYPE_IDE }, /*10*/ + { "MITSUMI", "CRMC-FX4820T", "D02A", "(ATAPI) MITSUMI CRMC-FX4820T D02A", "MITSUMI_CRMC-FX4820T_D02A", BUS_TYPE_IDE }, /*11*/ + { "NEC", "CD-ROM DRIVE:260", "1.00", "(ATAPI) NEC CD-ROM DRIVE:260 1.00", "NEC_CD-ROM_DRIVE260_1.00", BUS_TYPE_IDE }, /*12*/ + { "NEC", "CD-ROM DRIVE:260", "1.01", "(ATAPI) NEC CD-ROM DRIVE:260 1.01", "NEC_CD-ROM_DRIVE260_1.01", BUS_TYPE_IDE }, /*13*/ + { "NEC", "CD-ROM DRIVE:273", "4.20", "(ATAPI) NEC CD-ROM DRIVE:273 4.20", "NEC_CD-ROM_DRIVE273_4.20", BUS_TYPE_IDE }, /*14*/ + { "NEC", "CD-ROM DRIVE:280", "1.05", "(ATAPI) NEC CD-ROM DRIVE:280 1.05", "NEC_CD-ROM_DRIVE280_1.05", BUS_TYPE_IDE }, /*15*/ + { "NEC", "CD-ROM DRIVE:280", "3.08", "(ATAPI) NEC CD-ROM DRIVE:280 3.08", "NEC_CD-ROM_DRIVE280_3.08", BUS_TYPE_IDE }, /*16*/ + { "PHILIPS", "CD-ROM PCA403CD", "U31P", "(ATAPI) PHILIPS CD-ROM PCA403CD U31P", "PHILIPS_CD-ROM_PCA403CD_U31P", BUS_TYPE_IDE }, /*17*/ + { "SONY", "CD-ROM CDU76", "1.0i", "(ATAPI) SONY CD-ROM CDU76 1.0i", "SONY_CD-ROM_CDU76_1.0i", BUS_TYPE_IDE }, /*18*/ + { "SONY", "CD-ROM CDU311", "3.0h", "(ATAPI) SONY CD-ROM CDU311 3.0h", "SONY_CD-ROM_CDU311_3.0h", BUS_TYPE_IDE }, /*19*/ + { "TOSHIBA", "CD-ROM XM-5302TA", "0305", "(ATAPI) TOSHIBA CD-ROM XM-5302TA 0305", "TOSHIBA_CD-ROM_XM-5302TA_0305", BUS_TYPE_IDE }, /*20*/ + { "TOSHIBA", "CD-ROM XM-5702B", "TA70", "(ATAPI) TOSHIBA CD-ROM XM-5702B TA70", "TOSHIBA_CD-ROM_XM-5702B_TA70", BUS_TYPE_IDE }, /*21*/ + { "CHINON", "CD-ROM CDS-431", "H42 ", "(SCSI) CHINON CD-ROM CDS-431 H42", "CHINON_CD-ROM_CDS-431_H42", BUS_TYPE_SCSI }, /*22*/ + { "DEC", "RRD45 (C) DEC", "0436", "(SCSI) DEC RRD45 0436", "DEC_RRD45_0436", BUS_TYPE_SCSI }, /*23*/ + { "MATSHITA", "CD-ROM CR-501", "1.0b", "(SCSI) MATSHITA CD-ROM CR-501 1.0b", "MATSHITA_CD-ROM_CR-501_1.0b", BUS_TYPE_SCSI }, /*24*/ + { "NEC", "CD-ROM DRIVE:74", "1.00", "(SCSI) NEC CD-ROM DRIVE:74 1.00", "NEC_CD-ROM_DRIVE74_1.00", BUS_TYPE_SCSI }, /*25*/ + { "NEC", "CD-ROM DRIVE:464", "1.05", "(SCSI) NEC CD-ROM DRIVE:464 1.05", "NEC_CD-ROM_DRIVE464_1.05", BUS_TYPE_SCSI }, /*26*/ + { "SONY", "CD-ROM CDU-541", "1.0i", "(SCSI) SONY CD-ROM CDU-541 1.0i", "SONY_CD-ROM_CDU-541_1.0i", BUS_TYPE_SCSI }, /*27*/ + { "SONY", "CD-ROM CDU-76S", "1.00", "(SCSI) SONY CD-ROM CDU-76S 1.00", "SONY_CD-ROM_CDU-76S_1.00", BUS_TYPE_SCSI }, /*28*/ + { "PHILIPS", "CDD2600", "1.07", "(SCSI) PHILIPS CDD2600 1.07", "PHILIPS_CDD2600_1.07", BUS_TYPE_SCSI }, /*29*/ + { "PIONEER", "CD-ROM DRM-604X", "2403", "(SCSI) PIONEER CD-ROM DRM-604X 2403", "PIONEER_CD-ROM_DRM-604X_2403", BUS_TYPE_SCSI }, /*30*/ + { "PLEXTOR", "CD-ROM PX-32TS", "1.03", "(SCSI) PLEXTOR CD-ROM PX-32TS 1.03", "PLEXTOR_CD-ROM_PX-32TS_1.03", BUS_TYPE_SCSI }, /*31*/ + { "TEAC", "CD-R55S", "1.0R", "(SCSI) TEAC CD-R55S 1.0R", "TEAC_CD-R55S_1.0R", BUS_TYPE_SCSI }, /*32*/ + { "TOSHIBA", "CD-ROM DRIVE:XM", "3433", "(SCSI) TOSHIBA CD-ROM DRIVE:XM 3433", "TOSHIBA_CD-ROM_DRIVEXM_3433", BUS_TYPE_SCSI }, /*33*/ + { "TOSHIBA", "CD-ROM XM-3301TA", "0272", "(SCSI) TOSHIBA CD-ROM XM-3301TA 0272", "TOSHIBA_CD-ROM_XM-3301TA_0272", BUS_TYPE_SCSI }, /*34*/ + { "TOSHIBA", "CD-ROM XM-5701TA", "3136", "(SCSI) TOSHIBA CD-ROM XM-5701TA 3136", "TOSHIBA_CD-ROM_XM-5701TA_3136", BUS_TYPE_SCSI }, /*35*/ + { "", "", "", "", "", -1 }, }; /* To shut up the GCC compilers. */ struct cdrom; -typedef struct { - uint8_t attr, track, - index, - abs_m, abs_s, abs_f, - rel_m, rel_s, rel_f; +typedef struct subchannel_t { + uint8_t attr; + uint8_t track; + uint8_t index; + uint8_t abs_m; + uint8_t abs_s; + uint8_t abs_f; + uint8_t rel_m; + uint8_t rel_s; + uint8_t rel_f; } subchannel_t; -typedef struct { +typedef struct track_info_t { int number; - uint8_t attr, m, s, f; + uint8_t attr; + uint8_t m; + uint8_t s; + uint8_t f; } track_info_t; /* Define the various CD-ROM drive operations (ops). */ -typedef struct { +typedef struct cdrom_ops_t { void (*get_tracks)(struct cdrom *dev, int *first, int *last); void (*get_track_info)(struct cdrom *dev, uint32_t track, int end, track_info_t *ti); void (*get_subchannel)(struct cdrom *dev, uint32_t lba, subchannel_t *subc); @@ -144,32 +150,40 @@ typedef struct cdrom { uint8_t id; union { - uint8_t res, res0, /* Reserved for other ID's. */ - res1, - ide_channel, scsi_device_id; + uint8_t res; + uint8_t res0; /* Reserved for other ID's. */ + uint8_t res1; + uint8_t ide_channel; + uint8_t scsi_device_id; }; - uint8_t bus_type, /* 0 = ATAPI, 1 = SCSI */ - bus_mode, /* Bit 0 = PIO suported; - Bit 1 = DMA supportd. */ - cd_status, /* Struct variable reserved for - media status. */ - speed, cur_speed; + uint8_t bus_type; /* 0 = ATAPI, 1 = SCSI */ + uint8_t bus_mode; /* Bit 0 = PIO suported; + Bit 1 = DMA supportd. */ + uint8_t cd_status; /* Struct variable reserved for + media status. */ + uint8_t speed; + uint8_t cur_speed; int is_dir; void *priv; - char image_path[1024], - prev_image_path[1024]; + char image_path[1024]; + char prev_image_path[1024]; char *image_history[CD_IMAGE_HISTORY]; - uint32_t sound_on, cdrom_capacity, - seek_pos, - seek_diff, cd_end, type; + uint32_t sound_on; + uint32_t cdrom_capacity; + uint32_t seek_pos; + uint32_t seek_diff; + uint32_t cd_end; + uint32_t type; - int host_drive, prev_host_drive, - cd_buflen, audio_op; + int host_drive; + int prev_host_drive; + int cd_buflen; + int audio_op; const cdrom_ops_t *ops; diff --git a/src/include/86box/cdrom_image_backend.h b/src/include/86box/cdrom_image_backend.h index 511ca68eb..67129dc7c 100644 --- a/src/include/86box/cdrom_image_backend.h +++ b/src/include/86box/cdrom_image_backend.h @@ -56,10 +56,17 @@ typedef struct { } track_file_t; typedef struct { - int number, track_number, attr, sector_size, - mode2, form, pre, pad; - uint64_t start, length, - skip; + int number; + int track_number; + int attr; + int sector_size; + int mode2; + int form; + int pre; + int pad; + uint64_t start; + uint64_t length; + uint64_t skip; track_file_t *file; } track_t; diff --git a/src/include/86box/config.h b/src/include/86box/config.h index 9738b049b..72b0a709f 100644 --- a/src/include/86box/config.h +++ b/src/include/86box/config.h @@ -27,110 +27,110 @@ extern "C" { #endif #if 0 -typedef struct { - uint8_t id, - uint8_t bus_type, /* Bus type: IDE, SCSI, etc. */ - bus, : 4, /* ID of the bus (for example, for IDE, - 0 = primary, 1 = secondary, etc. */ - bus_id, : 4, /* ID of the device on the bus */ - uint8_t type, /* Type flags, interpretation depends - on the device */ - uint8_t is_image; /* This is only used for CD-ROM: - 0 = Image; - 1 = Host drive */ +typedef struct storage_cfg_t { + uint8_t id; + uint8_t bus_type; /* Bus type: IDE, SCSI, etc. */ + uint8_t bus, : 4; /* ID of the bus (for example, for IDE, + 0 = primary, 1 = secondary, etc. */ + uint8_t bus_id, : 4; /* ID of the device on the bus */ + uint8_t type; /* Type flags, interpretation depends + on the device */ + uint8_t is_image; /* This is only used for CD-ROM: + 0 = Image; + 1 = Host drive */ - wchar_t path[1024]; /* Name of current image file or - host drive */ + wchar_t path[1024]; /* Name of current image file or + host drive */ - uint32_t spt, /* Physical geometry parameters */ - hpc, - tracks; + uint32_t spt; /* Physical geometry parameters */ + uint32_t hpc; + uint32_t tracks; } storage_cfg_t; -typedef struct { +typedef struct config_t { /* General configuration */ - int vid_resize, /* Window is resizable or not */ - vid_renderer, /* Renderer */ - vid_fullscreen_scale, /* Full screen scale type */ - vid_fullscreen_start, /* Start emulator in full screen */ - vid_force_43, /* Force 4:3 display ratio in windowed mode */ - vid_scale, /* Windowed mode scale */ - vid_overscan, /* EGA/(S)VGA overscan enabled */ - vid_cga_contrast, /* CGA alternate contrast enabled */ - vid_grayscale, /* Video is grayscale */ - vid_grayscale_type, /* Video grayscale type */ - vid_invert_display, /* Invert display */ - rctrl_is_lalt, /* Right CTRL is left ALT */ - update_icons, /* Update status bar icons */ - window_remember, /* Remember window position and size */ - window_w, /* Window coordinates */ - window_h, - window_x, - window_y, - sound_gain; /* Sound gain */ + int vid_resize; /* Window is resizable or not */ + int vid_renderer; /* Renderer */ + int vid_fullscreen_scale; /* Full screen scale type */ + int vid_fullscreen_start; /* Start emulator in full screen */ + int vid_force_43; /* Force 4:3 display ratio in windowed mode */ + int vid_scale; /* Windowed mode scale */ + int vid_overscan; /* EGA/(S)VGA overscan enabled */ + int vid_cga_contrast; /* CGA alternate contrast enabled */ + int vid_grayscale; /* Video is grayscale */ + int vid_grayscale_type; /* Video grayscale type */ + int vid_invert_display; /* Invert display */ + int rctrl_is_lalt; /* Right CTRL is left ALT */ + int update_icons; /* Update status bar icons */ + int window_remember; /* Remember window position and size */ + int window_w; /* Window coordinates */ + int window_h; + int window_x; + int window_y; + int sound_gain; /* Sound gain */ # ifdef USE_LANGUAGE - uint16_t language_id; /* Language ID (0x0409 = English (US)) */ + uint16_t language_id; /* Language ID (0x0409 = English (US)) */ # endif /* Machine cateogory */ - int machine, /* Machine */ - cpu, /* CPU */ + int machine; /* Machine */ + int cpu; /* CPU */ # ifdef USE_DYNAREC - cpu_use_dynarec, /* CPU recompiler enabled */ + int cpu_use_dynarec; /* CPU recompiler enabled */ # endif - wait_states, /* CPU wait states */ - enable_external_fpu, /* FPU enabled */ - time_sync; /* Time sync enabled */ - uint32_t mem_size; /* Memory size */ + int wait_states; /* CPU wait states */ + int enable_external_fpu; /* FPU enabled */ + int time_sync; /* Time sync enabled */ + uint32_t mem_size; /* Memory size */ /* Video category */ - int video_card, /* Video card */ - voodoo_enabled; /* Voodoo enabled */ + int video_card; /* Video card */ + int voodoo_enabled; /* Voodoo enabled */ /* Input devices category */ - int mouse_type, /* Mouse type */ - joystick_type; /* Joystick type */ + int mouse_type; /* Mouse type */ + int joystick_type; /* Joystick type */ /* Sound category */ - int sound_card, /* Sound card */ - midi_device, /* Midi device */ - mpu_401, /* Standalone MPU-401 enabled */ - ssi_2001_enabled, /* SSI-2001 enabled */ - game_blaster_enabled, /* Game blaster enabled */ - gus_enabled, /* Gravis Ultrasound enabled */ - opl_type, /* OPL emulation type */ - sound_is_float; /* Sound is 32-bit float or 16-bit integer */ + int sound_card; /* Sound card */ + int midi_device; /* Midi device */ + int mpu_401; /* Standalone MPU-401 enabled */ + int ssi_2001_enabled; /* SSI-2001 enabled */ + int game_blaster_enabled; /* Game blaster enabled */ + int gus_enabled; /* Gravis Ultrasound enabled */ + int opl_type; /* OPL emulation type */ + int sound_is_float; /* Sound is 32-bit float or 16-bit integer */ /* Network category */ - int network_type, /* Network type (SLiRP or PCap) */ - network_card; /* Network card */ - char network_host[520]; /* PCap device */ + int network_type; /* Network type (SLiRP or PCap) */ + int network_card; /* Network card */ + char network_host[520]; /* PCap device */ /* Ports category */ char parallel_devices[PARALLEL_MAX][32]; /* LPT device names */ # ifdef USE_SERIAL_DEVICES - char serial_devices[SERIAL_MAX][32]; /* Serial device names */ + char serial_devices[SERIAL_MAX][32]; /* Serial device names */ # endif /* Other peripherals category */ - int fdc_type, /* Floppy disk controller type */ - hdc, /* Hard disk controller */ - scsi_card, /* SCSI controller */ - ide_ter_enabled, /* Tertiary IDE controller enabled */ - ide_qua_enabled, /* Quaternary IDE controller enabled */ - bugger_enabled, /* ISA bugger device enabled */ - isa_rtc_type, /* ISA RTC card */ - isa_mem_type[ISAMEM_MAX]; /* ISA memory boards */ + int fdc_type; /* Floppy disk controller type */ + int hdc; /* Hard disk controller */ + int scsi_card; /* SCSI controller */ + int ide_ter_enabled; /* Tertiary IDE controller enabled */ + int ide_qua_enabled; /* Quaternary IDE controller enabled */ + int bugger_enabled; /* ISA bugger device enabled */ + int isa_rtc_type; /* ISA RTC card */ + int isa_mem_type[ISAMEM_MAX]; /* ISA memory boards */ /* Hard disks category */ - storage_cfg_t hdd[HDD_NUM]; /* Hard disk drives */ + storage_cfg_t hdd[HDD_NUM]; /* Hard disk drives */ /* Floppy drives category */ - storage_cfg_t fdd[FDD_NUM]; /* Floppy drives */ + storage_cfg_t fdd[FDD_NUM]; /* Floppy drives */ /* Other removable devices category */ - storage_cfg_t cdrom[CDROM_NUM], /* CD-ROM drives */ - storage_cfg_t rdisk[ZIP_NUM]; /* Removable disk drives */ + storage_cfg_t cdrom[CDROM_NUM]; /* CD-ROM drives */ + storage_cfg_t rdisk[ZIP_NUM]; /* Removable disk drives */ } config_t; #endif diff --git a/src/include/86box/ddma.h b/src/include/86box/ddma.h index ccc423d27..01c2e980d 100644 --- a/src/include/86box/ddma.h +++ b/src/include/86box/ddma.h @@ -21,14 +21,13 @@ extern "C" { #endif -typedef struct -{ +typedef struct ddma_channel_t { uint16_t io_base; - int channel, enable; + int channel; + int enable; } ddma_channel_t; -typedef struct -{ +typedef struct ddma_t { ddma_channel_t channels[8]; } ddma_t; diff --git a/src/include/86box/device.h b/src/include/86box/device.h index 2390e5128..74dd5ee3d 100644 --- a/src/include/86box/device.h +++ b/src/include/86box/device.h @@ -86,28 +86,30 @@ enum { #define BIOS_INTERLEAVED_INVERT 8 #define BIOS_HIGH_BIT_INVERT 16 -typedef struct { +typedef struct device_config_selection_t { const char *description; int value; } device_config_selection_t; -typedef struct { +typedef struct device_config_bios_t { const char *name; const char *internal_name; int bios_type; int files_no; - uint32_t local, size; - void *dev1, *dev2; + uint32_t local; + uint32_t size; + void *dev1; + void *dev2; const char *files[9]; } device_config_bios_t; -typedef struct { +typedef struct device_config_spinner_t { int16_t min; int16_t max; int16_t step; } device_config_spinner_t; -typedef struct { +typedef struct device_config_t { const char *name; const char *description; int type; @@ -142,7 +144,7 @@ typedef struct _device_ { const device_config_t *config; } device_t; -typedef struct { +typedef struct device_context_t { const device_t *dev; char name[2048]; int instance; diff --git a/src/include/86box/disksizes.h b/src/include/86box/disksizes.h index e47b82943..b5cd1bc30 100644 --- a/src/include/86box/disksizes.h +++ b/src/include/86box/disksizes.h @@ -22,7 +22,7 @@ extern "C" { #endif -typedef struct { +typedef struct disk_size_t { int hole; int sides; int data_rate; @@ -40,10 +40,12 @@ typedef struct { static const disk_size_t disk_sizes[14] = { // clang-format off -// { 1, 1, 2, 1, 1, 77, 26, 0, 0, 4, 2, 6, 68 }, /* 250k 8" */ -// { 1, 2, 2, 1, 1, 77, 26, 0, 0, 4, 2, 6, 68 }, /* 500k 8" */ -// { 1, 1, 2, 1, 1, 77, 8, 3, 0, 1, 2, 2, 192 }, /* 616k 8" */ -// { 1, 2, 0, 1, 1, 77, 8, 3, 0, 1, 2, 2, 192 }, /* 1232k 8" */ +#if 0 + { 1, 1, 2, 1, 1, 77, 26, 0, 0, 4, 2, 6, 68 }, /* 250k 8" */ + { 1, 2, 2, 1, 1, 77, 26, 0, 0, 4, 2, 6, 68 }, /* 500k 8" */ + { 1, 1, 2, 1, 1, 77, 8, 3, 0, 1, 2, 2, 192 }, /* 616k 8" */ + { 1, 2, 0, 1, 1, 77, 8, 3, 0, 1, 2, 2, 192 }, /* 1232k 8" */ +#endif { 0, 1, 2, 1, 0, 40, 8, 2, 0xfe, 2, 2, 1, 64 }, /* 160k */ { 0, 1, 2, 1, 0, 40, 9, 2, 0xfc, 2, 2, 1, 64 }, /* 180k */ { 0, 2, 2, 1, 0, 40, 8, 2, 0xff, 2, 2, 1, 112 }, /* 320k */ @@ -58,8 +60,10 @@ static const disk_size_t disk_sizes[14] = { { 2, 2, 3, 1, 0, 80, 36, 2, 0xf0, 2, 2, 9, 240 }, /* 2.88M */ { 0, 64, 0, 0, 0, 96, 32, 2, 0, 0, 0, 0, 0 }, /* ZIP 100 */ { 0, 64, 0, 0, 0, 239, 32, 2, 0, 0, 0, 0, 0 }, /* ZIP 250 */ -// { 0, 8, 0, 0, 0, 963, 32, 2, 0, 0, 0, 0, 0 }, /* LS-120 */ -// { 0, 32, 0, 0, 0, 262, 56, 2, 0, 0, 0, 0, 0 } /* LS-240 */ +#if 0 + { 0, 8, 0, 0, 0, 963, 32, 2, 0, 0, 0, 0, 0 }, /* LS-120 */ + { 0, 32, 0, 0, 0, 262, 56, 2, 0, 0, 0, 0, 0 } /* LS-240 */ +#endif // clang-format on }; diff --git a/src/include/86box/dma.h b/src/include/86box/dma.h index 904d0b13b..7ead53ba0 100644 --- a/src/include/86box/dma.h +++ b/src/include/86box/dma.h @@ -43,22 +43,37 @@ #define DMA_OVER 0x10000 #define DMA_VERIFY 0x20000 -typedef struct { - uint8_t m, mode, page, stat, - stat_rq, command, - ps2_mode, arb_level, - sg_command, sg_status, - ptr0, enabled, - ext_mode, page_l, - page_h, pad; - uint16_t cb, io_addr, - base, transfer_mode; - uint32_t ptr, ptr_cur, - addr, - ab, ac; - int cc, wp, - size, count, - eot; +typedef struct dma_t { + uint8_t m; + uint8_t mode; + uint8_t page; + uint8_t stat; + uint8_t stat_rq; + uint8_t command; + uint8_t ps2_mode; + uint8_t arb_level; + uint8_t sg_command; + uint8_t sg_status; + uint8_t ptr0; + uint8_t enabled; + uint8_t ext_mode; + uint8_t page_l; + uint8_t page_h; + uint8_t pad; + uint16_t cb; + uint16_t io_addr; + uint16_t base; + uint16_t transfer_mode; + uint32_t ptr; + uint32_t ptr_cur; + uint32_t addr; + uint32_t ab; + uint32_t ac; + int cc; + int wp; + int size; + int count; + int eot; } dma_t; extern dma_t dma[8]; diff --git a/src/include/86box/fdc.h b/src/include/86box/fdc.h index 09678b2e5..9441bdfc4 100644 --- a/src/include/86box/fdc.h +++ b/src/include/86box/fdc.h @@ -56,42 +56,79 @@ extern int fdc_type; #define FDC_FLAG_TER 0x2000 /* Is Tertiary */ #define FDC_FLAG_QUA 0x3000 /* Is Quaternary */ -typedef struct { - uint8_t dor, stat, command, processed_cmd, dat, st0, swap, dtl; - uint8_t swwp, disable_write, st5, st6, error; - uint8_t params[8], res[11]; +typedef struct fdc_t { + uint8_t dor; + uint8_t stat; + uint8_t command; + uint8_t processed_cmd; + uint8_t dat; + uint8_t st0; + uint8_t swap; + uint8_t dtl; + uint8_t swwp; + uint8_t disable_write; + uint8_t st5; + uint8_t st6; + uint8_t error; + uint8_t params[8]; + uint8_t res[11]; uint8_t specify[2]; - uint8_t config, pretrk; + uint8_t config; + uint8_t pretrk; uint8_t fifobuf[16]; uint16_t base_address; - int head, sector, drive, lastdrive; - int pcn[4], eot[4]; - int rw_track, pos; - int pnum, ptot; - int rate, reset_stat; - int lock, perp; - int format_state, format_n; - int step, seek_dir; - int tc, noprec; + int head; + int sector; + int drive; + int lastdrive; + int pcn[4]; + int eot[4]; + int rw_track; + int pos; + int pnum; + int ptot; + int rate; + int reset_stat; + int lock; + int perp; + int format_state; + int format_n; + int step; + int seek_dir; + int tc; + int noprec; - int data_ready, inread; - int bitcell_period, enh_mode; - int rwc[4], drvrate[4]; - int boot_drive, dma; - int densel_polarity, densel_force; - int fifo, tfifo; - int fifobufpos, drv2en; + int data_ready; + int inread; + int bitcell_period; + int enh_mode; + int rwc[4]; + int drvrate[4]; + int boot_drive; + int dma; + int densel_polarity; + int densel_force; + int fifo; + int tfifo; + int fifobufpos; + int drv2en; int gap; - int enable_3f1, format_sectors; - int max_track, mfm; - int deleted, wrong_am; - int sc, satisfying_sectors; - int fintr, rw_drive; + int enable_3f1; + int format_sectors; + int max_track; + int mfm; + int deleted; + int wrong_am; + int sc; + int satisfying_sectors; + int fintr; + int rw_drive; - int flags, interrupt; + int flags; + int interrupt; int irq; /* Should be 6 by default. */ int dma_ch; /* Should be 2 by default. */ @@ -99,11 +136,13 @@ typedef struct { int bit_rate; /* Should be 250 at start. */ int paramstogo; - sector_id_t read_track_sector, format_sector_id; + sector_id_t read_track_sector; + sector_id_t format_sector_id; uint64_t watchdog_count; - pc_timer_t timer, watchdog_timer; + pc_timer_t timer; + pc_timer_t watchdog_timer; } fdc_t; extern void fdc_remove(fdc_t *fdc); diff --git a/src/include/86box/fdd.h b/src/include/86box/fdd.h index 7e9edd624..e21cbb73e 100644 --- a/src/include/86box/fdd.h +++ b/src/include/86box/fdd.h @@ -65,7 +65,7 @@ extern int fdd_get_from_internal_name(char *s); extern int fdd_current_track(int drive); -typedef struct { +typedef struct DRIVE { int id; void (*seek)(int drive, int track); diff --git a/src/include/86box/fifo8.h b/src/include/86box/fifo8.h index 811f0522f..9f88ec408 100644 --- a/src/include/86box/fifo8.h +++ b/src/include/86box/fifo8.h @@ -1,7 +1,7 @@ #ifndef EMU_FIFO8_H #define EMU_FIFO8_H -typedef struct { +typedef struct Fifo8 { /* All fields are private */ uint8_t *data; uint32_t capacity; diff --git a/src/include/86box/gameport.h b/src/include/86box/gameport.h index 905130da0..3b779e4e3 100644 --- a/src/include/86box/gameport.h +++ b/src/include/86box/gameport.h @@ -34,7 +34,7 @@ #define GAMEPORT_SIO 0x1000000 -typedef struct { +typedef struct plat_joystick_t { char name[260]; int a[8]; @@ -57,8 +57,7 @@ typedef struct { int id; } pov[4]; - struct - { + struct { char name[260]; int id; } slider[2]; @@ -69,7 +68,7 @@ typedef struct { int nr_sliders; } plat_joystick_t; -typedef struct { +typedef struct joystick_t { int axis[8]; int button[32]; int pov[4]; @@ -80,20 +79,20 @@ typedef struct { int pov_mapping[4][2]; } joystick_t; -typedef struct { +typedef struct joystick_if_t { const char *name; const char *internal_name; - void *(*init)(void); - void (*close)(void *p); + void *(*init)(void); + void (*close)(void *p); uint8_t (*read)(void *p); - void (*write)(void *p); - int (*read_axis)(void *p, int axis); - void (*a0_over)(void *p); + void (*write)(void *p); + int (*read_axis)(void *p, int axis); + void (*a0_over)(void *p); - int axis_count, - button_count, - pov_count; + int axis_count; + int button_count; + int pov_count; int max_joysticks; const char *axis_names[8]; const char *button_names[32]; diff --git a/src/include/86box/gdbstub.h b/src/include/86box/gdbstub.h index 8ac83f625..5d55615b3 100644 --- a/src/include/86box/gdbstub.h +++ b/src/include/86box/gdbstub.h @@ -24,14 +24,14 @@ #define GDBSTUB_MEM_AWATCH 32 enum { - GDBSTUB_EXEC = 0, - GDBSTUB_SSTEP, - GDBSTUB_BREAK, - GDBSTUB_BREAK_SW, - GDBSTUB_BREAK_HW, - GDBSTUB_BREAK_RWATCH, - GDBSTUB_BREAK_WWATCH, - GDBSTUB_BREAK_AWATCH + GDBSTUB_EXEC = 0, + GDBSTUB_SSTEP = 1, + GDBSTUB_BREAK = 2, + GDBSTUB_BREAK_SW = 3, + GDBSTUB_BREAK_HW = 4, + GDBSTUB_BREAK_RWATCH = 5, + GDBSTUB_BREAK_WWATCH = 6, + GDBSTUB_BREAK_AWATCH = 7 }; #ifdef USE_GDBSTUB diff --git a/src/include/86box/hdc_ide.h b/src/include/86box/hdc_ide.h index 5a3251a3f..8a4c66da3 100644 --- a/src/include/86box/hdc_ide.h +++ b/src/include/86box/hdc_ide.h @@ -43,23 +43,37 @@ enum { #ifdef SCSI_DEVICE_H typedef struct ide_s { - uint8_t selected, - atastat, error, - command, fdisk; - int type, board, - irqstat, service, - blocksize, blockcount, - hdd_num, channel, - pos, sector_pos, - lba, - reset, mdma_mode, - do_initial_read; - uint32_t secount, sector, - cylinder, head, - drive, cylprecomp, - cfg_spt, cfg_hpc, - lba_addr, tracks, - spt, hpc; + uint8_t selected; + uint8_t atastat; + uint8_t error; + uint8_t command; + uint8_t fdisk; + int type; + int board; + int irqstat; + int service; + int blocksize; + int blockcount; + int hdd_num; + int channel; + int pos; + int sector_pos; + int lba; + int reset; + int mdma_mode; + int do_initial_read; + uint32_t secount; + uint32_t sector; + uint32_t cylinder; + uint32_t head; + uint32_t drive; + uint32_t cylprecomp; + uint32_t cfg_spt; + uint32_t cfg_hpc; + uint32_t lba_addr; + uint32_t tracks; + uint32_t spt; + uint32_t hpc; uint16_t *buffer; uint8_t *sector_buffer; @@ -96,10 +110,10 @@ extern ide_t *ide_drives[IDE_NUM]; This will eventually be hookable. */ enum { - TYPE_PIO = 0, - TYPE_SDMA, - TYPE_MDMA, - TYPE_UDMA + TYPE_PIO = 0, + TYPE_SDMA = 1, + TYPE_MDMA = 2, + TYPE_UDMA = 3 }; /* Return: @@ -108,9 +122,9 @@ enum { This will eventually be hookable. */ enum { - TIMINGS_DMA = 0, - TIMINGS_PIO, - TIMINGS_PIO_FC + TIMINGS_DMA = 0, + TIMINGS_PIO = 1, + TIMINGS_PIO_FC = 2 }; extern int ide_ter_enabled; diff --git a/src/include/86box/hdc_ide_sff8038i.h b/src/include/86box/hdc_ide_sff8038i.h index b411ecf5d..490a13a42 100644 --- a/src/include/86box/hdc_ide_sff8038i.h +++ b/src/include/86box/hdc_ide_sff8038i.h @@ -20,19 +20,27 @@ #ifndef EMU_HDC_IDE_SFF8038I_H #define EMU_HDC_IDE_SFF8038I_H -typedef struct -{ - uint8_t command, status, - ptr0, enabled, - dma_mode, pad, - pad0, pad1; - uint16_t base, pad2; - uint32_t ptr, ptr_cur, - addr; - int count, eot, - slot, - irq_mode[2], irq_level[2], - irq_pin, irq_line; +typedef struct sff8038i_t { + uint8_t command; + uint8_t status; + uint8_t ptr0; + uint8_t enabled; + uint8_t dma_mode; + uint8_t pad; + uint8_t pad0; + uint8_t pad1; + uint16_t base; + uint16_t pad2; + uint32_t ptr; + uint32_t ptr_cur; + uint32_t addr; + int count; + int eot; + int slot; + int irq_mode[2]; + int irq_level[2]; + int irq_pin; + int irq_line; } sff8038i_t; extern const device_t sff8038i_device; diff --git a/src/include/86box/hdd.h b/src/include/86box/hdd.h index 1508939ba..9874fb4aa 100644 --- a/src/include/86box/hdd.h +++ b/src/include/86box/hdd.h @@ -34,60 +34,60 @@ Bit 5 = Removable (0 = no, 1 yes). */ enum { - BUS_DISABLED = 0x00, + BUS_DISABLED = 0x00, - BUS_MFM = 0x01, /* These four are for hard disk only. */ - BUS_XIDE = 0x02, - BUS_XTA = 0x03, - BUS_ESDI = 0x04, + BUS_MFM = 0x01, /* These four are for hard disk only. */ + BUS_XIDE = 0x02, + BUS_XTA = 0x03, + BUS_ESDI = 0x04, - BUS_PANASONIC = 0x21, / These four are for CD-ROM only. */ - BUS_PHILIPS = 0x22, - BUS_SONY = 0x23, - BUS_MITSUMI = 0x24, + BUS_PANASONIC = 0x21, / These four are for CD-ROM only. */ + BUS_PHILIPS = 0x22, + BUS_SONY = 0x23, + BUS_MITSUMI = 0x24, - BUS_IDE_PIO_ONLY = 0x05, - BUS_IDE_PIO_AND_DMA = 0x15, - BUS_IDE_R_PIO_ONLY = 0x25, - BUS_IDE_R_PIO_AND_DMA = 0x35, + BUS_IDE_PIO_ONLY = 0x05, + BUS_IDE_PIO_AND_DMA = 0x15, + BUS_IDE_R_PIO_ONLY = 0x25, + BUS_IDE_R_PIO_AND_DMA = 0x35, - BUS_ATAPI_PIO_ONLY = 0x06, - BUS_ATAPI_PIO_AND_DMA = 0x16, - BUS_ATAPI_R_PIO_ONLY = 0x26, - BUS_ATAPI_R_PIO_AND_DMA = 0x36, + BUS_ATAPI_PIO_ONLY = 0x06, + BUS_ATAPI_PIO_AND_DMA = 0x16, + BUS_ATAPI_R_PIO_ONLY = 0x26, + BUS_ATAPI_R_PIO_AND_DMA = 0x36, - BUS_SASI = 0x07, - BUS_SASI_R = 0x27, + BUS_SASI = 0x07, + BUS_SASI_R = 0x27, - BUS_SCSI = 0x08, - BUS_SCSI_R = 0x28, + BUS_SCSI = 0x08, + BUS_SCSI_R = 0x28, - BUS_USB = 0x09, - BUS_USB_R = 0x29 + BUS_USB = 0x09, + BUS_USB_R = 0x29 }; #else enum { HDD_BUS_DISABLED = 0, - HDD_BUS_MFM, - HDD_BUS_XTA, - HDD_BUS_ESDI, - HDD_BUS_IDE, - HDD_BUS_ATAPI, - HDD_BUS_SCSI, - HDD_BUS_USB + HDD_BUS_MFM = 1, + HDD_BUS_XTA = 2, + HDD_BUS_ESDI = 3, + HDD_BUS_IDE = 4, + HDD_BUS_ATAPI = 5, + HDD_BUS_SCSI = 6, + HDD_BUS_USB = 7 }; #endif enum { - HDD_OP_SEEK = 0, - HDD_OP_READ, - HDD_OP_WRITE + HDD_OP_SEEK = 0, + HDD_OP_READ = 2, + HDD_OP_WRITE = 3 }; #define HDD_MAX_ZONES 16 #define HDD_MAX_CACHE_SEG 16 -typedef struct { +typedef struct hdd_preset_t { const char *name; const char *internal_name; uint32_t zones; @@ -101,7 +101,7 @@ typedef struct { double track_seek_ms; } hdd_preset_t; -typedef struct { +typedef struct hdd_cache_seg_t { uint32_t id; uint32_t lba_addr; uint32_t ra_addr; @@ -110,7 +110,7 @@ typedef struct { uint8_t valid; } hdd_cache_seg_t; -typedef struct { +typedef struct hdd_cache_t { // Read cache hdd_cache_seg_t segments[HDD_MAX_CACHE_SEG]; uint32_t num_segments; @@ -126,7 +126,7 @@ typedef struct { uint64_t write_start_time; } hdd_cache_t; -typedef struct { +typedef struct hdd_zone_t { uint32_t cylinders; uint32_t sectors_per_track; double sector_time_usec; @@ -136,7 +136,7 @@ typedef struct { } hdd_zone_t; /* Define the virtual Hard Disk. */ -typedef struct { +typedef struct hard_disk_t { uint8_t id; union { uint8_t channel; /* Needed for Settings to reduce the number of if's */ @@ -147,21 +147,23 @@ typedef struct { uint8_t ide_channel; uint8_t scsi_id; }; - uint8_t bus, - res; /* Reserved for bus mode */ + uint8_t bus; + uint8_t res; /* Reserved for bus mode */ uint8_t wp; /* Disk has been mounted READ-ONLY */ - uint8_t pad, pad0; + uint8_t pad; + uint8_t pad0; void *priv; char fn[1024]; /* Name of current image file */ char vhd_parent[1041]; /* Differential VHD parent file */ - uint32_t res0, pad1, - base, - spt, - hpc, /* Physical geometry parameters */ - tracks; + uint32_t res0; + uint32_t pad1; + uint32_t base; + uint32_t spt; + uint32_t hpc; /* Physical geometry parameters */ + uint32_t tracks; hdd_zone_t zones[HDD_MAX_ZONES]; uint32_t num_zones; diff --git a/src/include/86box/hwm.h b/src/include/86box/hwm.h index e0410b3a0..b1b1d8c25 100644 --- a/src/include/86box/hwm.h +++ b/src/include/86box/hwm.h @@ -20,20 +20,21 @@ #define RESISTOR_DIVIDER(v, r1, r2) (((v) * (r2)) / ((r1) + (r2))) -typedef struct { +typedef struct hwm_values_t { uint16_t fans[4]; uint8_t temperatures[4]; uint16_t voltages[13]; } hwm_values_t; -typedef struct { +typedef struct lm75_t { uint32_t local; hwm_values_t *values; void *as99127f; uint8_t regs[8]; uint8_t addr_register; - uint8_t i2c_addr : 7, i2c_state : 2; + uint8_t i2c_addr : 7; + uint8_t i2c_state : 2; uint8_t i2c_enabled : 1; } lm75_t; diff --git a/src/include/86box/isapnp.h b/src/include/86box/isapnp.h index 9fff876dc..71c1bb29a 100644 --- a/src/include/86box/isapnp.h +++ b/src/include/86box/isapnp.h @@ -25,27 +25,31 @@ #define ISAPNP_DMA_DISABLED 4 enum { - ISAPNP_CARD_DISABLE = 0, - ISAPNP_CARD_ENABLE = 1, - ISAPNP_CARD_FORCE_CONFIG, /* cheat code for UMC UM8669F */ - ISAPNP_CARD_NO_KEY /* cheat code for Crystal CS423x */ + ISAPNP_CARD_DISABLE = 0, + ISAPNP_CARD_ENABLE = 1, + ISAPNP_CARD_FORCE_CONFIG = 2, /* cheat code for UMC UM8669F */ + ISAPNP_CARD_NO_KEY = 3 /* cheat code for Crystal CS423x */ }; -typedef struct { +typedef struct isapnp_device_config_t { uint8_t activate; - struct { - uint32_t base : 24, size : 24; + struct pnp_mem_t { + uint32_t base : 24; + uint32_t size : 24; } mem[4]; - struct { - uint32_t base, size; + struct pnp_mem32_t { + uint32_t base; + uint32_t size; } mem32[4]; - struct { + struct pnp_io_t { uint16_t base; } io[8]; - struct { - uint8_t irq : 4, level : 1, type : 1; + struct pnp_irq_t { + uint8_t irq : 4; + uint8_t level : 1; + uint8_t type : 1; } irq[2]; - struct { + struct pnp_dma_t { uint8_t dma : 3; } dma[2]; } isapnp_device_config_t; diff --git a/src/include/86box/keyboard.h b/src/include/86box/keyboard.h index 4a1c04892..392539c73 100644 --- a/src/include/86box/keyboard.h +++ b/src/include/86box/keyboard.h @@ -24,23 +24,24 @@ enum { DEV_KBD = 0, - DEV_AUX + DEV_AUX = 1 }; enum { - DEV_STATE_MAIN_1 = 0, - DEV_STATE_MAIN_OUT, - DEV_STATE_MAIN_2, - DEV_STATE_MAIN_CMD, - DEV_STATE_MAIN_WANT_IN, - DEV_STATE_MAIN_IN, - DEV_STATE_EXECUTE_BAT, - DEV_STATE_MAIN_WANT_EXECUTE_BAT + DEV_STATE_MAIN_1 = 0, + DEV_STATE_MAIN_OUT = 1, + DEV_STATE_MAIN_2 = 2, + DEV_STATE_MAIN_CMD = 3, + DEV_STATE_MAIN_WANT_IN = 4, + DEV_STATE_MAIN_IN = 5, + DEV_STATE_EXECUTE_BAT = 6, + DEV_STATE_MAIN_WANT_EXECUTE_BAT = 7 }; /* Used by the AT / PS/2 keyboard controller, common device, keyboard, and mouse. */ -typedef struct { - uint8_t wantcmd, dat; +typedef struct kbc_at_port_t { + uint8_t wantcmd; + uint8_t dat; int16_t out_new; @@ -50,12 +51,19 @@ typedef struct { } kbc_at_port_t; /* Used by the AT / PS/2 common device, keyboard, and mouse. */ -typedef struct { +typedef struct atkbc_dev_t { const char *name; /* name of this device */ - uint8_t type, command, last_scan_code, state, - resolution, rate, cmd_queue_start, cmd_queue_end, - queue_start, queue_end; + uint8_t type; + uint8_t command; + uint8_t last_scan_code; + uint8_t state; + uint8_t resolution; + uint8_t rate; + uint8_t cmd_queue_start; + uint8_t cmd_queue_end; + uint8_t queue_start; + uint8_t queue_end; uint16_t flags; @@ -65,8 +73,12 @@ typedef struct { uint8_t queue[64]; - int fifo_mask, mode, - x, y, z, b; + int fifo_mask; + int mode; + int x; + int y; + int z; + int b; int *scan; @@ -76,7 +88,7 @@ typedef struct { kbc_at_port_t *port; } atkbc_dev_t; -typedef struct { +typedef struct scancode { const uint8_t mk[4]; const uint8_t brk[4]; } scancode; @@ -216,6 +228,7 @@ extern const device_t keyboard_xt_olivetti_device; extern const device_t keyboard_xt_zenith_device; extern const device_t keyboard_xtclone_device; extern const device_t keyboard_at_device; +extern const device_t keyboard_at_siemens_device; extern const device_t keyboard_at_ami_device; extern const device_t keyboard_at_tg_ami_device; extern const device_t keyboard_at_toshiba_device; diff --git a/src/include/86box/lpt.h b/src/include/86box/lpt.h index cb8fc7cc6..4c1c793ae 100644 --- a/src/include/86box/lpt.h +++ b/src/include/86box/lpt.h @@ -10,15 +10,14 @@ #define LPT_MDA_IRQ 7 #define LPT4_ADDR 0x0268 #define LPT4_IRQ 5 -/* +#if 0 #define LPT5_ADDR 0x027c #define LPT5_IRQ 7 #define LPT6_ADDR 0x026c #define LPT6_IRQ 5 -*/ +#endif -typedef struct -{ +typedef struct lpt_device_t { const char *name; const char *internal_name; @@ -53,7 +52,7 @@ extern void lpt1_remove_ams(void); #define lpt4_irq(a) lpt_port_irq(3, a) #define lpt4_remove() lpt_port_remove(3) -/* +#if 0 #define lpt5_init(a) lpt_port_init(4, a) #define lpt5_irq(a) lpt_port_irq(4, a) #define lpt5_remove() lpt_port_remove(4) @@ -61,16 +60,20 @@ extern void lpt1_remove_ams(void); #define lpt6_init(a) lpt_port_init(5, a) #define lpt6_irq(a) lpt_port_irq(5, a) #define lpt6_remove() lpt_port_remove(5) -*/ +#endif void lpt_devices_init(void); void lpt_devices_close(void); typedef struct { - uint8_t enabled, irq, - dat, ctrl; - uint16_t addr, pad0; - int device, enable_irq; + uint8_t enabled; + uint8_t irq; + uint8_t dat; + uint8_t ctrl; + uint16_t addr; + uint16_t pad0; + int device; + int enable_irq; lpt_device_t *dt; void *priv; } lpt_port_t; diff --git a/src/include/86box/machine.h b/src/include/86box/machine.h index a54929741..f3a49f365 100644 --- a/src/include/86box/machine.h +++ b/src/include/86box/machine.h @@ -26,18 +26,22 @@ #define MACHINE_BUS_NONE 0x00000000 /* sys has no bus */ /* Feature flags for BUS'es. */ #define MACHINE_BUS_ISA 0x00000001 /* sys has ISA bus */ -#define MACHINE_BUS_CARTRIDGE 0x00000002 /* sys has two cartridge bays */ -#define MACHINE_BUS_ISA16 0x00000004 /* sys has ISA16 bus - PC/AT architecture */ -#define MACHINE_BUS_CBUS 0x00000008 /* sys has C-BUS bus */ -#define MACHINE_BUS_PS2 0x00000010 /* system has PS/2 keyboard and mouse ports */ -#define MACHINE_BUS_EISA 0x00000020 /* sys has EISA bus */ -#define MACHINE_BUS_VLB 0x00000040 /* sys has VL bus */ -#define MACHINE_BUS_MCA 0x00000080 /* sys has MCA bus */ -#define MACHINE_BUS_PCI 0x00000100 /* sys has PCI bus */ -#define MACHINE_BUS_PCMCIA 0x00000200 /* sys has PCMCIA bus */ -#define MACHINE_BUS_AGP 0x00000400 /* sys has AGP bus */ -#define MACHINE_BUS_AC97 0x00000800 /* sys has AC97 bus (ACR/AMR/CNR slot) */ +#define MACHINE_BUS_CASSETTE 0x00000002 /* sys has cassette port */ +#define MACHINE_BUS_CARTRIDGE 0x00000004 /* sys has two cartridge bays */ +#define MACHINE_BUS_ISA16 0x00000008 /* sys has ISA16 bus - PC/AT architecture */ +#define MACHINE_BUS_CBUS 0x00000010 /* sys has C-BUS bus */ +#define MACHINE_BUS_PS2_LATCH 0x00000020 /* system has PS/2 keyboard controller IRQ latch */ +#define MACHINE_BUS_PS2_PORTS 0x00000040 /* system has PS/2 keyboard and mouse ports */ +#define MACHINE_BUS_PS2 (MACHINE_BUS_PS2_LATCH | MACHINE_BUS_PS2_PORTS) +#define MACHINE_BUS_EISA 0x00000080 /* sys has EISA bus */ +#define MACHINE_BUS_VLB 0x00000100 /* sys has VL bus */ +#define MACHINE_BUS_MCA 0x00000200 /* sys has MCA bus */ +#define MACHINE_BUS_PCI 0x00000400 /* sys has PCI bus */ +#define MACHINE_BUS_PCMCIA 0x00000800 /* sys has PCMCIA bus */ +#define MACHINE_BUS_AGP 0x00001000 /* sys has AGP bus */ +#define MACHINE_BUS_AC97 0x00002000 /* sys has AC97 bus (ACR/AMR/CNR slot) */ /* Aliases. */ +#define MACHINE_CASSETTE (MACHINE_BUS_CASSETTE) /* sys has cassette port */ #define MACHINE_CARTRIDGE (MACHINE_BUS_CARTRIDGE) /* sys has two cartridge bays */ /* Combined flags. */ #define MACHINE_PC (MACHINE_BUS_ISA) /* sys is PC/XT-compatible (ISA) */ @@ -57,16 +61,17 @@ #define MACHINE_AGP (MACHINE_BUS_AGP | MACHINE_PCI) /* sys is AT-compatible with AGP */ #define MACHINE_AGP98 (MACHINE_BUS_AGP | MACHINE_PCI98) /* sys is NEC PC-98x1 series with AGP (did that even exist?) */ -#define MACHINE_PCJR (MACHINE_PC | MACHINE_CARTRIDGE) /* sys is PCjr */ -#define MACHINE_PS2 (MACHINE_AT | MACHINE_BUS_PS2) /* sys is PS/2 */ -#define MACHINE_PS2_MCA (MACHINE_MCA | MACHINE_BUS_PS2) /* sys is MCA PS/2 */ -#define MACHINE_PS2_VLB (MACHINE_VLB | MACHINE_BUS_PS2) /* sys is VLB PS/2 */ -#define MACHINE_PS2_PCI (MACHINE_PCI | MACHINE_BUS_PS2) /* sys is PCI PS/2 */ -#define MACHINE_PS2_PCIV (MACHINE_PCIV | MACHINE_BUS_PS2) /* sys is VLB/PCI PS/2 */ -#define MACHINE_PS2_AGP (MACHINE_AGP | MACHINE_BUS_PS2) /* sys is AGP PS/2 */ -#define MACHINE_PS2_A97 (MACHINE_PS2_AGP | MACHINE_BUS_AC97) /* sys is AGP/AC97 PS/2 */ -#define MACHINE_PS2_NOISA (MACHINE_PS2_AGP & ~MACHINE_AT) /* sys is AGP PS/2 without ISA */ -#define MACHINE_PS2_NOI97 (MACHINE_PS2_A97 & ~MACHINE_AT) /* sys is AGP/AC97 PS/2 without ISA */ +#define MACHINE_PC5150 (MACHINE_PC | MACHINE_CASSETTE) /* sys is IBM PC 5150 */ +#define MACHINE_PCJR (MACHINE_PC | MACHINE_CASSETTE | MACHINE_CARTRIDGE) /* sys is PCjr */ +#define MACHINE_PS2 (MACHINE_AT | MACHINE_BUS_PS2) /* sys is PS/2 */ +#define MACHINE_PS2_MCA (MACHINE_MCA | MACHINE_BUS_PS2) /* sys is MCA PS/2 */ +#define MACHINE_PS2_VLB (MACHINE_VLB | MACHINE_BUS_PS2) /* sys is VLB PS/2 */ +#define MACHINE_PS2_PCI (MACHINE_PCI | MACHINE_BUS_PS2) /* sys is PCI PS/2 */ +#define MACHINE_PS2_PCIV (MACHINE_PCIV | MACHINE_BUS_PS2) /* sys is VLB/PCI PS/2 */ +#define MACHINE_PS2_AGP (MACHINE_AGP | MACHINE_BUS_PS2) /* sys is AGP PS/2 */ +#define MACHINE_PS2_A97 (MACHINE_PS2_AGP | MACHINE_BUS_AC97) /* sys is AGP/AC97 PS/2 */ +#define MACHINE_PS2_NOISA (MACHINE_PS2_AGP & ~MACHINE_AT) /* sys is AGP PS/2 without ISA */ +#define MACHINE_PS2_NOI97 (MACHINE_PS2_A97 & ~MACHINE_AT) /* sys is AGP/AC97 PS/2 without ISA */ /* Feature flags for miscellaneous internal devices. */ #define MACHINE_FLAGS_NONE 0x00000000 /* sys has no int devices */ #define MACHINE_VIDEO 0x00000001 /* sys has int video */ @@ -95,19 +100,20 @@ #define MACHINE_AV (MACHINE_VIDEO | MACHINE_SOUND) /* sys has video and sound */ #define MACHINE_AG (MACHINE_SOUND | MACHINE_GAMEPORT) /* sys has sound and game port */ /* Feature flags for internal storage controllers. */ -#define MACHINE_HDC 0x03FE0000 /* sys has int HDC */ -#define MACHINE_MFM 0x00020000 /* sys has int MFM/RLL */ -#define MACHINE_XTA 0x00040000 /* sys has int XTA */ -#define MACHINE_ESDI 0x00080000 /* sys has int ESDI */ -#define MACHINE_IDE_PRI 0x00100000 /* sys has int pri IDE/ATAPI */ -#define MACHINE_IDE_SEC 0x00200000 /* sys has int sec IDE/ATAPI */ -#define MACHINE_IDE_TER 0x00400000 /* sys has int ter IDE/ATAPI */ -#define MACHINE_IDE_QUA 0x00800000 /* sys has int qua IDE/ATAPI */ -#define MACHINE_SCSI_PRI 0x01000000 /* sys has int pri SCSI */ -#define MACHINE_SCSI_SEC 0x02000000 /* sys has int sec SCSI */ -#define MACHINE_USB_PRI 0x04000000 /* sys has int pri USB */ -#define MACHINE_USB_SEC 0x08000000 /* sys has int sec USB */ -#define MACHINE_COREBOOT 0x10000000 /* sys has coreboot BIOS */ +#define MACHINE_HDC 0x03FE0000 /* sys has int HDC */ +#define MACHINE_MFM 0x00020000 /* sys has int MFM/RLL */ +#define MACHINE_XTA 0x00040000 /* sys has int XTA */ +#define MACHINE_ESDI 0x00080000 /* sys has int ESDI */ +#define MACHINE_IDE_PRI 0x00100000 /* sys has int pri IDE/ATAPI */ +#define MACHINE_IDE_SEC 0x00200000 /* sys has int sec IDE/ATAPI */ +#define MACHINE_IDE_TER 0x00400000 /* sys has int ter IDE/ATAPI */ +#define MACHINE_IDE_QUA 0x00800000 /* sys has int qua IDE/ATAPI */ +#define MACHINE_SCSI_PRI 0x01000000 /* sys has int pri SCSI */ +#define MACHINE_SCSI_SEC 0x02000000 /* sys has int sec SCSI */ +#define MACHINE_USB_PRI 0x04000000 /* sys has int pri USB */ +#define MACHINE_USB_SEC 0x08000000 /* sys has int sec USB */ +#define MACHINE_COREBOOT 0x10000000 /* sys has coreboot BIOS */ +#define MACHINE_SOFTFLOAT_ONLY 0x20000000 /* sys requires softfloat FPU */ /* Combined flags. */ #define MACHINE_IDE (MACHINE_IDE_PRI) /* sys has int single IDE/ATAPI - mark as pri IDE/ATAPI */ #define MACHINE_IDE_DUAL (MACHINE_IDE_PRI | MACHINE_IDE_SEC) /* sys has int dual IDE/ATAPI - mark as both pri and sec IDE/ATAPI */ @@ -143,31 +149,31 @@ #endif enum { - MACHINE_TYPE_NONE = 0, - MACHINE_TYPE_8088, - MACHINE_TYPE_8086, - MACHINE_TYPE_286, - MACHINE_TYPE_386SX, - MACHINE_TYPE_486SLC, - MACHINE_TYPE_386DX, - MACHINE_TYPE_386DX_486, - MACHINE_TYPE_486, - MACHINE_TYPE_486_S2, - MACHINE_TYPE_486_S3, - MACHINE_TYPE_486_MISC, - MACHINE_TYPE_SOCKET4, - MACHINE_TYPE_SOCKET5, - MACHINE_TYPE_SOCKET7_3V, - MACHINE_TYPE_SOCKET7, - MACHINE_TYPE_SOCKETS7, - MACHINE_TYPE_SOCKET8, - MACHINE_TYPE_SLOT1, - MACHINE_TYPE_SLOT1_2, - MACHINE_TYPE_SLOT1_370, - MACHINE_TYPE_SLOT2, - MACHINE_TYPE_SOCKET370, - MACHINE_TYPE_MISC, - MACHINE_TYPE_MAX + MACHINE_TYPE_NONE = 0, + MACHINE_TYPE_8088 = 1, + MACHINE_TYPE_8086 = 2, + MACHINE_TYPE_286 = 3, + MACHINE_TYPE_386SX = 4, + MACHINE_TYPE_486SLC = 5, + MACHINE_TYPE_386DX = 6, + MACHINE_TYPE_386DX_486 = 7, + MACHINE_TYPE_486 = 8, + MACHINE_TYPE_486_S2 = 9, + MACHINE_TYPE_486_S3 = 10, + MACHINE_TYPE_486_MISC = 11, + MACHINE_TYPE_SOCKET4 = 12, + MACHINE_TYPE_SOCKET5 = 13, + MACHINE_TYPE_SOCKET7_3V = 14, + MACHINE_TYPE_SOCKET7 = 15, + MACHINE_TYPE_SOCKETS7 = 16, + MACHINE_TYPE_SOCKET8 = 17, + MACHINE_TYPE_SLOT1 = 18, + MACHINE_TYPE_SLOT1_2 = 19, + MACHINE_TYPE_SLOT1_370 = 20, + MACHINE_TYPE_SLOT2 = 21, + MACHINE_TYPE_SOCKET370 = 22, + MACHINE_TYPE_MISC = 23, + MACHINE_TYPE_MAX = 24 }; enum { @@ -281,7 +287,10 @@ typedef struct _machine_ { uint32_t type; uintptr_t chipset; int (*init)(const struct _machine_ *); - uintptr_t pad, pad0, pad1, pad2; + uintptr_t pad; + uintptr_t pad0; + uintptr_t pad1; + uintptr_t pad2; const machine_cpu_t cpu; uintptr_t bus_flags; uintptr_t flags; diff --git a/src/include/86box/machine_status.h b/src/include/86box/machine_status.h index 6948dc556..e7c57881b 100644 --- a/src/include/86box/machine_status.h +++ b/src/include/86box/machine_status.h @@ -1,20 +1,20 @@ #ifndef EMU_MACHINE_STATUS_H #define EMU_MACHINE_STATUS_H -typedef struct { +typedef struct dev_status_empty_active_t { atomic_bool_t empty; atomic_bool_t active; } dev_status_empty_active_t; -typedef struct { +typedef struct dev_status_active_t { atomic_bool_t active; } dev_status_active_t; -typedef struct { +typedef struct dev_status_empty_t { atomic_bool_t empty; } dev_status_empty_t; -typedef struct { +typedef struct machine_status_t { dev_status_empty_active_t fdd[FDD_NUM]; dev_status_empty_active_t cdrom[CDROM_NUM]; dev_status_empty_active_t zip[ZIP_NUM]; diff --git a/src/include/86box/mem.h b/src/include/86box/mem.h index 2277535bd..dee144109 100644 --- a/src/include/86box/mem.h +++ b/src/include/86box/mem.h @@ -158,20 +158,21 @@ #define mem_set_access_smram_bus(smm, base, size, is_smram) \ mem_set_access((smm ? ACCESS_BUS_SMM : ACCESS_BUS), 1, base, size, is_smram) -typedef struct { - uint16_t x : 5, - w : 5, - r : 5, - pad : 1; +typedef struct state_t { + uint16_t x : 5; + uint16_t w : 5; + uint16_t r : 5; + uint16_t pad : 1; } state_t; -typedef union { +typedef union mem_state_t { uint16_t vals[4]; state_t states[4]; } mem_state_t; typedef struct _mem_mapping_ { - struct _mem_mapping_ *prev, *next; + struct _mem_mapping_ *prev; + struct _mem_mapping_ *next; int enable; @@ -255,7 +256,8 @@ extern uint8_t *ram, *ram2; extern uint32_t rammask; extern uint8_t *rom; -extern uint32_t biosmask, biosaddr; +extern uint32_t biosmask; +extern uint32_t biosaddr; extern int readlookup[256]; extern uintptr_t *readlookup2; @@ -283,7 +285,8 @@ extern uint32_t mem_logical_addr; extern page_t *pages; extern page_t **page_lookup; -extern uint32_t get_phys_virt, get_phys_phys; +extern uint32_t get_phys_virt; +extern uint32_t get_phys_phys; extern int shadowbios; extern int shadowbios_write; diff --git a/src/include/86box/midi.h b/src/include/86box/midi.h index f965e6c98..029ad06dc 100644 --- a/src/include/86box/midi.h +++ b/src/include/86box/midi.h @@ -47,13 +47,21 @@ typedef struct midi_in_handler_t { } midi_in_handler_t; typedef struct midi_t { - uint8_t midi_rt_buf[8], midi_cmd_buf[8], - midi_status, midi_sysex_data[SYSEX_SIZE]; - int midi_cmd_pos, midi_cmd_len, midi_cmd_r, - midi_realtime, thruchan, midi_clockout; - unsigned int midi_sysex_start, midi_sysex_delay, - midi_pos; - midi_device_t *m_out_device, *m_in_device; + uint8_t midi_rt_buf[8]; + uint8_t midi_cmd_buf[8]; + uint8_t midi_status; + uint8_t midi_sysex_data[SYSEX_SIZE]; + int midi_cmd_pos; + int midi_cmd_len; + int midi_cmd_r; + int midi_realtime; + int thruchan; + int midi_clockout; + unsigned int midi_sysex_start; + unsigned int midi_sysex_delay; + unsigned int midi_pos; + midi_device_t *m_out_device; + midi_device_t *m_in_device; } midi_t; extern midi_t *midi_out; diff --git a/src/include/86box/mo.h b/src/include/86box/mo.h index 19c999ee3..a11c4d636 100644 --- a/src/include/86box/mo.h +++ b/src/include/86box/mo.h @@ -27,7 +27,7 @@ #define MO_TIME 10.0 -typedef struct { +typedef struct mo_type_t { uint32_t sectors; uint16_t bytes_per_sector; } mo_type_t; @@ -48,8 +48,7 @@ static const mo_type_t mo_types[KNOWN_MO_TYPES] = { { 637041, 1024}, }; -typedef struct -{ +typedef struct mo_drive_type_t { const char vendor[9]; const char model[16]; const char revision[5]; @@ -85,62 +84,77 @@ static const mo_drive_type_t mo_drive_types[KNOWN_MO_DRIVE_TYPES] = { enum { MO_BUS_DISABLED = 0, MO_BUS_ATAPI = 5, - MO_BUS_SCSI, - MO_BUS_USB + MO_BUS_SCSI = 6, + MO_BUS_USB = 7 }; -typedef struct { +typedef struct mo_drive_t { uint8_t id; union { - uint8_t res, res0, /* Reserved for other ID's. */ - res1, - ide_channel, scsi_device_id; + uint8_t res; + uint8_t res0; /* Reserved for other ID's. */ + uint8_t res1; + uint8_t ide_channel; + uint8_t scsi_device_id; }; - uint8_t bus_type, /* 0 = ATAPI, 1 = SCSI */ - bus_mode, /* Bit 0 = PIO suported; - Bit 1 = DMA supportd. */ - read_only, /* Struct variable reserved for - media status. */ - pad, pad0; + uint8_t bus_type; /* 0 = ATAPI, 1 = SCSI */ + uint8_t bus_mode; /* Bit 0 = PIO suported; + Bit 1 = DMA supportd. */ + uint8_t read_only; /* Struct variable reserved for + media status. */ + uint8_t pad; + uint8_t pad0; FILE *f; void *priv; - char image_path[1024], - prev_image_path[1024]; + char image_path[1024]; + char prev_image_path[1024]; - uint32_t type, medium_size, - base; + uint32_t type; + uint32_t medium_size; + uint32_t base; uint16_t sector_size; } mo_drive_t; -typedef struct { +typedef struct mo_t { mode_sense_pages_t ms_pages_saved; mo_drive_t *drv; - uint8_t *buffer, - atapi_cdb[16], - current_cdb[16], - sense[256]; + uint8_t *buffer; + uint8_t atapi_cdb[16]; + uint8_t current_cdb[16]; + uint8_t sense[256]; - uint8_t status, phase, - error, id, - features, cur_lun, - pad0, pad1; + uint8_t status; + uint8_t phase; + uint8_t error; + uint8_t id; + uint8_t features; + uint8_t cur_lun; + uint8_t pad0; + uint8_t pad1; - uint16_t request_length, max_transfer_len; + uint16_t request_length; + uint16_t max_transfer_len; - int requested_blocks, packet_status, - total_length, do_page_save, - unit_attention, request_pos, - old_len, pad3; + int requested_blocks; + int packet_status; + int total_length; + int do_page_save; + int unit_attention; + int request_pos; + int old_len; + int pad3; - uint32_t sector_pos, sector_len, - packet_len, pos; + uint32_t sector_pos; + uint32_t sector_len; + uint32_t packet_len; + uint32_t pos; double callback; } mo_t; diff --git a/src/include/86box/mouse.h b/src/include/86box/mouse.h index 874bf30de..839c0f11a 100644 --- a/src/include/86box/mouse.h +++ b/src/include/86box/mouse.h @@ -43,16 +43,16 @@ extern "C" { #endif -extern int mouse_type; -extern int mouse_x; -extern int mouse_y; -extern int mouse_z; -extern int mouse_mode; /* 1 = Absolute, 0 = Relative */ -extern int mouse_tablet_in_proximity; +extern int mouse_type; +extern int mouse_x; +extern int mouse_y; +extern int mouse_z; +extern int mouse_mode; /* 1 = Absolute, 0 = Relative */ +extern int mouse_tablet_in_proximity; extern double mouse_x_abs; extern double mouse_y_abs; -extern int mouse_buttons; -extern int tablet_tool_type; +extern int mouse_buttons; +extern int tablet_tool_type; #ifdef EMU_DEVICE_H extern const device_t *mouse_get_device(int mouse); diff --git a/src/include/86box/net_dp8390.h b/src/include/86box/net_dp8390.h index bc3220c69..e9e1e6c71 100644 --- a/src/include/86box/net_dp8390.h +++ b/src/include/86box/net_dp8390.h @@ -36,7 +36,7 @@ #define DP8390_FLAG_CHECK_CR 0x02 #define DP8390_FLAG_CLEAR_IRQ 0x04 -typedef struct { +typedef struct dp8390_t { /* Page 0 */ /* Command Register - 00h read/write */ diff --git a/src/include/86box/net_event.h b/src/include/86box/net_event.h index 61eaad166..48580a359 100644 --- a/src/include/86box/net_event.h +++ b/src/include/86box/net_event.h @@ -1,7 +1,7 @@ #ifndef EMU_NET_EVENT_H #define EMU_NET_EVENT_H -typedef struct { +typedef struct net_evt_t { #ifdef _WIN32 HANDLE handle; #else diff --git a/src/include/86box/net_wd8003.h b/src/include/86box/net_wd8003.h index a0ea13287..726510cdb 100644 --- a/src/include/86box/net_wd8003.h +++ b/src/include/86box/net_wd8003.h @@ -45,13 +45,13 @@ #define NET_WD8003_H enum { - WD_NONE = 0, - WD8003E, /* WD8003E : 8-bit ISA, no interface chip */ - WD8003EB, /* WD8003EB : 8-bit ISA, 5x3 interface chip */ - WD8013EBT, /* WD8013EBT : 16-bit ISA, no interface chip */ - WD8003ETA, /* WD8003ET/A: 16-bit MCA, no interface chip */ - WD8003EA, /* WD8003E/A : 16-bit MCA, 5x3 interface chip */ - WD8013EPA + WD_NONE = 0, + WD8003E = 1, /* WD8003E : 8-bit ISA, no interface chip */ + WD8003EB = 2, /* WD8003EB : 8-bit ISA, 5x3 interface chip */ + WD8013EBT = 3, /* WD8013EBT : 16-bit ISA, no interface chip */ + WD8003ETA = 4, /* WD8003ET/A: 16-bit MCA, no interface chip */ + WD8003EA = 5, /* WD8003E/A : 16-bit MCA, 5x3 interface chip */ + WD8013EPA = 6 }; extern const device_t wd8003e_device; diff --git a/src/include/86box/network.h b/src/include/86box/network.h index 2684ed1c4..d7958ee9a 100644 --- a/src/include/86box/network.h +++ b/src/include/86box/network.h @@ -80,20 +80,20 @@ enum { /* Supported network cards. */ enum { - NONE = 0, - NE1000, - NE2000, - RTL8019AS, - RTL8029AS + NONE = 0, + NE1000 = 1, + NE2000 = 2, + RTL8019AS = 3, + RTL8029AS = 4 }; enum { - NET_QUEUE_RX, - NET_QUEUE_TX_VM, - NET_QUEUE_TX_HOST + NET_QUEUE_RX = 0, + NET_QUEUE_TX_VM = 1, + NET_QUEUE_TX_HOST = 2 }; -typedef struct { +typedef struct netcard_conf_t { uint16_t device_num; int net_type; char host_dev_name[128]; @@ -111,7 +111,7 @@ typedef struct netpkt { int len; } netpkt_t; -typedef struct { +typedef struct netqueue_t { netpkt_t packets[NET_QUEUE_LEN]; int head; int tail; @@ -168,11 +168,11 @@ extern "C" { #endif /* Global variables. */ -extern int nic_do_log; /* config */ +extern int nic_do_log; // config extern network_devmap_t network_devmap; -extern int network_ndev; // Number of pcap devices +extern int network_ndev; // Number of pcap devices extern network_devmap_t network_devmap; // Bitmap of available network types -extern netdev_t network_devs[NET_HOST_INTF_MAX]; +extern netdev_t network_devs[NET_HOST_INTF_MAX]; /* Function prototypes. */ diff --git a/src/include/86box/nvr.h b/src/include/86box/nvr.h index 25f5e90ad..baba6b6c4 100644 --- a/src/include/86box/nvr.h +++ b/src/include/86box/nvr.h @@ -64,7 +64,8 @@ typedef struct _nvr_ { char *fn; /* pathname of image file */ uint16_t size; /* device configuration */ - int8_t irq, is_new; + int8_t irq; + int8_t is_new; uint8_t onesec_cnt; pc_timer_t onesec_time; diff --git a/src/include/86box/pci.h b/src/include/86box/pci.h index 52c2df981..60c0d8742 100644 --- a/src/include/86box/pci.h +++ b/src/include/86box/pci.h @@ -56,48 +56,65 @@ #define PCI_ADD_STRICT 0x80 enum { - PCI_CARD_NORTHBRIDGE = 0, - PCI_CARD_AGPBRIDGE, - PCI_CARD_SOUTHBRIDGE, - PCI_CARD_SOUTHBRIDGE_IDE, - PCI_CARD_SOUTHBRIDGE_PMU, - PCI_CARD_SOUTHBRIDGE_USB, - PCI_CARD_AGP = 0x0f, - PCI_CARD_NORMAL = 0x10, - PCI_CARD_VIDEO, - PCI_CARD_SCSI, - PCI_CARD_SOUND, - PCI_CARD_IDE, - PCI_CARD_NETWORK, - PCI_CARD_BRIDGE, + PCI_CARD_NORTHBRIDGE = 0, + PCI_CARD_AGPBRIDGE = 1, + PCI_CARD_SOUTHBRIDGE = 2, + PCI_CARD_SOUTHBRIDGE_IDE = 3, + PCI_CARD_SOUTHBRIDGE_PMU = 4, + PCI_CARD_SOUTHBRIDGE_USB = 5, + PCI_CARD_AGP = 0x0f, + PCI_CARD_NORMAL = 0x10, + PCI_CARD_VIDEO = 0x11, + PCI_CARD_SCSI = 0x12, + PCI_CARD_SOUND = 0x13, + PCI_CARD_IDE = 0x14, + PCI_CARD_NETWORK = 0x15, + PCI_CARD_BRIDGE = 0x16, }; enum { - PCI_ADD_NORTHBRIDGE = 0, - PCI_ADD_AGPBRIDGE, - PCI_ADD_SOUTHBRIDGE, - PCI_ADD_SOUTHBRIDGE_IDE, - PCI_ADD_SOUTHBRIDGE_PMU, - PCI_ADD_SOUTHBRIDGE_USB, - PCI_ADD_AGP = 0x0f, - PCI_ADD_NORMAL = 0x10, - PCI_ADD_VIDEO, - PCI_ADD_SCSI, - PCI_ADD_SOUND, - PCI_ADD_IDE, - PCI_ADD_NETWORK, - PCI_ADD_BRIDGE + PCI_ADD_NORTHBRIDGE = 0, + PCI_ADD_AGPBRIDGE = 1, + PCI_ADD_SOUTHBRIDGE = 2, + PCI_ADD_SOUTHBRIDGE_IDE = 3, + PCI_ADD_SOUTHBRIDGE_PMU = 4, + PCI_ADD_SOUTHBRIDGE_USB = 5, + PCI_ADD_AGP = 0x0f, + PCI_ADD_NORMAL = 0x10, + PCI_ADD_VIDEO = 0x11, + PCI_ADD_SCSI = 0x12, + PCI_ADD_SOUND = 0x13, + PCI_ADD_IDE = 0x14, + PCI_ADD_NETWORK = 0x15, + PCI_ADD_BRIDGE = 0x16 }; typedef union { uint32_t addr; - uint8_t addr_regs[4]; + uint8_t addr_regs[4]; } bar_t; + +#define PCI_IO_ON 0x01 +#define PCI_IO_DEV0 0x02 + + extern int pci_burst_time; extern int agp_burst_time; extern int pci_nonburst_time; extern int agp_nonburst_time; +extern int pci_take_over_io; + +extern uint32_t pci_base; +extern uint32_t pci_size; + + +extern void pci_type2_write(uint16_t port, uint8_t val, void *priv); +extern void pci_type2_writew(uint16_t port, uint16_t val, void *priv); +extern void pci_type2_writel(uint16_t port, uint32_t val, void *priv); +extern uint8_t pci_type2_read(uint16_t port, void *priv); +extern uint16_t pci_type2_readw(uint16_t port, void *priv); +extern uint32_t pci_type2_readl(uint16_t port, void *priv); extern void pci_set_irq_routing(int pci_int, int irq); extern void pci_set_irq_level(int pci_int, int level); diff --git a/src/include/86box/pic.h b/src/include/86box/pic.h index 25c866242..dcc6f1358 100644 --- a/src/include/86box/pic.h +++ b/src/include/86box/pic.h @@ -20,11 +20,26 @@ #define EMU_PIC_H typedef struct pic { - uint8_t icw1, icw2, icw3, icw4, - imr, isr, irr, ocw2, - ocw3, int_pending, is_master, elcr, - state, ack_bytes, priority, special_mask_mode, - auto_eoi_rotate, interrupt, lines, data_bus; + uint8_t icw1; + uint8_t icw2; + uint8_t icw3; + uint8_t icw4; + uint8_t imr; + uint8_t isr; + uint8_t irr; + uint8_t ocw2; + uint8_t ocw3; + uint8_t int_pending; + uint8_t is_master; + uint8_t elcr; + uint8_t state; + uint8_t ack_bytes; + uint8_t priority; + uint8_t special_mask_mode; + uint8_t auto_eoi_rotate; + uint8_t interrupt; + uint8_t lines; + uint8_t data_bus; uint32_t at; struct pic *slaves[8]; } pic_t; diff --git a/src/include/86box/pit.h b/src/include/86box/pit.h index a9d114d8e..bb6c26969 100644 --- a/src/include/86box/pit.h +++ b/src/include/86box/pit.h @@ -19,26 +19,38 @@ #ifndef EMU_PIT_H #define EMU_PIT_H -typedef struct { - uint8_t m, ctrl, - read_status, latch, - s1_det, l_det, - bcd, incomplete; +typedef struct ctr_t { + uint8_t m; + uint8_t ctrl; + uint8_t read_status; + uint8_t latch; + uint8_t s1_det; + uint8_t l_det; + uint8_t bcd; + uint8_t incomplete; uint16_t rl; - int rm, wm, gate, out, - newcount, clock, using_timer, latched, - state, null_count, do_read_status; + int rm; + int wm; + int gate; + int out; + int newcount; + int clock; + int using_timer; + int latched; + int state; + int null_count; + int do_read_status; union { - int count; + int32_t count; struct { - int units : 4; - int tens : 4; - int hundreds : 4; - int thousands : 4; - int myriads : 4; + int32_t units : 4; + int32_t tens : 4; + int32_t hundreds : 4; + int32_t thousands : 4; + int32_t myriads : 4; }; }; @@ -49,7 +61,8 @@ typedef struct { } ctr_t; typedef struct PIT { - int flags, clock; + int flags; + int clock; pc_timer_t callback_timer; ctr_t counters[3]; @@ -58,13 +71,13 @@ typedef struct PIT { } pit_t; enum { - PIT_8253 = 0, - PIT_8254, - PIT_8253_FAST, - PIT_8254_FAST + PIT_8253 = 0, + PIT_8254 = 1, + PIT_8253_FAST = 2, + PIT_8254_FAST = 3 }; -typedef struct { +typedef struct pit_intf_t { uint8_t (*read)(uint16_t addr, void *priv); void (*write)(uint16_t addr, uint8_t val, void *priv); /* Gets a counter's count. */ diff --git a/src/include/86box/pit_fast.h b/src/include/86box/pit_fast.h index 242fb4207..a7caeabe7 100644 --- a/src/include/86box/pit_fast.h +++ b/src/include/86box/pit_fast.h @@ -19,15 +19,24 @@ #ifndef EMU_PIT_FAST_H #define EMU_PIT_FAST_H -typedef struct { - uint8_t m, ctrl, - read_status, latch, bcd; +typedef struct ctrf_t { + uint8_t m; + uint8_t ctrl; + uint8_t read_status; + uint8_t latch; + uint8_t bcd; uint16_t rl; - int rm, wm, gate, out, - newcount, clock, using_timer, latched, - do_read_status; + int rm; + int wm; + int gate; + int out; + int newcount; + int clock; + int using_timer; + int latched; + int do_read_status; int enabled; int disabled; int initial; @@ -36,13 +45,13 @@ typedef struct { int rereadlatch; union { - int count; + int32_t count; struct { - int units : 4; - int tens : 4; - int hundreds : 4; - int thousands : 4; - int myriads : 4; + int32_t units : 4; + int32_t tens : 4; + int32_t hundreds : 4; + int32_t thousands : 4; + int32_t myriads : 4; }; }; @@ -53,7 +62,7 @@ typedef struct { void (*out_func)(int new_out, int old_out); } ctrf_t; -typedef struct { +typedef struct pitf_t { int flags; ctrf_t counters[3]; diff --git a/src/include/86box/plat.h b/src/include/86box/plat.h index 05b982216..932dfe87b 100644 --- a/src/include/86box/plat.h +++ b/src/include/86box/plat.h @@ -81,9 +81,9 @@ extern "C" { #endif /* Global variables residing in the platform module. */ -extern int dopause, /* system is paused */ - mouse_capture; /* mouse is captured in app */ -extern volatile int is_quit; /* system exit requested */ +extern int dopause; /* system is paused */ +extern int mouse_capture; /* mouse is captured in app */ +extern volatile int is_quit; /* system exit requested */ #ifdef MTR_ENABLED extern int tracing_on; @@ -95,7 +95,9 @@ extern char emu_version[200]; /* version ID string */ extern int rctrl_is_lalt; extern int update_icons; -extern int kbd_req_capture, hide_status_bar, hide_tool_bar; +extern int kbd_req_capture; +extern int hide_status_bar; +extern int hide_tool_bar; /* System-related functions. */ extern char *fix_exe_path(char *str); diff --git a/src/include/86box/plat_dir.h b/src/include/86box/plat_dir.h index 899ff325e..485314f46 100644 --- a/src/include/86box/plat_dir.h +++ b/src/include/86box/plat_dir.h @@ -39,7 +39,7 @@ struct dirent { }; # define d_namlen d_reclen -typedef struct { +typedef struct DIR_t { short flags; /* internal flags */ short offset; /* offset of entry into dir */ long handle; /* open handle to Win32 system */ @@ -66,12 +66,9 @@ extern void seekdir(DIR *, long); extern int closedir(DIR *); # define rewinddir(dirp) seekdir(dirp, 0L) -#elif defined(__FreeBSD__) -/* FreeBSD uses dirent.h instead of sys/dir.h */ -# include #else /* On linux and macOS, use the standard functions and types */ -# include +# include #endif #endif /*PLAT_DIR_H*/ diff --git a/src/include/86box/plat_dynld.h b/src/include/86box/plat_dynld.h index 986e72424..44891d4ac 100644 --- a/src/include/86box/plat_dynld.h +++ b/src/include/86box/plat_dynld.h @@ -18,7 +18,7 @@ #ifndef PLAT_DYNLD_H #define PLAT_DYNLD_H -typedef struct { +typedef struct dllimp_t { const char *name; void *func; } dllimp_t; diff --git a/src/include/86box/plat_unused.h b/src/include/86box/plat_unused.h new file mode 100644 index 000000000..73eaebaae --- /dev/null +++ b/src/include/86box/plat_unused.h @@ -0,0 +1,31 @@ +/* + * 86Box A hypervisor and IBM PC system emulator that specializes in + * running old operating systems and software designed for IBM + * PC systems and compatibles from 1981 through fairly recent + * system designs based on the PCI bus. + * + * This file is part of the 86Box distribution. + * + * Define the various platform support functions. + * + * + * + * Authors: Miran Grca, + * Fred N. van Kempen, + * + * Copyright 2016-2019 Miran Grca. + * Copyright 2017-2019 Fred N. van Kempen. + * Copyright 2021 Laci bá' + */ + +#ifndef EMU_PLAT_UNUSED_H +#define EMU_PLAT_UNUSED_H + +#ifdef _MSC_VER +# define UNUSED(arg) arg +#else +/* A hack (GCC-specific?) to allow us to ignore unused parameters. */ +# define UNUSED(arg) __attribute__((unused)) arg +#endif + +#endif /*EMU_PLAT_UNUSED_H*/ diff --git a/src/include/86box/port_6x.h b/src/include/86box/port_6x.h index 7eb0c9a56..e0c4b0508 100644 --- a/src/include/86box/port_6x.h +++ b/src/include/86box/port_6x.h @@ -20,9 +20,9 @@ #define EMU_PORT_6X_H #ifdef _TIMER_H_ -typedef struct -{ - uint8_t refresh, flags; +typedef struct port_6x_t { + uint8_t refresh; + uint8_t flags; pc_timer_t refresh_timer; } port_6x_t; diff --git a/src/include/86box/port_92.h b/src/include/86box/port_92.h index 319b2b3ac..2dd4319be 100644 --- a/src/include/86box/port_92.h +++ b/src/include/86box/port_92.h @@ -20,9 +20,9 @@ #define EMU_PORT_92_H #ifdef _TIMER_H_ -typedef struct -{ - uint8_t reg, flags; +typedef struct port_92_t { + uint8_t reg; + uint8_t flags; pc_timer_t pulse_timer; diff --git a/src/include/86box/ppi.h b/src/include/86box/ppi.h index 0e12c98f8..d5649bcc8 100644 --- a/src/include/86box/ppi.h +++ b/src/include/86box/ppi.h @@ -3,7 +3,8 @@ typedef struct PPI { int s2; - uint8_t pa, pb; + uint8_t pa; + uint8_t pb; } PPI; extern int ppispeakon; diff --git a/src/include/86box/rom.h b/src/include/86box/rom.h index 91f813a95..5da516aef 100644 --- a/src/include/86box/rom.h +++ b/src/include/86box/rom.h @@ -32,7 +32,7 @@ #define bios_load_interleavedr(a, b, c, d, e) bios_load(a, b, c, d, e, FLAG_INT | FLAG_REP) #define bios_load_aux_interleaved(a, b, c, d, e) bios_load(a, b, c, d, e, FLAG_INT | FLAG_AUX) -typedef struct { +typedef struct rom_t { uint8_t *rom; int sz; uint32_t mask; diff --git a/src/include/86box/scsi_cdrom.h b/src/include/86box/scsi_cdrom.h index 6b94c2aa4..64c24c10e 100644 --- a/src/include/86box/scsi_cdrom.h +++ b/src/include/86box/scsi_cdrom.h @@ -22,31 +22,42 @@ #define CDROM_TIME 10.0 #ifdef SCSI_DEVICE_H -typedef struct { +typedef struct scsi_cdrom_t { /* Common block. */ mode_sense_pages_t ms_pages_saved; cdrom_t *drv; - uint8_t *buffer, - atapi_cdb[16], - current_cdb[16], - sense[256]; + uint8_t *buffer; + uint8_t atapi_cdb[16]; + uint8_t current_cdb[16]; + uint8_t sense[256]; - uint8_t status, phase, - error, id, - features, cur_lun, - early, pad1; + uint8_t status; + uint8_t phase; + uint8_t error; + uint8_t id; + uint8_t features; + uint8_t cur_lun; + uint8_t early; + uint8_t pad1; - uint16_t request_length, max_transfer_len; + uint16_t request_length; + uint16_t max_transfer_len; - int requested_blocks, packet_status, - total_length, do_page_save, - unit_attention, request_pos, - old_len, media_status; + int requested_blocks; + int packet_status; + int total_length; + int do_page_save; + int unit_attention; + int request_pos; + int old_len; + int media_status; - uint32_t sector_pos, sector_len, - packet_len, pos; + uint32_t sector_pos; + uint32_t sector_len; + uint32_t packet_len; + uint32_t pos; double callback; diff --git a/src/include/86box/scsi_device.h b/src/include/86box/scsi_device.h index 61048fb54..7256970cd 100644 --- a/src/include/86box/scsi_device.h +++ b/src/include/86box/scsi_device.h @@ -43,142 +43,142 @@ #define MCR_ERR 0x08 /* Media change request */ /* SCSI commands. */ -#define GPCMD_TEST_UNIT_READY 0x00 -#define GPCMD_REZERO_UNIT 0x01 -#define GPCMD_REQUEST_SENSE 0x03 -#define GPCMD_FORMAT_UNIT 0x04 -#define GPCMD_IOMEGA_SENSE 0x06 -#define GPCMD_READ_6 0x08 -#define GPCMD_WRITE_6 0x0a -#define GPCMD_SEEK_6 0x0b -#define GPCMD_IOMEGA_SET_PROTECTION_MODE 0x0c -#define GPCMD_IOMEGA_EJECT 0x0d /* ATAPI only? */ -#define GPCMD_NO_OPERATION_TOSHIBA 0x0d /* Toshiba Vendor Unique command */ -#define GPCMD_NO_OPERATION_NEC 0x0d /* NEC Vendor Unique command */ -#define GPCMD_INQUIRY 0x12 -#define GPCMD_VERIFY_6 0x13 -#define GPCMD_MODE_SELECT_6 0x15 -#define GPCMD_SCSI_RESERVE 0x16 -#define GPCMD_SCSI_RELEASE 0x17 -#define GPCMD_MODE_SENSE_6 0x1a -#define GPCMD_START_STOP_UNIT 0x1b -#define GPCMD_SEND_DIAGNOSTIC 0x1d -#define GPCMD_PREVENT_REMOVAL 0x1e -#define GPCMD_READ_FORMAT_CAPACITIES 0x23 -#define GPCMD_READ_CDROM_CAPACITY 0x25 -#define GPCMD_UNKNOWN_CHINON 0x26 /*Chinon Vendor Unique command*/ -#define GPCMD_READ_10 0x28 -#define GPCMD_READ_GENERATION 0x29 -#define GPCMD_WRITE_10 0x2a -#define GPCMD_SEEK_10 0x2b -#define GPCMD_ERASE_10 0x2c -#define GPCMD_WRITE_AND_VERIFY_10 0x2e -#define GPCMD_VERIFY_10 0x2f -#define GPCMD_READ_BUFFER 0x3c -#define GPCMD_WRITE_SAME_10 0x41 -#define GPCMD_READ_SUBCHANNEL 0x42 -#define GPCMD_READ_TOC_PMA_ATIP 0x43 -#define GPCMD_READ_HEADER 0x44 -#define GPCMD_PLAY_AUDIO_10 0x45 -#define GPCMD_GET_CONFIGURATION 0x46 -#define GPCMD_PLAY_AUDIO_MSF 0x47 -#define GPCMD_PLAY_AUDIO_TRACK_INDEX 0x48 -#define GPCMD_PLAY_AUDIO_TRACK_RELATIVE_10 0x49 -#define GPCMD_GET_EVENT_STATUS_NOTIFICATION 0x4a -#define GPCMD_PAUSE_RESUME 0x4b -#define GPCMD_STOP_PLAY_SCAN 0x4e -#define GPCMD_READ_DISC_INFORMATION 0x51 -#define GPCMD_READ_TRACK_INFORMATION 0x52 -#define GPCMD_MODE_SELECT_10 0x55 -#define GPCMD_MODE_SENSE_10 0x5a -#define GPCMD_PLAY_AUDIO_12 0xa5 -#define GPCMD_READ_12 0xa8 -#define GPCMD_PLAY_AUDIO_TRACK_RELATIVE_12 0xa9 -#define GPCMD_WRITE_12 0xaa -#define GPCMD_ERASE_12 0xac -#define GPCMD_READ_DVD_STRUCTURE 0xad /* For reading. */ -#define GPCMD_WRITE_AND_VERIFY_12 0xae -#define GPCMD_VERIFY_12 0xaf -#define GPCMD_PLAY_CD_OLD 0xb4 -#define GPCMD_READ_CD_OLD 0xb8 -#define GPCMD_READ_CD_MSF 0xb9 -#define GPCMD_AUDIO_SCAN 0xba -#define GPCMD_SET_SPEED 0xbb -#define GPCMD_PLAY_CD 0xbc -#define GPCMD_MECHANISM_STATUS 0xbd -#define GPCMD_READ_CD 0xbe -#define GPCMD_SEND_DVD_STRUCTURE 0xbf /* This is for writing only, irrelevant to 86Box. */ -#define GPCMD_EJECT_CHINON 0xc0 /* Chinon Vendor Unique command */ -#define GPCMD_AUDIO_TRACK_SEARCH_TOSHIBA 0xc0 /* Toshiba Vendor Unique command */ -#define GPCMD_UNKNOWN_SONY 0xc0 /* Sony Vendor Unique command */ -#define GPCMD_PLAY_AUDIO_TOSHIBA 0xc1 /* Toshiba Vendor Unique command */ -#define GPCMD_READ_TOC_SONY 0xc1 /* Sony Vendor Unique command */ -#define GPCMD_PAUSE_RESUME_ALT 0xc2 -#define GPCMD_READ_SUBCHANNEL_MATSUSHITA 0xc2 /* Matsushita Vendor Unique command */ -#define GPCMD_READ_SUBCHANNEL_SONY 0xc2 /* Sony Vendor Unique command */ -#define GPCMD_STILL_TOSHIBA 0xc2 /* Toshiba Vendor Unique command */ -#define GPCMD_READ_TOC_MATSUSHITA 0xc3 /* Matsushita Vendor Unique command */ -#define GPCMD_READ_HEADER_SONY 0xc3 /* Sony Vendor Unique command */ -#define GPCMD_SET_STOP_TIME_TOSHIBA 0xc3 /* Toshiba Vendor Unique command */ -#define GPCMD_READ_HEADER_MATSUSHITA 0xc4 /* Matsushita Vendor Unique command */ -#define GPCMD_PLAYBACK_STATUS_TOSHIBA 0xc4 /* Sony Vendor Unique command */ -#define GPCMD_CADDY_EJECT_TOSHIBA 0xc4 /* Toshiba Vendor Unique command */ -#define GPCMD_PAUSE_SONY 0xc5 /* Sony Vendor Unique command */ -#define GPCMD_PLAY_AUDIO_MATSUSHITA 0xc5 /* Matsushita Vendor Unique command */ -#define GPCMD_STOP_CHINON 0xc6 /* Chinon Vendor Unique command */ -#define GPCMD_PLAT_TRACK_SONY 0xc6 /* Sony Vendor Unique command */ -#define GPCMD_READ_SUBCODEQ_PLAYING_STATUS_TOSHIBA 0xc6 /* Toshiba Vendor Unique command */ -#define GPCMD_PLAY_AUDIO_MSF_MATSUSHITA 0xc7 /* Matsushita Vendor Unique command*/ -#define GPCMD_PLAY_MSF_SONY 0xc7 /* Sony Vendor Unique command*/ -#define GPCMD_READ_DISC_INFORMATION_TOSHIBA 0xc7 /* Toshiba Vendor Unique command */ -#define GPCMD_PLAY_AUDIO_TRACK_INDEX_MATSUSHITA 0xc8 /* Matsushita Vendor Unique command */ -#define GPCMD_PLAY_AUDIO_SONY 0xc8 /* Sony Vendor Unique command */ +#define GPCMD_TEST_UNIT_READY 0x00 +#define GPCMD_REZERO_UNIT 0x01 +#define GPCMD_REQUEST_SENSE 0x03 +#define GPCMD_FORMAT_UNIT 0x04 +#define GPCMD_IOMEGA_SENSE 0x06 +#define GPCMD_READ_6 0x08 +#define GPCMD_WRITE_6 0x0a +#define GPCMD_SEEK_6 0x0b +#define GPCMD_IOMEGA_SET_PROTECTION_MODE 0x0c +#define GPCMD_IOMEGA_EJECT 0x0d /* ATAPI only? */ +#define GPCMD_NO_OPERATION_TOSHIBA 0x0d /* Toshiba Vendor Unique command */ +#define GPCMD_NO_OPERATION_NEC 0x0d /* NEC Vendor Unique command */ +#define GPCMD_INQUIRY 0x12 +#define GPCMD_VERIFY_6 0x13 +#define GPCMD_MODE_SELECT_6 0x15 +#define GPCMD_SCSI_RESERVE 0x16 +#define GPCMD_SCSI_RELEASE 0x17 +#define GPCMD_MODE_SENSE_6 0x1a +#define GPCMD_START_STOP_UNIT 0x1b +#define GPCMD_SEND_DIAGNOSTIC 0x1d +#define GPCMD_PREVENT_REMOVAL 0x1e +#define GPCMD_READ_FORMAT_CAPACITIES 0x23 +#define GPCMD_READ_CDROM_CAPACITY 0x25 +#define GPCMD_UNKNOWN_CHINON 0x26 /*Chinon Vendor Unique command*/ +#define GPCMD_READ_10 0x28 +#define GPCMD_READ_GENERATION 0x29 +#define GPCMD_WRITE_10 0x2a +#define GPCMD_SEEK_10 0x2b +#define GPCMD_ERASE_10 0x2c +#define GPCMD_WRITE_AND_VERIFY_10 0x2e +#define GPCMD_VERIFY_10 0x2f +#define GPCMD_READ_BUFFER 0x3c +#define GPCMD_WRITE_SAME_10 0x41 +#define GPCMD_READ_SUBCHANNEL 0x42 +#define GPCMD_READ_TOC_PMA_ATIP 0x43 +#define GPCMD_READ_HEADER 0x44 +#define GPCMD_PLAY_AUDIO_10 0x45 +#define GPCMD_GET_CONFIGURATION 0x46 +#define GPCMD_PLAY_AUDIO_MSF 0x47 +#define GPCMD_PLAY_AUDIO_TRACK_INDEX 0x48 +#define GPCMD_PLAY_AUDIO_TRACK_RELATIVE_10 0x49 +#define GPCMD_GET_EVENT_STATUS_NOTIFICATION 0x4a +#define GPCMD_PAUSE_RESUME 0x4b +#define GPCMD_STOP_PLAY_SCAN 0x4e +#define GPCMD_READ_DISC_INFORMATION 0x51 +#define GPCMD_READ_TRACK_INFORMATION 0x52 +#define GPCMD_MODE_SELECT_10 0x55 +#define GPCMD_MODE_SENSE_10 0x5a +#define GPCMD_PLAY_AUDIO_12 0xa5 +#define GPCMD_READ_12 0xa8 +#define GPCMD_PLAY_AUDIO_TRACK_RELATIVE_12 0xa9 +#define GPCMD_WRITE_12 0xaa +#define GPCMD_ERASE_12 0xac +#define GPCMD_READ_DVD_STRUCTURE 0xad /* For reading. */ +#define GPCMD_WRITE_AND_VERIFY_12 0xae +#define GPCMD_VERIFY_12 0xaf +#define GPCMD_PLAY_CD_OLD 0xb4 +#define GPCMD_READ_CD_OLD 0xb8 +#define GPCMD_READ_CD_MSF 0xb9 +#define GPCMD_AUDIO_SCAN 0xba +#define GPCMD_SET_SPEED 0xbb +#define GPCMD_PLAY_CD 0xbc +#define GPCMD_MECHANISM_STATUS 0xbd +#define GPCMD_READ_CD 0xbe +#define GPCMD_SEND_DVD_STRUCTURE 0xbf /* This is for writing only, irrelevant to 86Box. */ +#define GPCMD_EJECT_CHINON 0xc0 /* Chinon Vendor Unique command */ +#define GPCMD_AUDIO_TRACK_SEARCH_TOSHIBA 0xc0 /* Toshiba Vendor Unique command */ +#define GPCMD_UNKNOWN_SONY 0xc0 /* Sony Vendor Unique command */ +#define GPCMD_PLAY_AUDIO_TOSHIBA 0xc1 /* Toshiba Vendor Unique command */ +#define GPCMD_READ_TOC_SONY 0xc1 /* Sony Vendor Unique command */ +#define GPCMD_PAUSE_RESUME_ALT 0xc2 +#define GPCMD_READ_SUBCHANNEL_MATSUSHITA 0xc2 /* Matsushita Vendor Unique command */ +#define GPCMD_READ_SUBCHANNEL_SONY 0xc2 /* Sony Vendor Unique command */ +#define GPCMD_STILL_TOSHIBA 0xc2 /* Toshiba Vendor Unique command */ +#define GPCMD_READ_TOC_MATSUSHITA 0xc3 /* Matsushita Vendor Unique command */ +#define GPCMD_READ_HEADER_SONY 0xc3 /* Sony Vendor Unique command */ +#define GPCMD_SET_STOP_TIME_TOSHIBA 0xc3 /* Toshiba Vendor Unique command */ +#define GPCMD_READ_HEADER_MATSUSHITA 0xc4 /* Matsushita Vendor Unique command */ +#define GPCMD_PLAYBACK_STATUS_TOSHIBA 0xc4 /* Sony Vendor Unique command */ +#define GPCMD_CADDY_EJECT_TOSHIBA 0xc4 /* Toshiba Vendor Unique command */ +#define GPCMD_PAUSE_SONY 0xc5 /* Sony Vendor Unique command */ +#define GPCMD_PLAY_AUDIO_MATSUSHITA 0xc5 /* Matsushita Vendor Unique command */ +#define GPCMD_STOP_CHINON 0xc6 /* Chinon Vendor Unique command */ +#define GPCMD_PLAT_TRACK_SONY 0xc6 /* Sony Vendor Unique command */ +#define GPCMD_READ_SUBCODEQ_PLAYING_STATUS_TOSHIBA 0xc6 /* Toshiba Vendor Unique command */ +#define GPCMD_PLAY_AUDIO_MSF_MATSUSHITA 0xc7 /* Matsushita Vendor Unique command*/ +#define GPCMD_PLAY_MSF_SONY 0xc7 /* Sony Vendor Unique command*/ +#define GPCMD_READ_DISC_INFORMATION_TOSHIBA 0xc7 /* Toshiba Vendor Unique command */ +#define GPCMD_PLAY_AUDIO_TRACK_INDEX_MATSUSHITA 0xc8 /* Matsushita Vendor Unique command */ +#define GPCMD_PLAY_AUDIO_SONY 0xc8 /* Sony Vendor Unique command */ #define GPCMD_PLAY_AUDIO_TRACK_RELATIVE_10_MATSUSHITA 0xc9 /*Matsushita Vendor Unique command */ -#define GPCMD_PLAYBACK_CONTROL_SONY 0xc9 /* Sony Vendor Unique command */ -#define GPCMD_PAUSE_RESUME_MATSUSHITA 0xcb /* Matsushita Vendor Unique command */ -#define GPCMD_SCAN_PIONEER 0xcd /* Should be equivalent to 0xba */ -#define GPCMD_AUDIO_TRACK_SEARCH_NEC 0xd8 /* NEC Vendor Unique command */ -#define GPCMD_PLAY_AUDIO_NEC 0xd9 /* NEC Vendor Unique command */ -#define GPCMD_STILL_NEC 0xda /* NEC Vendor Unique command */ -#define GPCMD_SET_SPEED_ALT 0xda /* Should be equivalent to 0xbb */ -#define GPCMD_SET_STOP_TIME_NEC 0xdb /* NEC Vendor Unique command */ -#define GPCMD_CADDY_EJECT_NEC 0xdc /* NEC Vendor Unique command */ -#define GPCMD_READ_SUBCODEQ_PLAYING_STATUS_NEC 0xdd /* NEC Vendor Unique command */ -#define GPCMD_READ_DISC_INFORMATION_NEC 0xde /* NEC Vendor Unique command */ -#define GPCMD_PLAY_AUDIO_12_MATSUSHITA 0xe5 /* Matsushita Vendor Unique command */ +#define GPCMD_PLAYBACK_CONTROL_SONY 0xc9 /* Sony Vendor Unique command */ +#define GPCMD_PAUSE_RESUME_MATSUSHITA 0xcb /* Matsushita Vendor Unique command */ +#define GPCMD_SCAN_PIONEER 0xcd /* Should be equivalent to 0xba */ +#define GPCMD_AUDIO_TRACK_SEARCH_NEC 0xd8 /* NEC Vendor Unique command */ +#define GPCMD_PLAY_AUDIO_NEC 0xd9 /* NEC Vendor Unique command */ +#define GPCMD_STILL_NEC 0xda /* NEC Vendor Unique command */ +#define GPCMD_SET_SPEED_ALT 0xda /* Should be equivalent to 0xbb */ +#define GPCMD_SET_STOP_TIME_NEC 0xdb /* NEC Vendor Unique command */ +#define GPCMD_CADDY_EJECT_NEC 0xdc /* NEC Vendor Unique command */ +#define GPCMD_READ_SUBCODEQ_PLAYING_STATUS_NEC 0xdd /* NEC Vendor Unique command */ +#define GPCMD_READ_DISC_INFORMATION_NEC 0xde /* NEC Vendor Unique command */ +#define GPCMD_PLAY_AUDIO_12_MATSUSHITA 0xe5 /* Matsushita Vendor Unique command */ #define GPCMD_PLAY_AUDIO_TRACK_RELATIVE_12_MATSUSHITA 0xe9 /* Matsushita Vendor Unique command */ /* Mode page codes for mode sense/set */ -#define GPMODE_R_W_ERROR_PAGE 0x01 -#define GPMODE_DISCONNECT_PAGE 0x02 /* Disconnect/reconnect page */ -#define GPMODE_FORMAT_DEVICE_PAGE 0x03 -#define GPMODE_RIGID_DISK_PAGE 0x04 /* Rigid disk geometry page */ -#define GPMODE_FLEXIBLE_DISK_PAGE 0x05 -#define GPMODE_CACHING_PAGE 0x08 -#define GPMODE_CDROM_PAGE_SONY 0x08 +#define GPMODE_R_W_ERROR_PAGE 0x01 +#define GPMODE_DISCONNECT_PAGE 0x02 /* Disconnect/reconnect page */ +#define GPMODE_FORMAT_DEVICE_PAGE 0x03 +#define GPMODE_RIGID_DISK_PAGE 0x04 /* Rigid disk geometry page */ +#define GPMODE_FLEXIBLE_DISK_PAGE 0x05 +#define GPMODE_CACHING_PAGE 0x08 +#define GPMODE_CDROM_PAGE_SONY 0x08 #define GPMODE_CDROM_AUDIO_PAGE_SONY 0x09 -#define GPMODE_CDROM_PAGE 0x0d -#define GPMODE_CDROM_AUDIO_PAGE 0x0e -#define GPMODE_CAPABILITIES_PAGE 0x2a -#define GPMODE_IOMEGA_PAGE 0x2f -#define GPMODE_UNK_VENDOR_PAGE 0x30 -#define GPMODE_ALL_PAGES 0x3f +#define GPMODE_CDROM_PAGE 0x0d +#define GPMODE_CDROM_AUDIO_PAGE 0x0e +#define GPMODE_CAPABILITIES_PAGE 0x2a +#define GPMODE_IOMEGA_PAGE 0x2f +#define GPMODE_UNK_VENDOR_PAGE 0x30 +#define GPMODE_ALL_PAGES 0x3f /* Mode page codes for presence */ -#define GPMODEP_R_W_ERROR_PAGE 0x0000000000000002LL -#define GPMODEP_DISCONNECT_PAGE 0x0000000000000004LL -#define GPMODEP_FORMAT_DEVICE_PAGE 0x0000000000000008LL -#define GPMODEP_RIGID_DISK_PAGE 0x0000000000000010LL -#define GPMODEP_FLEXIBLE_DISK_PAGE 0x0000000000000020LL -#define GPMODEP_CACHING_PAGE 0x0000000000000100LL -#define GPMODEP_CDROM_PAGE_SONY 0x0000000000000200LL +#define GPMODEP_R_W_ERROR_PAGE 0x0000000000000002LL +#define GPMODEP_DISCONNECT_PAGE 0x0000000000000004LL +#define GPMODEP_FORMAT_DEVICE_PAGE 0x0000000000000008LL +#define GPMODEP_RIGID_DISK_PAGE 0x0000000000000010LL +#define GPMODEP_FLEXIBLE_DISK_PAGE 0x0000000000000020LL +#define GPMODEP_CACHING_PAGE 0x0000000000000100LL +#define GPMODEP_CDROM_PAGE_SONY 0x0000000000000200LL #define GPMODEP_CDROM_AUDIO_PAGE_SONY 0x0000000000000400LL -#define GPMODEP_CDROM_PAGE 0x0000000000002000LL -#define GPMODEP_CDROM_AUDIO_PAGE 0x0000000000004000LL -#define GPMODEP_CAPABILITIES_PAGE 0x0000040000000000LL -#define GPMODEP_IOMEGA_PAGE 0x0000800000000000LL -#define GPMODEP_UNK_VENDOR_PAGE 0x0001000000000000LL -#define GPMODEP_ALL_PAGES 0x8000000000000000LL +#define GPMODEP_CDROM_PAGE 0x0000000000002000LL +#define GPMODEP_CDROM_AUDIO_PAGE 0x0000000000004000LL +#define GPMODEP_CAPABILITIES_PAGE 0x0000040000000000LL +#define GPMODEP_IOMEGA_PAGE 0x0000800000000000LL +#define GPMODEP_UNK_VENDOR_PAGE 0x0001000000000000LL +#define GPMODEP_ALL_PAGES 0x8000000000000000LL /* SCSI Status Codes */ #define SCSI_STATUS_OK 0 @@ -338,7 +338,7 @@ #define MODE_SELECT_PHASE_PAGE_HEADER 3 #define MODE_SELECT_PHASE_PAGE 4 -typedef struct { +typedef struct mode_sense_pages_t { uint8_t pages[0x40][0x40]; } mode_sense_pages_t; @@ -349,34 +349,46 @@ typedef struct scsi_common_s { void *p; - uint8_t *temp_buffer, - atapi_cdb[16], /* This is atapi_cdb in ATAPI-supporting devices, - and pad in SCSI-only devices. */ - current_cdb[16], - sense[256]; + uint8_t *temp_buffer; + uint8_t atapi_cdb[16]; /* This is atapi_cdb in ATAPI-supporting devices, + and pad in SCSI-only devices. */ + uint8_t current_cdb[16]; + uint8_t sense[256]; - uint8_t status, phase, - error, id, - features, cur_lun, - pad0, pad1; + uint8_t status; + uint8_t phase; + uint8_t error; + uint8_t id; + uint8_t features; + uint8_t cur_lun; + uint8_t pad0; + uint8_t pad1; - uint16_t request_length, max_transfer_len; + uint16_t request_length; + uint16_t max_transfer_len; - int requested_blocks, packet_status, - total_length, do_page_save, - unit_attention, request_pos, - old_len, media_status; + int requested_blocks; + int packet_status; + int total_length; + int do_page_save; + int unit_attention; + int request_pos; + int old_len; + int media_status; - uint32_t sector_pos, sector_len, - packet_len, pos; + uint32_t sector_pos; + uint32_t sector_len; + uint32_t packet_len; + uint32_t pos; double callback; } scsi_common_t; -typedef struct { +typedef struct scsi_device_t { int32_t buffer_length; - uint8_t status, phase; + uint8_t status; + uint8_t phase; uint16_t type; scsi_common_t *sc; diff --git a/src/include/86box/scsi_disk.h b/src/include/86box/scsi_disk.h index bff40a396..ebf21c073 100644 --- a/src/include/86box/scsi_disk.h +++ b/src/include/86box/scsi_disk.h @@ -16,31 +16,42 @@ #ifndef SCSI_DISK_H #define SCSI_DISK_H -typedef struct { +typedef struct scsi_disk_t { mode_sense_pages_t ms_pages_saved; hard_disk_t *drv; - uint8_t *temp_buffer, - pad[16], /* This is atapi_cdb in ATAPI-supporting devices, - and pad in SCSI-only devices. */ - current_cdb[16], - sense[256]; + uint8_t *temp_buffer; + uint8_t pad[16]; /* This is atapi_cdb in ATAPI-supporting devices, + and pad in SCSI-only devices. */ + uint8_t current_cdb[16]; + uint8_t sense[256]; - uint8_t status, phase, - error, id, - pad0, cur_lun, - pad1, pad2; + uint8_t status; + uint8_t phase; + uint8_t error; + uint8_t id; + uint8_t pad0; + uint8_t cur_lun; + uint8_t pad1; + uint8_t pad2; - uint16_t request_length, pad4; + uint16_t request_length; + uint16_t pad4; - int requested_blocks, packet_status, - total_length, do_page_save, - unit_attention, pad5, - pad6, pad7; + int requested_blocks; + int packet_status; + int total_length; + int do_page_save; + int unit_attention; + int pad5; + int pad6; + int pad7; - uint32_t sector_pos, sector_len, - packet_len, pos; + uint32_t sector_pos; + uint32_t sector_len; + uint32_t packet_len; + uint32_t pos; double callback; } scsi_disk_t; diff --git a/src/include/86box/scsi_x54x.h b/src/include/86box/scsi_x54x.h index a20f1e788..213873c5a 100644 --- a/src/include/86box/scsi_x54x.h +++ b/src/include/86box/scsi_x54x.h @@ -196,51 +196,51 @@ #define MAX_SG_DESCRIPTORS 32 /* Always make the array 32 elements long, if less are used, that's not an issue. */ #pragma pack(push, 1) -typedef struct { +typedef struct addr24_s { uint8_t hi; uint8_t mid; uint8_t lo; -} addr24; +} addr24_t; /* Structure for the INQUIRE_SETUP_INFORMATION reply. */ -typedef struct { - uint8_t uOffset : 4, - uTransferPeriod : 3, - fSynchronous : 1; +typedef struct ReplyInquireSetupInformationSynchronousValue_t { + uint8_t uOffset : 4; + uint8_t uTransferPeriod : 3; + uint8_t fSynchronous : 1; } ReplyInquireSetupInformationSynchronousValue; -typedef struct { - uint8_t fSynchronousInitiationEnabled : 1, - fParityCheckingEnabled : 1, - uReserved1 : 6; +typedef struct ReplyInquireSetupInformation_t { + uint8_t fSynchronousInitiationEnabled : 1; + uint8_t fParityCheckingEnabled : 1; + uint8_t uReserved1 : 6; uint8_t uBusTransferRate; uint8_t uPreemptTimeOnBus; uint8_t uTimeOffBus; uint8_t cMailbox; - addr24 MailboxAddress; + addr24_t MailboxAddress; ReplyInquireSetupInformationSynchronousValue SynchronousValuesId0To7[8]; uint8_t uDisconnectPermittedId0To7; uint8_t VendorSpecificData[28]; } ReplyInquireSetupInformation; -typedef struct { +typedef struct MailboxInit_t { uint8_t Count; - addr24 Address; + addr24_t Address; } MailboxInit_t; -typedef struct { - uint8_t CmdStatus; - addr24 CCBPointer; +typedef struct Mailbox_t { + uint8_t CmdStatus; + addr24_t CCBPointer; } Mailbox_t; -typedef struct { +typedef struct Mailbox32_t { uint32_t CCBPointer; union { - struct { + struct out_t { uint8_t Reserved[3]; uint8_t ActionCode; } out; - struct { + struct in_t { uint8_t HostStatus; uint8_t TargetStatus; uint8_t Reserved; @@ -255,7 +255,7 @@ typedef struct { Bytes 16 and 17 Reserved (must be 0) Bytes 18 through 18+n-1, where n=size of CDB Command Descriptor Block */ -typedef struct { +typedef struct CCB32_t { uint8_t Opcode; uint8_t Reserved1 : 3, ControlByte : 2, @@ -277,24 +277,24 @@ typedef struct { uint32_t SensePointer; } CCB32; -typedef struct { - uint8_t Opcode; - uint8_t Lun : 3, - ControlByte : 2, - Id : 3; - uint8_t CdbLength; - uint8_t RequestSenseLength; - addr24 DataLength; - addr24 DataPointer; - addr24 LinkPointer; - uint8_t LinkId; - uint8_t HostStatus; - uint8_t TargetStatus; - uint8_t Reserved[2]; - uint8_t Cdb[12]; +typedef struct CCB_t { + uint8_t Opcode; + uint8_t Lun : 3; + uint8_t ControlByte : 2; + uint8_t Id : 3; + uint8_t CdbLength; + uint8_t RequestSenseLength; + addr24_t DataLength; + addr24_t DataPointer; + addr24_t LinkPointer; + uint8_t LinkId; + uint8_t HostStatus; + uint8_t TargetStatus; + uint8_t Reserved[2]; + uint8_t Cdb[12]; } CCB; -typedef struct { +typedef struct CCBC_t { uint8_t Opcode; uint8_t Pad1 : 3, ControlByte : 2, @@ -309,7 +309,7 @@ typedef struct { uint8_t Cdb[12]; } CCBC; -typedef union { +typedef union CCBU_t { CCB32 new; CCB old; CCBC common; @@ -320,26 +320,25 @@ typedef struct { uint8_t *RequestSenseBuffer; uint32_t CCBPointer; int Is24bit; - uint8_t TargetID, - LUN, - HostStatus, - TargetStatus, - MailboxCompletionCode; + uint8_t TargetID; + uint8_t LUN; + uint8_t HostStatus; + uint8_t TargetStatus; + uint8_t MailboxCompletionCode; } Req_t; -typedef struct -{ +typedef struct BIOSCMD_t { uint8_t command; uint8_t lun : 3, reserved : 2, id : 3; union { - struct { + struct chs_t { uint16_t cyl; uint8_t head; uint8_t sec; } chs; - struct { + struct lba_t { uint8_t lba0; /* MSB */ uint8_t lba1; uint8_t lba2; @@ -347,17 +346,17 @@ typedef struct } lba; } u; uint8_t secount; - addr24 dma_address; + addr24_t dma_address; } BIOSCMD; -typedef struct { +typedef struct SGE32_t { uint32_t Segment; uint32_t SegmentPointer; } SGE32; -typedef struct { - addr24 Segment; - addr24 SegmentPointer; +typedef struct SGE_t { + addr24_t Segment; + addr24_t SegmentPointer; } SGE; #pragma pack(pop) @@ -368,92 +367,111 @@ typedef struct { #define X54X_MBX_24BIT 16 #define X54X_ISAPNP 32 -typedef struct { +typedef struct x54x_t { /* 32 bytes */ - char vendor[16], /* name of device vendor */ - name[16]; /* name of device */ + char vendor[16]; /* name of device vendor */ + char name[16]; /* name of device */ /* 24 bytes */ - int8_t type, /* type of device */ - IrqEnabled, Irq, - DmaChannel, - HostID; + int8_t type; /* type of device */ + int8_t IrqEnabled; + int8_t Irq; + int8_t DmaChannel; + int8_t HostID; - uint8_t callback_phase : 4, - callback_sub_phase : 4, - scsi_cmd_phase, bus, - sync, - parity, shram_mode, - Geometry, Control, - Command, CmdParam, - BusOnTime, BusOffTime, - ATBusSpeed, setup_info_len, - max_id, pci_slot, - temp_cdb[12]; + uint8_t callback_phase : 4; + uint8_t callback_sub_phase : 4; + uint8_t scsi_cmd_phase; + uint8_t bus; + uint8_t sync; + uint8_t parity; + uint8_t shram_mode; + uint8_t Geometry; + uint8_t Control; + uint8_t Command; + uint8_t CmdParam; + uint8_t BusOnTime; + uint8_t BusOffTime; + uint8_t ATBusSpeed; + uint8_t setup_info_len; + uint8_t max_id; + uint8_t pci_slot; + uint8_t temp_cdb[12]; - volatile uint8_t /* for multi-threading, keep */ - Status, - Interrupt, /* these volatile */ - MailboxIsBIOS, ToRaise, - flags; + /* for multi-threading, keep these volatile */ + volatile uint8_t Status; + volatile uint8_t Interrupt; + volatile uint8_t MailboxIsBIOS; + volatile uint8_t ToRaise; + volatile uint8_t flags; /* 65928 bytes */ - uint8_t pos_regs[8], /* MCA */ - CmdBuf[128], - DataBuf[65536], - shadow_ram[128], - dma_buffer[128], - cmd_33_buf[4096]; + uint8_t pos_regs[8]; /* MCA */ + uint8_t CmdBuf[128]; + uint8_t DataBuf[65536]; + uint8_t shadow_ram[128]; + uint8_t dma_buffer[128]; + uint8_t cmd_33_buf[4096]; /* 16 bytes */ char *fw_rev; /* The 4 bytes of the revision command information + 2 extra bytes for BusLogic */ - uint8_t *rom1, /* main BIOS image */ - *rom2, /* SCSI-Select image */ - *nvr; /* EEPROM buffer */ + uint8_t *rom1; /* main BIOS image */ + uint8_t *rom2; /* SCSI-Select image */ + uint8_t *nvr; /* EEPROM buffer */ /* 6 words = 12 bytes */ - uint16_t DataReply, DataReplyLeft, - rom_ioaddr, /* offset in BIOS of I/O addr */ - rom_shram, /* index to shared RAM */ - rom_shramsz, /* size of shared RAM */ - rom_fwhigh, /* offset in BIOS of ver ID */ - pnp_len, /* length of the PnP ROM */ - pnp_offset, /* offset in the microcode ROM of the PnP ROM */ - cmd_33_len, /* length of the SCSISelect code decompressor program */ - cmd_33_offset; /* offset in the microcode ROM of the SCSISelect code decompressor program */ + uint16_t DataReply; + uint16_t DataReplyLeft; + uint16_t rom_ioaddr; /* offset in BIOS of I/O addr */ + uint16_t rom_shram; /* index to shared RAM */ + uint16_t rom_shramsz; /* size of shared RAM */ + uint16_t rom_fwhigh; /* offset in BIOS of ver ID */ + uint16_t pnp_len; /* length of the PnP ROM */ + uint16_t pnp_offset; /* offset in the microcode ROM of the PnP ROM */ + uint16_t cmd_33_len; /* length of the SCSISelect code decompressor program */ + uint16_t cmd_33_offset; /* offset in the microcode ROM of the SCSISelect code decompressor program */ /* 16 + 20 + 52 = 88 bytes */ - volatile int - MailboxOutInterrupts, - PendingInterrupt, Lock, - target_data_len, pad0; + volatile int MailboxOutInterrupts; + volatile int PendingInterrupt; + volatile int Lock; + volatile int target_data_len; + volatile int pad0; - uint32_t Base, fdc_address, rom_addr, /* address of BIOS ROM */ - CmdParamLeft, Outgoing, - transfer_size; + uint32_t Base; + uint32_t fdc_address; + uint32_t rom_addr; /* address of BIOS ROM */ + uint32_t CmdParamLeft; + uint32_t Outgoing; + uint32_t transfer_size; - volatile uint32_t - MailboxInit, - MailboxCount, - MailboxOutAddr, MailboxOutPosCur, - MailboxInAddr, MailboxInPosCur, - MailboxReq, - BIOSMailboxInit, BIOSMailboxCount, - BIOSMailboxOutAddr, BIOSMailboxOutPosCur, - BIOSMailboxReq, - Residue, card_bus; /* Basically a copy of device flags */ + volatile uint32_t MailboxInit; + volatile uint32_t MailboxCount; + volatile uint32_t MailboxOutAddr; + volatile uint32_t MailboxOutPosCur; + volatile uint32_t MailboxInAddr; + volatile uint32_t MailboxInPosCur; + volatile uint32_t MailboxReq; + volatile uint32_t BIOSMailboxInit; + volatile uint32_t BIOSMailboxCount; + volatile uint32_t BIOSMailboxOutAddr; + volatile uint32_t BIOSMailboxOutPosCur; + volatile uint32_t BIOSMailboxReq; + volatile uint32_t Residue; + volatile uint32_t card_bus; /* Basically a copy of device flags */ /* 8 bytes */ uint64_t temp_period; /* 16 bytes */ - double media_period, ha_bps; /* bytes per second */ + double media_period; + double ha_bps; /* bytes per second */ /* 8 bytes */ - char *bios_path, /* path to BIOS image file */ - *mcode_path, /* path to microcode image file, needed by the AHA-1542CP */ - *nvr_path; /* path to NVR image file */ + char *bios_path; /* path to BIOS image file */ + char *mcode_path; /* path to microcode image file, needed by the AHA-1542CP */ + char *nvr_path; /* path to NVR image file */ /* 56 bytes */ /* Pointer to a structure of vendor-specific data that only the vendor-specific code can understand */ @@ -486,12 +504,13 @@ typedef struct { /* Pointer to a function that resets vendor-specific data */ void (*ven_reset)(void *p); - rom_t bios, /* BIOS memory descriptor */ - uppersck; /* BIOS memory descriptor */ + rom_t bios; /* BIOS memory descriptor */ + rom_t uppersck; /* BIOS memory descriptor */ mem_mapping_t mmio_mapping; - pc_timer_t timer, ResetCB; + pc_timer_t timer; + pc_timer_t ResetCB; Req_t Req; diff --git a/src/include/86box/serial.h b/src/include/86box/serial.h index 8ed3606a7..b27e54c5e 100644 --- a/src/include/86box/serial.h +++ b/src/include/86box/serial.h @@ -48,23 +48,52 @@ struct serial_device_s; struct serial_s; typedef struct serial_s { - uint8_t lsr, thr, mctrl, rcr, - iir, ier, lcr, msr, - dat, int_status, scratch, fcr, - irq, type, inst, transmit_enabled, - fifo_enabled, rcvr_fifo_len, bits, data_bits, - baud_cycles, rcvr_fifo_full, txsr, out, - msr_set, pad, pad0, pad1; + uint8_t lsr; + uint8_t thr; + uint8_t mctrl; + uint8_t rcr; + uint8_t iir; + uint8_t ier; + uint8_t lcr; + uint8_t msr; + uint8_t dat; + uint8_t int_status; + uint8_t scratch; + uint8_t fcr; + uint8_t irq; + uint8_t type; + uint8_t inst; + uint8_t transmit_enabled; + uint8_t fifo_enabled; + uint8_t rcvr_fifo_len; + uint8_t bits; + uint8_t data_bits; + uint8_t baud_cycles; + uint8_t rcvr_fifo_full; + uint8_t txsr; + uint8_t out; + uint8_t msr_set; + uint8_t pad; + uint8_t pad0; + uint8_t pad1; - uint16_t dlab, base_address, out_new, pad2; + uint16_t dlab; + uint16_t base_address; + uint16_t out_new; + uint16_t pad2; - uint8_t rcvr_fifo_pos, xmit_fifo_pos, - rcvr_fifo_end, xmit_fifo_end, - rcvr_fifo[SERIAL_FIFO_SIZE], xmit_fifo[SERIAL_FIFO_SIZE]; + uint8_t rcvr_fifo_pos; + uint8_t xmit_fifo_pos; + uint8_t rcvr_fifo_end; + uint8_t xmit_fifo_end; + uint8_t rcvr_fifo[SERIAL_FIFO_SIZE]; + uint8_t xmit_fifo[SERIAL_FIFO_SIZE]; - pc_timer_t transmit_timer, timeout_timer, - receive_timer; - double clock_src, transmit_period; + pc_timer_t transmit_timer; + pc_timer_t timeout_timer; + pc_timer_t receive_timer; + double clock_src; + double transmit_period; struct serial_device_s *sd; } serial_t; @@ -78,7 +107,7 @@ typedef struct serial_device_s { serial_t *serial; } serial_device_t; -typedef struct { +typedef struct serial_port_s { uint8_t enabled; } serial_port_t; diff --git a/src/include/86box/serial_passthrough.h b/src/include/86box/serial_passthrough.h index 9612b9500..7ca6479d6 100644 --- a/src/include/86box/serial_passthrough.h +++ b/src/include/86box/serial_passthrough.h @@ -43,7 +43,8 @@ typedef struct serial_passthrough_s { pc_timer_t serial_to_host_timer; serial_t *serial; double baudrate; - uint8_t bits, data_bits; + uint8_t bits; + uint8_t data_bits; uint8_t port; uint8_t data; char slave_pt[32]; /* used for pseudo term name of slave side */ diff --git a/src/include/86box/smbus.h b/src/include/86box/smbus.h index 9bb429b43..340d1d00e 100644 --- a/src/include/86box/smbus.h +++ b/src/include/86box/smbus.h @@ -26,27 +26,39 @@ enum { SMBUS_PIIX4 = 0, - SMBUS_VIA + SMBUS_VIA = 1 }; -typedef struct { - uint32_t local; - uint16_t io_base; - int clock; - double bit_period; - uint8_t stat, next_stat, ctl, cmd, addr, - data0, data1, - index, data[SMBUS_PIIX4_BLOCK_DATA_SIZE]; +typedef struct smbus_piix4_t { + uint32_t local; + uint16_t io_base; + int clock; + double bit_period; + uint8_t stat; + uint8_t next_stat; + uint8_t ctl; + uint8_t cmd; + uint8_t addr; + uint8_t data0; + uint8_t data1; + uint8_t index; + uint8_t data[SMBUS_PIIX4_BLOCK_DATA_SIZE]; pc_timer_t response_timer; void *i2c; } smbus_piix4_t; -typedef struct { - uint32_t local; - uint16_t io_base; - uint8_t stat, next_stat, ctl, cmd, addr, - data0, data1, - index, data[SMBUS_ALI7101_BLOCK_DATA_SIZE]; +typedef struct smbus_ali7101_t { + uint32_t local; + uint16_t io_base; + uint8_t stat; + uint8_t next_stat; + uint8_t ctl; + uint8_t cmd; + uint8_t addr; + uint8_t data0; + uint8_t data1; + uint8_t index; + uint8_t data[SMBUS_ALI7101_BLOCK_DATA_SIZE]; pc_timer_t response_timer; void *i2c; } smbus_ali7101_t; diff --git a/src/include/86box/smram.h b/src/include/86box/smram.h index 84d1cbe8d..707c967f5 100644 --- a/src/include/86box/smram.h +++ b/src/include/86box/smram.h @@ -19,13 +19,16 @@ #define EMU_SMRAM_H typedef struct _smram_ { - struct _smram_ *prev, *next; + struct _smram_ *prev; + struct _smram_ *next; mem_mapping_t mapping; - uint32_t host_base, ram_base, - size, - old_host_base, old_size; + uint32_t host_base; + uint32_t ram_base; + uint32_t size; + uint32_t old_host_base; + uint32_t old_size; } smram_t; /* Make a backup copy of host_base and size of all the SMRAM structs, needed so that if diff --git a/src/include/86box/snd_ac97.h b/src/include/86box/snd_ac97.h index d6d2eacae..ee75d56c4 100644 --- a/src/include/86box/snd_ac97.h +++ b/src/include/86box/snd_ac97.h @@ -93,31 +93,31 @@ /* New codecs should be added to the end of this enum to avoid breaking configs. */ enum { - AC97_CODEC_AD1881 = 0, - AC97_CODEC_ALC100, - AC97_CODEC_CS4297, - AC97_CODEC_CS4297A, - AC97_CODEC_WM9701A, - AC97_CODEC_STAC9708, - AC97_CODEC_STAC9721, - AC97_CODEC_AK4540 + AC97_CODEC_AD1881 = 0, + AC97_CODEC_ALC100 = 1, + AC97_CODEC_CS4297 = 2, + AC97_CODEC_CS4297A = 3, + AC97_CODEC_WM9701A = 4, + AC97_CODEC_STAC9708 = 5, + AC97_CODEC_STAC9721 = 6, + AC97_CODEC_AK4540 = 7 }; -typedef struct { +typedef struct ac97_vendor_reg_t { const uint16_t index; const uint16_t value; const uint16_t write_mask; } ac97_vendor_reg_t; -typedef struct { - uint32_t vendor_id; - uint32_t min_rate; - uint32_t max_rate; - uint32_t misc_flags; - uint16_t reset_flags; - uint16_t extid_flags; - uint16_t powerdown_mask; - uint16_t regs[64]; +typedef struct ac97_codec_t { + uint32_t vendor_id; + uint32_t min_rate; + uint32_t max_rate; + uint32_t misc_flags; + uint16_t reset_flags; + uint16_t extid_flags; + uint16_t powerdown_mask; + uint16_t regs[64]; uint8_t codec_id; uint8_t vendor_reg_page_max; const ac97_vendor_reg_t *vendor_regs; diff --git a/src/include/86box/snd_ad1848.h b/src/include/86box/snd_ad1848.h index 76fc775db..be7831fb4 100644 --- a/src/include/86box/snd_ad1848.h +++ b/src/include/86box/snd_ad1848.h @@ -24,26 +24,42 @@ enum { AD1848_TYPE_DEFAULT = 0, - AD1848_TYPE_CS4248, - AD1848_TYPE_CS4231, - AD1848_TYPE_CS4235, - AD1848_TYPE_CS4236 + AD1848_TYPE_CS4248 = 1, + AD1848_TYPE_CS4231 = 2, + AD1848_TYPE_CS4235 = 3, + AD1848_TYPE_CS4236 = 4 }; -typedef struct { - uint8_t type, index, xindex, regs[32], xregs[32], status; /* 16 original registers + 16 CS4231A extensions + 32 CS4236 extensions */ +typedef struct ad1848_t { + uint8_t type; + uint8_t index; + uint8_t xindex; + uint8_t regs[32]; + uint8_t xregs[32]; + uint8_t status; /* 16 original registers + 16 CS4231A extensions + 32 CS4236 extensions */ int count; - uint8_t trd, mce, wten : 1; + uint8_t trd; + uint8_t mce; + uint8_t wten : 1; - int16_t out_l, out_r; - double cd_vol_l, cd_vol_r; - int fm_vol_l, fm_vol_r; - uint8_t fmt_mask, wave_vol_mask; + int16_t out_l; + int16_t out_r; + double cd_vol_l; + double cd_vol_r; + int fm_vol_l; + int fm_vol_r; + uint8_t fmt_mask; + uint8_t wave_vol_mask; - uint8_t enable : 1, irq : 4, dma : 3, adpcm_ref; + uint8_t enable : 1; + uint8_t irq : 4; + uint8_t dma : 3; + uint8_t adpcm_ref; int8_t adpcm_step; - int freq, adpcm_data, adpcm_pos; + int freq; + int adpcm_data; + int adpcm_pos; pc_timer_t timer_count; uint64_t timer_latch; diff --git a/src/include/86box/snd_emu8k.h b/src/include/86box/snd_emu8k.h index a163bdeaf..dd01eaac0 100644 --- a/src/include/86box/snd_emu8k.h +++ b/src/include/86box/snd_emu8k.h @@ -85,10 +85,14 @@ typedef struct emu8k_mem_pointers_t { */ typedef struct emu8k_envelope_t { int state; - int32_t delay_samples, hold_samples, attack_samples; - int32_t value_amp_hz, value_db_oct; + int32_t delay_samples; + int32_t hold_samples; + int32_t attack_samples; + int32_t value_amp_hz; + int32_t value_db_oct; int32_t sustain_value_db_oct; - int32_t attack_amount_amp_hz, ramp_amount_db_oct; + int32_t attack_amount_amp_hz; + int32_t ramp_amount_db_oct; } emu8k_envelope_t; typedef struct emu8k_chorus_eng_t { @@ -320,10 +324,14 @@ typedef struct emu8k_voice_t { emu8k_envelope_t vol_envelope; emu8k_envelope_t mod_envelope; - int64_t lfo1_speed, lfo2_speed; - emu8k_mem_internal_t lfo1_count, lfo2_count; - int32_t lfo1_delay_samples, lfo2_delay_samples; - int vol_l, vol_r; + int64_t lfo1_speed; + int64_t lfo2_speed; + emu8k_mem_internal_t lfo1_count; + emu8k_mem_internal_t lfo2_count; + int32_t lfo1_delay_samples; + int32_t lfo2_delay_samples; + int vol_l; + int vol_r; int16_t fixed_modenv_filter_height; int16_t fixed_modenv_pitch_height; @@ -342,28 +350,44 @@ typedef struct emu8k_voice_t { typedef struct emu8k_t { emu8k_voice_t voice[32]; - uint16_t hwcf1, hwcf2, hwcf3; - uint32_t hwcf4, hwcf5, hwcf6, hwcf7; + uint16_t hwcf1; + uint16_t hwcf2; + uint16_t hwcf3; + uint32_t hwcf4; + uint32_t hwcf5; + uint32_t hwcf6; + uint32_t hwcf7; - uint16_t init1[32], init2[32], init3[32], init4[32]; + uint16_t init1[32]; + uint16_t init2[32]; + uint16_t init3[32]; + uint16_t init4[32]; - uint32_t smalr, smarr, smalw, smarw; - uint16_t smld_buffer, smrd_buffer; + uint32_t smalr; + uint32_t smarr; + uint32_t smalw; + uint32_t smarw; + uint16_t smld_buffer; + uint16_t smrd_buffer; uint16_t wc; uint16_t id; /* The empty block is used to act as an unallocated memory returning zero. */ - int16_t *ram, *rom, *empty; + int16_t *ram; + int16_t *rom; + int16_t *empty; /* RAM pointers are a way to avoid checking ram boundaries on read */ int16_t *ram_pointers[0x100]; uint32_t ram_end_addr; - int cur_reg, cur_voice; + int cur_reg; + int cur_voice; - int16_t out_l, out_r; + int16_t out_l; + int16_t out_r; emu8k_chorus_eng_t chorus_engine; int32_t chorus_in_buffer[SOUNDBUFLEN]; diff --git a/src/include/86box/snd_mpu401.h b/src/include/86box/snd_mpu401.h index 00fdd54f6..ed8b89de7 100644 --- a/src/include/86box/snd_mpu401.h +++ b/src/include/86box/snd_mpu401.h @@ -71,74 +71,112 @@ typedef enum RecState { typedef struct mpu_t { uint16_t addr; - int uart_mode, intelligent, - irq, midi_thru, - queue_pos, queue_used; - uint8_t rx_data, is_mca, - status, - queue[MPU401_QUEUE], pos_regs[8]; + int uart_mode; + int intelligent; + int irq; + int midi_thru; + int queue_pos; + int queue_used; + uint8_t rx_data; + uint8_t is_mca; + uint8_t status; + uint8_t queue[MPU401_QUEUE]; + uint8_t pos_regs[8]; MpuMode mode; uint8_t rec_queue[MPU401_INPUT_QUEUE]; - int rec_queue_pos, rec_queue_used; + int rec_queue_pos; + int rec_queue_used; uint32_t ch_toref[16]; struct track { - int counter; - uint8_t value[3], sys_val, - vlength, length; + int counter; + uint8_t value[3]; + uint8_t sys_val; + uint8_t vlength; + uint8_t length; MpuDataType type; } playbuf[8], condbuf; struct { - int conductor, cond_req, - cond_set, block_ack, - playing, reset, - wsd, wsm, wsd_start, - run_irq, irq_pending, - track_req, - send_now, eoi_scheduled, - data_onoff, clock_to_host, - sync_in, sysex_in_finished, - rec_copy; + int conductor; + int cond_req; + int cond_set; + int block_ack; + int playing; + int reset; + int wsd; + int wsm; + int wsd_start; + int run_irq; + int irq_pending; + int track_req; + int send_now; + int eoi_scheduled; + int data_onoff; + int clock_to_host; + int sync_in; + int sysex_in_finished; + int rec_copy; RecState rec; - uint8_t tmask, cmask, - amask, - last_rtcmd; - uint16_t midi_mask, req_mask; - uint32_t command_byte, cmd_pending, - track, old_track; + uint8_t tmask; + uint8_t cmask; + uint8_t amask; + uint8_t last_rtcmd; + uint16_t midi_mask; + uint16_t req_mask; + uint32_t command_byte; + uint32_t cmd_pending; + uint32_t track; + uint32_t old_track; } state; struct { - uint8_t timebase, old_timebase, - tempo, old_tempo, - tempo_rel, old_tempo_rel, - tempo_grad, cth_rate[4], - cth_mode, midimetro, - metromeas; - uint32_t cth_counter, cth_old, - rec_counter; - int32_t measure_counter, meas_old, - freq; - int ticks_in, active; - float freq_mod; + uint8_t timebase; + uint8_t old_timebase; + uint8_t tempo; + uint8_t old_tempo; + uint8_t tempo_rel; + uint8_t old_tempo_rel; + uint8_t tempo_grad; + uint8_t cth_rate[4]; + uint8_t cth_mode; + uint8_t midimetro; + uint8_t metromeas; + uint32_t cth_counter; + uint32_t cth_old; + uint32_t rec_counter; + int32_t measure_counter; + int32_t meas_old; + int32_t freq; + int ticks_in; + int active; + float freq_mod; } clock; struct { - int all_thru, midi_thru, - sysex_thru, commonmsgs_thru, - modemsgs_in, commonmsgs_in, - bender_in, sysex_in, - allnotesoff_out, rt_affection, - rt_out, rt_in, - timing_in_stop, data_in_stop, - rec_measure_end; + int all_thru; + int midi_thru; + int sysex_thru; + int commonmsgs_thru; + int modemsgs_in; + int commonmsgs_in; + int bender_in; + int sysex_in; + int allnotesoff_out; + int rt_affection; + int rt_out; + int rt_in; + int timing_in_stop; + int data_in_stop; + int rec_measure_end; uint8_t prchg_buf[16]; uint16_t prchg_mask; } filter; struct { int on; - uint8_t chan, trmask; + uint8_t chan; + uint8_t trmask; uint32_t key[4]; } chanref[5], inputref[16]; - pc_timer_t mpu401_event_callback, mpu401_eoi_callback, - mpu401_reset_callback; + pc_timer_t mpu401_event_callback; + pc_timer_t mpu401_eoi_callback; + pc_timer_t mpu401_reset_callback; void (*ext_irq_update)(void *priv, int set); int (*ext_irq_pending)(void *priv); void *priv; diff --git a/src/include/86box/snd_opl.h b/src/include/86box/snd_opl.h index b4f26543d..3a3f93ad5 100644 --- a/src/include/86box/snd_opl.h +++ b/src/include/86box/snd_opl.h @@ -18,20 +18,20 @@ #define SOUND_OPL_H enum fm_type { - FM_YM3812 = 0, - FM_YMF262, - FM_YMF289B, - FM_YMF278B, - FM_MAX + FM_YM3812 = 0, /* OPL2 */ + FM_YMF262 = 1, /* OPL3 */ + FM_YMF289B = 2, /* OPL3-L */ + FM_YMF278B = 3, /* OPL 4 */ + FM_MAX = 4 }; enum fm_driver { FM_DRV_NUKED = 0, - FM_DRV_YMFM, - FM_DRV_MAX + FM_DRV_YMFM = 1, + FM_DRV_MAX = 2 }; -typedef struct { +typedef struct fm_drv_t { uint8_t (*read)(uint16_t port, void *priv); void (*write)(uint16_t port, uint8_t val, void *priv); int32_t *(*update)(void *priv); diff --git a/src/include/86box/snd_sb.h b/src/include/86box/snd_sb.h index 88f2c74f1..4c6b2bba7 100644 --- a/src/include/86box/snd_sb.h +++ b/src/include/86box/snd_sb.h @@ -48,16 +48,16 @@ typedef struct sb_ct1335_mixer_t { /* SB PRO */ typedef struct sb_ct1345_mixer_t { - double master_l, - master_r; - double voice_l, - voice_r; - double fm_l, - fm_r; - double cd_l, - cd_r; - double line_l, - line_r; + double master_l; + double master_r; + double voice_l; + double voice_r; + double fm_l; + double fm_r; + double cd_l; + double cd_r; + double line_l; + double line_r; double mic; /*see sb_ct1745_mixer for values for input selector*/ int32_t input_selector; @@ -76,23 +76,23 @@ typedef struct sb_ct1345_mixer_t { /* SB16 and AWE32 */ typedef struct sb_ct1745_mixer_t { - double master_l, - master_r; - double voice_l, - voice_r; - double fm_l, - fm_r; - double cd_l, - cd_r; - double line_l, - line_r; + double master_l; + double master_r; + double voice_l; + double voice_r; + double fm_l; + double fm_r; + double cd_l; + double cd_r; + double line_l; + double line_r; double mic; double speaker; - int bass_l, - bass_r; - int treble_l, - treble_r; + int bass_l; + int bass_r; + int treble_l; + int treble_r; int output_selector; #define OUTPUT_MIC 1 @@ -125,12 +125,12 @@ typedef struct sb_ct1745_mixer_t { } sb_ct1745_mixer_t; typedef struct sb_t { - uint8_t cms_enabled, - opl_enabled, - mixer_enabled; + uint8_t cms_enabled; + uint8_t opl_enabled; + uint8_t mixer_enabled; cms_t cms; - fm_drv_t opl, - opl2; + fm_drv_t opl; + fm_drv_t opl2; sb_dsp_t dsp; union { sb_ct1335_mixer_t mixer_sb2; @@ -143,8 +143,8 @@ typedef struct sb_t { int pos; - uint8_t pos_regs[8], - pnp_rom[512]; + uint8_t pos_regs[8]; + uint8_t pnp_rom[512]; uint16_t opl_pnp_addr; diff --git a/src/include/86box/snd_sb_dsp.h b/src/include/86box/snd_sb_dsp.h index 1e9a91828..86f1ee529 100644 --- a/src/include/86box/snd_sb_dsp.h +++ b/src/include/86box/snd_sb_dsp.h @@ -15,19 +15,34 @@ typedef struct sb_dsp_t { int sb_subtype; /* which clone */ void *parent; /* "sb_t *" if default subtype, "azt2316a_t *" if aztech. */ - int sb_8_length, sb_8_origlength, sb_8_format, sb_8_autoinit, sb_8_pause, sb_8_enable, sb_8_autolen, sb_8_output; + int sb_8_length; + int sb_8_origlength; + int sb_8_format; + int sb_8_autoinit; + int sb_8_pause; + int sb_8_enable; + int sb_8_autolen; + int sb_8_output; int sb_8_dmanum; - int sb_16_length, sb_16_origlength, sb_16_format, sb_16_autoinit, sb_16_pause, sb_16_enable, sb_16_autolen, sb_16_output; + int sb_16_length; + int sb_16_origlength; + int sb_16_format; + int sb_16_autoinit; + int sb_16_pause; + int sb_16_enable; + int sb_16_autolen; + int sb_16_output; int sb_16_dmanum; int sb_pausetime; - int (*dma_readb)(void *priv), - (*dma_readw)(void *priv), - (*dma_writeb)(void *priv, uint8_t val), - (*dma_writew)(void *priv, uint16_t val); + int (*dma_readb)(void *priv); + int (*dma_readw)(void *priv); + int (*dma_writeb)(void *priv, uint8_t val); + int (*dma_writew)(void *priv, uint16_t val); void *dma_priv; uint8_t sb_read_data[256]; - int sb_read_wp, sb_read_rp; + int sb_read_wp; + int sb_read_rp; int sb_speaker; int muted; @@ -41,8 +56,8 @@ typedef struct sb_dsp_t { int midi_in_timestamp; int sb_irqnum; - void (*irq_update)(void *priv, int set), - *irq_priv; + void (*irq_update)(void *priv, int set); + void *irq_priv; uint8_t sbe2; int sbe2count; @@ -53,23 +68,30 @@ typedef struct sb_dsp_t { int16_t sbdat; int sbdat2; - int16_t sbdatl, sbdatr; + int16_t sbdatl; + int16_t sbdatr; uint8_t sbref; int8_t sbstep; int sbdacpos; - int sbleftright, sbleftright_default; + int sbleftright; + int sbleftright_default; int sbreset; uint8_t sbreaddat; uint8_t sb_command; uint8_t sb_test; - int sb_timei, sb_timeo; + int sb_timei; + int sb_timeo; - int sb_irq8, sb_irq16, sb_irq401; - int sb_irqm8, sb_irqm16, sb_irqm401; + int sb_irq8; + int sb_irq16; + int sb_irq401; + int sb_irqm8; + int sb_irqm16; + int sb_irqm401; uint8_t sb_asp_regs[256]; uint8_t sb_asp_mode; @@ -79,11 +101,14 @@ typedef struct sb_dsp_t { uint8_t sb_8051_ram[256]; - int sbenable, sb_enable_i; + int sbenable; + int sb_enable_i; - pc_timer_t output_timer, input_timer; + pc_timer_t output_timer; + pc_timer_t input_timer; - double sblatcho, sblatchi; + double sblatcho; + double sblatchi; uint16_t sb_addr; diff --git a/src/include/86box/snd_sn76489.h b/src/include/86box/snd_sn76489.h index c8a3a567c..6e7399d54 100644 --- a/src/include/86box/snd_sn76489.h +++ b/src/include/86box/snd_sn76489.h @@ -14,8 +14,10 @@ extern int sn76489_mute; typedef struct sn76489_t { int stat[4]; - int latch[4], count[4]; - int freqlo[4], freqhi[4]; + int latch[4]; + int count[4]; + int freqlo[4]; + int freqhi[4]; int vol[4]; uint32_t shift; uint8_t noise; diff --git a/src/include/86box/snd_ym7128.h b/src/include/86box/snd_ym7128.h index 4d5400f34..a0796b1fa 100644 --- a/src/include/86box/snd_ym7128.h +++ b/src/include/86box/snd_ym7128.h @@ -2,19 +2,26 @@ #define SOUND_YM7128_H typedef struct ym7128_t { - int a0, sci; + int a0; + int sci; uint8_t dat; int reg_sel; uint8_t regs[32]; - int gl[8], gr[8]; - int vm, vc, vl, vr; - int c0, c1; + int gl[8]; + int gr[8]; + int vm; + int vc; + int vl; + int vr; + int c0; + int c1; int t[9]; int16_t filter_dat; - int16_t prev_l, prev_r; + int16_t prev_l; + int16_t prev_r; int16_t delay_buffer[2400]; int delay_pos; diff --git a/src/include/86box/spd.h b/src/include/86box/spd.h index ae4342675..98eb4e178 100644 --- a/src/include/86box/spd.h +++ b/src/include/86box/spd.h @@ -46,49 +46,92 @@ #define SPD_SDR_ATTR_VCC_LOW_5 0x10 #define SPD_SDR_ATTR_VCC_HI_5 0x20 -typedef struct { - uint8_t bytes_used, spd_size, mem_type, - row_bits, col_bits, banks, - data_width_lsb, data_width_msb, - signal_level, trac, tcac, - config, refresh_rate, - dram_width, ecc_width, - reserved[47], - spd_rev, checksum, - mfg_jedec[8], mfg_loc; +typedef struct spd_edo_t { + uint8_t bytes_used; + uint8_t spd_size; + uint8_t mem_type; + uint8_t row_bits; + uint8_t col_bits; + uint8_t banks; + uint8_t data_width_lsb; + uint8_t data_width_msb; + uint8_t signal_level; + uint8_t trac; + uint8_t tcac; + uint8_t config; + uint8_t refresh_rate; + uint8_t dram_width; + uint8_t ecc_width; + uint8_t reserved[47]; + uint8_t spd_rev; + uint8_t checksum; + uint8_t mfg_jedec[8]; + uint8_t mfg_loc; char part_no[18]; - uint8_t rev_code[2], - mfg_year, mfg_week, serial[4], mfg_specific[27], - vendor_specific[2], - other_data[127], - checksum2; + uint8_t rev_code[2]; + uint8_t mfg_year; + uint8_t mfg_week; + uint8_t serial[4]; + uint8_t mfg_specific[27]; + uint8_t vendor_specific[2]; + uint8_t other_data[127]; + uint8_t checksum2; } spd_edo_t; -typedef struct { - uint8_t bytes_used, spd_size, mem_type, - row_bits, col_bits, rows, - data_width_lsb, data_width_msb, - signal_level, tclk, tac, - config, refresh_rate, - sdram_width, ecc_width, - tccd, burst, banks, cas, cslat, we, - mod_attr, dev_attr, - tclk2, tac2, tclk3, tac3, - trp, trrd, trcd, tras, - bank_density, - ca_setup, ca_hold, data_setup, data_hold, - reserved[26], - spd_rev, checksum, - mfg_jedec[8], mfg_loc; +typedef struct spd_sdram_t { + uint8_t bytes_used; + uint8_t spd_size; + uint8_t mem_type; + uint8_t row_bits; + uint8_t col_bits; + uint8_t rows; + uint8_t data_width_lsb; + uint8_t data_width_msb; + uint8_t signal_level; + uint8_t tclk; + uint8_t tac; + uint8_t config; + uint8_t refresh_rate; + uint8_t sdram_width; + uint8_t ecc_width; + uint8_t tccd; + uint8_t burst; + uint8_t banks; + uint8_t cas; + uint8_t cslat; + uint8_t we; + uint8_t mod_attr; + uint8_t dev_attr; + uint8_t tclk2; + uint8_t tac2; + uint8_t tclk3; + uint8_t tac3; + uint8_t trp; + uint8_t trrd; + uint8_t trcd; + uint8_t tras; + uint8_t bank_density; + uint8_t ca_setup; + uint8_t ca_hold; + uint8_t data_setup; + uint8_t data_hold; + uint8_t reserved[26]; + uint8_t spd_rev, checksum; + uint8_t mfg_jedec[8]; + uint8_t mfg_loc; char part_no[18]; - uint8_t rev_code[2], - mfg_year, mfg_week, serial[4], mfg_specific[27], - freq, features, - other_data[127], - checksum2; + uint8_t rev_code[2]; + uint8_t mfg_year; + uint8_t mfg_week; + uint8_t serial[4]; + uint8_t mfg_specific[27]; + uint8_t freq; + uint8_t features; + uint8_t other_data[127]; + uint8_t checksum2; } spd_sdram_t; -typedef struct { +typedef struct spd_t { uint8_t slot; uint16_t size; uint16_t row1; diff --git a/src/include/86box/timer.h b/src/include/86box/timer.h index c9b89788a..774729e17 100644 --- a/src/include/86box/timer.h +++ b/src/include/86box/timer.h @@ -11,14 +11,14 @@ #define TIMER_ENABLED 1 #pragma pack(push, 1) -typedef struct +typedef struct ts_struct_t { uint32_t frac; uint32_t integer; } ts_struct_t; #pragma pack(pop) -typedef union { +typedef union ts_t { uint64_t ts64; ts_struct_t ts32; } ts_t; @@ -42,14 +42,16 @@ typedef struct pc_timer_t { #else ts_t ts; #endif - int flags, pad; /* The flags are defined above. */ - double period; /* This is used for large period timers to count - the microseconds and split the period. */ + int flags; /* The flags are defined above. */ + int pad; + double period; /* This is used for large period timers to count + the microseconds and split the period. */ void (*callback)(void *p); void *p; - struct pc_timer_t *prev, *next; + struct pc_timer_t *prev; + struct pc_timer_t *next; } pc_timer_t; #ifdef __cplusplus diff --git a/src/include/86box/usb.h b/src/include/86box/usb.h index d0801b99c..7c2e13ee9 100644 --- a/src/include/86box/usb.h +++ b/src/include/86box/usb.h @@ -27,28 +27,28 @@ typedef struct usb_device_t usb_device_t; enum usb_pid { - USB_PID_OUT = 0xE1, - USB_PID_IN = 0x69, + USB_PID_OUT = 0xE1, + USB_PID_IN = 0x69, USB_PID_SETUP = 0x2D }; enum usb_errors { USB_ERROR_NO_ERROR = 0, - USB_ERROR_NAK = 1, - USB_ERROR_OVERRUN = 2, + USB_ERROR_NAK = 1, + USB_ERROR_OVERRUN = 2, USB_ERROR_UNDERRUN = 3 }; enum usb_bus_types { USB_BUS_OHCI = 0, - USB_BUS_UHCI, - USB_BUS_MAX + USB_BUS_UHCI = 1, + USB_BUS_MAX = 2 }; /* USB device creation parameters struct */ -typedef struct +typedef struct usb_params_t { void (*update_interrupt)(usb_t*, void*); /* Handle (but do not raise) SMI. Returns 1 if SMI can be raised, 0 otherwise. */ @@ -56,85 +56,79 @@ typedef struct void* parent_priv; } usb_params_t; -typedef union -{ +typedef union { uint32_t l; uint16_t w[2]; uint8_t b[4]; } ohci_mmio_t; /* USB Host Controller device struct */ -typedef struct usb_t -{ +typedef struct usb_t { uint8_t uhci_io[32]; ohci_mmio_t ohci_mmio[1024]; uint16_t uhci_io_base; - int uhci_enable, ohci_enable; - uint32_t ohci_mem_base, irq_level; + int uhci_enable; + int ohci_enable; + uint32_t ohci_mem_base; + uint32_t irq_level; mem_mapping_t ohci_mmio_mapping; pc_timer_t ohci_frame_timer; pc_timer_t ohci_port_reset_timer[2]; uint8_t ohci_interrupt_counter : 3; - usb_device_t* ohci_devices[2]; - usb_device_t* uhci_devices[2]; + usb_device_t *ohci_devices[2]; + usb_device_t *uhci_devices[2]; uint8_t ohci_usb_buf[4096]; uint8_t ohci_initial_start; - usb_params_t* usb_params; + usb_params_t *usb_params; } usb_t; #pragma pack(push, 1) /* Base USB descriptor struct. */ -typedef struct -{ +typedef struct usb_desc_base_t { uint8_t bLength; uint8_t bDescriptorType; } usb_desc_base_t; -enum usb_desc_setup_req_types -{ - USB_SETUP_TYPE_DEVICE = 0x0, +enum usb_desc_setup_req_types { + USB_SETUP_TYPE_DEVICE = 0x0, USB_SETUP_TYPE_INTERFACE = 0x1, - USB_SETUP_TYPE_ENDPOING = 0x2, - USB_SETUP_TYPE_OTHER = 0x3, + USB_SETUP_TYPE_ENDPOING = 0x2, + USB_SETUP_TYPE_OTHER = 0x3, }; #define USB_SETUP_TYPE_MAX 0x1F #define USB_SETUP_DEV_TO_HOST 0x80 -typedef struct -{ - uint8_t bmRequestType; - uint8_t bRequest; +typedef struct usb_desc_setup_t { + uint8_t bmRequestType; + uint8_t bRequest; uint16_t wValue; uint16_t wIndex; uint16_t wLength; } usb_desc_setup_t; -typedef struct -{ +typedef struct usb_desc_endpoint_t { usb_desc_base_t base; - uint8_t bEndpointAddress; - uint8_t bmAttributes; - uint16_t wMaxPacketSize; - uint8_t bInterval; + uint8_t bEndpointAddress; + uint8_t bmAttributes; + uint16_t wMaxPacketSize; + uint8_t bInterval; } usb_desc_endpoint_t; -typedef struct -{ +typedef struct usb_desc_hid_t { usb_desc_base_t base; uint16_t bcdHID; - uint8_t bCountryCode; - uint8_t bNumDescriptors; - uint8_t bDescriptorType; + uint8_t bCountryCode; + uint8_t bNumDescriptors; + uint8_t bDescriptorType; uint16_t wDescriptorLength; } usb_desc_hid_t; -typedef struct -{ +typedef struct usb_desc_interface_t { usb_desc_base_t base; uint8_t bInterfaceNumber; @@ -146,14 +140,12 @@ typedef struct uint8_t iInterface; } usb_desc_interface_t; -typedef struct -{ +typedef struct usb_desc_string_t { usb_desc_base_t base; - uint16_t bString[]; + uint16_t bString[]; } usb_desc_string_t; -typedef struct -{ +typedef struct usb_desc_conf_t { usb_desc_base_t base; uint16_t wTotalLength; @@ -164,32 +156,30 @@ typedef struct uint8_t bMaxPower; } usb_desc_conf_t; -typedef struct -{ +typedef struct usb_desc_device_t { usb_desc_base_t base; uint16_t bcdUSB; - uint8_t bDeviceClass; - uint8_t bDeviceSubClass; - uint8_t bDeviceProtocol; - uint8_t bMaxPacketSize; + uint8_t bDeviceClass; + uint8_t bDeviceSubClass; + uint8_t bDeviceProtocol; + uint8_t bMaxPacketSize; uint16_t idVendor; uint16_t idProduct; uint16_t bcdDevice; - uint8_t iManufacturer; - uint8_t iProduct; - uint8_t iSerialNumber; - uint8_t bNumConfigurations; + uint8_t iManufacturer; + uint8_t iProduct; + uint8_t iSerialNumber; + uint8_t bNumConfigurations; } usb_desc_device_t; #pragma pack(pop) /* USB endpoint device struct. Incomplete and unused. */ -typedef struct usb_device_t -{ +typedef struct usb_device_t { usb_desc_device_t device_desc; struct { - usb_desc_conf_t conf_desc; + usb_desc_conf_t conf_desc; usb_desc_base_t* other_descs[16]; } conf_desc_items; diff --git a/src/include/86box/video.h b/src/include/86box/video.h index 418423ea9..fb7800685 100644 --- a/src/include/86box/video.h +++ b/src/include/86box/video.h @@ -63,47 +63,54 @@ enum { #define VIDEO_FLAG_TYPE_NONE 3 #define VIDEO_FLAG_TYPE_MASK 3 -typedef struct { +typedef struct video_timings_t { int type; - int write_b, write_w, write_l; - int read_b, read_w, read_l; + int write_b; + int write_w; + int write_l; + int read_b; + int read_w; + int read_l; } video_timings_t; -typedef struct { - int w, h; +typedef struct bitmap_t { + int w; + int h; uint32_t *dat; uint32_t *line[2112]; } bitmap_t; -typedef struct { - uint8_t r, g, b; +typedef struct rgb_t { + uint8_t r; + uint8_t g; + uint8_t b; } rgb_t; -typedef struct { +typedef struct dbcs_font_t { uint8_t chr[32]; } dbcs_font_t; struct blit_data_struct; typedef struct monitor_t { - char name[512]; - int mon_xsize; - int mon_ysize; - int mon_scrnsz_x; - int mon_scrnsz_y; - int mon_efscrnsz_y; - int mon_unscaled_size_x; - int mon_unscaled_size_y; - int mon_res_x; - int mon_res_y; - int mon_bpp; - bitmap_t *target_buffer; - int mon_video_timing_read_b, - mon_video_timing_read_w, - mon_video_timing_read_l; - int mon_video_timing_write_b, - mon_video_timing_write_w, - mon_video_timing_write_l; + char name[512]; + int mon_xsize; + int mon_ysize; + int mon_scrnsz_x; + int mon_scrnsz_y; + int mon_efscrnsz_y; + int mon_unscaled_size_x; + int mon_unscaled_size_y; + int mon_res_x; + int mon_res_y; + int mon_bpp; + bitmap_t *target_buffer; + int mon_video_timing_read_b; + int mon_video_timing_read_w; + int mon_video_timing_read_l; + int mon_video_timing_write_b; + int mon_video_timing_write_w; + int mon_video_timing_write_l; int mon_overscan_x; int mon_overscan_y; int mon_force_resize; @@ -137,10 +144,14 @@ extern int video_fullscreen_scale_maximized; typedef rgb_t PALETTE[256]; -// extern int changeframecount; +#if 0 +extern int changeframecount; +#endif extern volatile int screenshots; -// extern bitmap_t *buffer32; +#if 0 +extern bitmap_t *buffer32; +#endif #define buffer32 (monitors[monitor_index_global].target_buffer) #define pal_lookup (monitors[monitor_index_global].mon_pal_lookup) #define overscan_x (monitors[monitor_index_global].mon_overscan_x) @@ -163,12 +174,14 @@ extern volatile int screenshots; #define efscrnsz_y (monitors[monitor_index_global].mon_efscrnsz_y) #define unscaled_size_x (monitors[monitor_index_global].mon_unscaled_size_x) #define unscaled_size_y (monitors[monitor_index_global].mon_unscaled_size_y) -extern PALETTE cgapal; -extern PALETTE cgapal_mono[6]; -// extern uint32_t pal_lookup[256]; -extern int video_fullscreen; -extern int video_fullscreen_scale; -extern int video_fullscreen_first; +extern PALETTE cgapal; +extern PALETTE cgapal_mono[6]; +#if 0 +extern uint32_t pal_lookup[256]; +#endif +extern int video_fullscreen; +extern int video_fullscreen_scale; +extern int video_fullscreen_first; extern uint8_t fontdat[2048][8]; extern uint8_t fontdatm[2048][16]; extern uint8_t fontdatw[512][32]; @@ -176,18 +189,18 @@ extern uint8_t fontdat8x12[256][16]; extern uint8_t fontdat12x18[256][36]; extern dbcs_font_t *fontdatksc5601; extern dbcs_font_t *fontdatksc5601_user; -extern uint32_t *video_6to8, - *video_8togs, - *video_8to32, - *video_15to32, - *video_16to32; -extern int enable_overscan; -extern int force_43; -extern int vid_resize; -extern int herc_blend; -extern int vid_cga_contrast; -extern int video_grayscale; -extern int video_graytype; +extern uint32_t *video_6to8; +extern uint32_t *video_8togs; +extern uint32_t *video_8to32; +extern uint32_t *video_15to32; +extern uint32_t *video_16to32; +extern int enable_overscan; +extern int force_43; +extern int vid_resize; +extern int herc_blend; +extern int vid_cga_contrast; +extern int video_grayscale; +extern int video_graytype; extern double cpuclock; extern int emu_fps; diff --git a/src/include/86box/win.h b/src/include/86box/win.h index 99620cbeb..35f6688ad 100644 --- a/src/include/86box/win.h +++ b/src/include/86box/win.h @@ -103,17 +103,21 @@ extern "C" { #endif extern HINSTANCE hinstance; -extern HWND hwndMain, - hwndRender, - hwndRender2; -extern HANDLE ghMutex; -extern HICON hIcon[256]; -extern int dpi; -extern RECT oldclip; -extern int sbar_height, tbar_height, user_resize; -extern int acp_utf8; +extern HWND hwndMain; +extern HWND hwndRender; +extern HWND hwndRender2; +extern HANDLE ghMutex; +extern HICON hIcon[256]; +extern int dpi; +extern RECT oldclip; +extern int sbar_height; +extern int tbar_height; +extern int user_resize; +extern int acp_utf8; -// extern int status_is_open; +#if 0 +extern int status_is_open; +#endif extern char openfilestring[512]; extern WCHAR wopenfilestring[512]; diff --git a/src/include/86box/zip.h b/src/include/86box/zip.h index 3981465ce..9ff69d092 100644 --- a/src/include/86box/zip.h +++ b/src/include/86box/zip.h @@ -32,60 +32,75 @@ enum { ZIP_BUS_DISABLED = 0, ZIP_BUS_ATAPI = 5, - ZIP_BUS_SCSI, - ZIP_BUS_USB + ZIP_BUS_SCSI = 6, + ZIP_BUS_USB = 7 }; -typedef struct { +typedef struct zip_drive_t { uint8_t id; union { - uint8_t res, res0, /* Reserved for other ID's. */ - res1, - ide_channel, scsi_device_id; + uint8_t res; + uint8_t res0; /* Reserved for other ID's. */ + uint8_t res1; + uint8_t ide_channel; + uint8_t scsi_device_id; }; - uint8_t bus_type, /* 0 = ATAPI, 1 = SCSI */ - bus_mode, /* Bit 0 = PIO suported; - Bit 1 = DMA supportd. */ - read_only, /* Struct variable reserved for - media status. */ - pad, pad0; + uint8_t bus_type; /* 0 = ATAPI, 1 = SCSI */ + uint8_t bus_mode; /* Bit 0 = PIO suported; + Bit 1 = DMA supportd. */ + uint8_t read_only; /* Struct variable reserved for + media status. */ + uint8_t pad; + uint8_t pad0; FILE *f; void *priv; - char image_path[1024], - prev_image_path[1024]; + char image_path[1024]; + char prev_image_path[1024]; - uint32_t is_250, medium_size, - base; + uint32_t is_250; + uint32_t medium_size; + uint32_t base; } zip_drive_t; -typedef struct { +typedef struct zip_t { mode_sense_pages_t ms_pages_saved; zip_drive_t *drv; - uint8_t *buffer, - atapi_cdb[16], - current_cdb[16], - sense[256]; + uint8_t *buffer; + uint8_t atapi_cdb[16]; + uint8_t current_cdb[16]; + uint8_t sense[256]; - uint8_t status, phase, - error, id, - features, cur_lun, - pad0, pad1; + uint8_t status; + uint8_t phase; + uint8_t error; + uint8_t id; + uint8_t features; + uint8_t cur_lun; + uint8_t pad0; + uint8_t pad1; - uint16_t request_length, max_transfer_len; + uint16_t request_length; + uint16_t max_transfer_len; - int requested_blocks, packet_status, - total_length, do_page_save, - unit_attention, request_pos, - old_len, pad3; + int requested_blocks; + int packet_status; + int total_length; + int do_page_save; + int unit_attention; + int request_pos; + int old_len; + int pad3; - uint32_t sector_pos, sector_len, - packet_len, pos; + uint32_t sector_pos; + uint32_t sector_len; + uint32_t packet_len; + uint32_t pos; double callback; } zip_t; diff --git a/src/ini.c b/src/ini.c index 0921b61ff..4ea2b6477 100644 --- a/src/ini.c +++ b/src/ini.c @@ -42,7 +42,7 @@ typedef struct _list_ { struct _list_ *next; } list_t; -typedef struct { +typedef struct section_t { list_t list; char name[128]; @@ -50,7 +50,7 @@ typedef struct { list_t entry_head; } section_t; -typedef struct { +typedef struct entry_t { list_t list; char name[128]; diff --git a/src/io.c b/src/io.c index 99b4954f8..173e6707b 100644 --- a/src/io.c +++ b/src/io.c @@ -29,6 +29,7 @@ #include <86box/timer.h> #include "cpu.h" #include <86box/m_amstrad.h> +#include <86box/pci.h> #define NPORTS 65536 /* PC/AT supports 64K ports */ @@ -47,10 +48,11 @@ typedef struct _io_ { } io_t; typedef struct { - uint8_t enable; - uint16_t base, size; - void (*func)(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv), - *priv; + uint8_t enable; + uint16_t base; + uint16_t size; + void (*func)(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv); + void *priv; } io_trap_t; int initialized = 0; @@ -286,15 +288,25 @@ inb(uint16_t port) int found = 0; int qfound = 0; - p = io[port]; - while (p) { - q = p->next; - if (p->inb) { - ret &= p->inb(port, p->priv); - found |= 1; - qfound++; + if ((pci_take_over_io & PCI_IO_ON) && (port >= pci_base) && (port < (pci_base + pci_size))) { + ret = pci_type2_read(port, NULL); + found = 1; + qfound = 1; + } else if ((pci_take_over_io & PCI_IO_DEV0) && (port >= 0xc000) && (port < 0xc100)) { + ret = pci_type2_read(port, NULL); + found = 1; + qfound = 1; + } else { + p = io[port]; + while (p) { + q = p->next; + if (p->inb) { + ret &= p->inb(port, p->priv); + found |= 1; + qfound++; + } + p = q; } - p = q; } if (amstrad_latch & 0x80000000) { @@ -310,8 +322,10 @@ inb(uint16_t port) cycles -= io_delay; /* TriGem 486-BIOS MHz output. */ - /* if (port == 0x1ed) - ret = 0xfe; */ +#if 0 + if (port == 0x1ed) + ret = 0xfe; +#endif io_log("[%04X:%08X] (%i, %i, %04i) in b(%04X) = %02X\n", CS, cpu_state.pc, in_smm, found, qfound, port, ret); @@ -326,15 +340,25 @@ outb(uint16_t port, uint8_t val) int found = 0; int qfound = 0; - p = io[port]; - while (p) { - q = p->next; - if (p->outb) { - p->outb(port, val, p->priv); - found |= 1; - qfound++; + if ((pci_take_over_io & PCI_IO_ON) && (port >= pci_base) && (port < (pci_base + pci_size))) { + pci_type2_write(port, val, NULL); + found = 1; + qfound = 1; + } else if ((pci_take_over_io & PCI_IO_DEV0) && (port >= 0xc000) && (port < 0xc100)) { + pci_type2_write(port, val, NULL); + found = 1; + qfound = 1; + } else { + p = io[port]; + while (p) { + q = p->next; + if (p->outb) { + p->outb(port, val, p->priv); + found |= 1; + qfound++; + } + p = q; } - p = q; } if (!found) { @@ -360,32 +384,42 @@ inw(uint16_t port) int qfound = 0; uint8_t ret8[2]; - p = io[port]; - while (p) { - q = p->next; - if (p->inw) { - ret &= p->inw(port, p->priv); - found |= 2; - qfound++; - } - p = q; - } - - ret8[0] = ret & 0xff; - ret8[1] = (ret >> 8) & 0xff; - for (uint8_t i = 0; i < 2; i++) { - p = io[(port + i) & 0xffff]; + if ((pci_take_over_io & PCI_IO_ON) && (port >= pci_base) && (port < (pci_base + pci_size))) { + ret = pci_type2_readw(port, NULL); + found = 2; + qfound = 1; + } else if ((pci_take_over_io & PCI_IO_DEV0) && (port >= 0xc000) && (port < 0xc100)) { + ret = pci_type2_readw(port, NULL); + found = 2; + qfound = 1; + } else { + p = io[port]; while (p) { q = p->next; - if (p->inb && !p->inw) { - ret8[i] &= p->inb(port + i, p->priv); - found |= 1; + if (p->inw) { + ret &= p->inw(port, p->priv); + found |= 2; qfound++; } p = q; } + + ret8[0] = ret & 0xff; + ret8[1] = (ret >> 8) & 0xff; + for (uint8_t i = 0; i < 2; i++) { + p = io[(port + i) & 0xffff]; + while (p) { + q = p->next; + if (p->inb && !p->inw) { + ret8[i] &= p->inb(port + i, p->priv); + found |= 1; + qfound++; + } + p = q; + } + } + ret = (ret8[1] << 8) | ret8[0]; } - ret = (ret8[1] << 8) | ret8[0]; if (amstrad_latch & 0x80000000) { if (port & 0x80) @@ -412,28 +446,38 @@ outw(uint16_t port, uint16_t val) int found = 0; int qfound = 0; - p = io[port]; - while (p) { - q = p->next; - if (p->outw) { - p->outw(port, val, p->priv); - found |= 2; - qfound++; - } - p = q; - } - - for (uint8_t i = 0; i < 2; i++) { - p = io[(port + i) & 0xffff]; + if ((pci_take_over_io & PCI_IO_ON) && (port >= pci_base) && (port < (pci_base + pci_size))) { + pci_type2_writew(port, val, NULL); + found = 2; + qfound = 1; + } else if ((pci_take_over_io & PCI_IO_DEV0) && (port >= 0xc000) && (port < 0xc100)) { + pci_type2_writew(port, val, NULL); + found = 2; + qfound = 1; + } else { + p = io[port]; while (p) { q = p->next; - if (p->outb && !p->outw) { - p->outb(port + i, val >> (i << 3), p->priv); - found |= 1; + if (p->outw) { + p->outw(port, val, p->priv); + found |= 2; qfound++; } p = q; } + + for (uint8_t i = 0; i < 2; i++) { + p = io[(port + i) & 0xffff]; + while (p) { + q = p->next; + if (p->outb && !p->outw) { + p->outb(port + i, val >> (i << 3), p->priv); + found |= 1; + qfound++; + } + p = q; + } + } } if (!found) { @@ -460,59 +504,69 @@ inl(uint16_t port) int found = 0; int qfound = 0; - p = io[port]; - while (p) { - q = p->next; - if (p->inl) { - ret &= p->inl(port, p->priv); - found |= 4; - qfound++; - } - p = q; - } - - ret16[0] = ret & 0xffff; - ret16[1] = (ret >> 16) & 0xffff; - p = io[port & 0xffff]; - while (p) { - q = p->next; - if (p->inw && !p->inl) { - ret16[0] &= p->inw(port, p->priv); - found |= 2; - qfound++; - } - p = q; - } - - p = io[(port + 2) & 0xffff]; - while (p) { - q = p->next; - if (p->inw && !p->inl) { - ret16[1] &= p->inw(port + 2, p->priv); - found |= 2; - qfound++; - } - p = q; - } - ret = (ret16[1] << 16) | ret16[0]; - - ret8[0] = ret & 0xff; - ret8[1] = (ret >> 8) & 0xff; - ret8[2] = (ret >> 16) & 0xff; - ret8[3] = (ret >> 24) & 0xff; - for (uint8_t i = 0; i < 4; i++) { - p = io[(port + i) & 0xffff]; + if ((pci_take_over_io & PCI_IO_ON) && (port >= pci_base) && (port < (pci_base + pci_size))) { + ret = pci_type2_readl(port, NULL); + found = 4; + qfound = 1; + } else if ((pci_take_over_io & PCI_IO_DEV0) && (port >= 0xc000) && (port < 0xc100)) { + ret = pci_type2_readl(port, NULL); + found = 4; + qfound = 1; + } else { + p = io[port]; while (p) { q = p->next; - if (p->inb && !p->inw && !p->inl) { - ret8[i] &= p->inb(port + i, p->priv); - found |= 1; + if (p->inl) { + ret &= p->inl(port, p->priv); + found |= 4; qfound++; } p = q; } + + ret16[0] = ret & 0xffff; + ret16[1] = (ret >> 16) & 0xffff; + p = io[port & 0xffff]; + while (p) { + q = p->next; + if (p->inw && !p->inl) { + ret16[0] &= p->inw(port, p->priv); + found |= 2; + qfound++; + } + p = q; + } + + p = io[(port + 2) & 0xffff]; + while (p) { + q = p->next; + if (p->inw && !p->inl) { + ret16[1] &= p->inw(port + 2, p->priv); + found |= 2; + qfound++; + } + p = q; + } + ret = (ret16[1] << 16) | ret16[0]; + + ret8[0] = ret & 0xff; + ret8[1] = (ret >> 8) & 0xff; + ret8[2] = (ret >> 16) & 0xff; + ret8[3] = (ret >> 24) & 0xff; + for (uint8_t i = 0; i < 4; i++) { + p = io[(port + i) & 0xffff]; + while (p) { + q = p->next; + if (p->inb && !p->inw && !p->inl) { + ret8[i] &= p->inb(port + i, p->priv); + found |= 1; + qfound++; + } + p = q; + } + } + ret = (ret8[3] << 24) | (ret8[2] << 16) | (ret8[1] << 8) | ret8[0]; } - ret = (ret8[3] << 24) | (ret8[2] << 16) | (ret8[1] << 8) | ret8[0]; if (amstrad_latch & 0x80000000) { if (port & 0x80) @@ -540,42 +594,52 @@ outl(uint16_t port, uint32_t val) int qfound = 0; int i = 0; - p = io[port]; - if (p) { - while (p) { - q = p->next; - if (p->outl) { - p->outl(port, val, p->priv); - found |= 4; - qfound++; + if ((pci_take_over_io & PCI_IO_ON) && (port >= pci_base) && (port < (pci_base + pci_size))) { + pci_type2_writel(port, val, NULL); + found = 4; + qfound = 1; + } else if ((pci_take_over_io & PCI_IO_DEV0) && (port >= 0xc000) && (port < 0xc100)) { + pci_type2_writel(port, val, NULL); + found = 4; + qfound = 1; + } else { + p = io[port]; + if (p) { + while (p) { + q = p->next; + if (p->outl) { + p->outl(port, val, p->priv); + found |= 4; + qfound++; + } + p = q; } - p = q; } - } - for (i = 0; i < 4; i += 2) { - p = io[(port + i) & 0xffff]; - while (p) { - q = p->next; - if (p->outw && !p->outl) { - p->outw(port + i, val >> (i << 3), p->priv); - found |= 2; - qfound++; + for (i = 0; i < 4; i += 2) { + p = io[(port + i) & 0xffff]; + while (p) { + q = p->next; + if (p->outw && !p->outl) { + p->outw(port + i, val >> (i << 3), p->priv); + found |= 2; + qfound++; + } + p = q; } - p = q; } - } - for (i = 0; i < 4; i++) { - p = io[(port + i) & 0xffff]; - while (p) { - q = p->next; - if (p->outb && !p->outw && !p->outl) { - p->outb(port + i, val >> (i << 3), p->priv); - found |= 1; - qfound++; + for (i = 0; i < 4; i++) { + p = io[(port + i) & 0xffff]; + while (p) { + q = p->next; + if (p->outb && !p->outw && !p->outl) { + p->outb(port + i, val >> (i << 3), p->priv); + found |= 1; + qfound++; + } + p = q; } - p = q; } } diff --git a/src/ioapic.c b/src/ioapic.c index 1fed64220..c3939f249 100644 --- a/src/ioapic.c +++ b/src/ioapic.c @@ -27,8 +27,9 @@ #include <86box/machine.h> #include <86box/mem.h> #include <86box/chipset.h> +#include <86box/plat_unused.h> -typedef struct { +typedef struct ioapic_t { uint8_t dummy; } ioapic_t; @@ -51,7 +52,7 @@ ioapic_log(const char *fmt, ...) #endif static void -ioapic_write(uint16_t port, uint8_t val, void *priv) +ioapic_write(UNUSED(uint16_t port), uint8_t val, UNUSED(void *priv)) { uint32_t pcmp; @@ -83,8 +84,9 @@ ioapic_write(uint16_t port, uint8_t val, void *priv) } static void -ioapic_reset(ioapic_t *dev) +ioapic_reset(UNUSED(ioapic_t *dev)) { + // } static void @@ -99,7 +101,7 @@ ioapic_close(void *priv) } static void * -ioapic_init(const device_t *info) +ioapic_init(UNUSED(const device_t *info)) { ioapic_t *dev = (ioapic_t *) malloc(sizeof(ioapic_t)); memset(dev, 0, sizeof(ioapic_t)); diff --git a/src/log.c b/src/log.c index 02bb6132e..b5267d70b 100644 --- a/src/log.c +++ b/src/log.c @@ -35,10 +35,11 @@ #include <86box/log.h> #ifndef RELEASE_BUILD -typedef struct -{ - char buff[1024], *dev_name; - int seen, suppr_seen; +typedef struct log_t { + char buff[1024]; + char *dev_name; + int seen; + int suppr_seen; } log_t; extern FILE *stdlog; /* file to log output to */ diff --git a/src/lpt.c b/src/lpt.c index f4d2ad67c..f4fc7192f 100644 --- a/src/lpt.c +++ b/src/lpt.c @@ -124,6 +124,9 @@ lpt_write(uint16_t port, uint8_t val, void *priv) dev->ctrl = val; dev->enable_irq = val & 0x10; break; + + default: + break; } } @@ -154,6 +157,9 @@ lpt_read(uint16_t port, void *priv) else ret = 0xe0 | dev->ctrl | dev->enable_irq; break; + + default: + break; } return ret; diff --git a/src/machine/m_at.c b/src/machine/m_at.c index 92f8c0f5f..9fc53ebcd 100644 --- a/src/machine/m_at.c +++ b/src/machine/m_at.c @@ -246,7 +246,14 @@ machine_at_siemens_init(const machine_t *model) if (bios_only || !ret) return ret; - machine_at_ibm_common_init(model); + machine_at_common_init_ex(model, 1); + + device_add(&keyboard_at_siemens_device); + + mem_remap_top(384); + + if (fdc_type == FDC_INTERNAL) + device_add(&fdc_at_device); return ret; } diff --git a/src/machine/machine.c b/src/machine/machine.c index 893700c7e..d48cbdf21 100644 --- a/src/machine/machine.c +++ b/src/machine/machine.c @@ -41,6 +41,7 @@ #include <86box/video.h> #include <86box/machine.h> #include <86box/isamem.h> +#include <86box/pci.h> int bios_only = 0; int machine; @@ -103,6 +104,8 @@ machine_init_ex(int m) /* Reset the fast off stuff. */ cpu_fast_off_reset(); + + pci_take_over_io = 0x00000000; } /* All good, boot the machine! */ diff --git a/src/machine/machine_table.c b/src/machine/machine_table.c index fbed24e3b..e5f447269 100644 --- a/src/machine/machine_table.c +++ b/src/machine/machine_table.c @@ -222,7 +222,7 @@ const machine_t machines[] = { .min_multi = 0, .max_multi = 0 }, - .bus_flags = MACHINE_PC, + .bus_flags = MACHINE_PC5150, .flags = MACHINE_FLAGS_NONE, .ram = { .min = 16, @@ -260,7 +260,7 @@ const machine_t machines[] = { .min_multi = 0, .max_multi = 0 }, - .bus_flags = MACHINE_PC, + .bus_flags = MACHINE_PC5150, .flags = MACHINE_FLAGS_NONE, .ram = { .min = 64, @@ -886,6 +886,44 @@ const machine_t machines[] = { .snd_device = NULL, .net_device = NULL }, + { + .name = "[8088] Micoms XL-7 Turbo", + .internal_name = "mxl7t", + .type = MACHINE_TYPE_8088, + .chipset = MACHINE_CHIPSET_DISCRETE, + .init = machine_xt_micoms_xl7turbo_init, + .pad = 0, + .pad0 = 0, + .pad1 = MACHINE_AVAILABLE, + .pad2 = 0, + .cpu = { + .package = CPU_PKG_8088, + .block = CPU_BLOCK_NONE, + .min_bus = 0, + .max_bus = 0, + .min_voltage = 0, + .max_voltage = 0, + .min_multi = 0, + .max_multi = 0 + }, + .bus_flags = MACHINE_PC, + .flags = MACHINE_FLAGS_NONE, + .ram = { + .min = 64, + .max = 640, + .step = 64 + }, + .nvrmask = 0, + .kbc_device = &keyboard_xt_device, + .kbc_p1 = 0xff00, + .gpio = 0xffffffff, + .device = NULL, + .fdc_device = NULL, + .sio_device = NULL, + .vid_device = NULL, + .snd_device = NULL, + .net_device = NULL + }, { .name = "[8088] Multitech PC-500", .internal_name = "pc500", @@ -962,44 +1000,6 @@ const machine_t machines[] = { .snd_device = NULL, .net_device = NULL }, - { - .name = "[8088] Micoms XL-7 Turbo", - .internal_name = "mxl7t", - .type = MACHINE_TYPE_8088, - .chipset = MACHINE_CHIPSET_DISCRETE, - .init = machine_xt_micoms_xl7turbo_init, - .pad = 0, - .pad0 = 0, - .pad1 = MACHINE_AVAILABLE, - .pad2 = 0, - .cpu = { - .package = CPU_PKG_8088, - .block = CPU_BLOCK_NONE, - .min_bus = 0, - .max_bus = 0, - .min_voltage = 0, - .max_voltage = 0, - .min_multi = 0, - .max_multi = 0 - }, - .bus_flags = MACHINE_PC, - .flags = MACHINE_FLAGS_NONE, - .ram = { - .min = 64, - .max = 640, - .step = 64 - }, - .nvrmask = 0, - .kbc_device = &keyboard_xt_device, - .kbc_p1 = 0xff00, - .gpio = 0xffffffff, - .device = NULL, - .fdc_device = NULL, - .sio_device = NULL, - .vid_device = NULL, - .snd_device = NULL, - .net_device = NULL - }, { .name = "[8088] NCR PC4i", .internal_name = "pc4i", @@ -5492,7 +5492,7 @@ const machine_t machines[] = { .max_multi = 0 }, .bus_flags = MACHINE_PS2_MCA, - .flags = MACHINE_VIDEO, + .flags = MACHINE_VIDEO | MACHINE_SOFTFLOAT_ONLY, .ram = { .min = 2048, .max = 65536, @@ -6799,7 +6799,7 @@ const machine_t machines[] = { .min_multi = 0, .max_multi = 0 }, - .bus_flags = MACHINE_PCI, + .bus_flags = MACHINE_BUS_PS2_LATCH | MACHINE_PCI, .flags = MACHINE_IDE_DUAL | MACHINE_APM, .ram = { .min = 1024, @@ -6877,7 +6877,7 @@ const machine_t machines[] = { .min_multi = 0, .max_multi = 0 }, - .bus_flags = MACHINE_PCI, + .bus_flags = MACHINE_BUS_PS2_LATCH | MACHINE_PCI, .flags = MACHINE_IDE_DUAL | MACHINE_APM, .ram = { .min = 1024, diff --git a/src/mem/catalyst_flash.c b/src/mem/catalyst_flash.c index 5e473f540..46294a60a 100644 --- a/src/mem/catalyst_flash.c +++ b/src/mem/catalyst_flash.c @@ -55,19 +55,22 @@ enum { }; typedef struct flash_t { - uint8_t command, pad, - pad0, pad1, - *array; + uint8_t command; + uint8_t pad; + uint8_t pad0; + uint8_t pad1; + uint8_t *array; - mem_mapping_t mapping, mapping_h[2]; + mem_mapping_t mapping; + mem_mapping_t mapping_h[2]; } flash_t; static char flash_path[1024]; static uint8_t -flash_read(uint32_t addr, void *p) +flash_read(uint32_t addr, void *priv) { - flash_t *dev = (flash_t *) p; + flash_t *dev = (flash_t *) priv; uint8_t ret = 0xff; addr &= biosmask; @@ -86,6 +89,9 @@ flash_read(uint32_t addr, void *p) else if (addr == 0x00001) ret = 0xB4; /* 28F010 */ break; + + default: + break; } return ret; @@ -141,13 +147,15 @@ flash_write(uint32_t addr, uint8_t val, void *p) } static void -flash_writew(uint32_t addr, uint16_t val, void *p) +flash_writew(UNUSED(uint32_t addr), UNUSED(uint16_t val), UNUSED(void *priv)) { + // } static void -flash_writel(uint32_t addr, uint32_t val, void *p) +flash_writel(UNUSED(uint32_t addr), UNUSED(uint32_t val), UNUSED(void *priv)) { + // } static void @@ -179,7 +187,7 @@ catalyst_flash_reset(void *priv) } static void * -catalyst_flash_init(const device_t *info) +catalyst_flash_init(UNUSED(const device_t *info)) { FILE *f; flash_t *dev; diff --git a/src/mem/i2c_eeprom.c b/src/mem/i2c_eeprom.c index e29d16139..7d83bbe88 100644 --- a/src/mem/i2c_eeprom.c +++ b/src/mem/i2c_eeprom.c @@ -23,13 +23,18 @@ #include #include <86box/86box.h> #include <86box/i2c.h> +#include <86box/plat_unused.h> -typedef struct { +typedef struct i2c_eeprom_t { void *i2c; - uint8_t addr, *data, writable; + uint8_t addr; + uint8_t *data; + uint8_t writable; - uint32_t addr_mask, addr_register; - uint8_t addr_len, addr_pos; + uint32_t addr_mask; + uint32_t addr_register; + uint8_t addr_len; + uint8_t addr_pos; } i2c_eeprom_t; #ifdef ENABLE_I2C_EEPROM_LOG @@ -51,7 +56,7 @@ i2c_eeprom_log(const char *fmt, ...) #endif static uint8_t -i2c_eeprom_start(void *bus, uint8_t addr, uint8_t read, void *priv) +i2c_eeprom_start(UNUSED(void *bus), uint8_t addr, uint8_t read, void *priv) { i2c_eeprom_t *dev = (i2c_eeprom_t *) priv; @@ -66,7 +71,7 @@ i2c_eeprom_start(void *bus, uint8_t addr, uint8_t read, void *priv) } static uint8_t -i2c_eeprom_read(void *bus, uint8_t addr, void *priv) +i2c_eeprom_read(UNUSED(void *bus), UNUSED(uint8_t addr), void *priv) { i2c_eeprom_t *dev = (i2c_eeprom_t *) priv; uint8_t ret = dev->data[dev->addr_register]; @@ -79,7 +84,7 @@ i2c_eeprom_read(void *bus, uint8_t addr, void *priv) } static uint8_t -i2c_eeprom_write(void *bus, uint8_t addr, uint8_t data, void *priv) +i2c_eeprom_write(UNUSED(void *bus), uint8_t addr, uint8_t data, void *priv) { i2c_eeprom_t *dev = (i2c_eeprom_t *) priv; @@ -104,7 +109,7 @@ i2c_eeprom_write(void *bus, uint8_t addr, uint8_t data, void *priv) } static void -i2c_eeprom_stop(void *bus, uint8_t addr, void *priv) +i2c_eeprom_stop(UNUSED(void *bus), UNUSED(uint8_t addr), void *priv) { i2c_eeprom_t *dev = (i2c_eeprom_t *) priv; diff --git a/src/mem/intel_flash.c b/src/mem/intel_flash.c index af7a71eea..ce529670e 100644 --- a/src/mem/intel_flash.c +++ b/src/mem/intel_flash.c @@ -58,25 +58,30 @@ enum { }; typedef struct flash_t { - uint8_t command, status, - pad, flags, - *array; + uint8_t command; + uint8_t status; + uint8_t pad; + uint8_t flags; + uint8_t *array; - uint16_t flash_id, pad16; + uint16_t flash_id; + uint16_t pad16; - uint32_t program_addr, - block_start[BLOCKS_NUM], block_end[BLOCKS_NUM], - block_len[BLOCKS_NUM]; + uint32_t program_addr; + uint32_t block_start[BLOCKS_NUM]; + uint32_t block_end[BLOCKS_NUM]; + uint32_t block_len[BLOCKS_NUM]; - mem_mapping_t mapping[4], mapping_h[16]; + mem_mapping_t mapping[4]; + mem_mapping_t mapping_h[16]; } flash_t; static char flash_path[1024]; static uint8_t -flash_read(uint32_t addr, void *p) +flash_read(uint32_t addr, void *priv) { - flash_t *dev = (flash_t *) p; + flash_t *dev = (flash_t *) priv; uint8_t ret = 0xff; if (dev->flags & FLAG_INV_A16) @@ -84,8 +89,8 @@ flash_read(uint32_t addr, void *p) addr &= biosmask; switch (dev->command) { - case CMD_READ_ARRAY: default: + case CMD_READ_ARRAY: ret = dev->array[addr]; break; @@ -105,9 +110,9 @@ flash_read(uint32_t addr, void *p) } static uint16_t -flash_readw(uint32_t addr, void *p) +flash_readw(uint32_t addr, void *priv) { - flash_t *dev = (flash_t *) p; + flash_t *dev = (flash_t *) priv; uint16_t *q; uint16_t ret = 0xffff; @@ -123,8 +128,8 @@ flash_readw(uint32_t addr, void *p) if (dev->flags & FLAG_WORD) switch (dev->command) { - case CMD_READ_ARRAY: default: + case CMD_READ_ARRAY: break; case CMD_IID: @@ -143,9 +148,9 @@ flash_readw(uint32_t addr, void *p) } static uint32_t -flash_readl(uint32_t addr, void *p) +flash_readl(uint32_t addr, void *priv) { - flash_t *dev = (flash_t *) p; + flash_t *dev = (flash_t *) priv; uint32_t *q; if (dev->flags & FLAG_INV_A16) @@ -158,10 +163,9 @@ flash_readl(uint32_t addr, void *p) } static void -flash_write(uint32_t addr, uint8_t val, void *p) +flash_write(uint32_t addr, uint8_t val, void *priv) { - flash_t *dev = (flash_t *) p; - int i; + flash_t *dev = (flash_t *) priv; uint32_t bb_mask = biosmask & 0xffffe000; if (biosmask == 0x7ffff) bb_mask &= 0xffff8000; @@ -175,7 +179,7 @@ flash_write(uint32_t addr, uint8_t val, void *p) switch (dev->command) { case CMD_ERASE_SETUP: if (val == CMD_ERASE_CONFIRM) { - for (i = 0; i < 6; i++) { + for (uint8_t i = 0; i < 6; i++) { if ((i == dev->program_addr) && (addr >= dev->block_start[i]) && (addr <= dev->block_end[i])) memset(&(dev->array[dev->block_start[i]]), 0xff, dev->block_len[i]); } @@ -200,7 +204,7 @@ flash_write(uint32_t addr, uint8_t val, void *p) dev->status = 0; break; case CMD_ERASE_SETUP: - for (i = 0; i < 7; i++) { + for (uint8_t i = 0; i < 7; i++) { if ((addr >= dev->block_start[i]) && (addr <= dev->block_end[i])) dev->program_addr = i; } @@ -209,6 +213,9 @@ flash_write(uint32_t addr, uint8_t val, void *p) case CMD_PROGRAM_SETUP_ALT: dev->program_addr = addr; break; + + default: + break; } } } @@ -266,16 +273,19 @@ flash_writew(uint32_t addr, uint16_t val, void *p) case CMD_PROGRAM_SETUP_ALT: dev->program_addr = addr; break; + + default: + break; } } } static void -flash_writel(uint32_t addr, uint32_t val, void *p) +flash_writel(UNUSED(uint32_t addr), UNUSED(uint32_t val), UNUSED(void *priv)) { #if 0 - flash_writew(addr, val & 0xffff, p); - flash_writew(addr + 2, (val >> 16) & 0xffff, p); + flash_writew(addr, val & 0xffff, priv); + flash_writew(addr + 2, (val >> 16) & 0xffff, priv); #endif } @@ -522,10 +532,10 @@ intel_flash_init(const device_t *info) } static void -intel_flash_close(void *p) +intel_flash_close(void *priv) { FILE *f; - flash_t *dev = (flash_t *) p; + flash_t *dev = (flash_t *) priv; f = nvr_fopen(flash_path, "wb"); fwrite(&(dev->array[dev->block_start[BLOCK_MAIN1]]), dev->block_len[BLOCK_MAIN1], 1, f); diff --git a/src/mem/mem.c b/src/mem/mem.c index 8d835942d..67c0b1e2e 100644 --- a/src/mem/mem.c +++ b/src/mem/mem.c @@ -1908,7 +1908,7 @@ mem_write_phys(void *src, uint32_t addr, int transfer_size) } uint8_t -mem_read_ram(uint32_t addr, void *priv) +mem_read_ram(uint32_t addr, UNUSED(void *priv)) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) @@ -1922,7 +1922,7 @@ mem_read_ram(uint32_t addr, void *priv) } uint16_t -mem_read_ramw(uint32_t addr, void *priv) +mem_read_ramw(uint32_t addr, UNUSED(void *priv)) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) @@ -1936,7 +1936,7 @@ mem_read_ramw(uint32_t addr, void *priv) } uint32_t -mem_read_raml(uint32_t addr, void *priv) +mem_read_raml(uint32_t addr, UNUSED(void *priv)) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) @@ -1950,7 +1950,7 @@ mem_read_raml(uint32_t addr, void *priv) } uint8_t -mem_read_ram_2gb(uint32_t addr, void *priv) +mem_read_ram_2gb(uint32_t addr, UNUSED(void *priv)) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) @@ -1963,7 +1963,7 @@ mem_read_ram_2gb(uint32_t addr, void *priv) } uint16_t -mem_read_ram_2gbw(uint32_t addr, void *priv) +mem_read_ram_2gbw(uint32_t addr, UNUSED(void *priv)) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) @@ -1976,7 +1976,7 @@ mem_read_ram_2gbw(uint32_t addr, void *priv) } uint32_t -mem_read_ram_2gbl(uint32_t addr, void *priv) +mem_read_ram_2gbl(uint32_t addr, UNUSED(void *priv)) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) @@ -1990,71 +1990,71 @@ mem_read_ram_2gbl(uint32_t addr, void *priv) #ifdef USE_NEW_DYNAREC static inline int -page_index(page_t *p) +page_index(page_t *page) { - return ((uintptr_t) p - (uintptr_t) pages) / sizeof(page_t); + return ((uintptr_t) page - (uintptr_t) pages) / sizeof(page_t); } void -page_add_to_evict_list(page_t *p) +page_add_to_evict_list(page_t *page) { - pages[purgable_page_list_head].evict_prev = page_index(p); - p->evict_next = purgable_page_list_head; - p->evict_prev = 0; + pages[purgable_page_list_head].evict_prev = page_index(page); + page->evict_next = purgable_page_list_head; + page->evict_prev = 0; purgable_page_list_head = pages[purgable_page_list_head].evict_prev; purgeable_page_count++; } void -page_remove_from_evict_list(page_t *p) +page_remove_from_evict_list(page_t *page) { - if (!page_in_evict_list(p)) + if (!page_in_evict_list(page)) fatal("page_remove_from_evict_list: not in evict list!\n"); - if (p->evict_prev) - pages[p->evict_prev].evict_next = p->evict_next; + if (page->evict_prev) + pages[page->evict_prev].evict_next = page->evict_next; else - purgable_page_list_head = p->evict_next; - if (p->evict_next) - pages[p->evict_next].evict_prev = p->evict_prev; - p->evict_prev = EVICT_NOT_IN_LIST; + purgable_page_list_head = page->evict_next; + if (page->evict_next) + pages[page->evict_next].evict_prev = page->evict_prev; + page->evict_prev = EVICT_NOT_IN_LIST; purgeable_page_count--; } void -mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *p) +mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *page) { - if (p == NULL) + if (page == NULL) return; # ifdef USE_DYNAREC - if ((p->mem == NULL) || (p->mem == page_ff) || (val != p->mem[addr & 0xfff]) || codegen_in_recompile) { + if ((page->mem == NULL) || (page->mem == page_ff) || (val != page->mem[addr & 0xfff]) || codegen_in_recompile) { # else - if ((p->mem == NULL) || (p->mem == page_ff) || (val != p->mem[addr & 0xfff])) { + if ((page->mem == NULL) || (page->mem == page_ff) || (val != page->mem[addr & 0xfff])) { # endif uint64_t mask = (uint64_t) 1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); int byte_offset = (addr >> PAGE_BYTE_MASK_SHIFT) & PAGE_BYTE_MASK_OFFSET_MASK; uint64_t byte_mask = (uint64_t) 1 << (addr & PAGE_BYTE_MASK_MASK); - p->mem[addr & 0xfff] = val; - p->dirty_mask |= mask; - if ((p->code_present_mask & mask) && !page_in_evict_list(p)) - page_add_to_evict_list(p); - p->byte_dirty_mask[byte_offset] |= byte_mask; - if ((p->byte_code_present_mask[byte_offset] & byte_mask) && !page_in_evict_list(p)) - page_add_to_evict_list(p); + page->mem[addr & 0xfff] = val; + page->dirty_mask |= mask; + if ((page->code_present_mask & mask) && !page_in_evict_list(page)) + page_add_to_evict_list(page); + page->byte_dirty_mask[byte_offset] |= byte_mask; + if ((page->byte_code_present_mask[byte_offset] & byte_mask) && !page_in_evict_list(page)) + page_add_to_evict_list(page); } } void -mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p) +mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *page) { - if (p == NULL) + if (page == NULL) return; # ifdef USE_DYNAREC - if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint16_t *) &p->mem[addr & 0xfff]) || codegen_in_recompile) { + if ((page->mem == NULL) || (page->mem == page_ff) || (val != *(uint16_t *) &page->mem[addr & 0xfff]) || codegen_in_recompile) { # else - if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint16_t *) &p->mem[addr & 0xfff])) { + if ((page->mem == NULL) || (page->mem == page_ff) || (val != *(uint16_t *) &page->mem[addr & 0xfff])) { # endif uint64_t mask = (uint64_t) 1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); int byte_offset = (addr >> PAGE_BYTE_MASK_SHIFT) & PAGE_BYTE_MASK_OFFSET_MASK; @@ -2062,34 +2062,34 @@ mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p) if ((addr & 0xf) == 0xf) mask |= (mask << 1); - *(uint16_t *) &p->mem[addr & 0xfff] = val; - p->dirty_mask |= mask; - if ((p->code_present_mask & mask) && !page_in_evict_list(p)) - page_add_to_evict_list(p); + *(uint16_t *) &page->mem[addr & 0xfff] = val; + page->dirty_mask |= mask; + if ((page->code_present_mask & mask) && !page_in_evict_list(page)) + page_add_to_evict_list(page); if ((addr & PAGE_BYTE_MASK_MASK) == PAGE_BYTE_MASK_MASK) { - p->byte_dirty_mask[byte_offset + 1] |= 1; - if ((p->byte_code_present_mask[byte_offset + 1] & 1) && !page_in_evict_list(p)) - page_add_to_evict_list(p); + page->byte_dirty_mask[byte_offset + 1] |= 1; + if ((page->byte_code_present_mask[byte_offset + 1] & 1) && !page_in_evict_list(page)) + page_add_to_evict_list(page); } else byte_mask |= (byte_mask << 1); - p->byte_dirty_mask[byte_offset] |= byte_mask; + page->byte_dirty_mask[byte_offset] |= byte_mask; - if ((p->byte_code_present_mask[byte_offset] & byte_mask) && !page_in_evict_list(p)) - page_add_to_evict_list(p); + if ((page->byte_code_present_mask[byte_offset] & byte_mask) && !page_in_evict_list(page)) + page_add_to_evict_list(page); } } void -mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p) +mem_write_raml_page(uint32_t addr, uint32_t val, page_t *page) { - if (p == NULL) + if (page == NULL) return; # ifdef USE_DYNAREC - if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint32_t *) &p->mem[addr & 0xfff]) || codegen_in_recompile) { + if ((page->mem == NULL) || (page->mem == page_ff) || (val != *(uint32_t *) &page->mem[addr & 0xfff]) || codegen_in_recompile) { # else - if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint32_t *) &p->mem[addr & 0xfff])) { + if ((page->mem == NULL) || (page->mem == page_ff) || (val != *(uint32_t *) &page->mem[addr & 0xfff])) { # endif uint64_t mask = (uint64_t) 1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); int byte_offset = (addr >> PAGE_BYTE_MASK_SHIFT) & PAGE_BYTE_MASK_OFFSET_MASK; @@ -2097,79 +2097,79 @@ mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p) if ((addr & 0xf) >= 0xd) mask |= (mask << 1); - *(uint32_t *) &p->mem[addr & 0xfff] = val; - p->dirty_mask |= mask; - p->byte_dirty_mask[byte_offset] |= byte_mask; - if (!page_in_evict_list(p) && ((p->code_present_mask & mask) || (p->byte_code_present_mask[byte_offset] & byte_mask))) - page_add_to_evict_list(p); + *(uint32_t *) &page->mem[addr & 0xfff] = val; + page->dirty_mask |= mask; + page->byte_dirty_mask[byte_offset] |= byte_mask; + if (!page_in_evict_list(page) && ((page->code_present_mask & mask) || (page->byte_code_present_mask[byte_offset] & byte_mask))) + page_add_to_evict_list(page); if ((addr & PAGE_BYTE_MASK_MASK) > (PAGE_BYTE_MASK_MASK - 3)) { uint32_t byte_mask_2 = 0xf >> (4 - (addr & 3)); - p->byte_dirty_mask[byte_offset + 1] |= byte_mask_2; - if ((p->byte_code_present_mask[byte_offset + 1] & byte_mask_2) && !page_in_evict_list(p)) - page_add_to_evict_list(p); + page->byte_dirty_mask[byte_offset + 1] |= byte_mask_2; + if ((page->byte_code_present_mask[byte_offset + 1] & byte_mask_2) && !page_in_evict_list(page)) + page_add_to_evict_list(page); } } } #else void -mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *p) +mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *page) { - if (p == NULL) + if (page == NULL) return; # ifdef USE_DYNAREC - if ((p->mem == NULL) || (p->mem == page_ff) || (val != p->mem[addr & 0xfff]) || codegen_in_recompile) { + if ((page->mem == NULL) || (page->mem == page_ff) || (val != page->mem[addr & 0xfff]) || codegen_in_recompile) { # else - if ((p->mem == NULL) || (p->mem == page_ff) || (val != p->mem[addr & 0xfff])) { + if ((page->mem == NULL) || (page->mem == page_ff) || (val != page->mem[addr & 0xfff])) { # endif uint64_t mask = (uint64_t) 1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); - p->dirty_mask[(addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK] |= mask; - p->mem[addr & 0xfff] = val; + page->dirty_mask[(addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK] |= mask; + page->mem[addr & 0xfff] = val; } } void -mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p) +mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *page) { - if (p == NULL) + if (page == NULL) return; # ifdef USE_DYNAREC - if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint16_t *) &p->mem[addr & 0xfff]) || codegen_in_recompile) { + if ((page->mem == NULL) || (page->mem == page_ff) || (val != *(uint16_t *) &page->mem[addr & 0xfff]) || codegen_in_recompile) { # else - if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint16_t *) &p->mem[addr & 0xfff])) { + if ((page->mem == NULL) || (page->mem == page_ff) || (val != *(uint16_t *) &page->mem[addr & 0xfff])) { # endif uint64_t mask = (uint64_t) 1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); if ((addr & 0xf) == 0xf) mask |= (mask << 1); - p->dirty_mask[(addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK] |= mask; - *(uint16_t *) &p->mem[addr & 0xfff] = val; + page->dirty_mask[(addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK] |= mask; + *(uint16_t *) &page->mem[addr & 0xfff] = val; } } void -mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p) +mem_write_raml_page(uint32_t addr, uint32_t val, page_t *page) { - if (p == NULL) + if (page == NULL) return; # ifdef USE_DYNAREC - if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint32_t *) &p->mem[addr & 0xfff]) || codegen_in_recompile) { + if ((page->mem == NULL) || (page->mem == page_ff) || (val != *(uint32_t *) &page->mem[addr & 0xfff]) || codegen_in_recompile) { # else - if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint32_t *) &p->mem[addr & 0xfff])) { + if ((page->mem == NULL) || (page->mem == page_ff) || (val != *(uint32_t *) &page->mem[addr & 0xfff])) { # endif uint64_t mask = (uint64_t) 1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK); if ((addr & 0xf) >= 0xd) mask |= (mask << 1); - p->dirty_mask[(addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK] |= mask; - *(uint32_t *) &p->mem[addr & 0xfff] = val; + page->dirty_mask[(addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK] |= mask; + *(uint32_t *) &page->mem[addr & 0xfff] = val; } } #endif void -mem_write_ram(uint32_t addr, uint8_t val, void *priv) +mem_write_ram(uint32_t addr, uint8_t val, UNUSED(void *priv)) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) @@ -2197,7 +2197,7 @@ mem_write_ramw(uint32_t addr, uint16_t val, void *priv) } void -mem_write_raml(uint32_t addr, uint32_t val, void *priv) +mem_write_raml(uint32_t addr, uint32_t val, UNUSED(void *priv)) { #ifdef ENABLE_MEM_LOG if ((addr >= 0xa0000) && (addr <= 0xbffff)) @@ -2211,7 +2211,7 @@ mem_write_raml(uint32_t addr, uint32_t val, void *priv) } static uint8_t -mem_read_remapped(uint32_t addr, void *priv) +mem_read_remapped(uint32_t addr, UNUSED(void *priv)) { addr = 0xA0000 + (addr - remap_start_addr); if (is286) @@ -2220,7 +2220,7 @@ mem_read_remapped(uint32_t addr, void *priv) } static uint16_t -mem_read_remappedw(uint32_t addr, void *priv) +mem_read_remappedw(uint32_t addr, UNUSED(void *priv)) { addr = 0xA0000 + (addr - remap_start_addr); if (is286) @@ -2229,7 +2229,7 @@ mem_read_remappedw(uint32_t addr, void *priv) } static uint32_t -mem_read_remappedl(uint32_t addr, void *priv) +mem_read_remappedl(uint32_t addr, UNUSED(void *priv)) { addr = 0xA0000 + (addr - remap_start_addr); if (is286) @@ -2238,7 +2238,7 @@ mem_read_remappedl(uint32_t addr, void *priv) } static uint8_t -mem_read_remapped2(uint32_t addr, void *priv) +mem_read_remapped2(uint32_t addr, UNUSED(void *priv)) { addr = 0xD0000 + (addr - remap_start_addr2); if (is286) @@ -2247,7 +2247,7 @@ mem_read_remapped2(uint32_t addr, void *priv) } static uint16_t -mem_read_remappedw2(uint32_t addr, void *priv) +mem_read_remappedw2(uint32_t addr, UNUSED(void *priv)) { addr = 0xD0000 + (addr - remap_start_addr2); if (is286) @@ -2256,7 +2256,7 @@ mem_read_remappedw2(uint32_t addr, void *priv) } static uint32_t -mem_read_remappedl2(uint32_t addr, void *priv) +mem_read_remappedl2(uint32_t addr, UNUSED(void *priv)) { addr = 0xD0000 + (addr - remap_start_addr2); if (is286) @@ -2265,7 +2265,7 @@ mem_read_remappedl2(uint32_t addr, void *priv) } static void -mem_write_remapped(uint32_t addr, uint8_t val, void *priv) +mem_write_remapped(uint32_t addr, uint8_t val, UNUSED(void *priv)) { uint32_t oldaddr = addr; addr = 0xA0000 + (addr - remap_start_addr); @@ -2289,7 +2289,7 @@ mem_write_remappedw(uint32_t addr, uint16_t val, void *priv) } static void -mem_write_remappedl(uint32_t addr, uint32_t val, void *priv) +mem_write_remappedl(uint32_t addr, uint32_t val, UNUSED(void *priv)) { uint32_t oldaddr = addr; addr = 0xA0000 + (addr - remap_start_addr); @@ -2301,7 +2301,7 @@ mem_write_remappedl(uint32_t addr, uint32_t val, void *priv) } static void -mem_write_remapped2(uint32_t addr, uint8_t val, void *priv) +mem_write_remapped2(uint32_t addr, uint8_t val, UNUSED(void *priv)) { uint32_t oldaddr = addr; addr = 0xD0000 + (addr - remap_start_addr2); @@ -2325,7 +2325,7 @@ mem_write_remappedw2(uint32_t addr, uint16_t val, void *priv) } static void -mem_write_remappedl2(uint32_t addr, uint32_t val, void *priv) +mem_write_remappedl2(uint32_t addr, uint32_t val, UNUSED(void *priv)) { uint32_t oldaddr = addr; addr = 0xD0000 + (addr - remap_start_addr2); @@ -2340,7 +2340,7 @@ void mem_invalidate_range(uint32_t start_addr, uint32_t end_addr) { #ifdef USE_NEW_DYNAREC - page_t *p; + page_t *page; start_addr &= ~PAGE_MASK_MASK; end_addr = (end_addr + PAGE_MASK_MASK) & ~PAGE_MASK_MASK; @@ -2349,15 +2349,15 @@ mem_invalidate_range(uint32_t start_addr, uint32_t end_addr) if ((start_addr >> 12) >= pages_sz) continue; - p = &pages[start_addr >> 12]; - if (p) { - p->dirty_mask = 0xffffffffffffffffULL; + page = &pages[start_addr >> 12]; + if (page) { + page->dirty_mask = 0xffffffffffffffffULL; - if ((p->mem != page_ff) && p->byte_dirty_mask) - memset(p->byte_dirty_mask, 0xff, 64 * sizeof(uint64_t)); + if ((page->mem != page_ff) && page->byte_dirty_mask) + memset(page->byte_dirty_mask, 0xff, 64 * sizeof(uint64_t)); - if (!page_in_evict_list(p)) - page_add_to_evict_list(p); + if (!page_in_evict_list(page)) + page_add_to_evict_list(page); } } #else @@ -2730,7 +2730,9 @@ mem_a20_init(void) if (is6117) rammask |= 0x03000000; flushmmucache(); - // mem_a20_state = mem_a20_key | mem_a20_alt; +#if 0 + mem_a20_state = mem_a20_key | mem_a20_alt; +#endif } else { rammask = 0xfffff; flushmmucache(); diff --git a/src/mem/rom.c b/src/mem/rom.c index 80881c723..2ace87de7 100644 --- a/src/mem/rom.c +++ b/src/mem/rom.c @@ -384,7 +384,7 @@ rom_reset(uint32_t addr, int sz) } uint8_t -bios_read(uint32_t addr, void *priv) +bios_read(uint32_t addr, UNUSED(void *priv)) { uint8_t ret = 0xff; @@ -397,7 +397,7 @@ bios_read(uint32_t addr, void *priv) } uint16_t -bios_readw(uint32_t addr, void *priv) +bios_readw(uint32_t addr, UNUSED(void *priv)) { uint16_t ret = 0xffff; @@ -410,7 +410,7 @@ bios_readw(uint32_t addr, void *priv) } uint32_t -bios_readl(uint32_t addr, void *priv) +bios_readl(uint32_t addr, UNUSED(void *priv)) { uint32_t ret = 0xffffffff; @@ -442,7 +442,7 @@ bios_add(void) mem_mapping_add(&bios_mapping, 0xe0000, 0x20000, bios_read, bios_readw, bios_readl, NULL, NULL, NULL, - &rom[0x20000], MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, 0); + &rom[biosmask + 1 - 0x20000], MEM_MAPPING_EXTERNAL | MEM_MAPPING_ROM | MEM_MAPPING_ROMCS, 0); mem_set_mem_state_both(0x0e0000, 0x20000, MEM_READ_ROMCS | MEM_WRITE_ROMCS); @@ -524,7 +524,7 @@ bios_load(const char *fn1, const char *fn2, uint32_t addr, int sz, int off, int } int -bios_load_linear_combined(const char *fn1, const char *fn2, int sz, int off) +bios_load_linear_combined(const char *fn1, const char *fn2, int sz, UNUSED(int off)) { uint8_t ret = 0; diff --git a/src/mem/spd.c b/src/mem/spd.c index c39a3bffd..55146fd75 100644 --- a/src/mem/spd.c +++ b/src/mem/spd.c @@ -27,6 +27,7 @@ #include <86box/spd.h> #include <86box/version.h> #include <86box/machine.h> +#include <86box/plat_unused.h> #define SPD_ROLLUP(x) ((x) >= 16 ? ((x) -15) : (x)) @@ -54,7 +55,7 @@ spd_log(const char *fmt, ...) #endif static void -spd_close(void *priv) +spd_close(UNUSED(void *priv)) { spd_log("SPD: close()\n"); @@ -67,7 +68,7 @@ spd_close(void *priv) } static void * -spd_init(const device_t *info) +spd_init(UNUSED(const device_t *info)) { spd_log("SPD: init()\n"); @@ -181,7 +182,6 @@ spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size) uint8_t slot; uint8_t slot_count; uint8_t row; - uint8_t i; uint16_t min_module_size; uint16_t rows[SPD_MAX_SLOTS]; uint16_t asym; @@ -262,7 +262,7 @@ spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size) edo_data->dram_width = 8; edo_data->spd_rev = 0x12; - for (i = spd_write_part_no(edo_data->part_no, (ram_type == SPD_TYPE_FPM) ? "FPM" : "EDO", rows[row]); + for (int i = spd_write_part_no(edo_data->part_no, (ram_type == SPD_TYPE_FPM) ? "FPM" : "EDO", rows[row]); i < sizeof(edo_data->part_no); i++) edo_data->part_no[i] = ' '; /* part number should be space-padded */ edo_data->rev_code[0] = BCD8(EMU_VERSION_MAJ); @@ -270,9 +270,9 @@ spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size) edo_data->mfg_year = 20; edo_data->mfg_week = 17; - for (i = 0; i < 63; i++) + for (uint8_t i = 0; i < 63; i++) edo_data->checksum += spd_modules[slot]->data[i]; - for (i = 0; i < 129; i++) + for (uint8_t i = 0; i < 129; i++) edo_data->checksum2 += spd_modules[slot]->data[i]; break; @@ -316,7 +316,7 @@ spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size) sdram_data->ca_hold = sdram_data->data_hold = 0x08; sdram_data->spd_rev = 0x12; - for (i = spd_write_part_no(sdram_data->part_no, "SDR", rows[row]); + for (int i = spd_write_part_no(sdram_data->part_no, "SDR", rows[row]); i < sizeof(sdram_data->part_no); i++) sdram_data->part_no[i] = ' '; /* part number should be space-padded */ sdram_data->rev_code[0] = BCD8(EMU_VERSION_MAJ); @@ -327,11 +327,14 @@ spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size) sdram_data->freq = 100; sdram_data->features = 0xFF; - for (i = 0; i < 63; i++) + for (uint8_t i = 0; i < 63; i++) sdram_data->checksum += spd_modules[slot]->data[i]; - for (i = 0; i < 129; i++) + for (uint8_t i = 0; i < 129; i++) sdram_data->checksum2 += spd_modules[slot]->data[i]; break; + + default: + break; } row++; @@ -388,7 +391,7 @@ spd_write_drbs(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit /* Write DRB register, adding the previous DRB's value. */ if (row == 0) regs[drb] = 0; - else if ((apollo) && (drb == apollo)) + else if (apollo && (drb == apollo)) regs[drb] = regs[drb | 0xf]; /* 5F comes before 56 */ else regs[drb] = regs[drb - 1]; diff --git a/src/mem/sst_flash.c b/src/mem/sst_flash.c index 169a1dc6d..dbb91d358 100644 --- a/src/mem/sst_flash.c +++ b/src/mem/sst_flash.c @@ -17,7 +17,7 @@ * * Copyright 2008-2020 Sarah Walker. * Copyright 2016-2020 Miran Grca. - * Copyright 2020 Melissa Goad. + * Copyright 2020 Melody Goad. * Copyright 2022-2023 Jasmine Iwanek. */ #include @@ -35,21 +35,31 @@ #include <86box/m_xt_xi8088.h> typedef struct sst_t { - uint8_t manufacturer, id, has_bbp, is_39, - page_bytes, sdp, bbp_first_8k, bbp_last_8k; + uint8_t manufacturer; + uint8_t id; + uint8_t has_bbp; + uint8_t is_39; + uint8_t page_bytes; + uint8_t sdp; + uint8_t bbp_first_8k; + uint8_t bbp_last_8k; - int command_state, id_mode, - dirty; + int command_state; + int id_mode; + int dirty; - uint32_t size, mask, - page_mask, page_base, - last_addr; + uint32_t size; + uint32_t mask; + uint32_t page_mask; + uint32_t page_base; + uint32_t last_addr; - uint8_t page_buffer[128], - page_dirty[128]; + uint8_t page_buffer[128]; + uint8_t page_dirty[128]; uint8_t *array; - mem_mapping_t mapping[8], mapping_h[8]; + mem_mapping_t mapping[8]; + mem_mapping_t mapping_h[8]; pc_timer_t page_write_timer; } sst_t; @@ -252,9 +262,9 @@ sst_page_write(void *priv) } static uint8_t -sst_read_id(uint32_t addr, void *p) +sst_read_id(uint32_t addr, void *priv) { - sst_t *dev = (sst_t *) p; + sst_t *dev = (sst_t *) priv; uint8_t ret = 0x00; if ((addr & 0xffff) == 0) @@ -291,9 +301,9 @@ sst_buf_write(sst_t *dev, uint32_t addr, uint8_t val) } static void -sst_write(uint32_t addr, uint8_t val, void *p) +sst_write(uint32_t addr, uint8_t val, void *priv) { - sst_t *dev = (sst_t *) p; + sst_t *dev = (sst_t *) priv; switch (dev->command_state) { case 0: @@ -359,19 +369,22 @@ sst_write(uint32_t addr, uint8_t val, void *p) dev->bbp_last_8k = 0xff; dev->command_state = 0; break; + + default: + break; } } static uint8_t -sst_read(uint32_t addr, void *p) +sst_read(uint32_t addr, void *priv) { - sst_t *dev = (sst_t *) p; + sst_t *dev = (sst_t *) priv; uint8_t ret = 0xff; addr &= 0x000fffff; if (dev->id_mode) - ret = sst_read_id(addr, p); + ret = sst_read_id(addr, priv); else { if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask))) ret = dev->array[addr - biosaddr]; @@ -381,15 +394,15 @@ sst_read(uint32_t addr, void *p) } static uint16_t -sst_readw(uint32_t addr, void *p) +sst_readw(uint32_t addr, void *priv) { - sst_t *dev = (sst_t *) p; + sst_t *dev = (sst_t *) priv; uint16_t ret = 0xffff; addr &= 0x000fffff; if (dev->id_mode) - ret = sst_read(addr, p) | (sst_read(addr + 1, p) << 8); + ret = sst_read(addr, priv) | (sst_read(addr + 1, priv) << 8); else { if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask))) ret = *(uint16_t *) &dev->array[addr - biosaddr]; @@ -399,15 +412,15 @@ sst_readw(uint32_t addr, void *p) } static uint32_t -sst_readl(uint32_t addr, void *p) +sst_readl(uint32_t addr, void *priv) { - sst_t *dev = (sst_t *) p; + sst_t *dev = (sst_t *) priv; uint32_t ret = 0xffffffff; addr &= 0x000fffff; if (dev->id_mode) - ret = sst_readw(addr, p) | (sst_readw(addr + 2, p) << 16); + ret = sst_readw(addr, priv) | (sst_readw(addr + 2, priv) << 16); else { if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask))) ret = *(uint32_t *) &dev->array[addr - biosaddr]; @@ -499,10 +512,10 @@ sst_init(const device_t *info) } static void -sst_close(void *p) +sst_close(void *priv) { FILE *f; - sst_t *dev = (sst_t *) p; + sst_t *dev = (sst_t *) priv; if (dev->dirty) { f = nvr_fopen(flash_path, "wb"); diff --git a/src/network/CMakeLists.txt b/src/network/CMakeLists.txt index 54ec1edce..9f6d49a17 100644 --- a/src/network/CMakeLists.txt +++ b/src/network/CMakeLists.txt @@ -16,7 +16,7 @@ set(net_sources) list(APPEND net_sources network.c net_pcap.c net_slirp.c net_dp8390.c net_3c501.c net_3c503.c net_ne2000.c net_pcnet.c net_wd8003.c net_plip.c net_event.c net_null.c) -option(SLIRP_EXTERNAL "Link against the system-provided libslirp library" OFF) +option(SLIRP_EXTERNAL "Link against the system-provided libslirp library" ON) mark_as_advanced(SLIRP_EXTERNAL) if(SLIRP_EXTERNAL) diff --git a/src/nmi.c b/src/nmi.c index 4fde00765..fbe3bee19 100644 --- a/src/nmi.c +++ b/src/nmi.c @@ -7,11 +7,12 @@ #include #include <86box/io.h> #include <86box/nmi.h> +#include <86box/plat_unused.h> int nmi_mask; void -nmi_write(uint16_t port, uint8_t val, void *p) +nmi_write(UNUSED(uint16_t port), uint8_t val, UNUSED(void *priv)) { nmi_mask = val & 0x80; } diff --git a/src/nvr_at.c b/src/nvr_at.c index 6291590c6..2e5a2a5ba 100644 --- a/src/nvr_at.c +++ b/src/nvr_at.c @@ -300,23 +300,30 @@ #define FLAG_P6RP4_HACK 0x10 #define FLAG_PIIX4 0x20 -typedef struct { +typedef struct local_t { int8_t stat; - uint8_t cent, def, - flags, read_addr, - wp_0d, wp_32, - pad, pad0; + uint8_t cent; + uint8_t def; + uint8_t flags; + uint8_t read_addr; + uint8_t wp_0d; + uint8_t wp_32; + uint8_t pad; + uint8_t pad0; - uint8_t addr[8], wp[2], - bank[8], *lock; + uint8_t addr[8]; + uint8_t wp[2]; + uint8_t bank[8]; + uint8_t *lock; - int16_t count, state; + int16_t count; + int16_t state; - uint64_t ecount, - rtc_time; - pc_timer_t update_timer, - rtc_timer; + uint64_t ecount; + uint64_t rtc_time; + pc_timer_t update_timer; + pc_timer_t rtc_timer; } local_t; static uint8_t nvr_at_inited = 0; @@ -653,8 +660,10 @@ nvr_write(uint16_t addr, uint8_t val, void *priv) return; if (addr & 1) { - // if (local->bank[addr_id] == 0xff) - // return; +#if 0 + if (local->bank[addr_id] == 0xff) + return; +#endif nvr_reg_write(local->addr[addr_id], val, priv); } else { local->addr[addr_id] = (val & (nvr->size - 1)); @@ -1112,6 +1121,9 @@ nvr_at_init(const device_t *info) nvr->irq = -1; local->cent = RTC_CENTURY_ELT; break; + + default: + break; } local->read_addr = 1; diff --git a/src/nvr_ps2.c b/src/nvr_ps2.c index dd87cbb80..a06ffb7bb 100644 --- a/src/nvr_ps2.c +++ b/src/nvr_ps2.c @@ -49,7 +49,7 @@ #include <86box/nvr_ps2.h> #include <86box/rom.h> -typedef struct { +typedef struct ps2_nvr_t { int addr; uint8_t *ram; @@ -76,6 +76,9 @@ ps2_nvr_read(uint16_t port, void *priv) case 0x76: ret = nvr->ram[nvr->addr]; break; + + default: + break; } return ret; @@ -98,6 +101,9 @@ ps2_nvr_write(uint16_t port, uint8_t val, void *priv) case 0x76: nvr->ram[nvr->addr] = val; break; + + default: + break; } } diff --git a/src/pci.c b/src/pci.c index 5b6a40138..5b4282c5a 100644 --- a/src/pci.c +++ b/src/pci.c @@ -34,9 +34,12 @@ #include <86box/dma.h> #include <86box/pci.h> #include <86box/keyboard.h> +#include <86box/plat_unused.h> -typedef struct { - uint8_t bus, id, type; +typedef struct pci_card_t { + uint8_t bus; + uint8_t id; + uint8_t type; uint8_t irq_routing[4]; void *priv; @@ -44,7 +47,7 @@ typedef struct { uint8_t (*read)(int func, int addr, void *priv); } pci_card_t; -typedef struct { +typedef struct pci_mirq_t { uint8_t enabled; uint8_t irq_line; } pci_mirq_t; @@ -53,6 +56,10 @@ int pci_burst_time; int agp_burst_time; int pci_nonburst_time; int agp_nonburst_time; +int pci_take_over_io; + +uint32_t pci_base = 0xc000; +uint32_t pci_size = 0x1000; static pci_card_t pci_cards[32]; static uint8_t pci_pmc = 0; @@ -74,8 +81,6 @@ static int pci_bus; static int pci_enable; static int pci_key; static int trc_reg = 0; -static uint32_t pci_base = 0xc000; -static uint32_t pci_size = 0x1000; static void pci_reset_regs(void); @@ -141,7 +146,7 @@ pci_relocate_slot(int type, int new_slot) } static void -pci_cf8_write(uint16_t port, uint32_t val, void *priv) +pci_cf8_write(UNUSED(uint16_t port), uint32_t val, UNUSED(void *priv)) { pci_log("cf8 write: %08X\n", val); pci_index = val & 0xff; @@ -152,13 +157,13 @@ pci_cf8_write(uint16_t port, uint32_t val, void *priv) } static uint32_t -pci_cf8_read(uint16_t port, void *priv) +pci_cf8_read(UNUSED(uint16_t port), UNUSED(void *priv)) { return pci_index | (pci_func << 8) | (pci_card << 11) | (pci_bus << 16) | (pci_enable << 31); } static void -pci_write(uint16_t port, uint8_t val, void *priv) +pci_write(uint16_t port, uint8_t val, UNUSED(void *priv)) { uint8_t slot = 0; @@ -191,11 +196,14 @@ pci_write(uint16_t port, uint8_t val, void *priv) #endif break; + + default: + break; } } static void -pci_writew(uint16_t port, uint16_t val, void *priv) +pci_writew(uint16_t port, uint16_t val, UNUSED(void *priv)) { uint8_t slot = 0; @@ -229,11 +237,14 @@ pci_writew(uint16_t port, uint16_t val, void *priv) #endif break; + + default: + break; } } static void -pci_writel(uint16_t port, uint32_t val, void *priv) +pci_writel(uint16_t port, uint32_t val, UNUSED(void *priv)) { uint8_t slot = 0; @@ -269,11 +280,14 @@ pci_writel(uint16_t port, uint32_t val, void *priv) #endif break; + + default: + break; } } static uint8_t -pci_read(uint16_t port, void *priv) +pci_read(uint16_t port, UNUSED(void *priv)) { uint8_t slot = 0; uint8_t ret = 0xff; @@ -302,6 +316,10 @@ pci_read(uint16_t port, void *priv) else pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif + break; + + default: + break; } pci_log("Reading %02X, from PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", ret, pci_bus, pci_card, slot, pci_func, pci_index | (port & 3)); @@ -310,7 +328,7 @@ pci_read(uint16_t port, void *priv) } static uint16_t -pci_readw(uint16_t port, void *priv) +pci_readw(uint16_t port, UNUSED(void *priv)) { uint8_t slot = 0; uint16_t ret = 0xffff; @@ -341,6 +359,10 @@ pci_readw(uint16_t port, void *priv) else pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif + break; + + default: + break; } pci_log("Reading %04X, from PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", ret, pci_bus, pci_card, slot, pci_func, pci_index | (port & 3)); @@ -349,7 +371,7 @@ pci_readw(uint16_t port, void *priv) } static uint32_t -pci_readl(uint16_t port, void *priv) +pci_readl(uint16_t port, UNUSED(void *priv)) { uint8_t slot = 0; uint32_t ret = 0xffffffff; @@ -382,6 +404,10 @@ pci_readl(uint16_t port, void *priv) else pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3)); #endif + break; + + default: + break; } pci_log("Reading %08X, from PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", ret, pci_bus, pci_card, slot, pci_func, pci_index | (port & 3)); @@ -389,19 +415,17 @@ pci_readl(uint16_t port, void *priv) return ret; } -static void pci_type2_write(uint16_t port, uint8_t val, void *priv); -static uint8_t pci_type2_read(uint16_t port, void *priv); - void pci_set_pmc(uint8_t pmc) { pci_log("pci_set_pmc(%02X)\n", pmc); - // pci_reset_regs(); +#if 0 + pci_reset_regs(); +#endif if (!pci_pmc && (pmc & 0x01)) { - io_removehandler(pci_base, pci_size, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); + pci_log("PMC: Dellocating ports %04X-%04X...\n", pci_base, pci_base + pci_size - 1); + pci_take_over_io &= ~PCI_IO_ON; io_removehandler(0x0cf8, 1, pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL); @@ -414,13 +438,11 @@ pci_set_pmc(uint8_t pmc) io_sethandler(0x0cfc, 4, pci_read, pci_readw, pci_readl, pci_write, pci_writew, pci_writel, NULL); } else if (pci_pmc && !(pmc & 0x01)) { - io_removehandler(pci_base, pci_size, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); + pci_log("PMC: Redellocating ports %04X-%04X...\n", pci_base, pci_base + pci_size - 1); + pci_take_over_io &= ~PCI_IO_ON; if (pci_key) { - io_sethandler(pci_base, pci_size, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); + pci_log("PMC: Allocating ports %04X-%04X...\n", pci_base, pci_base + pci_size - 1); + pci_take_over_io |= PCI_IO_ON; } io_removehandler(0x0cf8, 1, @@ -439,67 +461,97 @@ pci_set_pmc(uint8_t pmc) } static void -pci_type2_write(uint16_t port, uint8_t val, void *priv) +pci_type2_write_reg(uint16_t port, uint8_t val) { uint8_t slot = 0; - if (port == 0xcf8) { - pci_func = (val >> 1) & 7; + pci_card = (port >> 8) & 0xf; + pci_index = port & 0xff; - if (!pci_key && (val & 0xf0)) { - io_removehandler(pci_base, pci_size, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); - io_sethandler(pci_base, pci_size, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); - } else if (pci_key && !(val & 0xf0)) - io_removehandler(pci_base, pci_size, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); - - pci_key = val & 0xf0; - } else if (port == 0xcfa) { - pci_bus = val; - - pci_log("Allocating ports %04X-%04X...\n", pci_base, pci_base + pci_size - 1); - - /* Evidently, writing here, we should also enable the - configuration space. */ - io_removehandler(pci_base, pci_size, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); - io_sethandler(pci_base, pci_size, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); - - /* Mark as enabled. */ - pci_key |= 0x100; - } else if (port == 0xcfb) { - pci_log("Write %02X to port 0CFB\n", val); - pci_set_pmc(val); - } else { - pci_card = (port >> 8) & 0xf; - pci_index = port & 0xff; - - slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; - if (slot != 0xff) { - if (pci_cards[slot].write) - pci_cards[slot].write(pci_func, pci_index | (port & 3), val, pci_cards[slot].priv); -#ifdef ENABLE_PCI_LOG - else - pci_log("Writing to empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); -#endif - } + slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; + if (slot != 0xff) { + if (pci_cards[slot].write) + pci_cards[slot].write(pci_func, pci_index | (port & 3), val, pci_cards[slot].priv); #ifdef ENABLE_PCI_LOG else - pci_log("Writing to unassigned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); + pci_log("Writing to empty PCI card on slot %02X:%02X (pci_cards[%i]) (%02X:%02X)...\n", pci_bus, pci_card, slot, pci_func, pci_index); #endif } +#ifdef ENABLE_PCI_LOG + else + pci_log("Writing to unassigned PCI card on slot %02X:%02X (pci_cards[%i]) (%02X:%02X)...\n", pci_bus, pci_card, slot, pci_func, pci_index); +#endif +} + +void +pci_type2_write(uint16_t port, uint8_t val, UNUSED(void *priv)) +{ + switch (port) { + case 0xcf8: + pci_func = (val >> 1) & 7; + + if (val & 0xf0) { + pci_log("CF8: Allocating ports %04X-%04X...\n", pci_base, pci_base + pci_size - 1); + pci_take_over_io |= PCI_IO_ON; + } else { + pci_log("CF8: Dellocating ports %04X-%04X...\n", pci_base, pci_base + pci_size - 1); + pci_take_over_io &= ~PCI_IO_ON; + } + + pci_key = val & 0xf0; + break; + case 0xcfa: + pci_bus = val; + + pci_log("CFA: Allocating ports %04X-%04X...\n", pci_base, pci_base + pci_size - 1); + + /* Evidently, writing here, we should also enable the + configuration space. */ + pci_take_over_io |= PCI_IO_ON; + + /* Mark as enabled. */ + pci_key |= 0x100; + break; + case 0xcfb: + pci_log("Write %02X to port 0CFB\n", val); + pci_set_pmc(val); + break; + + case 0xc000 ... 0xc0ff: + if (pci_take_over_io == 0x00000000) + break; + + pci_type2_write_reg(port, val); + break; + + case 0xc100 ... 0xcfff: + if (!(pci_take_over_io & PCI_IO_ON)) + break; + + pci_type2_write_reg(port, val); + break; + + default: + break; + } } -static void +void +pci_type2_writew(uint16_t port, uint16_t val, void *priv) +{ + pci_type2_write(port, val & 0xff, priv); + pci_type2_write(port + 1, val >> 8, priv); +} + +void pci_type2_writel(uint16_t port, uint32_t val, void *priv) +{ + pci_type2_writew(port, val & 0xffff, priv); + pci_type2_writew(port + 2, val >> 16, priv); +} + +static void +pci_type2_cfb_writel(uint16_t port, uint32_t val, void *priv) { for (uint8_t i = 0; i < 4; i++) { /* Make sure to have the DWORD write not pass through to PMC if mechanism 1 is in use, @@ -510,41 +562,88 @@ pci_type2_writel(uint16_t port, uint32_t val, void *priv) } static uint8_t -pci_type2_read(uint16_t port, void *priv) +pci_type2_read_reg(uint16_t port) { uint8_t slot = 0; uint8_t ret = 0xff; - if (port == 0xcf8) - ret = pci_key | (pci_func << 1); - else if (port == 0xcfa) - ret = pci_bus; - else if (port == 0xcfb) - ret = pci_pmc; - else { - pci_card = (port >> 8) & 0xf; - pci_index = port & 0xff; + pci_card = (port >> 8) & 0xf; + pci_index = port & 0xff; - slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; - if (slot != 0xff) { - if (pci_cards[slot].read) - ret = pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv); -#ifdef ENABLE_PCI_LOG - else - pci_log("Reading from empty PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); -#endif - } + slot = pci_card_to_slot_mapping[pci_bus_number_to_index_mapping[pci_bus]][pci_card]; + if (slot != 0xff) { + if (pci_cards[slot].read) + ret = pci_cards[slot].read(pci_func, pci_index | (port & 3), pci_cards[slot].priv); #ifdef ENABLE_PCI_LOG else - pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index); + pci_log("Reading from empty PCI card on slot %02X:%02X (pci_cards[%i]) (%02X:%02X)...\n", pci_bus, pci_card, slot, pci_func, pci_index); +#endif + } +#ifdef ENABLE_PCI_LOG + else + pci_log("Reading from unasisgned PCI card on slot %02X:%02X (pci_cards[%i]) (%02X:%02X)...\n", pci_bus, pci_card, slot, pci_func, pci_index); #endif - pci_log("Reading %02X at PCI register %02X at bus %02X, card %02X, function %02X\n", ret, pci_index, pci_bus, pci_card, pci_func); + pci_log("Reading %02X at PCI register %02X at bus %02X, card %02X, function %02X\n", ret, pci_index, pci_bus, pci_card, pci_func); + + return ret; +} + +uint8_t +pci_type2_read(uint16_t port, UNUSED(void *priv)) +{ + uint8_t ret = 0xff; + + switch (port) { + case 0xcf8: + ret = pci_key | (pci_func << 1); + break; + case 0xcfa: + ret = pci_bus; + break; + case 0xcfb: + ret = pci_pmc; + break; + + case 0xc000 ... 0xc0ff: + if (pci_take_over_io == 0x00000000) + break; + + ret = pci_type2_read_reg(port); + break; + + case 0xc100 ... 0xcfff: + if (!(pci_take_over_io & PCI_IO_ON)) + break; + + ret = pci_type2_read_reg(port); + break; + + default: + break; } return ret; } +uint16_t +pci_type2_readw(uint16_t port, void *priv) +{ + uint16_t ret = pci_type2_read(port, priv); + ret |= ((uint16_t) pci_type2_read(port + 1, priv)) << 8; + + return ret; +} + +uint32_t +pci_type2_readl(uint16_t port, void *priv) +{ + uint32_t ret = pci_type2_readw(port, priv); + ret |= ((uint32_t) pci_type2_readw(port + 2, priv)) << 16; + + return ret; +} + void pci_set_irq_routing(int pci_int, int irq) { @@ -826,9 +925,7 @@ pci_reset_regs(void) { pci_index = pci_card = pci_func = pci_bus = pci_key = 0; - io_removehandler(pci_base, pci_size, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); + pci_take_over_io &= ~PCI_IO_ON; } void @@ -899,19 +996,19 @@ pci_slots_clear(void) } uint32_t -trc_readl(uint16_t port, void *priv) +trc_readl(UNUSED(uint16_t port), UNUSED(void *priv)) { return 0xffffffff; } uint16_t -trc_readw(uint16_t port, void *priv) +trc_readw(UNUSED(uint16_t port), UNUSED(void *priv)) { return 0xffff; } uint8_t -trc_read(uint16_t port, void *priv) +trc_read(UNUSED(uint16_t port), UNUSED(void *priv)) { return trc_reg & 0xfb; } @@ -939,17 +1036,19 @@ trc_reset(uint8_t val) } void -trc_writel(uint16_t port, uint32_t val, void *priv) +trc_writel(UNUSED(uint16_t port), UNUSED(uint32_t val), UNUSED(void *priv)) { + // } void -trc_writew(uint16_t port, uint16_t val, void *priv) +trc_writew(UNUSED(uint16_t port), UNUSED(uint16_t val), UNUSED(void *priv)) { + // } void -trc_write(uint16_t port, uint8_t val, void *priv) +trc_write(UNUSED(uint16_t port), uint8_t val, UNUSED(void *priv)) { pci_log("TRC Write: %02X\n", val); @@ -993,7 +1092,7 @@ pci_init(int type) pci_pmc = 0x00; io_sethandler(0x0cfb, 1, - pci_type2_read, NULL, NULL, pci_type2_write, NULL, pci_type2_writel, NULL); + pci_type2_read, NULL, NULL, pci_type2_write, NULL, pci_type2_cfb_writel, NULL); } if (type & PCI_NO_IRQ_STEERING) { @@ -1004,6 +1103,8 @@ pci_init(int type) pic_elcr_set_enabled(1); } + pci_take_over_io = 0x00000000; + if ((type & PCI_CONFIG_TYPE_MASK) == PCI_CONFIG_TYPE_1) { pci_log("PCI: Configuration mechanism #1\n"); io_sethandler(0x0cf8, 1, @@ -1024,9 +1125,7 @@ pci_init(int type) pci_base = 0xc100; pci_size = 0x0f00; - io_sethandler(0xc000, 0x0100, - pci_type2_read, NULL, NULL, - pci_type2_write, NULL, NULL, NULL); + pci_take_over_io |= PCI_IO_DEV0; } } diff --git a/src/pci_dummy.c b/src/pci_dummy.c index b85df7ab9..3d437247d 100644 --- a/src/pci_dummy.c +++ b/src/pci_dummy.c @@ -9,14 +9,15 @@ #include <86box/io.h> #include <86box/pci.h> #include <86box/pci_dummy.h> +#include <86box/plat_unused.h> -typedef struct -{ +typedef struct pci_dummy_t { uint8_t pci_regs[256]; bar_t pci_bar[2]; - uint8_t card, interrupt_on; + uint8_t card; + uint8_t interrupt_on; } pci_dummy_t; static void @@ -29,12 +30,12 @@ pci_dummy_interrupt(int set, pci_dummy_t *dev) } static uint8_t -pci_dummy_read(uint16_t Port, void *p) +pci_dummy_read(uint16_t port, void *priv) { - pci_dummy_t *dev = (pci_dummy_t *) p; + pci_dummy_t *dev = (pci_dummy_t *) priv; uint8_t ret = 0xff; - switch (Port & 0x20) { + switch (port & 0x20) { case 0x00: ret = 0x1a; break; @@ -60,48 +61,54 @@ pci_dummy_read(uint16_t Port, void *p) dev->interrupt_on = 0; } break; + + default: + break; } return ret; } static uint16_t -pci_dummy_readw(uint16_t Port, void *p) +pci_dummy_readw(uint16_t port, void *priv) { - return pci_dummy_read(Port, p); + return pci_dummy_read(port, priv); } static uint32_t -pci_dummy_readl(uint16_t Port, void *p) +pci_dummy_readl(uint16_t port, void *priv) { - return pci_dummy_read(Port, p); + return pci_dummy_read(port, priv); } static void -pci_dummy_write(uint16_t Port, uint8_t Val, void *p) +pci_dummy_write(uint16_t port, UNUSED(uint8_t val), void *priv) { - pci_dummy_t *dev = (pci_dummy_t *) p; + pci_dummy_t *dev = (pci_dummy_t *) priv; - switch (Port & 0x20) { + switch (port & 0x20) { case 0x06: if (!dev->interrupt_on) { dev->interrupt_on = 1; pci_dummy_interrupt(1, dev); } break; + + default: + break; } } static void -pci_dummy_writew(uint16_t Port, uint16_t Val, void *p) +pci_dummy_writew(uint16_t port, uint16_t val, void *priv) { - pci_dummy_write(Port, Val & 0xFF, p); + pci_dummy_write(port, val & 0xFF, priv); } static void -pci_dummy_writel(uint16_t Port, uint32_t Val, void *p) +pci_dummy_writel(uint16_t port, uint32_t val, void *priv) { - pci_dummy_write(Port, Val & 0xFF, p); + pci_dummy_write(port, val & 0xFF, priv); } static void @@ -172,7 +179,9 @@ pci_dummy_pci_read(int func, int addr, void *priv) break; } - // pclog("AB0B:071A: PCI_Read(%d, %04X) = %02X\n", func, addr, ret); +#if 0 + pclog("AB0B:071A: PCI_Read(%d, %04X) = %02X\n", func, addr, ret); +#endif return ret; } @@ -183,7 +192,9 @@ pci_dummy_pci_write(int func, int addr, uint8_t val, void *priv) pci_dummy_t *dev = (pci_dummy_t *) priv; uint8_t valxor; - // pclog("AB0B:071A: PCI_Write(%d, %04X, %02X)\n", func, addr, val); +#if 0 + pclog("AB0B:071A: PCI_Write(%d, %04X, %02X)\n", func, addr, val); +#endif if (func == 0x00) switch (addr) { @@ -225,6 +236,9 @@ pci_dummy_pci_write(int func, int addr, uint8_t val, void *priv) pclog("AB0B:071A Device %02X: IRQ now: %i\n", dev->card, val); dev->pci_regs[addr] = val; return; + + default: + break; } } @@ -252,7 +266,7 @@ pci_dummy_close(void *priv) } static void * -pci_dummy_card_init(const device_t *info) +pci_dummy_card_init(UNUSED(const device_t *info)) { pci_dummy_t *dev = (pci_dummy_t *) calloc(1, sizeof(pci_dummy_t)); diff --git a/src/pic.c b/src/pic.c index ffb370ce2..8a57d15b9 100644 --- a/src/pic.c +++ b/src/pic.c @@ -37,6 +37,7 @@ #include <86box/apm.h> #include <86box/nvr.h> #include <86box/acpi.h> +#include <86box/plat_unused.h> enum { STATE_NONE = 0, @@ -140,7 +141,7 @@ pic_elcr_write(uint16_t port, uint8_t val, void *priv) } uint8_t -pic_elcr_read(uint16_t port, void *priv) +pic_elcr_read(UNUSED(uint16_t port), void *priv) { pic_t *dev = (pic_t *) priv; @@ -191,8 +192,8 @@ find_best_interrupt(pic_t *dev) { uint8_t b; uint8_t intr; - int j; - int ret = -1; + uint8_t j; + int8_t ret = -1; for (uint8_t i = 0; i < 8; i++) { j = (i + dev->priority) & 7; @@ -334,7 +335,7 @@ pic_acknowledge(pic_t *dev) static uint8_t pic_non_specific_find(pic_t *dev) { - int j; + uint8_t j; uint8_t b; uint8_t irq = 0xff; @@ -398,7 +399,7 @@ pic_command(pic_t *dev) } uint8_t -pic_latch_read(uint16_t addr, void *priv) +pic_latch_read(UNUSED(uint16_t addr), UNUSED(void *priv)) { uint8_t ret = 0xff; @@ -495,6 +496,9 @@ pic_write(uint16_t addr, uint8_t val, void *priv) dev->imr = val; update_pending(); break; + + default: + break; } } else { if (val & 0x10) { @@ -531,14 +535,12 @@ pic_write(uint16_t addr, uint8_t val, void *priv) void pic_set_pci(void) { - int i; - - for (i = 0x0024; i < 0x0040; i += 4) { + for (uint8_t i = 0x0024; i < 0x0040; i += 4) { io_sethandler(i, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic); io_sethandler(i + 0x0080, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic2); } - for (i = 0x1120; i < 0x1140; i += 4) { + for (uint16_t i = 0x1120; i < 0x1140; i += 4) { io_sethandler(i, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic); io_sethandler(i + 0x0080, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic2); } @@ -584,7 +586,7 @@ pic_reset_hard(void) /* The situation is as follows: There is a giant mess when it comes to these latches on real hardware, to the point that there's even boards with board-level latched that get used in place of the latches on the chipset, therefore, I'm just doing this here for the sake of simplicity. */ - if (machine_has_bus(machine, MACHINE_BUS_PS2)) { + if (machine_has_bus(machine, MACHINE_BUS_PS2_LATCH)) { pic_kbd_latch(0x01); pic_mouse_latch(0x01); } else { @@ -628,7 +630,7 @@ picint_common(uint16_t num, int level, int set) /* Make sure to ignore all slave IRQ's, and in case of AT+, translate IRQ 2 to IRQ 9. */ for (uint8_t i = 0; i < 8; i++) { - b = (1 << i); + b = (uint8_t) (1 << i); raise = num & b; if (pic.icw3 & b) { @@ -779,7 +781,7 @@ pic_irq_ack_read(pic_t *dev, int phase) uint8_t pic_irq_ack(void) { - int ret; + uint8_t ret; /* Needed for Xi8088. */ if ((pic.ack_bytes == 0) && pic.int_pending && pic_slave_on(&pic, pic.interrupt)) { diff --git a/src/pit.c b/src/pit.c index cf339607d..3fe959c7f 100644 --- a/src/pit.c +++ b/src/pit.c @@ -41,6 +41,7 @@ #include <86box/sound.h> #include <86box/snd_speaker.h> #include <86box/video.h> +#include <86box/plat_unused.h> pit_intf_t pit_devs[2]; @@ -171,6 +172,9 @@ ctr_tick(ctr_t *ctr) case 3: ctr_decrease_count(ctr); break; + + default: + break; } break; case 1: @@ -189,6 +193,9 @@ ctr_tick(ctr_t *ctr) case 6: ctr_decrease_count(ctr); break; + + default: + break; } break; case 2: @@ -211,6 +218,9 @@ ctr_tick(ctr_t *ctr) } } break; + + default: + break; } break; case 3: @@ -254,6 +264,9 @@ ctr_tick(ctr_t *ctr) ctr->newcount = 0; } break; + + default: + break; } break; case 4: @@ -279,6 +292,9 @@ ctr_tick(ctr_t *ctr) ctr->state = 0; ctr_set_out(ctr, 1); break; + + default: + break; } } break; @@ -369,6 +385,9 @@ ctr_latch_count(ctr_t *ctr) ctr->rl = count; ctr->latched = 2; break; + + default: + break; } pit_log("latched counter = %04X\n", ctr->rl & 0xffff); @@ -439,6 +458,9 @@ pit_ctr_set_gate(void *data, int counter_id, int gate) ctr_set_out(ctr, 1); } break; + + default: + break; } } @@ -487,9 +509,9 @@ pit_ctr_set_using_timer(void *data, int counter_id, int using_timer) } static void -pit_timer_over(void *p) +pit_timer_over(void *priv) { - pit_t *dev = (pit_t *) p; + pit_t *dev = (pit_t *) priv; dev->clock ^= 1; @@ -602,8 +624,14 @@ pit_write(uint16_t addr, uint8_t val, void *priv) else ctr->wm |= 0x80; break; + + default: + break; } break; + + default: + break; } } @@ -675,8 +703,14 @@ pit_read(uint16_t addr, void *priv) else ctr->rm |= 0x80; break; + + default: + break; } break; + + default: + break; } pit_log("[%04X:%08X] pit_read(%04X, %08X) = %02X\n", CS, cpu_state.pc, addr, priv, ret); @@ -714,7 +748,7 @@ pit_refresh_timer_at(int new_out, int old_out) } void -pit_speaker_timer(int new_out, int old_out) +pit_speaker_timer(int new_out, UNUSED(int old_out)) { int l; @@ -734,7 +768,7 @@ pit_speaker_timer(int new_out, int old_out) } void -pit_nmi_timer_ps2(int new_out, int old_out) +pit_nmi_timer_ps2(int new_out, UNUSED(int old_out)) { nmi = new_out; @@ -893,8 +927,8 @@ pit_common_init(int type, void (*out0)(int new_out, int old_out), void (*out1)(i pit_intf_t *pit_intf = &pit_devs[0]; switch (type) { - case PIT_8253: default: + case PIT_8253: pit = device_add(&i8253_device); *pit_intf = pit_classic_intf; break; @@ -937,8 +971,8 @@ pit_ps2_init(int type) pit_intf_t *ps2_pit = &pit_devs[1]; switch (type) { - case PIT_8254: default: + case PIT_8254: pit = device_add(&i8254_ps2_device); *ps2_pit = pit_classic_intf; break; diff --git a/src/pit_fast.c b/src/pit_fast.c index 4e7bc77c7..1bd75f2aa 100644 --- a/src/pit_fast.c +++ b/src/pit_fast.c @@ -207,6 +207,9 @@ pitf_ctr_load(ctrf_t *ctr) case 5: /*Hardware triggered stobe*/ ctr->enabled = 1; break; + + default: + break; } if (ctr->load_func != NULL) @@ -266,6 +269,9 @@ pitf_set_gate_no_timer(ctrf_t *ctr, int gate) } ctr->enabled = gate; break; + + default: + break; } ctr->gate = gate; ctr->running = ctr->enabled && ctr->using_timer && !ctr->disabled; @@ -327,7 +333,10 @@ pitf_over(ctrf_t *ctr) if (ctr->using_timer) timer_advance_u64(&ctr->timer, (uint64_t) (((l + 1) >> 1) * PITCONST)); } - // if (!t) pclog("pit_over: square wave mode c=%x %lli %f\n", pit.c[t], tsc, PITCONST); +#if 0 + if (!t) + pclog("pit_over: square wave mode c=%x %lli %f\n", pit.c[t], tsc, PITCONST); +#endif break; case 4: /*Software triggered strove*/ if (!ctr->thit) { @@ -356,6 +365,9 @@ pitf_over(ctrf_t *ctr) if (ctr->using_timer) timer_advance_u64(&ctr->timer, (uint64_t) (0xffff * PITCONST)); break; + + default: + break; } ctr->running = ctr->enabled && ctr->using_timer && !ctr->disabled; if (ctr->using_timer && !ctr->running) @@ -366,8 +378,10 @@ static __inline void pitf_ctr_latch_count(ctrf_t *ctr) { ctr->rl = pitf_read_timer(ctr); - // pclog("Timer latch %f %04X %04X\n",pit->c[0],pit->rl[0],pit->l[0]); - // pit->ctrl |= 0x30; +#if 0 + pclog("Timer latch %f %04X %04X\n",pit->c[0],pit->rl[0],pit->l[0]); + pit->ctrl |= 0x30; +#endif ctr->rereadlatch = 0; ctr->rm = 3; ctr->latched = 1; @@ -472,8 +486,14 @@ pitf_write(uint16_t addr, uint8_t val, void *priv) ctr->l |= val; ctr->wm = 0; break; + + default: + break; } break; + + default: + break; } } @@ -530,8 +550,14 @@ pitf_read(uint16_t addr, void *priv) else ctr->rm = 0; break; + + default: + break; } break; + + default: + break; } pit_log("[%04X:%08X] pit_read(%04X, %08X) = %02X\n", CS, cpu_state.pc, addr, priv, ret); @@ -540,9 +566,9 @@ pitf_read(uint16_t addr, void *priv) } static void -pitf_timer_over(void *p) +pitf_timer_over(void *priv) { - ctrf_t *ctr = (ctrf_t *) p; + ctrf_t *ctr = (ctrf_t *) priv; pitf_over(ctr); } diff --git a/src/port_6x.c b/src/port_6x.c index 2bfebcee0..323d8e0c8 100644 --- a/src/port_6x.c +++ b/src/port_6x.c @@ -36,6 +36,7 @@ #include <86box/ppi.h> #include <86box/video.h> #include <86box/port_6x.h> +#include <86box/plat_unused.h> #define PS2_REFRESH_TIME (16 * TIMER_USEC) @@ -68,11 +69,14 @@ port_6x_write(uint16_t port, uint8_t val, void *priv) if (dev->flags & PORT_6X_TURBO) xi8088_turbo_set(!!(val & 0x04)); break; + + default: + break; } } static uint8_t -port_61_read_simple(uint16_t port, void *priv) +port_61_read_simple(UNUSED(uint16_t port), UNUSED(void *priv)) { uint8_t ret = ppi.pb & 0x1f; @@ -83,7 +87,7 @@ port_61_read_simple(uint16_t port, void *priv) } static uint8_t -port_61_read(uint16_t port, void *priv) +port_61_read(UNUSED(uint16_t port), void *priv) { port_6x_t *dev = (port_6x_t *) priv; uint8_t ret = 0xff; @@ -106,7 +110,7 @@ port_61_read(uint16_t port, void *priv) } static uint8_t -port_62_read(uint16_t port, void *priv) +port_62_read(UNUSED(uint16_t port), UNUSED(void *priv)) { uint8_t ret = 0xff; diff --git a/src/port_92.c b/src/port_92.c index fd0471b0e..80afe9e58 100644 --- a/src/port_92.c +++ b/src/port_92.c @@ -29,6 +29,7 @@ #include <86box/mem.h> #include <86box/pit.h> #include <86box/port_92.h> +#include <86box/plat_unused.h> #define PORT_92_INV 1 #define PORT_92_WORD 2 @@ -74,7 +75,7 @@ port_92_readw(uint16_t port, void *priv) TODO: ALi M1543(c) behavior. */ static void -port_92_pulse(void *priv) +port_92_pulse(UNUSED(void *priv)) { softresetx86(); /* Pulse reset! */ cpu_set_edx(); @@ -174,7 +175,7 @@ port_92_remove(void *priv) } static void -port_92_reset(void *priv) +port_92_reset(UNUSED(void *priv)) { cpu_alt_reset = 0; diff --git a/src/printer/png.c b/src/printer/png.c index 49da1ee18..2134f3343 100644 --- a/src/printer/png.c +++ b/src/printer/png.c @@ -92,13 +92,13 @@ png_log(const char *fmt, ...) #endif static void -error_handler(png_structp arg, const char *str) +error_handler(UNUSED(png_structp arg), UNUSED(const char *str)) { png_log("PNG: stream 0x%08lx error '%s'\n", arg, str); } static void -warning_handler(png_structp arg, const char *str) +warning_handler(UNUSED(png_structp arg), UNUSED(const char *str)) { png_log("PNG: stream 0x%08lx warning '%s'\n", arg, str); } diff --git a/src/printer/prt_cpmap.c b/src/printer/prt_cpmap.c index ba9e71085..f2916eef8 100644 --- a/src/printer/prt_cpmap.c +++ b/src/printer/prt_cpmap.c @@ -572,7 +572,7 @@ static const struct { void select_codepage(uint16_t code, uint16_t *curmap) { - int i = 0; + uint16_t i = 0; const uint16_t *map_to_use; map_to_use = maps[0].map; diff --git a/src/printer/prt_escp.c b/src/printer/prt_escp.c index f1697e074..5fc3646bc 100644 --- a/src/printer/prt_escp.c +++ b/src/printer/prt_escp.c @@ -181,7 +181,7 @@ static dllimp_t ft_imports[] = { #define PIXX ((unsigned) floor(dev->curr_x * dev->dpi + 0.5)) #define PIXY ((unsigned) floor(dev->curr_y * dev->dpi + 0.5)) -typedef struct { +typedef struct psurface_t { int8_t dirty; /* has the page been printed on? */ char pad; @@ -192,7 +192,7 @@ typedef struct { uint8_t *pixels; /* grayscale pixel data */ } psurface_t; -typedef struct { +typedef struct escp_t { const char *name; void *lpt; @@ -204,12 +204,12 @@ typedef struct { uint8_t color; /* page data (TODO: make configurable) */ - double page_width, /* all in inches */ - page_height, - left_margin, - top_margin, - right_margin, - bottom_margin; + double page_width; /* all in inches */ + double page_height; + double left_margin; + double top_margin; + double right_margin; + double bottom_margin; uint16_t dpi; double cpi; /* defined chars per inch */ double lpi; /* defined lines per inch */ @@ -255,7 +255,8 @@ typedef struct { char fontpath[1024]; char pagepath[1024]; psurface_t *page; - double curr_x, curr_y; /* print head position (inch) */ + double curr_x; /* print head position (x, inch) */ + double curr_y; /* print head position (y, inch) */ uint16_t current_font; FT_Face fontface; int8_t lq_typeface; diff --git a/src/printer/prt_ps.c b/src/printer/prt_ps.c index 6c72e48de..9786b9063 100644 --- a/src/printer/prt_ps.c +++ b/src/printer/prt_ps.c @@ -236,9 +236,9 @@ timeout_timer(void *priv) } static void -ps_write_data(uint8_t val, void *p) +ps_write_data(uint8_t val, void *priv) { - ps_t *dev = (ps_t *) p; + ps_t *dev = (ps_t *) priv; if (dev == NULL) return; @@ -285,9 +285,9 @@ process_data(ps_t *dev) } static void -ps_write_ctrl(uint8_t val, void *p) +ps_write_ctrl(uint8_t val, void *priv) { - ps_t *dev = (ps_t *) p; + ps_t *dev = (ps_t *) priv; if (dev == NULL) return; @@ -317,9 +317,9 @@ ps_write_ctrl(uint8_t val, void *p) } static uint8_t -ps_read_status(void *p) +ps_read_status(void *priv) { - ps_t *dev = (ps_t *) p; + ps_t *dev = (ps_t *) priv; uint8_t ret = 0x9f; if (!dev->ack) @@ -368,9 +368,9 @@ ps_init(void *lpt) } static void -ps_close(void *p) +ps_close(void *priv) { - ps_t *dev = (ps_t *) p; + ps_t *dev = (ps_t *) priv; if (dev == NULL) return; diff --git a/src/printer/prt_text.c b/src/printer/prt_text.c index 54e5fe6d5..6fe0f531a 100644 --- a/src/printer/prt_text.c +++ b/src/printer/prt_text.c @@ -81,7 +81,7 @@ #define PAGE_CPI 10.0 /* standard 10 cpi */ #define PAGE_LPI 6.0 /* standard 6 lpi */ -typedef struct { +typedef struct psurface_t { int8_t dirty; /* has the page been printed on? */ char pad; @@ -91,7 +91,7 @@ typedef struct { char *chars; /* character data */ } psurface_t; -typedef struct { +typedef struct prnt_t { const char *name; void *lpt; @@ -104,23 +104,23 @@ typedef struct { pc_timer_t timeout_timer; /* page data (TODO: make configurable) */ - double page_width, /* all in inches */ - page_height, - left_margin, - top_margin, - right_margin, - bot_margin; + double page_width; /* all in inches */ + double page_height; + double left_margin; + double top_margin; + double right_margin; + double bot_margin; /* internal page data */ psurface_t *page; - uint8_t max_chars, - max_lines; - uint8_t curr_x, /* print head position (chars) */ - curr_y; + uint8_t max_chars; + uint8_t max_lines; + uint8_t curr_x; /* print head position (x, chars) */ + uint8_t curr_y; /* print head position (y, chars) */ /* font data */ - double cpi, /* defined chars per inch */ - lpi; /* defined lines per inch */ + double cpi; /* defined chars per inch */ + double lpi; /* defined lines per inch */ /* handshake data */ uint8_t data; diff --git a/src/qt/qt_mainwindow.cpp b/src/qt/qt_mainwindow.cpp index e7ced9c67..7d37c0c84 100644 --- a/src/qt/qt_mainwindow.cpp +++ b/src/qt/qt_mainwindow.cpp @@ -942,11 +942,13 @@ MainWindow::processKeyboardInput(bool down, uint32_t keycode) } break; + case 0x80 ... 0xff: /* regular break codes */ case 0x10b: /* Microsoft scroll up normal */ - case 0x18b: /* Microsoft scroll down normal */ - /* This abuses make/break codes. Send them manually, only on press. */ + case 0x180 ... 0x1ff: /* E0 break codes (including Microsoft scroll down normal) */ + /* This key uses a break code as make. Send it manually, only on press. */ if (down) { - keyboard_send(0xe0); + if (keycode & 0x100) + keyboard_send(0xe0); keyboard_send(keycode & 0xff); } return; @@ -1282,12 +1284,12 @@ MainWindow::keyReleaseEvent(QKeyEvent *event) } } - if (fs_off_signal && (video_fullscreen > 0) && keyboard_isfsexit_down()) { + if (fs_off_signal && (video_fullscreen > 0) && keyboard_isfsexit()) { ui->actionFullscreen->trigger(); fs_off_signal = false; } - if (fs_on_signal && (video_fullscreen == 0) && keyboard_isfsenter_down()) { + if (fs_on_signal && (video_fullscreen == 0) && keyboard_isfsenter()) { ui->actionFullscreen->trigger(); fs_on_signal = false; } diff --git a/src/qt/qt_platform.cpp b/src/qt/qt_platform.cpp index 749be8b43..9f4c5ca6e 100644 --- a/src/qt/qt_platform.cpp +++ b/src/qt/qt_platform.cpp @@ -316,7 +316,7 @@ plat_tempfile(char *bufp, char *prefix, char *suffix) name.append(QString("%1-").arg(prefix)); } - name.append(QDateTime::currentDateTime().toString("yyyyMMdd-hhmmss-zzzz")); + name.append(QDateTime::currentDateTime().toString("yyyyMMdd-hhmmss-zzz")); if (suffix) name.append(suffix); strcpy(bufp, name.toUtf8().data()); diff --git a/src/qt/qt_settingsmachine.cpp b/src/qt/qt_settingsmachine.cpp index fead5d559..569d1f6c3 100644 --- a/src/qt/qt_settingsmachine.cpp +++ b/src/qt/qt_settingsmachine.cpp @@ -90,6 +90,11 @@ SettingsMachine::SettingsMachine(QWidget *parent) ui->comboBoxMachineType->setCurrentIndex(-1); ui->comboBoxMachineType->setCurrentIndex(selectedMachineType); + +#ifndef USE_DYNAREC + ui->checkBoxDynamicRecompiler->setEnabled(false); + ui->checkBoxDynamicRecompiler->setVisible(false); +#endif } SettingsMachine::~SettingsMachine() @@ -105,11 +110,7 @@ SettingsMachine::save() cpu = ui->comboBoxSpeed->currentData().toInt(); fpu_type = ui->comboBoxFPU->currentData().toInt(); cpu_use_dynarec = ui->checkBoxDynamicRecompiler->isChecked() ? 1 : 0; - fpu_softfloat = (ui->checkBoxFPUSoftfloat->isChecked() && !cpu_use_dynarec) ? 1 : 0; - if (!strcmp(machines[machine].internal_name, "ibmps2_m70_type4")) { - cpu_use_dynarec = 0; - fpu_softfloat = 1; - } + fpu_softfloat = ui->checkBoxFPUSoftfloat->isChecked() ? 1 : 0; int64_t temp_mem_size; if (machine_get_ram_granularity(machine) < 1024) { @@ -276,25 +277,17 @@ SettingsMachine::on_comboBoxSpeed_currentIndexChanged(int index) if (!(flags & CPU_SUPPORTS_DYNAREC)) { ui->checkBoxDynamicRecompiler->setChecked(false); ui->checkBoxDynamicRecompiler->setEnabled(false); - ui->checkBoxFPUSoftfloat->setChecked(fpu_softfloat); - ui->checkBoxFPUSoftfloat->setEnabled(cpu_use_dynarec ? false : true); } else if (flags & CPU_REQUIRES_DYNAREC) { ui->checkBoxDynamicRecompiler->setChecked(true); ui->checkBoxDynamicRecompiler->setEnabled(false); - ui->checkBoxFPUSoftfloat->setChecked(false); - ui->checkBoxFPUSoftfloat->setEnabled(false); } else { ui->checkBoxDynamicRecompiler->setChecked(cpu_use_dynarec); ui->checkBoxDynamicRecompiler->setEnabled(true); - ui->checkBoxFPUSoftfloat->setChecked(fpu_softfloat); - ui->checkBoxFPUSoftfloat->setEnabled(cpu_use_dynarec ? false : true); } -#else - ui->checkBoxFPUSoftfloat->setChecked(fpu_softfloat); - ui->checkBoxFPUSoftfloat->setEnabled(true); #endif // win_settings_machine_recalc_fpu + int machineId = ui->comboBoxMachine->currentData().toInt(); auto *modelFpu = ui->comboBoxFPU->model(); int removeRows = modelFpu->rowCount(); @@ -312,6 +305,10 @@ SettingsMachine::on_comboBoxSpeed_currentIndexChanged(int index) ui->comboBoxFPU->setEnabled(modelFpu->rowCount() > 1); ui->comboBoxFPU->setCurrentIndex(-1); ui->comboBoxFPU->setCurrentIndex(selectedFpuRow); + + ui->checkBoxFPUSoftfloat->setChecked(machine_has_flags(machineId, MACHINE_SOFTFLOAT_ONLY) ? true : fpu_softfloat); + ui->checkBoxFPUSoftfloat->setEnabled(machine_has_flags(machineId, MACHINE_SOFTFLOAT_ONLY) ? false : true); + } void diff --git a/src/qt/qt_settingsotherperipherals.cpp b/src/qt/qt_settingsotherperipherals.cpp index e0edd7358..d168138a5 100644 --- a/src/qt/qt_settingsotherperipherals.cpp +++ b/src/qt/qt_settingsotherperipherals.cpp @@ -41,11 +41,12 @@ SettingsOtherPeripherals::onCurrentMachineChanged(int machineId) { this->machineId = machineId; - ui->checkBoxISABugger->setChecked(bugger_enabled > 0 ? true : false); + bool machineHasIsa = (machine_has_bus(machineId, MACHINE_BUS_ISA) > 0); + ui->checkBoxISABugger->setChecked((machineHasIsa && (bugger_enabled > 0)) ? true : false); ui->checkBoxPOSTCard->setChecked(postcard_enabled > 0 ? true : false); - ui->checkBoxISABugger->setEnabled(machine_has_bus(machineId, MACHINE_BUS_ISA)); - ui->comboBoxRTC->setEnabled(machine_has_bus(machineId, MACHINE_BUS_ISA)); - ui->pushButtonConfigureRTC->setEnabled(machine_has_bus(machineId, MACHINE_BUS_ISA)); + ui->checkBoxISABugger->setEnabled(machineHasIsa); + ui->comboBoxRTC->setEnabled(machineHasIsa); + ui->pushButtonConfigureRTC->setEnabled(machineHasIsa); ui->comboBoxCard1->clear(); ui->comboBoxCard2->clear(); @@ -97,8 +98,8 @@ SettingsOtherPeripherals::onCurrentMachineChanged(int machineId) } cbox->setCurrentIndex(-1); cbox->setCurrentIndex(selectedRow); - cbox->setEnabled(machine_has_bus(machineId, MACHINE_BUS_ISA)); - findChild(QString("pushButtonConfigureCard%1").arg(c + 1))->setEnabled(isamem_type[c] != 0 && machine_has_bus(machineId, MACHINE_BUS_ISA)); + cbox->setEnabled(machineHasIsa); + findChild(QString("pushButtonConfigureCard%1").arg(c + 1))->setEnabled(isamem_type[c] != 0 && machineHasIsa); } } diff --git a/src/qt/qt_settingsstoragecontrollers.cpp b/src/qt/qt_settingsstoragecontrollers.cpp index a732e9820..30949de3a 100644 --- a/src/qt/qt_settingsstoragecontrollers.cpp +++ b/src/qt/qt_settingsstoragecontrollers.cpp @@ -40,8 +40,6 @@ SettingsStorageControllers::SettingsStorageControllers(QWidget *parent) { ui->setupUi(this); - ui->checkBoxCassette->setChecked(cassette_enable > 0); - onCurrentMachineChanged(machine); } @@ -58,12 +56,12 @@ SettingsStorageControllers::save() auto *cbox = findChild(QString("comboBoxSCSI%1").arg(i + 1)); scsi_card_current[i] = cbox->currentData().toInt(); } - hdc_current = ui->comboBoxHD->currentData().toInt(); - fdc_type = ui->comboBoxFD->currentData().toInt(); - cdrom_interface_current = ui->comboBoxCDInterface->currentData().toInt(); - ide_ter_enabled = ui->checkBoxTertiaryIDE->isChecked() ? 1 : 0; - ide_qua_enabled = ui->checkBoxQuaternaryIDE->isChecked() ? 1 : 0; - cassette_enable = ui->checkBoxCassette->isChecked() ? 1 : 0; + hdc_current = ui->comboBoxHD->currentData().toInt(); + fdc_type = ui->comboBoxFD->currentData().toInt(); + cdrom_interface_current = ui->comboBoxCDInterface->currentData().toInt(); + ide_ter_enabled = ui->checkBoxTertiaryIDE->isChecked() ? 1 : 0; + ide_qua_enabled = ui->checkBoxQuaternaryIDE->isChecked() ? 1 : 0; + cassette_enable = ui->checkBoxCassette->isChecked() ? 1 : 0; } void @@ -134,9 +132,9 @@ SettingsStorageControllers::onCurrentMachineChanged(int machineId) ui->comboBoxFD->setCurrentIndex(selectedRow); /*CD interface controller config*/ - model = ui->comboBoxCDInterface->model(); - removeRows = model->rowCount(); - c = 0; + model = ui->comboBoxCDInterface->model(); + removeRows = model->rowCount(); + c = 0; selectedRow = 0; while (true) { /* Skip "internal" if machine doesn't have it. */ @@ -198,6 +196,14 @@ SettingsStorageControllers::onCurrentMachineChanged(int machineId) ui->checkBoxQuaternaryIDE->setEnabled(is_at > 0); ui->checkBoxTertiaryIDE->setChecked(ui->checkBoxTertiaryIDE->isEnabled() && ide_ter_enabled); ui->checkBoxQuaternaryIDE->setChecked(ui->checkBoxQuaternaryIDE->isEnabled() && ide_qua_enabled); + + if (machine_has_bus(machineId, MACHINE_BUS_CASSETTE)) { + ui->checkBoxCassette->setChecked(cassette_enable > 0); + ui->checkBoxCassette->setEnabled(true); + } else { + ui->checkBoxCassette->setChecked(false); + ui->checkBoxCassette->setEnabled(false); + } } void diff --git a/src/qt/xkbcommon_keyboard.cpp b/src/qt/xkbcommon_keyboard.cpp index e2e51e7cf..969552229 100644 --- a/src/qt/xkbcommon_keyboard.cpp +++ b/src/qt/xkbcommon_keyboard.cpp @@ -58,6 +58,7 @@ static std::unordered_map xkb_keycodes = { {"LNFD", 0x1c}, /* linefeed => Enter */ {"LCTL", 0x1d}, + {"CTRL", 0x1d}, {"AC01", 0x1e}, {"AC02", 0x1f}, {"AC03", 0x20}, @@ -71,8 +72,10 @@ static std::unordered_map xkb_keycodes = { {"AC11", 0x28}, {"TLDE", 0x29}, + {"AE00", 0x29}, /* alias of TLDE on keycodes/xfree86 (i.e. X11 forwarding) */ {"LFSH", 0x2a}, {"BKSL", 0x2b}, + {"AC12", 0x2b}, {"AB01", 0x2c}, {"AB02", 0x2d}, {"AB03", 0x2e}, @@ -87,6 +90,7 @@ static std::unordered_map xkb_keycodes = { {"KPMU", 0x37}, {"LALT", 0x38}, + {"ALT", 0x38}, {"SPCE", 0x39}, {"CAPS", 0x3a}, {"FK01", 0x3b}, @@ -168,7 +172,9 @@ static std::unordered_map xkb_keycodes = { {"DELE", 0x153}, {"LWIN", 0x15b}, + {"WIN", 0x15b}, {"LMTA", 0x15b}, + {"META", 0x15b}, {"RWIN", 0x15c}, {"RMTA", 0x15c}, {"MENU", 0x15d}, diff --git a/src/scsi/scsi_aha154x.c b/src/scsi/scsi_aha154x.c index 3cfe72760..de2d014c3 100644 --- a/src/scsi/scsi_aha154x.c +++ b/src/scsi/scsi_aha154x.c @@ -72,12 +72,12 @@ static uint8_t *aha1542cp_pnp_rom = NULL; #pragma pack(push, 1) typedef struct { - uint8_t CustomerSignature[20]; - uint8_t uAutoRetry; - uint8_t uBoardSwitches; - uint8_t uChecksum; - uint8_t uUnknown; - addr24 BIOSMailboxAddress; + uint8_t CustomerSignature[20]; + uint8_t uAutoRetry; + uint8_t uBoardSwitches; + uint8_t uChecksum; + uint8_t uUnknown; + addr24_t BIOSMailboxAddress; } aha_setup_t; #pragma pack(pop) diff --git a/src/scsi/scsi_x54x.c b/src/scsi/scsi_x54x.c index dd71b1a05..b379f322c 100644 --- a/src/scsi/scsi_x54x.c +++ b/src/scsi/scsi_x54x.c @@ -606,13 +606,13 @@ x54x_mbi(x54x_t *dev) { Req_t *req = &dev->Req; // uint32_t CCBPointer = req->CCBPointer; - addr24 CCBPointer; - CCBU *CmdBlock = &(req->CmdBlock); - uint8_t HostStatus = req->HostStatus; - uint8_t TargetStatus = req->TargetStatus; - uint32_t MailboxCompletionCode = req->MailboxCompletionCode; - uint32_t Incoming; - uint8_t bytes[4] = { 0, 0, 0, 0 }; + addr24_t CCBPointer; + CCBU *CmdBlock = &(req->CmdBlock); + uint8_t HostStatus = req->HostStatus; + uint8_t TargetStatus = req->TargetStatus; + uint32_t MailboxCompletionCode = req->MailboxCompletionCode; + uint32_t Incoming; + uint8_t bytes[4] = { 0, 0, 0, 0 }; Incoming = dev->MailboxInAddr + (dev->MailboxInPosCur * ((dev->flags & X54X_MBX_24BIT) ? sizeof(Mailbox_t) : sizeof(Mailbox32_t))); @@ -734,7 +734,7 @@ static void x54x_set_residue(x54x_t *dev, Req_t *req, int32_t TransferLength) { uint32_t Residue = 0; - addr24 Residue24; + addr24_t Residue24; int32_t BufLen = scsi_devices[dev->bus][req->TargetID].buffer_length; uint8_t bytes[4] = { 0, 0, 0, 0 }; @@ -1459,7 +1459,7 @@ x54x_out(uint16_t port, uint8_t val, void *priv) int suppress = 0; uint32_t FIFOBuf; uint8_t reset; - addr24 Address; + addr24_t Address; uint8_t host_id = dev->HostID; uint8_t irq = 0; diff --git a/src/sio/sio_82091aa.c b/src/sio/sio_82091aa.c index 4011f7ecf..800bf1b1a 100644 --- a/src/sio/sio_82091aa.c +++ b/src/sio/sio_82091aa.c @@ -35,9 +35,10 @@ #include <86box/fdc.h> #include <86box/sio.h> -typedef struct { - uint8_t cur_reg, has_ide, - regs[81]; +typedef struct i82091aa_t { + uint8_t cur_reg; + uint8_t has_ide; + uint8_t regs[81]; uint16_t base_address; fdc_t *fdc; serial_t *uart[2]; @@ -71,6 +72,9 @@ lpt1_handler(i82091aa_t *dev) case 3: lpt_port = 0x000; break; + + default: + break; } if ((dev->regs[0x20] & 0x01) && lpt_port) @@ -112,6 +116,9 @@ serial_handler(i82091aa_t *dev, int uart) case 0x07: uart_port = COM3_ADDR; break; + + default: + break; } if (dev->regs[reg] & 0x01) @@ -193,6 +200,9 @@ i82091aa_write(uint16_t port, uint8_t val, void *priv) if (dev->has_ide && (valxor & 0x03)) ide_handler(dev); break; + + default: + break; } } diff --git a/src/sio/sio_acc3221.c b/src/sio/sio_acc3221.c index f5c671c3a..10250d602 100644 --- a/src/sio/sio_acc3221.c +++ b/src/sio/sio_acc3221.c @@ -31,6 +31,7 @@ #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/sio.h> +#include <86box/plat_unused.h> typedef struct acc3221_t { int reg_idx; @@ -344,9 +345,9 @@ acc3221_serial2_handler(acc3221_t *dev) } static void -acc3221_write(uint16_t addr, uint8_t val, void *p) +acc3221_write(uint16_t addr, uint8_t val, void *priv) { - acc3221_t *dev = (acc3221_t *) p; + acc3221_t *dev = (acc3221_t *) priv; uint8_t old; if (!(addr & 1)) @@ -405,14 +406,17 @@ acc3221_write(uint16_t addr, uint8_t val, void *p) ide_pri_enable(); } break; + + default: + break; } } } static uint8_t -acc3221_read(uint16_t addr, void *p) +acc3221_read(uint16_t addr, void *priv) { - acc3221_t *dev = (acc3221_t *) p; + acc3221_t *dev = (acc3221_t *) priv; if (!(addr & 1)) return dev->reg_idx; @@ -448,7 +452,7 @@ acc3221_close(void *priv) } static void * -acc3221_init(const device_t *info) +acc3221_init(UNUSED(const device_t *info)) { acc3221_t *dev = (acc3221_t *) malloc(sizeof(acc3221_t)); memset(dev, 0, sizeof(acc3221_t)); diff --git a/src/sio/sio_ali5123.c b/src/sio/sio_ali5123.c index 68d674b11..25fb1aa65 100644 --- a/src/sio/sio_ali5123.c +++ b/src/sio/sio_ali5123.c @@ -37,13 +37,14 @@ #define AB_RST 0x80 -typedef struct { - uint8_t chip_id, is_apm, - tries, - regs[48], - ld_regs[13][256]; - int locked, - cur_reg; +typedef struct ali5123_t { + uint8_t chip_id; + uint8_t is_apm; + uint8_t tries; + uint8_t regs[48]; + uint8_t ld_regs[13][256]; + int locked; + int cur_reg; fdc_t *fdc; serial_t *uart[3]; } ali5123_t; @@ -125,6 +126,9 @@ ali5123_serial_handler(ali5123_t *dev, int uart) case 0x05: serial_set_clock_src(dev->uart[uart], 2000000.0); break; + + default: + break; } } @@ -256,6 +260,10 @@ ali5123_write(uint16_t port, uint8_t val, void *priv) case 0x07: if (dev->cur_reg == 0xf0) val &= 0xbf; + break; + + default: + break; } dev->ld_regs[cur_ld][dev->cur_reg] = val; } @@ -288,6 +296,9 @@ ali5123_write(uint16_t port, uint8_t val, void *priv) ali5123_serial_handler(dev, 2); } break; + + default: + break; } return; @@ -332,6 +343,9 @@ ali5123_write(uint16_t port, uint8_t val, void *priv) if (valxor & 0x08) fdc_update_drvrate(dev->fdc, 3, (val & 0x08) >> 3); break; + + default: + break; } break; case 3: @@ -346,6 +360,9 @@ ali5123_write(uint16_t port, uint8_t val, void *priv) if (valxor) ali5123_lpt_handler(dev); break; + + default: + break; } break; case 4: @@ -361,6 +378,9 @@ ali5123_write(uint16_t port, uint8_t val, void *priv) if (valxor) ali5123_serial_handler(dev, 0); break; + + default: + break; } break; case 5: @@ -376,6 +396,9 @@ ali5123_write(uint16_t port, uint8_t val, void *priv) if (valxor) ali5123_serial_handler(dev, (dev->regs[0x2d] & 0x20) ? 2 : 1); break; + + default: + break; } break; case 0x0b: @@ -391,8 +414,14 @@ ali5123_write(uint16_t port, uint8_t val, void *priv) if (valxor) ali5123_serial_handler(dev, (dev->regs[0x2d] & 0x20) ? 1 : 2); break; + + default: + break; } break; + + default: + break; } } diff --git a/src/sio/sio_detect.c b/src/sio/sio_detect.c index 36c12cd54..01c41224a 100644 --- a/src/sio/sio_detect.c +++ b/src/sio/sio_detect.c @@ -26,8 +26,9 @@ #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/sio.h> +#include <86box/plat_unused.h> -typedef struct { +typedef struct sio_detect_t { uint8_t regs[2]; } sio_detect_t; @@ -62,7 +63,7 @@ sio_detect_close(void *priv) } static void * -sio_detect_init(const device_t *info) +sio_detect_init(UNUSED(const device_t *info)) { sio_detect_t *dev = (sio_detect_t *) malloc(sizeof(sio_detect_t)); memset(dev, 0, sizeof(sio_detect_t)); diff --git a/src/sio/sio_f82c710.c b/src/sio/sio_f82c710.c index ad347fb03..fc0eb2aae 100644 --- a/src/sio/sio_f82c710.c +++ b/src/sio/sio_f82c710.c @@ -151,6 +151,9 @@ f82c606_update_ports(upc_t *dev, int set) case 0xc0: uart2_int = COM2_IRQ; break; + + default: + break; } switch (dev->regs[8] & 0x30) { @@ -163,6 +166,9 @@ f82c606_update_ports(upc_t *dev, int set) case 0x30: uart2_int = COM1_IRQ; break; + + default: + break; } switch (dev->regs[8] & 0x0c) { @@ -175,6 +181,9 @@ f82c606_update_ports(upc_t *dev, int set) case 0x0c: lpt1_int = LPT2_IRQ; break; + + default: + break; } switch (dev->regs[8] & 0x03) { @@ -187,6 +196,9 @@ f82c606_update_ports(upc_t *dev, int set) case 0x03: lpt1_int = LPT1_IRQ; break; + + default: + break; } if (dev->regs[0] & 1) { diff --git a/src/sio/sio_fdc37c669.c b/src/sio/sio_fdc37c669.c index 219213d69..3a1bcf5af 100644 --- a/src/sio/sio_fdc37c669.c +++ b/src/sio/sio_fdc37c669.c @@ -32,11 +32,13 @@ #include <86box/fdc.h> #include <86box/sio.h> -typedef struct { - uint8_t id, tries, - regs[42]; - int locked, rw_locked, - cur_reg; +typedef struct fdc37c669_t { + uint8_t id; + uint8_t tries; + uint8_t regs[42]; + int locked; + int rw_locked; + int cur_reg; fdc_t *fdc; serial_t *uart[2]; } fdc37c669_t; @@ -62,6 +64,9 @@ make_port(fdc37c669_t *dev, uint8_t reg) case 0x25: mask = 0xfe; break; + + default: + break; } p = ((uint16_t) (dev->regs[reg] & mask)) << 2; @@ -217,6 +222,9 @@ fdc37c669_write(uint16_t port, uint8_t val, void *priv) serial_setup(dev->uart[0], make_port(dev, 0x24), (dev->regs[0x28] & 0xf0) >> 4); } break; + + default: + break; } } diff --git a/src/sio/sio_fdc37c67x.c b/src/sio/sio_fdc37c67x.c index 35c7ccc5b..3cfa5a38d 100644 --- a/src/sio/sio_fdc37c67x.c +++ b/src/sio/sio_fdc37c67x.c @@ -33,19 +33,23 @@ #include <86box/fdc.h> #include "cpu.h" #include <86box/sio.h> +#include <86box/plat_unused.h> #define AB_RST 0x80 -typedef struct { - uint8_t chip_id, is_apm, - tries, - gpio_regs[2], auxio_reg, - regs[48], - ld_regs[11][256]; - uint16_t gpio_base, /* Set to EA */ - auxio_base, sio_base; - int locked, - cur_reg; +typedef struct fdc37c67x_t { + uint8_t chip_id; + uint8_t is_apm; + uint8_t tries; + uint8_t gpio_regs[2]; + uint8_t auxio_reg; + uint8_t regs[48]; + uint8_t ld_regs[11][256]; + uint16_t gpio_base; /* Set to EA */ + uint16_t auxio_base; + uint16_t sio_base; + int locked; + int cur_reg; fdc_t *fdc; serial_t *uart[2]; } fdc37c67x_t; @@ -65,7 +69,7 @@ make_port(fdc37c67x_t *dev, uint8_t ld) } static uint8_t -fdc37c67x_auxio_read(uint16_t port, void *priv) +fdc37c67x_auxio_read(UNUSED(uint16_t port), void *priv) { fdc37c67x_t *dev = (fdc37c67x_t *) priv; @@ -73,7 +77,7 @@ fdc37c67x_auxio_read(uint16_t port, void *priv) } static void -fdc37c67x_auxio_write(uint16_t port, uint8_t val, void *priv) +fdc37c67x_auxio_write(UNUSED(uint16_t port), uint8_t val, void *priv) { fdc37c67x_t *dev = (fdc37c67x_t *) priv; @@ -168,7 +172,7 @@ fdc37c67x_auxio_handler(fdc37c67x_t *dev) } static void -fdc37c67x_sio_handler(fdc37c67x_t *dev) +fdc37c67x_sio_handler(UNUSED(fdc37c67x_t *dev)) { #if 0 if (dev->sio_base) { @@ -207,6 +211,9 @@ fdc37c67x_gpio_handler(fdc37c67x_t *dev) case 3: ld_port = 0xea; /* Default */ break; + + default: + break; } dev->gpio_base = ld_port; if (ld_port > 0x0000) @@ -279,6 +286,9 @@ fdc37c67x_write(uint16_t port, uint8_t val, void *priv) case 0x02: case 0x07: return; + + default: + break; } dev->ld_regs[dev->regs[7]][dev->cur_reg] = val | keep; } @@ -306,6 +316,9 @@ fdc37c67x_write(uint16_t port, uint8_t val, void *priv) case 0x26: case 0x27: fdc37c67x_sio_handler(dev); + + default: + break; } return; @@ -359,6 +372,9 @@ fdc37c67x_write(uint16_t port, uint8_t val, void *priv) if (valxor & 0x18) fdc_update_drvrate(dev->fdc, 3, (val & 0x18) >> 3); break; + + default: + break; } break; case 3: @@ -375,6 +391,9 @@ fdc37c67x_write(uint16_t port, uint8_t val, void *priv) if (dev->cur_reg == 0x70) fdc37c67x_smi_handler(dev); break; + + default: + break; } break; case 4: @@ -391,6 +410,9 @@ fdc37c67x_write(uint16_t port, uint8_t val, void *priv) if (dev->cur_reg == 0x70) fdc37c67x_smi_handler(dev); break; + + default: + break; } break; case 5: @@ -407,6 +429,9 @@ fdc37c67x_write(uint16_t port, uint8_t val, void *priv) if (dev->cur_reg == 0x70) fdc37c67x_smi_handler(dev); break; + + default: + break; } break; case 8: @@ -423,8 +448,14 @@ fdc37c67x_write(uint16_t port, uint8_t val, void *priv) case 0xb5: fdc37c67x_smi_handler(dev); break; + + default: + break; } break; + + default: + break; } } @@ -570,7 +601,9 @@ fdc37c67x_init(const device_t *info) dev->chip_id = info->local & 0xff; dev->gpio_regs[0] = 0xff; - // dev->gpio_regs[1] = (info->local == 0x0030) ? 0xff : 0xfd; +#if 0 + dev->gpio_regs[1] = (info->local == 0x0030) ? 0xff : 0xfd; +#endif dev->gpio_regs[1] = (dev->chip_id == 0x30) ? 0xff : 0xfd; fdc37c67x_reset(dev); diff --git a/src/sio/sio_fdc37c6xx.c b/src/sio/sio_fdc37c6xx.c index 8400ca1e0..10eccf97c 100644 --- a/src/sio/sio_fdc37c6xx.c +++ b/src/sio/sio_fdc37c6xx.c @@ -35,12 +35,15 @@ #include <86box/fdc.h> #include <86box/sio.h> -typedef struct { - uint8_t max_reg, chip_id, - tries, has_ide, - regs[16]; - int cur_reg, - com3_addr, com4_addr; +typedef struct fdc37c6xx_t { + uint8_t max_reg; + uint8_t chip_id; + uint8_t tries; + uint8_t has_ide; + uint8_t regs[16]; + int cur_reg; + int com3_addr; + int com4_addr; fdc_t *fdc; serial_t *uart[2]; } fdc37c6xx_t; @@ -65,6 +68,9 @@ set_com34_addr(fdc37c6xx_t *dev) dev->com3_addr = 0x220; dev->com4_addr = 0x228; break; + + default: + break; } } @@ -92,6 +98,9 @@ set_serial_addr(fdc37c6xx_t *dev, int port) case 3: serial_setup(dev->uart[port], dev->com4_addr, COM4_IRQ); break; + + default: + break; } } @@ -115,6 +124,9 @@ lpt1_handler(fdc37c6xx_t *dev) lpt1_init(LPT2_ADDR); lpt1_irq(7 /*5*/); break; + + default: + break; } } @@ -206,6 +218,9 @@ fdc37c6xx_write(uint16_t port, uint8_t val, void *priv) if (valxor & 0x20) fdc_set_swap(dev->fdc, (dev->regs[5] & 0x20) >> 5); break; + + default: + break; } } } else if ((port == FDC_PRIMARY_ADDR) && (val == 0x55)) diff --git a/src/sio/sio_fdc37c93x.c b/src/sio/sio_fdc37c93x.c index 80f451e06..0330297fb 100644 --- a/src/sio/sio_fdc37c93x.c +++ b/src/sio/sio_fdc37c93x.c @@ -35,10 +35,11 @@ #include <86box/apm.h> #include <86box/acpi.h> #include <86box/sio.h> +#include <86box/plat_unused.h> #define AB_RST 0x80 -typedef struct { +typedef struct access_bus_t { uint8_t control; uint8_t status; uint8_t own_addr; @@ -47,16 +48,19 @@ typedef struct { uint16_t base; } access_bus_t; -typedef struct { - uint8_t chip_id, is_apm, - tries, - gpio_regs[2], auxio_reg, - regs[48], - ld_regs[11][256]; - uint16_t gpio_base, /* Set to EA */ - auxio_base, nvr_sec_base; - int locked, - cur_reg; +typedef struct fdc37c93x_t { + uint8_t chip_id; + uint8_t is_apm; + uint8_t tries; + uint8_t gpio_regs[2]; + uint8_t auxio_reg; + uint8_t regs[48]; + uint8_t ld_regs[11][256]; + uint16_t gpio_base; /* Set to EA */ + uint16_t auxio_base; + uint16_t nvr_sec_base; + int locked; + int cur_reg; fdc_t *fdc; serial_t *uart[2]; access_bus_t *access_bus; @@ -87,7 +91,7 @@ make_port_sec(fdc37c93x_t *dev, uint8_t ld) } static uint8_t -fdc37c93x_auxio_read(uint16_t port, void *priv) +fdc37c93x_auxio_read(UNUSED(uint16_t port), void *priv) { fdc37c93x_t *dev = (fdc37c93x_t *) priv; @@ -95,7 +99,7 @@ fdc37c93x_auxio_read(uint16_t port, void *priv) } static void -fdc37c93x_auxio_write(uint16_t port, uint8_t val, void *priv) +fdc37c93x_auxio_write(UNUSED(uint16_t port), uint8_t val, void *priv) { fdc37c93x_t *dev = (fdc37c93x_t *) priv; @@ -239,6 +243,9 @@ fdc37c93x_gpio_handler(fdc37c93x_t *dev) case 3: ld_port = 0xea; /* Default */ break; + + default: + break; } dev->gpio_base = ld_port; if (ld_port > 0x0000) @@ -266,6 +273,9 @@ fdc37c93x_access_bus_read(uint16_t port, void *priv) case 3: ret = (dev->clock & 0x87); break; + + default: + break; } return ret; @@ -290,6 +300,9 @@ fdc37c93x_access_bus_write(uint16_t port, uint8_t val, void *priv) dev->clock &= 0x80; dev->clock |= (val & 0x07); break; + + default: + break; } } @@ -410,6 +423,9 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv) if (!dev->is_apm) return; break; + + default: + break; } dev->ld_regs[dev->regs[7]][dev->cur_reg] = val | keep; } @@ -436,6 +452,9 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv) if ((valxor & 0x40) && (dev->chip_id != 0x02)) fdc37c93x_access_bus_handler(dev); break; + + default: + break; } return; @@ -489,6 +508,9 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv) if (valxor & 0x18) fdc_update_drvrate(dev->fdc, 3, (val & 0x18) >> 3); break; + + default: + break; } break; case 3: @@ -503,6 +525,9 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv) if (valxor) fdc37c93x_lpt_handler(dev); break; + + default: + break; } break; case 4: @@ -517,6 +542,9 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv) if (valxor) fdc37c93x_serial_handler(dev, 0); break; + + default: + break; } break; case 5: @@ -531,6 +559,9 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv) if (valxor) fdc37c93x_serial_handler(dev, 1); break; + + default: + break; } break; case 6: @@ -554,8 +585,8 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv) nvr_lock_set(0xe0, 0x20, !!(dev->ld_regs[6][dev->cur_reg] & 0x08), dev->nvr); if (dev->ld_regs[6][dev->cur_reg] & 0x80) switch ((dev->ld_regs[6][dev->cur_reg] >> 4) & 0x07) { - case 0x00: default: + case 0x00: nvr_bank_set(0, 0xff, dev->nvr); nvr_bank_set(1, 1, dev->nvr); break; @@ -588,6 +619,9 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv) } } break; + + default: + break; } break; case 8: @@ -600,6 +634,9 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv) if (valxor) fdc37c93x_auxio_handler(dev); break; + + default: + break; } break; case 9: @@ -614,6 +651,9 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv) if (valxor) fdc37c93x_access_bus_handler(dev); break; + + default: + break; } break; case 10: @@ -628,8 +668,14 @@ fdc37c93x_write(uint16_t port, uint8_t val, void *priv) if (valxor) fdc37c93x_acpi_handler(dev); break; + + default: + break; } break; + + default: + break; } } @@ -783,7 +829,7 @@ access_bus_close(void *priv) } static void * -access_bus_init(const device_t *info) +access_bus_init(UNUSED(const device_t *info)) { access_bus_t *dev = (access_bus_t *) malloc(sizeof(access_bus_t)); memset(dev, 0, sizeof(access_bus_t)); @@ -830,7 +876,9 @@ fdc37c93x_init(const device_t *info) is_compaq = (info->local >> 8) & 0x02; dev->gpio_regs[0] = 0xff; - // dev->gpio_regs[1] = (info->local == 0x0030) ? 0xff : 0xfd; +#if 0 + dev->gpio_regs[1] = (info->local == 0x0030) ? 0xff : 0xfd; +#endif dev->gpio_regs[1] = (dev->chip_id == 0x30) ? 0xff : 0xfd; if (dev->chip_id == 0x30) { diff --git a/src/sio/sio_fdc37m60x.c b/src/sio/sio_fdc37m60x.c index af238c51f..190e65453 100644 --- a/src/sio/sio_fdc37m60x.c +++ b/src/sio/sio_fdc37m60x.c @@ -68,9 +68,12 @@ fdc37m60x_log(const char *fmt, ...) # define fdc37m60x_log(fmt, ...) #endif -typedef struct -{ - uint8_t index, regs[256], device_regs[10][256], cfg_lock, ide_function; +typedef struct fdc37m60x_t { + uint8_t index; + uint8_t regs[256]; + uint8_t device_regs[10][256]; + uint8_t cfg_lock; + uint8_t ide_function; uint16_t sio_index_port; fdc_t *fdc; @@ -141,6 +144,9 @@ fdc37m60x_write(uint16_t addr, uint8_t val, void *priv) dev->device_regs[CURRENT_LOGICAL_DEVICE][INDEX] = (INDEX == 0x30) ? (val & 1) : val; fdc37m60x_logical_device_handler(dev); break; + + default: + break; } } } else { @@ -242,6 +248,9 @@ fdc37m60x_logical_device_handler(fdc37m60x_t *dev) case 0x05: fdc37m60x_uart_handler(1, dev); break; + + default: + break; } } diff --git a/src/sio/sio_it8661f.c b/src/sio/sio_it8661f.c index 9b3baa188..5e5ccb655 100644 --- a/src/sio/sio_it8661f.c +++ b/src/sio/sio_it8661f.c @@ -32,16 +32,19 @@ #include <86box/fdc.h> #include <86box/fdd_common.h> #include <86box/sio.h> +#include <86box/plat_unused.h> #define LDN dev->regs[7] -typedef struct -{ +typedef struct it8661f_t { fdc_t *fdc_controller; serial_t *uart[2]; - uint8_t index, regs[256], device_regs[6][256]; - int unlocked, enumerator; + uint8_t index; + uint8_t regs[256]; + uint8_t device_regs[6][256]; + int unlocked; + int enumerator; } it8661f_t; static uint8_t mb_pnp_key[32] = { 0x6a, 0xb5, 0xda, 0xed, 0xf6, 0xfb, 0x7d, 0xbe, 0xdf, 0x6f, 0x37, 0x1b, 0x0d, 0x86, 0xc3, 0x61, 0xb0, 0x58, 0x2c, 0x16, 0x8b, 0x45, 0xa2, 0xd1, 0xe8, 0x74, 0x3a, 0x9d, 0xce, 0xe7, 0x73, 0x39 }; @@ -99,6 +102,9 @@ it8661_fdc(uint16_t addr, uint8_t val, it8661f_t *dev) case 0xf0: dev->device_regs[0][addr] = val & 0x0f; break; + + default: + break; } fdc_set_base(dev->fdc_controller, (dev->device_regs[0][0x60] << 8) | (dev->device_regs[0][0x61])); @@ -140,6 +146,9 @@ it8661_serial(int uart, uint16_t addr, uint8_t val, it8661f_t *dev) case 0xf0: dev->device_regs[1 + uart][addr] = val & 3; break; + + default: + break; } serial_setup(dev->uart[uart], (dev->device_regs[1 + uart][0x60] << 8) | (dev->device_regs[1 + uart][0x61]), dev->device_regs[1 + uart][0x70] & 0x0f); @@ -177,6 +186,9 @@ it8661_lpt(uint16_t addr, uint8_t val, it8661f_t *dev) case 0xf0: dev->device_regs[3][addr] = val & 3; break; + + default: + break; } lpt1_init((dev->device_regs[3][0x60] << 8) | (dev->device_regs[3][0x61])); @@ -201,6 +213,9 @@ it8661_ldn(uint16_t addr, uint8_t val, it8661f_t *dev) case 3: it8661_lpt(addr, val, dev); break; + + default: + break; } } @@ -246,6 +261,9 @@ it8661f_write(uint16_t addr, uint8_t val, void *priv) } } break; + + default: + break; } return; @@ -300,7 +318,7 @@ it8661f_close(void *priv) } static void * -it8661f_init(const device_t *info) +it8661f_init(UNUSED(const device_t *info)) { it8661f_t *dev = (it8661f_t *) malloc(sizeof(it8661f_t)); memset(dev, 0, sizeof(it8661f_t)); diff --git a/src/sio/sio_pc87306.c b/src/sio/sio_pc87306.c index 088467eeb..656b36d92 100644 --- a/src/sio/sio_pc87306.c +++ b/src/sio/sio_pc87306.c @@ -34,10 +34,12 @@ #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/sio.h> +#include <86box/plat_unused.h> -typedef struct { - uint8_t tries, - regs[29], gpio[2]; +typedef struct pc87306_t { + uint8_t tries; + uint8_t regs[29]; + uint8_t gpio[2]; int cur_reg; fdc_t *fdc; serial_t *uart[2]; @@ -112,6 +114,9 @@ lpt1_handler(pc87306_t *dev) lpt_port = 0x000; lpt_irq = 0xff; break; + + default: + break; } if (dev->regs[0x1b] & 0x10) @@ -165,6 +170,9 @@ serial_handler(pc87306_t *dev, int uart) case 3: serial_setup(dev->uart[uart], 0x220, irq); break; + + default: + break; } break; case 3: @@ -181,8 +189,14 @@ serial_handler(pc87306_t *dev, int uart) case 3: serial_setup(dev->uart[uart], 0x228, irq); break; + + default: + break; } break; + + default: + break; } } @@ -324,6 +338,9 @@ pc87306_write(uint16_t port, uint8_t val, void *priv) serial_handler(dev, 1); } break; + + default: + break; } } @@ -392,7 +409,7 @@ pc87306_close(void *priv) } static void * -pc87306_init(const device_t *info) +pc87306_init(UNUSED(const device_t *info)) { pc87306_t *dev = (pc87306_t *) malloc(sizeof(pc87306_t)); memset(dev, 0, sizeof(pc87306_t)); diff --git a/src/sio/sio_pc87307.c b/src/sio/sio_pc87307.c index 78cfdcd99..e66467d62 100644 --- a/src/sio/sio_pc87307.c +++ b/src/sio/sio_pc87307.c @@ -35,13 +35,17 @@ #include <86box/fdc.h> #include <86box/sio.h> -typedef struct { - uint8_t id, pm_idx, - regs[48], ld_regs[256][208], - pcregs[16], gpio[2][4], - pm[8]; - uint16_t gpio_base, gpio_base2, - pm_base; +typedef struct pc87307_t { + uint8_t id; + uint8_t pm_idx; + uint8_t regs[48]; + uint8_t ld_regs[256][208]; + uint8_t pcregs[16]; + uint8_t gpio[2][4]; + uint8_t pm[8]; + uint16_t gpio_base; + uint16_t gpio_base2; + uint16_t pm_base; int cur_reg; fdc_t *fdc; serial_t *uart[2]; @@ -74,6 +78,9 @@ pc87307_gpio_read(uint16_t port, void *priv) mask = dev->gpio[bank][0x0001]; ret = (ret & mask) | (pins & ~mask); break; + + default: + break; } return ret; @@ -122,6 +129,9 @@ pc87307_pm_write(uint16_t port, uint8_t val, void *priv) serial_handler(dev, 1); serial_handler(dev, 0); break; + + default: + break; } } } @@ -307,6 +317,9 @@ pc87307_write(uint16_t port, uint8_t val, void *priv) case 0x08: pm_handler(dev); break; + + default: + break; } break; case 0x60: @@ -333,6 +346,9 @@ pc87307_write(uint16_t port, uint8_t val, void *priv) case 0x08: pm_handler(dev); break; + + default: + break; } break; case 0x61: @@ -364,6 +380,9 @@ pc87307_write(uint16_t port, uint8_t val, void *priv) dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xfe; pm_handler(dev); break; + + default: + break; } break; case 0x63: @@ -396,6 +415,9 @@ pc87307_write(uint16_t port, uint8_t val, void *priv) case 0x08: pm_handler(dev); break; + + default: + break; } break; case 0xf0: @@ -416,12 +438,18 @@ pc87307_write(uint16_t port, uint8_t val, void *priv) case 0x06: dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0x87; break; + + default: + break; } break; case 0xf1: if (dev->regs[0x07] == 0x03) dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0x0f; break; + + default: + break; } } @@ -519,8 +547,10 @@ pc87307_reset(pc87307_t *dev) dev->ld_regs[0x08][0x44] = 0x04; dev->ld_regs[0x08][0x45] = 0x04; - // dev->gpio[0] = 0xff; - // dev->gpio[1] = 0xfb; +#if 0 + dev->gpio[0] = 0xff; + dev->gpio[1] = 0xfb; +#endif dev->gpio[0][0] = 0xff; dev->gpio[0][1] = 0x00; dev->gpio[0][2] = 0x00; diff --git a/src/sio/sio_pc87309.c b/src/sio/sio_pc87309.c index dfa41f601..edd1fb0b8 100644 --- a/src/sio/sio_pc87309.c +++ b/src/sio/sio_pc87309.c @@ -35,10 +35,12 @@ #include <86box/fdc.h> #include <86box/sio.h> -typedef struct { - uint8_t id, pm_idx, - regs[48], ld_regs[256][208], - pm[8]; +typedef struct pc87309_t { + uint8_t id; + uint8_t pm_idx; + uint8_t regs[48]; + uint8_t ld_regs[256][208]; + uint8_t pm[8]; uint16_t pm_base; int cur_reg; fdc_t *fdc; @@ -64,6 +66,9 @@ pc87309_pm_write(uint16_t port, uint8_t val, void *priv) serial_handler(dev, 1); serial_handler(dev, 0); break; + + default: + break; } } else dev->pm_idx = val & 0x07; @@ -221,6 +226,9 @@ pc87309_write(uint16_t port, uint8_t val, void *priv) case 0x04: pm_handler(dev); break; + + default: + break; } break; case 0x60: @@ -244,6 +252,9 @@ pc87309_write(uint16_t port, uint8_t val, void *priv) case 0x04: pm_handler(dev); break; + + default: + break; } break; case 0x63: @@ -275,6 +286,9 @@ pc87309_write(uint16_t port, uint8_t val, void *priv) case 0x06: dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xf8; break; + + default: + break; } break; case 0x70: @@ -296,6 +310,9 @@ pc87309_write(uint16_t port, uint8_t val, void *priv) case 0x04: pm_handler(dev); break; + + default: + break; } break; case 0xf0: @@ -316,12 +333,18 @@ pc87309_write(uint16_t port, uint8_t val, void *priv) case 0x06: dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0xc1; break; + + default: + break; } break; case 0xf1: if (dev->regs[0x07] == 0x00) dev->ld_regs[dev->regs[0x07]][dev->cur_reg - 0x30] = val & 0x0f; break; + + default: + break; } } diff --git a/src/sio/sio_pc87310.c b/src/sio/sio_pc87310.c index eacbadf89..d567bd4d5 100644 --- a/src/sio/sio_pc87310.c +++ b/src/sio/sio_pc87310.c @@ -40,6 +40,7 @@ #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/sio.h> +#include <86box/plat_unused.h> #define HAS_IDE_FUNCTIONALITY dev->ide_function @@ -61,9 +62,10 @@ pc87310_log(const char *fmt, ...) # define pc87310_log(fmt, ...) #endif -typedef struct { - uint8_t tries, ide_function, - reg; +typedef struct pc87310_t { + uint8_t tries; + uint8_t ide_function; + uint8_t reg; fdc_t *fdc; serial_t *uart[2]; } pc87310_t; @@ -97,6 +99,9 @@ lpt1_handler(pc87310_t *dev) lpt_port = 0x000; lpt_irq = 0xff; break; + + default: + break; } if (lpt_port) @@ -127,7 +132,7 @@ serial_handler(pc87310_t *dev, int uart) } static void -pc87310_write(uint16_t port, uint8_t val, void *priv) +pc87310_write(UNUSED(uint16_t port), uint8_t val, void *priv) { pc87310_t *dev = (pc87310_t *) priv; uint8_t valxor; @@ -189,7 +194,7 @@ pc87310_write(uint16_t port, uint8_t val, void *priv) } uint8_t -pc87310_read(uint16_t port, void *priv) +pc87310_read(UNUSED(uint16_t port), void *priv) { pc87310_t *dev = (pc87310_t *) priv; uint8_t ret = 0xff; @@ -219,7 +224,9 @@ pc87310_reset(pc87310_t *dev) serial_handler(dev, 0); serial_handler(dev, 1); fdc_reset(dev->fdc); - // ide_pri_enable(); +#if 0 + ide_pri_enable(); +#endif } static void diff --git a/src/sio/sio_pc87311.c b/src/sio/sio_pc87311.c index c795da8a9..143712692 100644 --- a/src/sio/sio_pc87311.c +++ b/src/sio/sio_pc87311.c @@ -32,6 +32,7 @@ #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/sio.h> +#include <86box/plat_unused.h> #define HAS_IDE_FUNCTIONALITY dev->ide_function @@ -64,10 +65,13 @@ pc87311_log(const char *fmt, ...) # define pc87311_log(fmt, ...) #endif -typedef struct -{ - uint8_t index, regs[256], cfg_lock, ide_function; - uint16_t base, irq; +typedef struct pc87311_t { + uint8_t index; + uint8_t regs[256]; + uint8_t cfg_lock; + uint8_t ide_function; + uint16_t base; + uint16_t irq; fdc_t *fdc_controller; serial_t *uart[2]; @@ -102,15 +106,21 @@ pc87311_write(uint16_t addr, uint8_t val, void *priv) case 0x02: POWER_TEST = val; break; + + default: + break; } break; + + default: + break; } pc87311_enable(dev); } static uint8_t -pc87311_read(uint16_t addr, void *priv) +pc87311_read(UNUSED(uint16_t addr), void *priv) { pc87311_t *dev = (pc87311_t *) priv; @@ -181,6 +191,9 @@ pc87311_uart_handler(uint8_t num, pc87311_t *dev) dev->base = com4(dev); dev->irq = COM4_IRQ; break; + + default: + break; } serial_setup(dev->uart[num & 1], dev->base, dev->irq); pc87311_log("PC87311-UART%01x: BASE %04x IRQ %01x\n", num & 1, dev->base, dev->irq); @@ -203,6 +216,9 @@ pc87311_lpt_handler(pc87311_t *dev) dev->base = LPT2_ADDR; dev->irq = LPT2_IRQ; break; + + default: + break; } lpt1_init(dev->base); lpt1_irq(dev->irq); diff --git a/src/sio/sio_pc87332.c b/src/sio/sio_pc87332.c index 7f48b899b..5cbf9f694 100644 --- a/src/sio/sio_pc87332.c +++ b/src/sio/sio_pc87332.c @@ -35,9 +35,11 @@ #include <86box/fdc.h> #include <86box/sio.h> -typedef struct { - uint8_t tries, has_ide, - fdc_on, regs[15]; +typedef struct pc87332_t { + uint8_t tries; + uint8_t has_ide; + uint8_t fdc_on; + uint8_t regs[15]; int cur_reg; fdc_t *fdc; serial_t *uart[2]; @@ -69,6 +71,9 @@ lpt1_handler(pc87332_t *dev) lpt_port = 0x000; lpt_irq = 0xff; break; + + default: + break; } if (lpt_port) @@ -105,6 +110,9 @@ serial_handler(pc87332_t *dev, int uart) case 3: serial_setup(dev->uart[uart], 0x220, COM3_IRQ); break; + + default: + break; } break; case 3: @@ -121,8 +129,14 @@ serial_handler(pc87332_t *dev, int uart) case 3: serial_setup(dev->uart[uart], 0x228, COM4_IRQ); break; + + default: + break; } break; + + default: + break; } } @@ -238,6 +252,9 @@ pc87332_write(uint16_t port, uint8_t val, void *priv) lpt1_handler(dev); } break; + + default: + break; } } diff --git a/src/sio/sio_prime3b.c b/src/sio/sio_prime3b.c index a204fde5b..32be854c7 100644 --- a/src/sio/sio_prime3b.c +++ b/src/sio/sio_prime3b.c @@ -32,6 +32,7 @@ #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/sio.h> +#include <86box/plat_unused.h> #define FSR dev->regs[0xa0] #define ASR dev->regs[0xa1] @@ -56,10 +57,13 @@ prime3b_log(const char *fmt, ...) # define prime3b_log(fmt, ...) #endif -typedef struct -{ - uint8_t index, regs[256], cfg_lock, ide_function; - uint16_t com3_addr, com4_addr; +typedef struct prime3b_t { + uint8_t index; + uint8_t regs[256]; + uint8_t cfg_lock; + uint8_t ide_function; + uint16_t com3_addr; + uint16_t com4_addr; fdc_t *fdc_controller; serial_t *uart[2]; @@ -121,17 +125,23 @@ prime3b_write(uint16_t addr, uint8_t val, void *priv) dev->com3_addr = 0x220; dev->com4_addr = 0x228; break; + + default: + break; } break; case 0xa5: /* ECP Register */ dev->regs[0xa5] = val; break; + + default: + break; } } } static uint8_t -prime3b_read(uint16_t addr, void *priv) +prime3b_read(UNUSED(uint16_t addr), void *priv) { prime3b_t *dev = (prime3b_t *) priv; diff --git a/src/sio/sio_prime3c.c b/src/sio/sio_prime3c.c index eae3fe1b2..160f23aab 100644 --- a/src/sio/sio_prime3c.c +++ b/src/sio/sio_prime3c.c @@ -32,6 +32,7 @@ #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/sio.h> +#include <86box/plat_unused.h> #ifdef ENABLE_PRIME3C_LOG int prime3c_do_log = ENABLE_PRIME3C_LOG; @@ -75,9 +76,11 @@ prime3c_log(const char *fmt, ...) /* IDE functionality(Note on Init) */ #define HAS_IDE_FUNCTIONALITY dev->ide_function -typedef struct -{ - uint8_t index, regs[256], cfg_lock, ide_function; +typedef struct prime3c_t { + uint8_t index; + uint8_t regs[256]; + uint8_t cfg_lock; + uint8_t ide_function; fdc_t *fdc_controller; serial_t *uart[2]; @@ -189,14 +192,20 @@ prime3c_write(uint16_t addr, uint8_t val, void *priv) case 0xd8: dev->regs[dev->index] = val; break; + + default: + break; } } break; + + default: + break; } } static uint8_t -prime3c_read(uint16_t addr, void *priv) +prime3c_read(UNUSED(uint16_t addr), void *priv) { prime3c_t *dev = (prime3c_t *) priv; diff --git a/src/sio/sio_um8669f.c b/src/sio/sio_um8669f.c index bd153a9e4..256c614ae 100644 --- a/src/sio/sio_um8669f.c +++ b/src/sio/sio_um8669f.c @@ -37,6 +37,7 @@ #include <86box/gameport.h> #include <86box/sio.h> #include <86box/isapnp.h> +#include <86box/plat_unused.h> /* This ROM was reconstructed out of many assumptions, some of which based on the IT8671F. */ static uint8_t um8669f_pnp_rom[] = { @@ -112,7 +113,8 @@ um8669f_log(const char *fmt, ...) #endif typedef struct um8669f_t { - int locked, cur_reg_108; + int locked; + int cur_reg_108; void *pnp_card; isapnp_device_config_t *pnp_config[5]; @@ -184,6 +186,9 @@ um8669f_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *pri um8669f_log("UM8669F: Game port disabled\n"); gameport_remap(dev->gameport, 0); } + + default: + break; } } @@ -263,7 +268,7 @@ um8669f_close(void *priv) } static void * -um8669f_init(const device_t *info) +um8669f_init(UNUSED(const device_t *info)) { um8669f_log("UM8669F: init()\n"); diff --git a/src/sio/sio_vt82c686.c b/src/sio/sio_vt82c686.c index b03207041..f22af07df 100644 --- a/src/sio/sio_vt82c686.c +++ b/src/sio/sio_vt82c686.c @@ -31,10 +31,17 @@ #include <86box/fdd.h> #include <86box/fdc.h> #include <86box/sio.h> +#include <86box/plat_unused.h> -typedef struct { - uint8_t cur_reg, last_val, regs[25], - fdc_dma, fdc_irq, uart_irq[2], lpt_dma, lpt_irq; +typedef struct vt82c686_t { + uint8_t cur_reg; + uint8_t last_val; + uint8_t regs[25]; + uint8_t fdc_dma; + uint8_t fdc_irq; + uint8_t uart_irq[2]; + uint8_t lpt_dma; + uint8_t lpt_irq; fdc_t *fdc; serial_t *uart[2]; } vt82c686_t; @@ -189,6 +196,9 @@ vt82c686_write(uint16_t port, uint8_t val, void *priv) dev->regs[reg] &= 0xf7; vt82c686_fdc_handler(dev); break; + + default: + break; } } @@ -242,6 +252,9 @@ vt82c686_sio_write(uint8_t addr, uint8_t val, void *priv) if (val & 0x02) io_sethandler(FDC_PRIMARY_ADDR, 2, vt82c686_read, NULL, NULL, vt82c686_write, NULL, NULL, dev); break; + + default: + break; } } @@ -272,7 +285,7 @@ vt82c686_close(void *priv) } static void * -vt82c686_init(const device_t *info) +vt82c686_init(UNUSED(const device_t *info)) { vt82c686_t *dev = (vt82c686_t *) malloc(sizeof(vt82c686_t)); memset(dev, 0, sizeof(vt82c686_t)); diff --git a/src/sio/sio_w83787f.c b/src/sio/sio_w83787f.c index 280bab6e9..1870741c7 100644 --- a/src/sio/sio_w83787f.c +++ b/src/sio/sio_w83787f.c @@ -74,13 +74,16 @@ w83787_log(const char *fmt, ...) #define HAS_IDE_FUNCTIONALITY dev->ide_function -typedef struct { - uint8_t tries, regs[42]; +typedef struct w83787f_t { + uint8_t tries; + uint8_t regs[42]; uint16_t reg_init; - int locked, rw_locked, - cur_reg, - key, ide_function, - ide_start; + int locked; + int rw_locked; + int cur_reg; + int key; + int ide_function; + int ide_start; fdc_t *fdc; serial_t *uart[2]; void *gameport; @@ -342,6 +345,9 @@ w83787f_write(uint16_t port, uint8_t val, void *priv) if (valxor & 0x20) w83787f_remap(dev); break; + + default: + break; } } diff --git a/src/sio/sio_w83877f.c b/src/sio/sio_w83877f.c index 4f8b45118..8cbb82876 100644 --- a/src/sio/sio_w83877f.c +++ b/src/sio/sio_w83877f.c @@ -56,13 +56,16 @@ #define PRTIQS (dev->regs[0x27] & 0x0f) #define ECPIRQ ((dev->regs[0x27] >> 5) & 0x07) -typedef struct { - uint8_t tries, regs[42]; - uint16_t reg_init; - int locked, rw_locked, - cur_reg, - base_address, key, - key_times; +typedef struct w83877f_t { + uint8_t tries; + uint8_t regs[42]; + uint16_t reg_init; + int locked; + int rw_locked; + int cur_reg; + int base_address; + int key; + int key_times; fdc_t *fdc; serial_t *uart[2]; } w83877f_t; @@ -140,6 +143,9 @@ make_port(w83877f_t *dev, uint8_t reg) if ((p < 0x100) || (p > 0x3F8)) p = COM2_ADDR; break; + + default: + break; } return p; @@ -358,6 +364,9 @@ w83877f_write(uint16_t port, uint8_t val, void *priv) w83877f_serial_handler(dev, 0); } break; + + default: + break; } } diff --git a/src/sio/sio_w83977f.c b/src/sio/sio_w83977f.c index 30a4c8b52..063f0ca69 100644 --- a/src/sio/sio_w83977f.c +++ b/src/sio/sio_w83977f.c @@ -36,13 +36,17 @@ #define HEFRAS (dev->regs[0x26] & 0x40) -typedef struct { - uint8_t id, tries, - regs[48], - dev_regs[256][208]; - int locked, rw_locked, - cur_reg, base_address, - type, hefras; +typedef struct w83977f_t { + uint8_t id; + uint8_t tries; + uint8_t regs[48]; + uint8_t dev_regs[256][208]; + int locked; + int rw_locked; + int cur_reg; + int base_address; + int type; + int hefras; fdc_t *fdc; serial_t *uart[2]; } w83977f_t; @@ -145,6 +149,9 @@ w83977f_serial_handler(w83977f_t *dev, int uart) case 0x03: clock_src = 24000000.0 / 1.625; break; + + default: + break; } serial_set_clock_src(dev->uart[uart], clock_src); @@ -194,8 +201,10 @@ w83977f_write(uint16_t port, uint8_t val, void *priv) switch (dev->cur_reg) { case 0x02: - /* if (valxor & 0x02) - softresetx86(); */ +#if 0 + if (valxor & 0x02) + softresetx86(); +#endif break; case 0x22: if (valxor & 0x20) @@ -226,6 +235,9 @@ w83977f_write(uint16_t port, uint8_t val, void *priv) case 0x03: w83977f_serial_handler(dev, ld - 2); break; + + default: + break; } break; case 0x60: @@ -242,6 +254,9 @@ w83977f_write(uint16_t port, uint8_t val, void *priv) case 0x03: w83977f_serial_handler(dev, ld - 2); break; + + default: + break; } break; case 0x70: @@ -257,6 +272,9 @@ w83977f_write(uint16_t port, uint8_t val, void *priv) case 0x03: w83977f_serial_handler(dev, ld - 2); break; + + default: + break; } break; case 0xf0: @@ -281,6 +299,9 @@ w83977f_write(uint16_t port, uint8_t val, void *priv) if (valxor & 0x03) w83977f_serial_handler(dev, ld - 2); break; + + default: + break; } break; case 0xf1: @@ -298,6 +319,9 @@ w83977f_write(uint16_t port, uint8_t val, void *priv) if (!dev->id && (valxor & 0x01)) fdc_set_swwp(dev->fdc, (val & 0x01) ? 1 : 0); break; + + default: + break; } break; case 0xf2: @@ -315,6 +339,9 @@ w83977f_write(uint16_t port, uint8_t val, void *priv) if (!dev->id && (valxor & 0x03)) fdc_update_rwc(dev->fdc, 0, val & 0x03); break; + + default: + break; } break; case 0xf4: @@ -329,8 +356,14 @@ w83977f_write(uint16_t port, uint8_t val, void *priv) if (!dev->id && (valxor & 0x18)) fdc_update_drvrate(dev->fdc, dev->cur_reg & 0x03, (val & 0x18) >> 3); break; + + default: + break; } break; + + default: + break; } } diff --git a/src/sound/CMakeLists.txt b/src/sound/CMakeLists.txt index c530d7ac8..ec4f8823b 100644 --- a/src/sound/CMakeLists.txt +++ b/src/sound/CMakeLists.txt @@ -85,12 +85,13 @@ if(RTMIDI) endif() if(FLUIDSYNTH) - if(APPLE) - find_library(FLUIDSYNTH_LIB fluidsynth) - if (NOT FLUIDSYNTH_LIB) - message(WARNING "Could not find fluid synth. The library will not be bundled and any related features will not work.") - endif() - endif () + find_package(PkgConfig REQUIRED) + pkg_check_modules(FLUIDSYNTH REQUIRED IMPORTED_TARGET fluidsynth) + target_link_libraries(86Box PkgConfig::FLUIDSYNTH) + if(STATIC_BUILD) + target_link_libraries(86Box -static ${FLUIDSYNTH_STATIC_LIBRARIES} -fopenmp) + endif() + target_compile_definitions(snd PRIVATE USE_FLUIDSYNTH) target_sources(snd PRIVATE midi_fluidsynth.c) endif() diff --git a/src/sound/midi_fluidsynth.c b/src/sound/midi_fluidsynth.c index 2372203d7..4099e043f 100644 --- a/src/sound/midi_fluidsynth.c +++ b/src/sound/midi_fluidsynth.c @@ -8,6 +8,8 @@ # ifdef __unix__ # include # endif +# define FLUIDSYNTH_NOT_A_DLL +# include # include <86box/86box.h> # include <86box/config.h> @@ -28,79 +30,9 @@ # define RENDER_RATE 100 # define BUFFER_SEGMENTS 10 -enum fluid_chorus_mod { - FLUID_CHORUS_MOD_SINE = 0, - FLUID_CHORUS_MOD_TRIANGLE = 1 -}; - -enum fluid_interp { - FLUID_INTERP_NONE = 0, - FLUID_INTERP_LINEAR = 1, - FLUID_INTERP_DEFAULT = 4, - FLUID_INTERP_4THORDER = 4, - FLUID_INTERP_7THORDER = 7, - FLUID_INTERP_HIGHEST = 7 -}; - extern void givealbuffer_midi(void *buf, uint32_t size); extern void al_set_midi(int freq, int buf_size); -static void *fluidsynth_handle; /* handle to FluidSynth DLL */ - -/* Pointers to the real functions. */ -// clang-format off -static void *(*f_new_fluid_settings)(void); -static void (*f_delete_fluid_settings)(void *settings); -static int (*f_fluid_settings_setnum)(void *settings, const char *name, double val); -static int (*f_fluid_settings_getnum)(void *settings, const char *name, double *val); -static void *(*f_new_fluid_synth)(void *settings); -static int (*f_delete_fluid_synth)(void *synth); -static int (*f_fluid_synth_noteon)(void *synth, int chan, int key, int vel); -static int (*f_fluid_synth_noteoff)(void *synth, int chan, int key); -static int (*f_fluid_synth_cc)(void *synth, int chan, int ctrl, int val); -static int (*f_fluid_synth_channel_pressure)(void *synth, int chan, int val); -static int (*f_fluid_synth_sysex)(void *synth, const char *data, int len, char *response, int *response_len, int *handled, int dryrun); -static int (*f_fluid_synth_pitch_bend)(void *synth, int chan, int val); -static int (*f_fluid_synth_program_change)(void *synth, int chan, int program); -static int (*f_fluid_synth_sfload)(void *synth, const char *filename, int reset_presets); -static int (*f_fluid_synth_set_interp_method)(void *synth, int chan, int interp_method); -static void (*f_fluid_synth_set_reverb)(void *synth, double roomsize, double damping, double width, double level); -static void (*f_fluid_synth_set_reverb_on)(void *synth, int on); -static void (*f_fluid_synth_set_chorus)(void *synth, int nr, double level, double speed, double depth_ms, int type); -static void (*f_fluid_synth_set_chorus_on)(void *synth, int on); -static int (*f_fluid_synth_write_s16)(void *synth, int len, void *lout, int loff, int lincr, void *rout, int roff, int rincr); -static int (*f_fluid_synth_write_float)(void *synth, int len, void *lout, int loff, int lincr, void *rout, int roff, int rincr); -static char *(*f_fluid_version_str)(void); -// clang-format on - -static dllimp_t fluidsynth_imports[] = { - // clang-format off - { "new_fluid_settings", &f_new_fluid_settings }, - { "delete_fluid_settings", &f_delete_fluid_settings }, - { "fluid_settings_setnum", &f_fluid_settings_setnum }, - { "fluid_settings_getnum", &f_fluid_settings_getnum }, - { "new_fluid_synth", &f_new_fluid_synth }, - { "delete_fluid_synth", &f_delete_fluid_synth }, - { "fluid_synth_noteon", &f_fluid_synth_noteon }, - { "fluid_synth_noteoff", &f_fluid_synth_noteoff }, - { "fluid_synth_cc", &f_fluid_synth_cc }, - { "fluid_synth_channel_pressure", &f_fluid_synth_channel_pressure }, - { "fluid_synth_sysex", &f_fluid_synth_sysex }, - { "fluid_synth_pitch_bend", &f_fluid_synth_pitch_bend }, - { "fluid_synth_program_change", &f_fluid_synth_program_change }, - { "fluid_synth_sfload", &f_fluid_synth_sfload }, - { "fluid_synth_set_interp_method", &f_fluid_synth_set_interp_method }, - { "fluid_synth_set_reverb", &f_fluid_synth_set_reverb }, - { "fluid_synth_set_reverb_on", &f_fluid_synth_set_reverb_on }, - { "fluid_synth_set_chorus", &f_fluid_synth_set_chorus }, - { "fluid_synth_set_chorus_on", &f_fluid_synth_set_chorus_on }, - { "fluid_synth_write_s16", &f_fluid_synth_write_s16 }, - { "fluid_synth_write_float", &f_fluid_synth_write_float }, - { "fluid_version_str", &f_fluid_version_str }, - { NULL, NULL }, - // clang-format on -}; - typedef struct fluidsynth { void *settings; void *synth; @@ -153,7 +85,7 @@ fluidsynth_thread(void *param) float *buf = (float *) ((uint8_t *) data->buffer + buf_pos); memset(buf, 0, buf_size); if (data->synth) - f_fluid_synth_write_float(data->synth, buf_size / (2 * sizeof(float)), buf, 0, 2, buf, 1, 2); + fluid_synth_write_float(data->synth, buf_size / (2 * sizeof(float)), buf, 0, 2, buf, 1, 2); buf_pos += buf_size; if (buf_pos >= data->buf_size) { givealbuffer_midi(data->buffer, data->buf_size / sizeof(float)); @@ -163,7 +95,7 @@ fluidsynth_thread(void *param) int16_t *buf = (int16_t *) ((uint8_t *) data->buffer_int16 + buf_pos); memset(buf, 0, buf_size); if (data->synth) - f_fluid_synth_write_s16(data->synth, buf_size / (2 * sizeof(int16_t)), buf, 0, 2, buf, 1, 2); + fluid_synth_write_s16(data->synth, buf_size / (2 * sizeof(int16_t)), buf, 0, 2, buf, 1, 2); buf_pos += buf_size; if (buf_pos >= data->buf_size) { givealbuffer_midi(data->buffer_int16, data->buf_size / sizeof(int16_t)); @@ -187,24 +119,24 @@ fluidsynth_msg(uint8_t *msg) switch (cmd) { case 0x80: /* Note Off */ - f_fluid_synth_noteoff(data->synth, chan, param1); + fluid_synth_noteoff(data->synth, chan, param1); break; case 0x90: /* Note On */ - f_fluid_synth_noteon(data->synth, chan, param1, param2); + fluid_synth_noteon(data->synth, chan, param1, param2); break; case 0xA0: /* Aftertouch */ break; case 0xB0: /* Control Change */ - f_fluid_synth_cc(data->synth, chan, param1, param2); + fluid_synth_cc(data->synth, chan, param1, param2); break; case 0xC0: /* Program Change */ - f_fluid_synth_program_change(data->synth, chan, param1); + fluid_synth_program_change(data->synth, chan, param1); break; case 0xD0: /* Channel Pressure */ - f_fluid_synth_channel_pressure(data->synth, chan, param1); + fluid_synth_channel_pressure(data->synth, chan, param1); break; case 0xE0: /* Pitch Bend */ - f_fluid_synth_pitch_bend(data->synth, chan, (param2 << 7) | param1); + fluid_synth_pitch_bend(data->synth, chan, (param2 << 7) | param1); break; case 0xF0: /* SysEx */ break; @@ -218,7 +150,7 @@ fluidsynth_sysex(uint8_t *data, unsigned int len) { fluidsynth_t *d = &fsdev; - f_fluid_synth_sysex(d->synth, (const char *) data, len, 0, 0, 0, 0); + fluid_synth_sysex(d->synth, (const char *) data, len, 0, 0, 0, 0); } void * @@ -229,31 +161,12 @@ fluidsynth_init(const device_t *info) memset(data, 0, sizeof(fluidsynth_t)); - /* Try loading the DLL. */ -# ifdef _WIN32 -# if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)) - fluidsynth_handle = dynld_module("libfluidsynth.dll", fluidsynth_imports); -# else - fluidsynth_handle = dynld_module("libfluidsynth64.dll", fluidsynth_imports); -# endif -# elif defined __APPLE__ - fluidsynth_handle = dynld_module("libfluidsynth.dylib", fluidsynth_imports); -# else - fluidsynth_handle = dynld_module("libfluidsynth.so.3", fluidsynth_imports); - if (fluidsynth_handle == NULL) - fluidsynth_handle = dynld_module("libfluidsynth.so.2", fluidsynth_imports); -# endif - if (fluidsynth_handle == NULL) { - ui_msgbox_header(MBX_ERROR, (wchar_t *) IDS_2080, (wchar_t *) IDS_2134); - return NULL; - } + data->settings = new_fluid_settings(); - data->settings = f_new_fluid_settings(); + fluid_settings_setnum(data->settings, "synth.sample-rate", 44100); + fluid_settings_setnum(data->settings, "synth.gain", device_get_config_int("output_gain") / 100.0f); - f_fluid_settings_setnum(data->settings, "synth.sample-rate", 44100); - f_fluid_settings_setnum(data->settings, "synth.gain", device_get_config_int("output_gain") / 100.0f); - - data->synth = f_new_fluid_synth(data->settings); + data->synth = new_fluid_synth(data->settings); const char *sound_font = (char *) device_get_config_string("sound_font"); # ifdef __unix__ @@ -261,10 +174,10 @@ fluidsynth_init(const device_t *info) sound_font = (access("/usr/share/sounds/sf2/FluidR3_GM.sf2", F_OK) == 0 ? "/usr/share/sounds/sf2/FluidR3_GM.sf2" : (access("/usr/share/soundfonts/default.sf2", F_OK) == 0 ? "/usr/share/soundfonts/default.sf2" : "")); # endif - data->sound_font = f_fluid_synth_sfload(data->synth, sound_font, 1); + data->sound_font = fluid_synth_sfload(data->synth, sound_font, 1); if (device_get_config_int("chorus")) { - f_fluid_synth_set_chorus_on(data->synth, 1); + fluid_synth_set_chorus_on(data->synth, 1); int chorus_voices = device_get_config_int("chorus_voices"); double chorus_level = device_get_config_int("chorus_level") / 100.0; @@ -277,21 +190,21 @@ fluidsynth_init(const device_t *info) else chorus_waveform = FLUID_CHORUS_MOD_TRIANGLE; - f_fluid_synth_set_chorus(data->synth, chorus_voices, chorus_level, chorus_speed, chorus_depth, chorus_waveform); + fluid_synth_set_chorus(data->synth, chorus_voices, chorus_level, chorus_speed, chorus_depth, chorus_waveform); } else - f_fluid_synth_set_chorus_on(data->synth, 0); + fluid_synth_set_chorus_on(data->synth, 0); if (device_get_config_int("reverb")) { - f_fluid_synth_set_reverb_on(data->synth, 1); + fluid_synth_set_reverb_on(data->synth, 1); double reverb_room_size = device_get_config_int("reverb_room_size") / 100.0; double reverb_damping = device_get_config_int("reverb_damping") / 100.0; int reverb_width = device_get_config_int("reverb_width"); double reverb_level = device_get_config_int("reverb_level") / 100.0; - f_fluid_synth_set_reverb(data->synth, reverb_room_size, reverb_damping, reverb_width, reverb_level); + fluid_synth_set_reverb(data->synth, reverb_room_size, reverb_damping, reverb_width, reverb_level); } else - f_fluid_synth_set_reverb_on(data->synth, 0); + fluid_synth_set_reverb_on(data->synth, 0); int interpolation = device_get_config_int("interpolation"); int fs_interpolation = FLUID_INTERP_4THORDER; @@ -305,10 +218,10 @@ fluidsynth_init(const device_t *info) else if (interpolation == 3) fs_interpolation = FLUID_INTERP_7THORDER; - f_fluid_synth_set_interp_method(data->synth, -1, fs_interpolation); + fluid_synth_set_interp_method(data->synth, -1, fs_interpolation); double samplerate; - f_fluid_settings_getnum(data->settings, "synth.sample-rate", &samplerate); + fluid_settings_getnum(data->settings, "synth.sample-rate", &samplerate); data->samplerate = (int) samplerate; if (sound_is_float) { data->buf_size = (data->samplerate / RENDER_RATE) * 2 * sizeof(float) * BUFFER_SEGMENTS; @@ -357,12 +270,12 @@ fluidsynth_close(void *p) thread_wait(data->thread_h); if (data->synth) { - f_delete_fluid_synth(data->synth); + delete_fluid_synth(data->synth); data->synth = NULL; } if (data->settings) { - f_delete_fluid_settings(data->settings); + delete_fluid_settings(data->settings); data->settings = NULL; } @@ -375,12 +288,6 @@ fluidsynth_close(void *p) free(data->buffer_int16); data->buffer_int16 = NULL; } - - /* Unload the DLL if possible. */ - if (fluidsynth_handle != NULL) { - dynld_close(fluidsynth_handle); - fluidsynth_handle = NULL; - } } static const device_config_t fluidsynth_config[] = { diff --git a/src/sound/snd_ac97_codec.c b/src/sound/snd_ac97_codec.c index 464e86f77..7a3701c9f 100644 --- a/src/sound/snd_ac97_codec.c +++ b/src/sound/snd_ac97_codec.c @@ -445,6 +445,9 @@ rate: /* Writable only if VRA/VRM is set. */ case 0x7c: /* Vendor ID1 */ case 0x7e: /* Vendor ID2 */ return; + + default: + break; } dev->regs[reg >> 1] = val; diff --git a/src/timer.c b/src/timer.c index 2d75e532e..dde6fbdbc 100644 --- a/src/timer.c +++ b/src/timer.c @@ -159,12 +159,12 @@ timer_init(void) } void -timer_add(pc_timer_t *timer, void (*callback)(void *p), void *p, int start_timer) +timer_add(pc_timer_t *timer, void (*callback)(void *p), void *priv, int start_timer) { memset(timer, 0, sizeof(pc_timer_t)); timer->callback = callback; - timer->p = p; + timer->p = priv; timer->flags = 0; timer->prev = timer->next = NULL; if (start_timer) diff --git a/src/unix/unix.c b/src/unix/unix.c index 8bddc5346..c9be5d80f 100644 --- a/src/unix/unix.c +++ b/src/unix/unix.c @@ -36,6 +36,7 @@ #include <86box/unix_sdl.h> #include <86box/timer.h> #include <86box/nvr.h> +#include <86box/version.h> #include <86box/video.h> #include <86box/ui.h> #include <86box/gdbstub.h> @@ -935,9 +936,43 @@ monitor_thread(void *param) "hardreset - hard reset the emulated system.\n" "pause - pause the the emulated system.\n" "fullscreen - toggle fullscreen.\n" + "version - print version and license information.\n" "exit - exit 86Box.\n"); } else if (strncasecmp(xargv[0], "exit", 4) == 0) { exit_event = 1; + } else if (strncasecmp(xargv[0], "version", 7) == 0) { +# ifndef EMU_GIT_HASH +# define EMU_GIT_HASH "0000000" +# endif + +# if defined(__arm__) || defined(__TARGET_ARCH_ARM) +# define ARCH_STR "arm" +# elif defined(__aarch64__) || defined(_M_ARM64) +# define ARCH_STR "arm64" +# elif defined(__i386) || defined(__i386__) || defined(_M_IX86) +# define ARCH_STR "i386" +# elif defined(__x86_64) || defined(__x86_64__) || defined(__amd64) || defined(_M_X64) +# define ARCH_STR "x86_64" +# else +# define ARCH_STR "unknown arch" +# endif + +# ifdef USE_DYNAREC +# ifdef USE_NEW_DYNAREC +# define DYNAREC_STR "new dynarec" +# else +# define DYNAREC_STR "old dynarec" +# endif +# else +# define DYNAREC_STR "no dynarec" +# endif + + printf( + "%s v%s [%s] [%s, %s]\n\n" + "An emulator of old computers\n" + "Authors: Sarah Walker, Miran Grca, Fred N. van Kempen (waltje), SA1988, Tiseno100, reenigne, leilei, JohnElliott, greatpsycho, and others.\n\n" + "Released under the GNU General Public License version 2 or later. See LICENSE for more information.\n", + EMU_NAME, EMU_VERSION_FULL, EMU_GIT_HASH, ARCH_STR, DYNAREC_STR); } else if (strncasecmp(xargv[0], "fullscreen", 10) == 0) { video_fullscreen = video_fullscreen ? 0 : 1; fullscreen_pending = 1; diff --git a/src/upi42.c b/src/upi42.c index e35a0752f..79f4ec9c2 100644 --- a/src/upi42.c +++ b/src/upi42.c @@ -18,6 +18,7 @@ #include #include #include +#include <86box/plat_unused.h> #ifdef UPI42_STANDALONE # define fatal(...) \ @@ -160,7 +161,7 @@ upi42_op_MOV_A_imm(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_MOV_A_PSW(upi42_t *upi42, uint32_t fetchdat) +upi42_op_MOV_A_PSW(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->a = upi42->psw; upi42_mirror_f0(upi42); @@ -168,7 +169,7 @@ upi42_op_MOV_A_PSW(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_MOV_PSW_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_MOV_PSW_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->psw = upi42->a; upi42_mirror_f0(upi42); @@ -176,28 +177,28 @@ upi42_op_MOV_PSW_A(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_MOV_A_T(upi42_t *upi42, uint32_t fetchdat) +upi42_op_MOV_A_T(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->a = upi42->t; return 1; } static int -upi42_op_MOV_T_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_MOV_T_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->t = upi42->a; return 1; } static int -upi42_op_MOV_STS_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_MOV_STS_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->sts = (upi42->a & 0xf0) | (upi42->sts & 0x0f); return 1; } static int -upi42_op_MOVP_A_indA(upi42_t *upi42, uint32_t fetchdat) +upi42_op_MOVP_A_indA(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->a = upi42->rom[(upi42->pc & 0xff00) | upi42->a]; upi42->cycs--; @@ -205,7 +206,7 @@ upi42_op_MOVP_A_indA(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_MOVP3_A_indA(upi42_t *upi42, uint32_t fetchdat) +upi42_op_MOVP3_A_indA(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->a = upi42->rom[0x300 | upi42->a]; upi42->cycs--; @@ -242,7 +243,7 @@ upi42_op_XCHD_A_indRr(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_SWAP_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_SWAP_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->a = (upi42->a << 4) | (upi42->a >> 4); return 1; @@ -258,7 +259,7 @@ upi42_op_IN_A_Pp(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_IN_A_DBB(upi42_t *upi42, uint32_t fetchdat) +upi42_op_IN_A_DBB(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->a = upi42->dbb_in; upi42->sts &= ~0x02; /* clear IBF */ @@ -266,7 +267,7 @@ upi42_op_IN_A_DBB(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_OUTL_Pp_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_OUTL_Pp_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->ports_out[fetchdat & 3] = upi42->a; upi42->cycs--; @@ -274,7 +275,7 @@ upi42_op_OUTL_Pp_A(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_OUT_DBB_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_OUT_DBB_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->dbb_out = upi42->a; upi42->sts |= 0x01; /* set OBF */ @@ -397,21 +398,21 @@ upi42_op_ORLD_Pp_A(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_RR_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_RR_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->a = (upi42->a << 7) | (upi42->a >> 1); return 1; } static int -upi42_op_RL_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_RL_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->a = (upi42->a >> 7) | (upi42->a << 1); return 1; } static int -upi42_op_RRC_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_RRC_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { uint8_t temp = upi42->a; upi42->a = (upi42->psw & 0x80) | (temp >> 1); @@ -420,7 +421,7 @@ upi42_op_RRC_A(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_RLC_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_RLC_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { uint8_t temp = upi42->a; upi42->a = (temp << 1) | (upi42->psw >> 7); @@ -429,7 +430,7 @@ upi42_op_RLC_A(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_INC_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_INC_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->a++; return 1; @@ -450,7 +451,7 @@ upi42_op_INC_indRr(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_DEC_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_DEC_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->a--; return 1; @@ -533,21 +534,21 @@ upi42_op_ADDC_A_imm(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_CLR_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_CLR_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->a = 0; return 1; } static int -upi42_op_CPL_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_CPL_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->a = ~upi42->a; return 1; } static int -upi42_op_DA_A(upi42_t *upi42, uint32_t fetchdat) +upi42_op_DA_A(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { if (((upi42->a & 0x0f) > 9) || (upi42->psw & 0x40)) upi42->a += 6; @@ -560,21 +561,21 @@ upi42_op_DA_A(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_CLR_C(upi42_t *upi42, uint32_t fetchdat) +upi42_op_CLR_C(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->psw &= ~0x80; return 1; } static int -upi42_op_CPL_C(upi42_t *upi42, uint32_t fetchdat) +upi42_op_CPL_C(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->psw ^= 0x80; return 1; } static int -upi42_op_CLR_F0(upi42_t *upi42, uint32_t fetchdat) +upi42_op_CLR_F0(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->psw &= ~0x20; upi42_mirror_f0(upi42); @@ -582,7 +583,7 @@ upi42_op_CLR_F0(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_CPL_F0(upi42_t *upi42, uint32_t fetchdat) +upi42_op_CPL_F0(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->psw ^= 0x20; upi42_mirror_f0(upi42); @@ -590,21 +591,21 @@ upi42_op_CPL_F0(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_CLR_F1(upi42_t *upi42, uint32_t fetchdat) +upi42_op_CLR_F1(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->sts &= ~0x08; return 1; } static int -upi42_op_CPL_F1(upi42_t *upi42, uint32_t fetchdat) +upi42_op_CPL_F1(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->sts ^= 0x08; return 1; } static int -upi42_op_EN_I(upi42_t *upi42, uint32_t fetchdat) +upi42_op_EN_I(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->i = 1; upi42->skip_timer_inc = 1; @@ -612,7 +613,7 @@ upi42_op_EN_I(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_DIS_I(upi42_t *upi42, uint32_t fetchdat) +upi42_op_DIS_I(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->i = 0; upi42->skip_timer_inc = 1; @@ -620,21 +621,21 @@ upi42_op_DIS_I(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_EN_TCNTI(upi42_t *upi42, uint32_t fetchdat) +upi42_op_EN_TCNTI(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->tcnti = 1; return 1; } static int -upi42_op_DIS_TCNTI(upi42_t *upi42, uint32_t fetchdat) +upi42_op_DIS_TCNTI(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->tcnti = upi42->tcnti_raise = 0; return 1; } static int -upi42_op_STRT_T(upi42_t *upi42, uint32_t fetchdat) +upi42_op_STRT_T(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->run_timer = 1; upi42->prescaler = 0; @@ -643,7 +644,7 @@ upi42_op_STRT_T(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_STRT_CNT(upi42_t *upi42, uint32_t fetchdat) +upi42_op_STRT_CNT(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->run_counter = 1; upi42->skip_timer_inc = 1; @@ -651,7 +652,7 @@ upi42_op_STRT_CNT(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_STOP_TCNT(upi42_t *upi42, uint32_t fetchdat) +upi42_op_STOP_TCNT(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->run_timer = upi42->run_counter = 0; upi42->skip_timer_inc = 1; @@ -659,35 +660,35 @@ upi42_op_STOP_TCNT(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_SEL_PMB0(upi42_t *upi42, uint32_t fetchdat) +upi42_op_SEL_PMB0(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->dbf = 0; return 1; } static int -upi42_op_SEL_PMB1(upi42_t *upi42, uint32_t fetchdat) +upi42_op_SEL_PMB1(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->dbf = 1; return 1; } static int -upi42_op_SEL_RB0(upi42_t *upi42, uint32_t fetchdat) +upi42_op_SEL_RB0(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->psw &= ~0x10; return 1; } static int -upi42_op_SEL_RB1(upi42_t *upi42, uint32_t fetchdat) +upi42_op_SEL_RB1(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->psw |= 0x10; return 1; } static int -upi42_op_NOP(upi42_t *upi42, uint32_t fetchdat) +upi42_op_NOP(UNUSED(upi42_t *upi42), UNUSED(uint32_t fetchdat)) { return 1; } @@ -741,7 +742,7 @@ upi42_op_JMP_imm(upi42_t *upi42, uint32_t fetchdat) } static int -upi42_op_JMPP_indA(upi42_t *upi42, uint32_t fetchdat) +upi42_op_JMPP_indA(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->pc = (upi42->pc & 0xff00) | upi42->a; upi42->cycs--; @@ -774,27 +775,27 @@ UPI42_COND_JMP_IMM(JNIBF, !(upi42->sts & 0x02), ) UPI42_COND_JMP_IMM(JOBF, upi42->sts & 0x01, ) static int -upi42_op_EN_A20(upi42_t *upi42, uint32_t fetchdat) +upi42_op_EN_A20(UNUSED(upi42_t *upi42), UNUSED(uint32_t fetchdat)) { /* Enable fast A20 until reset. */ return 1; } static int -upi42_op_EN_DMA(upi42_t *upi42, uint32_t fetchdat) +upi42_op_EN_DMA(UNUSED(upi42_t *upi42), UNUSED(uint32_t fetchdat)) { return 1; } static int -upi42_op_EN_FLAGS(upi42_t *upi42, uint32_t fetchdat) +upi42_op_EN_FLAGS(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { upi42->flags = 1; return 1; } static int -upi42_op_SUSPEND(upi42_t *upi42, uint32_t fetchdatr) +upi42_op_SUSPEND(upi42_t *upi42, UNUSED(uint32_t fetchdat)) { /* Inhibit execution until reset. */ upi42->suspend = 1; @@ -923,6 +924,8 @@ upi42_port_read(void *priv, int port) /* Apply special meanings. */ switch (port) { + default: + break; } upi42_log("UPI42: port_read(%d) = %02X\n", port, ret); @@ -944,7 +947,7 @@ upi42_port_write(void *priv, int port, uint8_t val) /* NOTE: The dbb/sts/cmd functions use I/O handler signatures; port is ignored. */ uint8_t -upi42_dbb_read(uint16_t port, void *priv) +upi42_dbb_read(UNUSED(uint16_t port), void *priv) { upi42_t *upi42 = (upi42_t *) priv; @@ -955,7 +958,7 @@ upi42_dbb_read(uint16_t port, void *priv) } void -upi42_dbb_write(uint16_t port, uint8_t val, void *priv) +upi42_dbb_write(UNUSED(uint16_t port), uint8_t val, void *priv) { upi42_t *upi42 = (upi42_t *) priv; @@ -967,7 +970,7 @@ upi42_dbb_write(uint16_t port, uint8_t val, void *priv) } uint8_t -upi42_sts_read(uint16_t port, void *priv) +upi42_sts_read(UNUSED(uint16_t port), void *priv) { upi42_t *upi42 = (upi42_t *) priv; @@ -977,7 +980,7 @@ upi42_sts_read(uint16_t port, void *priv) } void -upi42_cmd_write(uint16_t port, uint8_t val, void *priv) +upi42_cmd_write(UNUSED(uint16_t port), uint8_t val, void *priv) { upi42_t *upi42 = (upi42_t *) priv; diff --git a/src/usb.c b/src/usb.c index 5f2b95084..e715268af 100644 --- a/src/usb.c +++ b/src/usb.c @@ -31,6 +31,7 @@ #include <86box/timer.h> #include <86box/usb.h> #include <86box/dma.h> +#include <86box/plat_unused.h> #ifdef ENABLE_USB_LOG int usb_do_log = ENABLE_USB_LOG; @@ -51,8 +52,7 @@ usb_log(const char *fmt, ...) #endif /* OHCI registers */ -enum -{ +enum { OHCI_HcRevision = 0x00 /* 0x00 */, OHCI_HcControl = 0x01 /* 0x04 */, OHCI_HcCommandStatus = 0x02 /* 0x08 */, @@ -79,8 +79,7 @@ enum OHCI_HcRhPortStatus3 = 0x17 /* 0x5c */ }; -enum -{ +enum { OHCI_aHcRevision = 0x00, OHCI_aHcControl = 0x04, OHCI_aHcCommandStatus = 0x08, @@ -108,8 +107,7 @@ enum }; /* OHCI HcInterruptEnable/Disable bits */ -enum -{ +enum { OHCI_HcInterruptEnable_SO = 1 << 0, OHCI_HcInterruptEnable_WDH = 1 << 1, OHCI_HcInterruptEnable_SF = 1 << 2, @@ -120,8 +118,7 @@ enum }; /* OHCI HcControl bits */ -enum -{ +enum { OHCI_HcControl_ControlBulkServiceRatio = 1 << 0, OHCI_HcControl_PeriodicListEnable = 1 << 1, OHCI_HcControl_IsochronousEnable = 1 << 2, @@ -147,9 +144,9 @@ usb_interrupt_ohci(usb_t *dev, uint32_t level) } static uint8_t -uhci_reg_read(uint16_t addr, void *p) +uhci_reg_read(uint16_t addr, void *priv) { - usb_t *dev = (usb_t *) p; + usb_t *dev = (usb_t *) priv; uint8_t ret; uint8_t *regs = dev->uhci_io; @@ -161,9 +158,9 @@ uhci_reg_read(uint16_t addr, void *p) } static void -uhci_reg_write(uint16_t addr, uint8_t val, void *p) +uhci_reg_write(uint16_t addr, uint8_t val, void *priv) { - usb_t *dev = (usb_t *) p; + usb_t *dev = (usb_t *) priv; uint8_t *regs = dev->uhci_io; addr &= 0x0000001f; @@ -185,13 +182,16 @@ uhci_reg_write(uint16_t addr, uint8_t val, void *p) case 0x0c: regs[0x0c] = (val & 0x7f); break; + + default: + break; } } static void -uhci_reg_writew(uint16_t addr, uint16_t val, void *p) +uhci_reg_writew(uint16_t addr, uint16_t val, void *priv) { - usb_t *dev = (usb_t *) p; + usb_t *dev = (usb_t *) priv; uint16_t *regs = (uint16_t *) dev->uhci_io; addr &= 0x0000001f; @@ -212,8 +212,8 @@ uhci_reg_writew(uint16_t addr, uint16_t val, void *p) regs[addr >> 1] = ((regs[addr >> 1] & 0xedbb) | (val & 0x1244)) & ~(val & 0x080a); break; default: - uhci_reg_write(addr, val & 0xff, p); - uhci_reg_write(addr + 1, (val >> 8) & 0xff, p); + uhci_reg_write(addr, val & 0xff, priv); + uhci_reg_write(addr + 1, (val >> 8) & 0xff, priv); break; } } @@ -260,9 +260,9 @@ typedef struct #define ENDPOINT_DESC_LIMIT 32 static uint8_t -ohci_mmio_read(uint32_t addr, void *p) +ohci_mmio_read(uint32_t addr, void *priv) { - usb_t *dev = (usb_t *) p; + usb_t *dev = (usb_t *) priv; uint8_t ret = 0x00; #ifdef ENABLE_USB_LOG uint32_t old_addr = addr; @@ -301,15 +301,15 @@ ohci_mmio_read(uint32_t addr, void *p) } static uint16_t -ohci_mmio_readw(uint32_t addr, void *p) +ohci_mmio_readw(uint32_t addr, void *priv) { - return ohci_mmio_read(addr, p) | (ohci_mmio_read(addr + 1, p) << 8); + return ohci_mmio_read(addr, priv) | (ohci_mmio_read(addr + 1, priv) << 8); } static uint32_t -ohci_mmio_readl(uint32_t addr, void *p) +ohci_mmio_readl(uint32_t addr, void *priv) { - return ohci_mmio_readw(addr, p) | (ohci_mmio_readw(addr + 2, p) << 16); + return ohci_mmio_readw(addr, priv) | (ohci_mmio_readw(addr + 2, priv) << 16); } static void @@ -367,7 +367,7 @@ static int ohci_copy_td_input(usb_t* dev, usb_td_t *td, } #endif -static int ohci_copy_td_output(usb_t* dev, usb_td_t *td, +static int ohci_copy_td_output(UNUSED(usb_t* dev), usb_td_t *td, uint8_t *buf, int len) { uint32_t ptr; @@ -504,6 +504,9 @@ ohci_service_transfer_desc(usb_t* dev, usb_ed_t* endpoint_desc) switch (device_result) { case USB_ERROR_NAK: return 1; + + default: + break; } dev->ohci_interrupt_counter = 0; } @@ -676,9 +679,9 @@ ohci_soft_reset(usb_t* dev) } static void -ohci_mmio_write(uint32_t addr, uint8_t val, void *p) +ohci_mmio_write(uint32_t addr, uint8_t val, void *priv) { - usb_t *dev = (usb_t *) p; + usb_t *dev = (usb_t *) priv; uint8_t old; #ifdef ENABLE_USB_LOG @@ -888,8 +891,10 @@ ohci_mmio_write(uint32_t addr, uint8_t val, void *p) if (!(dev->ohci_mmio[addr >> 2].b[addr & 3] & 0x04) && (old & 0x04)) dev->ohci_mmio[(addr + 2) >> 2].b[(addr + 2) & 3] |= 0x04; - /* if (!(dev->ohci_mmio[addr >> 2].b[addr & 3] & 0x02)) - dev->ohci_mmio[(addr + 2) >> 2].b[(addr + 2) & 3] |= 0x02; */ +#if 0 + if (!(dev->ohci_mmio[addr >> 2].b[addr & 3] & 0x02)) + dev->ohci_mmio[(addr + 2) >> 2].b[(addr + 2) & 3] |= 0x02; +#endif return; case OHCI_aHcRhPortStatus1 + 1: if ((val & 0x02) && ((dev->ohci_mmio[OHCI_HcRhDescriptorA].b[1] & 0x03) == 0x00) && (dev->ohci_mmio[OHCI_HcRhDescriptorB].b[2] & 0x02)) { @@ -924,23 +929,26 @@ ohci_mmio_write(uint32_t addr, uint8_t val, void *p) case OHCI_aHcPeriodCurrentED: dev->ohci_mmio[addr >> 2].b[addr & 3] = (val & 0xf0); return; + + default: + break; } dev->ohci_mmio[addr >> 2].b[addr & 3] = val; } static void -ohci_mmio_writew(uint32_t addr, uint16_t val, void *p) +ohci_mmio_writew(uint32_t addr, uint16_t val, void *priv) { - ohci_mmio_write(addr, val & 0xff, p); - ohci_mmio_write(addr + 1, val >> 8, p); + ohci_mmio_write(addr, val & 0xff, priv); + ohci_mmio_write(addr + 1, val >> 8, priv); } static void -ohci_mmio_writel(uint32_t addr, uint32_t val, void *p) +ohci_mmio_writel(uint32_t addr, uint32_t val, void *priv) { - ohci_mmio_writew(addr, val & 0xffff, p); - ohci_mmio_writew(addr + 2, val >> 16, p); + ohci_mmio_writew(addr, val & 0xffff, priv); + ohci_mmio_writew(addr + 2, val >> 16, priv); } void @@ -964,7 +972,7 @@ usb_attach_device(usb_t *dev, usb_device_t* device, uint8_t bus_type) switch (bus_type) { case USB_BUS_OHCI: { - for (int i = 0; i < 2; i++) { + for (uint8_t i = 0; i < 2; i++) { if (!dev->ohci_devices[i]) { uint32_t old = dev->ohci_mmio[OHCI_HcRhPortStatus1 + (4 * i)].l; dev->ohci_devices[i] = device; @@ -981,8 +989,11 @@ usb_attach_device(usb_t *dev, usb_device_t* device, uint8_t bus_type) } } break; + + default: + break; } - return 255; + return 0xff; } void @@ -1011,6 +1022,9 @@ usb_detach_device(usb_t *dev, uint8_t port, uint8_t bus_type) } break; + + default: + break; } return; } @@ -1046,7 +1060,7 @@ usb_close(void *priv) } static void * -usb_init_ext(const device_t *info, void *params) +usb_init_ext(UNUSED(const device_t *info), void *params) { usb_t *dev; diff --git a/src/video/vid_cga.c b/src/video/vid_cga.c index 7239790dc..1fd8babb5 100644 --- a/src/video/vid_cga.c +++ b/src/video/vid_cga.c @@ -77,7 +77,7 @@ cga_out(uint16_t addr, uint8_t val, void *p) cga->cgamode = val; if (old ^ val) { - if ((old ^ val) & 0x05) + if ((old ^ val) & 0x07) update_cga16_color(val); cga_recalctimings(cga); @@ -352,10 +352,7 @@ cga_poll(void *p) x = (cga->crtc[1] << 4) + 16; if (cga->composite) { - if (cga->cgamode & 0x10) - border = 0x00; - else - border = cga->cgacol & 0x0f; + border = ((cga->cgamode & 0x12) == 0x12) ? 0 : (cga->cgacol & 15); Composite_Process(cga->cgamode, border, x >> 2, buffer32->line[cga->displine << 1]); Composite_Process(cga->cgamode, border, x >> 2, buffer32->line[(cga->displine << 1) + 1]); @@ -536,6 +533,7 @@ cga_standalone_init(const device_t *info) cga->rgb_type = device_get_config_int("rgb_type"); cga_palette = (cga->rgb_type << 1); cgapal_rebuild(); + update_cga16_color(cga->cgamode); return cga; } diff --git a/src/video/vid_voodoo_banshee.c b/src/video/vid_voodoo_banshee.c index d2e57de81..4fcd6af61 100644 --- a/src/video/vid_voodoo_banshee.c +++ b/src/video/vid_voodoo_banshee.c @@ -323,9 +323,9 @@ banshee_vblank_start(svga_t *svga) } static void -banshee_out(uint16_t addr, uint8_t val, void *p) +banshee_out(uint16_t addr, uint8_t val, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; svga_t *svga = &banshee->svga; uint8_t old; @@ -375,13 +375,16 @@ banshee_out(uint16_t addr, uint8_t val, void *p) } static uint8_t -banshee_in(uint16_t addr, void *p) +banshee_in(uint16_t addr, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; svga_t *svga = &banshee->svga; uint8_t temp; - // if (addr != 0x3da) banshee_log("banshee_in : %04X ", addr); +#if 0 + if (addr != 0x3da) + banshee_log("banshee_in : %04X ", addr); +#endif if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1)) addr ^= 0x60; @@ -405,7 +408,10 @@ banshee_in(uint16_t addr, void *p) temp = svga_in(addr, svga); break; } - // if (addr != 0x3da) banshee_log("%02X %04X:%04X %i\n", temp, CS,cpu_state.pc, ins); +#if 0 + if (addr != 0x3da) + banshee_log("%02X %04X:%04X %i\n", temp, CS,cpu_state.pc, ins); +#endif return temp; } @@ -524,7 +530,9 @@ banshee_recalctimings(svga_t *svga) svga->vblankstart += 0x400; if (svga->crtc[0x1b] & 0x40) svga->vsyncstart += 0x400; - // banshee_log("svga->hdisp=%i\n", svga->hdisp); +#if 0 + banshee_log("svga->hdisp=%i\n", svga->hdisp); +#endif svga->interlace = 0; @@ -559,7 +567,9 @@ banshee_recalctimings(svga_t *svga) svga->rowoffset = (banshee->vidDesktopOverlayStride & 0x3fff) >> 3; svga->ma_latch = banshee->vidDesktopStartAddr >> 2; banshee->desktop_stride_tiled = (banshee->vidDesktopOverlayStride & 0x3fff) * 128 * 32; - // banshee_log("Extended shift out %i rowoffset=%i %02x\n", VIDPROCCFG_DESKTOP_PIX_FORMAT, svga->rowoffset, svga->crtc[1]); +#if 0 + banshee_log("Extended shift out %i rowoffset=%i %02x\n", VIDPROCCFG_DESKTOP_PIX_FORMAT, svga->rowoffset, svga->crtc[1]); +#endif svga->char_width = 8; svga->split = 99999; @@ -583,11 +593,13 @@ banshee_recalctimings(svga_t *svga) if (svga->overlay.cur_xsize <= 0 || svga->overlay.cur_ysize <= 0) svga->overlay.ena = 0; if (svga->overlay.ena) { - /* banshee_log("Overlay enabled : start=%i,%i end=%i,%i size=%i,%i pitch=%x\n", - voodoo->overlay.start_x, voodoo->overlay.start_y, - voodoo->overlay.end_x, voodoo->overlay.end_y, - voodoo->overlay.size_x, voodoo->overlay.size_y, - svga->overlay.pitch);*/ +#if 0 + banshee_log("Overlay enabled : start=%i,%i end=%i,%i size=%i,%i pitch=%x\n", + voodoo->overlay.start_x, voodoo->overlay.start_y, + voodoo->overlay.end_x, voodoo->overlay.end_y, + voodoo->overlay.size_x, voodoo->overlay.size_y, + svga->overlay.pitch); +#endif if (!voodoo->overlay.start_x && !voodoo->overlay.start_y && svga->hdisp == voodoo->overlay.size_x && svga->dispend == voodoo->overlay.size_y) { /*Overlay is full screen, so don't bother rendering the desktop behind it*/ @@ -596,7 +608,9 @@ banshee_recalctimings(svga_t *svga) } } } else { - // banshee_log("Normal shift out\n"); +#if 0 + banshee_log("Normal shift out\n"); +#endif svga->bpp = 8; } @@ -609,19 +623,27 @@ banshee_recalctimings(svga_t *svga) double freq = (((double) n + 2) / (((double) m + 2) * (double) (1 << k))) * 14318184.0; svga->clock = (cpuclock * (float) (1ULL << 32)) / freq; - // svga->clock = cpuclock / freq; +#if 0 + svga->clock = cpuclock / freq; +#endif - // banshee_log("svga->clock = %g %g m=%i k=%i n=%i\n", freq, freq / 1000000.0, m, k, n); +#if 0 + banshee_log("svga->clock = %g %g m=%i k=%i n=%i\n", freq, freq / 1000000.0, m, k, n); +#endif } } static void -banshee_ext_out(uint16_t addr, uint8_t val, void *p) +banshee_ext_out(uint16_t addr, uint8_t val, void *priv) { - // banshee_t *banshee = (banshee_t *)p; - // svga_t *svga = &banshee->svga; +#if 0 + banshee_t *banshee = (banshee_t *)priv; + svga_t *svga = &banshee->svga; +#endif - // banshee_log("banshee_ext_out: addr=%04x val=%02x\n", addr, val); +#if 0 + banshee_log("banshee_ext_out: addr=%04x val=%02x\n", addr, val); +#endif switch (addr & 0xff) { case 0xb0: @@ -672,7 +694,7 @@ banshee_ext_out(uint16_t addr, uint8_t val, void *p) case 0xdd: case 0xde: case 0xdf: - banshee_out((addr & 0xff) + 0x300, val, p); + banshee_out((addr & 0xff) + 0x300, val, priv); break; default: @@ -680,13 +702,15 @@ banshee_ext_out(uint16_t addr, uint8_t val, void *p) } } static void -banshee_ext_outl(uint16_t addr, uint32_t val, void *p) +banshee_ext_outl(uint16_t addr, uint32_t val, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_t *voodoo = banshee->voodoo; svga_t *svga = &banshee->svga; - // banshee_log("banshee_ext_outl: addr=%04x val=%08x %04x(%08x):%08x\n", addr, val, CS,cs,cpu_state.pc); +#if 0 + banshee_log("banshee_ext_outl: addr=%04x val=%08x %04x(%08x):%08x\n", addr, val, CS,cs,cpu_state.pc); +#endif switch (addr & 0xff) { case Init_pciInit0: @@ -698,7 +722,9 @@ banshee_ext_outl(uint16_t addr, uint32_t val, void *p) case Init_lfbMemoryConfig: banshee->lfbMemoryConfig = val; - // banshee_log("lfbMemoryConfig=%08x\n", val); +#if 0 + banshee_log("lfbMemoryConfig=%08x\n", val); +#endif voodoo->tile_base = (val & 0x1fff) << 12; voodoo->tile_stride = 1024 << ((val >> 13) & 7); voodoo->tile_stride_shift = 10 + ((val >> 13) & 7); @@ -764,7 +790,9 @@ banshee_ext_outl(uint16_t addr, uint32_t val, void *p) case Video_vidProcCfg: banshee->vidProcCfg = val; - // banshee_log("vidProcCfg=%08x\n", val); +#if 0 + banshee_log("vidProcCfg=%08x\n", val); +#endif banshee->overlay_pix_fmt = (val & VIDPROCCFG_OVERLAY_PIX_FORMAT_MASK) >> VIDPROCCFG_OVERLAY_PIX_FORMAT_SHIFT; svga->hwcursor.ena = val & VIDPROCCFG_HWCURSOR_ENA; svga->fullchange = changeframecount; @@ -797,7 +825,9 @@ banshee_ext_outl(uint16_t addr, uint32_t val, void *p) svga->hwcursor.addr = (banshee->hwCurPatAddr & 0xfffff0) + (svga->hwcursor.yoff * 16); svga->hwcursor.cur_xsize = 64; svga->hwcursor.cur_ysize = 64; - // banshee_log("hwCurLoc %08x %i\n", val, svga->hwcursor.y); +#if 0 + banshee_log("hwCurLoc %08x %i\n", val, svga->hwcursor.y); +#endif break; case Video_hwCurC0: banshee->hwCurC0 = val; @@ -808,7 +838,9 @@ banshee_ext_outl(uint16_t addr, uint32_t val, void *p) case Video_vidSerialParallelPort: banshee->vidSerialParallelPort = val; - // banshee_log("vidSerialParallelPort: write %08x %08x %04x(%08x):%08x\n", val, val & (VIDSERIAL_DDC_DCK_W | VIDSERIAL_DDC_DDA_W), CS,cs,cpu_state.pc); +#if 0 + banshee_log("vidSerialParallelPort: write %08x %08x %04x(%08x):%08x\n", val, val & (VIDSERIAL_DDC_DCK_W | VIDSERIAL_DDC_DDA_W), CS,cs,cpu_state.pc); +#endif i2c_gpio_set(banshee->i2c_ddc, !!(val & VIDSERIAL_DDC_DCK_W), !!(val & VIDSERIAL_DDC_DDA_W)); i2c_gpio_set(banshee->i2c, !!(val & VIDSERIAL_I2C_SCK_W), !!(val & VIDSERIAL_I2C_SDA_W)); break; @@ -836,16 +868,22 @@ banshee_ext_outl(uint16_t addr, uint32_t val, void *p) break; case Video_vidOverlayDudx: voodoo->overlay.vidOverlayDudx = val & VID_DUDX_MASK; - // banshee_log("vidOverlayDudx=%08x\n", val); +#if 0 + banshee_log("vidOverlayDudx=%08x\n", val); +#endif break; case Video_vidOverlayDudxOffsetSrcWidth: voodoo->overlay.vidOverlayDudxOffsetSrcWidth = val; voodoo->overlay.overlay_bytes = (val & OVERLAY_SRC_WIDTH_MASK) >> OVERLAY_SRC_WIDTH_SHIFT; - // banshee_log("vidOverlayDudxOffsetSrcWidth=%08x\n", val); +#if 0 + banshee_log("vidOverlayDudxOffsetSrcWidth=%08x\n", val); +#endif break; case Video_vidOverlayDvdy: voodoo->overlay.vidOverlayDvdy = val & VID_DVDY_MASK; - // banshee_log("vidOverlayDvdy=%08x\n", val); +#if 0 + banshee_log("vidOverlayDvdy=%08x\n", val); +#endif break; case Video_vidOverlayDvdyOffset: voodoo->overlay.vidOverlayDvdyOffset = val; @@ -853,26 +891,34 @@ banshee_ext_outl(uint16_t addr, uint32_t val, void *p) case Video_vidDesktopStartAddr: banshee->vidDesktopStartAddr = val & 0xffffff; - // banshee_log("vidDesktopStartAddr=%08x\n", val); +#if 0 + banshee_log("vidDesktopStartAddr=%08x\n", val); +#endif svga->fullchange = changeframecount; svga_recalctimings(svga); break; case Video_vidDesktopOverlayStride: banshee->vidDesktopOverlayStride = val; - // banshee_log("vidDesktopOverlayStride=%08x\n", val); +#if 0 + banshee_log("vidDesktopOverlayStride=%08x\n", val); +#endif svga->fullchange = changeframecount; svga_recalctimings(svga); break; - // default: - // fatal("bad banshee_ext_outl: addr=%04x val=%08x\n", addr, val); +#if 0 + default: + fatal("bad banshee_ext_outl: addr=%04x val=%08x\n", addr, val); +#endif } } static uint8_t -banshee_ext_in(uint16_t addr, void *p) +banshee_ext_in(uint16_t addr, void *priv) { - banshee_t *banshee = (banshee_t *) p; - // svga_t *svga = &banshee->svga; + banshee_t *banshee = (banshee_t *) priv; +#if 0 + svga_t *svga = &banshee->svga; +#endif uint8_t ret = 0xff; switch (addr & 0xff) { @@ -881,7 +927,9 @@ banshee_ext_in(uint16_t addr, void *p) case Init_status + 2: case Init_status + 3: ret = (banshee_status(banshee) >> ((addr & 3) * 8)) & 0xff; - // banshee_log("Read status reg! %04x(%08x):%08x\n", CS, cs, cpu_state.pc); +#if 0 + banshee_log("Read status reg! %04x(%08x):%08x\n", CS, cs, cpu_state.pc); +#endif break; case 0xb0: @@ -932,7 +980,7 @@ banshee_ext_in(uint16_t addr, void *p) case 0xdd: case 0xde: case 0xdf: - ret = banshee_in((addr & 0xff) + 0x300, p); + ret = banshee_in((addr & 0xff) + 0x300, priv); break; default: @@ -979,15 +1027,17 @@ banshee_status(banshee_t *banshee) if (!voodoo->voodoo_busy) voodoo_wake_fifo_thread(voodoo); - // banshee_log("banshee_status: busy %i %i (%i %i) %i %i %i %04x(%08x):%08x %08x\n", busy, written, voodoo->cmd_written, voodoo->cmd_written_fifo, voodoo->cmd_read, voodoo->cmdfifo_depth_rd, voodoo->cmdfifo_depth_wr, CS,cs,cpu_state.pc, ret); +#if 0 + banshee_log("banshee_status: busy %i %i (%i %i) %i %i %i %04x(%08x):%08x %08x\n", busy, written, voodoo->cmd_written, voodoo->cmd_written_fifo, voodoo->cmd_read, voodoo->cmdfifo_depth_rd, voodoo->cmdfifo_depth_wr, CS,cs,cpu_state.pc, ret); +#endif return ret; } static uint32_t -banshee_ext_inl(uint16_t addr, void *p) +banshee_ext_inl(uint16_t addr, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_t *voodoo = banshee->voodoo; svga_t *svga = &banshee->svga; uint32_t ret = 0xffffffff; @@ -997,7 +1047,9 @@ banshee_ext_inl(uint16_t addr, void *p) switch (addr & 0xff) { case Init_status: ret = banshee_status(banshee); - // banshee_log("Read status reg! %04x(%08x):%08x\n", CS, cs, cpu_state.pc); +#if 0 + banshee_log("Read status reg! %04x(%08x):%08x\n", CS, cs, cpu_state.pc); +#endif break; case Init_pciInit0: ret = banshee->pciInit0; @@ -1090,7 +1142,9 @@ banshee_ext_inl(uint16_t addr, void *p) if (i2c_gpio_get_sda(banshee->i2c)) ret |= VIDSERIAL_I2C_SDA_R; } - // banshee_log("vidSerialParallelPort: read %08x %08x %04x(%08x):%08x\n", ret, ret & (VIDSERIAL_DDC_DCK_R | VIDSERIAL_DDC_DDA_R), CS,cs,cpu_state.pc); +#if 0 + banshee_log("vidSerialParallelPort: read %08x %08x %04x(%08x):%08x\n", ret, ret & (VIDSERIAL_DDC_DCK_R | VIDSERIAL_DDC_DDA_R), CS,cs,cpu_state.pc); +#endif break; case Video_vidScreenSize: @@ -1135,20 +1189,24 @@ banshee_ext_inl(uint16_t addr, void *p) return ret; } -static uint32_t banshee_reg_readl(uint32_t addr, void *p); +static uint32_t banshee_reg_readl(uint32_t addr, void *priv); static uint8_t -banshee_reg_read(uint32_t addr, void *p) +banshee_reg_read(uint32_t addr, void *priv) { - // banshee_log("banshee_reg_read: addr=%08x\n", addr); - return banshee_reg_readl(addr & ~3, p) >> (8 * (addr & 3)); +#if 0 + banshee_log("banshee_reg_read: addr=%08x\n", addr); +#endif + return banshee_reg_readl(addr & ~3, priv) >> (8 * (addr & 3)); } static uint16_t -banshee_reg_readw(uint32_t addr, void *p) +banshee_reg_readw(uint32_t addr, void *priv) { - // banshee_log("banshee_reg_readw: addr=%08x\n", addr); - return banshee_reg_readl(addr & ~3, p) >> (8 * (addr & 2)); +#if 0 + banshee_log("banshee_reg_readw: addr=%08x\n", addr); +#endif + return banshee_reg_readl(addr & ~3, priv) >> (8 * (addr & 2)); } static uint32_t @@ -1212,9 +1270,9 @@ banshee_cmd_read(banshee_t *banshee, uint32_t addr) } static uint32_t -banshee_reg_readl(uint32_t addr, void *p) +banshee_reg_readl(uint32_t addr, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_t *voodoo = banshee->voodoo; uint32_t ret = 0xffffffff; @@ -1372,7 +1430,7 @@ banshee_reg_readl(uint32_t addr, void *p) } static void -banshee_reg_write(uint32_t addr, uint8_t val, void *p) +banshee_reg_write(UNUSED(uint32_t addr), UNUSED(uint8_t val), UNUSED(void *priv)) { #if 0 banshee_log("banshee_reg_writeb: addr=%08x val=%02x\n", addr, val); @@ -1380,9 +1438,9 @@ banshee_reg_write(uint32_t addr, uint8_t val, void *p) } static void -banshee_reg_writew(uint32_t addr, uint16_t val, void *p) +banshee_reg_writew(uint32_t addr, uint16_t val, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_t *voodoo = banshee->voodoo; cycles -= voodoo->write_time; @@ -1498,9 +1556,9 @@ banshee_cmd_write(banshee_t *banshee, uint32_t addr, uint32_t val) } static void -banshee_reg_writel(uint32_t addr, uint32_t val, void *p) +banshee_reg_writel(uint32_t addr, uint32_t val, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_t *voodoo = banshee->voodoo; if (addr == voodoo->last_write_addr + 4) @@ -1625,9 +1683,9 @@ banshee_reg_writel(uint32_t addr, uint32_t val, void *p) } static uint8_t -banshee_read_linear(uint32_t addr, void *p) +banshee_read_linear(uint32_t addr, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_t *voodoo = banshee->voodoo; svga_t *svga = &banshee->svga; @@ -1663,14 +1721,14 @@ banshee_read_linear(uint32_t addr, void *p) } static uint16_t -banshee_read_linear_w(uint32_t addr, void *p) +banshee_read_linear_w(uint32_t addr, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_t *voodoo = banshee->voodoo; svga_t *svga = &banshee->svga; if (addr & 1) - return banshee_read_linear(addr, p) | (banshee_read_linear(addr + 1, p) << 8); + return banshee_read_linear(addr, priv) | (banshee_read_linear(addr + 1, priv) << 8); cycles -= voodoo->read_time; if ((banshee->pci_regs[0x30] & 0x01) && addr >= banshee->bios_rom.mapping.base && addr < (banshee->bios_rom.mapping.base + banshee->bios_rom.sz)) { @@ -1703,14 +1761,14 @@ banshee_read_linear_w(uint32_t addr, void *p) } static uint32_t -banshee_read_linear_l(uint32_t addr, void *p) +banshee_read_linear_l(uint32_t addr, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_t *voodoo = banshee->voodoo; svga_t *svga = &banshee->svga; if (addr & 3) - return banshee_read_linear_w(addr, p) | (banshee_read_linear_w(addr + 2, p) << 16); + return banshee_read_linear_w(addr, priv) | (banshee_read_linear_w(addr + 2, priv) << 16); cycles -= voodoo->read_time; @@ -1744,9 +1802,9 @@ banshee_read_linear_l(uint32_t addr, void *p) } static void -banshee_write_linear(uint32_t addr, uint8_t val, void *p) +banshee_write_linear(uint32_t addr, uint8_t val, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_t *voodoo = banshee->voodoo; svga_t *svga = &banshee->svga; @@ -1779,15 +1837,15 @@ banshee_write_linear(uint32_t addr, uint8_t val, void *p) } static void -banshee_write_linear_w(uint32_t addr, uint16_t val, void *p) +banshee_write_linear_w(uint32_t addr, uint16_t val, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_t *voodoo = banshee->voodoo; svga_t *svga = &banshee->svga; if (addr & 1) { - banshee_write_linear(addr, val, p); - banshee_write_linear(addr + 1, val >> 8, p); + banshee_write_linear(addr, val, priv); + banshee_write_linear(addr + 1, val >> 8, priv); return; } @@ -1819,16 +1877,16 @@ banshee_write_linear_w(uint32_t addr, uint16_t val, void *p) } static void -banshee_write_linear_l(uint32_t addr, uint32_t val, void *p) +banshee_write_linear_l(uint32_t addr, uint32_t val, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_t *voodoo = banshee->voodoo; svga_t *svga = &banshee->svga; int timing; if (addr & 3) { - banshee_write_linear_w(addr, val, p); - banshee_write_linear_w(addr + 2, val >> 16, p); + banshee_write_linear_w(addr, val, priv); + banshee_write_linear_w(addr + 2, val >> 16, priv); return; } @@ -2510,9 +2568,9 @@ banshee_overlay_draw(svga_t *svga, int displine) } void -banshee_set_overlay_addr(void *p, uint32_t addr) +banshee_set_overlay_addr(void *priv, UNUSED(uint32_t addr)) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_t *voodoo = banshee->voodoo; banshee->svga.overlay.addr = banshee->voodoo->leftOverlayBuf & 0xfffffff; @@ -2548,10 +2606,12 @@ banshee_vsync_callback(svga_t *svga) } static uint8_t -banshee_pci_read(int func, int addr, void *p) +banshee_pci_read(int func, int addr, void *priv) { - banshee_t *banshee = (banshee_t *) p; - // svga_t *svga = &banshee->svga; + banshee_t *banshee = (banshee_t *) priv; +#if 0 + svga_t *svga = &banshee->svga; +#endif uint8_t ret = 0; if (func) @@ -2751,9 +2811,9 @@ banshee_pci_read(int func, int addr, void *p) } static void -banshee_pci_write(int func, int addr, uint8_t val, void *p) +banshee_pci_write(int func, int addr, uint8_t val, void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; #if 0 svga_t *svga = &banshee->svga; #endif @@ -3357,9 +3417,9 @@ velocity_200_available(void) } static void -banshee_close(void *p) +banshee_close(void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; voodoo_card_close(banshee->voodoo); svga_close(&banshee->svga); @@ -3371,17 +3431,17 @@ banshee_close(void *p) } static void -banshee_speed_changed(void *p) +banshee_speed_changed(void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; svga_recalctimings(&banshee->svga); } static void -banshee_force_redraw(void *p) +banshee_force_redraw(void *priv) { - banshee_t *banshee = (banshee_t *) p; + banshee_t *banshee = (banshee_t *) priv; banshee->svga.fullchange = changeframecount; } diff --git a/src/video/vid_voodoo_banshee_blitter.c b/src/video/vid_voodoo_banshee_blitter.c index 175288856..f5009e0b8 100644 --- a/src/video/vid_voodoo_banshee_blitter.c +++ b/src/video/vid_voodoo_banshee_blitter.c @@ -207,7 +207,7 @@ get_addr(voodoo_t *voodoo, int x, int y, int src_notdst, uint32_t src_stride) } static void -PLOT(voodoo_t *voodoo, int x, int y, int pat_x, int pat_y, uint8_t pattern_mask, uint8_t rop, uint32_t src, int src_colorkey) +PLOT(voodoo_t *voodoo, int x, int y, int pat_x, int pat_y, uint8_t pattern_mask, UNUSED(uint8_t rop), uint32_t src, int src_colorkey) { switch (voodoo->banshee_blt.dstFormat & DST_FORMAT_COL_MASK) { case DST_FORMAT_COL_8_BPP: @@ -254,7 +254,7 @@ PLOT(voodoo_t *voodoo, int x, int y, int pat_x, int pat_y, uint8_t pattern_mask, } static void -PLOT_LINE(voodoo_t *voodoo, int x, int y, uint8_t rop, uint32_t pattern, int src_colorkey) +PLOT_LINE(voodoo_t *voodoo, int x, int y, UNUSED(uint8_t rop), uint32_t pattern, int src_colorkey) { switch (voodoo->banshee_blt.dstFormat & DST_FORMAT_COL_MASK) { case DST_FORMAT_COL_8_BPP: @@ -984,7 +984,7 @@ banshee_do_screen_to_screen_stretch_blt(voodoo_t *voodoo) } static void -banshee_do_host_to_screen_stretch_blt(voodoo_t *voodoo, int count, uint32_t data) +banshee_do_host_to_screen_stretch_blt(voodoo_t *voodoo, UNUSED(int count), uint32_t data) { #if 0 if (voodoo->banshee_blt.dstBaseAddr == 0xee5194) diff --git a/src/video/vid_voodoo_blitter.c b/src/video/vid_voodoo_blitter.c index a1105795c..ff45fc837 100644 --- a/src/video/vid_voodoo_blitter.c +++ b/src/video/vid_voodoo_blitter.c @@ -166,8 +166,10 @@ voodoo_v2_blit_start(voodoo_t *voodoo) int x; int y; - /* voodooblt_log("blit_start: command=%08x srcX=%i srcY=%i dstX=%i dstY=%i sizeX=%i sizeY=%i color=%04x,%04x\n", - voodoo->bltCommand, voodoo->bltSrcX, voodoo->bltSrcY, voodoo->bltDstX, voodoo->bltDstY, voodoo->bltSizeX, voodoo->bltSizeY, voodoo->bltColorFg, voodoo->bltColorBg);*/ +#if 0 + voodooblt_log("blit_start: command=%08x srcX=%i srcY=%i dstX=%i dstY=%i sizeX=%i sizeY=%i color=%04x,%04x\n", + voodoo->bltCommand, voodoo->bltSrcX, voodoo->bltSrcY, voodoo->bltDstX, voodoo->bltDstY, voodoo->bltSizeX, voodoo->bltSizeY, voodoo->bltColorFg, voodoo->bltColorBg); +#endif voodoo_wait_for_render_thread_idle(voodoo); diff --git a/src/video/vid_voodoo_display.c b/src/video/vid_voodoo_display.c index 77d54398f..84f376a8f 100644 --- a/src/video/vid_voodoo_display.c +++ b/src/video/vid_voodoo_display.c @@ -141,10 +141,11 @@ voodoo_calc_clutData(voodoo_t *voodoo) int r = (c >> 8) & 0xf8; int g = (c >> 3) & 0xfc; int b = (c << 3) & 0xf8; - // r |= (r >> 5); - // g |= (g >> 6); - // b |= (b >> 5); - +#if 0 + r |= (r >> 5); + g |= (g >> 6); + b |= (b >> 5); +#endif voodoo->video_16to32[c] = (voodoo->clutData256[r].r << 16) | (voodoo->clutData256[g].g << 8) | voodoo->clutData256[b].b; } } @@ -442,7 +443,7 @@ voodoo_filterline_v1(voodoo_t *voodoo, uint8_t *fil, int column, uint16_t *src, } static void -voodoo_filterline_v2(voodoo_t *voodoo, uint8_t *fil, int column, uint16_t *src, int line) +voodoo_filterline_v2(voodoo_t *voodoo, uint8_t *fil, int column, uint16_t *src, UNUSED(int line)) { int x; @@ -506,9 +507,9 @@ voodoo_filterline_v2(voodoo_t *voodoo, uint8_t *fil, int column, uint16_t *src, } void -voodoo_callback(void *p) +voodoo_callback(void *priv) { - voodoo_t *voodoo = (voodoo_t *) p; + voodoo_t *voodoo = (voodoo_t *) priv; monitor_t *monitor = &monitors[voodoo->monitor_index]; if (voodoo->fbiInit0 & FBIINIT0_VGA_PASS) { @@ -576,7 +577,9 @@ voodoo_callback(void *p) } skip_draw: if (voodoo->line == voodoo->v_disp) { - // voodoodisp_log("retrace %i %i %08x %i\n", voodoo->retrace_count, voodoo->swap_interval, voodoo->swap_offset, voodoo->swap_pending); +#if 0 + voodoodisp_log("retrace %i %i %08x %i\n", voodoo->retrace_count, voodoo->swap_interval, voodoo->swap_offset, voodoo->swap_pending); +#endif voodoo->retrace_count++; if (SLI_ENABLED && (voodoo->fbiInit2 & FBIINIT2_SWAP_ALGORITHM_MASK) == FBIINIT2_SWAP_ALGORITHM_SLI_SYNC) { if (voodoo == voodoo->set->voodoos[0]) { diff --git a/src/video/vid_voodoo_fb.c b/src/video/vid_voodoo_fb.c index 06941eb05..5e06836b1 100644 --- a/src/video/vid_voodoo_fb.c +++ b/src/video/vid_voodoo_fb.c @@ -59,9 +59,9 @@ voodoo_fb_log(const char *fmt, ...) #endif uint16_t -voodoo_fb_readw(uint32_t addr, void *p) +voodoo_fb_readw(uint32_t addr, void *priv) { - voodoo_t *voodoo = (voodoo_t *) p; + voodoo_t *voodoo = (voodoo_t *) priv; int x; int y; uint32_t read_addr; @@ -100,9 +100,9 @@ voodoo_fb_readw(uint32_t addr, void *p) return temp; } uint32_t -voodoo_fb_readl(uint32_t addr, void *p) +voodoo_fb_readl(uint32_t addr, void *priv) { - voodoo_t *voodoo = (voodoo_t *) p; + voodoo_t *voodoo = (voodoo_t *) priv; int x; int y; uint32_t read_addr; @@ -168,9 +168,9 @@ do_dither(voodoo_params_t *params, rgba8_t col, int x, int y) } void -voodoo_fb_writew(uint32_t addr, uint16_t val, void *p) +voodoo_fb_writew(uint32_t addr, uint16_t val, void *priv) { - voodoo_t *voodoo = (voodoo_t *) p; + voodoo_t *voodoo = (voodoo_t *) priv; voodoo_params_t *params = &voodoo->params; int x; int y; @@ -186,10 +186,14 @@ voodoo_fb_writew(uint32_t addr, uint16_t val, void *p) depth_data = voodoo->params.zaColor & 0xffff; alpha_data = voodoo->params.zaColor >> 24; - // while (!RB_EMPTY) - // thread_reset_event(voodoo->not_full_event); +#if 0 + while (!RB_EMPTY) + thread_reset_event(voodoo->not_full_event); +#endif - // voodoo_fb_log("voodoo_fb_writew : %08X %04X\n", addr, val); +#if 0 + voodoo_fb_log("voodoo_fb_writew : %08X %04X\n", addr, val); +#endif switch (voodoo->lfbMode & LFB_FORMAT_MASK) { case LFB_FORMAT_RGB565: @@ -304,9 +308,9 @@ skip_pixel: } void -voodoo_fb_writel(uint32_t addr, uint32_t val, void *p) +voodoo_fb_writel(uint32_t addr, uint32_t val, void *priv) { - voodoo_t *voodoo = (voodoo_t *) p; + voodoo_t *voodoo = (voodoo_t *) priv; voodoo_params_t *params = &voodoo->params; int x; int y; @@ -320,10 +324,14 @@ voodoo_fb_writel(uint32_t addr, uint32_t val, void *p) depth_data[0] = depth_data[1] = voodoo->params.zaColor & 0xffff; alpha_data[0] = alpha_data[1] = voodoo->params.zaColor >> 24; - // while (!RB_EMPTY) - // thread_reset_event(voodoo->not_full_event); +#if 0 + while (!RB_EMPTY) + thread_reset_event(voodoo->not_full_event); +#endif - // voodoo_fb_log("voodoo_fb_writel : %08X %08X\n", addr, val); +#if 0 + voodoo_fb_log("voodoo_fb_writel : %08X %08X\n", addr, val); +#endif switch (voodoo->lfbMode & LFB_FORMAT_MASK) { case LFB_FORMAT_RGB565: @@ -393,12 +401,12 @@ voodoo_fb_writel(uint32_t addr, uint32_t val, void *p) else write_addr_aux = voodoo->params.aux_offset + x + (y * voodoo->row_width); - // voodoo_fb_log("fb_writel %08x x=%i y=%i rw=%i %08x wo=%08x\n", addr, x, y, voodoo->row_width, write_addr, voodoo->fb_write_offset); +#if 0 + voodoo_fb_log("fb_writel %08x x=%i y=%i rw=%i %08x wo=%08x\n", addr, x, y, voodoo->row_width, write_addr, voodoo->fb_write_offset); +#endif if (voodoo->lfbMode & 0x100) { - int c; - - for (c = 0; c < count; c++) { + for (int c = 0; c < count; c++) { rgba8_t write_data = colour_data[c]; uint16_t new_depth = depth_data[c]; diff --git a/src/video/vid_voodoo_fifo.c b/src/video/vid_voodoo_fifo.c index ab82d104e..8a84dabe4 100644 --- a/src/video/vid_voodoo_fifo.c +++ b/src/video/vid_voodoo_fifo.c @@ -81,9 +81,9 @@ voodoo_wake_fifo_thread_now(voodoo_t *voodoo) } void -voodoo_wake_timer(void *p) +voodoo_wake_timer(void *priv) { - voodoo_t *voodoo = (voodoo_t *) p; + voodoo_t *voodoo = (voodoo_t *) priv; thread_set_event(voodoo->wake_fifo_thread); /*Wake up FIFO thread if moving from idle*/ } @@ -295,21 +295,27 @@ voodoo_fifo_thread(void *param) int num_verticies; int v_num; - // voodoo_fifo_log(" CMDFIFO header %08x at %08x\n", header, voodoo->cmdfifo_rp); +#if 0 + voodoo_fifo_log(" CMDFIFO header %08x at %08x\n", header, voodoo->cmdfifo_rp); +#endif voodoo->cmd_status &= ~7; voodoo->cmd_status |= (header & 7); voodoo->cmd_status |= (1 << 11); switch (header & 7) { case 0: - // voodoo_fifo_log("CMDFIFO0\n"); +#if 0 + voodoo_fifo_log("CMDFIFO0\n"); +#endif voodoo->cmd_status = (voodoo->cmd_status & 0xffff8fff) | (((header >> 3) & 7) << 12); switch ((header >> 3) & 7) { case 0: /*NOP*/ break; case 1: /*JSR*/ - // voodoo_fifo_log("JSR %08x\n", (header >> 4) & 0xfffffc); +#if 0 + voodoo_fifo_log("JSR %08x\n", (header >> 4) & 0xfffffc); +#endif voodoo->cmdfifo_ret_addr = voodoo->cmdfifo_rp; voodoo->cmdfifo_rp = (header >> 4) & 0xfffffc; voodoo->cmdfifo_in_sub = 1; @@ -322,7 +328,9 @@ voodoo_fifo_thread(void *param) case 3: /*JMP local frame buffer*/ voodoo->cmdfifo_rp = (header >> 4) & 0xfffffc; - // voodoo_fifo_log("JMP to %08x %04x\n", voodoo->cmdfifo_rp, header); +#if 0 + voodoo_fifo_log("JMP to %08x %04x\n", voodoo->cmdfifo_rp, header); +#endif break; default: @@ -334,13 +342,20 @@ voodoo_fifo_thread(void *param) case 1: num = header >> 16; addr = (header & 0x7ff8) >> 1; - // voodoo_fifo_log("CMDFIFO1 addr=%08x\n",addr); +#if 0 + voodoo_fifo_log("CMDFIFO1 addr=%08x\n",addr); +#endif while (num--) { uint32_t val = cmdfifo_get(voodoo); if ((addr & (1 << 13)) && voodoo->type >= VOODOO_BANSHEE) { - // if (voodoo->type != VOODOO_BANSHEE) - // fatal("CMDFIFO1: Not Banshee\n"); - // voodoo_fifo_log("CMDFIFO1: write %08x %08x\n", addr, val); +#if 0 + if (voodoo->type != VOODOO_BANSHEE) + fatal("CMDFIFO1: Not Banshee\n"); +#endif + +#if 0 + voodoo_fifo_log("CMDFIFO1: write %08x %08x\n", addr, val); +#endif voodoo_2d_reg_writel(voodoo, addr, val); } else { if ((addr & 0x3ff) == SST_triangleCMD || (addr & 0x3ff) == SST_ftriangleCMD || (addr & 0x3ff) == SST_fastfillCMD || (addr & 0x3ff) == SST_nopCMD) @@ -382,8 +397,10 @@ voodoo_fifo_thread(void *param) v_num = 0; if (((header >> 3) & 7) == 2) v_num = 1; - // voodoo_fifo_log("CMDFIFO3: num=%i verts=%i mask=%02x\n", num, num_verticies, (header >> 10) & 0xff); - // voodoo_fifo_log("CMDFIFO3 %02x %i\n", (header >> 10), (header >> 3) & 7); +#if 0 + voodoo_fifo_log("CMDFIFO3: num=%i verts=%i mask=%02x\n", num, num_verticies, (header >> 10) & 0xff); + voodoo_fifo_log("CMDFIFO3 %02x %i\n", (header >> 10), (header >> 3) & 7); +#endif while (num_verticies--) { voodoo->verts[3].sVx = cmdfifo_get_f(voodoo); @@ -435,7 +452,9 @@ voodoo_fifo_thread(void *param) num = (header >> 29) & 7; mask = (header >> 15) & 0x3fff; addr = (header & 0x7ff8) >> 1; - // voodoo_fifo_log("CMDFIFO4 addr=%08x\n",addr); +#if 0 + voodoo_fifo_log("CMDFIFO4 addr=%08x\n",addr); +#endif while (mask) { if (mask & 1) { uint32_t val = cmdfifo_get(voodoo); @@ -443,7 +462,10 @@ voodoo_fifo_thread(void *param) if ((addr & (1 << 13)) && voodoo->type >= VOODOO_BANSHEE) { if (voodoo->type < VOODOO_BANSHEE) fatal("CMDFIFO1: Not Banshee\n"); - // voodoo_fifo_log("CMDFIFO1: write %08x %08x\n", addr, val); +#if 0 + voodoo_fifo_log("CMDFIFO1: write %08x %08x\n", addr, val); +#endif + voodoo_2d_reg_writel(voodoo, addr, val); } else { if ((addr & 0x3ff) == SST_triangleCMD || (addr & 0x3ff) == SST_ftriangleCMD || (addr & 0x3ff) == SST_fastfillCMD || (addr & 0x3ff) == SST_nopCMD) @@ -463,22 +485,30 @@ voodoo_fifo_thread(void *param) break; case 5: - // if (header & 0x3fc00000) - // fatal("CMDFIFO packet 5 has byte disables set %08x\n", header); +#if 0 + if (header & 0x3fc00000) + fatal("CMDFIFO packet 5 has byte disables set %08x\n", header); +#endif num = (header >> 3) & 0x7ffff; addr = cmdfifo_get(voodoo) & 0xffffff; if (!num) num = 1; - // voodoo_fifo_log("CMDFIFO5 addr=%08x num=%i\n", addr, num); +#if 0 + voodoo_fifo_log("CMDFIFO5 addr=%08x num=%i\n", addr, num); +#endif switch (header >> 30) { case 0: /*Linear framebuffer (Banshee)*/ case 1: /*Planar YUV*/ if (voodoo->texture_present[0][(addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT]) { - // voodoo_fifo_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); +#if 0 + voodoo_fifo_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); +#endif flush_texture_cache(voodoo, addr & voodoo->texture_mask, 0); } if (voodoo->texture_present[1][(addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT]) { - // voodoo_fifo_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); +#if 0 + voodoo_fifo_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); +#endif flush_texture_cache(voodoo, addr & voodoo->texture_mask, 1); } while (num--) { diff --git a/src/video/vid_voodoo_reg.c b/src/video/vid_voodoo_reg.c index 51b9568b8..4a66161f5 100644 --- a/src/video/vid_voodoo_reg.c +++ b/src/video/vid_voodoo_reg.c @@ -70,9 +70,9 @@ voodoo_reg_log(const char *fmt, ...) #endif void -voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) +voodoo_reg_writel(uint32_t addr, uint32_t val, void *priv) { - voodoo_t *voodoo = (voodoo_t *) p; + voodoo_t *voodoo = (voodoo_t *) priv; void (*voodoo_recalc_tex)(voodoo_t * voodoo, int tmu) = NULL; union { uint32_t i; @@ -89,7 +89,9 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) voodoo_recalc_tex = voodoo_recalc_tex12; tempif.i = val; - // voodoo_reg_log("voodoo_reg_write_l: addr=%08x val=%08x(%f) chip=%x\n", addr, val, tempif.f, chip); +#if 0 + voodoo_reg_log("voodoo_reg_write_l: addr=%08x val=%08x(%f) chip=%x\n", addr, val, tempif.f, chip); +#endif addr &= 0x3fc; if ((voodoo->fbiInit3 & FBIINIT3_REMAP) && addr < 0x100 && ad21) @@ -97,7 +99,9 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) switch (addr) { case SST_swapbufferCMD: if (voodoo->type >= VOODOO_BANSHEE) { - // voodoo_reg_log("swapbufferCMD %08x %08x\n", val, voodoo->leftOverlayBuf); +#if 0 + voodoo_reg_log("swapbufferCMD %08x %08x\n", val, voodoo->leftOverlayBuf); +#endif voodoo_wait_for_render_thread_idle(voodoo); if (!(val & 1)) { @@ -136,8 +140,10 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) voodoo->params.swapbufferCMD = val; - // voodoo_reg_log("Swap buffer %08x %d %p %i\n", val, voodoo->swap_count, &voodoo->swap_count, (voodoo == voodoo->set->voodoos[1]) ? 1 : 0); - // voodoo->front_offset = params->front_offset; +#if 0 + voodoo_reg_log("Swap buffer %08x %d %p %i\n", val, voodoo->swap_count, &voodoo->swap_count, (voodoo == voodoo->set->voodoos[1]) ? 1 : 0); + voodoo->front_offset = params->front_offset; +#endif voodoo_wait_for_render_thread_idle(voodoo); if (!(val & 1)) { memset(voodoo->dirty_line, 1, sizeof(voodoo->dirty_line)); @@ -670,7 +676,9 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) if (voodoo->type >= VOODOO_BANSHEE) { voodoo->params.draw_offset = val & 0xfffff0; voodoo->fb_write_offset = voodoo->params.draw_offset; - // voodoo_reg_log("colorBufferAddr=%06x\n", voodoo->params.draw_offset); +#if 0 + voodoo_reg_log("colorBufferAddr=%06x\n", voodoo->params.draw_offset); +#endif } break; case SST_colBufferStride: @@ -679,10 +687,14 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) voodoo->params.col_tiled = voodoo->col_tiled; if (voodoo->col_tiled) { voodoo->row_width = (val & 0x7f) * 128 * 32; - // voodoo_reg_log("colBufferStride tiled = %i bytes, tiled %08x\n", voodoo->row_width, val); +#if 0 + voodoo_reg_log("colBufferStride tiled = %i bytes, tiled %08x\n", voodoo->row_width, val); +#endif } else { voodoo->row_width = val & 0x3fff; - // voodoo_reg_log("colBufferStride linear = %i bytes, linear\n", voodoo->row_width); +#if 0 + voodoo_reg_log("colBufferStride linear = %i bytes, linear\n", voodoo->row_width); +#endif } voodoo->params.row_width = voodoo->row_width; } @@ -690,7 +702,9 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) case SST_auxBufferAddr: if (voodoo->type >= VOODOO_BANSHEE) { voodoo->params.aux_offset = val & 0xfffff0; - // pclog("auxBufferAddr=%06x\n", voodoo->params.aux_offset); +#if 0 + pclog("auxBufferAddr=%06x\n", voodoo->params.aux_offset); +#endif } break; case SST_auxBufferStride: @@ -699,10 +713,14 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) voodoo->params.aux_tiled = voodoo->aux_tiled; if (voodoo->aux_tiled) { voodoo->aux_row_width = (val & 0x7f) * 128 * 32; - // voodoo_reg_log("auxBufferStride tiled = %i bytes, tiled\n", voodoo->aux_row_width); +#if 0 + voodoo_reg_log("auxBufferStride tiled = %i bytes, tiled\n", voodoo->aux_row_width); +#endif } else { voodoo->aux_row_width = val & 0x3fff; - // voodoo_reg_log("auxBufferStride linear = %i bytes, linear\n", voodoo->aux_row_width); +#if 0 + voodoo_reg_log("auxBufferStride linear = %i bytes, linear\n", voodoo->aux_row_width); +#endif } voodoo->params.aux_row_width = voodoo->aux_row_width; } @@ -726,12 +744,16 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) case SST_sVx: tempif.i = val; voodoo->verts[3].sVx = tempif.f; - // voodoo_reg_log("sVx[%i]=%f\n", voodoo->vertex_num, tempif.f); +#if 0 + voodoo_reg_log("sVx[%i]=%f\n", voodoo->vertex_num, tempif.f); +#endif break; case SST_sVy: tempif.i = val; voodoo->verts[3].sVy = tempif.f; - // voodoo_reg_log("sVy[%i]=%f\n", voodoo->vertex_num, tempif.f); +#if 0 + voodoo_reg_log("sVy[%i]=%f\n", voodoo->vertex_num, tempif.f); +#endif break; case SST_sARGB: voodoo->verts[3].sBlue = (float) (val & 0xff); @@ -789,7 +811,9 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) break; case SST_sBeginTriCMD: - // voodoo_reg_log("sBeginTriCMD %i %f\n", voodoo->vertex_num, voodoo->verts[4].sVx); +#if 0 + voodoo_reg_log("sBeginTriCMD %i %f\n", voodoo->vertex_num, voodoo->verts[4].sVx); +#endif voodoo->verts[0] = voodoo->verts[3]; voodoo->verts[1] = voodoo->verts[3]; voodoo->verts[2] = voodoo->verts[3]; @@ -800,7 +824,9 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) voodoo->cull_pingpong = 0; break; case SST_sDrawTriCMD: - // voodoo_reg_log("sDrawTriCMD %i %i\n", voodoo->num_verticies, voodoo->sSetupMode & SETUPMODE_STRIP_MODE); +#if 0 + voodoo_reg_log("sDrawTriCMD %i %i\n", voodoo->num_verticies, voodoo->sSetupMode & SETUPMODE_STRIP_MODE); +#endif /*I'm not sure this is the vertex selection algorithm actually used in the 3dfx chips, but this works with a number of games that switch between strip and fan mode in the middle of a run (eg Black & White, Viper Racing)*/ @@ -840,7 +866,9 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) voodoo->num_verticies++; if (voodoo->num_verticies == 3) { - // voodoo_reg_log("triangle_setup\n"); +#if 0 + voodoo_reg_log("triangle_setup\n"); +#endif voodoo_triangle_setup(voodoo); voodoo->cull_pingpong = !voodoo->cull_pingpong; @@ -852,7 +880,9 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) voodoo->bltSrcBaseAddr = val & 0x3fffff; break; case SST_bltDstBaseAddr: - // voodoo_reg_log("Write bltDstBaseAddr %08x\n", val); +#if 0 + voodoo_reg_log("Write bltDstBaseAddr %08x\n", val); +#endif voodoo->bltDstBaseAddr = val & 0x3fffff; break; case SST_bltXYStrides: @@ -969,7 +999,9 @@ voodoo_reg_writel(uint32_t addr, uint32_t val, void *p) voodoo->params.texBaseAddr[0] = val & 0xfffff0; else voodoo->params.texBaseAddr[0] = (val & 0x7ffff) << 3; - // voodoo_reg_log("texBaseAddr = %08x %08x\n", voodoo->params.texBaseAddr[0], val); +#if 0 + voodoo_reg_log("texBaseAddr = %08x %08x\n", voodoo->params.texBaseAddr[0], val); +#endif voodoo_recalc_tex(voodoo, 0); } if (chip & CHIP_TREX1) { diff --git a/src/video/vid_voodoo_render.c b/src/video/vid_voodoo_render.c index c0e6e0196..052a0b51e 100644 --- a/src/video/vid_voodoo_render.c +++ b/src/video/vid_voodoo_render.c @@ -178,7 +178,9 @@ voodoo_fls(uint16_t val) { int num = 0; - // voodoo_render_log("fls(%04x) = ", val); +#if 0 + voodoo_render_log("fls(%04x) = ", val); +#endif if (!(val & 0xff00)) { num += 8; val <<= 8; @@ -195,7 +197,9 @@ voodoo_fls(uint16_t val) num += 1; val <<= 1; } - // voodoo_render_log("%i %04x\n", num, val); +#if 0 + voodoo_render_log("%i %04x\n", num, val); +#endif return num; } @@ -241,7 +245,7 @@ tex_read(voodoo_state_t *state, voodoo_texture_state_t *texture_state, int tmu) #define HIGH4(x) ((x & 0xf0) | ((x & 0xf0) >> 4)) static inline void -tex_read_4(voodoo_state_t *state, voodoo_texture_state_t *texture_state, int s, int t, int *d, int tmu, int x) +tex_read_4(voodoo_state_t *state, voodoo_texture_state_t *texture_state, int s, int t, int *d, int tmu, UNUSED(int x)) { rgba_u dat[4]; @@ -320,36 +324,44 @@ voodoo_get_texture(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *st s >>= 4; t >>= 4; - // if (x == 80) - // if (voodoo_output) - // voodoo_render_log("s=%08x t=%08x _ds=%02x _dt=%02x\n", s, t, _ds, dt); +#if 0 + if (x == 80) + if (voodoo_output) + voodoo_render_log("s=%08x t=%08x _ds=%02x _dt=%02x\n", s, t, _ds, dt); +#endif d[0] = (16 - _ds) * (16 - dt); d[1] = _ds * (16 - dt); d[2] = (16 - _ds) * dt; d[3] = _ds * dt; - // texture_state.s = s; - // texture_state.t = t; +#if 0 + texture_state.s = s; + texture_state.t = t; +#endif tex_read_4(state, &texture_state, s, t, d, tmu, x); - /* state->tex_r = (tex_samples[0].rgba.r * d[0] + tex_samples[1].rgba.r * d[1] + tex_samples[2].rgba.r * d[2] + tex_samples[3].rgba.r * d[3]) >> 8; - state->tex_g = (tex_samples[0].rgba.g * d[0] + tex_samples[1].rgba.g * d[1] + tex_samples[2].rgba.g * d[2] + tex_samples[3].rgba.g * d[3]) >> 8; - state->tex_b = (tex_samples[0].rgba.b * d[0] + tex_samples[1].rgba.b * d[1] + tex_samples[2].rgba.b * d[2] + tex_samples[3].rgba.b * d[3]) >> 8; - state->tex_a = (tex_samples[0].rgba.a * d[0] + tex_samples[1].rgba.a * d[1] + tex_samples[2].rgba.a * d[2] + tex_samples[3].rgba.a * d[3]) >> 8;*/ - /* state->tex_r = tex_samples[0].r; - state->tex_g = tex_samples[0].g; - state->tex_b = tex_samples[0].b; - state->tex_a = tex_samples[0].a;*/ +#if 0 + state->tex_r = (tex_samples[0].rgba.r * d[0] + tex_samples[1].rgba.r * d[1] + tex_samples[2].rgba.r * d[2] + tex_samples[3].rgba.r * d[3]) >> 8; + state->tex_g = (tex_samples[0].rgba.g * d[0] + tex_samples[1].rgba.g * d[1] + tex_samples[2].rgba.g * d[2] + tex_samples[3].rgba.g * d[3]) >> 8; + state->tex_b = (tex_samples[0].rgba.b * d[0] + tex_samples[1].rgba.b * d[1] + tex_samples[2].rgba.b * d[2] + tex_samples[3].rgba.b * d[3]) >> 8; + state->tex_a = (tex_samples[0].rgba.a * d[0] + tex_samples[1].rgba.a * d[1] + tex_samples[2].rgba.a * d[2] + tex_samples[3].rgba.a * d[3]) >> 8;*/ +#endif +#if 0 + state->tex_r = tex_samples[0].r; + state->tex_g = tex_samples[0].g; + state->tex_b = tex_samples[0].b; + state->tex_a = tex_samples[0].a; +#endif } else { - // rgba_t tex_samples; - // voodoo_texture_state_t texture_state; - // int s = state->tex_s >> (18+state->lod); - // int t = state->tex_t >> (18+state->lod); - // int s, t; - - // state->tex_s -= 1 << (17+state->lod); - // state->tex_t -= 1 << (17+state->lod); +#if 0 + rgba_t tex_samples; + voodoo_texture_state_t texture_state; + int s = state->tex_s >> (18+state->lod); + int t = state->tex_t >> (18+state->lod); + state->tex_s -= 1 << (17+state->lod); + state->tex_t -= 1 << (17+state->lod); +#endif s = state->tex_s >> (4 + tex_lod); t = state->tex_t >> (4 + tex_lod); @@ -357,10 +369,12 @@ voodoo_get_texture(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *st texture_state.t = t; tex_read(state, &texture_state, tmu); - /* state->tex_r = tex_samples[0].rgba.r; - state->tex_g = tex_samples[0].rgba.g; - state->tex_b = tex_samples[0].rgba.b; - state->tex_a = tex_samples[0].rgba.a;*/ +#if 0 + state->tex_r = tex_samples[0].rgba.r; + state->tex_g = tex_samples[0].rgba.g; + state->tex_b = tex_samples[0].rgba.b; + state->tex_a = tex_samples[0].rgba.a; +#endif } } @@ -432,8 +446,10 @@ voodoo_tmu_fetch_and_blend(voodoo_t *voodoo, voodoo_params_t *params, voodoo_sta c_reverse = !tc_reverse_blend; a_reverse = !tca_reverse_blend; } - /* c_reverse1 = c_reverse; - a_reverse1 = a_reverse;*/ +#if 0 + c_reverse1 = c_reverse; + a_reverse1 = a_reverse; +#endif if (tc_sub_clocal_1) { switch (tc_mselect_1) { case TC_MSELECT_ZERO: @@ -639,30 +655,32 @@ int voodoo_recomp = 0; static void voodoo_half_triangle(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t *state, int ystart, int yend, int odd_even) { - /* int rgb_sel = params->fbzColorPath & 3; - int a_sel = (params->fbzColorPath >> 2) & 3; - int cc_localselect = params->fbzColorPath & (1 << 4); - int cca_localselect = (params->fbzColorPath >> 5) & 3; - int cc_localselect_override = params->fbzColorPath & (1 << 7); - int cc_zero_other = params->fbzColorPath & (1 << 8); - int cc_sub_clocal = params->fbzColorPath & (1 << 9); - int cc_mselect = (params->fbzColorPath >> 10) & 7; - int cc_reverse_blend = params->fbzColorPath & (1 << 13); - int cc_add = (params->fbzColorPath >> 14) & 3; - int cc_add_alocal = params->fbzColorPath & (1 << 15); - int cc_invert_output = params->fbzColorPath & (1 << 16); - int cca_zero_other = params->fbzColorPath & (1 << 17); - int cca_sub_clocal = params->fbzColorPath & (1 << 18); - int cca_mselect = (params->fbzColorPath >> 19) & 7; - int cca_reverse_blend = params->fbzColorPath & (1 << 22); - int cca_add = (params->fbzColorPath >> 23) & 3; - int cca_invert_output = params->fbzColorPath & (1 << 25); - int src_afunc = (params->alphaMode >> 8) & 0xf; - int dest_afunc = (params->alphaMode >> 12) & 0xf; - int alpha_func = (params->alphaMode >> 1) & 7; - int a_ref = params->alphaMode >> 24; - int depth_op = (params->fbzMode >> 5) & 7; - int dither = params->fbzMode & FBZ_DITHER;*/ +#if 0 + int rgb_sel = params->fbzColorPath & 3; + int a_sel = (params->fbzColorPath >> 2) & 3; + int cc_localselect = params->fbzColorPath & (1 << 4); + int cca_localselect = (params->fbzColorPath >> 5) & 3; + int cc_localselect_override = params->fbzColorPath & (1 << 7); + int cc_zero_other = params->fbzColorPath & (1 << 8); + int cc_sub_clocal = params->fbzColorPath & (1 << 9); + int cc_mselect = (params->fbzColorPath >> 10) & 7; + int cc_reverse_blend = params->fbzColorPath & (1 << 13); + int cc_add = (params->fbzColorPath >> 14) & 3; + int cc_add_alocal = params->fbzColorPath & (1 << 15); + int cc_invert_output = params->fbzColorPath & (1 << 16); + int cca_zero_other = params->fbzColorPath & (1 << 17); + int cca_sub_clocal = params->fbzColorPath & (1 << 18); + int cca_mselect = (params->fbzColorPath >> 19) & 7; + int cca_reverse_blend = params->fbzColorPath & (1 << 22); + int cca_add = (params->fbzColorPath >> 23) & 3; + int cca_invert_output = params->fbzColorPath & (1 << 25); + int src_afunc = (params->alphaMode >> 8) & 0xf; + int dest_afunc = (params->alphaMode >> 12) & 0xf; + int alpha_func = (params->alphaMode >> 1) & 7; + int a_ref = params->alphaMode >> 24; + int depth_op = (params->fbzMode >> 5) & 7; + int dither = params->fbzMode & FBZ_DITHER;*/ +#endif int texels; #ifndef NO_CODEGEN uint8_t (*voodoo_draw)(voodoo_state_t * state, voodoo_params_t * params, int x, int real_y); @@ -723,7 +741,9 @@ voodoo_half_triangle(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t * yend = params->clipHighY; state->y = ystart; - // yend--; +#if 0 + yend--; +#endif if (SLI_ENABLED) { int test_y; @@ -760,7 +780,9 @@ voodoo_half_triangle(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t * #endif voodoo_render_log("dxAB=%08x dxBC=%08x dxAC=%08x\n", state->dxAB, state->dxBC, state->dxAC); - // voodoo_render_log("Start %i %i\n", ystart, voodoo->fbzMode & (1 << 17)); +#if 0 + voodoo_render_log("Start %i %i\n", ystart, voodoo->fbzMode & (1 << 17)); +#endif for (; state->y < yend; state->y += y_diff) { int x; @@ -916,7 +938,9 @@ voodoo_half_triangle(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t * voodoo->fbiPixelsIn++; voodoo_render_log(" X=%03i T=%08x\n", x, state->tmu0_t); - // if (voodoo->fbzMode & FBZ_RGB_WMASK) +#if 0 + if (voodoo->fbzMode & FBZ_RGB_WMASK) +#endif { int update = 1; uint8_t cother_r = 0; @@ -956,7 +980,9 @@ voodoo_half_triangle(voodoo_t *voodoo, voodoo_params_t *params, voodoo_state_t * w_depth = 0xffff; } - // w_depth = CLAMP16(w_depth); +#if 0 + w_depth = CLAMP16(w_depth); +#endif if (params->fbzMode & FBZ_W_BUFFER) new_depth = w_depth; diff --git a/src/video/vid_voodoo_texture.c b/src/video/vid_voodoo_texture.c index 1e9413460..d02041d16 100644 --- a/src/video/vid_voodoo_texture.c +++ b/src/video/vid_voodoo_texture.c @@ -550,7 +550,9 @@ flush_texture_cache(voodoo_t *voodoo, uint32_t dirty_addr, int tmu) int wait_for_idle = 0; memset(voodoo->texture_present[tmu], 0, sizeof(voodoo->texture_present[0])); - // voodoo_texture_log("Evict %08x %i\n", dirty_addr, sizeof(voodoo->texture_present)); +#if 0 + voodoo_texture_log("Evict %08x %i\n", dirty_addr, sizeof(voodoo->texture_present)); +#endif for (uint8_t c = 0; c < TEX_CACHE_MAX; c++) { if (voodoo->texture_cache[tmu][c].base != -1) { for (uint8_t d = 0; d < 4; d++) { @@ -618,8 +620,10 @@ voodoo_tex_writel(uint32_t addr, uint32_t val, void *p) if (lod > LOD_MAX) return; - // if (addr >= 0x200000) - // return; +#if 0 + if (addr >= 0x200000) + return; +#endif if (voodoo->params.tformat[tmu] & 8) addr = voodoo->params.tex_base[tmu][lod] + s * 2 + (t << voodoo->params.tex_shift[tmu][lod]) * 2; @@ -629,11 +633,15 @@ voodoo_tex_writel(uint32_t addr, uint32_t val, void *p) addr = (addr & 0x1ffffc) + voodoo->params.tex_base[tmu][0]; if (voodoo->texture_present[tmu][(addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT]) { - // voodoo_texture_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); +#if 0 + voodoo_texture_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); +#endif flush_texture_cache(voodoo, addr & voodoo->texture_mask, tmu); } if (voodoo->type == VOODOO_3 && voodoo->texture_present[tmu ^ 1][(addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT]) { - // voodoo_texture_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); +#if 0 + voodoo_texture_log("texture_present at %08x %i\n", addr, (addr & voodoo->texture_mask) >> TEX_DIRTY_SHIFT); +#endif flush_texture_cache(voodoo, addr & voodoo->texture_mask, tmu ^ 1); } *(uint32_t *) (&voodoo->tex_mem[tmu][addr & voodoo->texture_mask]) = val; diff --git a/src/vnc.c b/src/vnc.c index 8743c1e17..30caff9e2 100644 --- a/src/vnc.c +++ b/src/vnc.c @@ -93,7 +93,9 @@ vnc_mouse_poll(void) ms.dx = 0; ms.dy = 0; - // pclog("dx=%d, dy=%d, dwheel=%d\n", mouse_x, mouse_y, mouse_z); +#if 0 + pclog("dx=%d, dy=%d, dwheel=%d\n", mouse_x, mouse_y, mouse_z); +#endif } if (b != ms.buttons) { @@ -132,7 +134,7 @@ vnc_ptrevent(int but, int x, int y, rfbClientPtr cl) } static void -vnc_clientgone(rfbClientPtr cl) +vnc_clientgone(UNUSED(rfbClientPtr cl)) { vnc_log("VNC: client disconnected: %s\n", cl->host); @@ -143,7 +145,9 @@ vnc_clientgone(rfbClientPtr cl) vnc_log("VNC: no clients, pausing..\n"); /* Disable the mouse. */ - // plat_mouse_capture(0); +#if 0 + plat_mouse_capture(0); +#endif mouse_set_poll_ex(NULL); plat_pause(1); @@ -169,7 +173,9 @@ vnc_newclient(rfbClientPtr cl) vnc_log("VNC: unpausing..\n"); /* Enable the mouse. */ - // plat_mouse_capture(1); +#if 0 + plat_mouse_capture(1); +#endif mouse_set_poll_ex(vnc_mouse_poll); plat_pause(0); @@ -325,7 +331,7 @@ vnc_pause(void) } void -vnc_take_screenshot(wchar_t *fn) +vnc_take_screenshot(UNUSED(wchar_t *fn)) { vnc_log("VNC: take_screenshot\n"); } diff --git a/src/vnc_keymap.c b/src/vnc_keymap.c index 923f6ecf0..2e5f3c0d8 100644 --- a/src/vnc_keymap.c +++ b/src/vnc_keymap.c @@ -665,8 +665,8 @@ vnc_kbinput(int down, int k) /* Send this scancode sequence to the PC keyboard. */ switch (scan >> 8) { - case 0x00: default: + case 0x00: if (scan & 0xff) keyboard_input(down, scan & 0xff); break; diff --git a/src/win/win.c b/src/win/win.c index 4d3b7c1a0..f166d559d 100644 --- a/src/win/win.c +++ b/src/win/win.c @@ -626,7 +626,7 @@ plat_tempfile(char *bufp, char *prefix, char *suffix) else strcpy(bufp, ""); - GetSystemTime(&SystemTime); + GetLocalTime(&SystemTime); sprintf(&bufp[strlen(bufp)], "%d%02d%02d-%02d%02d%02d-%03d%s", SystemTime.wYear, SystemTime.wMonth, SystemTime.wDay, SystemTime.wHour, SystemTime.wMinute, SystemTime.wSecond, diff --git a/src/win/win_settings.c b/src/win/win_settings.c index 020dca31b..9ded351b9 100644 --- a/src/win/win_settings.c +++ b/src/win/win_settings.c @@ -714,7 +714,8 @@ win_settings_machine_recalc_fpu(HWND hdlg) c++; } - settings_set_check(hdlg, IDC_CHECK_SOFTFLOAT, temp_fpu_softfloat); + settings_set_check(hdlg, IDC_CHECK_SOFTFLOAT, (machine_has_flags(temp_machine, MACHINE_SOFTFLOAT_ONLY) ? TRUE : temp_fpu_softfloat)); + settings_enable_window(hdlg, IDC_CHECK_SOFTFLOAT, (machine_has_flags(temp_machine, MACHINE_SOFTFLOAT_ONLY) ? FALSE : TRUE)); settings_enable_window(hdlg, IDC_COMBO_FPU, c > 1); @@ -2002,9 +2003,10 @@ win_settings_storage_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lParam) settings_enable_window(hdlg, IDC_BUTTON_IDE_TER, is_at && temp_ide_ter); settings_enable_window(hdlg, IDC_CHECK_IDE_QUA, is_at); settings_enable_window(hdlg, IDC_BUTTON_IDE_QUA, is_at && temp_ide_qua); + settings_enable_window(hdlg, IDC_CHECK_CASSETTE, machine_has_bus(temp_machine, MACHINE_BUS_CASSETTE)); settings_set_check(hdlg, IDC_CHECK_IDE_TER, temp_ide_ter); settings_set_check(hdlg, IDC_CHECK_IDE_QUA, temp_ide_qua); - settings_set_check(hdlg, IDC_CHECK_CASSETTE, temp_cassette); + settings_set_check(hdlg, IDC_CHECK_CASSETTE, (temp_cassette && machine_has_bus(temp_machine, MACHINE_BUS_CASSETTE))); free(stransi); free(lptsTemp); @@ -5415,7 +5417,7 @@ win_settings_peripherals_proc(HWND hdlg, UINT message, WPARAM wParam, LPARAM lPa } settings_enable_window(hdlg, IDC_CHECK_BUGGER, machine_has_bus(temp_machine, MACHINE_BUS_ISA)); - settings_set_check(hdlg, IDC_CHECK_BUGGER, temp_bugger); + settings_set_check(hdlg, IDC_CHECK_BUGGER, (temp_bugger && machine_has_bus(temp_machine, MACHINE_BUS_ISA))); settings_set_check(hdlg, IDC_CHECK_POSTCARD, temp_postcard); free(stransi);