mirror of
https://github.com/86Box/86Box.git
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Updates
This commit is contained in:
@@ -22,7 +22,7 @@
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extern "C" {
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#endif
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#include <86box/tco.h> /* TCO Header. Needed for Intel ICH chipsets. */
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#include <86box/tco.h> /* TCO Header. Needed for the Intel ICH chipsets. */
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#define ACPI_TIMER_FREQ 3579545
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#define PM_FREQ ACPI_TIMER_FREQ
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@@ -66,11 +66,11 @@ typedef struct
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smicmd, gpio_dir,
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gpio_val, muxcntrl, ali_soft_smi,
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timer32, smireg,
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gpireg[3], gporeg[4], tco[17],
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gpireg[3], gporeg[4],
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extiotrapsts, extiotrapen;
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uint16_t pmsts, pmen,
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pmcntrl, bus_addr_track, devact_sts,
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devtrap_en, gpsts, gpsts1,
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devtrap_en, gpsts, gpsts1,
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gpen, gpen1, gpscien,
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gpcntrl, gplvl, gpmux,
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gpsel, gpsmien, pscntrl,
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@@ -14,6 +14,7 @@
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*
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* Copyright 2019,2020 Miran Grca.
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*/
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#ifndef EMU_CHIPSET_H
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# define EMU_CHIPSET_H
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@@ -99,31 +100,10 @@ extern const device_t slc90e66_device;
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extern const device_t ioapic_device;
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/* Intel ICH2 */
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extern const device_t intel_815ep_device;
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extern const device_t intel_ich2_device;
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/* OPTi */
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extern const device_t opti283_device;
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extern const device_t opti291_device;
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extern const device_t opti493_device;
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extern const device_t opti495_device;
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extern const device_t opti802g_device;
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extern const device_t opti822_device;
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extern const device_t opti895_device;
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extern const device_t opti5x7_device;
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/* SiS */
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extern const device_t rabbit_device;
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extern const device_t sis_85c401_device;
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extern const device_t sis_85c460_device;
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extern const device_t sis_85c461_device;
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extern const device_t sis_85c471_device;
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extern const device_t sis_85c496_device;
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extern const device_t sis_85c496_ls486e_device;
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extern const device_t sis_85c50x_device;
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extern const device_t sis_5511_device;
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extern const device_t sis_5571_device;
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/* ST */
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extern const device_t stpc_client_device;
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@@ -172,4 +152,5 @@ extern const device_t phoenix_486_jumper_pci_device;
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#if defined(DEV_BRANCH) && defined(USE_OLIVETTI)
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extern const device_t olivetti_eva_device;
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#endif
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#endif /*EMU_CHIPSET_H*/
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@@ -20,7 +20,7 @@ typedef struct intel_ich2_trap_t
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} intel_ich2_trap_t;
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extern void intel_ich2_trap_set_acpi(intel_ich2_trap_t *trap, acpi_t *acpi);
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extern void intel_ich2_device_trap_setup(int enable, uint8_t acpi_reg, uint8_t acpi_reg_val, uint16_t addr, uint16_t size, int is_hdd, intel_ich2_trap_t *trap);
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extern void intel_ich2_device_trap_setup(uint8_t acpi_reg, uint8_t acpi_reg_val, uint16_t addr, uint16_t size, intel_ich2_trap_t *dev);
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extern const device_t intel_ich2_trap_device;
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@@ -94,8 +94,7 @@ extern uint64_t PITCONST, ISACONST,
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HERCCONST,
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VGACONST1,
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VGACONST2,
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RTCCONST,
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TCOCONST;
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RTCCONST;
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extern int refresh_at_enable;
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@@ -45,8 +45,11 @@ extern const device_t i82091aa_device;
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extern const device_t i82091aa_398_device;
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extern const device_t i82091aa_ide_pri_device;
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extern const device_t i82091aa_ide_device;
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/* National Semiconductor NSC366 (PC87366) */
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extern const device_t nsc366_device;
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extern const device_t nsc366_4f_device;
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extern const device_t pc87306_device;
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extern const device_t pc87307_device;
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extern const device_t pc87307_15c_device;
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@@ -6,7 +6,7 @@
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*
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* This file is part of the 86Box distribution.
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*
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* Definitions for the SMBus host controllers.
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* Definitions for the SMBus host controllers.
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*
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*
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*
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@@ -135,6 +135,9 @@ extern void spd_write_drbs(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint
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extern void spd_write_drbs_with_ext(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit);
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extern void spd_write_drbs_interleaved(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit);
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extern void spd_write_drbs_ali1621(uint8_t *regs, uint8_t reg_min, uint8_t reg_max);
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extern void spd_write_drbs_intel_815ep(uint8_t *regs);
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/* 815EP Memory Hack Specific */
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extern void intel_815ep_spd_init(); /* Initialize the SPD (For the Machines) */
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extern uint8_t intel_815ep_get_banking(); /* Get the Banking Configuration (For the Chipset) */
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#endif /*EMU_SPD_H*/
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@@ -17,7 +17,6 @@ typedef struct
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{
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uint8_t regs[17];
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uint16_t tco_irq;
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pc_timer_t *tco_timer;
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} tco_t;
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extern const device_t tco_device;
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