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Finished the great internal machine reorganization and added the FIC PO-6000.

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This commit is contained in:
OBattler
2025-08-13 23:43:51 +02:00
parent 6646747528
commit d2c8dab342
46 changed files with 8739 additions and 7957 deletions
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20
src/machine/CMakeLists.txt
View File

@@ -19,33 +19,31 @@ add_library(mch OBJECT
machine.c
machine_table.c
m_xt.c
m_xt_compaq.c
m_xt_laserxt.c
m_xt_philips.c
m_xt_t1000.c
m_xt_xi8088.c
m_xt_zenith.c
m_pcjr.c
m_amstrad.c
m_amstrad_pc5x86.c
m_europc.c
m_elt.c
m_xt_olivetti.c
m_tandy.c
m_v86p.c
m_at.c
m_at_commodore.c
m_at_grid.c
m_at_t3100e.c
m_ps1.c
m_ps1_hdc.c
m_ps2_isa.c
m_ps2_mca.c
m_at_compaq.c
m_at_common.c
m_at_286.c
m_at_386sx.c
m_at_m6117.c
m_at_386dx.c
m_at_486slc.c
m_at_386dx_486.c
m_at_socket1.c
m_at_socket2.c
m_at_socket3.c
m_at_socket3_pci.c
m_at_486_misc.c
m_at_socket4.c
m_at_socket5.c
m_at_socket7_3v.c
@@ -53,6 +51,8 @@ add_library(mch OBJECT
m_at_sockets7.c
m_at_socket8.c
m_at_slot1.c
m_at_slot1_2.c
m_at_slot1_socket370.c
m_at_slot2.c
m_at_socket370.c
m_at_misc.c

68
src/machine/m_amstrad_pc5x86.c
View File

@@ -1,68 +0,0 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Amstrad PC5086 and PC5286 emulation.
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2025 Miran Grca.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the:
*
* Free Software Foundation, Inc.
* 59 Temple Place - Suite 330
* Boston, MA 02111-1307
* USA.
*/
#include <stdio.h>
#include <stdint.h>
#include <86box/86box.h>
#include "cpu.h"
#include <86box/device.h>
#include <86box/mem.h>
#include <86box/rom.h>
#include <86box/timer.h>
#include <86box/chipset.h>
#include <86box/machine.h>
#include <86box/nvr.h>
#include <86box/keyboard.h>
#include <86box/sio.h>
int
machine_pc5086_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/pc5086/sys_rom.bin",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_common_init(model);
device_add(&ct_82c100_device);
device_add(&f82c710_pc5086_device);
device_add(&kbc_xt_device);
device_add(&amstrad_megapc_nvr_device); /* NVR that is initialized to all 0x00's. */
return ret;
}

410
src/machine/m_at.c
View File

@@ -1,410 +0,0 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Standard PC/AT implementation.
*
*
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
* Sarah Walker, <https://pcem-emulator.co.uk/>
* Jasmine Iwanek, <jriwanek@gmail.com>
*
* Copyright 2017-2020 Fred N. van Kempen.
* Copyright 2016-2020 Miran Grca.
* Copyright 2008-2020 Sarah Walker.
* Copyright 2025 Jasmine Iwanek.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the:
*
* Free Software Foundation, Inc.
* 59 Temple Place - Suite 330
* Boston, MA 02111-1307
* USA.
*/
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <wchar.h>
#include <86box/86box.h>
#include <86box/timer.h>
#include <86box/pic.h>
#include <86box/pit.h>
#include <86box/dma.h>
#include <86box/mem.h>
#include <86box/device.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/fdc_ext.h>
#include <86box/nvr.h>
#include <86box/gameport.h>
#include <86box/ibm_5161.h>
#include <86box/keyboard.h>
#include <86box/lpt.h>
#include <86box/rom.h>
#include <86box/hdc.h>
#include <86box/port_6x.h>
#include <86box/machine.h>
void
machine_at_common_init_ex(const machine_t *model, int type)
{
machine_common_init(model);
refresh_at_enable = 1;
pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_at);
pic2_init();
dma16_init();
if (!(type & 4))
device_add(&port_6x_device);
type &= 3;
if (type == 1)
device_add(&ibmat_nvr_device);
else if (type == 0)
device_add(&at_nvr_device);
standalone_gameport_type = &gameport_device;
}
void
machine_at_common_init(const machine_t *model)
{
machine_at_common_init_ex(model, 0);
}
void
machine_at_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&kbc_at_device);
}
static void
machine_at_ibm_common_init(const machine_t *model)
{
machine_at_common_init_ex(model, 1);
device_add(&kbc_at_device);
mem_remap_top(384);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
}
void
machine_at_ps2_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&kbc_ps2_device);
}
void
machine_at_common_ide_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&ide_isa_device);
}
void
machine_at_ibm_common_ide_init(const machine_t *model)
{
machine_at_common_init_ex(model, 1);
device_add(&ide_isa_device);
}
void
machine_at_ide_init(const machine_t *model)
{
machine_at_init(model);
device_add(&ide_isa_device);
}
void
machine_at_ps2_ide_init(const machine_t *model)
{
machine_at_ps2_init(model);
device_add(&ide_isa_device);
}
static const device_config_t ibmat_config[] = {
// clang-format off
{
.name = "bios",
.description = "BIOS Version",
.type = CONFIG_BIOS,
.default_string = "ibm5170_111585",
.default_int = 0,
.file_filter = "",
.spinner = { 0 },
.bios = {
{
.name = "62X082x (11/15/85)",
.internal_name = "ibm5170_111585",
.bios_type = BIOS_NORMAL,
.files_no = 2,
.local = 0,
.size = 65536,
.files = { "roms/machines/ibmat/BIOS_5170_15NOV85_U27.BIN", "roms/machines/ibmat/BIOS_5170_15NOV85_U47.BIN", "" }
},
{
.name = "61X9266 (11/15/85) (Alt)",
.internal_name = "ibm5170_111585_alt",
.bios_type = BIOS_NORMAL,
.files_no = 2,
.local = 0,
.size = 65536,
.files = { "roms/machines/ibmat/BIOS_5170_15NOV85_U27_61X9266.BIN", "roms/machines/ibmat/BIOS_5170_15NOV85_U47_61X9265.BIN", "" }
},
{
.name = "648009x (06/10/85)",
.internal_name = "ibm5170_061085",
.bios_type = BIOS_NORMAL,
.files_no = 2,
.local = 0,
.size = 65536,
.files = { "roms/machines/ibmat/BIOS_5170_10JUN85_U27.BIN", "roms/machines/ibmat/BIOS_5170_10JUN85_U47.BIN", "" }
},
{
.name = "618102x (01/10/84)",
.internal_name = "ibm5170_011084",
.bios_type = BIOS_NORMAL,
.files_no = 2,
.local = 0,
.size = 65536,
.files = { "roms/machines/ibmat/BIOS_5170_10JAN84_U27.BIN", "roms/machines/ibmat/BIOS_5170_10JAN84_U47.BIN", "" }
},
// The following are Diagnostic ROMs.
{
.name = "Supersoft Diagnostics",
.internal_name = "diag_supersoft",
.bios_type = BIOS_NORMAL,
.files_no = 2,
.local = 2,
.size = 65536,
.files = { "roms/machines/diagnostic/5170_EVEN_LOW_U27_27256.bin", "roms/machines/diagnostic/5170_ODD_HIGH_U47_27256.bin", "" }
},
{ .files_no = 0 }
},
},
{
.name = "enable_5161",
.description = "IBM 5161 Expansion Unit",
.type = CONFIG_BINARY,
.default_int = 0
},
{ .name = "", .description = "", .type = CONFIG_END }
// clang-format on
};
const device_t ibmat_device = {
.name = "IBM AT",
.internal_name = "ibmat_device",
.flags = 0,
.local = 0,
.init = NULL,
.close = NULL,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = ibmat_config
};
int
machine_at_ibm_init(const machine_t *model)
{
int ret = 0;
uint8_t enable_5161;
const char *fn[2];
/* No ROMs available. */
if (!device_available(model->device))
return ret;
device_context(model->device);
enable_5161 = machine_get_config_int("enable_5161");
fn[0] = device_get_bios_file(model->device, device_get_config_bios("bios"), 0);
fn[1] = device_get_bios_file(model->device, device_get_config_bios("bios"), 1);
ret = bios_load_interleaved(fn[0], fn[1], 0x000f0000, 65536, 0);
device_context_restore();
if (bios_only || !ret)
return ret;
machine_at_ibm_common_init(model);
if (enable_5161)
device_add(&ibm_5161_device);
return ret;
}
/* IBM AT machines with custom BIOSes */
int
machine_at_ibmatquadtel_init(const machine_t *model)
{
int ret;
ret = bios_load_interleaved("roms/machines/ibmatquadtel/BIOS_30MAR90_U27_QUADTEL_ENH_286_BIOS_3.05.01_27256.BIN",
"roms/machines/ibmatquadtel/BIOS_30MAR90_U47_QUADTEL_ENH_286_BIOS_3.05.01_27256.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_ibm_common_init(model);
return ret;
}
int
machine_at_ibmatami_init(const machine_t *model)
{
int ret;
ret = bios_load_interleaved("roms/machines/ibmatami/BIOS_5170_30APR89_U27_AMI_27256.BIN",
"roms/machines/ibmatami/BIOS_5170_30APR89_U47_AMI_27256.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_ibm_common_init(model);
return ret;
}
int
machine_at_ibmatpx_init(const machine_t *model)
{
int ret;
ret = bios_load_interleaved("roms/machines/ibmatpx/BIOS ROM - PhoenixBIOS A286 - Version 1.01 - Even.bin",
"roms/machines/ibmatpx/BIOS ROM - PhoenixBIOS A286 - Version 1.01 - Odd.bin",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_ibm_common_init(model);
return ret;
}
static const device_config_t ibmxt286_config[] = {
// clang-format off
{
.name = "enable_5161",
.description = "IBM 5161 Expansion Unit",
.type = CONFIG_BINARY,
.default_int = 0
},
{ .name = "", .description = "", .type = CONFIG_END }
// clang-format on
};
const device_t ibmxt286_device = {
.name = "IBM XT Model 286",
.internal_name = "ibmxt286_device",
.flags = 0,
.local = 0,
.init = NULL,
.close = NULL,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = ibmxt286_config
};
int
machine_at_ibmxt286_init(const machine_t *model)
{
int ret;
uint8_t enable_5161;
device_context(model->device);
enable_5161 = machine_get_config_int("enable_5161");
device_context_restore();
ret = bios_load_interleaved("roms/machines/ibmxt286/bios_5162_21apr86_u34_78x7460_27256.bin",
"roms/machines/ibmxt286/bios_5162_21apr86_u35_78x7461_27256.bin",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_ibm_common_init(model);
if (enable_5161)
device_add(&ibm_5161_device);
return ret;
}
int
machine_at_pb286_init(const machine_t *model)
{
int ret;
ret = bios_load_interleaved("roms/machines/pb286/LB_V332P.BIN",
"roms/machines/pb286/HB_V332P.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_ibm_common_init(model);
return ret;
}
int
machine_at_siemens_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/siemens/286BIOS.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 1);
device_add(&kbc_at_siemens_device);
mem_remap_top(384);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}

375
src/machine/m_at_286.c
View File

@@ -33,6 +33,7 @@
#include <86box/fdc.h>
#include <86box/fdc_ext.h>
#include <86box/hdc.h>
#include <86box/ibm_5161.h>
#include <86box/nvr.h>
#include <86box/port_6x.h>
#define USE_SIO_DETECT
@@ -40,10 +41,310 @@
#include <86box/serial.h>
#include <86box/video.h>
#include <86box/vid_cga.h>
#include <86box/vid_cga_comp.h>
#include <86box/flash.h>
#include <86box/machine.h>
/* ISA */
static const device_config_t ibmat_config[] = {
// clang-format off
{
.name = "bios",
.description = "BIOS Version",
.type = CONFIG_BIOS,
.default_string = "ibm5170_111585",
.default_int = 0,
.file_filter = "",
.spinner = { 0 },
.bios = {
{
.name = "62X082x (11/15/85)",
.internal_name = "ibm5170_111585",
.bios_type = BIOS_NORMAL,
.files_no = 2,
.local = 0,
.size = 65536,
.files = { "roms/machines/ibmat/BIOS_5170_15NOV85_U27.BIN", "roms/machines/ibmat/BIOS_5170_15NOV85_U47.BIN", "" }
},
{
.name = "61X9266 (11/15/85) (Alt)",
.internal_name = "ibm5170_111585_alt",
.bios_type = BIOS_NORMAL,
.files_no = 2,
.local = 0,
.size = 65536,
.files = { "roms/machines/ibmat/BIOS_5170_15NOV85_U27_61X9266.BIN", "roms/machines/ibmat/BIOS_5170_15NOV85_U47_61X9265.BIN", "" }
},
{
.name = "648009x (06/10/85)",
.internal_name = "ibm5170_061085",
.bios_type = BIOS_NORMAL,
.files_no = 2,
.local = 0,
.size = 65536,
.files = { "roms/machines/ibmat/BIOS_5170_10JUN85_U27.BIN", "roms/machines/ibmat/BIOS_5170_10JUN85_U47.BIN", "" }
},
{
.name = "618102x (01/10/84)",
.internal_name = "ibm5170_011084",
.bios_type = BIOS_NORMAL,
.files_no = 2,
.local = 0,
.size = 65536,
.files = { "roms/machines/ibmat/BIOS_5170_10JAN84_U27.BIN", "roms/machines/ibmat/BIOS_5170_10JAN84_U47.BIN", "" }
},
// The following are Diagnostic ROMs.
{
.name = "Supersoft Diagnostics",
.internal_name = "diag_supersoft",
.bios_type = BIOS_NORMAL,
.files_no = 2,
.local = 2,
.size = 65536,
.files = { "roms/machines/diagnostic/5170_EVEN_LOW_U27_27256.bin", "roms/machines/diagnostic/5170_ODD_HIGH_U47_27256.bin", "" }
},
{ .files_no = 0 }
},
},
{
.name = "enable_5161",
.description = "IBM 5161 Expansion Unit",
.type = CONFIG_BINARY,
.default_int = 0
},
{ .name = "", .description = "", .type = CONFIG_END }
// clang-format on
};
const device_t ibmat_device = {
.name = "IBM AT",
.internal_name = "ibmat_device",
.flags = 0,
.local = 0,
.init = NULL,
.close = NULL,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = ibmat_config
};
static void
machine_at_ibm_common_init(const machine_t *model)
{
machine_at_common_init_ex(model, 1);
device_add(&kbc_at_device);
mem_remap_top(384);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
}
int
machine_at_ibmat_init(const machine_t *model)
{
int ret = 0;
uint8_t enable_5161;
const char *fn[2];
/* No ROMs available. */
if (!device_available(model->device))
return ret;
device_context(model->device);
enable_5161 = machine_get_config_int("enable_5161");
fn[0] = device_get_bios_file(model->device, device_get_config_bios("bios"), 0);
fn[1] = device_get_bios_file(model->device, device_get_config_bios("bios"), 1);
ret = bios_load_interleaved(fn[0], fn[1], 0x000f0000, 65536, 0);
device_context_restore();
if (bios_only || !ret)
return ret;
machine_at_ibm_common_init(model);
if (enable_5161)
device_add(&ibm_5161_device);
return ret;
}
static const device_config_t ibmxt286_config[] = {
// clang-format off
{
.name = "enable_5161",
.description = "IBM 5161 Expansion Unit",
.type = CONFIG_BINARY,
.default_int = 0
},
{ .name = "", .description = "", .type = CONFIG_END }
// clang-format on
};
const device_t ibmxt286_device = {
.name = "IBM XT Model 286",
.internal_name = "ibmxt286_device",
.flags = 0,
.local = 0,
.init = NULL,
.close = NULL,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = ibmxt286_config
};
int
machine_at_ibmxt286_init(const machine_t *model)
{
int ret;
uint8_t enable_5161;
device_context(model->device);
enable_5161 = machine_get_config_int("enable_5161");
device_context_restore();
ret = bios_load_interleaved("roms/machines/ibmxt286/bios_5162_21apr86_u34_78x7460_27256.bin",
"roms/machines/ibmxt286/bios_5162_21apr86_u35_78x7461_27256.bin",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_ibm_common_init(model);
if (enable_5161)
device_add(&ibm_5161_device);
return ret;
}
int
machine_at_ibmatami_init(const machine_t *model)
{
int ret;
ret = bios_load_interleaved("roms/machines/ibmatami/BIOS_5170_30APR89_U27_AMI_27256.BIN",
"roms/machines/ibmatami/BIOS_5170_30APR89_U47_AMI_27256.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_ibm_common_init(model);
return ret;
}
int
machine_at_cmdpc_init(const machine_t *model)
{
int ret;
ret = bios_load_interleaved("roms/machines/cmdpc30/commodore pc 30 iii even.bin",
"roms/machines/cmdpc30/commodore pc 30 iii odd.bin",
0x000f8000, 32768, 0);
if (bios_only || !ret)
return ret;
machine_at_init(model);
mem_remap_top(384);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
device_add(&cbm_io_device);
return ret;
}
int
machine_at_portableii_init(const machine_t *model)
{
int ret;
ret = bios_load_interleavedr("roms/machines/portableii/109740-001.rom",
"roms/machines/portableii/109739-001.rom",
0x000f8000, 65536, 0);
if (bios_only || !ret)
return ret;
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
video_reset(gfxcard[0]);
device_add(&compaq_device);
machine_at_common_init(model);
device_add(&kbc_at_compaq_device);
return ret;
}
int
machine_at_portableiii_init(const machine_t *model)
{
int ret;
ret = bios_load_linearr("roms/machines/portableiii/K Combined.bin",
0x000f8000, 65536, 0);
if (bios_only || !ret)
return ret;
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
video_reset(gfxcard[0]);
if (hdc_current[0] == HDC_INTERNAL)
device_add(&ide_isa_device);
if (gfxcard[0] == VID_INTERNAL)
device_add(&compaq_plasma_device);
device_add(&compaq_device);
machine_at_common_init(model);
device_add(&kbc_at_compaq_device);
return ret;
}
int
machine_at_grid1520_init(const machine_t *model) {
int ret = 0;
ret = bios_load_linear("roms/machines/grid1520/grid1520_891025.rom",
0x000f8000, 0x8000, 0);
if (bios_only || !ret)
return ret;
machine_at_common_ide_init(model);
mem_remap_top(384);
device_add(&kbc_at_device);
// for now just select CGA with amber monitor
//device_add(&cga_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
device_add(&grid1520_device);
return ret;
}
int
machine_at_mr286_init(const machine_t *model)
{
@@ -115,6 +416,80 @@ machine_at_m290_init(const machine_t *model)
return ret;
}
int
machine_at_ibmatpx_init(const machine_t *model)
{
int ret;
ret = bios_load_interleaved("roms/machines/ibmatpx/BIOS ROM - PhoenixBIOS A286 - Version 1.01 - Even.bin",
"roms/machines/ibmatpx/BIOS ROM - PhoenixBIOS A286 - Version 1.01 - Odd.bin",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_ibm_common_init(model);
return ret;
}
int
machine_at_ibmatquadtel_init(const machine_t *model)
{
int ret;
ret = bios_load_interleaved("roms/machines/ibmatquadtel/BIOS_30MAR90_U27_QUADTEL_ENH_286_BIOS_3.05.01_27256.BIN",
"roms/machines/ibmatquadtel/BIOS_30MAR90_U47_QUADTEL_ENH_286_BIOS_3.05.01_27256.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_ibm_common_init(model);
return ret;
}
int
machine_at_pb286_init(const machine_t *model)
{
int ret;
ret = bios_load_interleaved("roms/machines/pb286/LB_V332P.BIN",
"roms/machines/pb286/HB_V332P.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_ibm_common_init(model);
return ret;
}
int
machine_at_siemens_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/siemens/286BIOS.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 1);
device_add(&kbc_at_siemens_device);
mem_remap_top(384);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
/* C&T PC/AT */
static void
machine_at_ctat_common_init(const machine_t *model)

372
src/machine/m_at_386dx.c Normal file
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@@ -0,0 +1,372 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of 386DX machines.
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2025 Miran Grca.
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/io.h>
#include <86box/device.h>
#include <86box/chipset.h>
#include <86box/keyboard.h>
#include <86box/mem.h>
#include <86box/nvr.h>
#include <86box/pci.h>
#include <86box/dma.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/fdc_ext.h>
#include <86box/gameport.h>
#include <86box/pic.h>
#include <86box/pit.h>
#include <86box/rom.h>
#include <86box/sio.h>
#include <86box/hdc.h>
#include <86box/port_6x.h>
#include <86box/port_92.h>
#include <86box/video.h>
#include <86box/vid_cga.h>
#include <86box/vid_cga_comp.h>
#include <86box/flash.h>
#include <86box/scsi_ncr53c8xx.h>
#include <86box/hwm.h>
#include <86box/machine.h>
#include <86box/plat_unused.h>
#include <86box/sound.h>
/* ISA */
static void
machine_at_deskpro386_common_init(const machine_t *model)
{
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
video_reset(gfxcard[0]);
device_add(&compaq_386_device);
machine_at_common_init(model);
device_add(&kbc_at_compaq_device);
}
int
machine_at_deskpro386_init(const machine_t *model)
{
int ret;
ret = bios_load_linearr("roms/machines/deskpro386/1986-09-04-HI.json.bin",
0x000f8000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_deskpro386_common_init(model);
return ret;
}
int
machine_at_deskpro386_05_1988_init(const machine_t *model)
{
int ret;
ret = bios_load_linearr("roms/machines/deskpro386/1988-05-10.json.bin",
0x000f8000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_deskpro386_common_init(model);
return ret;
}
int
machine_at_portableiii386_init(const machine_t *model)
{
int ret;
ret = bios_load_linearr("roms/machines/portableiii/P.2 Combined.bin",
0x000f0000, 131072, 0);
if (bios_only || !ret)
return ret;
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
video_reset(gfxcard[0]);
if (hdc_current[0] == HDC_INTERNAL)
device_add(&ide_isa_device);
if (gfxcard[0] == VID_INTERNAL)
device_add(&compaq_plasma_device);
device_add(&compaq_386_device);
machine_at_common_init(model);
device_add(&kbc_at_compaq_device);
return ret;
}
int
machine_at_micronics386_init(const machine_t *model)
{
int ret;
ret = bios_load_interleaved("roms/machines/micronics386/386-Micronics-09-00021-EVEN.BIN",
"roms/machines/micronics386/386-Micronics-09-00021-ODD.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_init(model);
device_add(&port_92_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
int
machine_at_micronics386px_init(const machine_t *model)
{
int ret;
ret = bios_load_interleaved("roms/machines/micronics386/386-Micronics-09-00021-LO.BIN",
"roms/machines/micronics386/386-Micronics-09-00021-HI.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_init(model);
device_add(&port_92_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
/* ACC 2168 */
int
machine_at_acc386_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/acc386/acc386.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&acc2168_device);
device_add(&kbc_at_ami_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
/* C&T 386/AT */
int
machine_at_ecs386_init(const machine_t *model)
{
int ret;
ret = bios_load_interleaved("roms/machines/ecs386/AMI BIOS for ECS-386_32 motherboard - L chip.bin",
"roms/machines/ecs386/AMI BIOS for ECS-386_32 motherboard - H chip.bin",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&cs8230_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
device_add(&kbc_at_ami_device);
return ret;
}
int
machine_at_spc6000a_init(const machine_t *model)
{
int ret;
ret = bios_load_interleaved("roms/machines/spc6000a/3c80.u27",
"roms/machines/spc6000a/9f80.u26",
0x000f8000, 32768, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 1);
device_add(&cs8230_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
device_add(&kbc_at_ami_device);
return ret;
}
int
machine_at_tandy4000_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/tandy4000/BIOS Tandy 4000 v1.03.01.bin",
0x000f8000, 32768, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&cs8230_device);
device_add(&kbc_at_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
/* ALi M1429 */
int
machine_at_ecs386v_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/ecs386v/PANDA_386V.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&ali1429_device);
device_add(&kbc_ps2_intel_ami_pci_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
/* OPTi 391 */
int
machine_at_dataexpert386wb_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/dataexpert386wb/st0386-wb-ver2-0-618f078c738cb397184464.bin",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&opti391_device);
device_add(&kbc_at_ami_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
/* OPTi 495SLC */
int
machine_at_opti495_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/award495/opt495s.awa",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&opti495slc_device);
device_add(&kbc_at_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
/* SiS 310 */
int
machine_at_asus3863364k_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/asus3863364k/am27c512dip28-64b53c26be3d8160533563.bin",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&rabbit_device);
device_add(&kbc_at_ami_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
int
machine_at_asus386_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/asus386/ASUS_ISA-386C_BIOS.bin",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&rabbit_device);
device_add(&kbc_at_ami_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}

2850
src/machine/m_at_386dx_486.c
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210
src/machine/m_at_486_misc.c Normal file
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@@ -0,0 +1,210 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of 486 Miscellaneous machines.
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2025 Miran Grca.
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/io.h>
#include <86box/device.h>
#include <86box/chipset.h>
#include <86box/keyboard.h>
#include <86box/mem.h>
#include <86box/nvr.h>
#include <86box/pci.h>
#include <86box/dma.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/fdc_ext.h>
#include <86box/gameport.h>
#include <86box/pic.h>
#include <86box/pit.h>
#include <86box/rom.h>
#include <86box/sio.h>
#include <86box/hdc.h>
#include <86box/port_6x.h>
#include <86box/port_92.h>
#include <86box/video.h>
#include <86box/flash.h>
#include <86box/scsi_ncr53c8xx.h>
#include <86box/hwm.h>
#include <86box/machine.h>
#include <86box/plat_unused.h>
#include <86box/sound.h>
/* STPC Client */
int
machine_at_itoxstar_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/itoxstar/STARA.ROM",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x0B, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0C, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x1F, PCI_CARD_NORMAL, 1, 2, 3, 4);
device_add_params(&w83977_device, (void *) (W83977F | W83977_AMI));
device_add(&stpc_client_device);
device_add(&sst_flash_29ee020_device);
device_add(&w83781d_device); /* fans: Chassis, CPU, unused; temperatures: Chassis, CPU, unused */
hwm_values.fans[2] = 0; /* unused */
hwm_values.temperatures[2] = 0; /* unused */
hwm_values.voltages[0] = 0; /* Vcore unused */
return ret;
}
/* STPC Consumer-II */
int
machine_at_arb1423c_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/arb1423c/A1423C.v12",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x0B, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0C, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x1F, PCI_CARD_NORMAL, 1, 0, 0, 0);
pci_register_slot(0x1E, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x1D, PCI_CARD_NORMAL, 3, 4, 1, 2);
device_add_params(&w83977_device, (void *) (W83977F | W83977_AMI));
device_add(&stpc_consumer2_device);
device_add(&winbond_flash_w29c020_device);
return ret;
}
int
machine_at_arb1479_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/arb1479/1479A.rom",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x0B, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0C, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x1F, PCI_CARD_NORMAL, 1, 0, 0, 0);
pci_register_slot(0x1E, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x1D, PCI_CARD_NORMAL, 3, 4, 1, 2);
device_add_params(&w83977_device, (void *) (W83977F | W83977_AMI));
device_add(&stpc_consumer2_device);
device_add(&winbond_flash_w29c020_device);
return ret;
}
int
machine_at_iach488_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/iach488/FH48800B.980",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x0B, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0C, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
device_add_params(&w83977_device, (void *) (W83977F | W83977_AMI));
device_add(&stpc_consumer2_device);
device_add(&sst_flash_29ee020_device);
return ret;
}
/* STPC Elite */
int
machine_at_pcm9340_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/pcm9340/9340v110.bin",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x0B, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0C, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x1D, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x1E, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x1F, PCI_CARD_NORMAL, 2, 3, 4, 1);
device_add_inst_params(&w83977_device, 1, (void *) (W83977F | W83977_AMI));
device_add_inst_params(&w83977_device, 2, (void *) W83977F);
device_add(&stpc_elite_device);
device_add(&sst_flash_29ee020_device);
return ret;
}
/* STPC Atlas */
int
machine_at_pcm5330_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/pcm5330/5330_13b.bin",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x0B, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0C, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0D, PCI_CARD_SOUTHBRIDGE_IDE, 0, 0, 0, 0);
pci_register_slot(0x0E, PCI_CARD_SOUTHBRIDGE_USB, 1, 2, 3, 4);
pci_register_slot(0x13, PCI_CARD_NORMAL, 1, 2, 3, 4);
device_add(&stpc_serial_device);
device_add_params(&w83977_device, (void *) (W83977F | W83977_370 | W83977_AMI));
device_add(&stpc_atlas_device);
device_add(&sst_flash_29ee020_device);
return ret;
}

72
src/machine/m_at_486slc.c Normal file
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@@ -0,0 +1,72 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of 486SLC machines.
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2025 Miran Grca.
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/io.h>
#include <86box/device.h>
#include <86box/chipset.h>
#include <86box/keyboard.h>
#include <86box/mem.h>
#include <86box/nvr.h>
#include <86box/pci.h>
#include <86box/dma.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/fdc_ext.h>
#include <86box/gameport.h>
#include <86box/pic.h>
#include <86box/pit.h>
#include <86box/rom.h>
#include <86box/sio.h>
#include <86box/hdc.h>
#include <86box/port_6x.h>
#include <86box/port_92.h>
#include <86box/video.h>
#include <86box/flash.h>
#include <86box/scsi_ncr53c8xx.h>
#include <86box/hwm.h>
#include <86box/machine.h>
#include <86box/plat_unused.h>
#include <86box/sound.h>
/* OPTi 283 */
int
machine_at_rycleopardlx_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/rycleopardlx/486-RYC-Leopard-LX.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&opti283_device);
device_add(&kbc_at_ami_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}

127
src/machine/m_at_commodore.c
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@@ -1,127 +0,0 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of the Commodore PC3 system.
*
*
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
* Sarah Walker, <https://pcem-emulator.co.uk/>
*
* Copyright 2017-2018 Fred N. van Kempen.
* Copyright 2016-2018 Miran Grca.
* Copyright 2008-2018 Sarah Walker.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the:
*
* Free Software Foundation, Inc.
* 59 Temple Place - Suite 330
* Boston, MA 02111-1307
* USA.
*/
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <wchar.h>
#include <86box/86box.h>
#include <86box/device.h>
#include <86box/timer.h>
#include <86box/io.h>
#include <86box/mem.h>
#include <86box/fdc_ext.h>
#include <86box/lpt.h>
#include <86box/rom.h>
#include <86box/serial.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/machine.h>
#include <86box/plat_unused.h>
static serial_t *cmd_uart;
static lpt_t *cmd_lpt;
static void
cbm_io_write(UNUSED(uint16_t port), uint8_t val, UNUSED(void *priv))
{
lpt_port_remove(cmd_lpt);
switch (val & 3) {
case 1:
lpt_port_setup(cmd_lpt, LPT_MDA_ADDR);
break;
case 2:
lpt_port_setup(cmd_lpt, LPT1_ADDR);
break;
case 3:
lpt_port_setup(cmd_lpt, LPT2_ADDR);
break;
default:
break;
}
switch (val & 0xc) {
case 0x4:
serial_setup(cmd_uart, COM2_ADDR, COM2_IRQ);
break;
case 0x8:
serial_setup(cmd_uart, COM1_ADDR, COM1_IRQ);
break;
default:
break;
}
}
static void
cbm_io_init(void)
{
io_sethandler(0x0230, 0x0001, NULL, NULL, NULL, cbm_io_write, NULL, NULL, NULL);
}
int
machine_at_cmdpc_init(const machine_t *model)
{
int ret;
ret = bios_load_interleaved("roms/machines/cmdpc30/commodore pc 30 iii even.bin",
"roms/machines/cmdpc30/commodore pc 30 iii odd.bin",
0x000f8000, 32768, 0);
if (bios_only || !ret)
return ret;
machine_at_init(model);
mem_remap_top(384);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
cmd_uart = device_add(&ns8250_device);
serial_set_next_inst(1);
cmd_lpt = device_add(&lpt_port_device);
lpt_set_next_inst(1);
cbm_io_init();
return ret;
}

139
src/machine/m_at_common.c Normal file
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/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of the common initialization functions for
* the PC/AT and copatible machines.
*
* Authors: Miran Grca, <mgrca8@gmail.com>
* Sarah Walker, <https://pcem-emulator.co.uk/>
* Jasmine Iwanek, <jriwanek@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>
*
* Copyright 2016-2025 Miran Grca.
* Copyright 2008-2025 Sarah Walker.
* Copyright 2025 Jasmine Iwanek.
* Copyright 2017-2025 Fred N. van Kempen.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the:
*
* Free Software Foundation, Inc.
* 59 Temple Place - Suite 330
* Boston, MA 02111-1307
* USA.
*/
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <wchar.h>
#include <86box/86box.h>
#include <86box/timer.h>
#include <86box/pic.h>
#include <86box/pit.h>
#include <86box/dma.h>
#include <86box/mem.h>
#include <86box/device.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/fdc_ext.h>
#include <86box/nvr.h>
#include <86box/gameport.h>
#include <86box/keyboard.h>
#include <86box/lpt.h>
#include <86box/rom.h>
#include <86box/hdc.h>
#include <86box/port_6x.h>
#include <86box/machine.h>
void
machine_at_common_init_ex(const machine_t *model, int type)
{
machine_common_init(model);
refresh_at_enable = 1;
pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_at);
pic2_init();
dma16_init();
if (!(type & 4))
device_add(&port_6x_device);
type &= 3;
if (type == 1)
device_add(&ibmat_nvr_device);
else if (type == 0)
device_add(&at_nvr_device);
standalone_gameport_type = &gameport_device;
}
void
machine_at_common_init(const machine_t *model)
{
machine_at_common_init_ex(model, 0);
}
void
machine_at_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&kbc_at_device);
}
void
machine_at_ps2_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&kbc_ps2_device);
}
void
machine_at_common_ide_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&ide_isa_device);
}
void
machine_at_ibm_common_ide_init(const machine_t *model)
{
machine_at_common_init_ex(model, 1);
device_add(&ide_isa_device);
}
void
machine_at_ide_init(const machine_t *model)
{
machine_at_init(model);
device_add(&ide_isa_device);
}
void
machine_at_ps2_ide_init(const machine_t *model)
{
machine_at_ps2_init(model);
device_add(&ide_isa_device);
}

251
src/machine/m_at_compaq.c
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@@ -1,251 +0,0 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Emulation of various Compaq PC's.
*
*
*
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* TheCollector1995, <mariogplayer@gmail.com>
*
* Copyright 2008-2018 Sarah Walker.
* Copyright 2016-2018 Miran Grca.
*/
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#include <math.h>
#include <86box/86box.h>
#include "cpu.h"
#include <86box/io.h>
#include <86box/timer.h>
#include <86box/pit.h>
#include <86box/mem.h>
#include <86box/rom.h>
#include <86box/device.h>
#include <86box/chipset.h>
#include <86box/keyboard.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/fdc_ext.h>
#include <86box/hdc.h>
#include <86box/hdc_ide.h>
#include <86box/machine.h>
#include <86box/video.h>
#include <86box/vid_cga.h>
#include <86box/vid_cga_comp.h>
#include <86box/plat_unused.h>
enum {
COMPAQ_PORTABLEII = 0,
COMPAQ_PORTABLEIII,
COMPAQ_PORTABLEIII386,
COMPAQ_DESKPRO386,
COMPAQ_DESKPRO386_05_1988
};
static int compaq_machine_type = 0;
/* Compaq Deskpro 386 remaps RAM from 0xA0000-0xFFFFF to 0xFA0000-0xFFFFFF */
static mem_mapping_t ram_mapping;
static uint8_t
read_ram(uint32_t addr, UNUSED(void *priv))
{
addr = (addr & 0x7ffff) + 0x80000;
addreadlookup(mem_logical_addr, addr);
return (ram[addr]);
}
static uint16_t
read_ramw(uint32_t addr, UNUSED(void *priv))
{
addr = (addr & 0x7ffff) + 0x80000;
addreadlookup(mem_logical_addr, addr);
return (*(uint16_t *) &ram[addr]);
}
static uint32_t
read_raml(uint32_t addr, UNUSED(void *priv))
{
addr = (addr & 0x7ffff) + 0x80000;
addreadlookup(mem_logical_addr, addr);
return (*(uint32_t *) &ram[addr]);
}
static void
write_ram(uint32_t addr, uint8_t val, UNUSED(void *priv))
{
addr = (addr & 0x7ffff) + 0x80000;
addwritelookup(mem_logical_addr, addr);
mem_write_ramb_page(addr, val, &pages[addr >> 12]);
}
static void
write_ramw(uint32_t addr, uint16_t val, UNUSED(void *priv))
{
addr = (addr & 0x7ffff) + 0x80000;
addwritelookup(mem_logical_addr, addr);
mem_write_ramw_page(addr, val, &pages[addr >> 12]);
}
static void
write_raml(uint32_t addr, uint32_t val, UNUSED(void *priv))
{
addr = (addr & 0x7ffff) + 0x80000;
addwritelookup(mem_logical_addr, addr);
mem_write_raml_page(addr, val, &pages[addr >> 12]);
}
static void
machine_at_compaq_init(const machine_t *model, int type)
{
compaq_machine_type = type;
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
if (type < COMPAQ_PORTABLEIII386) {
mem_remap_top(384);
mem_mapping_add(&ram_mapping, 0xfa0000, 0x60000,
read_ram, read_ramw, read_raml,
write_ram, write_ramw, write_raml,
0xa0000 + ram, MEM_MAPPING_INTERNAL, NULL);
}
video_reset(gfxcard[0]);
switch (type) {
case COMPAQ_PORTABLEII:
machine_at_common_init(model);
device_add(&kbc_at_compaq_device);
break;
case COMPAQ_PORTABLEIII:
if (hdc_current[0] == HDC_INTERNAL)
device_add(&ide_isa_device);
if (gfxcard[0] == VID_INTERNAL)
device_add(&compaq_plasma_device);
machine_at_common_init(model);
device_add(&kbc_at_compaq_device);
break;
case COMPAQ_PORTABLEIII386:
if (hdc_current[0] == HDC_INTERNAL)
device_add(&ide_isa_device);
if (gfxcard[0] == VID_INTERNAL)
device_add(&compaq_plasma_device);
device_add(&compaq_386_device);
machine_at_common_init(model);
device_add(&kbc_at_compaq_device);
break;
case COMPAQ_DESKPRO386:
case COMPAQ_DESKPRO386_05_1988:
device_add(&compaq_386_device);
machine_at_common_init(model);
device_add(&kbc_at_compaq_device);
break;
default:
break;
}
}
int
machine_at_portableii_init(const machine_t *model)
{
int ret;
ret = bios_load_interleavedr("roms/machines/portableii/109740-001.rom",
"roms/machines/portableii/109739-001.rom",
0x000f8000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_compaq_init(model, COMPAQ_PORTABLEII);
return ret;
}
int
machine_at_portableiii_init(const machine_t *model)
{
int ret;
ret = bios_load_linearr("roms/machines/portableiii/K Combined.bin",
0x000f8000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_compaq_init(model, COMPAQ_PORTABLEIII);
return ret;
}
int
machine_at_portableiii386_init(const machine_t *model)
{
int ret;
ret = bios_load_linearr("roms/machines/portableiii/P.2 Combined.bin",
0x000f0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_compaq_init(model, COMPAQ_PORTABLEIII386);
return ret;
}
int
machine_at_deskpro386_init(const machine_t *model)
{
int ret;
ret = bios_load_linearr("roms/machines/deskpro386/1986-09-04-HI.json.bin",
0x000f8000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_compaq_init(model, COMPAQ_DESKPRO386);
return ret;
}
int
machine_at_deskpro386_05_1988_init(const machine_t *model)
{
int ret;
ret = bios_load_linearr("roms/machines/deskpro386/1988-05-10.json.bin",
0x000f8000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_compaq_init(model, COMPAQ_DESKPRO386_05_1988);
return ret;
}

355
src/machine/m_at_grid.c
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@@ -1,355 +0,0 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of the GRiD GRiDcase 1520
*
* The GRiDcase 1520 is a 286-based portable.
* These are HDDs supported by GRiD1520 (and probably other 15XX) BIOS
* "CP3022",5
* "CP3024",5, 615,4,17 BIOS table type 2
* "CP344",6,
* "CP3044",9, 980,5,17 BIOS table type 17
* "CP3042",9
* "CP3104",7, 776,8,33 extended type 224 (separate entry outside BIOS table)
* The only way to run unpatched BIOS is to run exactly that (or larger)
* geometry and report model name correctly in response to IDENTYIFY command.
* Alternatively you can use RomBuster to patch the BIOS.
* https://classicbits.net/coding-and-software/my-software/rombuster/
*/
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/device.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/fdc_ext.h>
#include <86box/io.h>
#include <86box/keyboard.h>
#include <86box/machine.h>
#include <86box/mem.h>
#include <86box/rom.h>
#include <86box/vid_cga.h>
#include <86box/plat_unused.h>
#define GRID_APPROM_SELECT 0x440
#define GRID_APPROM_ENABLE 0x405
/*
approm mapping regs?
XXX_7FA equ 7FAh
XXX_7F8 equ 7F8h
XXX_7F9 equ 7F9h
XXX_BD0 equ 0BD0h
XXX_BD1 equ 0BD1h
*/
#define GRID_EMS_PAGE_0 0x0258
#define GRID_EMS_PAGE_1 0x4258
#define GRID_EMS_PAGE_2 0x8258
#define GRID_EMS_PAGE_3 0xC258
#define GRID_TURBO 0x416
#define GRID_UNUSED_424 0x424
#define GRID_426 0x426
#define GRID_HIGH_ENABLE 0xFFF
#define GRID_ROM_SUBSYSTEM 0x6F8
// EMS window
#define GRID_EMS_BASE 0xE0000
#define GRID_EMS_PAGE_SIZE 0x4000
#define GRID_EMS_PAGE_MASK 0x3FFF
#define GRID_EMS_PAGE_SHIFT 14
// physical base of extended memory
#define GRID_EXTENDED_BASE 0xA0000
#define GRID_1M 0x100000
typedef struct {
uint8_t grid_unknown;
uint8_t grid_unused_424;
uint8_t grid_426;
uint8_t grid_high_enable;
uint8_t grid_ems_page[4];
mem_mapping_t grid_ems_mapping[4];
uint8_t grid_turbo;
uint8_t grid_rom_enable;
uint8_t grid_rom_select;
} grid_t;
static uint32_t get_grid_ems_paddr(grid_t *dev, uint32_t addr) {
uint32_t slot = (addr >> GRID_EMS_PAGE_SHIFT) & 0x3;
uint32_t paddr = addr;
if (dev->grid_ems_page[slot] & 0x80)
paddr = GRID_EXTENDED_BASE + ((uint32_t)(dev->grid_ems_page[slot] & 0x7F) << GRID_EMS_PAGE_SHIFT) + (addr & GRID_EMS_PAGE_MASK);
return paddr;
}
static void grid_ems_mem_write8(uint32_t addr, uint8_t val, void *priv) {
grid_t *dev = (grid_t *) priv;
addr = get_grid_ems_paddr(dev, addr);
if (addr < (mem_size << 10))
ram[addr] = val;
}
static uint8_t grid_ems_mem_read8(uint32_t addr, void *priv) {
grid_t *dev = (grid_t *) priv;
uint8_t val = 0xFF;
addr = get_grid_ems_paddr(dev, addr);
if (addr < (mem_size << 10))
val = ram[addr];
return val;
}
static void grid_ems_mem_write16(uint32_t addr, uint16_t val, void *priv) {
grid_t *dev = (grid_t *) priv;
addr = get_grid_ems_paddr(dev, addr);
if (addr < (mem_size << 10))
*(uint16_t *)&(ram[addr]) = val;
}
static uint16_t grid_ems_mem_read16(uint32_t addr, void *priv) {
grid_t *dev = (grid_t *) priv;
uint16_t val = 0xFFFF;
addr = get_grid_ems_paddr(dev, addr);
if (addr < (mem_size << 10))
val = *(uint16_t *)&(ram[addr]);
return val;
}
static void grid_ems_update_mapping(grid_t *dev, uint32_t slot) {
uint32_t vaddr = GRID_EMS_BASE + (slot << GRID_EMS_PAGE_SHIFT);
if (dev->grid_ems_page[slot] & 0x80) {
uint32_t paddr;
mem_mapping_enable(&dev->grid_ems_mapping[slot]);
paddr = get_grid_ems_paddr(dev, vaddr);
mem_mapping_set_exec(&dev->grid_ems_mapping[slot], ram + paddr);
} else {
mem_mapping_disable(&dev->grid_ems_mapping[slot]);
}
}
static void grid_io_write(uint16_t port, uint8_t val, void *priv) {
grid_t *dev = (grid_t *) priv;
switch (port) {
case GRID_426:
dev->grid_426 = val;
break;
case GRID_UNUSED_424:
dev->grid_unused_424 = val;
break;
case GRID_ROM_SUBSYSTEM:
case GRID_ROM_SUBSYSTEM+1:
case GRID_ROM_SUBSYSTEM+2:
case GRID_ROM_SUBSYSTEM+3:
case GRID_ROM_SUBSYSTEM+4:
case GRID_ROM_SUBSYSTEM+5:
case GRID_ROM_SUBSYSTEM+6:
case GRID_ROM_SUBSYSTEM+7:
break;
case GRID_APPROM_SELECT:
dev->grid_rom_select = val;
break;
case GRID_APPROM_ENABLE:
dev->grid_rom_enable = val;
break;
case GRID_TURBO:
if ((dev->grid_turbo ^ val) & 1) {
dev->grid_turbo = val;
if (dev->grid_turbo)
cpu_dynamic_switch(cpu);
else
cpu_dynamic_switch(0); /* 286/6 */
}
break;
case GRID_EMS_PAGE_0:
case GRID_EMS_PAGE_1:
case GRID_EMS_PAGE_2:
case GRID_EMS_PAGE_3: {
uint32_t slot = (port >> 14) & 0x3;
if (dev->grid_ems_page[slot] == val)
break; // no change
dev->grid_ems_page[slot] = val;
if (dev->grid_high_enable & 0x1)
break; // XMS is enabled
grid_ems_update_mapping(dev, slot);
flushmmucache();
break;
}
case GRID_HIGH_ENABLE: {
if (((val ^ dev->grid_high_enable) & 0x1) == 0)
break; // no change
dev->grid_high_enable = val;
if (dev->grid_high_enable & 0x1) {
for (uint8_t i = 0; i < 4; i++)
mem_mapping_disable(&dev->grid_ems_mapping[i]);
mem_mapping_enable(&ram_high_mapping);
} else {
mem_mapping_disable(&ram_high_mapping);
for (uint8_t i = 0; i < 4; i++)
grid_ems_update_mapping(dev, i);
}
flushmmucache();
break;
}
default:
break;
}
}
static uint8_t grid_io_read(uint16_t port, void *priv) {
grid_t *dev = (grid_t *) priv;
switch (port) {
case GRID_426:
return dev->grid_426;
break;
case GRID_UNUSED_424:
return dev->grid_unused_424;
break;
case GRID_ROM_SUBSYSTEM:
return 0x99;
break;
case GRID_ROM_SUBSYSTEM+1:
case GRID_ROM_SUBSYSTEM+2:
case GRID_ROM_SUBSYSTEM+3:
case GRID_ROM_SUBSYSTEM+4:
case GRID_ROM_SUBSYSTEM+5:
case GRID_ROM_SUBSYSTEM+6:
case GRID_ROM_SUBSYSTEM+7:
break;
case GRID_APPROM_SELECT:
return dev->grid_rom_select;
case GRID_APPROM_ENABLE:
return dev->grid_rom_enable;
case GRID_TURBO:
return dev->grid_turbo;
case GRID_HIGH_ENABLE:
return dev->grid_high_enable;
case GRID_EMS_PAGE_0:
case GRID_EMS_PAGE_1:
case GRID_EMS_PAGE_2:
case GRID_EMS_PAGE_3: {
uint32_t slot = (port >> 14) & 0x3;
return dev->grid_ems_page[slot];
}
default:
break;
}
return 0xff;
}
static void *
grid_init(UNUSED(const device_t *info))
{
grid_t *dev = calloc(1, sizeof(grid_t));
io_sethandler(GRID_ROM_SUBSYSTEM, 0x0008, grid_io_read, NULL, NULL, grid_io_write, NULL, NULL, dev);
io_sethandler(GRID_UNUSED_424, 0x0001, grid_io_read, NULL, NULL, grid_io_write, NULL, NULL, dev);
io_sethandler(GRID_426, 0x0001, grid_io_read, NULL, NULL, grid_io_write, NULL, NULL, dev);
io_sethandler(GRID_APPROM_SELECT, 0x0001, grid_io_read, NULL, NULL, grid_io_write, NULL, NULL, dev);
io_sethandler(GRID_APPROM_ENABLE, 0x0001, grid_io_read, NULL, NULL, grid_io_write, NULL, NULL, dev);
io_sethandler(GRID_TURBO, 0x0001, grid_io_read, NULL, NULL, grid_io_write, NULL, NULL, dev);
dev->grid_turbo = 0x1;
io_sethandler(GRID_HIGH_ENABLE, 0x0001, grid_io_read, NULL, NULL, grid_io_write, NULL, NULL, dev);
io_sethandler(GRID_EMS_PAGE_0, 0x0001, grid_io_read, NULL, NULL, grid_io_write, NULL, NULL, dev);
io_sethandler(GRID_EMS_PAGE_1, 0x0001, grid_io_read, NULL, NULL, grid_io_write, NULL, NULL, dev);
io_sethandler(GRID_EMS_PAGE_2, 0x0001, grid_io_read, NULL, NULL, grid_io_write, NULL, NULL, dev);
io_sethandler(GRID_EMS_PAGE_3, 0x0001, grid_io_read, NULL, NULL, grid_io_write, NULL, NULL, dev);
dev->grid_high_enable = 1;
for (uint8_t slot = 0; slot < 4; slot++) {
dev->grid_ems_page[slot] = 0;
mem_mapping_add(&dev->grid_ems_mapping[slot], GRID_EMS_BASE + (slot << GRID_EMS_PAGE_SHIFT), GRID_EMS_PAGE_SIZE, grid_ems_mem_read8, grid_ems_mem_read16, NULL,
grid_ems_mem_write8, grid_ems_mem_write16, NULL, ram + GRID_EXTENDED_BASE + (slot << GRID_EMS_PAGE_SHIFT), MEM_MAPPING_EXTERNAL, dev);
mem_mapping_disable(&dev->grid_ems_mapping[slot]);
}
flushmmucache();
return dev;
}
static void grid_close(void *priv) {
grid_t *dev = (grid_t *) priv;
free(dev);
}
static void grid_reset(void *priv) {
grid_t *dev = (grid_t *) priv;
dev->grid_high_enable = 1;
mem_mapping_enable(&ram_high_mapping);
dev->grid_turbo = 0x1;
for (uint8_t slot = 0; slot < 4; slot++) {
dev->grid_ems_page[slot] = 0;
mem_mapping_disable(&dev->grid_ems_mapping[slot]);
}
flushmmucache();
dev->grid_unknown = 0;
dev->grid_unused_424 = 0;
dev->grid_426 = 0;
dev->grid_rom_enable = 0;
dev->grid_rom_select = 0;
}
const device_t grid_device = {
.name = "GRiDcase 1520 chipset",
.internal_name = "grid1520",
.flags = 0,
.local = 0,
.init = grid_init,
.close = grid_close,
.reset = grid_reset,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
int machine_at_grid1520_init(const machine_t *model) {
int ret = 0;
ret = bios_load_linear("roms/machines/grid1520/grid1520_891025.rom",
0x000f8000, 0x8000, 0);
if (bios_only || !ret)
return ret;
machine_at_common_ide_init(model);
mem_remap_top(384);
device_add(&kbc_at_device);
// for now just select CGA with amber monitor
//device_add(&cga_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
device_add(&grid_device);
return ret;
}

4
src/machine/m_at_misc.c
View File

@@ -8,11 +8,9 @@
*
* Implementation of Miscellaneous, Fake, Hypervisor machines.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2019 Miran Grca.
* Copyright 2016-2025 Miran Grca.
*/
#include <stdio.h>
#include <stdint.h>

527
src/machine/m_at_slot1.c
View File

@@ -8,11 +8,9 @@
*
* Implementation of Slot 1 machines.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2019 Miran Grca.
* Copyright 2016-2025 Miran Grca.
*/
#include <stdio.h>
#include <stdint.h>
@@ -40,6 +38,39 @@
#include <86box/clock.h>
#include <86box/snd_ac97.h>
/* ALi ALADDiN-PRO II */
int
machine_at_m729_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/m729/M729NEW.BIN",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x0F, PCI_CARD_SOUTHBRIDGE_IDE, 1, 2, 3, 4);
pci_register_slot(0x03, PCI_CARD_SOUTHBRIDGE_PMU, 1, 2, 3, 4);
pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE_USB, 1, 2, 3, 4);
pci_register_slot(0x14, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x10, PCI_CARD_NORMAL, 3, 4, 1, 2);
device_add(&ali1621_device);
device_add(&ali1543c_device); /* +0 */
device_add(&winbond_flash_w29c010_device);
spd_register(SPD_TYPE_SDRAM, 0x7, 512);
return ret;
}
/* i440FX */
int
machine_at_acerv62x_init(const machine_t *model)
{
@@ -119,6 +150,7 @@ machine_at_kn97_init(const machine_t *model)
return ret;
}
/* i440LX */
int
machine_at_lx6_init(const machine_t *model)
{
@@ -250,6 +282,7 @@ machine_at_ma30d_init(const machine_t *model)
return ret;
}
/* i440EX */
int
machine_at_p6i440e2_init(const machine_t *model)
{
@@ -281,109 +314,7 @@ machine_at_p6i440e2_init(const machine_t *model)
return ret;
}
int
machine_at_p2bls_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/p2bls/1014ls.003",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x04, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x06, PCI_CARD_SCSI, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_NETWORK, 3, 4, 1, 2);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&i440bx_device);
device_add(&piix4e_device);
device_add_params(&w83977_device, (void *) (W83977EF | W83977_AMI | W83977_NO_NVR));
#if 0
device_add(ics9xxx_get(ICS9150_08)); /* setting proper speeds requires some interaction with the AS97127F ASIC */
#endif
device_add(&sst_flash_39sf020_device);
spd_register(SPD_TYPE_SDRAM, 0xF, 256);
device_add(&w83781d_device); /* fans: Chassis, CPU, Power; temperatures: MB, unused, CPU */
hwm_values.temperatures[1] = 0; /* unused */
hwm_values.temperatures[2] -= 3; /* CPU offset */
return ret;
}
int
machine_at_lgibmx7g_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/lgibmx7g/ms6119.331",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x10, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x12, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x14, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&i440bx_device);
device_add(&piix4e_device);
device_add_params(&w83977_device, (void *) (W83977TF | W83977_AMI | W83977_NO_NVR));
device_add(&winbond_flash_w29c020_device);
spd_register(SPD_TYPE_SDRAM, 0x7, 256);
return ret;
}
int
machine_at_p3bf_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/p3bf/1008f.004",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x04, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&i440bx_device);
device_add(&piix4e_device);
device_add_params(&w83977_device, (void *) (W83977EF | W83977_AMI | W83977_NO_NVR));
device_add(ics9xxx_get(ICS9250_08));
device_add(&sst_flash_39sf020_device);
spd_register(SPD_TYPE_SDRAM, 0xF, 256);
device_add(&as99127f_device); /* fans: Chassis, CPU, Power; temperatures: MB, JTPWR, CPU */
hwm_values.voltages[4] = hwm_values.voltages[5]; /* +12V reading not in line with other boards; appears to be close to the -12V reading */
return ret;
}
/* i440BX */
int
machine_at_bf6_init(const machine_t *model)
{
@@ -447,6 +378,79 @@ machine_at_bx6_init(const machine_t *model)
return ret;
}
int
machine_at_p2bls_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/p2bls/1014ls.003",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x04, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x06, PCI_CARD_SCSI, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_NETWORK, 3, 4, 1, 2);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&i440bx_device);
device_add(&piix4e_device);
device_add_params(&w83977_device, (void *) (W83977EF | W83977_AMI | W83977_NO_NVR));
#if 0
device_add(ics9xxx_get(ICS9150_08)); /* setting proper speeds requires some interaction with the AS97127F ASIC */
#endif
device_add(&sst_flash_39sf020_device);
spd_register(SPD_TYPE_SDRAM, 0xF, 256);
device_add(&w83781d_device); /* fans: Chassis, CPU, Power; temperatures: MB, unused, CPU */
hwm_values.temperatures[1] = 0; /* unused */
hwm_values.temperatures[2] -= 3; /* CPU offset */
return ret;
}
int
machine_at_p3bf_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/p3bf/1008f.004",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x04, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&i440bx_device);
device_add(&piix4e_device);
device_add_params(&w83977_device, (void *) (W83977EF | W83977_AMI | W83977_NO_NVR));
device_add(ics9xxx_get(ICS9250_08));
device_add(&sst_flash_39sf020_device);
spd_register(SPD_TYPE_SDRAM, 0xF, 256);
device_add(&as99127f_device); /* fans: Chassis, CPU, Power; temperatures: MB, JTPWR, CPU */
hwm_values.voltages[4] = hwm_values.voltages[5]; /* +12V reading not in line with other boards; appears to be close to the -12V reading */
return ret;
}
int
machine_at_ax6bc_init(const machine_t *model)
{
@@ -479,36 +483,6 @@ machine_at_ax6bc_init(const machine_t *model)
return ret;
}
int
machine_at_atc6310bxii_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/atc6310bxii/6310s102.bin",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&i440bx_device);
device_add(&slc90e66_device);
device_add_params(&w83977_device, (void *) (W83977EF | W83977_AMI | W83977_NO_NVR));
device_add(&sst_flash_39sf020_device);
spd_register(SPD_TYPE_SDRAM, 0x7, 256);
return ret;
}
int
machine_at_686bx_init(const machine_t *model)
{
@@ -545,6 +519,36 @@ machine_at_686bx_init(const machine_t *model)
return ret;
}
int
machine_at_lgibmx7g_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/lgibmx7g/ms6119.331",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x10, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x12, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x14, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&i440bx_device);
device_add(&piix4e_device);
device_add_params(&w83977_device, (void *) (W83977TF | W83977_AMI | W83977_NO_NVR));
device_add(&winbond_flash_w29c020_device);
spd_register(SPD_TYPE_SDRAM, 0x7, 256);
return ret;
}
int
machine_at_p6sba_init(const machine_t *model)
{
@@ -619,6 +623,131 @@ machine_at_s1846_init(const machine_t *model)
return ret;
}
/* i440ZX */
int
machine_at_vei8_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/vei8/QHW1001.BIN",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x10, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x12, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&i440zx_device);
device_add(&piix4e_device);
device_add_params(&fdc37m60x_device, (void *) (FDC37XXX2 | FDC37XXXX_370));
device_add(ics9xxx_get(ICS9250_08));
device_add(&sst_flash_39sf020_device);
spd_register(SPD_TYPE_SDRAM, 0x3, 512);
device_add(&as99127f_device); /* fans: Chassis, CPU, Power; temperatures: MB, JTPWR, CPU */
return ret;
}
static void
machine_at_ms6168_common_init(const machine_t *model)
{
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x14, PCI_CARD_SOUND, 3, 4, 1, 2);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x10, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x12, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&i440zx_device);
device_add(&piix4e_device);
if (gfxcard[0] == VID_INTERNAL)
device_add(&voodoo_3_2000_agp_onboard_8m_device);
device_add_params(&w83977_device, (void *) (W83977EF | W83977_AMI | W83977_NO_NVR));
device_add(&intel_flash_bxt_device);
spd_register(SPD_TYPE_SDRAM, 0x3, 256);
if (sound_card_current[0] == SOUND_INTERNAL) {
device_add(machine_get_snd_device(machine));
device_add(&cs4297_device);
}
}
int
machine_at_ms6168_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/ms6168/w6168ims.130",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_ms6168_common_init(model);
return ret;
}
int
machine_at_borapro_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/borapro/MS6168V2.50",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_ms6168_common_init(model);
return ret;
}
/* SMSC VictoryBX-66 */
int
machine_at_atc6310bxii_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/atc6310bxii/6310s102.bin",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&i440bx_device);
device_add(&slc90e66_device);
device_add_params(&w83977_device, (void *) (W83977EF | W83977_AMI | W83977_NO_NVR));
device_add(&sst_flash_39sf020_device);
spd_register(SPD_TYPE_SDRAM, 0x7, 256);
return ret;
}
/* VIA Apollo Pro */
int
machine_at_ficka6130_init(const machine_t *model)
{
@@ -650,6 +779,7 @@ machine_at_ficka6130_init(const machine_t *model)
return ret;
}
/* VIA Apollo Pro 133 */
int
machine_at_p3v133_init(const machine_t *model)
{
@@ -686,6 +816,7 @@ machine_at_p3v133_init(const machine_t *model)
return ret;
}
/* VIA Apollo Pro 133A */
int
machine_at_p3v4x_init(const machine_t *model)
{
@@ -761,129 +892,7 @@ machine_at_gt694va_init(const machine_t *model)
return ret;
}
int
machine_at_vei8_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/vei8/QHW1001.BIN",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x10, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x12, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&i440zx_device);
device_add(&piix4e_device);
device_add_params(&fdc37m60x_device, (void *) (FDC37XXX2 | FDC37XXXX_370));
device_add(ics9xxx_get(ICS9250_08));
device_add(&sst_flash_39sf020_device);
spd_register(SPD_TYPE_SDRAM, 0x3, 512);
device_add(&as99127f_device); /* fans: Chassis, CPU, Power; temperatures: MB, JTPWR, CPU */
return ret;
}
static void
machine_at_ms6168_common_init(const machine_t *model)
{
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x14, PCI_CARD_SOUND, 3, 4, 1, 2);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x10, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x12, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&i440zx_device);
device_add(&piix4e_device);
if (gfxcard[0] == VID_INTERNAL)
device_add(&voodoo_3_2000_agp_onboard_8m_device);
device_add_params(&w83977_device, (void *) (W83977EF | W83977_AMI | W83977_NO_NVR));
device_add(&intel_flash_bxt_device);
spd_register(SPD_TYPE_SDRAM, 0x3, 256);
if (sound_card_current[0] == SOUND_INTERNAL) {
device_add(machine_get_snd_device(machine));
device_add(&cs4297_device);
}
}
int
machine_at_borapro_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/borapro/MS6168V2.50",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_ms6168_common_init(model);
return ret;
}
int
machine_at_ms6168_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/ms6168/w6168ims.130",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_ms6168_common_init(model);
return ret;
}
int
machine_at_m729_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/m729/M729NEW.BIN",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x0F, PCI_CARD_SOUTHBRIDGE_IDE, 1, 2, 3, 4);
pci_register_slot(0x03, PCI_CARD_SOUTHBRIDGE_PMU, 1, 2, 3, 4);
pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE_USB, 1, 2, 3, 4);
pci_register_slot(0x14, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x10, PCI_CARD_NORMAL, 3, 4, 1, 2);
device_add(&ali1621_device);
device_add(&ali1543c_device); /* +0 */
device_add(&winbond_flash_w29c010_device);
spd_register(SPD_TYPE_SDRAM, 0x7, 512);
return ret;
}
/* SiS 5600 */
int
machine_at_p6f99_init(const machine_t *model)
{

78
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@@ -0,0 +1,78 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of Slot 1/2 machines.
*
* Slot 2 is quite a rare type of Slot. Used mostly by Pentium
* II and III Xeons.
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2025 Miran Grca.
*/
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#include <86box/86box.h>
#include <86box/mem.h>
#include <86box/io.h>
#include <86box/rom.h>
#include <86box/pci.h>
#include <86box/device.h>
#include <86box/chipset.h>
#include <86box/hdc.h>
#include <86box/hdc_ide.h>
#include <86box/keyboard.h>
#include <86box/flash.h>
#include <86box/sio.h>
#include <86box/hwm.h>
#include <86box/spd.h>
#include <86box/video.h>
#include <86box/clock.h>
#include "cpu.h"
#include <86box/machine.h>
/* i440GX */
int
machine_at_fw6400gx_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/fw6400gx/FWGX1211.ROM",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 4);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 0, 0);
device_add(&i440gx_device);
device_add(&piix4e_device);
device_add_params(&pc87309_device, (void *) (PCX730X_15C | PCX730X_AMI | PC87309_PC87309));
device_add(ics9xxx_get(ICS9250_08));
device_add(&sst_flash_29ee020_device);
spd_register(SPD_TYPE_SDRAM, 0xF, 512);
device_add(&w83781d_device); /* fans: Chassis, Power, CPU; temperatures: System, CPU, unused */
hwm_values.temperatures[3] = 0; /* unused */
hwm_values.voltages[1] = 1500; /* Vtt */
return ret;
}

151
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@@ -0,0 +1,151 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of Slot 1/Socket 370 machines machines.
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2025 Miran Grca.
*/
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#include <86box/86box.h>
#include <86box/mem.h>
#include <86box/io.h>
#include <86box/rom.h>
#include <86box/pci.h>
#include <86box/device.h>
#include <86box/chipset.h>
#include <86box/hdc.h>
#include <86box/hdc_ide.h>
#include <86box/keyboard.h>
#include <86box/flash.h>
#include <86box/sio.h>
#include <86box/hwm.h>
#include <86box/spd.h>
#include <86box/video.h>
#include "cpu.h"
#include <86box/machine.h>
#include <86box/clock.h>
#include <86box/sound.h>
#include <86box/snd_ac97.h>
/* i440BX */
int
machine_at_prosignias31x_bx_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/prosignias31x_bx/p6bxt-ap-092600.bin",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0a, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0b, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0c, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0d, PCI_CARD_SOUND, 4, 3, 2, 1); /* assumed */
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&i440bx_device);
device_add(&piix4e_device);
device_add_params(&w83977_device, (void *) (W83977EF | W83977_AMI | W83977_NO_NVR));
device_add(&winbond_flash_w29c020_device);
spd_register(SPD_TYPE_SDRAM, 0x7, 256);
device_add(&gl520sm_2d_device); /* fans: CPU, Chassis; temperature: System */
hwm_values.temperatures[0] += 2; /* System offset */
hwm_values.temperatures[1] += 2; /* CPU offset */
hwm_values.voltages[0] = 3300; /* Vcore and 3.3V are swapped */
hwm_values.voltages[2] = hwm_get_vcore();
if (sound_card_current[0] == SOUND_INTERNAL)
device_add(&cmi8738_onboard_device);
return ret;
}
int
machine_at_s1857_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/s1857/BX57200A.ROM",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x0F, PCI_CARD_SOUND, 1, 0, 0, 0);
pci_register_slot(0x10, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x11, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x12, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x13, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x14, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&i440bx_device);
device_add(&piix4e_device);
device_add_params(&w83977_device, (void *) (W83977EF | W83977_AMI | W83977_NO_NVR));
device_add(&intel_flash_bxt_device);
spd_register(SPD_TYPE_SDRAM, 0x7, 256);
if (sound_card_current[0] == SOUND_INTERNAL) {
device_add(machine_get_snd_device(machine));
device_add(&cs4297_device); /* no good pictures, but the marking looks like CS4297 from a distance */
}
return ret;
}
/* VIA Apollo Pro 133 */
int
machine_at_p6bat_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/p6bat/bata+56.BIN",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0a, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0b, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0c, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0d, PCI_CARD_NORMAL, 4, 3, 2, 1);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&via_apro133_device);
device_add(&via_vt82c596b_device);
device_add_params(&w83977_device, (void *) (W83977EF | W83977_AMI | W83977_NO_NVR));
device_add(&sst_flash_39sf020_device);
spd_register(SPD_TYPE_SDRAM, 0x7, 256);
if (sound_card_current[0] == SOUND_INTERNAL)
device_add(&cmi8738_onboard_device);
return ret;
}

42
src/machine/m_at_slot2.c
View File

@@ -10,11 +10,9 @@
*
* Slot 2 is quite a rare type of Slot. Used mostly by Pentium II & III Xeons
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2019 Miran Grca.
* Copyright 2016-2025 Miran Grca.
*/
#include <stdio.h>
#include <stdint.h>
@@ -40,6 +38,7 @@
#include "cpu.h"
#include <86box/machine.h>
/* i440GX */
int
machine_at_6gxu_init(const machine_t *model)
{
@@ -111,40 +110,3 @@ machine_at_s2dge_init(const machine_t *model)
return ret;
}
int
machine_at_fw6400gx_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/fw6400gx/FWGX1211.ROM",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 4);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 0, 0);
device_add(&i440gx_device);
device_add(&piix4e_device);
device_add_params(&pc87309_device, (void *) (PCX730X_15C | PCX730X_AMI | PC87309_PC87309));
device_add(ics9xxx_get(ICS9250_08));
device_add(&sst_flash_29ee020_device);
spd_register(SPD_TYPE_SDRAM, 0xF, 512);
device_add(&w83781d_device); /* fans: Chassis, Power, CPU; temperatures: System, CPU, unused */
hwm_values.temperatures[3] = 0; /* unused */
hwm_values.voltages[1] = 1500; /* Vtt */
return ret;
}

397
src/machine/m_at_socket1.c Normal file
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@@ -0,0 +1,397 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of Socket 168 and 1 machines.
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2025 Miran Grca.
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/io.h>
#include <86box/device.h>
#include <86box/chipset.h>
#include <86box/keyboard.h>
#include <86box/mem.h>
#include <86box/nvr.h>
#include <86box/pci.h>
#include <86box/dma.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/fdc_ext.h>
#include <86box/gameport.h>
#include <86box/pic.h>
#include <86box/pit.h>
#include <86box/rom.h>
#include <86box/sio.h>
#include <86box/hdc.h>
#include <86box/port_6x.h>
#include <86box/port_92.h>
#include <86box/video.h>
#include <86box/flash.h>
#include <86box/scsi_ncr53c8xx.h>
#include <86box/hwm.h>
#include <86box/machine.h>
#include <86box/plat_unused.h>
#include <86box/sound.h>
/* CS4031 */
int
machine_at_cs4031_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/cs4031/CHIPS_1.AMI",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&cs4031_device);
device_add(&kbc_at_ami_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
/* OPTi 381 */
int
machine_at_ga486l_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/ga486l/ga-486l_bios.bin",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&opti381_device);
device_add(&kbc_at_ami_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
/* OPTi 498 */
int
machine_at_mvi486_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/mvi486/MVI627.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&opti498_device);
device_add(&kbc_at_device);
device_add(&ide_isa_device);
device_add_params(&pc873xx_device, (void *) (PCX73XX_IDE_PRI | PCX730X_398));
return ret;
}
/* SiS 401 */
static void
machine_at_sis401_common_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&sis_85c401_device);
device_add(&kbc_at_ami_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
}
int
machine_at_isa486_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/isa486/ISA-486.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_sis401_common_init(model);
return ret;
}
int
machine_at_sis401_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/sis401/SIS401-2.AMI",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_sis401_common_init(model);
return ret;
}
/* SiS 460 */
int
machine_at_av4_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/av4/amibios_486dx_isa_bios_aa4025963.bin",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&sis_85c460_device);
device_add(&kbc_at_ami_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
/* SiS 471 */
int
machine_at_advantage40xxd_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/advantage40xxd/AST101.09A",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&sis_85c471_device);
if (gfxcard[0] == VID_INTERNAL)
device_add(machine_get_vid_device(machine));
device_add(&kbc_ps2_phoenix_device);
device_add_params(&um866x_device, (void *) (UM82C863F | UM866X_IDE_PRI));
device_add(&intel_flash_bxt_device);
return ret;
}
/* Symphony SL42C460 */
int
machine_at_dtk461_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/dtk461/DTK.BIO",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&sl82c461_device);
device_add(&kbc_at_ami_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
/* VIA VT82C495 */
int
machine_at_486vchd_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/486vchd/486-4386-VC-HD.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&via_vt82c49x_device);
device_add(&kbc_at_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
/* VLSI 82C480 */
int
machine_at_vect486vl_init(const machine_t *model) // has HDC problems
{
int ret;
ret = bios_load_linear("roms/machines/vect486vl/aa0500.ami",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
if (gfxcard[0] == VID_INTERNAL)
device_add(machine_get_vid_device(machine));
machine_at_common_init_ex(model, 2);
device_add(&vl82c480_device);
device_add(&vl82c113_device);
device_add(&ide_isa_device);
device_add_params(&fdc37c6xx_device, (void *) (FDC37C651 | FDC37C6XX_IDE_PRI));
return ret;
}
/* VLSI 82C481 */
int
machine_at_d824_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/d824/fts-biosupdated824noflashbiosepromv320-320334-160.bin",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
if (gfxcard[0] == VID_INTERNAL)
device_add(machine_get_vid_device(machine));
machine_at_common_init_ex(model, 2);
device_add(&vl82c480_device);
/*
Technically, it should be the VL82C114 but we do not have
a proper datasheet of it that tells us the registers.
*/
device_add(&vl82c113_device);
device_add(&ide_isa_device);
device_add_params(&fdc37c6xx_device, (void *) FDC37C651);
return ret;
}
/* VLSI 82C486 */
int
machine_at_tuliptc38_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/tuliptc38/TULIP1.BIN",
0x000f0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
device_add(&vl82c486_device);
device_add(&tulip_jumper_device);
device_add(&vl82c113_device);
device_add(&ide_isa_device);
device_add_params(&fdc37c6xx_device, (void *) (FDC37C651 | FDC37C6XX_IDE_PRI));
if (gfxcard[0] == VID_INTERNAL) {
bios_load_aux_linear("roms/machines/tuliptc38/VBIOS.BIN",
0x000c0000, 32768, 0);
device_add(machine_get_vid_device(machine));
} else for (uint16_t i = 0; i < 32768; i++)
rom[i] = mem_readb_phys(0x000c0000 + i);
mem_mapping_set_addr(&bios_mapping, 0x0c0000, 0x40000);
mem_mapping_set_exec(&bios_mapping, rom);
return ret;
}
/* ZyMOS Poach */
int
machine_at_isa486c_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/isa486c/asus-isa-486c-401a0-040591-657e2c17a0218417632602.bin",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&isa486c_device);
device_add(&port_92_key_device);
device_add(&kbc_at_ami_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
int
machine_at_genoa486_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/genoa486/AMI486.BIO",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&compaq_genoa_device);
device_add(&port_92_key_device);
device_add(&kbc_at_ami_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}

374
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/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of Socket 2 machines.
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2025 Miran Grca.
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/io.h>
#include <86box/device.h>
#include <86box/chipset.h>
#include <86box/keyboard.h>
#include <86box/mem.h>
#include <86box/nvr.h>
#include <86box/pci.h>
#include <86box/dma.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/fdc_ext.h>
#include <86box/gameport.h>
#include <86box/pic.h>
#include <86box/pit.h>
#include <86box/rom.h>
#include <86box/sio.h>
#include <86box/hdc.h>
#include <86box/port_6x.h>
#include <86box/port_92.h>
#include <86box/video.h>
#include <86box/flash.h>
#include <86box/scsi_ncr53c8xx.h>
#include <86box/hwm.h>
#include <86box/machine.h>
#include <86box/plat_unused.h>
#include <86box/sound.h>
/* ACC 2168 */
int
machine_at_pb410a_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/pb410a/pb410a.080337.4abf.u25.bin",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_ibm_common_ide_init(model);
device_add(&kbc_ps2_device);
device_add(&acc3221_device);
device_add(&acc2168_device);
device_add(&phoenix_486_jumper_device);
if (gfxcard[0] == VID_INTERNAL)
device_add(machine_get_vid_device(machine));
return ret;
}
/* ALi M1429G */
int
machine_at_acera1g_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/acera1g/4alo001.bin",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&ali1429g_device);
if (gfxcard[0] == VID_INTERNAL)
device_add(&gd5428_onboard_device);
device_add(&kbc_ps2_acer_pci_device);
device_add_params(&pc87310_device, (void *) (PC87310_ALI));
device_add(&ide_ali5213_device);
return ret;
}
static void
machine_at_ali1429_common_init(const machine_t *model, int is_green)
{
machine_at_common_init(model);
if (is_green)
device_add(&ali1429g_device);
else
device_add(&ali1429_device);
device_add(&kbc_at_ami_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
}
int
machine_at_winbios1429_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/win486/ali1429g.amw",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_ali1429_common_init(model, 1);
return ret;
}
int
machine_at_ali1429_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/ali1429/ami486.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_ali1429_common_init(model, 0);
return ret;
}
/* i420TX */
int
machine_at_pci400ca_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/pci400ca/486-AA008851.BIN",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
pci_init(PCI_CONFIG_TYPE_2 | PCI_NO_IRQ_STEERING);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SCSI, 1, 2, 3, 4);
pci_register_slot(0x03, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x04, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x05, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
device_add(&kbc_at_ami_device);
device_add(&sio_device);
device_add(&intel_flash_bxt_ami_device);
device_add(&i420tx_device);
device_add(&ncr53c810_onboard_pci_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
/* IMS 8848 */
int
machine_at_g486ip_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/g486ip/G486IP.BIN",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
device_add(&ami_1992_nvr_device);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 3, 4, 1, 2); /* 03 = Slot 1 */
pci_register_slot(0x0E, PCI_CARD_NORMAL, 2, 3, 4, 1); /* 04 = Slot 2 */
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4); /* 05 = Slot 3 */
device_add(&kbc_ps2_ami_pci_device); /* AMI Megakey 1993 stanalone ('P') */
device_add(&ims8848_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
/* OPTi 499 */
int
machine_at_cobalt_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/cobalt/Cobalt_2.3.BIN",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&opti499_device);
device_add(&ide_opti611_vlb_device);
device_add(&ide_isa_sec_device);
device_add_params(&fdc37c6xx_device, (void *) FDC37C665);
device_add(&kbc_ps2_ami_device);
if (gfxcard[0] == VID_INTERNAL)
device_add(machine_get_vid_device(machine));
return ret;
}
int
machine_at_cougar_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/cougar/COUGRMRB.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&ide_vlb_device);
device_add(&opti499_device);
device_add_params(&fdc37c6xx_device, (void *) (FDC37C665 | FDC37C6XX_IDE_PRI));
device_add(&kbc_at_ami_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
/* SiS 461 */
int
machine_at_decpclpv_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/decpclpv/bios.bin",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&sis_85c461_device);
if (gfxcard[0] == VID_INTERNAL)
device_add(machine_get_vid_device(machine));
device_add(&kbc_ps2_phoenix_pci_device);
device_add(&ide_isa_2ch_device);
device_add_params(&fdc37c6xx_device, (void *) (FDC37C663 | FDC37C6XX_IDE_PRI));
return ret;
}
int
machine_at_dell466np_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/dell466np/466np.bin",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&sis_85c461_device);
if (gfxcard[0] == VID_INTERNAL)
device_add(machine_get_vid_device(machine));
else {
for (uint16_t i = 0; i < 32768; i++)
rom[i] = mem_readb_phys(0x000c0000 + i);
}
mem_mapping_set_addr(&bios_mapping, 0x0c0000, 0x40000);
mem_mapping_set_exec(&bios_mapping, rom);
device_add(&kbc_ps2_phoenix_pci_device);
device_add(&ide_isa_device);
device_add_params(&fdc37c6xx_device, (void *) (FDC37C661 | FDC37C6XX_IDE_PRI));
return ret;
}
int
machine_at_valuepoint433_init(const machine_t *model) // hangs without the PS/2 mouse
{
int ret;
ret = bios_load_linear("roms/machines/valuepoint433/$IMAGEP.FLH",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_ide_init(model);
device_add(&sis_85c461_device);
if (gfxcard[0] == VID_INTERNAL)
device_add(&et4000w32_onboard_device);
device_add_params(&fdc37c6xx_device, (void *) (FDC37C661 | FDC37C6XX_IDE_PRI));
device_add(&kbc_ps2_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
/* VLSI 82C480 */
int
machine_at_martin_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/martin/NONSCSI.ROM",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
device_add(&vl82c480_device);
device_add(&vl82c113_device);
device_add(&ide_vlb_device);
device_add_params(&fdc37c6xx_device, (void *) (FDC37C651 | FDC37C6XX_IDE_PRI));
device_add(&intel_flash_bxt_device);
return ret;
}

419
src/machine/m_at_socket3.c Normal file
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@@ -0,0 +1,419 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of Socket 3 machines.
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2025 Miran Grca.
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/io.h>
#include <86box/device.h>
#include <86box/chipset.h>
#include <86box/keyboard.h>
#include <86box/mem.h>
#include <86box/nvr.h>
#include <86box/pci.h>
#include <86box/dma.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/fdc_ext.h>
#include <86box/gameport.h>
#include <86box/pic.h>
#include <86box/pit.h>
#include <86box/rom.h>
#include <86box/sio.h>
#include <86box/hdc.h>
#include <86box/port_6x.h>
#include <86box/port_92.h>
#include <86box/video.h>
#include <86box/flash.h>
#include <86box/scsi_ncr53c8xx.h>
#include <86box/hwm.h>
#include <86box/machine.h>
#include <86box/plat_unused.h>
#include <86box/sound.h>
/* ALi M1429G */
int
machine_at_atc1762_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/atc1762/atc1762.bin",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&ali1429g_device);
device_add(&kbc_ps2_ami_pci_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
int
machine_at_ecsal486_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/ecsal486/ECS_AL486.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&ali1429g_device);
device_add(&kbc_ps2_ami_pci_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
int
machine_at_ap4100aa_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/ap4100aa/M27C512DIP28.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
device_add(&ami_1994_nvr_device);
device_add(&ali1429g_device);
device_add(&kbc_ps2_ami_pci_device);
device_add(&ide_vlb_device);
device_add_params(&um866x_device, (void *) UM8663BF);
return ret;
}
/* Contaq 82C596A */
int
machine_at_4gpv5_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/4gpv5/4GPV5.bin",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
device_add(&contaq_82c596a_device);
device_add(&kbc_at_device);
return ret;
}
/* Contaq 82C597 */
int
machine_at_greenb_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/greenb/4gpv31-ami-1993-8273517.bin",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
device_add(&contaq_82c597_device);
device_add(&kbc_at_ami_device);
return ret;
}
/* OPTi 895 */
static void
machine_at_403tg_common_init(const machine_t *model, int nvr_hack)
{
if (nvr_hack) {
machine_at_common_init_ex(model, 2);
device_add(&ami_1994_nvr_device);
} else
machine_at_common_init(model);
device_add(&opti895_device);
device_add(&kbc_at_ami_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
}
int
machine_at_403tg_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/403tg/403TG.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_403tg_common_init(model, 0);
return ret;
}
int
machine_at_403tg_d_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/403tg_d/J403TGRevD.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_403tg_common_init(model, 1);
return ret;
}
int
machine_at_403tg_d_mr_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/403tg_d/MRBiosOPT895.bin",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_403tg_common_init(model, 0);
return ret;
}
/* SiS 461 */
int
machine_at_acerv10_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/acerv10/ALL.BIN",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&sis_85c461_device);
device_add(&kbc_ps2_acer_pci_device);
device_add(&ide_isa_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
/* SiS 471 */
static void
machine_at_sis_85c471_common_init(const machine_t *model)
{
machine_at_common_init(model);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
device_add(&sis_85c471_device);
}
int
machine_at_win471_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/win471/486-SiS_AC0360136.BIN",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_sis_85c471_common_init(model);
device_add(&kbc_at_ami_device);
return ret;
}
int
machine_at_vi15g_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/vi15g/vi15gr23.rom",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_sis_85c471_common_init(model);
device_add(&kbc_at_ami_device);
return ret;
}
int
machine_at_vli486sv2g_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/vli486sv2g/0402.001",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_sis_85c471_common_init(model);
device_add(&kbc_ps2_ami_device);
return ret;
}
int
machine_at_dvent4xx_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/dvent4xx/Venturis466_BIOS.BIN",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&sis_85c471_device);
device_add(&ide_cmd640_vlb_pri_device);
device_add_params(&fdc37c6xx_device, (void *) (FDC37C665 | FDC37C6XX_IDE_SEC));
device_add(&kbc_ps2_phoenix_device);
if (gfxcard[0] == VID_INTERNAL)
device_add(machine_get_vid_device(machine));
return ret;
}
int
machine_at_dtk486_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/dtk486/4siw005.bin",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_sis_85c471_common_init(model);
device_add(&kbc_at_device);
return ret;
}
int
machine_at_ami471_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/ami471/SIS471BE.AMI",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_sis_85c471_common_init(model);
device_add(&kbc_at_ami_device);
return ret;
}
int
machine_at_px471_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/px471/SIS471A1.PHO",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_sis_85c471_common_init(model);
device_add(&ide_vlb_device);
device_add(&kbc_at_device);
return ret;
}
int
machine_at_tg486g_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/tg486g/tg486g.bin",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
device_add(&amstrad_megapc_nvr_device);
device_add(&sis_85c471_device);
device_add(&ide_isa_device);
device_add_params(&fdc37c6xx_device, (void *) (FDC37C651 | FDC37C6XX_IDE_PRI));
device_add(&kbc_ps2_tg_ami_pci_device);
if (gfxcard[0] != VID_INTERNAL) {
for (uint16_t i = 0; i < 32768; i++)
rom[i] = mem_readb_phys(0x000c0000 + i);
}
mem_mapping_set_addr(&bios_mapping, 0x0c0000, 0x40000);
mem_mapping_set_exec(&bios_mapping, rom);
return ret;
}

380
src/machine/m_at_socket370.c
View File

@@ -6,13 +6,11 @@
*
* This file is part of the 86Box distribution.
*
* Implementation of Socket 370(PGA370) machines.
*
*
* Implementation of Socket 370 (PGA370) machines.
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2019 Miran Grca.
* Copyright 2016-2025 Miran Grca.
*/
#include <stdio.h>
#include <stdint.h>
@@ -40,6 +38,7 @@
#include <86box/sound.h>
#include <86box/snd_ac97.h>
/* i440LX */
int
machine_at_s370slm_init(const machine_t *model)
{
@@ -73,12 +72,13 @@ machine_at_s370slm_init(const machine_t *model)
return ret;
}
/* i440BX */
int
machine_at_prosignias31x_bx_init(const machine_t *model)
machine_at_awo671r_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/prosignias31x_bx/p6bxt-ap-092600.bin",
ret = bios_load_linear("roms/machines/awo671r/a08139c.bin",
0x000c0000, 262144, 0);
if (bios_only || !ret)
@@ -89,35 +89,30 @@ machine_at_prosignias31x_bx_init(const machine_t *model)
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0a, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0b, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0c, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0d, PCI_CARD_SOUND, 4, 3, 2, 1); /* assumed */
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0D, PCI_CARD_VIDEO, 2, 3, 4, 1);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&i440bx_device);
device_add(&piix4e_device);
device_add_params(&w83977_device, (void *) (W83977EF | W83977_AMI | W83977_NO_NVR));
device_add(&winbond_flash_w29c020_device);
spd_register(SPD_TYPE_SDRAM, 0x7, 256);
device_add(&gl520sm_2d_device); /* fans: CPU, Chassis; temperature: System */
hwm_values.temperatures[0] += 2; /* System offset */
hwm_values.temperatures[1] += 2; /* CPU offset */
hwm_values.voltages[0] = 3300; /* Vcore and 3.3V are swapped */
hwm_values.voltages[2] = hwm_get_vcore();
if (sound_card_current[0] == SOUND_INTERNAL)
device_add(&cmi8738_onboard_device);
device_add_inst_params(&w83977_device, 1, (void *) (W83977EF | W83977_AMI | W83977_NO_NVR));
device_add_inst_params(&w83977_device, 2, (void *) (W83977EF | W83977_AMI | W83977_NO_NVR));
device_add(&sst_flash_39sf020_device);
if (gfxcard[0] == VID_INTERNAL)
device_add(machine_get_vid_device(machine));
spd_register(SPD_TYPE_SDRAM, 0x3, 256);
return ret;
}
int
machine_at_s1857_init(const machine_t *model)
machine_at_ambx133_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/s1857/BX57200A.ROM",
ret = bios_load_linear("roms/machines/ambx133/mkbx2vg2.bin",
0x000c0000, 262144, 0);
if (bios_only || !ret)
@@ -128,91 +123,21 @@ machine_at_s1857_init(const machine_t *model)
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x0F, PCI_CARD_SOUND, 1, 0, 0, 0);
pci_register_slot(0x10, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x11, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x12, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x13, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x14, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&i440bx_device);
device_add(&piix4e_device);
device_add_params(&w83977_device, (void *) (W83977EF | W83977_AMI | W83977_NO_NVR));
device_add(&intel_flash_bxt_device);
spd_register(SPD_TYPE_SDRAM, 0x7, 256);
if (sound_card_current[0] == SOUND_INTERNAL) {
device_add(machine_get_snd_device(machine));
device_add(&cs4297_device); /* no good pictures, but the marking looks like CS4297 from a distance */
}
return ret;
}
int
machine_at_p6bap_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/p6bap/bapa14a.BIN",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0a, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0b, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0c, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0d, PCI_CARD_NORMAL, 4, 3, 2, 1);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&via_apro133a_device); /* Rebranded as ET82C693A */
device_add(&via_vt82c596b_device); /* Rebranded as ET82C696B */
device_add_params(&w83977_device, (void *) (W83977EF | W83977_AMI | W83977_NO_NVR));
device_add(&sst_flash_39sf020_device);
spd_register(SPD_TYPE_SDRAM, 0x7, 256);
if (sound_card_current[0] == SOUND_INTERNAL)
device_add(&cmi8738_onboard_device);
return ret;
}
int
machine_at_p6bat_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/p6bat/bata+56.BIN",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0a, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0b, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0c, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0d, PCI_CARD_NORMAL, 4, 3, 2, 1);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&via_apro133_device);
device_add(&via_vt82c596b_device);
device_add_params(&w83977_device, (void *) (W83977EF | W83977_AMI | W83977_NO_NVR));
device_add(&sst_flash_39sf020_device);
spd_register(SPD_TYPE_SDRAM, 0x7, 256);
if (sound_card_current[0] == SOUND_INTERNAL)
device_add(&cmi8738_onboard_device);
device_add(&gl518sm_2d_device); /* fans: CPUFAN1, CPUFAN2; temperature: CPU */
hwm_values.fans[1] += 500;
hwm_values.temperatures[0] += 4; /* CPU offset */
hwm_values.voltages[1] = RESISTOR_DIVIDER(12000, 10, 2); /* different 12V divider in BIOS (10K/2K?) */
return ret;
}
@@ -253,6 +178,39 @@ machine_at_cubx_init(const machine_t *model)
return ret;
}
/* i440ZX */
int
machine_at_63a1_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/63a1/63a-q3.bin",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4); /* Integrated Sound? */
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&i440zx_device);
device_add(&piix4e_device);
device_add_params(&w83977_device, (void *) (W83977EF | W83977_AMI | W83977_NO_NVR));
device_add(&intel_flash_bxt_device);
spd_register(SPD_TYPE_SDRAM, 0x3, 256);
return ret;
}
/* SMSC VictoryBX-66 */
int
machine_at_atc7020bxii_init(const machine_t *model)
{
@@ -324,106 +282,7 @@ machine_at_m773_init(const machine_t *model)
return ret;
}
int
machine_at_ambx133_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/ambx133/mkbx2vg2.bin",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&i440bx_device);
device_add(&piix4e_device);
device_add_params(&w83977_device, (void *) (W83977EF | W83977_AMI | W83977_NO_NVR));
device_add(&sst_flash_39sf020_device);
spd_register(SPD_TYPE_SDRAM, 0x7, 256);
device_add(&gl518sm_2d_device); /* fans: CPUFAN1, CPUFAN2; temperature: CPU */
hwm_values.fans[1] += 500;
hwm_values.temperatures[0] += 4; /* CPU offset */
hwm_values.voltages[1] = RESISTOR_DIVIDER(12000, 10, 2); /* different 12V divider in BIOS (10K/2K?) */
return ret;
}
int
machine_at_awo671r_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/awo671r/a08139c.bin",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0D, PCI_CARD_VIDEO, 2, 3, 4, 1);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&i440bx_device);
device_add(&piix4e_device);
device_add_inst_params(&w83977_device, 1, (void *) (W83977EF | W83977_AMI | W83977_NO_NVR));
device_add_inst_params(&w83977_device, 2, (void *) (W83977EF | W83977_AMI | W83977_NO_NVR));
device_add(&sst_flash_39sf020_device);
if (gfxcard[0] == VID_INTERNAL)
device_add(machine_get_vid_device(machine));
spd_register(SPD_TYPE_SDRAM, 0x3, 256);
return ret;
}
int
machine_at_63a1_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/63a1/63a-q3.bin",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4); /* Integrated Sound? */
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&i440zx_device);
device_add(&piix4e_device);
device_add_params(&w83977_device, (void *) (W83977EF | W83977_AMI | W83977_NO_NVR));
device_add(&intel_flash_bxt_device);
spd_register(SPD_TYPE_SDRAM, 0x3, 256);
return ret;
}
/* VIA Apollo Pro */
int
machine_at_apas3_init(const machine_t *model)
{
@@ -455,6 +314,80 @@ machine_at_apas3_init(const machine_t *model)
return ret;
}
/* VIA Apollo Pro 133 */
int
machine_at_p6bap_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/p6bap/bapa14a.BIN",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0a, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0b, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0c, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0d, PCI_CARD_NORMAL, 4, 3, 2, 1);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&via_apro133a_device); /* Rebranded as ET82C693A */
device_add(&via_vt82c596b_device); /* Rebranded as ET82C696B */
device_add_params(&w83977_device, (void *) (W83977EF | W83977_AMI | W83977_NO_NVR));
device_add(&sst_flash_39sf020_device);
spd_register(SPD_TYPE_SDRAM, 0x7, 256);
if (sound_card_current[0] == SOUND_INTERNAL)
device_add(&cmi8738_onboard_device);
return ret;
}
/* VIA Apollo Pro 133A */
int
machine_at_6via90ap_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/6via90ap/90ap10.bin",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&via_apro133a_device);
device_add(&via_vt82c686b_device); /* fans: CPU1, CPU2; temperatures: CPU, System, unused */
device_add(&kbc_ps2_ami_pci_device);
device_add(ics9xxx_get(ICS9250_18));
device_add(&sst_flash_39sf020_device);
spd_register(SPD_TYPE_SDRAM, 0x7, 1024);
hwm_values.temperatures[0] += 2; /* CPU offset */
hwm_values.temperatures[1] += 2; /* System offset */
hwm_values.temperatures[2] = 0; /* unused */
if (sound_card_current[0] == SOUND_INTERNAL)
device_add(&alc100_device); /* ALC100P identified on similar Acorp boards (694TA, 6VIA90A1) */
return ret;
}
int
machine_at_cuv4xls_init(const machine_t *model)
{
@@ -494,44 +427,7 @@ machine_at_cuv4xls_init(const machine_t *model)
return ret;
}
int
machine_at_6via90ap_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/6via90ap/90ap10.bin",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&via_apro133a_device);
device_add(&via_vt82c686b_device); /* fans: CPU1, CPU2; temperatures: CPU, System, unused */
device_add(&kbc_ps2_ami_pci_device);
device_add(ics9xxx_get(ICS9250_18));
device_add(&sst_flash_39sf020_device);
spd_register(SPD_TYPE_SDRAM, 0x7, 1024);
hwm_values.temperatures[0] += 2; /* CPU offset */
hwm_values.temperatures[1] += 2; /* System offset */
hwm_values.temperatures[2] = 0; /* unused */
if (sound_card_current[0] == SOUND_INTERNAL)
device_add(&alc100_device); /* ALC100P identified on similar Acorp boards (694TA, 6VIA90A1) */
return ret;
}
/* SiS 600 */
int
machine_at_7sbb_init(const machine_t *model)
{

1439
src/machine/m_at_socket3_pci.c Normal file
View File

File diff suppressed because it is too large Load Diff

298
src/machine/m_at_socket4.c
View File

@@ -8,11 +8,9 @@
*
* Implementation of Socket 4 machines.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2019 Miran Grca.
* Copyright 2016-2025 Miran Grca.
*/
#include <stdio.h>
#include <stdint.h>
@@ -41,41 +39,7 @@
#include <86box/video.h>
#include <86box/machine.h>
int
machine_at_v12p_init(const machine_t *model)
{
int ret = 0;
const char* fn;
/* No ROMs available */
if (!device_available(model->device))
return ret;
device_context(model->device);
fn = device_get_bios_file(machine_get_device(machine), device_get_config_bios("bios"), 0);
ret = bios_load_linear(fn, 0x000e0000, 131072, 0);
device_context_restore();
machine_at_common_init(model);
device_add(&ide_isa_device);
pci_init(PCI_CONFIG_TYPE_2 | PCI_NO_IRQ_STEERING);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SCSI, 1, 4, 3, 2);
pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 2, 1, 4, 3);
pci_register_slot(0x03, PCI_CARD_NORMAL, 3, 2, 1, 4);
pci_register_slot(0x04, PCI_CARD_NORMAL, 4, 0, 0, 0);
pci_register_slot(0x05, PCI_CARD_NORMAL, 0, 0, 0, 0);
device_add(&i430lx_device);
device_add(&kbc_ps2_acer_pci_device);
device_add(&sio_zb_device);
device_add_params(&pc87310_device, (void *) (PC87310_ALI));
device_add(&amd_am28f010_flash_device);
return ret;
}
/* i430LX */
static const device_config_t v12p_config[] = {
// clang-format off
{
@@ -112,15 +76,58 @@ const device_t v12p_device = {
.config = v12p_config
};
void
machine_at_premiere_common_init(const machine_t *model, int pci_switch)
int
machine_at_v12p_init(const machine_t *model)
{
int ret = 0;
const char* fn;
/* No ROMs available */
if (!device_available(model->device))
return ret;
device_context(model->device);
fn = device_get_bios_file(machine_get_device(machine), device_get_config_bios("bios"), 0);
ret = bios_load_linear(fn, 0x000e0000, 131072, 0);
device_context_restore();
machine_at_common_init(model);
device_add(&ide_isa_device);
pci_init(PCI_CONFIG_TYPE_2 | PCI_NO_IRQ_STEERING);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SCSI, 1, 4, 3, 2);
pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 2, 1, 4, 3);
pci_register_slot(0x03, PCI_CARD_NORMAL, 3, 2, 1, 4);
pci_register_slot(0x04, PCI_CARD_NORMAL, 4, 0, 0, 0);
pci_register_slot(0x05, PCI_CARD_NORMAL, 0, 0, 0, 0);
device_add(&i430lx_device);
device_add(&kbc_ps2_acer_pci_device);
device_add(&sio_zb_device);
device_add_params(&pc87310_device, (void *) (PC87310_ALI));
device_add(&amd_am28f010_flash_device);
return ret;
}
int
machine_at_ambradp60_init(const machine_t *model)
{
int ret;
ret = bios_load_linear_combined("roms/machines/ambradp60/1004AF1P.BIO",
"roms/machines/ambradp60/1004AF1P.BI1",
0x1c000, 128);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
device_add(&amstrad_megapc_nvr_device);
device_add(&ide_pci_2ch_device);
device_add(&ide_pci_device);
pci_init(PCI_CONFIG_TYPE_2 | pci_switch);
pci_init(PCI_CONFIG_TYPE_2);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_IDE, 0, 0, 0, 0);
pci_register_slot(0x06, PCI_CARD_NORMAL, 3, 2, 1, 4);
@@ -129,32 +136,12 @@ machine_at_premiere_common_init(const machine_t *model, int pci_switch)
pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
device_add(&kbc_ps2_phoenix_device);
device_add(&sio_zb_device);
device_add(&ide_rz1000_pci_single_channel_device);
device_add_params(&fdc37c6xx_device, (void *) (FDC37C665 | FDC37C6XX_IDE_SEC));
device_add_params(&fdc37c6xx_device, (void *) (FDC37C665 | FDC37C6XX_IDE_PRI));
device_add(&intel_flash_bxt_ami_device);
}
void
machine_at_sp4_common_init(const machine_t *model)
{
machine_at_common_init(model);
device_add(&i430lx_device);
pci_init(PCI_CONFIG_TYPE_1 | FLAG_TRC_CONTROLS_CPURST);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
/* Excluded: 02, 03, 04, 05, 06, 07, 08, 09, 0A, 0B, 0C, 0D, 0E, 0F, 10, 11, 12, 13, 14 */
pci_register_slot(0x0D, PCI_CARD_IDE, 1, 2, 3, 4);
/* Excluded: 02, 03*, 04*, 05*, 06*, 07*, 08* */
/* Slots: 09 (04), 0A (03), 0B (02), 0C (07) */
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x09, PCI_CARD_NORMAL, 4, 1, 2, 3);
device_add(&sis_85c50x_device);
device_add(&ide_cmd640_pci_device);
device_add(&kbc_ps2_ami_pci_device);
device_add_params(&fdc37c6xx_device, (void *) FDC37C665);
device_add(&intel_flash_bxt_device);
return ret;
}
int
@@ -210,9 +197,9 @@ machine_at_p5mp3_init(const machine_t *model)
device_add(&fdc_at_device);
device_add(&kbc_ps2_pci_device);
device_add(&i430lx_device);
device_add(&sio_zb_device);
device_add(&catalyst_flash_device);
device_add(&i430lx_device);
return ret;
}
@@ -282,34 +269,40 @@ machine_at_opti560l_init(const machine_t *model)
return ret;
}
void
machine_at_award_common_init(const machine_t *model)
{
machine_at_common_init(model);
pci_init(PCI_CONFIG_TYPE_2 | PCI_NO_IRQ_STEERING);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x03, PCI_CARD_NORMAL, 1, 2, 3, 4); /* 03 = Slot 1 */
pci_register_slot(0x04, PCI_CARD_NORMAL, 2, 3, 4, 1); /* 04 = Slot 2 */
pci_register_slot(0x05, PCI_CARD_NORMAL, 3, 4, 1, 2); /* 05 = Slot 3 */
pci_register_slot(0x06, PCI_CARD_NORMAL, 4, 1, 2, 3); /* 06 = Slot 4 */
pci_register_slot(0x07, PCI_CARD_SCSI, 1, 2, 3, 4); /* 07 = SCSI */
pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
device_add(&kbc_at_ami_device);
device_add(&sio_zb_device);
device_add(&intel_flash_bxt_device);
}
int
machine_at_ambradp60_init(const machine_t *model)
machine_at_586is_init(const machine_t *model)
{
int ret;
ret = bios_load_linear_combined("roms/machines/ambradp60/1004AF1P.BIO",
"roms/machines/ambradp60/1004AF1P.BI1",
0x1c000, 128);
ret = bios_load_linear("roms/machines/586is/IS.34",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
device_add(&amstrad_megapc_nvr_device);
device_add(&ide_pci_device);
pci_init(PCI_CONFIG_TYPE_2);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_IDE, 0, 0, 0, 0);
pci_register_slot(0x06, PCI_CARD_NORMAL, 3, 2, 1, 4);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 2, 1, 3, 4);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 3, 2, 4);
pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
device_add(&kbc_ps2_phoenix_device);
device_add(&sio_zb_device);
device_add_params(&fdc37c6xx_device, (void *) (FDC37C665 | FDC37C6XX_IDE_PRI));
device_add(&intel_flash_bxt_ami_device);
machine_at_award_common_init(model);
device_add(&i430lx_device);
@@ -352,6 +345,28 @@ machine_at_valuepointp60_init(const machine_t *model)
return ret;
}
void
machine_at_premiere_common_init(const machine_t *model, int pci_switch)
{
machine_at_common_init_ex(model, 2);
device_add(&amstrad_megapc_nvr_device);
device_add(&ide_pci_2ch_device);
pci_init(PCI_CONFIG_TYPE_2 | pci_switch);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_IDE, 0, 0, 0, 0);
pci_register_slot(0x06, PCI_CARD_NORMAL, 3, 2, 1, 4);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 2, 1, 3, 4);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 3, 2, 4);
pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
device_add(&kbc_ps2_phoenix_device);
device_add(&sio_zb_device);
device_add(&ide_rz1000_pci_single_channel_device);
device_add_params(&fdc37c6xx_device, (void *) (FDC37C665 | FDC37C6XX_IDE_SEC));
device_add(&intel_flash_bxt_ami_device);
}
int
machine_at_revenge_init(const machine_t *model)
{
@@ -371,42 +386,32 @@ machine_at_revenge_init(const machine_t *model)
return ret;
}
void
machine_at_award_common_init(const machine_t *model)
{
machine_at_common_init(model);
pci_init(PCI_CONFIG_TYPE_2 | PCI_NO_IRQ_STEERING);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x03, PCI_CARD_NORMAL, 1, 2, 3, 4); /* 03 = Slot 1 */
pci_register_slot(0x04, PCI_CARD_NORMAL, 2, 3, 4, 1); /* 04 = Slot 2 */
pci_register_slot(0x05, PCI_CARD_NORMAL, 3, 4, 1, 2); /* 05 = Slot 3 */
pci_register_slot(0x06, PCI_CARD_NORMAL, 4, 1, 2, 3); /* 06 = Slot 4 */
pci_register_slot(0x07, PCI_CARD_SCSI, 1, 2, 3, 4); /* 07 = SCSI */
pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
device_add(&kbc_at_ami_device);
device_add(&sio_zb_device);
device_add(&intel_flash_bxt_device);
}
int
machine_at_586is_init(const machine_t *model)
machine_at_m5pi_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/586is/IS.34",
ret = bios_load_linear_inverted("roms/machines/m5pi/M5PI10R.BIN",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_award_common_init(model);
machine_at_common_init(model);
device_add(&i430lx_device);
pci_init(PCI_CONFIG_TYPE_2 | PCI_NO_IRQ_STEERING);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_IDE, 0, 0, 0, 0);
pci_register_slot(0x0f, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0c, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0b, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
device_add(&i430lx_device);
device_add(&sio_zb_device);
device_add(&kbc_ps2_phoenix_device);
device_add(&ide_w83769f_pci_single_channel_device);
device_add_params(&fdc37c6xx_device, (void *) (FDC37C665 | FDC37C6XX_IDE_SEC));
device_add(&intel_flash_bxt_ami_device);
return ret;
}
@@ -447,32 +452,24 @@ machine_at_pb520r_init(const machine_t *model)
return ret;
}
/* OPTi 597 */
int
machine_at_m5pi_init(const machine_t *model)
machine_at_excalibur_init(const machine_t *model)
{
int ret;
ret = bios_load_linear_inverted("roms/machines/m5pi/M5PI10R.BIN",
0x000e0000, 131072, 0);
ret = bios_load_linear_inverted("roms/machines/excalibur/S75P.ROM",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
pci_init(PCI_CONFIG_TYPE_2 | PCI_NO_IRQ_STEERING);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_IDE, 0, 0, 0, 0);
pci_register_slot(0x0f, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0c, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0b, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
device_add(&i430lx_device);
device_add(&sio_zb_device);
device_add(&kbc_ps2_phoenix_device);
device_add(&ide_w83769f_pci_single_channel_device);
device_add_params(&fdc37c6xx_device, (void *) (FDC37C665 | FDC37C6XX_IDE_SEC));
device_add(&intel_flash_bxt_ami_device);
device_add(&opti5x7_device);
device_add(&ide_opti611_vlb_device);
device_add_params(&fdc37c6xx_device, (void *) FDC37C661);
device_add(&kbc_ps2_intel_ami_pci_device);
return ret;
}
@@ -508,27 +505,6 @@ machine_at_globalyst330_p5_init(const machine_t *model)
return ret;
}
int
machine_at_excalibur_init(const machine_t *model)
{
int ret;
ret = bios_load_linear_inverted("roms/machines/excalibur/S75P.ROM",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&opti5x7_device);
device_add(&ide_opti611_vlb_device);
device_add_params(&fdc37c6xx_device, (void *) FDC37C661);
device_add(&kbc_ps2_intel_ami_pci_device);
return ret;
}
int
machine_at_p5vl_init(const machine_t *model)
{
@@ -561,6 +537,7 @@ machine_at_p5vl_init(const machine_t *model)
return ret;
}
/* SiS 501 */
int
machine_at_excaliburpci2_init(const machine_t *model)
{
@@ -593,6 +570,29 @@ machine_at_excaliburpci2_init(const machine_t *model)
return ret;
}
void
machine_at_sp4_common_init(const machine_t *model)
{
machine_at_common_init(model);
pci_init(PCI_CONFIG_TYPE_1 | FLAG_TRC_CONTROLS_CPURST);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
/* Excluded: 02, 03, 04, 05, 06, 07, 08, 09, 0A, 0B, 0C, 0D, 0E, 0F, 10, 11, 12, 13, 14 */
pci_register_slot(0x0D, PCI_CARD_IDE, 1, 2, 3, 4);
/* Excluded: 02, 03*, 04*, 05*, 06*, 07*, 08* */
/* Slots: 09 (04), 0A (03), 0B (02), 0C (07) */
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x09, PCI_CARD_NORMAL, 4, 1, 2, 3);
device_add(&sis_85c50x_device);
device_add(&ide_cmd640_pci_device);
device_add(&kbc_ps2_ami_pci_device);
device_add_params(&fdc37c6xx_device, (void *) FDC37C665);
device_add(&intel_flash_bxt_device);
}
int
machine_at_p5sp4_init(const machine_t *model)
{

344
src/machine/m_at_socket5.c
View File

@@ -8,11 +8,9 @@
*
* Implementation of Socket 5 machines.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2019 Miran Grca.
* Copyright 2016-2025 Miran Grca.
*/
#include <stdio.h>
#include <stdint.h>
@@ -42,123 +40,7 @@
#include <86box/machine.h>
#include <86box/sound.h>
int
machine_at_plato_init(const machine_t *model)
{
int ret;
ret = bios_load_linear_combined("roms/machines/plato/1016ax1_.bio",
"roms/machines/plato/1016ax1_.bi1",
0x1d000, 128);
if (bios_only || !ret)
return ret;
machine_at_premiere_common_init(model, PCI_CAN_SWITCH_TYPE);
device_add(&i430nx_device);
return ret;
}
int
machine_at_dellplato_init(const machine_t *model)
{
int ret;
ret = bios_load_linear_combined("roms/machines/dellplato/1016AX1J.BIO",
"roms/machines/dellplato/1016AX1J.BI1",
0x1d000, 128);
if (bios_only || !ret)
return ret;
machine_at_premiere_common_init(model, PCI_CAN_SWITCH_TYPE);
device_add(&i430nx_device);
return ret;
}
int
machine_at_d842_init(const machine_t *model)
{
int ret = 0;
const char* fn;
/* No ROMs available */
if (!device_available(model->device))
return ret;
device_context(model->device);
fn = device_get_bios_file(machine_get_device(machine), device_get_config_bios("bios"), 0);
ret = bios_load_linear(fn, 0x000e0000, 131072, 0);
device_context_restore();
machine_at_common_init(model);
device_add(&ide_pci_2ch_device);
pci_init(PCI_CONFIG_TYPE_2 | PCI_NO_IRQ_STEERING);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0); /* Onboard */
pci_register_slot(0x03, PCI_CARD_VIDEO, 4, 0, 0, 0); /* Onboard */
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 3, 2, 4); /* Slot 01 */
pci_register_slot(0x0E, PCI_CARD_NORMAL, 2, 1, 3, 4); /* Slot 02 */
device_add(&kbc_ps2_pci_device);
device_add(&i430nx_device);
device_add(&sio_zb_device);
device_add_params(&fdc37c6xx_device, (void *) FDC37C665);
device_add(&intel_flash_bxt_device);
return ret;
}
static const device_config_t d842_config[] = {
// clang-format off
{
.name = "bios",
.description = "BIOS Version",
.type = CONFIG_BIOS,
.default_string = "d842",
.default_int = 0,
.file_filter = "",
.spinner = { 0 }, /*W1*/
.bios = {
{ .name = "PhoenixBIOS Pentium 1.03 - Revision 1.03.842", .internal_name = "d842_103", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/d842/d842.BIN", "" } },
{ .name = "PhoenixBIOS Pentium 1.03 - Revision 1.09.842", .internal_name = "d842_109", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/d842/d842_jul96.bin", "" } },
{ .name = "PhoenixBIOS Pentium 1.03 - Revision 1.10.842", .internal_name = "d842", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/d842/d842_jun98_1.bin", "" } },
{ .name = "PhoenixBIOS 4.04 - Revision 1.05.842", .internal_name = "d842_105", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/d842/d842_mar96.bin", "" } },
{ .name = "PhoenixBIOS 4.04 - Revision 1.06.842", .internal_name = "d842_106", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/d842/d842_apr98.bin", "" } },
{ .name = "PhoenixBIOS 4.04 - Revision 1.07.842", .internal_name = "d842_107", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/d842/d842_jun98.BIN", "" } },
{ .files_no = 0 }
},
},
{ .name = "", .description = "", .type = CONFIG_END }
// clang-format on
};
const device_t d842_device = {
.name = "Siemens-Nixdorf D842",
.internal_name = "d842_device",
.flags = 0,
.local = 0,
.init = NULL,
.close = NULL,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = d842_config
};
/* i430NX */
int
machine_at_ambradp90_init(const machine_t *model)
{
@@ -208,6 +90,25 @@ machine_at_p54np4_init(const machine_t *model)
return ret;
}
int
machine_at_dellplato_init(const machine_t *model)
{
int ret;
ret = bios_load_linear_combined("roms/machines/dellplato/1016AX1J.BIO",
"roms/machines/dellplato/1016AX1J.BI1",
0x1d000, 128);
if (bios_only || !ret)
return ret;
machine_at_premiere_common_init(model, PCI_CAN_SWITCH_TYPE);
device_add(&i430nx_device);
return ret;
}
int
machine_at_586ip_init(const machine_t *model)
{
@@ -226,6 +127,103 @@ machine_at_586ip_init(const machine_t *model)
return ret;
}
int
machine_at_plato_init(const machine_t *model)
{
int ret;
ret = bios_load_linear_combined("roms/machines/plato/1016ax1_.bio",
"roms/machines/plato/1016ax1_.bi1",
0x1d000, 128);
if (bios_only || !ret)
return ret;
machine_at_premiere_common_init(model, PCI_CAN_SWITCH_TYPE);
device_add(&i430nx_device);
return ret;
}
static const device_config_t d842_config[] = {
// clang-format off
{
.name = "bios",
.description = "BIOS Version",
.type = CONFIG_BIOS,
.default_string = "d842",
.default_int = 0,
.file_filter = "",
.spinner = { 0 }, /*W1*/
.bios = {
{ .name = "PhoenixBIOS Pentium 1.03 - Revision 1.03.842", .internal_name = "d842_103", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/d842/d842.BIN", "" } },
{ .name = "PhoenixBIOS Pentium 1.03 - Revision 1.09.842", .internal_name = "d842_109", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/d842/d842_jul96.bin", "" } },
{ .name = "PhoenixBIOS Pentium 1.03 - Revision 1.10.842", .internal_name = "d842", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/d842/d842_jun98_1.bin", "" } },
{ .name = "PhoenixBIOS 4.04 - Revision 1.05.842", .internal_name = "d842_105", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/d842/d842_mar96.bin", "" } },
{ .name = "PhoenixBIOS 4.04 - Revision 1.06.842", .internal_name = "d842_106", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/d842/d842_apr98.bin", "" } },
{ .name = "PhoenixBIOS 4.04 - Revision 1.07.842", .internal_name = "d842_107", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/d842/d842_jun98.BIN", "" } },
{ .files_no = 0 }
},
},
{ .name = "", .description = "", .type = CONFIG_END }
// clang-format on
};
const device_t d842_device = {
.name = "Siemens-Nixdorf D842",
.internal_name = "d842_device",
.flags = 0,
.local = 0,
.init = NULL,
.close = NULL,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = d842_config
};
int
machine_at_d842_init(const machine_t *model)
{
int ret = 0;
const char* fn;
/* No ROMs available */
if (!device_available(model->device))
return ret;
device_context(model->device);
fn = device_get_bios_file(machine_get_device(machine), device_get_config_bios("bios"), 0);
ret = bios_load_linear(fn, 0x000e0000, 131072, 0);
device_context_restore();
machine_at_common_init(model);
device_add(&ide_pci_2ch_device);
pci_init(PCI_CONFIG_TYPE_2 | PCI_NO_IRQ_STEERING);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0); /* Onboard */
pci_register_slot(0x03, PCI_CARD_VIDEO, 4, 0, 0, 0); /* Onboard */
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 3, 2, 4); /* Slot 01 */
pci_register_slot(0x0E, PCI_CARD_NORMAL, 2, 1, 3, 4); /* Slot 02 */
device_add(&kbc_ps2_pci_device);
device_add(&i430nx_device);
device_add(&sio_zb_device);
device_add_params(&fdc37c6xx_device, (void *) FDC37C665);
device_add(&intel_flash_bxt_device);
return ret;
}
int
machine_at_tek932_init(const machine_t *model)
{
@@ -256,6 +254,7 @@ machine_at_tek932_init(const machine_t *model)
return ret;
}
/* i430FX */
int
machine_at_acerv30_init(const machine_t *model)
{
@@ -386,6 +385,36 @@ machine_at_zappa_gpio_init(void)
machine_set_gpio_default(gpio);
}
int
machine_at_pt2000_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/ficpt2000/PT2000_v1.01.BIN",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
/* Should be VIA, but we do not emulate that yet. */
device_add(&kbc_ps2_holtek_device);
device_add(&i430fx_device);
device_add(&piix_device);
device_add_params(&pc873xx_device, (void *) (PC87332 | PCX730X_398));
device_add(&intel_flash_bxt_device);
return ret;
}
int
machine_at_zappa_init(const machine_t *model)
{
@@ -472,13 +501,13 @@ machine_at_hawk_init(const machine_t *model)
return ret;
}
/* OPTi 597 */
int
machine_at_pt2000_init(const machine_t *model)
machine_at_ncselp90_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/ficpt2000/PT2000_v1.01.BIN",
ret = bios_load_linear("roms/machines/ncselp90/elegancep90.bin",
0x000e0000, 131072, 0);
if (bios_only || !ret)
@@ -487,40 +516,18 @@ machine_at_pt2000_init(const machine_t *model)
machine_at_common_init(model);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
/* Should be VIA, but we do not emulate that yet. */
device_add(&kbc_ps2_holtek_device);
device_add(&i430fx_device);
device_add(&piix_device);
device_add_params(&pc873xx_device, (void *) (PC87332 | PCX730X_398));
device_add(&intel_flash_bxt_device);
pci_register_slot(0x10, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x11, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x13, PCI_CARD_NORMAL, 3, 4, 1, 2);
return ret;
}
int
machine_at_pat54pv_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/pat54pv/PAT54PV.bin",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&opti5x7_device);
device_add(&kbc_ps2_intel_ami_pci_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
device_add(&opti5x7_pci_device);
device_add(&opti822_device);
device_add(&sst_flash_29ee010_device);
device_add(&kbc_ps2_ami_pci_device);
device_add(&ide_opti611_vlb_device);
device_add_params(&fdc37c6xx_device, (void *) (FDC37C665 | FDC37C6XX_IDE_SEC));
device_add(&ide_vlb_2ch_device);
return ret;
}
@@ -556,35 +563,28 @@ machine_at_hot543_init(const machine_t *model)
}
int
machine_at_ncselp90_init(const machine_t *model)
machine_at_pat54pv_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/ncselp90/elegancep90.bin",
0x000e0000, 131072, 0);
ret = bios_load_linear("roms/machines/pat54pv/PAT54PV.bin",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x10, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x11, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x13, PCI_CARD_NORMAL, 3, 4, 1, 2);
device_add(&opti5x7_device);
device_add(&kbc_ps2_intel_ami_pci_device);
device_add(&opti5x7_pci_device);
device_add(&opti822_device);
device_add(&sst_flash_29ee010_device);
device_add(&kbc_ps2_ami_pci_device);
device_add(&ide_opti611_vlb_device);
device_add_params(&fdc37c6xx_device, (void *) (FDC37C665 | FDC37C6XX_IDE_SEC));
device_add(&ide_vlb_2ch_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
/* SiS 501 */
int
machine_at_p54sp4_init(const machine_t *model)
{
@@ -692,6 +692,7 @@ machine_at_ms5109_init(const machine_t *model)
return ret;
}
/* SiS 5501 */
int
machine_at_torino_init(const machine_t *model)
{
@@ -726,6 +727,7 @@ machine_at_torino_init(const machine_t *model)
return ret;
}
/* UMC 889x */
int
machine_at_hot539_init(const machine_t *model)
{

875
src/machine/m_at_socket7.c
View File

File diff suppressed because it is too large Load Diff

491
src/machine/m_at_socket7_3v.c
View File

@@ -8,11 +8,9 @@
*
* Implementation of Socket 7 (Single Voltage) machines.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2020 Miran Grca.
* Copyright 2016-2025 Miran Grca.
*/
#include <stdio.h>
#include <stdint.h>
@@ -43,75 +41,7 @@
#include <86box/plat_unused.h>
#include <86box/sound.h>
static void
machine_at_thor_gpio_init(void)
{
uint32_t gpio = 0xffffe1cf;
/* Register 0x0078 (Undocumented): */
/* Bit 5: 0 = Multiplier. */
/* Bit 4: 0 = Multiplier. */
/* 1.5: 0, 0. */
/* 3.0: 0, 1. */
/* 2.0: 1, 0. */
/* 2.5: 1, 1. */
/* Bit 1: 0 = Error beep, 1 = No error. */
if (cpu_dmulti <= 1.5)
gpio |= 0xffff0000;
else if ((cpu_dmulti > 1.5) && (cpu_dmulti <= 2.0))
gpio |= 0xffff0020;
else if ((cpu_dmulti > 2.0) && (cpu_dmulti <= 2.5))
gpio |= 0xffff0030;
else if (cpu_dmulti > 2.5)
gpio |= 0xffff0010;
/* Register 0x0079: */
/* Bit 7: 0 = Clear password, 1 = Keep password. */
/* Bit 6: 0 = NVRAM cleared by jumper, 1 = NVRAM normal. */
/* Bit 5: 0 = CMOS Setup disabled, 1 = CMOS Setup enabled. */
/* Bit 4: External CPU clock (Switch 8). */
/* Bit 3: External CPU clock (Switch 7). */
/* 50 MHz: Switch 7 = Off, Switch 8 = Off. */
/* 60 MHz: Switch 7 = On, Switch 8 = Off. */
/* 66 MHz: Switch 7 = Off, Switch 8 = On. */
/* Bit 2: 0 = On-board audio absent, 1 = On-board audio present. */
/* Bit 1: 0 = Soft-off capable power supply present, 1 = Soft-off capable power supply absent. */
/* Bit 0: 0 = Reserved. */
/* NOTE: A bit is read as 1 if switch is off, and as 0 if switch is on. */
if (cpu_busspeed <= 50000000)
gpio |= 0xffff0000;
else if ((cpu_busspeed > 50000000) && (cpu_busspeed <= 60000000))
gpio |= 0xffff0800;
else if (cpu_busspeed > 60000000)
gpio |= 0xffff1000;
machine_set_gpio_default(gpio);
}
static void
machine_at_thor_common_init(const machine_t *model, int has_video)
{
machine_at_common_init_ex(model, 2);
machine_at_thor_gpio_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x08, PCI_CARD_VIDEO, 4, 0, 0, 0);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 3, 4, 2, 1);
pci_register_slot(0x10, PCI_CARD_NORMAL, 4, 3, 2, 1);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
if (has_video && (gfxcard[0] == VID_INTERNAL))
device_add(machine_get_vid_device(machine));
device_add(&i430fx_device);
device_add(&piix_device);
device_add_params(&pc87306_device, (void *) PCX730X_AMI);
device_add(&intel_flash_bxt_ami_device);
}
/* i430FX */
static void
machine_at_p54tp4xe_common_init(const machine_t *model)
{
@@ -192,6 +122,75 @@ machine_at_exp8551_init(const machine_t *model)
return ret;
}
static void
machine_at_thor_gpio_init(void)
{
uint32_t gpio = 0xffffe1cf;
/* Register 0x0078 (Undocumented): */
/* Bit 5: 0 = Multiplier. */
/* Bit 4: 0 = Multiplier. */
/* 1.5: 0, 0. */
/* 3.0: 0, 1. */
/* 2.0: 1, 0. */
/* 2.5: 1, 1. */
/* Bit 1: 0 = Error beep, 1 = No error. */
if (cpu_dmulti <= 1.5)
gpio |= 0xffff0000;
else if ((cpu_dmulti > 1.5) && (cpu_dmulti <= 2.0))
gpio |= 0xffff0020;
else if ((cpu_dmulti > 2.0) && (cpu_dmulti <= 2.5))
gpio |= 0xffff0030;
else if (cpu_dmulti > 2.5)
gpio |= 0xffff0010;
/* Register 0x0079: */
/* Bit 7: 0 = Clear password, 1 = Keep password. */
/* Bit 6: 0 = NVRAM cleared by jumper, 1 = NVRAM normal. */
/* Bit 5: 0 = CMOS Setup disabled, 1 = CMOS Setup enabled. */
/* Bit 4: External CPU clock (Switch 8). */
/* Bit 3: External CPU clock (Switch 7). */
/* 50 MHz: Switch 7 = Off, Switch 8 = Off. */
/* 60 MHz: Switch 7 = On, Switch 8 = Off. */
/* 66 MHz: Switch 7 = Off, Switch 8 = On. */
/* Bit 2: 0 = On-board audio absent, 1 = On-board audio present. */
/* Bit 1: 0 = Soft-off capable power supply present, 1 = Soft-off capable power supply absent. */
/* Bit 0: 0 = Reserved. */
/* NOTE: A bit is read as 1 if switch is off, and as 0 if switch is on. */
if (cpu_busspeed <= 50000000)
gpio |= 0xffff0000;
else if ((cpu_busspeed > 50000000) && (cpu_busspeed <= 60000000))
gpio |= 0xffff0800;
else if (cpu_busspeed > 60000000)
gpio |= 0xffff1000;
machine_set_gpio_default(gpio);
}
static void
machine_at_thor_common_init(const machine_t *model, int has_video)
{
machine_at_common_init_ex(model, 2);
machine_at_thor_gpio_init();
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x08, PCI_CARD_VIDEO, 4, 0, 0, 0);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 3, 4, 2, 1);
pci_register_slot(0x10, PCI_CARD_NORMAL, 4, 3, 2, 1);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
if (has_video && (gfxcard[0] == VID_INTERNAL))
device_add(machine_get_vid_device(machine));
device_add(&i430fx_device);
device_add(&piix_device);
device_add_params(&pc87306_device, (void *) PCX730X_AMI);
device_add(&intel_flash_bxt_ami_device);
}
int
machine_at_gw2katx_init(const machine_t *model)
{
@@ -209,6 +208,38 @@ machine_at_gw2katx_init(const machine_t *model)
return ret;
}
int
machine_at_vectra54_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/vectra54/GT0724.22",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0F, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0D, PCI_CARD_VIDEO, 0, 0, 0, 0);
pci_register_slot(0x06, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x07, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x08, PCI_CARD_NORMAL, 3, 4, 1, 2);
if (gfxcard[0] == VID_INTERNAL)
device_add(&s3_phoenix_trio64_onboard_pci_device);
device_add(&i430fx_device);
device_add(&piix_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37XXX2 | FDC37C93X_NORMAL));
device_add(&sst_flash_29ee010_device);
return ret;
}
int
machine_at_thor_init(const machine_t *model)
{
@@ -521,11 +552,11 @@ machine_at_fmb_init(const machine_t *model)
}
int
machine_at_acerm3a_init(const machine_t *model)
machine_at_acerv35n_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/acerm3a/r01-b3.bin",
ret = bios_load_linear("roms/machines/acerv35n/v35nd1s1.bin",
0x000e0000, 131072, 0);
if (bios_only || !ret)
@@ -536,15 +567,15 @@ machine_at_acerm3a_init(const machine_t *model)
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x10, PCI_CARD_VIDEO, 4, 0, 0, 0);
pci_register_slot(0x11, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x13, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x14, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
device_add(&i430hx_device);
device_add(&piix3_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37XXX5 | FDC37C93X_NORMAL));
/* The chip is not marked FR but the BIOS accesses register 06h of GPIO. */
device_add_params(&fdc37c93x_device, (void *) (FDC37XXX5 | FDC37C93X_FR));
device_add(&sst_flash_29ee010_device);
return ret;
@@ -651,7 +682,6 @@ const device_t d943_device = {
int
machine_at_d943_init(const machine_t *model)
{
int ret = 0;
const char* fn;
@@ -691,6 +721,7 @@ machine_at_d943_init(const machine_t *model)
return ret;
}
/* i430VX */
int
machine_at_gw2kma_init(const machine_t *model)
{
@@ -727,6 +758,110 @@ machine_at_gw2kma_init(const machine_t *model)
return ret;
}
/* SiS 5501 */
static const device_config_t c5sbm2_config[] = {
// clang-format off
{
.name = "bios",
.description = "BIOS Version",
.type = CONFIG_BIOS,
.default_string = "5sbm2",
.default_int = 0,
.file_filter = "",
.spinner = { 0 },
.bios = {
{ .name = "AwardBIOS v4.50GP - Revision 07/17/1995", .internal_name = "5sbm2_v450gp", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/5sbm2/5SBM0717.BIN", "" } },
{ .name = "AwardBIOS v4.50PG - Revision 03/26/1996", .internal_name = "5sbm2", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/5sbm2/5SBM0326.BIN", "" } },
{ .name = "AwardBIOS v4.51PG - Revision 2.2 (by Unicore Software)", .internal_name = "5sbm2_451pg", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/5sbm2/2A5ICC3A.BIN", "" } },
{ .files_no = 0 }
},
},
{ .name = "", .description = "", .type = CONFIG_END }
// clang-format on
};
const device_t c5sbm2_device = {
.name = "Chaintech 5SBM/5SBM2 (M103)",
.internal_name = "5sbm2_device",
.flags = 0,
.local = 0,
.init = NULL,
.close = NULL,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = c5sbm2_config
};
int
machine_at_5sbm2_init(const machine_t *model)
{
int ret = 0;
const char* fn;
/* No ROMs available */
if (!device_available(model->device))
return ret;
device_context(model->device);
fn = device_get_bios_file(machine_get_device(machine), device_get_config_bios("bios"), 0);
ret = bios_load_linear(fn, 0x000e0000, 131072, 0);
device_context_restore();
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1 | FLAG_TRC_CONTROLS_CPURST);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x11, PCI_CARD_NORMAL, 3, 4, 1, 2);
device_add(&kbc_at_ami_device);
device_add(&sis_550x_device);
device_add_params(&um866x_device, (void *) UM8663AF);
device_add(&sst_flash_29ee010_device);
return ret;
}
/* SiS 5511 */
int
machine_at_amis727_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/amis727/S727p.rom",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1 | FLAG_TRC_CONTROLS_CPURST);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0xFE, 0xFF, 0, 0);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 4, 1, 2, 3);
device_add(&sis_5511_device);
device_add(&kbc_ps2_intel_ami_pci_device);
device_add_params(&fdc37c6xx_device, (void *) FDC37C665);
device_add(&intel_flash_bxt_device);
return ret;
}
static const device_config_t ap5s_config[] = {
// clang-format off
{
@@ -798,169 +933,6 @@ machine_at_ap5s_init(const machine_t *model)
return ret;
}
int
machine_at_ms5124_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/ms5124/AG77.ROM",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1 | FLAG_TRC_CONTROLS_CPURST);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0xFE, 0xFF, 0, 0);
pci_register_slot(0x10, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x11, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x12, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 2, 3, 4, 1);
device_add(&sis_5511_device);
device_add(&kbc_ps2_ami_device);
device_add_params(&w837x7_device, (void *) (W83787F | W837X7_KEY_88));
device_add(&sst_flash_29ee010_device);
return ret;
}
int
machine_at_amis727_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/amis727/S727p.rom",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1 | FLAG_TRC_CONTROLS_CPURST);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0xFE, 0xFF, 0, 0);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 4, 1, 2, 3);
device_add(&sis_5511_device);
device_add(&kbc_ps2_intel_ami_pci_device);
device_add_params(&fdc37c6xx_device, (void *) FDC37C665);
device_add(&intel_flash_bxt_device);
return ret;
}
int
machine_at_vectra54_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/vectra54/GT0724.22",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0F, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0D, PCI_CARD_VIDEO, 0, 0, 0, 0);
pci_register_slot(0x06, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x07, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x08, PCI_CARD_NORMAL, 3, 4, 1, 2);
if (gfxcard[0] == VID_INTERNAL)
device_add(&s3_phoenix_trio64_onboard_pci_device);
device_add(&i430fx_device);
device_add(&piix_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37XXX2 | FDC37C93X_NORMAL));
device_add(&sst_flash_29ee010_device);
return ret;
}
static const device_config_t c5sbm2_config[] = {
// clang-format off
{
.name = "bios",
.description = "BIOS Version",
.type = CONFIG_BIOS,
.default_string = "5sbm2",
.default_int = 0,
.file_filter = "",
.spinner = { 0 },
.bios = {
{ .name = "AwardBIOS v4.50GP - Revision 07/17/1995", .internal_name = "5sbm2_v450gp", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/5sbm2/5SBM0717.BIN", "" } },
{ .name = "AwardBIOS v4.50PG - Revision 03/26/1996", .internal_name = "5sbm2", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/5sbm2/5SBM0326.BIN", "" } },
{ .name = "AwardBIOS v4.51PG - Revision 2.2 (by Unicore Software)", .internal_name = "5sbm2_451pg", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/5sbm2/2A5ICC3A.BIN", "" } },
{ .files_no = 0 }
},
},
{ .name = "", .description = "", .type = CONFIG_END }
// clang-format on
};
const device_t c5sbm2_device = {
.name = "Chaintech 5SBM/5SBM2 (M103)",
.internal_name = "5sbm2_device",
.flags = 0,
.local = 0,
.init = NULL,
.close = NULL,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = c5sbm2_config
};
int
machine_at_5sbm2_init(const machine_t *model)
{
int ret = 0;
const char* fn;
/* No ROMs available */
if (!device_available(model->device))
return ret;
device_context(model->device);
fn = device_get_bios_file(machine_get_device(machine), device_get_config_bios("bios"), 0);
ret = bios_load_linear(fn, 0x000e0000, 131072, 0);
device_context_restore();
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1 | FLAG_TRC_CONTROLS_CPURST);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x11, PCI_CARD_NORMAL, 3, 4, 1, 2);
device_add(&kbc_at_ami_device);
device_add(&sis_550x_device);
device_add_params(&um866x_device, (void *) UM8663AF);
device_add(&sst_flash_29ee010_device);
return ret;
}
int
machine_at_pc140_6260_init(const machine_t *model)
{
@@ -991,3 +963,32 @@ machine_at_pc140_6260_init(const machine_t *model)
return ret;
}
int
machine_at_ms5124_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/ms5124/AG77.ROM",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1 | FLAG_TRC_CONTROLS_CPURST);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0xFE, 0xFF, 0, 0);
pci_register_slot(0x10, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x11, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x12, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 2, 3, 4, 1);
device_add(&sis_5511_device);
device_add(&kbc_ps2_ami_device);
device_add_params(&w837x7_device, (void *) (W83787F | W837X7_KEY_88));
device_add(&sst_flash_29ee010_device);
return ret;
}

306
src/machine/m_at_socket8.c
View File

@@ -8,11 +8,9 @@
*
* Implementation of Socket 8 machines.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2019 Miran Grca.
* Copyright 2016-2025 Miran Grca.
*/
#include <stdio.h>
#include <stdint.h>
@@ -40,6 +38,7 @@
#include "cpu.h"
#include <86box/machine.h>
/* i450KX */
int
machine_at_ap61_init(const machine_t *model)
{
@@ -68,7 +67,6 @@ machine_at_ap61_init(const machine_t *model)
device_add(&kbc_ps2_acer_pci_device);
device_add_params(&fdc37c6xx_device, (void *) FDC37C665);
device_add(&sst_flash_29ee010_device);
// device_add(&intel_flash_bxt_device);
return ret;
}
@@ -107,64 +105,79 @@ machine_at_p6rp4_init(const machine_t *model)
return ret;
}
static const device_config_t ficpo6000_config[] = {
// clang-format off
{
.name = "bios",
.description = "BIOS Version",
.type = CONFIG_BIOS,
.default_string = "405F03C",
.default_int = 0,
.file_filter = "",
.spinner = { 0 }, /*W1*/
.bios = {
{ .name = "PhoenixBIOS 4.05 - Revision 405F03C (CD-ROM Boot support)", .internal_name = "405F03C", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/ficpo6000/405F03C.ROM", "" } },
{ .name = "PhoenixBIOS 4.05 - Revision 405F05C (No CD-ROM Boot support)", .internal_name = "405F05C", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/ficpo6000/405F05C.ROM", "" } },
{ .files_no = 0 }
},
},
{ .name = "", .description = "", .type = CONFIG_END }
// clang-format on
};
const device_t ficpo6000_device = {
.name = "FIC PO-6000",
.internal_name = "ficpo6000_device",
.flags = 0,
.local = 0,
.init = NULL,
.close = NULL,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = ficpo6000_config
};
int
machine_at_686nx_init(const machine_t *model)
machine_at_ficpo6000_init(const machine_t *model)
{
int ret;
int ret = 0;
const char* fn;
ret = bios_load_linear("roms/machines/686nx/6nx.140",
0x000e0000, 131072, 0);
if (bios_only || !ret)
/* No ROMs available */
if (!device_available(model->device))
return ret;
machine_at_common_init(model);
device_context(model->device);
fn = device_get_bios_file(machine_get_device(machine), device_get_config_bios("bios"), 0);
ret = bios_load_linear(fn, 0x000e0000, 131072, 0);
device_context_restore();
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3);
device_add(&i440fx_device);
device_add(&piix3_device);
device_add(&kbc_ps2_ami_pci_device); // Uses the AMIKEY keyboard controller
device_add_params(&um8669f_device, (void *) 0);
device_add(&intel_flash_bxt_device);
return ret;
}
int
machine_at_mb600n_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/mb600n/60915cs.rom",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x11, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x13, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x14, PCI_CARD_NORMAL, 4, 1, 2, 3);
device_add(&i440fx_device);
device_add(&piix3_device);
device_add(&kbc_ps2_ami_pci_device);
device_add_params(&fdc37c669_device, (void *) 0);
pci_register_slot(0x19, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x14, PCI_CARD_NORTHBRIDGE_SEC, 0, 0, 0, 0);
pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x03, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x04, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x05, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x06, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0c, PCI_CARD_IDE, 0, 0, 0, 0);
device_add(&i450kx_device);
device_add(&sio_zb_device);
device_add(&ide_cmd646_device);
/* Input port bit 2 must be 1 or CMOS Setup is disabled. */
device_add_params(&pc87306_device, (void *) PCX730X_PHOENIX_42);
device_add(&intel_flash_bxt_device);
return ret;
}
/* i440FX */
int
machine_at_acerv60n_init(const machine_t *model)
{
@@ -196,11 +209,27 @@ machine_at_acerv60n_init(const machine_t *model)
}
int
machine_at_lgibmx61_init(const machine_t *model)
machine_at_p65up5_cp6nd_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/lgibmx61/bios.rom",
ret = bios_load_linear("roms/machines/p65up5/ND6I0218.AWD",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_p65up5_common_init(model, &i440fx_device);
return ret;
}
int
machine_at_8600ttc_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/8600ttc/TTC0715B.ROM",
0x000e0000, 131072, 0);
if (bios_only || !ret)
@@ -211,51 +240,15 @@ machine_at_lgibmx61_init(const machine_t *model)
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3);
device_add(&i440fx_device);
device_add(&piix3_device);
device_add(&kbc_ps2_ami_device);
device_add_params(&w83877_device, (void *) (W83877F | W83877_250));
device_add(&sst_flash_29ee010_device);
return ret;
}
int
machine_at_vs440fx_init(const machine_t *model)
{
int ret;
ret = bios_load_linear_combined2("roms/machines/vs440fx/1018CS1_.BIO",
"roms/machines/vs440fx/1018CS1_.BI1",
"roms/machines/vs440fx/1018CS1_.BI2",
"roms/machines/vs440fx/1018CS1_.BI3",
"roms/machines/vs440fx/1018CS1_.RCV",
0x3a000, 128);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x11, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x13, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
device_add(&i440fx_device);
device_add(&piix3_device);
device_add_params(&pc87307_device, (void *) (PCX730X_AMI | PCX7307_PC87307));
device_add(&intel_flash_bxt_ami_device);
if (sound_card_current[0] == SOUND_INTERNAL)
device_add(machine_get_snd_device(machine));
device_add(&kbc_ps2_ami_pci_device);
device_add_params(&fdc37c669_device, (void *) 0);
device_add(&intel_flash_bxt_device);
return ret;
}
@@ -332,6 +325,35 @@ machine_at_gw2kvenus_init(const machine_t *model)
return ret;
}
int
machine_at_686nx_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/686nx/6nx.140",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3);
device_add(&i440fx_device);
device_add(&piix3_device);
device_add(&kbc_ps2_ami_pci_device); // Uses the AMIKEY keyboard controller
device_add_params(&um8669f_device, (void *) 0);
device_add(&intel_flash_bxt_device);
return ret;
}
int
machine_at_ap440fx_init(const machine_t *model)
{
@@ -371,11 +393,47 @@ machine_at_ap440fx_init(const machine_t *model)
}
int
machine_at_8600ttc_init(const machine_t *model)
machine_at_vs440fx_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/8600ttc/TTC0715B.ROM",
ret = bios_load_linear_combined2("roms/machines/vs440fx/1018CS1_.BIO",
"roms/machines/vs440fx/1018CS1_.BI1",
"roms/machines/vs440fx/1018CS1_.BI2",
"roms/machines/vs440fx/1018CS1_.BI3",
"roms/machines/vs440fx/1018CS1_.RCV",
0x3a000, 128);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x11, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x13, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
device_add(&i440fx_device);
device_add(&piix3_device);
device_add_params(&pc87307_device, (void *) (PCX730X_AMI | PCX7307_PC87307));
device_add(&intel_flash_bxt_ami_device);
if (sound_card_current[0] == SOUND_INTERNAL)
device_add(machine_get_snd_device(machine));
return ret;
}
int
machine_at_lgibmx61_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/lgibmx61/bios.rom",
0x000e0000, 131072, 0);
if (bios_only || !ret)
@@ -386,15 +444,15 @@ machine_at_8600ttc_init(const machine_t *model)
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x08, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x09, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 4, 1, 2, 3);
device_add(&i440fx_device);
device_add(&piix3_device);
device_add(&kbc_ps2_ami_pci_device);
device_add_params(&fdc37c669_device, (void *) 0);
device_add(&intel_flash_bxt_device);
device_add(&kbc_ps2_ami_device);
device_add_params(&w83877_device, (void *) (W83877F | W83877_250));
device_add(&sst_flash_29ee010_device);
return ret;
}
@@ -427,39 +485,31 @@ machine_at_m6mi_init(const machine_t *model)
return ret;
}
void
machine_at_p65up5_common_init(const machine_t *model, const device_t *northbridge)
{
machine_at_common_init(model);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x09, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x0A, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0B, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 4, 1, 2, 3);
device_add(northbridge);
device_add(&piix3_ioapic_device);
device_add(&kbc_ps2_ami_pci_device);
device_add_params(&w83877_device, (void *) (W83877F | W83877_3F0));
device_add(&sst_flash_29ee010_device);
device_add(&ioapic_device);
}
int
machine_at_p65up5_cp6nd_init(const machine_t *model)
machine_at_mb600n_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/p65up5/ND6I0218.AWD",
ret = bios_load_linear("roms/machines/mb600n/60915cs.rom",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_p65up5_common_init(model, &i440fx_device);
machine_at_common_init(model);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x11, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x13, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x14, PCI_CARD_NORMAL, 4, 1, 2, 3);
device_add(&i440fx_device);
device_add(&piix3_device);
device_add(&kbc_ps2_ami_pci_device);
device_add_params(&fdc37c669_device, (void *) 0);
device_add(&intel_flash_bxt_device);
return ret;
}

71
src/machine/m_at_sockets7.c
View File

@@ -8,11 +8,9 @@
*
* Implementation of Super Socket 7 machines.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2020 Miran Grca.
* Copyright 2016-2025 Miran Grca.
*/
#include <stdio.h>
#include <stdint.h>
@@ -40,6 +38,7 @@
#include <86box/snd_ac97.h>
#include <86box/clock.h>
/* ALi ALADDiN V */
int
machine_at_p5a_init(const machine_t *model)
{
@@ -207,6 +206,7 @@ machine_at_5ax_init(const machine_t *model)
return ret;
}
/* VIA MVP3 */
int
machine_at_ax59pro_init(const machine_t *model)
{
@@ -239,6 +239,38 @@ machine_at_ax59pro_init(const machine_t *model)
return ret;
}
int
machine_at_delhi3_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/delhi3/DELHI3.ROM",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x13, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1);
device_add(&via_mvp3_device);
device_add(&via_vt82c596a_device);
device_add(&kbc_ps2_ami_pci_device);
device_add_params(&w83877_device, (void *) (W83877TF | W83877_250));
device_add(&sst_flash_39sf020_device);
spd_register(SPD_TYPE_SDRAM, 0x3, 256);
if ((sound_card_current[0] == SOUND_INTERNAL) && machine_get_snd_device(machine))
device_add(machine_get_snd_device(machine));
return ret;
}
int
machine_at_mvp3_init(const machine_t *model)
{
@@ -343,38 +375,7 @@ machine_at_5emapro_init(const machine_t *model)
return ret;
}
int
machine_at_delhi3_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/delhi3/DELHI3.ROM",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x13, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1);
device_add(&via_mvp3_device);
device_add(&via_vt82c596a_device);
device_add(&kbc_ps2_ami_pci_device);
device_add_params(&w83877_device, (void *) (W83877TF | W83877_250));
device_add(&sst_flash_39sf020_device);
spd_register(SPD_TYPE_SDRAM, 0x3, 256);
if ((sound_card_current[0] == SOUND_INTERNAL) && machine_get_snd_device(machine))
device_add(machine_get_snd_device(machine));
return ret;
}
/* SiS 5591 */
int
machine_at_5sg100_init(const machine_t *model)
{

12
src/machine/m_at_t3100e.c
View File

@@ -117,15 +117,13 @@
* bit 2 set for single-pixel LCD font
* bits 0,1 for display font
*
*
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Authors: John Elliott, <jce@seasip.info>
* Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
* John Elliott, <jce@seasip.info>
*
* Copyright 2017-2018 Fred N. van Kempen.
* Copyright 2016-2018 Miran Grca.
* Copyright 2008-2018 John Elliott.
* Copyright 2008-2025 John Elliott.
* Copyright 2017-2025 Fred N. van Kempen.
* Copyright 2016-2025 Miran Grca.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by

1413
src/machine/m_ps1_hdc.c
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File diff suppressed because it is too large Load Diff

798
src/machine/m_xt.c
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File diff suppressed because it is too large Load Diff

95
src/machine/m_xt_compaq.c
View File

@@ -1,95 +0,0 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Emulation of various Compaq XT-class PC's.
*
*
*
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* TheCollector1995, <mariogplayer@gmail.com>
*
* Copyright 2008-2019 Sarah Walker.
* Copyright 2016-2019 Miran Grca.
*/
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <wchar.h>
#include <86box/86box.h>
#include "cpu.h"
#include <86box/nmi.h>
#include <86box/timer.h>
#include <86box/pit.h>
#include <86box/mem.h>
#include <86box/rom.h>
#include <86box/device.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/fdc_ext.h>
#include <86box/gameport.h>
#include <86box/keyboard.h>
#include <86box/lpt.h>
#include <86box/machine.h>
int
machine_xt_compaq_deskpro_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/deskpro/Compaq - BIOS - Revision J - 106265-002.bin",
0x000fe000, 8192, 0);
if (bios_only || !ret)
return ret;
machine_common_init(model);
pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_xt);
device_add(&kbc_xt_compaq_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_xt_device);
nmi_init();
standalone_gameport_type = &gameport_200_device;
lpt_t *lpt = device_add_inst(&lpt_port_device, 1);
lpt_port_setup(lpt, LPT_MDA_ADDR);
lpt_set_3bc_used(1);
return ret;
}
int
machine_xt_compaq_portable_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/portable/compaq portable plus 100666-001 rev c u47.bin",
0x000fe000, 8192, 0);
if (bios_only || !ret)
return ret;
machine_common_init(model);
pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_xt);
device_add(&kbc_xt_compaq_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_xt_device);
nmi_init();
if (joystick_type)
device_add(&gameport_200_device);
lpt_t *lpt = device_add_inst(&lpt_port_device, 1);
lpt_port_setup(lpt, LPT_MDA_ADDR);
lpt_set_3bc_used(1);
return ret;
}

504
src/machine/m_xt_laserxt.c
View File

@@ -1,504 +0,0 @@
/*This is the chipset used in the LaserXT series model*/
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#include <86box/86box.h>
#include "cpu.h"
#include <86box/io.h>
#include <86box/mem.h>
#include <86box/nmi.h>
#include <86box/timer.h>
#include <86box/pit.h>
#include <86box/rom.h>
#include <86box/machine.h>
#include <86box/device.h>
#include <86box/timer.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/fdc_ext.h>
#include <86box/gameport.h>
#include <86box/keyboard.h>
#include <86box/plat_unused.h>
#define EMS_TOTAL_MAX 0x00100000
typedef struct
{
uint8_t page;
uint8_t ctrl;
uint32_t phys;
uint32_t virt;
mem_mapping_t mapping;
uint8_t *ram;
void *parent;
} lxt_ems_t;
typedef struct
{
int ems_base_idx;
lxt_ems_t ems[4];
uint16_t io_base;
uint32_t base;
uint32_t mem_size;
uint8_t *ram;
void *parent;
} lxt_ems_board_t;
typedef struct
{
int is_lxt3;
lxt_ems_board_t *ems_boards[2];
} lxt_t;
static void
ems_update_virt(lxt_ems_t *dev, uint8_t new_page)
{
lxt_ems_board_t *board = (lxt_ems_board_t *) dev->parent;
lxt_t *lxt = (lxt_t *) board->parent;
dev->page = new_page;
if (new_page & 0x80) {
if (lxt->is_lxt3) {
/* Point invalid pages at 1 MB which is outside the maximum. */
if ((new_page & 0x7f) >= 0x40)
dev->virt = EMS_TOTAL_MAX;
else
dev->virt = ((new_page & 0x7f) << 14);
} else
dev->virt = ((new_page & 0x0f) << 14) + ((new_page & 0x40) << 12);
if (dev->virt >= board->mem_size)
dev->virt = EMS_TOTAL_MAX;
} else
dev->virt = EMS_TOTAL_MAX;
dev->ram = board->ram + dev->virt;
if ((new_page & 0x80) && (dev->virt != EMS_TOTAL_MAX)) {
mem_mapping_enable(&dev->mapping);
mem_mapping_set_exec(&dev->mapping, dev->ram);
mem_mapping_set_p(&dev->mapping, dev->ram);
} else
mem_mapping_disable(&dev->mapping);
flushmmucache();
}
static void
lxt_ems_out(uint16_t port, uint8_t val, void *priv)
{
lxt_ems_board_t *dev = (lxt_ems_board_t *) priv;
uint8_t reg = port >> 14;
uint32_t saddrs[8] = { 0xc4000, 0xc8000, 0xcc000, 0xd0000,
0xd4000, 0xd8000, 0xdc000, 0xe0000 };
uint32_t saddr;
if (port & 0x0001) {
dev->ems[reg].ctrl = val;
if (reg < 0x03) {
dev->ems_base_idx = (dev->ems_base_idx & ~(0x04 >> (2 - reg))) |
((dev->ems[reg].ctrl & 0x80) >> (7 - reg));
saddr = saddrs[dev->ems_base_idx];
for (uint8_t i = 0; i < 4; i++) {
uint32_t base = saddr + (i * 0x4000);
mem_mapping_set_addr(&dev->ems[i].mapping, base, 0x4000);
if (!(dev->ems[i].page & 0x80) || (dev->ems[i].virt == EMS_TOTAL_MAX))
mem_mapping_disable(&dev->ems[i].mapping);
}
}
flushmmucache();
} else if (!(port & 0x0001)) {
dev->ems[reg].page = val;
ems_update_virt(&dev->ems[reg], val);
}
}
static uint8_t
lxt_ems_in(uint16_t port, void *priv)
{
lxt_ems_board_t *dev = (lxt_ems_board_t *) priv;
uint8_t reg = port >> 14;
uint8_t ret = 0xff;
if (port & 0x0001)
ret = dev->ems[reg].ctrl;
else
ret = dev->ems[reg].page;
return ret;
}
static void
lxt_ems_write(uint32_t addr, uint8_t val, void *priv)
{
uint8_t *mem = (uint8_t *) priv;
mem[addr & 0x3fff] = val;
}
static void
lxt_ems_writew(uint32_t addr, uint16_t val, void *priv)
{
uint8_t *mem = (uint8_t *) priv;
*(uint16_t *) &(mem[addr & 0x3fff]) = val;
}
static uint8_t
lxt_ems_read(uint32_t addr, void *priv)
{
uint8_t *mem = (uint8_t *) priv;
uint8_t ret = 0xff;
ret = mem[addr & 0x3fff];
return ret;
}
static uint16_t
lxt_ems_readw(uint32_t addr, void *priv)
{
uint8_t *mem = (uint8_t *) priv;
uint16_t ret = 0xff;
ret = *(uint16_t *) &(mem[addr & 0x3fff]);
return ret;
}
static lxt_ems_board_t *
lxt_ems_init(lxt_t *parent, int en, uint16_t io, uint32_t mem)
{
lxt_ems_board_t *dev = (lxt_ems_board_t *) calloc(1, sizeof(lxt_ems_board_t));
if (en) {
dev->parent = parent;
if (io != 0x0000) {
io_sethandler(io , 0x0002, lxt_ems_in, NULL, NULL, lxt_ems_out, NULL, NULL, dev);
io_sethandler(io | 0x4000, 0x0002, lxt_ems_in, NULL, NULL, lxt_ems_out, NULL, NULL, dev);
io_sethandler(io | 0x8000, 0x0002, lxt_ems_in, NULL, NULL, lxt_ems_out, NULL, NULL, dev);
io_sethandler(io | 0xc000, 0x0002, lxt_ems_in, NULL, NULL, lxt_ems_out, NULL, NULL, dev);
}
dev->ram = (uint8_t *) calloc(mem, sizeof(uint8_t));
dev->mem_size = mem;
for (uint8_t i = 0; i < 4; i++) {
uint8_t *ptr = dev->ram + (i << 14);
if (parent->is_lxt3)
mem_mapping_add(&dev->ems[i].mapping, 0xe0000 + (i << 14), 0x4000,
lxt_ems_read, lxt_ems_readw, NULL,
lxt_ems_write, lxt_ems_writew, NULL,
ptr, 0, ptr);
else
mem_mapping_add(&dev->ems[i].mapping, 0xe0000 + (i << 14), 0x4000,
lxt_ems_read, NULL, NULL,
lxt_ems_write, NULL, NULL,
ptr, 0, ptr);
mem_mapping_disable(&dev->ems[i].mapping);
dev->ems[i].page = 0x7f;
dev->ems[i].ctrl = (i == 3) ? 0x00 : 0x80;
dev->ems[i].parent = dev;
ems_update_virt(&(dev->ems[i]), dev->ems[i].page);
}
}
return dev;
}
static void
lxt_close(void *priv)
{
lxt_t *dev = (lxt_t *) priv;
int ems_boards = (1 - dev->is_lxt3) + 1;
for (int i = 0; i < ems_boards; i++)
if (dev->ems_boards[i] != NULL) {
if (dev->ems_boards[i]->ram != NULL)
free(dev->ems_boards[i]->ram);
free(dev->ems_boards[i]);
}
free(dev);
}
static void *
lxt_init(const device_t *info)
{
lxt_t * dev = (lxt_t *) calloc(1, sizeof(lxt_t));
int ems_boards = (1 - info->local) + 1;
int ems_en[2] = { 0 };
uint16_t ems_io[2] = { 0 };
uint32_t ems_mem[2] = { 0 };
char conf_str[512] = { 0 };
dev->is_lxt3 = info->local;
for (int i = 0; i < ems_boards; i++) {
sprintf(conf_str, "ems_%i_enable", i + 1);
ems_en[i] = device_get_config_int(conf_str);
sprintf(conf_str, "ems_%i_base", i + 1);
ems_io[i] = device_get_config_hex16(conf_str);
sprintf(conf_str, "ems_%i_mem_size", i + 1);
ems_mem[i] = device_get_config_int(conf_str) << 10;
dev->ems_boards[i] = lxt_ems_init(dev, ems_en[i], ems_io[i], ems_mem[i]);
}
mem_set_mem_state(0x0c0000, 0x40000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
return dev;
}
static const device_config_t laserxt_config[] = {
{
.name = "ems_1_base",
.description = "EMS 1 Address",
.type = CONFIG_HEX16,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = { 0 },
.selection = {
{ .description = "Disabled", .value = 0 },
{ .description = "0x208", .value = 0x208 },
{ .description = "0x218", .value = 0x218 },
{ .description = "0x258", .value = 0x258 },
{ .description = "0x268", .value = 0x268 },
{ .description = "0x2A8", .value = 0x2a8 },
{ .description = "0x2B8", .value = 0x2b8 },
{ .description = "0x2E8", .value = 0x2e8 },
{ .description = "" }
},
.bios = { { 0 } }
},
{
.name = "ems_2_base",
.description = "EMS 2 Address",
.type = CONFIG_HEX16,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = { 0 },
.selection = {
{ .description = "Disabled", .value = 0 },
{ .description = "0x208", .value = 0x208 },
{ .description = "0x218", .value = 0x218 },
{ .description = "0x258", .value = 0x258 },
{ .description = "0x268", .value = 0x268 },
{ .description = "0x2A8", .value = 0x2a8 },
{ .description = "0x2B8", .value = 0x2b8 },
{ .description = "0x2E8", .value = 0x2e8 },
{ .description = "" }
},
.bios = { { 0 } }
},
{
.name = "ems_1_mem_size",
.description = "EMS 1 Memory Size",
.type = CONFIG_SPINNER,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = {
.min = 0,
.max = 512,
.step = 32
},
.selection = { { 0 } },
.bios = { { 0 } }
},
{
.name = "ems_2_mem_size",
.description = "EMS 2 Memory Size",
.type = CONFIG_SPINNER,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = {
.min = 0,
.max = 512,
.step = 32
},
.selection = { { 0 } },
.bios = { { 0 } }
},
{
.name = "ems_1_enable",
.description = "Enable EMS 1",
.type = CONFIG_BINARY,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = { 0 },
.selection = { { 0 } },
.bios = { { 0 } }
},
{
.name = "ems_2_enable",
.description = "Enable EMS 2",
.type = CONFIG_BINARY,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = { 0 },
.selection = { { 0 } },
.bios = { { 0 } }
},
{ .name = "", .description = "", .type = CONFIG_END }
};
const device_t laserxt_device = {
.name = "VTech Laser Turbo XT",
.internal_name = "laserxt",
.flags = 0,
.local = 0,
.init = lxt_init,
.close = lxt_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = laserxt_config
};
static const device_config_t lxt3_config[] = {
{
.name = "ems_1_base",
.description = "EMS Address",
.type = CONFIG_HEX16,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = { 0 },
.selection = {
{ .description = "Disabled", .value = 0 },
{ .description = "0x208", .value = 0x208 },
{ .description = "0x218", .value = 0x218 },
{ .description = "0x258", .value = 0x258 },
{ .description = "0x268", .value = 0x268 },
{ .description = "0x2A8", .value = 0x2a8 },
{ .description = "0x2B8", .value = 0x2b8 },
{ .description = "0x2E8", .value = 0x2e8 },
{ .description = "" }
},
.bios = { { 0 } }
},
{
.name = "ems_1_mem_size",
.description = "EMS Memory Size",
.type = CONFIG_SPINNER,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = {
.min = 0,
.max = 1024,
.step = 32
},
.selection = { { 0 } },
.bios = { { 0 } }
},
{
.name = "ems_1_enable",
.description = "Enable EMS",
.type = CONFIG_BINARY,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = { 0 },
.selection = { { 0 } },
.bios = { { 0 } }
},
{ .name = "", .description = "", .type = CONFIG_END }
};
const device_t lxt3_device = {
.name = "VTech Laser Turbo XT",
.internal_name = "laserxt",
.flags = 0,
.local = 1,
.init = lxt_init,
.close = lxt_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = lxt3_config
};
static void
machine_xt_laserxt_common_init(const machine_t *model,int is_lxt3)
{
machine_common_init(model);
pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_xt);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_xt_device);
nmi_init();
standalone_gameport_type = &gameport_200_device;
device_add(is_lxt3 ? &lxt3_device : &laserxt_device);
device_add(&kbc_xt_lxt3_device);
}
int
machine_xt_laserxt_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/ltxt/27c64.bin",
0x000fe000, 8192, 0);
if (bios_only || !ret)
return ret;
machine_xt_laserxt_common_init(model, 0);
return ret;
}
int
machine_xt_lxt3_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/lxt3/27c64d.bin",
0x000fe000, 8192, 0);
if (bios_only || !ret)
return ret;
machine_xt_laserxt_common_init(model, 1);
return ret;
}

207
src/machine/m_xt_philips.c
View File

@@ -1,207 +0,0 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Emulation of the Philips XT-compatible machines.
*
*
*
* Authors: EngiNerd <webmaster.crrc@yahoo.it>
*
* Copyright 2020-2021 EngiNerd.
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/nmi.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/pit.h>
#include <86box/mem.h>
#include <86box/device.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/fdc_ext.h>
#include <86box/hdc.h>
#include <86box/gameport.h>
#include <86box/ibm_5161.h>
#include <86box/keyboard.h>
#include <86box/rom.h>
#include <86box/machine.h>
#include <86box/chipset.h>
#include <86box/io.h>
#include <86box/video.h>
#include <86box/plat_unused.h>
typedef struct philips_t {
uint8_t reg;
} philips_t;
#ifdef ENABLE_PHILIPS_LOG
int philips_do_log = ENABLE_PHILIPS_LOG;
static void
philips_log(const char *fmt, ...)
{
va_list ap;
if (philips_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
# define philips_log(fmt, ...)
#endif
static void
philips_write(uint16_t port, uint8_t val, void *priv)
{
philips_t *dev = (philips_t *) priv;
switch (port) {
/* port 0xc0
* bit 7: turbo
* bits 4-5: rtc read/set (I2C Bus SDA/SCL?)
* bit 2: parity disabled
*/
case 0xc0:
dev->reg = val;
if (val & 0x80)
cpu_dynamic_switch(cpu);
else
cpu_dynamic_switch(0);
break;
default:
break;
}
philips_log("Philips XT Mainboard: Write %02x at %02x\n", val, port);
}
static uint8_t
philips_read(uint16_t port, void *priv)
{
const philips_t *dev = (philips_t *) priv;
uint8_t ret = 0xff;
switch (port) {
/* port 0xc0
* bit 7: turbo
* bits 4-5: rtc read/set
* bit 2: parity disabled
*/
case 0xc0:
ret = dev->reg;
break;
default:
break;
}
philips_log("Philips XT Mainboard: Read %02x at %02x\n", ret, port);
return ret;
}
static void
philips_close(void *priv)
{
philips_t *dev = (philips_t *) priv;
free(dev);
}
static void *
philips_init(UNUSED(const device_t *info))
{
philips_t *dev = (philips_t *) malloc(sizeof(philips_t));
memset(dev, 0, sizeof(philips_t));
dev->reg = 0x40;
io_sethandler(0x0c0, 0x01, philips_read, NULL, NULL, philips_write, NULL, NULL, dev);
return dev;
}
const device_t philips_device = {
.name = "Philips XT Mainboard",
.internal_name = "philips",
.flags = 0,
.local = 0,
.init = philips_init,
.close = philips_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
void
machine_xt_philips_common_init(const machine_t *model)
{
machine_common_init(model);
pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_xt);
nmi_init();
standalone_gameport_type = &gameport_200_device;
device_add(&kbc_pc_device);
device_add(&philips_device);
device_add(&xta_hd20_device);
}
int
machine_xt_p3105_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/p3105/philipsnms9100.bin",
0x000fc000, 16384, 0);
if (bios_only || !ret)
return ret;
machine_xt_philips_common_init(model);
/* On-board FDC cannot be disabled */
device_add(&fdc_xt_device);
return ret;
}
int
machine_xt_p3120_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/p3120/philips_p3120.bin",
0x000f8000, 32768, 0);
if (bios_only || !ret)
return ret;
machine_xt_philips_common_init(model);
device_add(&gc100a_device);
device_add(&fdc_at_device);
return ret;
}

210
src/machine/m_xt_zenith.c
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@@ -1,210 +0,0 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Emulation of various Zenith PC compatible machines.
* Currently only the Zenith Data Systems Supersport is emulated.
*
*
*
* Authors: Tux,
* Miran Grca, <mgrca8@gmail.com>
* TheCollector1995, <mariogplayer@gmail.com>
* EngiNerd <webmaster.crrc@yahoo.it>
*
* Copyright 2016-2019 Tux.
* Copyright 2016-2019 Miran Grca.
* Copyright 2020 EngiNerd.
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#include <86box/86box.h>
#include "cpu.h"
#include <86box/timer.h>
#include <86box/dma.h>
#include <86box/nmi.h>
#include <86box/pic.h>
#include <86box/pit.h>
#include <86box/mem.h>
#include <86box/rom.h>
#include <86box/device.h>
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/fdc_ext.h>
#include <86box/gameport.h>
#include <86box/keyboard.h>
#include <86box/lpt.h>
#include <86box/serial.h>
#include <86box/machine.h>
#include <86box/io.h>
#include <86box/video.h>
#include <86box/plat_unused.h>
typedef struct {
mem_mapping_t scratchpad_mapping;
uint8_t *scratchpad_ram;
} zenith_t;
static uint8_t
zenith_scratchpad_read(uint32_t addr, void *priv)
{
const zenith_t *dev = (zenith_t *) priv;
return dev->scratchpad_ram[addr & 0x3fff];
}
static void
zenith_scratchpad_write(uint32_t addr, uint8_t val, void *priv)
{
zenith_t *dev = (zenith_t *) priv;
dev->scratchpad_ram[addr & 0x3fff] = val;
}
static void *
zenith_scratchpad_init(UNUSED(const device_t *info))
{
zenith_t *dev;
dev = (zenith_t *) calloc(1, sizeof(zenith_t));
dev->scratchpad_ram = malloc(0x4000);
mem_mapping_add(&dev->scratchpad_mapping, 0xf0000, 0x4000,
zenith_scratchpad_read, NULL, NULL,
zenith_scratchpad_write, NULL, NULL,
dev->scratchpad_ram, MEM_MAPPING_EXTERNAL, dev);
return dev;
}
static void
zenith_scratchpad_close(void *priv)
{
zenith_t *dev = (zenith_t *) priv;
free(dev->scratchpad_ram);
free(dev);
}
static const device_t zenith_scratchpad_device = {
.name = "Zenith scratchpad RAM",
.internal_name = "zenith_scratchpad",
.flags = 0,
.local = 0,
.init = zenith_scratchpad_init,
.close = zenith_scratchpad_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
void
machine_zenith_init(const machine_t *model)
{
machine_common_init(model);
device_add(&zenith_scratchpad_device);
pit_devs[0].set_out_func(pit_devs[0].data, 1, pit_refresh_timer_xt);
device_add(&kbc_xt_zenith_device);
nmi_init();
}
/*
* Current bugs and limitations:
* - missing NVRAM implementation
*/
int
machine_xt_z184_init(const machine_t *model)
{
lpt_t *lpt = NULL;
int ret;
ret = bios_load_linear("roms/machines/zdsupers/z184m v3.1d.10d",
0x000f8000, 32768, 0);
if (bios_only || !ret)
return ret;
machine_zenith_init(model);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_xt_device);
lpt = device_add_inst(&lpt_port_device, 1);
lpt_port_remove(lpt);
lpt_port_setup(lpt, LPT2_ADDR);
lpt_set_next_inst(255);
device_add(&ns8250_device);
/* So that serial_standalone_init() won't do anything. */
serial_set_next_inst(SERIAL_MAX - 1);
device_add(&cga_device);
return ret;
}
int
machine_xt_z151_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/zdsz151/444-229-18.bin",
0x000fc000, 32768, 0);
if (ret) {
bios_load_aux_linear("roms/machines/zdsz151/444-260-18.bin",
0x000f8000, 16384, 0);
}
if (bios_only || !ret)
return ret;
machine_zenith_init(model);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_xt_tandy_device);
return ret;
}
/*
* Current bugs and limitations:
* - Memory board support for EMS currently missing
*/
int
machine_xt_z159_init(const machine_t *model)
{
lpt_t *lpt = NULL;
int ret;
ret = bios_load_linear("roms/machines/zdsz159/z159m v2.9e.10d",
0x000f8000, 32768, 0);
if (bios_only || !ret)
return ret;
machine_zenith_init(model);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_xt_tandy_device);
/* parallel port is on the memory board */
lpt = device_add_inst(&lpt_port_device, 1);
lpt_port_remove(lpt);
lpt_port_setup(lpt, LPT2_ADDR);
lpt_set_next_inst(255);
return ret;
}

3070
src/machine/machine_table.c
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