Merge pull request #4133 from cartifanwlr/feature/socket6

Add support for the Socket 6 platform (PC-98x1 branch)

src/86box.c

@@ -30,10 +30,10 @@
 #include <time.h>
 #include <wchar.h>
 #include <stdatomic.h>
+#include <unistd.h>
 
 #ifndef _WIN32
 #    include <pwd.h>
-#    include <unistd.h>
 #endif
 #ifdef __APPLE__
 #    include <string.h>
@@ -65,6 +65,7 @@
 #include <86box/machine.h>
 #include <86box/bugger.h>
 #include <86box/postcard.h>
+#include <86box/unittester.h>
 #include <86box/isamem.h>
 #include <86box/isartc.h>
 #include <86box/lpt.h>
@@ -111,7 +112,7 @@
 
 /* Stuff that used to be globally declared in plat.h but is now extern there
    and declared here instead. */
-int          dopause;  /* system is paused */
+int          dopause = 1;  /* system is paused */
 atomic_flag  doresize; /* screen resize requested */
 volatile int is_quit;  /* system exit requested */
 uint64_t     timer_freq;
@@ -173,6 +174,7 @@ bool     serial_passthrough_enabled[SERIAL_MAX] = { 0, 0, 0, 0 }; /* (C) activat
                                                                          pass-through for serial ports */
 int      bugger_enabled                         = 0;              /* (C) enable ISAbugger */
 int      postcard_enabled                       = 0;              /* (C) enable POST card */
+int      unittester_enabled                     = 0;              /* (C) enable unit tester device */
 int      isamem_type[ISAMEM_MAX]                = { 0, 0, 0, 0 }; /* (C) enable ISA mem cards */
 int      isartc_type                            = 0;              /* (C) enable ISA RTC card */
 int      gfxcard[2]                             = { 0, 0 };       /* (C) graphics/video card */
@@ -236,8 +238,8 @@ int efscrnsz_y = SCREEN_RES_Y;
 
 static wchar_t mouse_msg[3][200];
 
-static int do_pause_ack = 0;
-static volatile int pause_ack = 0;
+static volatile atomic_int do_pause_ack = 0;
+static volatile atomic_int pause_ack = 0;
 
 #ifndef RELEASE_BUILD
 static char buff[1024];
@@ -542,7 +544,9 @@ usage:
             printf("-N or --noconfirm       - do not ask for confirmation on quit\n");
             printf("-P or --vmpath path     - set 'path' to be root for vm\n");
             printf("-R or --rompath path    - set 'path' to be ROM path\n");
+#ifndef USE_SDL_UI
             printf("-S or --settings        - show only the settings dialog\n");
+#endif
             printf("-V or --vmname name     - overrides the name of the running VM\n");
             printf("-X or --clear what      - clears the 'what' (cmos/flash/both)\n");
             printf("-Y or --donothing       - do not show any UI or run the emulation\n");
@@ -609,8 +613,10 @@ usage:
                 goto usage;
 
             strcpy(vm_name, argv[++c]);
+#ifndef USE_SDL_UI
         } else if (!strcasecmp(argv[c], "--settings") || !strcasecmp(argv[c], "-S")) {
             settings_only = 1;
+#endif
         } else if (!strcasecmp(argv[c], "--noconfirm") || !strcasecmp(argv[c], "-N")) {
             confirm_exit_cmdl = 0;
         } else if (!strcasecmp(argv[c], "--missing") || !strcasecmp(argv[c], "-M")) {
@@ -1042,6 +1048,7 @@ pc_send_ca(uint16_t sc)
     keyboard_input(1, 0x1D); /* Ctrl key pressed */
     keyboard_input(1, 0x38); /* Alt key pressed */
     keyboard_input(1, sc);
+    usleep(50000);
     keyboard_input(0, sc);
     keyboard_input(0, 0x38); /* Alt key released */
     keyboard_input(0, 0x1D); /* Ctrl key released */
@@ -1153,9 +1160,6 @@ pc_reset_hard_init(void)
      * that will be a call to device_reset_all() later !
      */
 
-    if (joystick_type)
-        gameport_update_joystick_type();
-
     /* Reset and reconfigure the Sound Card layer. */
     sound_card_reset();
 
@@ -1199,10 +1203,13 @@ pc_reset_hard_init(void)
     /* Reset any ISA RTC cards. */
     isartc_reset();
 
-    /* Initialize the Voodoo cards here inorder to minmize
+    /* Initialize the Voodoo cards here inorder to minimize
        the chances of the SCSI controller ending up on the bridge. */
     video_voodoo_init();
 
+    if (joystick_type)
+        gameport_update_joystick_type(); /* installs game port if no device provides one, must be late */
+
     ui_sb_update_panes();
 
     if (config_changed) {
@@ -1217,12 +1224,18 @@ pc_reset_hard_init(void)
         device_add(&bugger_device);
     if (postcard_enabled)
         device_add(&postcard_device);
+    if (unittester_enabled)
+        device_add(&unittester_device);
 
     if (IS_ARCH(machine, MACHINE_BUS_PCI)) {
         pci_register_cards();
         device_reset_all(DEVICE_PCI);
     }
 
+    /* Mark IDE shadow drives (slaves with a present master) as such in case
+       the IDE controllers present are not some form of PCI. */
+    ide_drives_set_shadow();
+
     /* Reset the CPU module. */
     resetx86();
     dma_reset();
@@ -1359,9 +1372,9 @@ _ui_window_title(void *s)
 void
 ack_pause(void)
 {
-    if (do_pause_ack) {
-        do_pause_ack = 0;
-        pause_ack = 1;
+    if (atomic_load(&do_pause_ack)) {
+        atomic_store(&do_pause_ack, 0);
+        atomic_store(&pause_ack, 1);
     }
 }
 
@@ -1579,12 +1592,14 @@ get_actual_size_y(void)
 void
 do_pause(int p)
 {
-    if (p)
+    int old_p = dopause;
+
+    if ((p == 1) && !old_p)
         do_pause_ack = p;
-    dopause = p;
-    if (p) {
-        while (!pause_ack)
+    dopause = !!p;
+    if ((p == 1) && !old_p) {
+        while (!atomic_load(&pause_ack))
             ;
     }
-    pause_ack = 0;
+    atomic_store(&pause_ack, 0);
 }

src/CMakeLists.txt

@@ -229,5 +229,6 @@ if (QT)
 elseif(WIN32)
     add_subdirectory(win)
 else()
+    add_compile_definitions(USE_SDL_UI)
     add_subdirectory(unix)
 endif()

src/acpi.c

@@ -723,7 +723,8 @@ acpi_reg_write_common_regs(UNUSED(int size), uint16_t addr, uint8_t val, void *p
 
                     /* Since the UI doesn't have a power button at the moment, pause emulation,
                        then trigger a resume event so that the system resumes after unpausing. */
-                    plat_pause(1);
+                    plat_pause(2);    /* 2 means do not wait for pause as
+                                         we're already in the CPU thread. */
                     timer_set_delay_u64(&dev->resume_timer, 50 * TIMER_USEC);
                 }
             }
@@ -1668,6 +1669,10 @@ acpi_reset(void *priv)
         acpi_power_on = 0;
     }
 
+    /* The Gateway Tomahawk requires the LID polarity bit to be set. */
+    if (!strcmp(machine_get_internal_name(), "tomahawk"))
+        dev->regs.glbctl |= 0x02000000;
+
     acpi_rtc_status = 0;
 
     acpi_update_irq(dev);

src/cdrom/cdrom.c

@@ -442,7 +442,7 @@ cdrom_audio_callback(cdrom_t *dev, int16_t *output, int len)
 {
     int ret = 1;
 
-    if (!dev->sound_on || (dev->cd_status != CD_STATUS_PLAYING)) {
+    if (!dev->sound_on || (dev->cd_status != CD_STATUS_PLAYING) || dev->audio_muted_soft) {
         cdrom_log("CD-ROM %i: Audio callback while not playing\n", dev->id);
         if (dev->cd_status == CD_STATUS_PLAYING)
             dev->seek_pos += (len >> 11);
@@ -557,6 +557,7 @@ cdrom_audio_play(cdrom_t *dev, uint32_t pos, uint32_t len, int ismsf)
         len += pos;
     }
 
+    dev->audio_muted_soft = 0;
     /* Do this at this point, since it's at this point that we know the
        actual LBA position to start playing from. */
     if (!(dev->ops->track_type(dev, pos) & CD_TRACK_AUDIO)) {
@@ -578,6 +579,7 @@ cdrom_audio_track_search(cdrom_t *dev, uint32_t pos, int type, uint8_t playbit)
     int m = 0;
     int s = 0;
     int f = 0;
+    uint32_t pos2 = 0;
 
     if (dev->cd_status == CD_STATUS_DATA_ONLY)
         return 0;
@@ -614,8 +616,21 @@ cdrom_audio_track_search(cdrom_t *dev, uint32_t pos, int type, uint8_t playbit)
             break;
     }
 
-    /* Unlike standard commands, if there's a data track on an Audio CD (mixed mode)
-       the playback continues with the audio muted (Toshiba CD-ROM SCSI-2 manual reference). */
+    pos2 = pos - 1;
+    if (pos2 == 0xffffffff)
+        pos2 = pos + 1;
+
+    /* Do this at this point, since it's at this point that we know the
+       actual LBA position to start playing from. */
+    if (!(dev->ops->track_type(dev, pos2) & CD_TRACK_AUDIO)) {
+        cdrom_log("CD-ROM %i: Track Search: LBA %08X not on an audio track\n", dev->id, pos);
+        dev->audio_muted_soft = 1;
+        if (dev->ops->track_type(dev, pos) & CD_TRACK_AUDIO)
+            dev->audio_muted_soft = 0;
+    } else
+        dev->audio_muted_soft = 0;
+
+    cdrom_log("Track Search Toshiba: Muted?=%d, LBA=%08X.\n", dev->audio_muted_soft, pos);
     dev->cd_buflen = 0;
     dev->cd_status = playbit ? CD_STATUS_PLAYING : CD_STATUS_PAUSED;
     return 1;
@@ -641,6 +656,15 @@ cdrom_audio_track_search_pioneer(cdrom_t *dev, uint32_t pos, uint8_t playbit)
 
     dev->seek_pos = pos;
 
+    dev->audio_muted_soft = 0;
+    /* Do this at this point, since it's at this point that we know the
+       actual LBA position to start playing from. */
+    if (!(dev->ops->track_type(dev, pos) & CD_TRACK_AUDIO)) {
+        cdrom_log("CD-ROM %i: LBA %08X not on an audio track\n", dev->id, pos);
+        cdrom_stop(dev);
+        return 0;
+    }
+
     dev->cd_buflen = 0;
     dev->cd_status = playbit ? CD_STATUS_PLAYING : CD_STATUS_PAUSED;
     return 1;
@@ -662,6 +686,7 @@ cdrom_audio_play_pioneer(cdrom_t *dev, uint32_t pos)
     pos = MSFtoLBA(m, s, f) - 150;
     dev->cd_end = pos;
 
+    dev->audio_muted_soft = 0;
     dev->cd_buflen = 0;
     dev->cd_status = CD_STATUS_PLAYING;
     return 1;
@@ -703,10 +728,7 @@ cdrom_audio_play_toshiba(cdrom_t *dev, uint32_t pos, int type)
             break;
     }
 
-    cdrom_log("Toshiba/NEC Play Audio: MSF = %06x, type = %02x, cdstatus = %02x\n", pos, type, dev->cd_status);
-
-    /* Unlike standard commands, if there's a data track on an Audio CD (mixed mode)
-       the playback continues with the audio muted (Toshiba CD-ROM SCSI-2 manual reference). */
+    cdrom_log("Toshiba Play Audio: Muted?=%d, LBA=%08X.\n", dev->audio_muted_soft, pos);
     dev->cd_buflen = 0;
     dev->cd_status = CD_STATUS_PLAYING;
     return 1;
@@ -750,6 +772,7 @@ cdrom_audio_scan(cdrom_t *dev, uint32_t pos, int type)
             break;
     }
 
+    dev->audio_muted_soft = 0;
     /* Do this at this point, since it's at this point that we know the
        actual LBA position to start playing from. */
     if (!(dev->ops->track_type(dev, pos) & CD_TRACK_AUDIO)) {
@@ -987,6 +1010,11 @@ cdrom_get_current_subcodeq_playstatus(cdrom_t *dev, uint8_t *b)
     else
         ret = (dev->cd_status == CD_STATUS_PLAYING) ? 0x00 : dev->audio_op;
 
+    /*If a valid audio track is detected with audio on, unmute it.*/
+    if (dev->ops->track_type(dev, dev->seek_pos) & CD_TRACK_AUDIO)
+        dev->audio_muted_soft = 0;
+
+    cdrom_log("SubCodeQ: Play Status: Seek LBA=%08x, CDEND=%08x, mute=%d.\n", dev->seek_pos, dev->cd_end, dev->audio_muted_soft);
     b[0] = subc.attr;
     b[1] = bin2bcd(subc.track);
     b[2] = bin2bcd(subc.index);
@@ -1932,8 +1960,18 @@ cdrom_hard_reset(void)
 
             dev->cd_status = CD_STATUS_EMPTY;
 
-            if (dev->host_drive == 200)
+            if (dev->host_drive == 200) {
+#ifdef _WIN32
+                if ((strlen(dev->image_path) >= 1) && (dev->image_path[strlen(dev->image_path) - 1] == '/'))
+                    dev->image_path[strlen(dev->image_path) - 1] = '\\';
+#else
+                if ((strlen(dev->image_path) >= 1) &&
+                    (dev->image_path[strlen(dev->image_path) - 1] == '\\'))
+                    dev->image_path[strlen(dev->image_path) - 1] = '/';
+#endif
+
                 cdrom_image_open(dev, dev->image_path);
+            }
         }
     }
 
@@ -2022,6 +2060,15 @@ cdrom_reload(uint8_t id)
     if (dev->prev_host_drive == 200) {
         /* Reload a previous image. */
         strcpy(dev->image_path, dev->prev_image_path);
+
+#ifdef _WIN32
+        if ((strlen(dev->image_path) >= 1) && (dev->image_path[strlen(dev->image_path) - 1] == '/'))
+            dev->image_path[strlen(dev->image_path) - 1] = '\\';
+#else
+         if ((strlen(dev->image_path) >= 1) && (dev->image_path[strlen(dev->image_path) - 1] == '\\'))
+            dev->image_path[strlen(dev->image_path) - 1] = '/';
+#endif
+
         cdrom_image_open(dev, dev->image_path);
 
         cdrom_insert(id);

src/chipset/ali1489.c

@@ -41,7 +41,8 @@
 
 #include <86box/chipset.h>
 
-#define DEFINE_SHADOW_PROCEDURE (((dev->regs[0x14] & 0x10) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | ((dev->regs[0x14] & 0x20) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY))
+#define DEFINE_SHADOW_PROCEDURE (((dev->regs[0x14] & 0x10) ? MEM_READ_INTERNAL : MEM_READ_EXTANY) | \
+                                ((dev->regs[0x14] & 0x20) ? MEM_WRITE_INTERNAL : MEM_WRITE_EXTANY))
 #define DISABLED_SHADOW         (MEM_READ_EXTANY | MEM_WRITE_EXTANY)
 
 #ifdef ENABLE_ALI1489_LOG
@@ -64,19 +65,14 @@ ali1489_log(const char *fmt, ...)
 
 typedef struct ali1489_t {
     uint8_t index;
-    uint8_t ide_index;
-    uint8_t ide_chip_id;
     uint8_t pci_slot;
     uint8_t regs[256];
     uint8_t pci_conf[256];
-    uint8_t ide_regs[256];
 
     port_92_t *port_92;
     smram_t   *smram;
 } ali1489_t;
 
-static void ali1489_ide_handler(ali1489_t *dev);
-
 static void
 ali1489_shadow_recalc(ali1489_t *dev)
 {
@@ -85,7 +81,8 @@ ali1489_shadow_recalc(ali1489_t *dev)
     for (uint8_t i = 0; i < 8; i++) {
         if (dev->regs[0x13] & (1 << i)) {
             ali1489_log("%06Xh-%06Xh region shadow enabled: read = %i, write = %i\n",
-                        0xc0000 + (i << 14), 0xc3fff + (i << 14), !!(dev->regs[0x14] & 0x10), !!(dev->regs[0x14] & 0x20));
+                        0xc0000 + (i << 14), 0xc3fff + (i << 14),
+                        !!(dev->regs[0x14] & 0x10), !!(dev->regs[0x14] & 0x20));
             mem_set_mem_state_both(0xc0000 + (i << 14), 0x4000, DEFINE_SHADOW_PROCEDURE);
         } else {
             ali1489_log("%06Xh-%06Xh region shadow disabled\n", 0xc0000 + (i << 14), 0xc3fff + (i << 14));
@@ -96,7 +93,8 @@ ali1489_shadow_recalc(ali1489_t *dev)
     for (uint8_t i = 0; i < 4; i++) {
         if (dev->regs[0x14] & (1 << i)) {
             ali1489_log("%06Xh-%06Xh region shadow enabled: read = %i, write = %i\n",
-                        0xe0000 + (i << 15), 0xe7fff + (i << 15), !!(dev->regs[0x14] & 0x10), !!(dev->regs[0x14] & 0x20));
+                        0xe0000 + (i << 15), 0xe7fff + (i << 15),
+                        !!(dev->regs[0x14] & 0x10), !!(dev->regs[0x14] & 0x20));
             mem_set_mem_state_both(0xe0000 + (i << 15), 0x8000, DEFINE_SHADOW_PROCEDURE);
             shadowbios |= !!(dev->regs[0x14] & 0x10);
             shadowbios_write |= !!(dev->regs[0x14] & 0x20);
@@ -142,25 +140,9 @@ ali1489_smram_recalc(ali1489_t *dev)
 static void
 ali1489_defaults(ali1489_t *dev)
 {
-    memset(dev->ide_regs, 0x00, 256);
     memset(dev->pci_conf, 0x00, 256);
     memset(dev->regs, 0x00, 256);
 
-    ide_pri_disable();
-    ide_sec_disable();
-
-    /* IDE registers */
-    dev->ide_regs[0x00] = 0x57;
-    dev->ide_regs[0x01] = 0x02;
-    dev->ide_regs[0x08] = 0xff;
-    dev->ide_regs[0x09] = 0x41;
-    dev->ide_regs[0x0c] = 0x02;
-    dev->ide_regs[0x0e] = 0x02;
-    dev->ide_regs[0x10] = 0x02;
-    dev->ide_regs[0x12] = 0x02;
-    dev->ide_regs[0x34] = 0xff;
-    dev->ide_regs[0x35] = 0x01;
-
     /* PCI registers */
     dev->pci_conf[0x00] = 0xb9;
     dev->pci_conf[0x01] = 0x10;
@@ -203,8 +185,6 @@ ali1489_defaults(ali1489_t *dev)
     pci_set_irq_routing(PCI_INTB, PCI_IRQ_DISABLED);
     pci_set_irq_routing(PCI_INTC, PCI_IRQ_DISABLED);
     pci_set_irq_routing(PCI_INTD, PCI_IRQ_DISABLED);
-
-    ali1489_ide_handler(dev);
 }
 
 static void
@@ -385,7 +365,8 @@ ali1489_write(uint16_t addr, uint8_t val, void *priv)
                         break;
 
                     case 0x44: /* PCI INTx Sensitivity Register */
-                        /* TODO: When doing the IRQ and PCI IRQ rewrite, bits 0 to 3 toggle edge/level output. */
+                        /* TODO: When doing the IRQ and PCI IRQ rewrite,
+                                 bits 0 to 3 toggle edge/level output. */
                         dev->regs[dev->index] = val;
                         break;
                     default:
@@ -464,121 +445,6 @@ ali1489_pci_read(UNUSED(int func), int addr, void *priv)
     return ret;
 }
 
-static void
-ali1489_ide_handler(ali1489_t *dev)
-{
-    ide_pri_disable();
-    ide_sec_disable();
-    if (dev->ide_regs[0x01] & 0x01) {
-        ide_pri_enable();
-        if (!(dev->ide_regs[0x35] & 0x40))
-            ide_sec_enable();
-    }
-}
-
-static void
-ali1489_ide_write(uint16_t addr, uint8_t val, void *priv)
-{
-    ali1489_t *dev = (ali1489_t *) priv;
-
-    switch (addr) {
-        case 0xf4: /* Usually it writes 30h here */
-            dev->ide_chip_id = val;
-            break;
-
-        case 0xf8:
-            dev->ide_index = val;
-            break;
-
-        case 0xfc:
-            if (dev->ide_chip_id != 0x30)
-                break;
-
-            switch (dev->ide_index) {
-                case 0x01: /* IDE Configuration Register */
-                    dev->ide_regs[dev->ide_index] = val & 0x8f;
-                    ali1489_ide_handler(dev);
-                    break;
-                case 0x02: /* DBA Data Byte Cative Count for IDE-1 */
-                case 0x03: /* D0RA Disk 0 Read Active Count for IDE-1 */
-                case 0x04: /* D0WA Disk 0 Write Active Count for IDE-1 */
-                case 0x05: /* D1RA Disk 1 Read Active Count for IDE-1 */
-                case 0x06: /* D1WA Disk 1 Write Active Count for IDE-1 */
-                case 0x25: /* DBR Data Byte Recovery Count for IDE-1 */
-                case 0x26: /* D0RR Disk 0 Read Byte Recovery Count for IDE-1 */
-                case 0x27: /* D0WR Disk 0 Write Byte Recovery Count for IDE-1 */
-                case 0x28: /* D1RR Disk 1 Read Byte Recovery Count for IDE-1 */
-                case 0x29: /* D1WR Disk 1 Write Byte Recovery Count for IDE-1 */
-                case 0x2a: /* DBA Data Byte Cative Count for IDE-2 */
-                case 0x2b: /* D0RA Disk 0 Read Active Count for IDE-2 */
-                case 0x2c: /* D0WA Disk 0 Write Active Count for IDE-2 */
-                case 0x2d: /* D1RA Disk 1 Read Active Count for IDE-2 */
-                case 0x2e: /* D1WA Disk 1 Write Active Count for IDE-2 */
-                case 0x2f: /* DBR Data Byte Recovery Count for IDE-2 */
-                case 0x30: /* D0RR Disk 0 Read Byte Recovery Count for IDE-2 */
-                case 0x31: /* D0WR Disk 0 Write Byte Recovery Count for IDE-2 */
-                case 0x32: /* D1RR Disk 1 Read Byte Recovery Count for IDE-2 */
-                case 0x33: /* D1WR Disk 1 Write Byte Recovery Count for IDE-2 */
-                    dev->ide_regs[dev->ide_index] = val & 0x1f;
-                    break;
-                case 0x07: /* Buffer Mode Register 1 */
-                    dev->ide_regs[dev->ide_index] = val;
-                    break;
-                case 0x09: /* IDEPE1 IDE Port Enable Register 1 */
-                    dev->ide_regs[dev->ide_index] = val & 0xc3;
-                    break;
-                case 0x0a: /* Buffer Mode Register 2 */
-                    dev->ide_regs[dev->ide_index] = val & 0x4f;
-                    break;
-                case 0x0b: /* IDE Channel 1 Disk 0 Sector Byte Count Register 1 */
-                case 0x0d: /* IDE Channel 1 Disk 1 Sector Byte Count Register 1 */
-                case 0x0f: /* IDE Channel 2 Disk 0 Sector Byte Count Register 1 */
-                case 0x11: /* IDE Channel 2 Disk 1 Sector Byte Count Register 1 */
-                    dev->ide_regs[dev->ide_index] = val & 0x03;
-                    break;
-                case 0x0c: /* IDE Channel 1 Disk 0 Sector Byte Count Register 2 */
-                case 0x0e: /* IDE Channel 1 Disk 1 Sector Byte Count Register 2 */
-                case 0x10: /* IDE Channel 2 Disk 1 Sector Byte Count Register 2 */
-                case 0x12: /* IDE Channel 2 Disk 1 Sector Byte Count Register 2 */
-                    dev->ide_regs[dev->ide_index] = val & 0x1f;
-                    break;
-                case 0x35: /* IDEPE3 IDE Port Enable Register 3 */
-                    dev->ide_regs[dev->ide_index] = val;
-                    ali1489_ide_handler(dev);
-                    break;
-
-                default:
-                    break;
-            }
-            break;
-
-        default:
-            break;
-    }
-}
-
-static uint8_t
-ali1489_ide_read(uint16_t addr, void *priv)
-{
-    const ali1489_t *dev = (ali1489_t *) priv;
-    uint8_t          ret = 0xff;
-
-    switch (addr) {
-        case 0xf4:
-            ret = dev->ide_chip_id;
-            break;
-        case 0xfc:
-            ret = dev->ide_regs[dev->ide_index];
-            ali1489_log("M1489-IDE: dev->regs[%02x] (%02x)\n", dev->ide_index, ret);
-            break;
-
-        default:
-            break;
-    }
-
-    return ret;
-}
-
 static void
 ali1489_reset(void *priv)
 {
@@ -612,19 +478,10 @@ ali1489_init(UNUSED(const device_t *info))
        23h Data Port */
     io_sethandler(0x0022, 0x0002, ali1489_read, NULL, NULL, ali1489_write, NULL, NULL, dev);
 
-    /* M1489 IDE controller
-       F4h Chip ID we write always 30h onto it
-       F8h Index Port
-       FCh Data Port
-    */
-    io_sethandler(0x0f4, 0x0001, ali1489_ide_read, NULL, NULL, ali1489_ide_write, NULL, NULL, dev);
-    io_sethandler(0x0f8, 0x0001, ali1489_ide_read, NULL, NULL, ali1489_ide_write, NULL, NULL, dev);
-    io_sethandler(0x0fc, 0x0001, ali1489_ide_read, NULL, NULL, ali1489_ide_write, NULL, NULL, dev);
-
     /* Dummy M1489 PCI device */
     pci_add_card(PCI_ADD_NORTHBRIDGE, ali1489_pci_read, ali1489_pci_write, dev, &dev->pci_slot);
 
-    device_add(&ide_pci_2ch_device);
+    device_add(&ide_ali1489_device);
 
     dev->port_92 = device_add(&port_92_pci_device);
     dev->smram   = smram_add();

src/chipset/ali1543.c

@@ -489,12 +489,10 @@ static void
 ali5229_ide_irq_handler(ali1543_t *dev)
 {
     int ctl = 0;
-    int ch = 0;
     int bit = 0;
 
     if (dev->ide_conf[0x52] & 0x10) {
         ctl ^= 1;
-        ch ^= 1;
         bit ^= 5;
     }
 
@@ -984,7 +982,7 @@ static void
 ali7101_write(int func, int addr, uint8_t val, void *priv)
 {
     ali1543_t *dev = (ali1543_t *) priv;
-    ali1543_log("M7101: dev->pmu_conf[%02x] = %02x\n", addr, val);
+    ali1543_log("M7101: [W] dev->pmu_conf[%02x] = %02x\n", addr, val);
 
     if (func > 0)
         return;
@@ -1408,65 +1406,78 @@ ali7101_read(int func, int addr, void *priv)
     uint8_t    ret = 0xff;
 
     if (dev->pmu_dev_enable && (func == 0)) {
-        if ((dev->pmu_conf[0xc9] & 0x01) && (addr >= 0x40) && (addr != 0xc9))
-            return 0xff;
-
-        /* TODO: C4, C5 = GPIREG (masks: 0D, 0E) */
-        switch (addr) {
-            default:
-                ret = dev->pmu_conf[addr];
-                break;
-            case 0x42:
-                ret = (dev->pmu_conf[addr] & 0xf7) | (nvr_smi_status(dev->nvr) ? 0x08 : 0x00);
-                break;
-            case 0x43:
-                ret = acpi_ali_soft_smi_status_read(dev->acpi) ? 0x10 : 0x00;
-                break;
-            case 0x7f:
-                ret = 0x80;
-                break;
-            case 0xbc:
-                ret = inb(0x70);
-                break;
-        }
-
-        if (dev->pmu_conf[0x77] & 0x10) {
+        if (!(dev->pmu_conf[0xc9] & 0x01) || (addr < 0x40) || (addr == 0xc9)) {
+            /* TODO: C4, C5 = GPIREG (masks: 0D, 0E) */
             switch (addr) {
+                default:
+                    ret = dev->pmu_conf[addr];
+                    break;
+                case 0x10 ... 0x13:
+                    if (dev->pmu_conf[0x5b] & 0x02)
+                        ret = 0x00;
+                    else
+                        ret = dev->pmu_conf[addr];
+                    break;
+                case 0x14 ... 0x17:
+                    if (dev->pmu_conf[0x5b] & 0x04)
+                        ret = 0x00;
+                    else
+                        ret = dev->pmu_conf[addr];
+                    break;
                 case 0x42:
-                    dev->pmu_conf[addr] &= 0xe0;
+                    ret = (dev->pmu_conf[addr] & 0xf7) | (nvr_smi_status(dev->nvr) ? 0x08 : 0x00);
                     break;
                 case 0x43:
-                    dev->pmu_conf[addr] &= 0xef;
-                    acpi_ali_soft_smi_status_write(dev->acpi, 0);
+                    ret = acpi_ali_soft_smi_status_read(dev->acpi) ? 0x10 : 0x00;
                     break;
+                case 0x7f:
+                    ret = 0x80;
+                    break;
+                case 0xbc:
+                    ret = inb(0x70);
+                    break;
+            }
 
-                case 0x48:
-                    dev->pmu_conf[addr] = 0x00;
-                    break;
-                case 0x49:
-                    dev->pmu_conf[addr] &= 0x60;
-                    break;
-                case 0x4a:
-                    dev->pmu_conf[addr] &= 0xc7;
-                    break;
+            if (dev->pmu_conf[0x77] & 0x10) {
+                switch (addr) {
+                    case 0x42:
+                        dev->pmu_conf[addr] &= 0xe0;
+                        break;
+                    case 0x43:
+                        dev->pmu_conf[addr] &= 0xef;
+                        acpi_ali_soft_smi_status_write(dev->acpi, 0);
+                        break;
 
-                case 0x4e:
-                    dev->pmu_conf[addr] &= 0xfa;
-                    break;
-                case 0x4f:
-                    dev->pmu_conf[addr] &= 0xfe;
-                    break;
+                    case 0x48:
+                        dev->pmu_conf[addr] = 0x00;
+                        break;
+                    case 0x49:
+                        dev->pmu_conf[addr] &= 0x60;
+                        break;
+                    case 0x4a:
+                        dev->pmu_conf[addr] &= 0xc7;
+                        break;
 
-                case 0x74:
-                    dev->pmu_conf[addr] &= 0xcc;
-                    break;
+                    case 0x4e:
+                        dev->pmu_conf[addr] &= 0xfa;
+                        break;
+                    case 0x4f:
+                        dev->pmu_conf[addr] &= 0xfe;
+                        break;
 
-                default:
-                    break;
+                    case 0x74:
+                        dev->pmu_conf[addr] &= 0xcc;
+                        break;
+
+                    default:
+                        break;
+                }
             }
         }
     }
 
+    ali1543_log("M7101: [R] dev->pmu_conf[%02x] = %02x\n", addr, ret);
+
     return ret;
 }
 

src/chipset/contaq_82c59x.c

@@ -311,8 +311,10 @@ contaq_82c59x_close(void *priv)
 {
     contaq_82c59x_t *dev = (contaq_82c59x_t *) priv;
 
-    smram_del(dev->smram[1]);
-    smram_del(dev->smram[0]);
+    if (dev->green) {
+        smram_del(dev->smram[1]);
+        smram_del(dev->smram[0]);
+    }
 
     free(dev);
 }

src/chipset/intel_4x0.c

@@ -1522,6 +1522,8 @@ i4x0_read(int func, int addr, void *priv)
            with the addition of bits 3 and 0. */
         if ((func == 0) && (addr == 0x93) && ((dev->type == INTEL_440FX) || (dev->type == INTEL_440LX) || (dev->type == INTEL_440EX)))
             ret = (ret & 0xf9) | (pci_read(0x0cf9, NULL) & 0x06);
+        else if ((func == 0) && (addr == 0x52) && (dev->type == INTEL_430TX) && !strcmp(machine_get_internal_name(), "tomahawk"))
+            ret = 0xb2;
     }
 
     return ret;

src/chipset/intel_i450kx.c

@@ -8,19 +8,14 @@
  *
  *          Implementation of the Intel 450KX Mars Chipset.
  *
+ *          i450GX is way more popular of an option but needs more stuff.
  *
+ * Authors: Miran Grca, <mgrca8@gmail.com>
+ *          Tiseno100,
  *
- * Authors: Tiseno100
- *
+ *          Copyright 2021-2024 Miran Grca.
  *          Copyright 2021 Tiseno100.
  */
-
-/*
-Note: i450KX PB manages PCI memory access with MC manages DRAM memory access.
-Due to 86Box limitations we can't manage them seperately thus it is dev branch till then.
-
-i450GX is way more popular of an option but needs more stuff.
-*/
 #include <stdarg.h>
 #include <stdint.h>
 #include <stdio.h>
@@ -97,17 +92,18 @@ i450kx_smram_recalc(i450kx_t *dev, int bus)
     const uint8_t *regs = bus ? dev->pb_pci_conf : dev->mc_pci_conf;
     uint32_t       addr;
     uint32_t       size;
+    int            enable = bus ? !(regs[0x57] & 0x08) : (regs[0x57] & 0x08);
 
     smram_disable(dev->smram[bus]);
 
     addr = ((uint32_t) regs[0xb8] << 16) | ((uint32_t) regs[0xb9] << 24);
     size = (((uint32_t) ((regs[0xbb] >> 4) & 0x0f)) << 16) + 0x00010000;
 
-    if ((addr != 0x00000000) && !!(regs[0x57] & 0x08)) {
+    if ((addr != 0x00000000) && enable) {
         if (bus)
-            smram_enable_ex(dev->smram[bus], addr, addr, size, 0, !!(regs[0x57] & 8), 0, 1);
+            smram_enable_ex(dev->smram[bus], addr, addr, size, 0, 0, 0, enable);
         else
-            smram_enable_ex(dev->smram[bus], addr, addr, size, !!(regs[0x57] & 8), 0, 1, 0);
+            smram_enable_ex(dev->smram[bus], addr, addr, size, 0, 0, enable, 0);
     }
 
     flushmmucache();
@@ -118,10 +114,8 @@ i450kx_vid_buf_recalc(i450kx_t *dev, int bus)
 {
     const uint8_t *regs = bus ? dev->pb_pci_conf : dev->mc_pci_conf;
 
-#if 0
-    // int state = (regs[0x58] & 0x02) ? (MEM_READ_EXTANY | MEM_WRITE_EXTANY) : (MEM_READ_DISABLED | MEM_WRITE_DISABLED);
-#endif
-    int state = (regs[0x58] & 0x02) ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) : (MEM_READ_EXTANY | MEM_WRITE_EXTANY);
+    int state = (regs[0x58] & 0x02) ? (MEM_READ_INTERNAL | MEM_WRITE_INTERNAL) :
+                                      (MEM_READ_EXTANY | MEM_WRITE_EXTANY);
 
     if (bus)
         mem_set_mem_state_bus_both(0x000a0000, 0x00020000, state);
@@ -136,10 +130,10 @@ pb_write(int func, int addr, uint8_t val, void *priv)
 {
     i450kx_t *dev = (i450kx_t *) priv;
 
-    // pclog("i450KX-PB: [W] dev->pb_pci_conf[%02X] = %02X POST: %02X\n", addr, val, inb(0x80));
-    i450kx_log("i450KX-PB: [W] dev->pb_pci_conf[%02X] = %02X POST: %02X\n", addr, val, inb(0x80));
+    if (func == 0) {
+        i450kx_log("[%04X:%08X] i450KX-PB: [W] dev->pb_pci_conf[%02X] = %02X\n", CS, cpu_state.pc,
+                   addr, val);
 
-    if (func == 0)
         switch (addr) {
             case 0x04:
                 dev->pb_pci_conf[addr] = (dev->pb_pci_conf[addr] & 0x04) | (val & 0x53);
@@ -373,6 +367,7 @@ pb_write(int func, int addr, uint8_t val, void *priv)
             default:
                 break;
         }
+    }
 }
 
 static uint8_t
@@ -381,10 +376,12 @@ pb_read(int func, int addr, void *priv)
     const i450kx_t *dev = (i450kx_t *) priv;
     uint8_t   ret = 0xff;
 
-    if (func == 0)
+    if (func == 0) {
         ret = dev->pb_pci_conf[addr];
 
-    // pclog("i450KX-PB: [R] dev->pb_pci_conf[%02X] = %02X POST: %02X\n", addr, ret, inb(0x80));
+        i450kx_log("[%04X:%08X] i450KX-PB: [R] dev->pb_pci_conf[%02X] = %02X\n", CS, cpu_state.pc,
+                   addr, ret);
+    }
 
     return ret;
 }
@@ -407,10 +404,10 @@ mc_write(int func, int addr, uint8_t val, void *priv)
 {
     i450kx_t *dev = (i450kx_t *) priv;
 
-    // pclog("i450KX-MC: [W] dev->mc_pci_conf[%02X] = %02X POST: %02X\n", addr, val, inb(0x80));
-    i450kx_log("i450KX-MC: [W] dev->mc_pci_conf[%02X] = %02X POST: %02X\n", addr, val, inb(0x80));
+    if (func == 0) {
+        i450kx_log("[%04X:%08X] i450KX-MC: [W] dev->mc_pci_conf[%02X] = %02X\n", CS, cpu_state.pc,
+                   addr, val);
 
-    if (func == 0)
         switch (addr) {
             case 0x4c:
                 dev->mc_pci_conf[addr] = val & 0xdf;
@@ -600,6 +597,7 @@ mc_write(int func, int addr, uint8_t val, void *priv)
             default:
                 break;
         }
+    }
 }
 
 static uint8_t
@@ -608,10 +606,12 @@ mc_read(int func, int addr, void *priv)
     const i450kx_t *dev = (i450kx_t *) priv;
     uint8_t   ret = 0xff;
 
-    if (func == 0)
+    if (func == 0) {
         ret = dev->mc_pci_conf[addr];
 
-    // pclog("i450KX-MC: [R] dev->mc_pci_conf[%02X] = %02X POST: %02X\n", addr, ret, inb(0x80));
+        i450kx_log("[%04X:%08X] i450KX-MC: [R] dev->mc_pci_conf[%02X] = %02X\n", CS, cpu_state.pc,
+                   addr, ret);
+    }
 
     return ret;
 }
@@ -622,10 +622,6 @@ i450kx_reset(void *priv)
     i450kx_t *dev = (i450kx_t *) priv;
     uint32_t  i;
 
-#if 0
-    // pclog("i450KX: i450kx_reset()\n");
-#endif
-
     /* Defaults PB */
     dev->pb_pci_conf[0x00] = 0x86;
     dev->pb_pci_conf[0x01] = 0x80;

src/chipset/intel_piix.c

@@ -597,6 +597,12 @@ piix_write(int func, int addr, uint8_t val, void *priv)
                         pci_set_mirq_routing(PCI_MIRQ0 + (addr & 0x01), PCI_IRQ_DISABLED);
                     else
                         pci_set_mirq_routing(PCI_MIRQ0 + (addr & 0x01), val & 0xf);
+                    if (dev->type == 3) {
+                        if (val & 0x20)
+                            sff_set_irq_mode(dev->bm[1], IRQ_MODE_MIRQ_0);
+                        else
+                            sff_set_irq_mode(dev->bm[1], IRQ_MODE_LEGACY);
+                    }
                     piix_log("MIRQ%i is %s\n", addr & 0x01, (val & 0x20) ? "disabled" : "enabled");
                 }
                 break;
@@ -1006,11 +1012,11 @@ piix_write(int func, int addr, uint8_t val, void *priv)
                 break;
             case 0xc0:
                 if (dev->type <= 4)
-                    fregs[0xc0] = (fregs[0xc0] & ~(val & 0xbf)) | (val & 0x20);
+                    fregs[0xc0] = (fregs[0xc0] & 0x40) | (val & 0xbf);
                 break;
             case 0xc1:
                 if (dev->type <= 4)
-                    fregs[0xc1] &= ~val;
+                    fregs[0xc1] = (fregs[0xc0] & ~(val & 0x8f)) | (val & 0x20);
                 break;
             case 0xff:
                 if (dev->type == 4) {
@@ -1572,7 +1578,16 @@ piix_init(const device_t *info)
         dev->acpi = device_add(&acpi_intel_device);
         acpi_set_slot(dev->acpi, dev->pci_slot);
         acpi_set_nvr(dev->acpi, dev->nvr);
-        acpi_set_gpireg2_default(dev->acpi, (dev->type > 4) ? 0xf1 : 0xdd);
+        /*
+           TriGem Richmond:
+           - Bit 5: Manufacturing jumper, must be set;
+           - Bit 4: CMOS clear jumper, must be clear;
+           - Bit 0: Password switch, must be clear.
+         */
+        if (!strcmp(machine_get_internal_name(), "richmond"))
+            acpi_set_gpireg2_default(dev->acpi, 0xee);
+        else
+            acpi_set_gpireg2_default(dev->acpi, (dev->type > 4) ? 0xf1 : 0xdd);
         acpi_set_trap_update(dev->acpi, piix_trap_update, dev);
 
         dev->ddma = device_add(&ddma_device);

src/chipset/neat.c

@@ -673,13 +673,14 @@ neat_init(UNUSED(const device_t *info))
 {
     neat_t *dev;
     uint8_t dram_mode = 0;
+    uint8_t i;
 
     /* Create an instance. */
     dev = (neat_t *) malloc(sizeof(neat_t));
     memset(dev, 0x00, sizeof(neat_t));
 
     /* Initialize some of the registers to specific defaults. */
-    for (uint8_t i = REG_RA0; i <= REG_RB11; i++) {
+    for (i = REG_RA0; i <= REG_RB11; i++) {
         dev->indx = i;
         neat_write(0x0023, 0x00, dev);
     }

src/chipset/sis_5511.c

@@ -262,7 +262,7 @@ sis_5511_write(UNUSED(int func), int addr, uint8_t val, void *priv)
         case 0x7a: /* DRAM Bank Register 2-1 */
         case 0x7c: /* DRAM Bank Register 3-0 */
         case 0x7e: /* DRAM Bank Register 3-1 */
-            spd_write_drbs(dev->regs, 0x70, 0x7e, 0x82);
+            spd_write_drbs(dev->pci_conf, 0x70, 0x7e, 0x82);
             break;
  
         case 0x71: /* DRAM Bank Register 0-0 */
@@ -579,16 +579,19 @@ sis_5513_ide_write(int addr, uint8_t val, sis_5511_t *dev)
             break;
 
         case 0x40: /* IDE Primary Channel/Master Drive Data Recovery Time Control */
-        case 0x41: /* IDE Primary Channel/Master Drive DataActive Time Control */
         case 0x42: /* IDE Primary Channel/Slave Drive Data Recovery Time Control */
-        case 0x43: /* IDE Primary Channel/Slave Drive Data Active Time Control */
         case 0x44: /* IDE Secondary Channel/Master Drive Data Recovery Time Control */
-        case 0x45: /* IDE Secondary Channel/Master Drive Data Active Time Control */
         case 0x46: /* IDE Secondary Channel/Slave Drive Data Recovery Time Control */
-        case 0x47: /* IDE Secondary Channel/Slave Drive Data Active Time Control */
         case 0x48: /* IDE Command Recovery Time Control */
+            dev->pci_conf_sb[1][addr] = val & 0x0f;
+            break;
+
+        case 0x41: /* IDE Primary Channel/Master Drive DataActive Time Control */
+        case 0x43: /* IDE Primary Channel/Slave Drive Data Active Time Control */
+        case 0x45: /* IDE Secondary Channel/Master Drive Data Active Time Control */
+        case 0x47: /* IDE Secondary Channel/Slave Drive Data Active Time Control */
         case 0x49: /* IDE Command Active Time Control */
-            dev->pci_conf_sb[1][addr] = val;
+            dev->pci_conf_sb[1][addr] = val & 0x07;
             break;
 
         case 0x4a: /* IDE General Control Register 0 */
@@ -659,7 +662,11 @@ sis_5513_read(int func, int addr, void *priv)
 
         sis_5511_log("SiS 5513 P2I: [R] dev->pci_conf_sb[0][%02X] = %02X\n", addr, ret);
     } else if (func == 0x01) {
-        ret = dev->pci_conf_sb[func][addr];
+        if (addr == 0x3d)
+            ret = (((dev->pci_conf_sb[0x01][0x4b] & 0xc0) == 0xc0) ||
+                   (dev->pci_conf_sb[0x01][0x09] & 0x05)) ? PCI_INTA : 0x00;
+        else
+            ret = dev->pci_conf_sb[func][addr];
 
         sis_5511_log("SiS 5513 IDE: [R] dev->pci_conf_sb[1][%02X] = %02X\n", addr, ret);
     }
@@ -785,7 +792,9 @@ sis_5511_reset(void *priv)
     dev->pci_conf[0x74] = dev->pci_conf[0x76] = 0x04;
     dev->pci_conf[0x78] = dev->pci_conf[0x7a] = 0x04;
     dev->pci_conf[0x7c] = dev->pci_conf[0x7e] = 0x04;
+    dev->pci_conf[0x71] = dev->pci_conf[0x75] = 0x00;
     dev->pci_conf[0x73] = dev->pci_conf[0x77] = 0x80;
+    dev->pci_conf[0x79] = dev->pci_conf[0x7d] = 0x00;
     dev->pci_conf[0x7b] = dev->pci_conf[0x7f] = 0x80;
     dev->pci_conf[0x80] = dev->pci_conf[0x81] = 0x00;
     dev->pci_conf[0x82] = dev->pci_conf[0x83] = 0x00;
@@ -820,13 +829,13 @@ sis_5511_reset(void *priv)
     dev->pci_conf_sb[0][0x40] = 0x00;
     dev->pci_conf_sb[0][0x41] = dev->pci_conf_sb[0][0x42] = 0x80;
     dev->pci_conf_sb[0][0x43] = dev->pci_conf_sb[0][0x44] = 0x80;
-    dev->pci_conf_sb[0][0x48] = dev->pci_conf_sb[0][0x49] = 0x80;
-    dev->pci_conf_sb[0][0x4a] = dev->pci_conf_sb[0][0x4b] = 0x80;
-    dev->pci_conf_sb[0][0x60] = dev->pci_conf_sb[0][0x51] = 0x80;
+    dev->pci_conf_sb[0][0x48] = dev->pci_conf_sb[0][0x49] = 0x00;
+    dev->pci_conf_sb[0][0x4a] = dev->pci_conf_sb[0][0x4b] = 0x00;
+    dev->pci_conf_sb[0][0x60] = dev->pci_conf_sb[0][0x61] = 0x80;
     dev->pci_conf_sb[0][0x62] = 0x00;
     dev->pci_conf_sb[0][0x63] = 0x80;
     dev->pci_conf_sb[0][0x64] = 0x00;
-    dev->pci_conf_sb[0][0x65] = 0x80;
+    dev->pci_conf_sb[0][0x65] = 0x00;
     dev->pci_conf_sb[0][0x66] = dev->pci_conf_sb[0][0x67] = 0x00;
     dev->pci_conf_sb[0][0x68] = dev->pci_conf_sb[0][0x69] = 0x00;
     dev->pci_conf_sb[0][0x6a] = 0x04;
@@ -873,6 +882,23 @@ sis_5511_reset(void *priv)
     dev->pci_conf_sb[1][0x20] = 0x01;
     dev->pci_conf_sb[1][0x21] = 0xf0;
     dev->pci_conf_sb[1][0x22] = dev->pci_conf_sb[1][0x23] = 0x00;
+    dev->pci_conf_sb[1][0x24] = dev->pci_conf_sb[1][0x25] = 0x00;
+    dev->pci_conf_sb[1][0x26] = dev->pci_conf_sb[1][0x27] = 0x00;
+    dev->pci_conf_sb[1][0x28] = dev->pci_conf_sb[1][0x29] = 0x00;
+    dev->pci_conf_sb[1][0x2a] = dev->pci_conf_sb[1][0x2b] = 0x00;
+    dev->pci_conf_sb[1][0x2c] = dev->pci_conf_sb[1][0x2d] = 0x00;
+    dev->pci_conf_sb[1][0x2e] = dev->pci_conf_sb[1][0x2f] = 0x00;
+    dev->pci_conf_sb[1][0x30] = dev->pci_conf_sb[1][0x31] = 0x00;
+    dev->pci_conf_sb[1][0x32] = dev->pci_conf_sb[1][0x33] = 0x00;
+    dev->pci_conf_sb[1][0x40] = dev->pci_conf_sb[1][0x41] = 0x00;
+    dev->pci_conf_sb[1][0x42] = dev->pci_conf_sb[1][0x43] = 0x00;
+    dev->pci_conf_sb[1][0x44] = dev->pci_conf_sb[1][0x45] = 0x00;
+    dev->pci_conf_sb[1][0x46] = dev->pci_conf_sb[1][0x47] = 0x00;
+    dev->pci_conf_sb[1][0x48] = dev->pci_conf_sb[1][0x49] = 0x00;
+    dev->pci_conf_sb[1][0x4a] = 0x06;
+    dev->pci_conf_sb[1][0x4b] = 0x00;
+    dev->pci_conf_sb[1][0x4c] = dev->pci_conf_sb[1][0x4d] = 0x00;
+    dev->pci_conf_sb[1][0x4e] = dev->pci_conf_sb[1][0x4f] = 0x00;
 
     sis_5513_ide_irq_handler(dev);
     sis_5513_ide_handler(dev);
@@ -896,8 +922,6 @@ sis_5511_init(UNUSED(const device_t *info))
     sis_5511_t *dev = (sis_5511_t *) calloc(1, sizeof(sis_5511_t));
     uint8_t pit_is_fast = (((pit_mode == -1) && is486) || (pit_mode == 1));
 
-    memset(dev, 0, sizeof(sis_5511_t));
-
     /* Device 0: SiS 5511 */
     pci_add_card(PCI_ADD_NORTHBRIDGE, sis_5511_read, sis_5511_write, dev, &dev->nb_slot);
     /* Device 1: SiS 5513 */

src/chipset/sis_85c496.c

@@ -123,7 +123,7 @@ sis_85c497_isa_read(uint16_t port, void *priv)
     const sis_85c496_t *dev = (sis_85c496_t *) priv;
     uint8_t             ret = 0xff;
 
-    if (port == 0x23)
+    if ((port == 0x23) && (dev->cur_reg < 0xc0))
         ret = dev->regs[dev->cur_reg];
     else if (port == 0x33)
         ret = 0x3c /*random_generate()*/;

src/codegen_new/codegen_backend_x86-64.c

@@ -73,7 +73,7 @@ static void
 build_load_routine(codeblock_t *block, int size, int is_float)
 {
     uint8_t *branch_offset;
-    uint8_t *misaligned_offset;
+    uint8_t *misaligned_offset = NULL;
 
     /*In - ESI = address
       Out - ECX = data, ESI = abrt*/
@@ -161,7 +161,7 @@ static void
 build_store_routine(codeblock_t *block, int size, int is_float)
 {
     uint8_t *branch_offset;
-    uint8_t *misaligned_offset;
+    uint8_t *misaligned_offset = NULL;
 
     /*In - ECX = data, ESI = address
       Out - ESI = abrt

src/config.c

@@ -244,25 +244,81 @@ load_machine(void)
 {
     ini_section_t cat = ini_find_section(config, "Machine");
     const char   *p;
+    const char   *migrate_from = NULL;
     int           c;
     int           i;
+    int           j;
     int           speed;
     double        multi;
 
     p = ini_section_get_string(cat, "machine", NULL);
-    if (p != NULL)
-        machine = machine_get_machine_from_internal_name(p);
-    else
+    if (p != NULL) {
+        migrate_from = p;
+        /* Migrate renamed machines. */
+        if (!strcmp(p, "430nx"))
+            machine = machine_get_machine_from_internal_name("586ip");
+        else if (!strcmp(p, "586mc1"))
+            machine = machine_get_machine_from_internal_name("586is");
+        else {
+            machine      = machine_get_machine_from_internal_name(p);
+            migrate_from = NULL;
+        }
+    } else
         machine = 0;
 
     if (machine >= machine_count())
         machine = machine_count() - 1;
 
+    /* Copy NVR files when migrating a machine to a new internal name. */
+    if (migrate_from) {
+        char old_fn[256];
+        strcpy(old_fn, migrate_from);
+        strcat(old_fn, ".");
+        c = strlen(old_fn);
+        char new_fn[256];
+        strcpy(new_fn, machines[machine].internal_name);
+        strcat(new_fn, ".");
+        i = strlen(new_fn);
+
+        /* Iterate through NVR files. */
+        DIR *dirp = opendir(nvr_path("."));
+        if (dirp) {
+            struct dirent *entry;
+            while ((entry = readdir(dirp))) {
+                /* Check if this file corresponds to the old name. */
+                if (strncmp(entry->d_name, old_fn, c))
+                    continue;
+
+                /* Add extension to the new name. */
+                strcpy(&new_fn[i], &entry->d_name[c]);
+
+                /* Only copy if a file with the new name doesn't already exist. */
+                FILE *g = nvr_fopen(new_fn, "rb");
+                if (!g) {
+                    FILE *f = nvr_fopen(entry->d_name, "rb");
+                    g       = nvr_fopen(new_fn, "wb");
+
+                    uint8_t buf[4096];
+                    while ((j = fread(buf, 1, sizeof(buf), f)))
+                        fwrite(buf, 1, j, g);
+
+                    fclose(f);
+                }
+                fclose(g);
+            }
+        }
+    }
+
     cpu_override = ini_section_get_int(cat, "cpu_override", 0);
     cpu_f        = NULL;
     p            = ini_section_get_string(cat, "cpu_family", NULL);
     if (p) {
-        cpu_f = cpu_get_family(p);
+        /* Migrate CPU family changes. */
+        if ((!strcmp(machines[machine].internal_name, "deskpro386") ||
+            !strcmp(machines[machine].internal_name, "deskpro386_05_1988")))
+            cpu_f = cpu_get_family("i386dx_deskpro386");
+        else
+            cpu_f = cpu_get_family(p);
 
         if (cpu_f && !cpu_family_is_eligible(cpu_f, machine)) /* only honor eligible families */
             cpu_f = NULL;
@@ -721,6 +777,7 @@ static void
 load_storage_controllers(void)
 {
     ini_section_t cat = ini_find_section(config, "Storage controllers");
+    ini_section_t migration_cat;
     char         *p;
     char          temp[512];
     int           c;
@@ -754,17 +811,16 @@ load_storage_controllers(void)
         }
         free_p = 1;
     }
-    if (!strcmp(p, "mfm_xt"))
-        hdc_current = hdc_get_from_internal_name("st506_xt");
-    else if (!strcmp(p, "mfm_xt_dtc5150x"))
-        hdc_current = hdc_get_from_internal_name("st506_xt_dtc5150x");
-    else if (!strcmp(p, "mfm_at"))
-        hdc_current = hdc_get_from_internal_name("st506_at");
-    else if (!strcmp(p, "vlb_isa"))
-        hdc_current = hdc_get_from_internal_name("ide_vlb");
-    else if (!strcmp(p, "vlb_isa_2ch"))
-        hdc_current = hdc_get_from_internal_name("ide_vlb_2ch");
-    else
+    /* Migrate renamed and merged cards. */
+    if (!strcmp(p, "xtide_plus")) {
+        hdc_current = hdc_get_from_internal_name("xtide");
+        migration_cat = ini_find_or_create_section(config, "PC/XT XTIDE");
+        ini_section_set_string(migration_cat, "bios", "xt_plus");
+    } else if (!strcmp(p, "xtide_at_386")) {
+        hdc_current = hdc_get_from_internal_name("xtide_at");
+        migration_cat = ini_find_or_create_section(config, "PC/AT XTIDE");
+        ini_section_set_string(migration_cat, "bios", "at_386");
+    } else
         hdc_current = hdc_get_from_internal_name(p);
 
     if (free_p) {
@@ -1104,13 +1160,13 @@ load_floppy_and_cdrom_drives(void)
             p = ini_section_get_string(cat, temp, NULL);
             if (p) {
                 if (path_abs(p)) {
-                    if (strlen(p) > 255)
-                        fatal("load_floppy_and_cdrom_drives(): strlen(p) > 255 "
+                    if (strlen(p) > (MAX_IMAGE_PATH_LEN - 1))
+                        fatal("load_floppy_and_cdrom_drives(): strlen(p) > 2047 "
                               "(fdd_image_history[%i][%i])\n", c, i);
                     else
-                        snprintf(fdd_image_history[c][i], 255, "%s", p);
+                        snprintf(fdd_image_history[c][i], (MAX_IMAGE_PATH_LEN - 1), "%s", p);
                 } else
-                    snprintf(fdd_image_history[c][i], 255, "%s%s%s", usr_path,
+                    snprintf(fdd_image_history[c][i], (MAX_IMAGE_PATH_LEN - 1), "%s%s%s", usr_path,
                              path_get_slash(usr_path), p);
                 path_normalize(fdd_image_history[c][i]);
             }
@@ -1220,13 +1276,13 @@ load_floppy_and_cdrom_drives(void)
             p = ini_section_get_string(cat, temp, NULL);
             if (p) {
                 if (path_abs(p)) {
-                    if (strlen(p) > 511)
-                        fatal("load_floppy_and_cdrom_drives(): strlen(p) > 511 "
+                    if (strlen(p) > (MAX_IMAGE_PATH_LEN - 1))
+                        fatal("load_floppy_and_cdrom_drives(): strlen(p) > 2047 "
                               "(cdrom[%i].image_history[%i])\n", c, i);
                     else
-                        snprintf(cdrom[c].image_history[i], 511, "%s", p);
+                        snprintf(cdrom[c].image_history[i], (MAX_IMAGE_PATH_LEN - 1), "%s", p);
                 } else
-                    snprintf(cdrom[c].image_history[i], 511, "%s%s%s", usr_path,
+                    snprintf(cdrom[c].image_history[i], (MAX_IMAGE_PATH_LEN - 1), "%s%s%s", usr_path,
                              path_get_slash(usr_path), p);
                 path_normalize(cdrom[c].image_history[i]);
             }
@@ -1353,13 +1409,13 @@ load_other_removable_devices(void)
             p = ini_section_get_string(cat, temp, NULL);
             if (p) {
                 if (path_abs(p)) {
-                    if (strlen(p) > 511)
-                        fatal("load_other_removable_devices(): strlen(p) > 511 "
+                    if (strlen(p) > (MAX_IMAGE_PATH_LEN - 1))
+                        fatal("load_other_removable_devices(): strlen(p) > 2047 "
                               "(zip_drives[%i].image_history[%i])\n", c, i);
                     else
-                        snprintf(zip_drives[c].image_history[i], 511, "%s", p);
+                        snprintf(zip_drives[c].image_history[i], (MAX_IMAGE_PATH_LEN - 1), "%s", p);
                 } else
-                    snprintf(zip_drives[c].image_history[i], 511, "%s%s%s", usr_path,
+                    snprintf(zip_drives[c].image_history[i], (MAX_IMAGE_PATH_LEN - 1), "%s%s%s", usr_path,
                              path_get_slash(usr_path), p);
                 path_normalize(zip_drives[c].image_history[i]);
             }
@@ -1469,13 +1525,13 @@ load_other_removable_devices(void)
             p = ini_section_get_string(cat, temp, NULL);
             if (p) {
                 if (path_abs(p)) {
-                    if (strlen(p) > 511)
-                        fatal("load_other_removable_devices(): strlen(p) > 511 "
+                    if (strlen(p) > (MAX_IMAGE_PATH_LEN - 1))
+                        fatal("load_other_removable_devices(): strlen(p) > 2047 "
                               "(mo_drives[%i].image_history[%i])\n", c, i);
                     else
-                        snprintf(mo_drives[c].image_history[i], 511, "%s", p);
+                        snprintf(mo_drives[c].image_history[i], (MAX_IMAGE_PATH_LEN - 1), "%s", p);
                 } else
-                    snprintf(mo_drives[c].image_history[i], 511, "%s%s%s", usr_path,
+                    snprintf(mo_drives[c].image_history[i], (MAX_IMAGE_PATH_LEN - 1), "%s%s%s", usr_path,
                              path_get_slash(usr_path), p);
                 path_normalize(mo_drives[c].image_history[i]);
             }
@@ -1514,8 +1570,9 @@ load_other_peripherals(void)
     char         *p;
     char          temp[512];
 
-    bugger_enabled   = !!ini_section_get_int(cat, "bugger_enabled", 0);
-    postcard_enabled = !!ini_section_get_int(cat, "postcard_enabled", 0);
+    bugger_enabled     = !!ini_section_get_int(cat, "bugger_enabled", 0);
+    postcard_enabled   = !!ini_section_get_int(cat, "postcard_enabled", 0);
+    unittester_enabled = !!ini_section_get_int(cat, "unittester_enabled", 0);
 
     for (uint8_t c = 0; c < ISAMEM_MAX; c++) {
         sprintf(temp, "isamem%d_type", c);
@@ -1532,7 +1589,8 @@ load_other_peripherals(void)
 void
 config_load(void)
 {
-    int i;
+    int           i;
+    ini_section_t c;
 
     config_log("Loading config file '%s'..\n", cfg_path);
 
@@ -1622,6 +1680,23 @@ config_load(void)
         load_other_removable_devices(); /* Other removable devices */
         load_other_peripherals();       /* Other peripherals */
 
+        /* Migrate renamed device configurations. */
+        c = ini_find_section(config, "MDA");
+        if (c != NULL)
+            ini_rename_section(c, "IBM MDA");
+        c = ini_find_section(config, "CGA");
+        if (c != NULL)
+            ini_rename_section(c, "IBM CGA");
+        c = ini_find_section(config, "EGA");
+        if (c != NULL)
+            ini_rename_section(c, "IBM EGA");
+        c = ini_find_section(config, "3DFX Voodoo Graphics");
+        if (c != NULL)
+            ini_rename_section(c, "3Dfx Voodoo Graphics");
+        c = ini_find_section(config, "3dfx Voodoo Banshee");
+        if (c != NULL)
+            ini_rename_section(c, "3Dfx Voodoo Banshee");
+
         /* Mark the configuration as changed. */
         config_changed = 1;
 
@@ -1845,11 +1920,6 @@ save_machine(void)
 {
     ini_section_t cat = ini_find_or_create_section(config, "Machine");
     const char   *p;
-    int           c;
-    int           i = 0;
-    int           legacy_mfg;
-    int           legacy_cpu = -1;
-    int           closest_legacy_cpu = -1;
 
     p = machine_get_internal_name();
     ini_section_set_string(cat, "machine", p);
@@ -1866,57 +1936,6 @@ save_machine(void)
     ini_section_delete_var(cat, "cpu_manufacturer");
     ini_section_delete_var(cat, "cpu");
 
-    /* Look for a machine entry on the legacy table. */
-    c = 0;
-    while (cpu_legacy_table[c].machine) {
-        if (!strcmp(p, cpu_legacy_table[c].machine))
-            break;
-        c++;
-    }
-    if (cpu_legacy_table[c].machine) {
-        /* Look for a corresponding CPU entry. */
-        const cpu_legacy_table_t *legacy_table_entry;
-        for (legacy_mfg = 0; legacy_mfg < 4; legacy_mfg++) {
-            if (!cpu_legacy_table[c].tables[legacy_mfg])
-                continue;
-
-            i = 0;
-            while (cpu_legacy_table[c].tables[legacy_mfg][i].family) {
-                legacy_table_entry = &cpu_legacy_table[c].tables[legacy_mfg][i];
-
-                /* Match the family name, speed and multiplier. */
-                if (!strcmp(cpu_f->internal_name, legacy_table_entry->family)) {
-                    if ((legacy_table_entry->rspeed == cpu_f->cpus[cpu].rspeed) &&
-                        (legacy_table_entry->multi == cpu_f->cpus[cpu].multi)) {
-                        /* Exact speed/multiplier match. */
-                        legacy_cpu = i;
-                        break;
-                    } else if ((legacy_table_entry->rspeed >= cpu_f->cpus[cpu].rspeed) &&
-                               (closest_legacy_cpu == -1))
-                        /* Closest speed match. */
-                        closest_legacy_cpu = i;
-                }
-
-                i++;
-            }
-
-            /* Use the closest speed match if no exact match was found. */
-            if ((legacy_cpu == -1) && (closest_legacy_cpu > -1)) {
-                legacy_cpu = closest_legacy_cpu;
-                break;
-            } else if (legacy_cpu > -1) /* exact match found */
-                break;
-        }
-
-        /* Set legacy values if a match was found. */
-        if (legacy_cpu > -1) {
-            if (legacy_mfg)
-                ini_section_set_int(cat, "cpu_manufacturer", legacy_mfg);
-            if (legacy_cpu)
-                ini_section_set_int(cat, "cpu", legacy_cpu);
-        }
-    }
-
     if (cpu_waitstates == 0)
         ini_section_delete_var(cat, "cpu_waitstates");
     else
@@ -2348,6 +2367,11 @@ save_other_peripherals(void)
     else
         ini_section_set_int(cat, "postcard_enabled", postcard_enabled);
 
+    if (unittester_enabled == 0)
+        ini_section_delete_var(cat, "unittester_enabled");
+    else
+        ini_section_set_int(cat, "unittester_enabled", unittester_enabled);
+
     for (uint8_t c = 0; c < ISAMEM_MAX; c++) {
         sprintf(temp, "isamem%d_type", c);
         if (isamem_type[c] == 0)

src/cpu/386.c

@@ -240,6 +240,7 @@ exec386_2386(int32_t cycs)
         cycdiff       = 0;
         oldcyc        = cycles;
         while (cycdiff < cycle_period) {
+            int ins_fetch_fault = 0;
             ins_cycles = cycles;
 
 #ifndef USE_NEW_DYNAREC
@@ -259,6 +260,14 @@ exec386_2386(int32_t cycs)
             fetchdat = fastreadl_fetch(cs + cpu_state.pc);
             ol = opcode_length[fetchdat & 0xff];
             CHECK_READ_CS(MIN(ol, 4));
+            ins_fetch_fault = cpu_386_check_instruction_fault();
+
+            if (!cpu_state.abrt && ins_fetch_fault) {
+                x86gen();
+                ins_fetch_fault = 0;
+                /* No instructions executed at this point. */
+                goto block_ended;
+            }
 
             if (!cpu_state.abrt) {
 #ifdef ENABLE_386_LOG
@@ -267,7 +276,7 @@ exec386_2386(int32_t cycs)
 #endif
                 opcode = fetchdat & 0xFF;
                 fetchdat >>= 8;
-                trap = cpu_state.flags & T_FLAG;
+                trap |= !!(cpu_state.flags & T_FLAG);
 
                 cpu_state.pc++;
                 x86_opcodes[(opcode | cpu_state.op32) & 0x3ff](fetchdat);
@@ -287,6 +296,7 @@ exec386_2386(int32_t cycs)
             if (cpu_end_block_after_ins)
                 cpu_end_block_after_ins--;
 
+block_ended:
             if (cpu_state.abrt) {
                 flags_rebuild();
                 tempi          = cpu_state.abrt & ABRT_MASK;
@@ -309,14 +319,17 @@ exec386_2386(int32_t cycs)
 #endif
                     }
                 }
+                if (!x86_was_reset && ins_fetch_fault)
+                    x86gen();   /* This is supposed to be the first one serviced by the processor according to the manual. */
             } else if (trap) {
                 flags_rebuild();
+                if (trap & 2) dr[6] |= 0x8000;
+                if (trap & 1) dr[6] |= 0x4000;
                 trap = 0;
 #ifndef USE_NEW_DYNAREC
                 oldcs = CS;
 #endif
                 cpu_state.oldpc = cpu_state.pc;
-                dr[6] |= 0x4000;
                 x86_int(1);
             }
 

src/cpu/386_common.c

@@ -80,6 +80,7 @@ int smm_in_hlt  = 0;
 int smi_block   = 0;
 
 int prefetch_prefixes = 0;
+int rf_flag_no_clear = 0;
 
 int tempc;
 int oldcpl;
@@ -1491,7 +1492,7 @@ x86_int_sw(int num)
         }
     }
 
-    trap = 0;
+    trap &= ~1;
     CPU_BLOCK_END();
 }
 
@@ -1534,7 +1535,7 @@ x86_int_sw_rm(int num)
 #endif
 
     cycles -= timing_int_rm;
-    trap = 0;
+    trap &= ~1;
     CPU_BLOCK_END();
 
     return 0;
@@ -1655,6 +1656,37 @@ cpu_386_flags_rebuild(void)
     flags_rebuild();
 }
 
+extern uint64_t mmutranslate_noabrt_2386(uint32_t addr, int rw);
+int
+cpu_386_check_instruction_fault(void)
+{
+    int i = 0;
+    int fault = 0;
+    /* Report no fault if RF is set. */
+    if (cpu_state.eflags & RF_FLAG)
+        return 0;
+
+    /* Make sure breakpoints are enabled. */
+    if (!(dr[7] & 0xFF))
+        return 0;
+
+    for (i = 0; i < 4; i++) {
+        int breakpoint_enabled = !!(dr[7] & (0x3 << (2 * i))) && !(dr[7] & (0x30000 << (4 * i)));
+        uint32_t translated_addr = 0xffffffff;
+        if (!breakpoint_enabled)
+            continue;
+
+        translated_addr = dr[i];
+
+        if ((cs + cpu_state.pc) == (uint32_t)translated_addr) {
+            dr[6] |= (1 << i);
+            fault = 1;
+        }
+    }
+
+    return fault;
+}
+
 int
 sysenter(uint32_t fetchdat)
 {

src/cpu/386_common.h

@@ -674,3 +674,8 @@ seteaq(uint64_t v)
     cpu_state.pc += 2
 
 #endif
+
+/* Resume Flag handling. */
+extern int rf_flag_no_clear;
+
+int cpu_386_check_instruction_fault(void);

src/cpu/386_dynarec.c

@@ -48,6 +48,7 @@
 
 #define CPU_BLOCK_END() cpu_block_end = 1
 
+int cpu_override_dynarec    = 0;
 int inrecomp                = 0;
 int cpu_block_end           = 0;
 int cpu_end_block_after_ins = 0;
@@ -268,6 +269,12 @@ exec386_dynarec_int(void)
     cpu_block_end = 0;
     x86_was_reset = 0;
 
+    if (trap == 2) {
+        /* Handle the T bit in the new TSS first. */
+        CPU_BLOCK_END();
+        goto block_ended;
+    }
+
     while (!cpu_block_end) {
 #    ifndef USE_NEW_DYNAREC
         oldcs  = CS;
@@ -321,13 +328,14 @@ exec386_dynarec_int(void)
             CPU_BLOCK_END();
     }
 
+block_ended:
     if (!cpu_state.abrt && trap) {
+        dr[6] |= (trap == 2) ? 0x8000 : 0x4000;
         trap = 0;
 #    ifndef USE_NEW_DYNAREC
         oldcs = CS;
 #    endif
         cpu_state.oldpc = cpu_state.pc;
-        dr[6] |= 0x4000;
         x86_int(1);
     }
 
@@ -542,7 +550,7 @@ exec386_dynarec_dyn(void)
 #    endif
                 CPU_BLOCK_END();
 
-            if (cpu_state.flags & T_FLAG)
+            if ((cpu_state.flags & T_FLAG) || (trap == 2))
                 CPU_BLOCK_END();
             if (smi_line)
                 CPU_BLOCK_END();
@@ -711,7 +719,7 @@ exec386_dynarec(int32_t cycs)
             cycles_old       = cycles;
             oldtsc           = tsc;
             tsc_old          = tsc;
-            if (!CACHE_ON()) /*Interpret block*/
+            if ((!CACHE_ON()) || cpu_override_dynarec) /*Interpret block*/
             {
                 exec386_dynarec_int();
             } else {

src/cpu/386_ops.h

@@ -181,7 +181,11 @@ extern void x386_dynarec_log(const char *fmt, ...);
 #ifndef OPS_286_386
 #    include "x86_ops_cyrix.h"
 #endif
-#include "x86_ops_flag.h"
+#ifdef OPS_286_386
+#    include "x86_ops_flag_2386.h"
+#else
+#    include "x86_ops_flag.h"
+#endif
 #include "x86_ops_fpu.h"
 #include "x86_ops_inc_dec.h"
 #include "x86_ops_int.h"
@@ -200,7 +204,11 @@ extern void x386_dynarec_log(const char *fmt, ...);
 #    include "x86_ops_mmx_shift.h"
 #endif
 #include "x86_ops_mov.h"
-#include "x86_ops_mov_ctrl.h"
+#ifdef OPS_286_386
+#    include "x86_ops_mov_ctrl_2386.h"
+#else
+#    include "x86_ops_mov_ctrl.h"
+#endif
 #include "x86_ops_mov_seg.h"
 #include "x86_ops_movx.h"
 #ifndef OPS_286_386
@@ -218,7 +226,11 @@ extern void x386_dynarec_log(const char *fmt, ...);
 #        include "x86_ops_rep.h"
 #    endif
 #endif
-#include "x86_ops_ret.h"
+#ifdef OPS_286_386
+#    include "x86_ops_ret_2386.h"
+#else
+#    include "x86_ops_ret.h"
+#endif
 #include "x86_ops_set.h"
 #include "x86_ops_stack.h"
 #ifdef OPS_286_386
@@ -629,7 +641,7 @@ const OpFn OP_TABLE(386_0f)[1024] = {
     // clang-format off
         /*16-bit data, 16-bit addr*/
 /*      00              01              02              03              04              05              06              07              08              09              0a              0b              0c              0d              0e              0f*/
-/*00*/  op0F00_a16,     op0F01_w_a16,   opLAR_w_a16,    opLSL_w_a16,    ILLEGAL,        ILLEGAL,        opCLTS,         opLOADALL386,   opINVD,         opWBINVD,       ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
+/*00*/  op0F00_a16,     op0F01_w_a16,   opLAR_w_a16,    opLSL_w_a16,    ILLEGAL,        ILLEGAL,        opCLTS,         opLOADALL386,   ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 /*10*/  opMOV_b_r_a16,  opMOV_w_r_a16,  opMOV_r_b_a16,  opMOV_r_w_a16,  ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 /*20*/  opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL,        opMOV_TRx_r_a16,ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 /*30*/  ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
@@ -644,14 +656,14 @@ const OpFn OP_TABLE(386_0f)[1024] = {
 /*a0*/  opPUSH_FS_w,    opPOP_FS_w,     ILLEGAL,        opBT_w_r_a16,   opSHLD_w_i_a16, opSHLD_w_CL_a16,ILLEGAL,        ILLEGAL,        opPUSH_GS_w,    opPOP_GS_w,     opRSM,          opBTS_w_r_a16,  opSHRD_w_i_a16, opSHRD_w_CL_a16,ILLEGAL,        opIMUL_w_w_a16,
 /*b0*/  ILLEGAL,        ILLEGAL,        opLSS_w_a16,    opBTR_w_r_a16,  opLFS_w_a16,    opLGS_w_a16,    opMOVZX_w_b_a16,opMOVZX_w_w_a16,ILLEGAL,        ILLEGAL,        opBA_w_a16,     opBTC_w_r_a16,  opBSF_w_a16,    opBSR_w_a16,    opMOVSX_w_b_a16,ILLEGAL,
 
-/*c0*/  opXADD_b_a16,   opXADD_w_a16,   ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
+/*c0*/  ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 /*d0*/  ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 /*e0*/  ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 /*f0*/  ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 
         /*32-bit data, 16-bit addr*/
 /*      00              01              02              03              04              05              06              07              08              09              0a              0b              0c              0d              0e              0f*/
-/*00*/  op0F00_a16,     op0F01_l_a16,   opLAR_l_a16,    opLSL_l_a16,    ILLEGAL,        ILLEGAL,        opCLTS,         opLOADALL386,   opINVD,         opWBINVD,       ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
+/*00*/  op0F00_a16,     op0F01_l_a16,   opLAR_l_a16,    opLSL_l_a16,    ILLEGAL,        ILLEGAL,        opCLTS,         opLOADALL386,   ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 /*10*/  opMOV_b_r_a16,  opMOV_l_r_a16,  opMOV_r_b_a16,  opMOV_r_l_a16,  ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 /*20*/  opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL,        opMOV_TRx_r_a16,ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 /*30*/  ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
@@ -666,14 +678,14 @@ const OpFn OP_TABLE(386_0f)[1024] = {
 /*a0*/  opPUSH_FS_l,    opPOP_FS_l,     ILLEGAL,        opBT_l_r_a16,   opSHLD_l_i_a16, opSHLD_l_CL_a16,ILLEGAL,        ILLEGAL,        opPUSH_GS_l,    opPOP_GS_l,     opRSM,          opBTS_l_r_a16,  opSHRD_l_i_a16, opSHRD_l_CL_a16,ILLEGAL,        opIMUL_l_l_a16,
 /*b0*/  ILLEGAL,        ILLEGAL,        opLSS_l_a16,    opBTR_l_r_a16,  opLFS_l_a16,    opLGS_l_a16,    opMOVZX_l_b_a16,opMOVZX_l_w_a16,ILLEGAL,        ILLEGAL,        opBA_l_a16,     opBTC_l_r_a16,  opBSF_l_a16,    opBSR_l_a16,    opMOVSX_l_b_a16,opMOVSX_l_w_a16,
 
-/*c0*/  opXADD_b_a16,   opXADD_l_a16,   ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
+/*c0*/  ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 /*d0*/  ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 /*e0*/  ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 /*f0*/  ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 
         /*16-bit data, 32-bit addr*/
 /*      00              01              02              03              04              05              06              07              08              09              0a              0b              0c              0d              0e              0f*/
-/*00*/  op0F00_a32,     op0F01_w_a32,   opLAR_w_a32,    opLSL_w_a32,    ILLEGAL,        ILLEGAL,        opCLTS,         opLOADALL386,   opINVD,         opWBINVD,       ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
+/*00*/  op0F00_a32,     op0F01_w_a32,   opLAR_w_a32,    opLSL_w_a32,    ILLEGAL,        ILLEGAL,        opCLTS,         opLOADALL386,   ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 /*10*/  opMOV_b_r_a32,  opMOV_w_r_a32,  opMOV_r_b_a32,  opMOV_r_w_a32,  ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 /*20*/  opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL,        opMOV_TRx_r_a32,ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 /*30*/  ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
@@ -688,14 +700,14 @@ const OpFn OP_TABLE(386_0f)[1024] = {
 /*a0*/  opPUSH_FS_w,    opPOP_FS_w,     ILLEGAL,        opBT_w_r_a32,   opSHLD_w_i_a32, opSHLD_w_CL_a32,ILLEGAL,        ILLEGAL,        opPUSH_GS_w,    opPOP_GS_w,     opRSM,          opBTS_w_r_a32,  opSHRD_w_i_a32, opSHRD_w_CL_a32,ILLEGAL,        opIMUL_w_w_a32,
 /*b0*/  ILLEGAL,        ILLEGAL,        opLSS_w_a32,    opBTR_w_r_a32,  opLFS_w_a32,    opLGS_w_a32,    opMOVZX_w_b_a32,opMOVZX_w_w_a32,ILLEGAL,        ILLEGAL,        opBA_w_a32,     opBTC_w_r_a32,  opBSF_w_a32,    opBSR_w_a32,    opMOVSX_w_b_a32,ILLEGAL,
 
-/*c0*/  opXADD_b_a32,   opXADD_w_a32,   ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
+/*c0*/  ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 /*d0*/  ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 /*e0*/  ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 /*f0*/  ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 
         /*32-bit data, 32-bit addr*/
 /*      00              01              02              03              04              05              06              07              08              09              0a              0b              0c              0d              0e              0f*/
-/*00*/  op0F00_a32,     op0F01_l_a32,   opLAR_l_a32,    opLSL_l_a32,    ILLEGAL,        ILLEGAL,        opCLTS,         opLOADALL386,   opINVD,         opWBINVD,       ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
+/*00*/  op0F00_a32,     op0F01_l_a32,   opLAR_l_a32,    opLSL_l_a32,    ILLEGAL,        ILLEGAL,        opCLTS,         opLOADALL386,   ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 /*10*/  opMOV_b_r_a32,  opMOV_l_r_a32,  opMOV_r_b_a32,  opMOV_r_l_a32,  ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 /*20*/  opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL,        opMOV_TRx_r_a32,ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 /*30*/  ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
@@ -710,7 +722,7 @@ const OpFn OP_TABLE(386_0f)[1024] = {
 /*a0*/  opPUSH_FS_l,    opPOP_FS_l,     ILLEGAL,        opBT_l_r_a32,   opSHLD_l_i_a32, opSHLD_l_CL_a32,ILLEGAL,        ILLEGAL,        opPUSH_GS_l,    opPOP_GS_l,     opRSM,          opBTS_l_r_a32,  opSHRD_l_i_a32, opSHRD_l_CL_a32,ILLEGAL,        opIMUL_l_l_a32,
 /*b0*/  ILLEGAL,        ILLEGAL,        opLSS_l_a32,    opBTR_l_r_a32,  opLFS_l_a32,    opLGS_l_a32,    opMOVZX_l_b_a32,opMOVZX_l_w_a32,ILLEGAL,        ILLEGAL,        opBA_l_a32,     opBTC_l_r_a32,  opBSF_l_a32,    opBSR_l_a32,    opMOVSX_l_b_a32,opMOVSX_l_w_a32,
 
-/*c0*/  opXADD_b_a32,   opXADD_l_a32,   ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
+/*c0*/  ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 /*d0*/  ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 /*e0*/  ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,
 /*f0*/  ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,        ILLEGAL,

src/cpu/808x.c

@@ -563,9 +563,10 @@ reset_808x(int hard)
         _opseg[3] = &cpu_state.seg_ds;
 
         pfq_size = (is8086) ? 6 : 4;
-        pfq_clear();
     }
 
+    pfq_clear();
+
     load_cs(0xFFFF);
     cpu_state.pc = 0;
     if (is_nec)
@@ -1222,34 +1223,48 @@ static void
 add(int bits)
 {
     int size_mask = (1 << bits) - 1;
+    int special_case = 0;
+    uint32_t temp_src = cpu_src;
+
+    if ((cpu_alu_op == 2) && !(cpu_src & size_mask) && (cpu_state.flags & C_FLAG))
+        special_case = 1;
 
     cpu_data = cpu_dest + cpu_src;
+    if ((cpu_alu_op == 2) && (cpu_state.flags & C_FLAG))
+        cpu_src--;
     set_apzs(bits);
     set_of_add(bits);
 
     /* Anything - FF with carry on is basically anything + 0x100: value stays
        unchanged but carry goes on. */
-    if ((cpu_alu_op == 2) && !(cpu_src & size_mask) && (cpu_state.flags & C_FLAG))
+    if (special_case)
         cpu_state.flags |= C_FLAG;
     else
-        set_cf((cpu_src & size_mask) > (cpu_data & size_mask));
+        set_cf((temp_src & size_mask) > (cpu_data & size_mask));
 }
 
 static void
 sub(int bits)
 {
     int size_mask = (1 << bits) - 1;
+    int special_case = 0;
+    uint32_t temp_src = cpu_src;
+
+    if ((cpu_alu_op == 3) && !(cpu_src & size_mask) && (cpu_state.flags & C_FLAG))
+        special_case = 1;
 
     cpu_data = cpu_dest - cpu_src;
+    if ((cpu_alu_op == 3) && (cpu_state.flags & C_FLAG))
+        cpu_src--;
     set_apzs(bits);
     set_of_sub(bits);
 
     /* Anything - FF with carry on is basically anything - 0x100: value stays
        unchanged but carry goes on. */
-    if ((cpu_alu_op == 3) && !(cpu_src & size_mask) && (cpu_state.flags & C_FLAG))
+    if (special_case)
         cpu_state.flags |= C_FLAG;
     else
-        set_cf((cpu_src & size_mask) > (cpu_dest & size_mask));
+        set_cf((temp_src & size_mask) > (cpu_dest & size_mask));
 }
 
 static void

src/cpu/cpu.c

@@ -181,6 +181,8 @@ int cpu_multi;
 int cpu_16bitbus;
 int cpu_64bitbus;
 int cpu_cyrix_alignment;
+int cpu_cpurst_on_sr;
+int cpu_use_exec = 0;
 int CPUID;
 
 int is186;
@@ -742,6 +744,7 @@ cpu_set(void)
 
     timing_misaligned   = 0;
     cpu_cyrix_alignment = 0;
+    cpu_cpurst_on_sr    = 0;
     cpu_CR4_mask        = 0;
 
     switch (cpu_s->cpu_type) {
@@ -1782,16 +1785,20 @@ cpu_set(void)
             x87_concurrency = x87_concurrency_486;
     }
 
+    cpu_use_exec = 0;
+
     if (is386) {
 #if defined(USE_DYNAREC) && !defined(USE_GDBSTUB)
-        if (cpu_use_dynarec)
+        if (cpu_use_dynarec) {
             cpu_exec = exec386_dynarec;
-        else
+            cpu_use_exec = 1;
+        } else
 #endif
             /* Use exec386 for CPU_IBM486SLC because it can reach 100 MHz. */
-            if ((cpu_s->cpu_type == CPU_IBM486SLC) || (cpu_s->cpu_type > CPU_486DLC))
+            if ((cpu_s->cpu_type == CPU_IBM486SLC) || (cpu_s->cpu_type > CPU_486DLC)) {
                 cpu_exec = exec386;
-            else
+                cpu_use_exec = 1;
+            } else
                 cpu_exec = exec386_2386;
     } else if (cpu_s->cpu_type >= CPU_286)
         cpu_exec = exec386_2386;
@@ -2370,14 +2377,20 @@ cpu_CPUID(void)
                 EBX = ECX = 0;
                 EDX       = CPUID_FPU | CPUID_VME | CPUID_PSE | CPUID_TSC | CPUID_MSR | CPUID_PAE | CPUID_MCE | CPUID_CMPXCHG8B | CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_SEP | CPUID_CMOV;
             } else if (EAX == 2) {
-                EAX = 0x03020101; /* Instruction TLB: 4 KB pages, 4-way set associative, 32 entries
-                                     Instruction TLB: 4 MB pages, fully associative, 2 entries
-                                     Data TLB: 4 KB pages, 4-way set associative, 64 entries */
+                /* if (!strcmp(machine_get_internal_name(), "ap61")) {
+                    EAX = 0x00000001;
+                    EDX = 0x00000000;
+                } else */ {
+                    EAX = 0x03020101; /* Instruction TLB: 4 KB pages, 4-way set associative, 32 entries
+                                         Instruction TLB: 4 MB pages, fully associative, 2 entries
+                                         Data TLB: 4 KB pages, 4-way set associative, 64 entries */
+                    EDX       = 0x06040a42; /* 2nd-level cache: 256 KB, 4-way set associative, 32-byte line size
+                                               1st-level data cache: 8 KB, 2-way set associative, 32-byte line size
+                                               Data TLB: 4 MB pages, 4-way set associative, 8 entries
+                                               1st-level instruction cache:8 KB, 4-way set associative, 32-byte line size */
+                }
+
                 EBX = ECX = 0;
-                EDX       = 0x06040a42; /* 2nd-level cache: 256 KB, 4-way set associative, 32-byte line size
-                                           1st-level data cache: 8 KB, 2-way set associative, 32-byte line size
-                                           Data TLB: 4 MB pages, 4-way set associative, 8 entries
-                                           1st-level instruction cache:8 KB, 4-way set associative, 32-byte line size */
             } else
                 EAX = EBX = ECX = EDX = 0;
             break;
@@ -2791,7 +2804,9 @@ amd_k_invalid_rdmsr:
         case CPU_PENTIUM2:
         case CPU_PENTIUM2D:
             EAX = EDX = 0;
-            switch (ECX) {
+            /* Per RichardG's probing of a real Deschutes using my RDMSR tool,
+               we have discovered that the top 18 bits are filtered out. */
+            switch (ECX & 0x00003fff) {
                 case 0x00:
                 case 0x01:
                     break;
@@ -2813,6 +2828,11 @@ amd_k_invalid_rdmsr:
                     EDX = msr.apic_base >> 32;
                     cpu_log("APIC_BASE read : %08X%08X\n", EDX, EAX);
                     break;
+                /* Unknown (undocumented?) MSR used by the Hyper-V BIOS. */
+                case 0x20:
+                    EAX = msr.ecx20 & 0xffffffff;
+                    EDX = msr.ecx20 >> 32;
+                    break;
                 case 0x2a:
                     EAX = 0xc4000000;
                     EDX = 0;
@@ -3014,22 +3034,6 @@ amd_k_invalid_rdmsr:
                     EAX = msr.ecx570 & 0xffffffff;
                     EDX = msr.ecx570 >> 32;
                     break;
-                case 0x1002ff:
-                    EAX = msr.ecx1002ff & 0xffffffff;
-                    EDX = msr.ecx1002ff >> 32;
-                    break;
-                case 0xf0f00250:
-                    EAX = msr.ecxf0f00250 & 0xffffffff;
-                    EDX = msr.ecxf0f00250 >> 32;
-                    break;
-                case 0xf0f00258:
-                    EAX = msr.ecxf0f00258 & 0xffffffff;
-                    EDX = msr.ecxf0f00258 >> 32;
-                    break;
-                case 0xf0f00259:
-                    EAX = msr.ecxf0f00259 & 0xffffffff;
-                    EDX = msr.ecxf0f00259 >> 32;
-                    break;
                 default:
 i686_invalid_rdmsr:
                     cpu_log("RDMSR: Invalid MSR: %08X\n", ECX);
@@ -3291,7 +3295,9 @@ amd_k_invalid_wrmsr:
         case CPU_PENTIUMPRO:
         case CPU_PENTIUM2:
         case CPU_PENTIUM2D:
-            switch (ECX) {
+            /* Per RichardG's probing of a real Deschutes using my RDMSR tool,
+               we have discovered that the top 18 bits are filtered out. */
+            switch (ECX & 0x00003fff) {
                 case 0x00:
                 case 0x01:
                     if (EAX || EDX)
@@ -3306,6 +3312,10 @@ amd_k_invalid_wrmsr:
                     msr.apic_base = EAX | ((uint64_t) EDX << 32);
 #endif
                     break;
+                /* Unknown (undocumented?) MSR used by the Hyper-V BIOS. */
+                case 0x20:
+                    msr.ecx20 = EAX | ((uint64_t) EDX << 32);
+                    break;
                 case 0x2a:
                     break;
                 case 0x79:
@@ -3450,18 +3460,6 @@ amd_k_invalid_wrmsr:
                 case 0x570:
                     msr.ecx570 = EAX | ((uint64_t) EDX << 32);
                     break;
-                case 0x1002ff:
-                    msr.ecx1002ff = EAX | ((uint64_t) EDX << 32);
-                    break;
-                case 0xf0f00250:
-                    msr.ecxf0f00250 = EAX | ((uint64_t) EDX << 32);
-                    break;
-                case 0xf0f00258:
-                    msr.ecxf0f00258 = EAX | ((uint64_t) EDX << 32);
-                    break;
-                case 0xf0f00259:
-                    msr.ecxf0f00259 = EAX | ((uint64_t) EDX << 32);
-                    break;
                 default:
 i686_invalid_wrmsr:
                     cpu_log("WRMSR: Invalid MSR: %08X\n", ECX);

src/cpu/cpu.h

@@ -86,42 +86,34 @@ enum {
 };
 
 enum {
-    CPU_PKG_8088          = (1 << 0),
-    CPU_PKG_8088_EUROPC   = (1 << 1),
-    CPU_PKG_8086          = (1 << 2),
-    CPU_PKG_188           = (1 << 3),
-    CPU_PKG_186           = (1 << 4),
-    CPU_PKG_286           = (1 << 5),
-    CPU_PKG_386SX         = (1 << 6),
-    CPU_PKG_386DX         = (1 << 7),
-    CPU_PKG_M6117         = (1 << 8),
-    CPU_PKG_386SLC_IBM    = (1 << 9),
-    CPU_PKG_486SLC        = (1 << 10),
-    CPU_PKG_486SLC_IBM    = (1 << 11),
-    CPU_PKG_486BL         = (1 << 12),
-    CPU_PKG_486DLC        = (1 << 13),
-    CPU_PKG_SOCKET1       = (1 << 14),
-    CPU_PKG_SOCKET3       = (1 << 15),
-    CPU_PKG_SOCKET3_PC330 = (1 << 16),
-    CPU_PKG_STPC          = (1 << 17),
-    CPU_PKG_SOCKET4       = (1 << 18),
-    CPU_PKG_SOCKET5_7     = (1 << 19),
-    CPU_PKG_SOCKET8       = (1 << 20),
-    CPU_PKG_SLOT1         = (1 << 21),
-    CPU_PKG_SLOT2         = (1 << 22),
-    CPU_PKG_SLOTA         = (1 << 23),
-    CPU_PKG_SOCKET370     = (1 << 24),
-    CPU_PKG_SOCKETA       = (1 << 25),
-    CPU_PKG_EBGA368       = (1 << 26)
+    CPU_PKG_8088             = (1 << 0),
+    CPU_PKG_8088_EUROPC      = (1 << 1),
+    CPU_PKG_8086             = (1 << 2),
+    CPU_PKG_188              = (1 << 3),
+    CPU_PKG_186              = (1 << 4),
+    CPU_PKG_286              = (1 << 5),
+    CPU_PKG_386SX            = (1 << 6),
+    CPU_PKG_386DX            = (1 << 7),
+    CPU_PKG_386DX_DESKPRO386 = (1 << 8),
+    CPU_PKG_M6117            = (1 << 9),
+    CPU_PKG_386SLC_IBM       = (1 << 10),
+    CPU_PKG_486SLC           = (1 << 11),
+    CPU_PKG_486SLC_IBM       = (1 << 12),
+    CPU_PKG_486BL            = (1 << 13),
+    CPU_PKG_486DLC           = (1 << 14),
+    CPU_PKG_SOCKET1          = (1 << 15),
+    CPU_PKG_SOCKET3          = (1 << 16),
+    CPU_PKG_SOCKET3_PC330    = (1 << 17),
+    CPU_PKG_SOCKET6          = (1 << 18),
+    CPU_PKG_STPC             = (1 << 19),
+    CPU_PKG_SOCKET4          = (1 << 20),
+    CPU_PKG_SOCKET5_7        = (1 << 21),
+    CPU_PKG_SOCKET8          = (1 << 22),
+    CPU_PKG_SLOT1            = (1 << 23),
+    CPU_PKG_SLOT2            = (1 << 24),
+    CPU_PKG_SOCKET370        = (1 << 25)
 };
 
-#define MANU_INTEL           0
-#define MANU_AMD             1
-#define MANU_CYRIX           2
-#define MANU_IDT             3
-#define MANU_NEC             4
-#define MANU_IBM             5
-
 #define CPU_SUPPORTS_DYNAREC 1
 #define CPU_REQUIRES_DYNAREC 2
 #define CPU_ALTERNATE_XTAL   4
@@ -165,17 +157,6 @@ typedef struct {
     const CPU     *cpus;
 } cpu_family_t;
 
-typedef struct {
-    const char    *family;
-    const uint32_t rspeed;
-    const double   multi;
-} cpu_legacy_table_t;
-
-typedef struct {
-    const char                *machine;
-    const cpu_legacy_table_t **tables;
-} cpu_legacy_machine_t;
-
 #define C_FLAG     0x0001
 #define P_FLAG     0x0004
 #define A_FLAG     0x0010
@@ -253,6 +234,12 @@ typedef struct {
 
     /* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */
     uint64_t apic_base; /* 0x0000001b - Should the Pentium not also have this? */
+
+    /* Weird long MSR's used by the Hyper-V BIOS. */
+    uint64_t ecx20; /* 0x00000020, really 0x40000020, but we filter out the top 18 bits
+                       like a real Deschutes does. */
+
+    /* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */
     uint64_t ecx79;     /* 0x00000079 */
 
     /* AMD K5, 5k86, K6, K6-2, K6-2C, K6-3, K6-2P, and K6-3P MSR's */
@@ -314,9 +301,6 @@ typedef struct {
     /* IBM 486SLC and 486BL MSR's */
     uint64_t ibm_por2; /* 0x00001002 - Processor Operation Register */
 
-    /* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */
-    uint64_t ecx1002ff; /* 0x001002ff - MSR used by some Intel AMI boards */
-
     /* AMD K5, 5k86, K6, K6-2, K6-2C, K6-3, K6-2P, and K6-3P MSR's */
     uint64_t amd_efer; /* 0xc0000080 */
 
@@ -338,11 +322,6 @@ typedef struct {
 
     /* K6-3, K6-2P, and K6-3P MSR's */
     uint64_t amd_l2aar; /* 0xc0000089 */
-
-    /* Pentium Pro, Pentium II Klamath, and Pentium II Deschutes MSR's */
-    uint64_t ecxf0f00250; /* 0xf0f00250 - Some weird long MSR's used by i686 AMI & some Phoenix BIOSes */
-    uint64_t ecxf0f00258; /* 0xf0f00258 */
-    uint64_t ecxf0f00259; /* 0xf0f00259 */
 } msr_t;
 
 typedef struct {
@@ -530,7 +509,6 @@ extern cpu_state_t cpu_state;
 extern fpu_state_t fpu_state;
 
 extern const cpu_family_t         cpu_families[];
-extern const cpu_legacy_machine_t cpu_legacy_table[];
 extern cpu_family_t              *cpu_f;
 extern CPU                       *cpu_s;
 extern int                        cpu_override;
@@ -544,8 +522,9 @@ extern int    cpu_multi;
 extern double cpu_dmulti;
 extern double fpu_multi;
 extern double cpu_busspeed;
-extern int    cpu_cyrix_alignment; /*Cyrix 5x86/6x86 only has data misalignment
-                                     penalties when crossing 8-byte boundaries*/
+extern int    cpu_cyrix_alignment; /* Cyrix 5x86/6x86 only has data misalignment
+                                      penalties when crossing 8-byte boundaries. */
+extern int    cpu_cpurst_on_sr;    /* SiS 551x and 5571: Issue CPURST on soft reset. */
 
 extern int is8086;
 extern int is186;
@@ -810,6 +789,7 @@ extern int hlt_reset_pending;
 extern cyrix_t cyrix;
 
 extern int prefetch_prefixes;
+extern int cpu_use_exec;
 
 extern uint8_t  use_custom_nmi_vector;
 extern uint32_t custom_nmi_vector;
@@ -834,6 +814,9 @@ extern void nmi_raise(void);
 extern MMX_REG  *MMP[8];
 extern uint16_t *MMEP[8];
 
+extern int  cpu_block_end;
+extern int  cpu_override_dynarec;
+
 extern void mmx_init(void);
 extern void prefetch_flush(void);
 

src/cpu/x86.c

@@ -342,6 +342,8 @@ reset_common(int hard)
 
     if (!is286)
         reset_808x(hard);
+
+    cpu_cpurst_on_sr = 0;
 }
 
 /* Hard reset. */

src/cpu/x86_ops_flag_2386.h

@@ -0,0 +1,323 @@
+static int
+opCMC(uint32_t fetchdat)
+{
+    flags_rebuild();
+    cpu_state.flags ^= C_FLAG;
+    CLOCK_CYCLES(2);
+    PREFETCH_RUN(2, 1, -1, 0, 0, 0, 0, 0);
+    return 0;
+}
+
+static int
+opCLC(uint32_t fetchdat)
+{
+    flags_rebuild();
+    cpu_state.flags &= ~C_FLAG;
+    CLOCK_CYCLES(2);
+    PREFETCH_RUN(2, 1, -1, 0, 0, 0, 0, 0);
+    return 0;
+}
+static int
+opCLD(uint32_t fetchdat)
+{
+    cpu_state.flags &= ~D_FLAG;
+    CLOCK_CYCLES(2);
+    PREFETCH_RUN(2, 1, -1, 0, 0, 0, 0, 0);
+    return 0;
+}
+static int
+opCLI(uint32_t fetchdat)
+{
+    if (!IOPLp) {
+        if ((!(cpu_state.eflags & VM_FLAG) && (cr4 & CR4_PVI)) || ((cpu_state.eflags & VM_FLAG) && (cr4 & CR4_VME))) {
+            cpu_state.eflags &= ~VIF_FLAG;
+        } else {
+            x86gpf(NULL, 0);
+            return 1;
+        }
+    } else
+        cpu_state.flags &= ~I_FLAG;
+
+    CLOCK_CYCLES(3);
+    PREFETCH_RUN(3, 1, -1, 0, 0, 0, 0, 0);
+    return 0;
+}
+
+static int
+opSTC(uint32_t fetchdat)
+{
+    flags_rebuild();
+    cpu_state.flags |= C_FLAG;
+    CLOCK_CYCLES(2);
+    PREFETCH_RUN(2, 1, -1, 0, 0, 0, 0, 0);
+    return 0;
+}
+static int
+opSTD(uint32_t fetchdat)
+{
+    cpu_state.flags |= D_FLAG;
+    CLOCK_CYCLES(2);
+    PREFETCH_RUN(2, 1, -1, 0, 0, 0, 0, 0);
+    return 0;
+}
+static int
+opSTI(uint32_t fetchdat)
+{
+    if (!IOPLp) {
+        if ((!(cpu_state.eflags & VM_FLAG) && (cr4 & CR4_PVI)) || ((cpu_state.eflags & VM_FLAG) && (cr4 & CR4_VME))) {
+            if (cpu_state.eflags & VIP_FLAG) {
+                x86gpf(NULL, 0);
+                return 1;
+            } else
+                cpu_state.eflags |= VIF_FLAG;
+        } else {
+            x86gpf(NULL, 0);
+            return 1;
+        }
+    } else
+        cpu_state.flags |= I_FLAG;
+
+    /*First instruction after STI will always execute, regardless of whether
+      there is a pending interrupt*/
+    cpu_end_block_after_ins = 2;
+
+    CLOCK_CYCLES(2);
+    PREFETCH_RUN(2, 1, -1, 0, 0, 0, 0, 0);
+    return 0;
+}
+
+static int
+opSAHF(uint32_t fetchdat)
+{
+    flags_rebuild();
+    cpu_state.flags = (cpu_state.flags & 0xff00) | (AH & 0xd5) | 2;
+    CLOCK_CYCLES(3);
+    PREFETCH_RUN(3, 1, -1, 0, 0, 0, 0, 0);
+
+#if (defined(USE_DYNAREC) && defined(USE_NEW_DYNAREC))
+    codegen_flags_changed = 0;
+#endif
+
+    return 0;
+}
+static int
+opLAHF(uint32_t fetchdat)
+{
+    flags_rebuild();
+    AH = cpu_state.flags & 0xff;
+    CLOCK_CYCLES(3);
+    PREFETCH_RUN(3, 1, -1, 0, 0, 0, 0, 0);
+    return 0;
+}
+
+static int
+opPUSHF(uint32_t fetchdat)
+{
+    if ((cpu_state.eflags & VM_FLAG) && (IOPL < 3)) {
+        if (cr4 & CR4_VME) {
+            uint16_t temp;
+
+            flags_rebuild();
+            temp = (cpu_state.flags & ~I_FLAG) | 0x3000;
+            if (cpu_state.eflags & VIF_FLAG)
+                temp |= I_FLAG;
+            PUSH_W(temp);
+        } else {
+            x86gpf(NULL, 0);
+            return 1;
+        }
+    } else {
+        flags_rebuild();
+        PUSH_W(cpu_state.flags);
+    }
+    CLOCK_CYCLES(4);
+    PREFETCH_RUN(4, 1, -1, 0, 0, 1, 0, 0);
+    return cpu_state.abrt;
+}
+static int
+opPUSHFD(uint32_t fetchdat)
+{
+    uint16_t tempw;
+    if ((cpu_state.eflags & VM_FLAG) && (IOPL < 3)) {
+        x86gpf(NULL, 0);
+        return 1;
+    }
+    if (cpu_CR4_mask & CR4_VME)
+        tempw = cpu_state.eflags & 0x3c;
+    else if (CPUID)
+        tempw = cpu_state.eflags & 0x24;
+    else
+        tempw = cpu_state.eflags & 4;
+    flags_rebuild();
+    PUSH_L(cpu_state.flags | (tempw << 16));
+    CLOCK_CYCLES(4);
+    PREFETCH_RUN(4, 1, -1, 0, 0, 0, 1, 0);
+    return cpu_state.abrt;
+}
+
+static int
+opPOPF_186(uint32_t fetchdat)
+{
+    uint16_t tempw;
+
+    if ((cpu_state.eflags & VM_FLAG) && (IOPL < 3)) {
+        x86gpf(NULL, 0);
+        return 1;
+    }
+
+    tempw = POP_W();
+    if (cpu_state.abrt)
+        return 1;
+
+    if (!(msw & 1))
+        cpu_state.flags = (cpu_state.flags & 0x7000) | (tempw & 0x0fd5) | 2;
+    else if (!(CPL))
+        cpu_state.flags = (tempw & 0x7fd5) | 2;
+    else if (IOPLp)
+        cpu_state.flags = (cpu_state.flags & 0x3000) | (tempw & 0x4fd5) | 2;
+    else
+        cpu_state.flags = (cpu_state.flags & 0x3200) | (tempw & 0x4dd5) | 2;
+    flags_extract();
+    rf_flag_no_clear = 1;
+
+    CLOCK_CYCLES(5);
+    PREFETCH_RUN(5, 1, -1, 1, 0, 0, 0, 0);
+
+#if (defined(USE_DYNAREC) && defined(USE_NEW_DYNAREC))
+    codegen_flags_changed = 0;
+#endif
+
+    return 0;
+}
+static int
+opPOPF_286(uint32_t fetchdat)
+{
+    uint16_t tempw;
+
+    if ((cpu_state.eflags & VM_FLAG) && (IOPL < 3)) {
+        x86gpf(NULL, 0);
+        return 1;
+    }
+
+    tempw = POP_W();
+    if (cpu_state.abrt)
+        return 1;
+
+    if (!(msw & 1))
+        cpu_state.flags = (cpu_state.flags & 0x7000) | (tempw & 0x0fd5) | 2;
+    else if (!(CPL))
+        cpu_state.flags = (tempw & 0x7fd5) | 2;
+    else if (IOPLp)
+        cpu_state.flags = (cpu_state.flags & 0x3000) | (tempw & 0x4fd5) | 2;
+    else
+        cpu_state.flags = (cpu_state.flags & 0x3200) | (tempw & 0x4dd5) | 2;
+    flags_extract();
+    rf_flag_no_clear = 1;
+
+    CLOCK_CYCLES(5);
+    PREFETCH_RUN(5, 1, -1, 1, 0, 0, 0, 0);
+
+#if (defined(USE_DYNAREC) && defined(USE_NEW_DYNAREC))
+    codegen_flags_changed = 0;
+#endif
+
+    return 0;
+}
+static int
+opPOPF(uint32_t fetchdat)
+{
+    uint16_t tempw;
+
+    if ((cpu_state.eflags & VM_FLAG) && (IOPL < 3)) {
+        if (cr4 & CR4_VME) {
+            uint32_t old_esp = ESP;
+
+            tempw = POP_W();
+            if (cpu_state.abrt) {
+
+                ESP = old_esp;
+                return 1;
+            }
+
+            if ((tempw & T_FLAG) || ((tempw & I_FLAG) && (cpu_state.eflags & VIP_FLAG))) {
+                ESP = old_esp;
+                x86gpf(NULL, 0);
+                return 1;
+            }
+            if (tempw & I_FLAG)
+                cpu_state.eflags |= VIF_FLAG;
+            else
+                cpu_state.eflags &= ~VIF_FLAG;
+            cpu_state.flags = (cpu_state.flags & 0x3200) | (tempw & 0x4dd5) | 2;
+        } else {
+            x86gpf(NULL, 0);
+            return 1;
+        }
+    } else {
+        tempw = POP_W();
+        if (cpu_state.abrt)
+            return 1;
+
+        if (!(CPL) || !(msw & 1))
+            cpu_state.flags = (tempw & 0x7fd5) | 2;
+        else if (IOPLp)
+            cpu_state.flags = (cpu_state.flags & 0x3000) | (tempw & 0x4fd5) | 2;
+        else
+            cpu_state.flags = (cpu_state.flags & 0x3200) | (tempw & 0x4dd5) | 2;
+    }
+    flags_extract();
+    rf_flag_no_clear = 1;
+
+    CLOCK_CYCLES(5);
+    PREFETCH_RUN(5, 1, -1, 1, 0, 0, 0, 0);
+
+#if (defined(USE_DYNAREC) && defined(USE_NEW_DYNAREC))
+    codegen_flags_changed = 0;
+#endif
+
+    return 0;
+}
+static int
+opPOPFD(uint32_t fetchdat)
+{
+    uint32_t templ;
+
+    if ((cpu_state.eflags & VM_FLAG) && (IOPL < 3)) {
+        x86gpf(NULL, 0);
+        return 1;
+    }
+
+    templ = POP_L();
+    if (cpu_state.abrt)
+        return 1;
+
+    if (!(CPL) || !(msw & 1))
+        cpu_state.flags = (templ & 0x7fd5) | 2;
+    else if (IOPLp)
+        cpu_state.flags = (cpu_state.flags & 0x3000) | (templ & 0x4fd5) | 2;
+    else
+        cpu_state.flags = (cpu_state.flags & 0x3200) | (templ & 0x4dd5) | 2;
+
+    templ &= (is486 || isibm486) ? 0x3c0000 : 0;
+    templ |= ((cpu_state.eflags & 3) << 16);
+    if (cpu_CR4_mask & CR4_VME)
+        cpu_state.eflags = (templ >> 16) & 0x3f;
+    else if (CPUID)
+        cpu_state.eflags = (templ >> 16) & 0x27;
+    else if (is486 || isibm486)
+        cpu_state.eflags = (templ >> 16) & 7;
+    else
+        cpu_state.eflags = (templ >> 16) & 3;
+
+    flags_extract();
+    rf_flag_no_clear = 1;
+
+    CLOCK_CYCLES(5);
+    PREFETCH_RUN(5, 1, -1, 0, 1, 0, 0, 0);
+
+#if (defined(USE_DYNAREC) && defined(USE_NEW_DYNAREC))
+    codegen_flags_changed = 0;
+#endif
+
+    return 0;
+}

src/cpu/x86_ops_misc.h

@@ -129,7 +129,7 @@ opF6_a16(uint32_t fetchdat)
             if (dst && !(tempw & 0xff00)) {
                 AH = src16 % dst;
                 AL = (src16 / dst) & 0xff;
-                if (!cpu_iscyrix) {
+                if (!cpu_iscyrix && !is6117) {
                     flags_rebuild();
                     cpu_state.flags |= 0x8D5; /*Not a Cyrix*/
                     cpu_state.flags &= ~1;
@@ -149,7 +149,7 @@ opF6_a16(uint32_t fetchdat)
             if (dst && ((int) temps == tempws2)) {
                 AH = (tempws % (int) ((int8_t) dst)) & 0xff;
                 AL = tempws2 & 0xff;
-                if (!cpu_iscyrix) {
+                if (!cpu_iscyrix && !is6117) {
                     flags_rebuild();
                     cpu_state.flags |= 0x8D5; /*Not a Cyrix*/
                     cpu_state.flags &= ~1;
@@ -246,7 +246,7 @@ opF6_a32(uint32_t fetchdat)
             if (dst && !(tempw & 0xff00)) {
                 AH = src16 % dst;
                 AL = (src16 / dst) & 0xff;
-                if (!cpu_iscyrix) {
+                if (!cpu_iscyrix && !is6117) {
                     flags_rebuild();
                     cpu_state.flags |= 0x8D5; /*Not a Cyrix*/
                     cpu_state.flags &= ~1;
@@ -266,7 +266,7 @@ opF6_a32(uint32_t fetchdat)
             if (dst && ((int) temps == tempws2)) {
                 AH = (tempws % (int) ((int8_t) dst)) & 0xff;
                 AL = tempws2 & 0xff;
-                if (!cpu_iscyrix) {
+                if (!cpu_iscyrix && !is6117) {
                     flags_rebuild();
                     cpu_state.flags |= 0x8D5; /*Not a Cyrix*/
                     cpu_state.flags &= ~1;
@@ -366,7 +366,7 @@ opF7_w_a16(uint32_t fetchdat)
             if (dst && !(templ2 & 0xffff0000)) {
                 DX = templ % dst;
                 AX = (templ / dst) & 0xffff;
-                if (!cpu_iscyrix)
+                if (!cpu_iscyrix && !is6117)
                     setznp16(AX); /*Not a Cyrix*/
             } else {
                 x86_int(0);
@@ -383,7 +383,7 @@ opF7_w_a16(uint32_t fetchdat)
             if ((dst != 0) && ((int) temps16 == tempws2)) {
                 DX = tempws % (int) ((int16_t) dst);
                 AX = tempws2 & 0xffff;
-                if (!cpu_iscyrix)
+                if (!cpu_iscyrix && !is6117)
                     setznp16(AX); /*Not a Cyrix*/
             } else {
                 x86_int(0);
@@ -479,7 +479,7 @@ opF7_w_a32(uint32_t fetchdat)
             if (dst && !(templ2 & 0xffff0000)) {
                 DX = templ % dst;
                 AX = (templ / dst) & 0xffff;
-                if (!cpu_iscyrix)
+                if (!cpu_iscyrix && !is6117)
                     setznp16(AX); /*Not a Cyrix*/
             } else {
                 //                        fatal("DIVw BY 0 %04X:%04X %i\n",cs>>4,pc,ins);
@@ -497,7 +497,7 @@ opF7_w_a32(uint32_t fetchdat)
             if ((dst != 0) && ((int) temps16 == tempws2)) {
                 DX = tempws % (int) ((int16_t) dst);
                 AX = tempws2 & 0xffff;
-                if (!cpu_iscyrix)
+                if (!cpu_iscyrix && !is6117)
                     setznp16(AX); /*Not a Cyrix*/
             } else {
                 x86_int(0);
@@ -587,7 +587,7 @@ opF7_l_a16(uint32_t fetchdat)
         case 0x30: /*DIV EAX,l*/
             if (divl(dst))
                 return 1;
-            if (!cpu_iscyrix)
+            if (!cpu_iscyrix && !is6117)
                 setznp32(EAX); /*Not a Cyrix*/
             CLOCK_CYCLES((is486) ? 40 : 38);
             PREFETCH_RUN(is486 ? 40 : 38, 2, rmdat, 0, (cpu_mod == 3) ? 0 : 1, 0, 0, 0);
@@ -595,7 +595,7 @@ opF7_l_a16(uint32_t fetchdat)
         case 0x38: /*IDIV EAX,l*/
             if (idivl((int32_t) dst))
                 return 1;
-            if (!cpu_iscyrix)
+            if (!cpu_iscyrix && !is6117)
                 setznp32(EAX); /*Not a Cyrix*/
             CLOCK_CYCLES(43);
             PREFETCH_RUN(43, 2, rmdat, 0, (cpu_mod == 3) ? 0 : 1, 0, 0, 0);
@@ -680,7 +680,7 @@ opF7_l_a32(uint32_t fetchdat)
         case 0x30: /*DIV EAX,l*/
             if (divl(dst))
                 return 1;
-            if (!cpu_iscyrix)
+            if (!cpu_iscyrix && !is6117)
                 setznp32(EAX); /*Not a Cyrix*/
             CLOCK_CYCLES((is486) ? 40 : 38);
             PREFETCH_RUN(is486 ? 40 : 38, 2, rmdat, 0, (cpu_mod == 3) ? 0 : 1, 0, 0, 1);
@@ -688,7 +688,7 @@ opF7_l_a32(uint32_t fetchdat)
         case 0x38: /*IDIV EAX,l*/
             if (idivl((int32_t) dst))
                 return 1;
-            if (!cpu_iscyrix)
+            if (!cpu_iscyrix && !is6117)
                 setznp32(EAX); /*Not a Cyrix*/
             CLOCK_CYCLES(43);
             PREFETCH_RUN(43, 2, rmdat, 0, (cpu_mod == 3) ? 0 : 1, 0, 0, 1);

src/cpu/x86_ops_mov_ctrl.h

@@ -124,7 +124,7 @@ opMOV_CRx_r_a16(uint32_t fetchdat)
             if ((cpu_state.regs[cpu_rm].l & 0x01) && !(cr0 & 0x01))
                 cpu_state.seg_cs.access &= 0x9f;
             cr0 = cpu_state.regs[cpu_rm].l;
-            if (cpu_16bitbus)
+            if ((cpu_s->cpu_type != CPU_386DX) || (fpu_type == FPU_387))
                 cr0 |= 0x10;
             if (!(cr0 & 0x80000000))
                 mmu_perm = 4;
@@ -181,7 +181,7 @@ opMOV_CRx_r_a32(uint32_t fetchdat)
             if ((cpu_state.regs[cpu_rm].l & 0x01) && !(cr0 & 0x01))
                 cpu_state.seg_cs.access &= 0x9f;
             cr0 = cpu_state.regs[cpu_rm].l;
-            if (cpu_16bitbus)
+            if ((cpu_s->cpu_type != CPU_386DX) || (fpu_type == FPU_387))
                 cr0 |= 0x10;
             if (!(cr0 & 0x80000000))
                 mmu_perm = 4;

src/cpu/x86_ops_mov_ctrl_2386.h

@@ -0,0 +1,414 @@
+static int
+opMOV_r_CRx_a16(uint32_t fetchdat)
+{
+    if ((CPL || (cpu_state.eflags & VM_FLAG)) && (cr0 & 1)) {
+        x86gpf(NULL, 0);
+        return 1;
+    }
+    fetch_ea_16(fetchdat);
+    switch (cpu_reg) {
+        case 0:
+            cpu_state.regs[cpu_rm].l = cr0;
+            if (is486 || isibm486)
+                cpu_state.regs[cpu_rm].l |= 0x10; /*ET hardwired on 486*/
+            else {
+                if (is386)
+                    cpu_state.regs[cpu_rm].l |= 0x7fffffe0;
+                else
+                    cpu_state.regs[cpu_rm].l |= 0x7ffffff0;
+            }
+            break;
+        case 2:
+            cpu_state.regs[cpu_rm].l = cr2;
+            break;
+        case 3:
+            cpu_state.regs[cpu_rm].l = cr3;
+            break;
+        case 4:
+            if (cpu_has_feature(CPU_FEATURE_CR4)) {
+                cpu_state.regs[cpu_rm].l = cr4;
+                break;
+            }
+        default:
+            cpu_state.pc = cpu_state.oldpc;
+            x86illegal();
+            break;
+    }
+    CLOCK_CYCLES(6);
+    PREFETCH_RUN(6, 2, rmdat, 0, 0, 0, 0, 0);
+    return 0;
+}
+static int
+opMOV_r_CRx_a32(uint32_t fetchdat)
+{
+    if ((CPL || (cpu_state.eflags & VM_FLAG)) && (cr0 & 1)) {
+        x86gpf(NULL, 0);
+        return 1;
+    }
+    fetch_ea_32(fetchdat);
+    switch (cpu_reg) {
+        case 0:
+            cpu_state.regs[cpu_rm].l = cr0;
+            if (is486 || isibm486)
+                cpu_state.regs[cpu_rm].l |= 0x10; /*ET hardwired on 486*/
+            else {
+                if (is386)
+                    cpu_state.regs[cpu_rm].l |= 0x7fffffe0;
+                else
+                    cpu_state.regs[cpu_rm].l |= 0x7ffffff0;
+            }
+            break;
+        case 2:
+            cpu_state.regs[cpu_rm].l = cr2;
+            break;
+        case 3:
+            cpu_state.regs[cpu_rm].l = cr3;
+            break;
+        case 4:
+            if (cpu_has_feature(CPU_FEATURE_CR4)) {
+                cpu_state.regs[cpu_rm].l = cr4;
+                break;
+            }
+        default:
+            cpu_state.pc = cpu_state.oldpc;
+            x86illegal();
+            break;
+    }
+    CLOCK_CYCLES(6);
+    PREFETCH_RUN(6, 2, rmdat, 0, 0, 0, 0, 1);
+    return 0;
+}
+
+static int
+opMOV_r_DRx_a16(uint32_t fetchdat)
+{
+    if ((CPL || (cpu_state.eflags & VM_FLAG)) && (cr0 & 1)) {
+        x86gpf(NULL, 0);
+        return 1;
+    }
+    fetch_ea_16(fetchdat);
+    if (cpu_reg == 4 || cpu_reg == 5) {
+        if (cr4 & 0x8)
+            x86illegal();
+        else
+            cpu_reg += 2;
+    }
+    cpu_state.regs[cpu_rm].l = dr[cpu_reg] | (cpu_reg == 6 ? 0xffff0ff0u : 0);
+    CLOCK_CYCLES(6);
+    PREFETCH_RUN(6, 2, rmdat, 0, 0, 0, 0, 0);
+    return 0;
+}
+static int
+opMOV_r_DRx_a32(uint32_t fetchdat)
+{
+    if ((CPL || (cpu_state.eflags & VM_FLAG)) && (cr0 & 1)) {
+        x86gpf(NULL, 0);
+        return 1;
+    }
+    fetch_ea_32(fetchdat);
+    if (cpu_reg == 4 || cpu_reg == 5) {
+        if (cr4 & 0x8)
+            x86illegal();
+        else
+            cpu_reg += 2;
+    }
+    cpu_state.regs[cpu_rm].l = dr[cpu_reg] | (cpu_reg == 6 ? 0xffff0ff0u : 0);
+    CLOCK_CYCLES(6);
+    PREFETCH_RUN(6, 2, rmdat, 0, 0, 0, 0, 1);
+    return 0;
+}
+
+static int
+opMOV_CRx_r_a16(uint32_t fetchdat)
+{
+    uint32_t old_cr0 = cr0;
+
+    if ((CPL || (cpu_state.eflags & VM_FLAG)) && (cr0 & 1)) {
+        x86gpf(NULL, 0);
+        return 1;
+    }
+    fetch_ea_16(fetchdat);
+    switch (cpu_reg) {
+        case 0:
+            if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000001)
+                flushmmucache();
+            /* Make sure CPL = 0 when switching from real mode to protected mode. */
+            if ((cpu_state.regs[cpu_rm].l & 0x01) && !(cr0 & 0x01))
+                cpu_state.seg_cs.access &= 0x9f;
+            cr0 = cpu_state.regs[cpu_rm].l;
+            if (cpu_16bitbus)
+                cr0 |= 0x10;
+            if (!(cr0 & 0x80000000))
+                mmu_perm = 4;
+            if (hascache && !(cr0 & (1 << 30)))
+                cpu_cache_int_enabled = 1;
+            else
+                cpu_cache_int_enabled = 0;
+            if (hascache && ((cr0 ^ old_cr0) & (1 << 30)))
+                cpu_update_waitstates();
+            if (cr0 & 1)
+                cpu_cur_status |= CPU_STATUS_PMODE;
+            else
+                cpu_cur_status &= ~CPU_STATUS_PMODE;
+            break;
+        case 2:
+            cr2 = cpu_state.regs[cpu_rm].l;
+            break;
+        case 3:
+            cr3 = cpu_state.regs[cpu_rm].l;
+            flushmmucache();
+            break;
+        case 4:
+            if (cpu_has_feature(CPU_FEATURE_CR4)) {
+                if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PAE | CR4_PGE))
+                    flushmmucache();
+                cr4 = cpu_state.regs[cpu_rm].l & cpu_CR4_mask;
+                break;
+            }
+
+        default:
+            cpu_state.pc = cpu_state.oldpc;
+            x86illegal();
+            break;
+    }
+    CLOCK_CYCLES(10);
+    PREFETCH_RUN(10, 2, rmdat, 0, 0, 0, 0, 0);
+    return 0;
+}
+static int
+opMOV_CRx_r_a32(uint32_t fetchdat)
+{
+    uint32_t old_cr0 = cr0;
+
+    if ((CPL || (cpu_state.eflags & VM_FLAG)) && (cr0 & 1)) {
+        x86gpf(NULL, 0);
+        return 1;
+    }
+    fetch_ea_32(fetchdat);
+    switch (cpu_reg) {
+        case 0:
+            if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000001)
+                flushmmucache();
+            /* Make sure CPL = 0 when switching from real mode to protected mode. */
+            if ((cpu_state.regs[cpu_rm].l & 0x01) && !(cr0 & 0x01))
+                cpu_state.seg_cs.access &= 0x9f;
+            cr0 = cpu_state.regs[cpu_rm].l;
+            if (cpu_16bitbus)
+                cr0 |= 0x10;
+            if (!(cr0 & 0x80000000))
+                mmu_perm = 4;
+            if (hascache && !(cr0 & (1 << 30)))
+                cpu_cache_int_enabled = 1;
+            else
+                cpu_cache_int_enabled = 0;
+            if (hascache && ((cr0 ^ old_cr0) & (1 << 30)))
+                cpu_update_waitstates();
+            if (cr0 & 1)
+                cpu_cur_status |= CPU_STATUS_PMODE;
+            else
+                cpu_cur_status &= ~CPU_STATUS_PMODE;
+            break;
+        case 2:
+            cr2 = cpu_state.regs[cpu_rm].l;
+            break;
+        case 3:
+            cr3 = cpu_state.regs[cpu_rm].l;
+            flushmmucache();
+            break;
+        case 4:
+            if (cpu_has_feature(CPU_FEATURE_CR4)) {
+                if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PAE | CR4_PGE))
+                    flushmmucache();
+                cr4 = cpu_state.regs[cpu_rm].l & cpu_CR4_mask;
+                break;
+            }
+
+        default:
+            cpu_state.pc = cpu_state.oldpc;
+            x86illegal();
+            break;
+    }
+    CLOCK_CYCLES(10);
+    PREFETCH_RUN(10, 2, rmdat, 0, 0, 0, 0, 1);
+    return 0;
+}
+
+static int
+opMOV_DRx_r_a16(uint32_t fetchdat)
+{
+    if ((CPL || (cpu_state.eflags & VM_FLAG)) && (cr0 & 1)) {
+        x86gpf(NULL, 0);
+        return 1;
+    }
+    if ((dr[6] & 0x2000) && !(cpu_state.eflags & RF_FLAG)) {
+        dr[7] |= 0x2000;
+        dr[6] &= ~0x2000;
+        x86gen();
+        return 1;
+    }
+    fetch_ea_16(fetchdat);
+    if (cpu_reg == 4 || cpu_reg == 5) {
+        if (cr4 & 0x8)
+            x86illegal();
+        else
+            cpu_reg += 2;
+    }
+    dr[cpu_reg] = cpu_state.regs[cpu_rm].l;
+    CLOCK_CYCLES(6);
+    PREFETCH_RUN(6, 2, rmdat, 0, 0, 0, 0, 0);
+    CPU_BLOCK_END();
+    return 0;
+}
+static int
+opMOV_DRx_r_a32(uint32_t fetchdat)
+{
+    if ((CPL || (cpu_state.eflags & VM_FLAG)) && (cr0 & 1)) {
+        x86gpf(NULL, 0);
+        return 1;
+    }
+    fetch_ea_16(fetchdat);
+    if (cpu_reg == 4 || cpu_reg == 5) {
+        if (cr4 & 0x8)
+            x86illegal();
+        else
+            cpu_reg += 2;
+    }
+    dr[cpu_reg] = cpu_state.regs[cpu_rm].l;
+    CLOCK_CYCLES(6);
+    PREFETCH_RUN(6, 2, rmdat, 0, 0, 0, 0, 1);
+    CPU_BLOCK_END();
+    return 0;
+}
+
+static void
+opMOV_r_TRx(void)
+{
+#if 0
+    uint32_t base;
+
+    base = _tr[4] & 0xfffff800;
+#endif
+
+    switch (cpu_reg) {
+        case 3:
+#if 0
+            pclog("[R] %08X cache = %08X\n", base + cache_index, _tr[3]);
+#endif
+            _tr[3]      = *(uint32_t *) &(_cache[cache_index]);
+            cache_index = (cache_index + 4) & 0xf;
+            break;
+    }
+    cpu_state.regs[cpu_rm].l = _tr[cpu_reg];
+    CLOCK_CYCLES(6);
+}
+static int
+opMOV_r_TRx_a16(uint32_t fetchdat)
+{
+    if ((cpu_s->cpu_type == CPU_PENTIUM) || ((CPL || (cpu_state.eflags & VM_FLAG)) && (cr0 & 1))) {
+        x86gpf(NULL, 0);
+        return 1;
+    }
+    fetch_ea_16(fetchdat);
+    opMOV_r_TRx();
+    PREFETCH_RUN(6, 2, rmdat, 0, 0, 0, 0, 0);
+    return 0;
+}
+static int
+opMOV_r_TRx_a32(uint32_t fetchdat)
+{
+    if ((cpu_s->cpu_type == CPU_PENTIUM) || ((CPL || (cpu_state.eflags & VM_FLAG)) && (cr0 & 1))) {
+        x86gpf(NULL, 0);
+        return 1;
+    }
+    fetch_ea_32(fetchdat);
+    opMOV_r_TRx();
+    PREFETCH_RUN(6, 2, rmdat, 0, 0, 0, 0, 1);
+    return 0;
+}
+
+static void
+opMOV_TRx_r(void)
+{
+    uint32_t base;
+    int      i;
+    int      ctl;
+
+    _tr[cpu_reg] = cpu_state.regs[cpu_rm].l;
+    base         = _tr[4] & 0xfffff800;
+    ctl          = _tr[5] & 3;
+    switch (cpu_reg) {
+        case 3:
+#if 0
+            pclog("[W] %08X cache = %08X\n", base + cache_index, _tr[3]);
+#endif
+            *(uint32_t *) &(_cache[cache_index]) = _tr[3];
+            cache_index                          = (cache_index + 4) & 0xf;
+            break;
+        case 4:
+#if 0
+            if (!(cr0 & 1) && !(_tr[5] & (1 << 19)))
+                pclog("TAG = %08X, DEST = %08X\n", base, base + cache_index - 16);
+#endif
+            break;
+        case 5:
+#if 0
+            pclog("[16] EXT = %i (%i), SET = %04X\n", !!(_tr[5] & (1 << 19)), _tr[5] & 0x03, _tr[5] & 0x7f0);
+#endif
+            if (!(_tr[5] & (1 << 19))) {
+                switch (ctl) {
+                    case 0:
+#if 0
+                        pclog("    Cache fill or read...\n", base);
+#endif
+                        break;
+                    case 1:
+                        base += (_tr[5] & 0x7f0);
+#if 0
+                        pclog("    Writing 16 bytes to   %08X...\n", base);
+#endif
+                        for (i = 0; i < 16; i += 4)
+                            mem_writel_phys(base + i, *(uint32_t *) &(_cache[i]));
+                        break;
+                    case 2:
+                        base += (_tr[5] & 0x7f0);
+#if 0
+                        pclog("    Reading 16 bytes from %08X...\n", base);
+#endif
+                        for (i = 0; i < 16; i += 4)
+                            *(uint32_t *) &(_cache[i]) = mem_readl_phys(base + i);
+                        break;
+                    case 3:
+#if 0
+                        pclog("    Cache invalidate/flush...\n", base);
+#endif
+                        break;
+                }
+            }
+            break;
+    }
+    CLOCK_CYCLES(6);
+}
+static int
+opMOV_TRx_r_a16(uint32_t fetchdat)
+{
+    if ((cpu_s->cpu_type == CPU_PENTIUM) || ((CPL || (cpu_state.eflags & VM_FLAG)) && (cr0 & 1))) {
+        x86gpf(NULL, 0);
+        return 1;
+    }
+    fetch_ea_16(fetchdat);
+    opMOV_TRx_r();
+    PREFETCH_RUN(6, 2, rmdat, 0, 0, 0, 0, 0);
+    return 0;
+}
+static int
+opMOV_TRx_r_a32(uint32_t fetchdat)
+{
+    if ((cpu_s->cpu_type == CPU_PENTIUM) || ((CPL || (cpu_state.eflags & VM_FLAG)) && (cr0 & 1))) {
+        x86gpf(NULL, 0);
+        return 1;
+    }
+    fetch_ea_32(fetchdat);
+    opMOV_TRx_r();
+    PREFETCH_RUN(6, 2, rmdat, 0, 0, 0, 0, 1);
+    return 0;
+}

src/cpu/x86_ops_pmode.h

@@ -367,6 +367,7 @@ op0F01_common(uint32_t fetchdat, int is32, int is286, int ea32)
 
     switch (rmdat & 0x38) {
         case 0x00: /*SGDT*/
+            ILLEGAL_ON(cpu_mod == 3);
             if (cpu_mod != 3)
                 SEG_CHECK_WRITE(cpu_state.ea_seg);
             seteaw(gdt.limit);
@@ -389,6 +390,7 @@ op0F01_common(uint32_t fetchdat, int is32, int is286, int ea32)
             PREFETCH_RUN(7, 2, rmdat, 0, 0, 1, 1, ea32);
             break;
         case 0x10: /*LGDT*/
+            ILLEGAL_ON(cpu_mod == 3);
             if ((CPL || cpu_state.eflags & VM_FLAG) && (cr0 & 1)) {
                 x86gpf(NULL, 0);
                 break;

src/cpu/x86_ops_ret_2386.h

@@ -0,0 +1,297 @@
+#ifdef USE_NEW_DYNAREC
+#    define CPU_SET_OXPC
+#else
+#    define CPU_SET_OXPC oxpc = cpu_state.pc;
+#endif
+
+#define RETF_a16(stack_offset)                        \
+    if ((msw & 1) && !(cpu_state.eflags & VM_FLAG)) { \
+        op_pmoderetf(0, stack_offset);                \
+        return 1;                                     \
+    }                                                 \
+    CPU_SET_OXPC                                      \
+    if (stack32) {                                    \
+        cpu_state.pc = readmemw(ss, ESP);             \
+        op_loadcs(readmemw(ss, ESP + 2));             \
+    } else {                                          \
+        cpu_state.pc = readmemw(ss, SP);              \
+        op_loadcs(readmemw(ss, SP + 2));              \
+    }                                                 \
+    if (cpu_state.abrt)                               \
+        return 1;                                     \
+    if (stack32)                                      \
+        ESP += 4 + stack_offset;                      \
+    else                                              \
+        SP += 4 + stack_offset;                       \
+    cycles -= timing_retf_rm;
+
+#define RETF_a32(stack_offset)                        \
+    if ((msw & 1) && !(cpu_state.eflags & VM_FLAG)) { \
+        op_pmoderetf(1, stack_offset);                \
+        return 1;                                     \
+    }                                                 \
+    CPU_SET_OXPC                                      \
+    if (stack32) {                                    \
+        cpu_state.pc = readmeml(ss, ESP);             \
+        op_loadcs(readmeml(ss, ESP + 4) & 0xffff);    \
+    } else {                                          \
+        cpu_state.pc = readmeml(ss, SP);              \
+        op_loadcs(readmeml(ss, SP + 4) & 0xffff);     \
+    }                                                 \
+    if (cpu_state.abrt)                               \
+        return 1;                                     \
+    if (stack32)                                      \
+        ESP += 8 + stack_offset;                      \
+    else                                              \
+        SP += 8 + stack_offset;                       \
+    cycles -= timing_retf_rm;
+
+static int
+opRETF_a16(uint32_t fetchdat)
+{
+    int cycles_old = cycles;
+    UN_USED(cycles_old);
+
+    CPU_BLOCK_END();
+    RETF_a16(0);
+
+    PREFETCH_RUN(cycles_old - cycles, 1, -1, 2, 0, 0, 0, 0);
+    PREFETCH_FLUSH();
+    return 0;
+}
+static int
+opRETF_a32(uint32_t fetchdat)
+{
+    int cycles_old = cycles;
+    UN_USED(cycles_old);
+
+    CPU_BLOCK_END();
+    RETF_a32(0);
+
+    PREFETCH_RUN(cycles_old - cycles, 1, -1, 0, 2, 0, 0, 1);
+    PREFETCH_FLUSH();
+    return 0;
+}
+
+static int
+opRETF_a16_imm(uint32_t fetchdat)
+{
+    uint16_t offset     = getwordf();
+    int      cycles_old = cycles;
+    UN_USED(cycles_old);
+
+    CPU_BLOCK_END();
+    RETF_a16(offset);
+
+    PREFETCH_RUN(cycles_old - cycles, 3, -1, 2, 0, 0, 0, 0);
+    PREFETCH_FLUSH();
+    return 0;
+}
+static int
+opRETF_a32_imm(uint32_t fetchdat)
+{
+    uint16_t offset     = getwordf();
+    int      cycles_old = cycles;
+    UN_USED(cycles_old);
+
+    CPU_BLOCK_END();
+    RETF_a32(offset);
+
+    PREFETCH_RUN(cycles_old - cycles, 3, -1, 0, 2, 0, 0, 1);
+    PREFETCH_FLUSH();
+    return 0;
+}
+
+static int
+opIRET_186(uint32_t fetchdat)
+{
+    int cycles_old = cycles;
+    UN_USED(cycles_old);
+
+    if ((cr0 & 1) && (cpu_state.eflags & VM_FLAG) && (IOPL != 3)) {
+        x86gpf(NULL, 0);
+        return 1;
+    }
+    if (msw & 1) {
+        optype = IRET;
+        op_pmodeiret(0);
+        optype = 0;
+    } else {
+        uint16_t new_cs;
+        CPU_SET_OXPC
+        if (stack32) {
+            cpu_state.pc    = readmemw(ss, ESP);
+            new_cs          = readmemw(ss, ESP + 2);
+            cpu_state.flags = (cpu_state.flags & 0x7000) | (readmemw(ss, ESP + 4) & 0xffd5) | 2;
+            ESP += 6;
+        } else {
+            cpu_state.pc    = readmemw(ss, SP);
+            new_cs          = readmemw(ss, ((SP + 2) & 0xffff));
+            cpu_state.flags = (cpu_state.flags & 0x7000) | (readmemw(ss, ((SP + 4) & 0xffff)) & 0x0fd5) | 2;
+            SP += 6;
+        }
+        op_loadcs(new_cs);
+        cycles -= timing_iret_rm;
+    }
+    flags_extract();
+    nmi_enable = 1;
+    rf_flag_no_clear = 1;
+    CPU_BLOCK_END();
+
+    PREFETCH_RUN(cycles_old - cycles, 1, -1, 2, 0, 0, 0, 0);
+    PREFETCH_FLUSH();
+    return cpu_state.abrt;
+}
+
+static int
+opIRET_286(uint32_t fetchdat)
+{
+    int cycles_old = cycles;
+    UN_USED(cycles_old);
+
+    if ((cr0 & 1) && (cpu_state.eflags & VM_FLAG) && (IOPL != 3)) {
+        x86gpf(NULL, 0);
+        return 1;
+    }
+    if (msw & 1) {
+        optype = IRET;
+        op_pmodeiret(0);
+        optype = 0;
+    } else {
+        uint16_t new_cs;
+        CPU_SET_OXPC
+        if (stack32) {
+            cpu_state.pc    = readmemw(ss, ESP);
+            new_cs          = readmemw(ss, ESP + 2);
+            cpu_state.flags = (cpu_state.flags & 0x7000) | (readmemw(ss, ESP + 4) & 0xffd5) | 2;
+            ESP += 6;
+        } else {
+            cpu_state.pc    = readmemw(ss, SP);
+            new_cs          = readmemw(ss, ((SP + 2) & 0xffff));
+            cpu_state.flags = (cpu_state.flags & 0x7000) | (readmemw(ss, ((SP + 4) & 0xffff)) & 0x0fd5) | 2;
+            SP += 6;
+        }
+        op_loadcs(new_cs);
+        cycles -= timing_iret_rm;
+    }
+    flags_extract();
+    nmi_enable = 1;
+    rf_flag_no_clear = 1;
+    CPU_BLOCK_END();
+
+    PREFETCH_RUN(cycles_old - cycles, 1, -1, 2, 0, 0, 0, 0);
+    PREFETCH_FLUSH();
+    return cpu_state.abrt;
+}
+
+static int
+opIRET(uint32_t fetchdat)
+{
+    int cycles_old = cycles;
+    UN_USED(cycles_old);
+
+    if ((cr0 & 1) && (cpu_state.eflags & VM_FLAG) && (IOPL != 3)) {
+        if (cr4 & CR4_VME) {
+            uint16_t new_pc;
+            uint16_t new_cs;
+            uint16_t new_flags;
+
+            new_pc    = readmemw(ss, SP);
+            new_cs    = readmemw(ss, ((SP + 2) & 0xffff));
+            new_flags = readmemw(ss, ((SP + 4) & 0xffff));
+            if (cpu_state.abrt)
+                return 1;
+
+            if ((new_flags & T_FLAG) || ((new_flags & I_FLAG) && (cpu_state.eflags & VIP_FLAG))) {
+                x86gpf(NULL, 0);
+                return 1;
+            }
+            SP += 6;
+            if (new_flags & I_FLAG)
+                cpu_state.eflags |= VIF_FLAG;
+            else
+                cpu_state.eflags &= ~VIF_FLAG;
+            cpu_state.flags = (cpu_state.flags & 0x3300) | (new_flags & 0x4cd5) | 2;
+            op_loadcs(new_cs);
+            cpu_state.pc = new_pc;
+
+            cycles -= timing_iret_rm;
+        } else {
+            x86gpf_expected(NULL, 0);
+            return 1;
+        }
+    } else {
+        if (msw & 1) {
+            optype = IRET;
+            op_pmodeiret(0);
+            optype = 0;
+        } else {
+            uint16_t new_cs;
+            CPU_SET_OXPC
+            if (stack32) {
+                cpu_state.pc    = readmemw(ss, ESP);
+                new_cs          = readmemw(ss, ESP + 2);
+                cpu_state.flags = (readmemw(ss, ESP + 4) & 0xffd5) | 2;
+                ESP += 6;
+            } else {
+                cpu_state.pc    = readmemw(ss, SP);
+                new_cs          = readmemw(ss, ((SP + 2) & 0xffff));
+                cpu_state.flags = (readmemw(ss, ((SP + 4) & 0xffff)) & 0xffd5) | 2;
+                SP += 6;
+            }
+            op_loadcs(new_cs);
+            cycles -= timing_iret_rm;
+        }
+    }
+    flags_extract();
+    nmi_enable = 1;
+    rf_flag_no_clear = 1;
+    CPU_BLOCK_END();
+
+    PREFETCH_RUN(cycles_old - cycles, 1, -1, 2, 0, 0, 0, 0);
+    PREFETCH_FLUSH();
+    return cpu_state.abrt;
+}
+
+static int
+opIRETD(uint32_t fetchdat)
+{
+    int cycles_old = cycles;
+    UN_USED(cycles_old);
+
+    if ((cr0 & 1) && (cpu_state.eflags & VM_FLAG) && (IOPL != 3)) {
+        x86gpf_expected(NULL, 0);
+        return 1;
+    }
+    if (msw & 1) {
+        optype = IRET;
+        op_pmodeiret(1);
+        optype = 0;
+    } else {
+        uint16_t new_cs;
+        CPU_SET_OXPC
+        if (stack32) {
+            cpu_state.pc     = readmeml(ss, ESP);
+            new_cs           = readmemw(ss, ESP + 4);
+            cpu_state.flags  = (readmemw(ss, ESP + 8) & 0xffd5) | 2;
+            cpu_state.eflags = readmemw(ss, ESP + 10);
+            ESP += 12;
+        } else {
+            cpu_state.pc     = readmeml(ss, SP);
+            new_cs           = readmemw(ss, ((SP + 4) & 0xffff));
+            cpu_state.flags  = (readmemw(ss, (SP + 8) & 0xffff) & 0xffd5) | 2;
+            cpu_state.eflags = readmemw(ss, (SP + 10) & 0xffff);
+            SP += 12;
+        }
+        op_loadcs(new_cs);
+        cycles -= timing_iret_rm;
+    }
+    flags_extract();
+    nmi_enable = 1;
+    rf_flag_no_clear = 1;
+    CPU_BLOCK_END();
+
+    PREFETCH_RUN(cycles_old - cycles, 1, -1, 0, 2, 0, 0, 1);
+    PREFETCH_FLUSH();
+    return cpu_state.abrt;
+}

src/cpu/x86seg.c

@@ -78,6 +78,10 @@ x86seg_log(const char *fmt, ...)
 #    define x86seg_log(fmt, ...)
 #endif
 
+#ifdef USE_DYNAREC
+extern int cpu_block_end;
+#endif
+
 void
 #ifdef OPS_286_386
 x86_doabrt_2386(int x86_abrt)
@@ -2088,6 +2092,7 @@ taskswitch286(uint16_t seg, uint16_t *segdat, int is32)
     uint32_t      new_edi;
     uint32_t      new_pc;
     uint32_t      new_flags;
+    uint32_t      t_bit;
     uint32_t      addr;
     uint32_t     *segdat232 = (uint32_t *) segdat2;
     const x86seg *dt;
@@ -2189,6 +2194,7 @@ taskswitch286(uint16_t seg, uint16_t *segdat, int is32)
         new_fs  = readmemw(base, 0x58);
         new_gs  = readmemw(base, 0x5C);
         new_ldt = readmemw(base, 0x60);
+        t_bit   = readmemb(base, 0x64) & 1;
 
         cr0 |= 8;
 
@@ -2279,6 +2285,15 @@ taskswitch286(uint16_t seg, uint16_t *segdat, int is32)
         op_loadseg(new_ds, &cpu_state.seg_ds);
         op_loadseg(new_fs, &cpu_state.seg_fs);
         op_loadseg(new_gs, &cpu_state.seg_gs);
+
+        rf_flag_no_clear = 1;
+
+        if (t_bit) {
+            trap |= 2;
+#ifdef USE_DYNAREC
+            cpu_block_end = 1;
+#endif
+        }
     } else {
         if (limit < 43) {
             x86ts(NULL, seg);
@@ -2454,6 +2469,7 @@ taskswitch286(uint16_t seg, uint16_t *segdat, int is32)
     tr.limit   = limit;
     tr.access  = segdat[2] >> 8;
     tr.ar_high = segdat[3] & 0xff;
+    dr[7] &= 0xFFFFFFAA;
 }
 
 void

src/cpu/x86seg_common.c

@@ -87,6 +87,12 @@ x86de(UNUSED(char *s), UNUSED(uint16_t error))
 #endif
 }
 
+void
+x86gen(void)
+{
+    x86_int(1);
+}
+
 void
 x86gpf(UNUSED(char *s), uint16_t error)
 {

src/cpu/x86seg_common.h

@@ -41,6 +41,7 @@ extern int     cgate32;
 extern int     intgatesize;
 
 extern void    x86seg_reset(void);
+extern void    x86gen(void);
 extern void    x86de(char *s, uint16_t error);
 extern void    x86gpf(char *s, uint16_t error);
 extern void    x86gpf_expected(char *s, uint16_t error);

src/device.c

@@ -849,3 +849,9 @@ machine_get_config_string(char *s)
 
     return NULL;
 }
+
+const device_t*
+device_context_get_device(void)
+{
+    return device_current.dev;
+}

src/device/CMakeLists.txt

@@ -17,11 +17,11 @@
 
 add_library(dev OBJECT bugger.c cassette.c cartridge.c hasp.c hwm.c hwm_lm75.c hwm_lm78.c hwm_gl518sm.c
     hwm_vt82c686.c ibm_5161.c isamem.c isartc.c ../lpt.c pci_bridge.c
-    postcard.c serial.c clock_ics9xxx.c isapnp.c i2c.c i2c_gpio.c
+    postcard.c serial.c unittester.c clock_ics9xxx.c isapnp.c i2c.c i2c_gpio.c
     smbus_piix4.c smbus_ali7101.c keyboard.c keyboard_xt.c
     kbc_at.c kbc_at_dev.c
     keyboard_at.c
-    mouse.c mouse_bus.c mouse_serial.c mouse_ps2.c phoenix_486_jumper.c
+    mouse.c mouse_bus.c mouse_serial.c mouse_ps2.c nec_mate_unk.c phoenix_486_jumper.c
     serial_passthrough.c)
 
 if(NOT CMAKE_CXX_COMPILER_ID MATCHES "Clang")

src/device/ibm_5161.c

@@ -73,8 +73,8 @@ ibm_5161_in(uint16_t port, void *priv)
                                     02-03 = not used
                                     04-07 = switch position
                                             1 = Off
-                                            0 =On */
-            ret = dev->regs[3] & 0x01;
+                                            0 = On */
+            ret = (dev->regs[3] & 0x01) | (((~(0xf - ((mem_size + isa_mem_size) >> 6))) & 0xf) << 4);
             break;
 
         default:
@@ -95,8 +95,7 @@ ibm_5161_close(void *priv)
 static void *
 ibm_5161_init(UNUSED(const device_t *info))
 {
-    ibm_5161_t *dev = (ibm_5161_t *) malloc(sizeof(ibm_5161_t));
-    memset(dev, 0, sizeof(ibm_5161_t));
+    ibm_5161_t *dev = (ibm_5161_t *) calloc(1, sizeof(ibm_5161_t));
 
     /* Extender Card Registers */
     io_sethandler(0x0210, 0x0004,

src/device/isapnp.c

@@ -124,7 +124,7 @@ static void
 isapnp_device_config_changed(isapnp_card_t *card, isapnp_device_t *ld)
 {
     /* Ignore card if it hasn't signed up for configuration changes. */
-    if (!card->config_changed)
+    if ((card == NULL) || !card->config_changed)
         return;
 
     /* Populate config structure, performing endianness conversion as needed. */

src/device/kbc_at.c

@@ -44,6 +44,9 @@
 #include <86box/video.h>
 #include <86box/keyboard.h>
 
+#include <86box/dma.h>
+#include <86box/pci.h>
+
 #define STAT_PARITY        0x80
 #define STAT_RTIMEOUT      0x40
 #define STAT_TTIMEOUT      0x20
@@ -141,8 +144,9 @@ typedef struct atkbc_t {
 
     uint32_t flags;
 
-    /* Main timer. */
-    pc_timer_t send_delay_timer;
+    /* Main timers. */
+    pc_timer_t kbc_poll_timer;
+    pc_timer_t kbc_dev_poll_timer;
 
     /* P2 pulse callback timer. */
     pc_timer_t pulse_cb;
@@ -695,10 +699,18 @@ kbc_at_poll(void *priv)
 {
     atkbc_t *dev = (atkbc_t *) priv;
 
-    timer_advance_u64(&dev->send_delay_timer, (100ULL * TIMER_USEC));
+    timer_advance_u64(&dev->kbc_poll_timer, (100ULL * TIMER_USEC));
 
     /* TODO: Implement the password security state. */
     kbc_at_do_poll(dev);
+}
+
+static void
+kbc_at_dev_poll(void *priv)
+{
+    atkbc_t *dev = (atkbc_t *) priv;
+
+    timer_advance_u64(&dev->kbc_dev_poll_timer, (100ULL * TIMER_USEC));
 
     if ((kbc_at_ports[0] != NULL) && (kbc_at_ports[0]->priv != NULL))
         kbc_at_ports[0]->poll(kbc_at_ports[0]->priv);
@@ -736,7 +748,7 @@ write_p2(atkbc_t *dev, uint8_t val)
     /* AT, PS/2: Handle reset. */
     /* 0 holds the CPU in the RESET state, 1 releases it. To simplify this,
        we just do everything on release. */
-    if ((old ^ val) & 0x01) { /*Reset*/
+    if (!cpu_cpurst_on_sr && ((old ^ val) & 0x01)) { /*Reset*/
         if (!(val & 0x01)) {  /* Pin 0 selected. */
             /* Pin 0 selected. */
             kbc_at_log("write_p2(): Pulse reset!\n");
@@ -765,6 +777,28 @@ write_p2(atkbc_t *dev, uint8_t val)
 
     /* Do this here to avoid an infinite reset loop. */
     dev->p2 = val;
+
+    if (cpu_cpurst_on_sr && ((old ^ val) & 0x01)) { /*Reset*/
+        if (!(val & 0x01)) {  /* Pin 0 selected. */
+            /* Pin 0 selected. */
+            pclog("write_p2(): Pulse reset!\n");
+            dma_reset();
+            dma_set_at(1);
+
+            device_reset_all(DEVICE_ALL);
+
+            cpu_alt_reset = 0;
+
+            pci_reset();
+
+            mem_a20_alt = 0;
+            mem_a20_recalc();
+
+            flushmmucache();
+
+            resetx86();
+        }
+    }
 }
 
 static void
@@ -1753,6 +1787,9 @@ kbc_at_process_cmd(void *priv)
                 if (dev->ib == 0xbb)
                     break;
 
+                if (strstr(machine_get_internal_name(), "pb") != NULL)
+                    cpu_override_dynarec = 1;
+
                 if (dev->misc_flags & FLAG_PS2) {
                     set_enable_aux(dev, 1);
                     if ((dev->ports[1] != NULL) && (dev->ports[1]->priv != NULL)) {
@@ -1857,6 +1894,8 @@ kbc_at_read(uint16_t port, void *priv)
                      This also means that in AT mode, the IRQ is level-triggered. */
             if (!(dev->misc_flags & FLAG_PS2))
                 picintclevel(1 << 1, &dev->irq_state);
+            if ((strstr(machine_get_internal_name(), "pb") != NULL) && (cpu_override_dynarec == 1))
+                cpu_override_dynarec = 0;
             break;
 
         case 0x64:
@@ -1934,7 +1973,8 @@ kbc_at_close(void *priv)
     int max_ports = ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_1) ? 2 : 1;
 
     /* Stop timers. */
-    timer_disable(&dev->send_delay_timer);
+    timer_disable(&dev->kbc_dev_poll_timer);
+    timer_disable(&dev->kbc_poll_timer);
 
     for (int i = 0; i < max_ports; i++) {
         if (kbc_at_ports[i] != NULL) {
@@ -1966,9 +2006,11 @@ kbc_at_init(const device_t *info)
     io_sethandler(0x0060, 1, kbc_at_read, NULL, NULL, kbc_at_write, NULL, NULL, dev);
     io_sethandler(0x0064, 1, kbc_at_read, NULL, NULL, kbc_at_write, NULL, NULL, dev);
 
-    timer_add(&dev->send_delay_timer, kbc_at_poll, dev, 1);
+    timer_add(&dev->kbc_poll_timer, kbc_at_poll, dev, 1);
     timer_add(&dev->pulse_cb, pulse_poll, dev, 0);
 
+    timer_add(&dev->kbc_dev_poll_timer, kbc_at_dev_poll, dev, 1);
+
     dev->write60_ven = NULL;
     dev->write64_ven = NULL;
 

src/device/kbc_at_dev.c

@@ -119,12 +119,13 @@ kbc_at_dev_poll(void *priv)
             break;
         case DEV_STATE_MAIN_2:
             /* Output from scan queue if needed and then return to main loop #1. */
-            if (*dev->scan && (dev->port->out_new == -1) && (dev->queue_start != dev->queue_end)) {
+            if (!dev->ignore && *dev->scan && (dev->port->out_new == -1) &&
+                (dev->queue_start != dev->queue_end)) {
                 kbc_at_dev_log("%s: %02X (DATA) on channel 1\n", dev->name, dev->queue[dev->queue_start]);
                 dev->port->out_new   = dev->queue[dev->queue_start];
                 dev->queue_start     = (dev->queue_start + 1) & dev->fifo_mask;
             }
-            if (!(*dev->scan) || dev->port->wantcmd)
+            if (dev->ignore || !(*dev->scan) || dev->port->wantcmd)
                 dev->state = DEV_STATE_MAIN_1;
             break;
         case DEV_STATE_MAIN_OUT:
@@ -199,8 +200,7 @@ kbc_at_dev_init(uint8_t inst)
 {
     atkbc_dev_t *dev;
 
-    dev = (atkbc_dev_t *) malloc(sizeof(atkbc_dev_t));
-    memset(dev, 0x00, sizeof(atkbc_dev_t));
+    dev = (atkbc_dev_t *) calloc(1, sizeof(atkbc_dev_t));
 
     dev->port = kbc_at_ports[inst];
 

src/device/keyboard_at.c

@@ -32,6 +32,8 @@
 
 #define FIFO_SIZE      16
 
+#define BAT_COUNT      1000
+
 enum {
     KBD_84_KEY = 0,
     KBD_101_KEY,
@@ -75,6 +77,8 @@ static atkbc_dev_t *SavedKbd                        = NULL;
 
 static uint8_t     inv_cmd_response                 = 0xfa;
 
+static uint16_t    bat_counter                      = 0;
+
 static const scancode scancode_set1[512] = {
   // clang-format off
     { {          0},{               0} }, { {     0x01,0},{          0x81,0} }, { {     0x02,0},{          0x82,0} }, { {     0x03,0},{          0x83,0} },        /*000*/
@@ -519,10 +523,12 @@ static void
 add_data_kbd(uint16_t val)
 {
     atkbc_dev_t *dev = SavedKbd;
-    uint8_t  fake_shift[4];
+    uint8_t  fake_shift[4] = { 0 };
     uint8_t  num_lock = 0;
     uint8_t  shift_states = 0;
 
+    dev->ignore = 1;
+
     keyboard_get_states(NULL, &num_lock, NULL);
     shift_states = keyboard_get_shift() & STATE_SHIFT_MASK;
 
@@ -537,12 +543,14 @@ add_data_kbd(uint16_t val)
                     /* Num lock on and no shifts are pressed, send non-inverted fake shift. */
                     switch (keyboard_mode & 0x02) {
                         case 1:
+                            keyboard_at_log("E0 2A\n");
                             fake_shift[0] = 0xe0;
                             fake_shift[1] = 0x2a;
                             add_data_vals(dev, fake_shift, 2);
                             break;
 
                         case 2:
+                            keyboard_at_log("E0 12\n");
                             fake_shift[0] = 0xe0;
                             fake_shift[1] = 0x12;
                             add_data_vals(dev, fake_shift, 2);
@@ -558,12 +566,14 @@ add_data_kbd(uint16_t val)
                     /* Num lock off and left shift pressed. */
                     switch (keyboard_mode & 0x02) {
                         case 1:
+                            keyboard_at_log("E0 AA\n");
                             fake_shift[0] = 0xe0;
                             fake_shift[1] = 0xaa;
                             add_data_vals(dev, fake_shift, 2);
                             break;
 
                         case 2:
+                            keyboard_at_log("E0 F0 12\n");
                             fake_shift[0] = 0xe0;
                             fake_shift[1] = 0xf0;
                             fake_shift[2] = 0x12;
@@ -579,12 +589,14 @@ add_data_kbd(uint16_t val)
                     /* Num lock off and right shift pressed. */
                     switch (keyboard_mode & 0x02) {
                         case 1:
+                            keyboard_at_log("E0 B6\n");
                             fake_shift[0] = 0xe0;
                             fake_shift[1] = 0xb6;
                             add_data_vals(dev, fake_shift, 2);
                             break;
 
                         case 2:
+                            keyboard_at_log("E0 F0 59\n");
                             fake_shift[0] = 0xe0;
                             fake_shift[1] = 0xf0;
                             fake_shift[2] = 0x59;
@@ -610,12 +622,14 @@ add_data_kbd(uint16_t val)
                     /* Num lock on and no shifts are pressed, send non-inverted fake shift. */
                     switch (keyboard_mode & 0x02) {
                         case 1:
+                            keyboard_at_log("E0 AA\n");
                             fake_shift[0] = 0xe0;
                             fake_shift[1] = 0xaa;
                             add_data_vals(dev, fake_shift, 2);
                             break;
 
                         case 2:
+                            keyboard_at_log("E0 F0 12\n");
                             fake_shift[0] = 0xe0;
                             fake_shift[1] = 0xf0;
                             fake_shift[2] = 0x12;
@@ -632,12 +646,14 @@ add_data_kbd(uint16_t val)
                     /* Num lock off and left shift pressed. */
                     switch (keyboard_mode & 0x02) {
                         case 1:
+                            keyboard_at_log("E0 2A\n");
                             fake_shift[0] = 0xe0;
                             fake_shift[1] = 0x2a;
                             add_data_vals(dev, fake_shift, 2);
                             break;
 
                         case 2:
+                            keyboard_at_log("E0 12\n");
                             fake_shift[0] = 0xe0;
                             fake_shift[1] = 0x12;
                             add_data_vals(dev, fake_shift, 2);
@@ -652,12 +668,14 @@ add_data_kbd(uint16_t val)
                     /* Num lock off and right shift pressed. */
                     switch (keyboard_mode & 0x02) {
                         case 1:
+                            keyboard_at_log("E0 36\n");
                             fake_shift[0] = 0xe0;
                             fake_shift[1] = 0x36;
                             add_data_vals(dev, fake_shift, 2);
                             break;
 
                         case 2:
+                            keyboard_at_log("E0 59\n");
                             fake_shift[0] = 0xe0;
                             fake_shift[1] = 0x59;
                             add_data_vals(dev, fake_shift, 2);
@@ -676,6 +694,8 @@ add_data_kbd(uint16_t val)
             kbc_at_dev_queue_add(dev, val, 1);
             break;
     }
+
+    dev->ignore = 0;
 }
 
 void
@@ -704,11 +724,16 @@ keyboard_at_bat(void *priv)
 {
     atkbc_dev_t *dev = (atkbc_dev_t *) priv;
 
-    keyboard_at_set_defaults(dev);
+    if (bat_counter == 0x0000) {
+        keyboard_at_set_defaults(dev);
 
-    keyboard_scan = 1;
+        keyboard_scan = 1;
 
-    kbc_at_dev_queue_add(dev, 0xaa, 0);
+        kbc_at_dev_queue_add(dev, 0xaa, 0);
+    } else {
+        bat_counter--;
+        dev->state = DEV_STATE_EXECUTE_BAT;
+    }
 }
 
 static void
@@ -851,7 +876,8 @@ keyboard_at_write(void *priv)
 
             case 0xf5: /* set defaults and disable keyboard */
             case 0xf6: /* set defaults */
-                keyboard_at_log("%s: set defaults%s\n", (val == 0xf6) ? "" : " and disable keyboard");
+                keyboard_at_log("%s: set defaults%s\n",
+                                dev->name, (val == 0xf6) ? "" : " and disable keyboard");
                 keyboard_scan = !(val & 0x01);
                 keyboard_at_log("%s: val = %02X, keyboard_scan = %i\n",
                                 dev->name, val, keyboard_scan);
@@ -926,6 +952,7 @@ keyboard_at_write(void *priv)
 
             case 0xff: /* reset */
                 kbc_at_dev_reset(dev, 1);
+                bat_counter = 1000;
                 break;
 
             default:
@@ -965,8 +992,10 @@ keyboard_at_init(const device_t *info)
 
     dev->fifo_mask   = FIFO_SIZE - 1;
 
-    if (dev->port != NULL)
+    if (dev->port != NULL) {
         kbc_at_dev_reset(dev, 0);
+        bat_counter = 0x0000;
+    }
 
     keyboard_send = add_data_kbd;
     SavedKbd = dev;

src/device/mouse.c

@@ -454,6 +454,15 @@ mouse_scale(int x, int y)
     mouse_scale_y(y);
 }
 
+void
+mouse_scale_axis(int axis, int val)
+{
+    if (axis == 1)
+        mouse_scale_y(val);
+    else if (axis == 0)
+        mouse_scale_x(val);
+}
+
 void
 mouse_set_z(int z)
 {

src/device/mouse_ps2.c

@@ -21,6 +21,7 @@
 #include <wchar.h>
 #define HAVE_STDARG_H
 #include <86box/86box.h>
+#include "cpu.h"
 #include <86box/device.h>
 #include <86box/keyboard.h>
 #include <86box/mouse.h>
@@ -276,6 +277,7 @@ ps2_write(void *priv)
                 break;
 
             default:
+                mouse_ps2_log("%s: Bad command: %02X\n", dev->name, val);
                 kbc_at_dev_queue_add(dev, 0xfe, 0);
         }
     }

src/device/mouse_serial.c

@@ -28,6 +28,7 @@
 #include <86box/serial.h>
 #include <86box/mouse.h>
 #include <86box/plat.h>
+#include <86box/version.h>
 
 #define SERMOUSE_PORT 0 /* attach to Serial0 */
 
@@ -537,7 +538,7 @@ ltsermouse_process_command(mouse_t *dev)
                         [FORMAT_HEX]       = 0x04,
                         [FORMAT_MS_4BYTE]  = 0x08,         /* Guess */
                         [FORMAT_MS_WHEEL]  = 0x08 };       /* Guess */
-    const char *copr = "\r\n(C) 2023 86Box, Revision 3.0";
+    const char *copr = "\r\n(C) " COPYRIGHT_YEAR " 86Box, Revision 3.0";
 
     mouse_serial_log("ltsermouse_process_command(): %02X\n", dev->ib);
     dev->command = dev->ib;
@@ -674,7 +675,6 @@ ltsermouse_process_data(mouse_t *dev)
         case 0x2a:
             switch (dev->ib) {
                 default:
-                    mouse_serial_log("Serial mouse: Invalid period %02X, using 1200 bps\n", data);
                     fallthrough;
                 case 0x6e:
                     dev->bps = 1200;

src/device/nec_mate_unk.c

@@ -0,0 +1,75 @@
+/*
+ * 86Box    A hypervisor and IBM PC system emulator that specializes in
+ *          running old operating systems and software designed for IBM
+ *          PC systems and compatibles from 1981 through fairly recent
+ *          system designs based on the PCI bus.
+ *
+ *          This file is part of the 86Box distribution.
+ *
+ *          Implementation of the NEC Mate NX MA30D/23D Unknown Readout.
+ *
+ *
+ *
+ * Authors: Miran Grca, <mgrca8@gmail.com>
+ *
+ *          Copyright 2020-2023 Miran Grca.
+ */
+#include <stdarg.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <wchar.h>
+#define HAVE_STDARG_H
+#include <86box/86box.h>
+#include "cpu.h"
+#include <86box/timer.h>
+#include <86box/io.h>
+#include <86box/device.h>
+#include <86box/chipset.h>
+#include <86box/plat_unused.h>
+
+static uint8_t
+nec_mate_unk_read(UNUSED(uint16_t addr), void *priv)
+{
+    /* Expected by this NEC machine.
+
+       It writes something on ports 3D6C, 3D6D, and 3D6E, then expects to read
+       2Ah from port 3D6D. Then it repeats this with ports 6A, 6B, and 6C.
+     */
+    return 0x2a;
+}
+
+static void
+nec_mate_unk_close(void *priv)
+{
+    uint8_t *dev = (uint8_t *) priv;
+
+    free(dev);
+}
+
+static void *
+nec_mate_unk_init(const device_t *info)
+{
+    /* We have to return something non-NULL. */
+    uint8_t *dev = (uint8_t *) calloc(1, sizeof(uint8_t));
+
+    io_sethandler(0x006b, 0x0001, nec_mate_unk_read, NULL, NULL, NULL, NULL, NULL, NULL);
+    io_sethandler(0x3d6d, 0x0001, nec_mate_unk_read, NULL, NULL, NULL, NULL, NULL, NULL);
+
+    return dev;
+}
+
+const device_t nec_mate_unk_device = {
+    .name          = "NEC Mate NX MA30D/23D Unknown Readout",
+    .internal_name = "nec_mate_unk",
+    .flags         = 0,
+    .local         = 0,
+    .init          = nec_mate_unk_init,
+    .close         = nec_mate_unk_close,
+    .reset         = NULL,
+    { .available = NULL },
+    .speed_changed = NULL,
+    .force_redraw  = NULL,
+    .config        = NULL
+};

src/device/unittester.c

@@ -0,0 +1,635 @@
+/*
+ * 86Box    A hypervisor and IBM PC system emulator that specializes in
+ *          running old operating systems and software designed for IBM
+ *          PC systems and compatibles from 1981 through fairly recent
+ *          system designs based on the PCI bus.
+ *
+ *          This file is part of the 86Box distribution.
+ *
+ *          Debug device for assisting in unit testing.
+ *          See doc/specifications/86box-unit-tester.md for more info.
+ *          If modifying the protocol, you MUST modify the specification
+ *          and increment the version number.
+ *
+ *
+ *
+ * Authors: GreaseMonkey, <thematrixeatsyou+86b@gmail.com>
+ *
+ *          Copyright 2024 GreaseMonkey.
+ */
+#include <stdarg.h>
+#include <stdbool.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <wchar.h>
+#define HAVE_STDARG_H
+#include <86box/86box.h>
+#include <86box/io.h>
+#include <86box/plat.h>
+#include <86box/unittester.h>
+#include <86box/video.h>
+
+enum fsm1_value {
+    UT_FSM1_WAIT_8,
+    UT_FSM1_WAIT_6,
+    UT_FSM1_WAIT_B,
+    UT_FSM1_WAIT_o,
+    UT_FSM1_WAIT_x,
+};
+enum fsm2_value {
+    UT_FSM2_IDLE,
+    UT_FSM2_WAIT_IOBASE_0,
+    UT_FSM2_WAIT_IOBASE_1,
+};
+
+/* Status bit mask */
+#define UT_STATUS_AWAITING_READ   (1 << 0)
+#define UT_STATUS_AWAITING_WRITE  (1 << 1)
+#define UT_STATUS_IDLE            (1 << 2)
+#define UT_STATUS_UNSUPPORTED_CMD (1 << 3)
+
+/* Command list */
+enum unittester_cmd {
+    UT_CMD_NOOP                             = 0x00,
+    UT_CMD_CAPTURE_SCREEN_SNAPSHOT          = 0x01,
+    UT_CMD_READ_SCREEN_SNAPSHOT_RECTANGLE   = 0x02,
+    UT_CMD_VERIFY_SCREEN_SNAPSHOT_RECTANGLE = 0x03,
+    UT_CMD_EXIT                             = 0x04,
+};
+
+struct unittester_state {
+    /* I/O port settings */
+    uint16_t trigger_port;
+    uint16_t iobase_port;
+
+    /* Trigger port finite state machines */
+    /* FSM1: "86Box" string detection */
+    enum fsm1_value fsm1;
+    /* FSM2: IOBASE port selection, once trigger is activated */
+    enum fsm2_value fsm2;
+    uint16_t        fsm2_new_iobase;
+
+    /* Command and data handling state */
+    uint8_t             status;
+    enum unittester_cmd cmd_id;
+    uint32_t            write_offs;
+    uint32_t            write_len;
+    uint64_t            read_offs;
+    uint64_t            read_len;
+
+    /* Screen snapshot state */
+    /* Monitor to take snapshot on */
+    uint8_t snap_monitor;
+    /* Main image width + height */
+    uint16_t snap_img_width;
+    uint16_t snap_img_height;
+    /* Fully overscanned image width + height */
+    uint16_t snap_overscan_width;
+    uint16_t snap_overscan_height;
+    /* Offset of actual image within overscanned area */
+    uint16_t snap_img_xoffs;
+    uint16_t snap_img_yoffs;
+
+    /* Command-specific state */
+    /* 0x02: Read Screen Snapshot Rectangle */
+    /* 0x03: Verify Screen Snapshot Rectangle */
+    uint16_t read_snap_width;
+    uint16_t read_snap_height;
+    int16_t  read_snap_xoffs;
+    int16_t  read_snap_yoffs;
+    uint32_t read_snap_crc;
+
+    /* 0x04: Exit */
+    uint8_t exit_code;
+};
+static struct unittester_state       unittester;
+static const struct unittester_state unittester_defaults = {
+    .trigger_port = 0x0080,
+    .iobase_port  = 0xFFFF,
+    .fsm1         = UT_FSM1_WAIT_8,
+    .fsm2         = UT_FSM2_IDLE,
+    .status       = UT_STATUS_IDLE,
+    .cmd_id       = UT_CMD_NOOP,
+};
+
+static const device_config_t unittester_config[] = {
+    { .name           = "exit_enabled",
+     .description    = "Enable 0x04 \"Exit 86Box\" command",
+     .type           = CONFIG_BINARY,
+     .default_int    = 1,
+     .default_string = "" },
+    { .type = CONFIG_END }
+};
+
+/* Kept separate, as we will be reusing this object */
+static bitmap_t *unittester_screen_buffer = NULL;
+
+static bool unittester_exit_enabled = true;
+
+#ifdef ENABLE_UNITTESTER_LOG
+int unittester_do_log = ENABLE_UNITTESTER_LOG;
+
+static void
+unittester_log(const char *fmt, ...)
+{
+    va_list ap;
+
+    if (unittester_do_log) {
+        va_start(ap, fmt);
+        pclog_ex(fmt, ap);
+        va_end(ap);
+    }
+}
+#else
+#    define unittester_log(fmt, ...)
+#endif
+
+static uint8_t
+unittester_read_snap_rect_idx(uint64_t offs)
+{
+    /* WARNING: If the width is somehow 0 and wasn't caught earlier, you'll probably get a divide by zero crash. */
+    uint32_t idx = (offs & 0x3);
+    int64_t  x   = (offs >> 2) % unittester.read_snap_width;
+    int64_t  y   = (offs >> 2) / unittester.read_snap_width;
+    x += unittester.read_snap_xoffs;
+    y += unittester.read_snap_yoffs;
+
+    if (x < 0 || y < 0 || x >= unittester.snap_overscan_width || y >= unittester.snap_overscan_height) {
+        /* Out of range! */
+        return (idx == 3 ? 0xFF : 0x00);
+    } else {
+        /* In range */
+        return (unittester_screen_buffer->line[y][x] & 0x00FFFFFF) >> (idx * 8);
+    }
+}
+
+static void
+unittester_write(uint16_t port, uint8_t val, UNUSED(void *priv))
+{
+    if (port == unittester.iobase_port + 0x00) {
+        /* Command port */
+        /* unittester_log("[UT] W %02X Command\n", val); */
+
+        unittester.write_offs = 0;
+        unittester.write_len  = 0;
+        unittester.read_offs  = 0;
+        unittester.read_len   = 0;
+
+        switch (val) {
+            /* 0x00: No-op */
+            case UT_CMD_NOOP:
+                unittester.cmd_id = UT_CMD_NOOP;
+                unittester.status = UT_STATUS_IDLE;
+                break;
+
+            /* 0x01: Capture Screen Snapshot */
+            case UT_CMD_CAPTURE_SCREEN_SNAPSHOT:
+                unittester.cmd_id    = UT_CMD_CAPTURE_SCREEN_SNAPSHOT;
+                unittester.status    = UT_STATUS_AWAITING_WRITE;
+                unittester.write_len = 1;
+                break;
+
+            /* 0x02: Read Screen Snapshot Rectangle */
+            case UT_CMD_READ_SCREEN_SNAPSHOT_RECTANGLE:
+                unittester.cmd_id    = UT_CMD_READ_SCREEN_SNAPSHOT_RECTANGLE;
+                unittester.status    = UT_STATUS_AWAITING_WRITE;
+                unittester.write_len = 8;
+                break;
+
+            /* 0x03: Verify Screen Snapshot Rectangle */
+            case UT_CMD_VERIFY_SCREEN_SNAPSHOT_RECTANGLE:
+                unittester.cmd_id    = UT_CMD_VERIFY_SCREEN_SNAPSHOT_RECTANGLE;
+                unittester.status    = UT_STATUS_AWAITING_WRITE;
+                unittester.write_len = 8;
+                break;
+
+            /* 0x04: Exit */
+            case UT_CMD_EXIT:
+                unittester.cmd_id    = UT_CMD_EXIT;
+                unittester.status    = UT_STATUS_AWAITING_WRITE;
+                unittester.write_len = 1;
+                break;
+
+            /* Unsupported command - terminate here */
+            default:
+                unittester.cmd_id = UT_CMD_NOOP;
+                unittester.status = UT_STATUS_IDLE | UT_STATUS_UNSUPPORTED_CMD;
+                break;
+        }
+
+    } else if (port == unittester.iobase_port + 0x01) {
+        /* Data port */
+        /* unittester_log("[UT] W %02X Data\n", val); */
+
+        /* Skip if not awaiting */
+        if ((unittester.status & UT_STATUS_AWAITING_WRITE) == 0)
+            return;
+
+        switch (unittester.cmd_id) {
+            case UT_CMD_EXIT:
+                switch (unittester.write_offs) {
+                    case 0:
+                        unittester.exit_code = val;
+                        break;
+                    default:
+                        break;
+                }
+                break;
+
+            case UT_CMD_CAPTURE_SCREEN_SNAPSHOT:
+                switch (unittester.write_offs) {
+                    case 0:
+                        unittester.snap_monitor = val;
+                        break;
+                    default:
+                        break;
+                }
+                break;
+
+            case UT_CMD_READ_SCREEN_SNAPSHOT_RECTANGLE:
+            case UT_CMD_VERIFY_SCREEN_SNAPSHOT_RECTANGLE:
+                switch (unittester.write_offs) {
+                    case 0:
+                        unittester.read_snap_width = (uint16_t) val;
+                        break;
+                    case 1:
+                        unittester.read_snap_width |= ((uint16_t) val) << 8;
+                        break;
+                    case 2:
+                        unittester.read_snap_height = (uint16_t) val;
+                        break;
+                    case 3:
+                        unittester.read_snap_height |= ((uint16_t) val) << 8;
+                        break;
+                    case 4:
+                        unittester.read_snap_xoffs = (uint16_t) val;
+                        break;
+                    case 5:
+                        unittester.read_snap_xoffs |= ((uint16_t) val) << 8;
+                        break;
+                    case 6:
+                        unittester.read_snap_yoffs = (uint16_t) val;
+                        break;
+                    case 7:
+                        unittester.read_snap_yoffs |= ((uint16_t) val) << 8;
+                        break;
+                    default:
+                        break;
+                }
+                break;
+
+            /* This should not be reachable, but just in case... */
+            default:
+                break;
+        }
+
+        /* Advance write buffer */
+        unittester.write_offs += 1;
+        if (unittester.write_offs >= unittester.write_len) {
+            unittester.status &= ~UT_STATUS_AWAITING_WRITE;
+            /* Determine what we're doing here based on the command. */
+            switch (unittester.cmd_id) {
+                case UT_CMD_EXIT:
+                    unittester_log("[UT] Exit received - code = %02X\n", unittester.exit_code);
+
+                    /* CHECK: Do we actually exit? */
+                    if (unittester_exit_enabled) {
+                        /* Yes - call exit! */
+                        /* Clamp exit code */
+                        if (unittester.exit_code > 0x7F)
+                            unittester.exit_code = 0x7F;
+
+                        /* Exit somewhat quickly! */
+                        unittester_log("[UT] Exit enabled, exiting with code %02X\n", unittester.exit_code);
+                        exit(unittester.exit_code);
+
+                    } else {
+                        /* No - report successful command completion and continue program execution */
+                        unittester_log("[UT] Exit disabled, continuing execution\n");
+                    }
+                    unittester.cmd_id = UT_CMD_NOOP;
+                    unittester.status = UT_STATUS_IDLE;
+                    break;
+
+                case UT_CMD_CAPTURE_SCREEN_SNAPSHOT:
+                    /* Recompute screen */
+                    unittester.snap_img_width       = 0;
+                    unittester.snap_img_height      = 0;
+                    unittester.snap_img_xoffs       = 0;
+                    unittester.snap_img_yoffs       = 0;
+                    unittester.snap_overscan_width  = 0;
+                    unittester.snap_overscan_height = 0;
+                    if (unittester.snap_monitor < 0x01 || (unittester.snap_monitor - 1) > MONITORS_NUM) {
+                        /* No monitor here - clear snapshot */
+                        unittester.snap_monitor = 0x00;
+                    } else if (video_get_type_monitor(unittester.snap_monitor - 1) == VIDEO_FLAG_TYPE_NONE) {
+                        /* Monitor disabled - clear snapshot */
+                        unittester.snap_monitor = 0x00;
+                    } else {
+                        /* Compute bounds for snapshot */
+                        const monitor_t *m              = &monitors[unittester.snap_monitor - 1];
+                        unittester.snap_img_width       = m->mon_xsize;
+                        unittester.snap_img_height      = m->mon_ysize;
+                        unittester.snap_overscan_width  = m->mon_xsize + m->mon_overscan_x;
+                        unittester.snap_overscan_height = m->mon_ysize + m->mon_overscan_y;
+                        unittester.snap_img_xoffs       = (m->mon_overscan_x >> 1);
+                        unittester.snap_img_yoffs       = (m->mon_overscan_y >> 1);
+                        /* Take snapshot */
+                        for (size_t y = 0; y < unittester.snap_overscan_height; y++) {
+                            for (size_t x = 0; x < unittester.snap_overscan_width; x++) {
+                                unittester_screen_buffer->line[y][x] = m->target_buffer->line[y][x];
+                            }
+                        }
+                    }
+
+                    /* We have 12 bytes to read. */
+                    unittester_log("[UT] Screen snapshot - image %d x %d @ (%d, %d) in overscan %d x %d\n",
+                                   unittester.snap_img_width,
+                                   unittester.snap_img_height,
+                                   unittester.snap_img_xoffs,
+                                   unittester.snap_img_yoffs,
+                                   unittester.snap_overscan_width,
+                                   unittester.snap_overscan_height);
+                    unittester.status   = UT_STATUS_AWAITING_READ;
+                    unittester.read_len = 12;
+                    break;
+
+                case UT_CMD_READ_SCREEN_SNAPSHOT_RECTANGLE:
+                case UT_CMD_VERIFY_SCREEN_SNAPSHOT_RECTANGLE:
+                    /* Offset the X,Y offsets by the overscan offsets. */
+                    unittester.read_snap_xoffs += (int16_t) unittester.snap_img_xoffs;
+                    unittester.read_snap_yoffs += (int16_t) unittester.snap_img_yoffs;
+                    /* NOTE: Width * Height * 4 can potentially exceed a 32-bit number.
+                       So, we use 64-bit numbers instead.
+                       In practice, this will only happen if someone decides to request e.g. a 65535 x 65535 image,
+                       of which most of the pixels will be out of range anyway.
+                      */
+                    unittester.read_len      = ((uint64_t) unittester.read_snap_width) * ((uint64_t) unittester.read_snap_height) * 4;
+                    unittester.read_snap_crc = 0xFFFFFFFF;
+
+                    unittester_log("[UT] Screen rectangle analysis - %d x %d @ (%d, %d)\n",
+                                   unittester.read_snap_width,
+                                   unittester.read_snap_height,
+                                   unittester.read_snap_xoffs - (int16_t) unittester.snap_img_xoffs,
+                                   unittester.read_snap_yoffs - (int16_t) unittester.snap_img_yoffs);
+
+                    if (unittester.cmd_id == UT_CMD_VERIFY_SCREEN_SNAPSHOT_RECTANGLE) {
+                        /* Read everything and compute CRC */
+                        uint32_t crc = 0xFFFFFFFF;
+                        for (uint64_t i = 0; i < unittester.read_len; i++) {
+                            crc ^= 0xFF & (uint32_t) unittester_read_snap_rect_idx(i);
+                            /* Use some bit twiddling until we have a table-based fast CRC-32 implementation */
+                            for (uint32_t j = 0; j < 8; j++) {
+                                crc = (crc >> 1) ^ ((-(crc & 0x1)) & 0xEDB88320);
+                            }
+                        }
+                        unittester.read_snap_crc = crc ^ 0xFFFFFFFF;
+
+                        unittester_log("[UT] Screen rectangle analysis CRC = %08X\n",
+                                       unittester.read_snap_crc);
+
+                        /* Set actual read length for CRC result */
+                        unittester.read_len = 4;
+                        unittester.status   = UT_STATUS_AWAITING_READ;
+
+                    } else {
+                        /* Do we have anything to read? */
+                        if (unittester.read_len >= 1) {
+                            /* Yes - start reads! */
+                            unittester.status = UT_STATUS_AWAITING_READ;
+                        } else {
+                            /* No - stop here. */
+                            unittester.cmd_id = UT_CMD_NOOP;
+                            unittester.status = UT_STATUS_IDLE;
+                        }
+                    }
+                    break;
+
+                default:
+                    /* Nothing to write? Stop here. */
+                    unittester.cmd_id = UT_CMD_NOOP;
+                    unittester.status = UT_STATUS_IDLE;
+                    break;
+            }
+        }
+
+    } else {
+        /* Not handled here - possibly open bus! */
+    }
+}
+
+static uint8_t
+unittester_read(uint16_t port, UNUSED(void *priv))
+{
+    uint8_t outval = 0xFF;
+
+    if (port == unittester.iobase_port + 0x00) {
+        /* Status port */
+        /* unittester_log("[UT] R -- Status = %02X\n", unittester.status); */
+        return unittester.status;
+    } else if (port == unittester.iobase_port + 0x01) {
+        /* Data port */
+        /* unittester_log("[UT] R -- Data\n"); */
+
+        /* Skip if not awaiting */
+        if ((unittester.status & UT_STATUS_AWAITING_READ) == 0)
+            return 0xFF;
+
+        switch (unittester.cmd_id) {
+            case UT_CMD_CAPTURE_SCREEN_SNAPSHOT:
+                switch (unittester.read_offs) {
+                    case 0:
+                        outval = (uint8_t) (unittester.snap_img_width);
+                        break;
+                    case 1:
+                        outval = (uint8_t) (unittester.snap_img_width >> 8);
+                        break;
+                    case 2:
+                        outval = (uint8_t) (unittester.snap_img_height);
+                        break;
+                    case 3:
+                        outval = (uint8_t) (unittester.snap_img_height >> 8);
+                        break;
+                    case 4:
+                        outval = (uint8_t) (unittester.snap_overscan_width);
+                        break;
+                    case 5:
+                        outval = (uint8_t) (unittester.snap_overscan_width >> 8);
+                        break;
+                    case 6:
+                        outval = (uint8_t) (unittester.snap_overscan_height);
+                        break;
+                    case 7:
+                        outval = (uint8_t) (unittester.snap_overscan_height >> 8);
+                        break;
+                    case 8:
+                        outval = (uint8_t) (unittester.snap_img_xoffs);
+                        break;
+                    case 9:
+                        outval = (uint8_t) (unittester.snap_img_xoffs >> 8);
+                        break;
+                    case 10:
+                        outval = (uint8_t) (unittester.snap_img_yoffs);
+                        break;
+                    case 11:
+                        outval = (uint8_t) (unittester.snap_img_yoffs >> 8);
+                        break;
+                    default:
+                        break;
+                }
+                break;
+
+            case UT_CMD_READ_SCREEN_SNAPSHOT_RECTANGLE:
+                outval = unittester_read_snap_rect_idx(unittester.read_offs);
+                break;
+
+            case UT_CMD_VERIFY_SCREEN_SNAPSHOT_RECTANGLE:
+                outval = (uint8_t) (unittester.read_snap_crc >> (8 * unittester.read_offs));
+                break;
+
+            /* This should not be reachable, but just in case... */
+            default:
+                break;
+        }
+
+        /* Advance read buffer */
+        unittester.read_offs += 1;
+        if (unittester.read_offs >= unittester.read_len) {
+            /* Once fully read, we stop here. */
+            unittester.cmd_id = UT_CMD_NOOP;
+            unittester.status = UT_STATUS_IDLE;
+        }
+
+        return outval;
+    } else {
+        /* Not handled here - possibly open bus! */
+        return 0xFF;
+    }
+}
+
+static void
+unittester_trigger_write(UNUSED(uint16_t port), uint8_t val, UNUSED(void *priv))
+{
+    /* This one gets quite spammy. */
+    /* unittester_log("[UT] Trigger value %02X -> FSM1 = %02X, FSM2 = %02X, IOBASE = %04X\n", val, unittester.fsm1, unittester.fsm2, unittester.iobase_port); */
+
+    /* Update FSM2 */
+    switch (unittester.fsm2) {
+        /* IDLE: Do nothing - FSM1 will put us in the right state. */
+        case UT_FSM2_IDLE:
+            unittester.fsm2 = UT_FSM2_IDLE;
+            break;
+
+        /* WAIT IOBASE 0: Set low byte of temporary IOBASE. */
+        case UT_FSM2_WAIT_IOBASE_0:
+            unittester.fsm2_new_iobase = ((uint16_t) val);
+            unittester.fsm2            = UT_FSM2_WAIT_IOBASE_1;
+            break;
+
+        /* WAIT IOBASE 0: Set high byte of temporary IOBASE and commit to the real IOBASE. */
+        case UT_FSM2_WAIT_IOBASE_1:
+            unittester.fsm2_new_iobase |= ((uint16_t) val) << 8;
+
+            unittester_log("[UT] Remapping IOBASE: %04X -> %04X\n", unittester.iobase_port, unittester.fsm2_new_iobase);
+
+            /* Unmap old IOBASE */
+            if (unittester.iobase_port != 0xFFFF)
+                io_removehandler(unittester.iobase_port, 2, unittester_read, NULL, NULL, unittester_write, NULL, NULL, NULL);
+            unittester.iobase_port = 0xFFFF;
+
+            /* Map new IOBASE */
+            unittester.iobase_port = unittester.fsm2_new_iobase;
+            if (unittester.iobase_port != 0xFFFF)
+                io_sethandler(unittester.iobase_port, 2, unittester_read, NULL, NULL, unittester_write, NULL, NULL, NULL);
+
+            /* Reset FSM2 to IDLE */
+            unittester.fsm2 = UT_FSM2_IDLE;
+            break;
+    }
+
+    /* Update FSM1 */
+    switch (val) {
+        case '8':
+            unittester.fsm1 = UT_FSM1_WAIT_6;
+            break;
+        case '6':
+            if (unittester.fsm1 == UT_FSM1_WAIT_6)
+                unittester.fsm1 = UT_FSM1_WAIT_B;
+            else
+                unittester.fsm1 = UT_FSM1_WAIT_8;
+            break;
+        case 'B':
+            if (unittester.fsm1 == UT_FSM1_WAIT_B)
+                unittester.fsm1 = UT_FSM1_WAIT_o;
+            else
+                unittester.fsm1 = UT_FSM1_WAIT_8;
+            break;
+        case 'o':
+            if (unittester.fsm1 == UT_FSM1_WAIT_o)
+                unittester.fsm1 = UT_FSM1_WAIT_x;
+            else
+                unittester.fsm1 = UT_FSM1_WAIT_8;
+            break;
+        case 'x':
+            if (unittester.fsm1 == UT_FSM1_WAIT_x) {
+                unittester_log("[UT] Config activated, awaiting new IOBASE\n");
+                unittester.fsm2 = UT_FSM2_WAIT_IOBASE_0;
+            }
+            unittester.fsm1 = UT_FSM1_WAIT_8;
+            break;
+
+        default:
+            unittester.fsm1 = UT_FSM1_WAIT_8;
+            break;
+    }
+}
+
+static void *
+unittester_init(UNUSED(const device_t *info))
+{
+    unittester = (struct unittester_state) unittester_defaults;
+
+    unittester_exit_enabled = !!device_get_config_int("exit_enabled");
+
+    if (unittester_screen_buffer == NULL)
+        unittester_screen_buffer = create_bitmap(2048, 2048);
+
+    io_sethandler(unittester.trigger_port, 1, NULL, NULL, NULL, unittester_trigger_write, NULL, NULL, NULL);
+
+    unittester_log("[UT] 86Box Unit Tester initialised\n");
+
+    return &unittester; /* Dummy non-NULL value */
+}
+
+static void
+unittester_close(UNUSED(void *priv))
+{
+    io_removehandler(unittester.trigger_port, 1, NULL, NULL, NULL, unittester_trigger_write, NULL, NULL, NULL);
+
+    if (unittester.iobase_port != 0xFFFF)
+        io_removehandler(unittester.iobase_port, 2, unittester_read, NULL, NULL, unittester_write, NULL, NULL, NULL);
+    unittester.iobase_port = 0xFFFF;
+
+    if (unittester_screen_buffer != NULL) {
+        destroy_bitmap(unittester_screen_buffer);
+        unittester_screen_buffer = NULL;
+    }
+
+    unittester_log("[UT] 86Box Unit Tester closed\n");
+}
+
+const device_t unittester_device = {
+    .name          = "86Box Unit Tester",
+    .internal_name = "unittester",
+    .flags         = DEVICE_ISA,
+    .local         = 0,
+    .init          = unittester_init,
+    .close         = unittester_close,
+    .reset         = NULL,
+    { .available = NULL },
+    .speed_changed = NULL,
+    .force_redraw  = NULL,
+    .config        = unittester_config,
+};

src/disk/CMakeLists.txt

@@ -15,7 +15,8 @@
 
 add_library(hdd OBJECT hdd.c hdd_image.c hdd_table.c hdc.c hdc_st506_xt.c
     hdc_st506_at.c hdc_xta.c hdc_esdi_at.c hdc_esdi_mca.c hdc_xtide.c
-    hdc_ide.c hdc_ide_opti611.c hdc_ide_cmd640.c hdc_ide_cmd646.c hdc_ide_sff8038i.c)
+    hdc_ide.c hdc_ide_ali5213.c hdc_ide_opti611.c hdc_ide_cmd640.c hdc_ide_cmd646.c
+    hdc_ide_sff8038i.c)
 
 add_library(zip OBJECT zip.c)
 

src/disk/hdc.c

@@ -100,12 +100,10 @@ static const struct {
     { &ide_isa_device              },
     { &ide_isa_2ch_device          },
     { &xtide_at_device             },
-    { &xtide_at_386_device         },
     { &xtide_at_ps2_device         },
     { &xta_wdxt150_device          },
     { &xtide_acculogic_device      },
     { &xtide_device                },
-    { &xtide_plus_device           },
     { &esdi_ps2_device             },
     { &ide_pci_device              },
     { &ide_pci_2ch_device          },

src/disk/hdc_ide.c

@@ -734,19 +734,25 @@ ide_get_sector(ide_t *ide)
 static void
 ide_next_sector(ide_t *ide)
 {
+    uint32_t sector = ide->tf->sector;
+    uint32_t head   = ide->tf->head;
+
     if (ide->tf->lba)
         ide->lba_addr++;
     else {
-        ide->tf->sector++;
-        if ((ide->tf->sector == 0) || (ide->tf->sector == (ide->cfg_spt + 1))) {
-            ide->tf->sector = 1;
-            ide->tf->head++;
-            if ((ide->tf->head == 0) || (ide->head == ide->cfg_hpc)) {
-                ide->tf->head = 0;
+        sector++;
+        if ((sector == 0) || (sector == (ide->cfg_spt + 1))) {
+            sector = 1;
+            head++;
+            if (head == ide->cfg_hpc) {
+                head = 0;
                 ide->tf->cylinder++;
             }
         }
     }
+
+    ide->tf->sector = sector & 0xff;
+    ide->tf->head   = head & 0x0f;
 }
 
 static void
@@ -1389,8 +1395,15 @@ ide_write_devctl(UNUSED(uint16_t addr), uint8_t val, void *priv)
         } else {
             /* Currently active device is 1, simply reset the status and the active device. */
             dev_reset(ide);
-            ide->tf->atastat = DRDY_STAT | DSC_STAT;
+            if (ide->type == IDE_ATAPI) {
+                /* Non-early ATAPI devices have DRDY clear after SRST. */
+                ide->tf->atastat = 0;
+                if (IDE_ATAPI_IS_EARLY)
+                    ide->tf->atastat |= DRDY_STAT;
+            } else
+                ide->tf->atastat = DRDY_STAT | DSC_STAT;
             ide->tf->error   = 1;
+            ide_other->tf->error   = 1;    /* Assert PDIAG-. */
             dev->cur_dev &= ~1;
             ch = dev->cur_dev;
 
@@ -1771,7 +1784,7 @@ ide_writeb(uint16_t addr, uint8_t val, void *priv)
                 ide->tf->error   = ABRT_ERR;
                 ide_irq_raise(ide);
             }
-            return;
+            break;
 
         default:
             break;
@@ -1788,7 +1801,7 @@ ide_read_data(ide_t *ide, int length)
     double xfer_us;
 
 #if defined(ENABLE_IDE_LOG) && (ENABLE_IDE_LOG == 2)
-    ide_log("ide_read_data(): ch = %i, board = %i, type = %i\n", ch,
+    ide_log("ide_read_data(): ch = %i, board = %i, type = %i\n", ide->channel,
             ide->board, ide->type);
 #endif
 
@@ -1868,7 +1881,8 @@ ide_status(ide_t *ide, ide_t *ide_other, int ch)
         /* On real hardware, a slave with a present master always
            returns a status of 0x00.
            Confirmed by the ATA-3 and ATA-4 specifications. */
-        ret = 0x00;
+        // ret = 0x00;
+        ret = 0x01;
     } else {
         ret = ide->tf->atastat;
         if (ide->type == IDE_ATAPI)
@@ -1948,8 +1962,8 @@ ide_readb(uint16_t addr, void *priv)
             else
                 ret = ide->tf->cylinder >> 8;
 #if defined(ENABLE_IDE_LOG) && (ENABLE_IDE_LOG == 2)
-            pclog("Cylinder high @ board %i, channel %i: ide->type = %i, "
-                  "ret = %02X\n", ide->board, ide->channel, ide->type, ret);
+            ide_log("Cylinder high @ board %i, channel %i: ide->type = %i, "
+                    "ret = %02X\n", ide->board, ide->channel, ide->type, ret);
 #endif
             break;
 
@@ -2070,7 +2084,11 @@ ide_board_callback(void *priv)
 
     ide_log("ide_board_callback(%i)\n", dev->cur_dev >> 1);
 
-    for (uint8_t i = 0; i < 2; i++) {
+    dev->cur_dev &= ~1;
+
+    /* Reset the devices in reverse so if there's a slave without a master,
+       its copy of the master's task file gets reset first. */
+    for (int8_t i = 1; i >= 0; i--) {
         ide = dev->ide[i];
         if (ide->type == IDE_ATAPI) {
             ide->tf->atastat = 0;
@@ -2078,9 +2096,9 @@ ide_board_callback(void *priv)
                 ide->tf->atastat |= DRDY_STAT | DSC_STAT;
         } else
             ide->tf->atastat = DRDY_STAT | DSC_STAT;
-    }
 
-    dev->cur_dev &= ~1;
+        ide->reset = 0;
+    }
 
     ide = dev->ide[0];
     if (dev->diag) {
@@ -2287,6 +2305,9 @@ ide_callback(void *priv)
 
         case WIN_WRITE:
         case WIN_WRITE_NORETRY:
+#ifdef ENABLE_IDE_LOG
+            off64_t sector = ide_get_sector(ide);
+#endif
             if (ide->type == IDE_ATAPI)
                 err = ABRT_ERR;
             else if (!ide->tf->lba && (ide->cfg_spt == 0))
@@ -2305,6 +2326,7 @@ ide_callback(void *priv)
                     ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus, 0);
                 }
             }
+            ide_log("Write: %02X, %i, %08X, %" PRIi64 "\n", err, ide->hdd_num, ide->lba_addr, sector);
             break;
 
         case WIN_WRITE_DMA:
@@ -2446,6 +2468,7 @@ ide_callback(void *priv)
             else {
                 ide->blocksize     = ide->tf->secount;
                 ide->tf->atastat   = DRDY_STAT | DSC_STAT;
+
                 ide_irq_raise(ide);
             }
             break;
@@ -2961,6 +2984,22 @@ ide_board_reset(int board)
         ide_drive_reset(d);
 }
 
+void
+ide_drives_set_shadow(void)
+{
+    for (uint8_t d = 0; d < IDE_NUM; d++) {
+        if (ide_drives[d] == NULL)
+            continue;
+
+        if ((d & 1) && (ide_drives[d]->type == IDE_NONE) && (ide_drives[d ^ 1]->type != IDE_NONE)) {
+            ide_drives[d]->type = ide_drives[d ^ 1]->type | IDE_SHADOW;
+            if (ide_drives[d]->tf != NULL)
+                free(ide_drives[d]->tf);
+            ide_drives[d]->tf = ide_drives[d ^ 1]->tf;
+        }
+    }
+}
+
 /* Reset a standalone IDE unit. */
 static void
 ide_reset(UNUSED(void *priv))

src/disk/hdc_ide_ali5213.c

@@ -0,0 +1,267 @@
+/*
+ * 86Box    A hypervisor and IBM PC system emulator that specializes in
+ *          running old operating systems and software designed for IBM
+ *          PC systems and compatibles from 1981 through fairly recent
+ *          system designs based on the PCI bus.
+ *
+ *          This file is part of the 86Box distribution.
+ *
+ *          Implementation of the ALi M1489 chipset.
+ *
+ *
+ *
+ * Authors: Tiseno100,
+ *          Miran Grca, <mgrca8@gmail.com>
+ *
+ *          Copyright 2020-2021 Tiseno100.
+ *          Copyright 2020-2021 Miran Grca.
+ */
+#include <stdarg.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <wchar.h>
+#define HAVE_STDARG_H
+#include <86box/86box.h>
+#include "cpu.h"
+#include <86box/timer.h>
+#include <86box/io.h>
+#include <86box/device.h>
+
+#include <86box/hdc_ide.h>
+#include <86box/hdc.h>
+#include <86box/mem.h>
+#include <86box/nmi.h>
+#include <86box/pic.h>
+#include <86box/pci.h>
+#include <86box/plat_unused.h>
+#include <86box/port_92.h>
+#include <86box/smram.h>
+
+#include <86box/chipset.h>
+
+#ifdef ENABLE_ALI5213_LOG
+int ali5213_do_log = ENABLE_ALI5213_LOG;
+
+static void
+ali5213_log(const char *fmt, ...)
+{
+    va_list ap;
+
+    if (ali5213_do_log) {
+        va_start(ap, fmt);
+        pclog_ex(fmt, ap);
+        va_end(ap);
+    }
+}
+#else
+#    define ali5213_log(fmt, ...)
+#endif
+
+typedef struct ali5213_t {
+    uint8_t index;
+    uint8_t chip_id;
+
+    uint8_t regs[256];
+} ali5213_t;
+
+static void
+ali5213_ide_handler(ali5213_t *dev)
+{
+    ide_pri_disable();
+    ide_sec_disable();
+    if (dev->regs[0x01] & 0x01) {
+        ide_pri_enable();
+        if (!(dev->regs[0x35] & 0x40))
+            ide_sec_enable();
+    }
+}
+
+static void
+ali5213_write(uint16_t addr, uint8_t val, void *priv)
+{
+    ali5213_t *dev = (ali5213_t *) priv;
+
+    ali5213_log("[%04X:%08X] [W] %02X = %02X (%i)\n", CS, cpu_state.pc, port, val, dev->tries);
+
+    switch (addr) {
+        case 0xf4: /* Usually it writes 30h here */
+            dev->chip_id = val;
+            break;
+
+        case 0xf8:
+            dev->index = val;
+            break;
+
+        case 0xfc:
+            if (dev->chip_id != 0x30)
+                break;
+
+            switch (dev->index) {
+                case 0x01: /* IDE Configuration Register */
+                    dev->regs[dev->index] = val & 0x8f;
+                    ali5213_ide_handler(dev);
+                    break;
+                case 0x02: /* DBA Data Byte Cative Count for IDE-1 */
+                case 0x03: /* D0RA Disk 0 Read Active Count for IDE-1 */
+                case 0x04: /* D0WA Disk 0 Write Active Count for IDE-1 */
+                case 0x05: /* D1RA Disk 1 Read Active Count for IDE-1 */
+                case 0x06: /* D1WA Disk 1 Write Active Count for IDE-1 */
+                case 0x25: /* DBR Data Byte Recovery Count for IDE-1 */
+                case 0x26: /* D0RR Disk 0 Read Byte Recovery Count for IDE-1 */
+                case 0x27: /* D0WR Disk 0 Write Byte Recovery Count for IDE-1 */
+                case 0x28: /* D1RR Disk 1 Read Byte Recovery Count for IDE-1 */
+                case 0x29: /* D1WR Disk 1 Write Byte Recovery Count for IDE-1 */
+                case 0x2a: /* DBA Data Byte Cative Count for IDE-2 */
+                case 0x2b: /* D0RA Disk 0 Read Active Count for IDE-2 */
+                case 0x2c: /* D0WA Disk 0 Write Active Count for IDE-2 */
+                case 0x2d: /* D1RA Disk 1 Read Active Count for IDE-2 */
+                case 0x2e: /* D1WA Disk 1 Write Active Count for IDE-2 */
+                case 0x2f: /* DBR Data Byte Recovery Count for IDE-2 */
+                case 0x30: /* D0RR Disk 0 Read Byte Recovery Count for IDE-2 */
+                case 0x31: /* D0WR Disk 0 Write Byte Recovery Count for IDE-2 */
+                case 0x32: /* D1RR Disk 1 Read Byte Recovery Count for IDE-2 */
+                case 0x33: /* D1WR Disk 1 Write Byte Recovery Count for IDE-2 */
+                    dev->regs[dev->index] = val & 0x1f;
+                    break;
+                case 0x07: /* Buffer Mode Register 1 */
+                    dev->regs[dev->index] = val;
+                    break;
+                case 0x09: /* IDEPE1 IDE Port Enable Register 1 */
+                    dev->regs[dev->index] = val & 0xc3;
+                    break;
+                case 0x0a: /* Buffer Mode Register 2 */
+                    dev->regs[dev->index] = val & 0x4f;
+                    break;
+                case 0x0b: /* IDE Channel 1 Disk 0 Sector Byte Count Register 1 */
+                case 0x0d: /* IDE Channel 1 Disk 1 Sector Byte Count Register 1 */
+                case 0x0f: /* IDE Channel 2 Disk 0 Sector Byte Count Register 1 */
+                case 0x11: /* IDE Channel 2 Disk 1 Sector Byte Count Register 1 */
+                    dev->regs[dev->index] = val & 0x03;
+                    break;
+                case 0x0c: /* IDE Channel 1 Disk 0 Sector Byte Count Register 2 */
+                case 0x0e: /* IDE Channel 1 Disk 1 Sector Byte Count Register 2 */
+                case 0x10: /* IDE Channel 2 Disk 1 Sector Byte Count Register 2 */
+                case 0x12: /* IDE Channel 2 Disk 1 Sector Byte Count Register 2 */
+                    dev->regs[dev->index] = val & 0x1f;
+                    break;
+                case 0x35: /* IDEPE3 IDE Port Enable Register 3 */
+                    dev->regs[dev->index] = val;
+                    ali5213_ide_handler(dev);
+                    break;
+
+                default:
+                    break;
+            }
+            break;
+
+        default:
+            break;
+    }
+}
+
+static uint8_t
+ali5213_read(uint16_t addr, void *priv)
+{
+    const ali5213_t *dev = (ali5213_t *) priv;
+    uint8_t          ret = 0xff;
+
+    switch (addr) {
+        case 0xf4:
+            ret = dev->chip_id;
+            break;
+        case 0xfc:
+            ret = dev->regs[dev->index];
+            break;
+
+        default:
+            break;
+    }
+
+    ali5213_log("[%04X:%08X] [R] %02X = %02X\n", CS, cpu_state.pc, port, ret);
+
+    return ret;
+}
+
+static void
+ali5213_reset(void *priv)
+{
+    ali5213_t *dev = (ali5213_t *) priv;
+
+    memset(dev->regs, 0x00, 256);
+
+    ide_pri_disable();
+    ide_sec_disable();
+
+    /* IDE registers */
+    dev->regs[0x00] = 0x57;
+    dev->regs[0x01] = 0x02;
+    dev->regs[0x08] = 0xff;
+    dev->regs[0x09] = 0x41;
+    dev->regs[0x0c] = 0x02;
+    dev->regs[0x0e] = 0x02;
+    dev->regs[0x10] = 0x02;
+    dev->regs[0x12] = 0x02;
+    dev->regs[0x34] = 0xff;
+    dev->regs[0x35] = 0x01;
+
+    ali5213_ide_handler(dev);
+}
+
+static void
+ali5213_close(void *priv)
+{
+    ali5213_t *dev = (ali5213_t *) priv;
+
+    free(dev);
+}
+
+static void *
+ali5213_init(UNUSED(const device_t *info))
+{
+    ali5213_t *dev = (ali5213_t *) calloc(1, sizeof(ali5213_t));
+
+    /* M5213/M1489 IDE controller
+       F4h Chip ID we write always 30h onto it
+       F8h Index Port
+       FCh Data Port
+    */
+    io_sethandler(0x0f4, 0x0001, ali5213_read, NULL, NULL, ali5213_write, NULL, NULL, dev);
+    io_sethandler(0x0f8, 0x0001, ali5213_read, NULL, NULL, ali5213_write, NULL, NULL, dev);
+    io_sethandler(0x0fc, 0x0001, ali5213_read, NULL, NULL, ali5213_write, NULL, NULL, dev);
+
+    device_add(info->local ? &ide_pci_2ch_device : &ide_vlb_2ch_device);
+
+    ali5213_reset(dev);
+
+    return dev;
+}
+
+const device_t ide_ali1489_device = {
+    .name          = "ALi M1489 IDE",
+    .internal_name = "ali1489_ide",
+    .flags         = 0,
+    .local         = 1,
+    .init          = ali5213_init,
+    .close         = ali5213_close,
+    .reset         = ali5213_reset,
+    { .available = NULL },
+    .speed_changed = NULL,
+    .force_redraw  = NULL,
+    .config        = NULL
+};
+
+const device_t ide_ali5213_device = {
+    .name          = "ALi M5213",
+    .internal_name = "ali5213",
+    .flags         = 0,
+    .local         = 0,
+    .init          = ali5213_init,
+    .close         = ali5213_close,
+    .reset         = ali5213_reset,
+    { .available = NULL },
+    .speed_changed = NULL,
+    .force_redraw  = NULL,
+    .config        = NULL
+};

src/disk/hdc_st506_xt.c

@@ -107,7 +107,7 @@
 #define ST11_BIOS_FILE_OLD               "roms/hdd/st506/st11_bios_vers_1.7.bin"
 #define ST11_BIOS_FILE_NEW               "roms/hdd/st506/st11_bios_vers_2.0.bin"
 #define WD1002A_WX1_BIOS_FILE            "roms/hdd/st506/wd1002a_wx1-62-000094-032.bin"
-#define WD1004A_WX1_BIOS_FILE            "roms/hdd/st506/wd1002a_wx1-62-000094-032.bin"
+#define WD1004A_WX1_BIOS_FILE            "roms/hdd/st506/western_digital_WD1004A-27X.bin"
 /* SuperBIOS was for both the WX1 and 27X, users jumpers readout to determine
    if to use 26 sectors per track, 26 -> 17 sectors per track translation, or
    17 sectors per track. */
@@ -1533,6 +1533,7 @@ static void
 set_switches(hdc_t *dev, hd_type_t *hdt, int num)
 {
     const drive_t *drive;
+    int            c;
     int            e;
 
     dev->switches = 0x00;
@@ -1546,7 +1547,7 @@ set_switches(hdc_t *dev, hd_type_t *hdt, int num)
             continue;
         }
 
-        for (int c = 0; c < num; c++) {
+        for (c = 0; c < num; c++) {
             /* Does the Xebec also support more than 4 types? */
             if ((drive->spt == hdt[c].spt) && (drive->hpc == hdt[c].hpc) && (drive->tracks == hdt[c].tracks)) {
                 /* Olivetti M24/M240: Move the upper 2 bites up by 2 bits, as the
@@ -1666,7 +1667,7 @@ st506_init(const device_t *info)
             fn          = WD1004A_WX1_BIOS_FILE;
             /* The switches are read in reverse: 0 = closed, 1 = open.
                Both open means MFM, 17 sectors per track. */
-            dev->switches = 0x10; /* autobios */
+            dev->switches = 0x30; /* autobios */
             dev->base     = device_get_config_hex16("base");
             dev->irq      = device_get_config_int("irq");
             if (dev->irq == 2)

src/disk/hdc_xtide.c

@@ -49,9 +49,9 @@
 #define ROM_PATH_XT     "roms/hdd/xtide/ide_xt.bin"
 #define ROM_PATH_XTP    "roms/hdd/xtide/ide_xtp.bin"
 #define ROM_PATH_AT     "roms/hdd/xtide/ide_at.bin"
+#define ROM_PATH_AT_386 "roms/hdd/xtide/ide_386.bin"
 #define ROM_PATH_PS2    "roms/hdd/xtide/SIDE1V12.BIN"
 #define ROM_PATH_PS2AT  "roms/hdd/xtide/ide_at_1_1_5.bin"
-#define ROM_PATH_AT_386 "roms/hdd/xtide/ide_386.bin"
 
 typedef struct xtide_t {
     void   *ide_board;
@@ -136,13 +136,9 @@ xtide_init(const device_t *info)
 
     memset(xtide, 0x00, sizeof(xtide_t));
 
-    if (info->local == 1) {
-        rom_init(&xtide->bios_rom, ROM_PATH_XTP,
+        rom_init(&xtide->bios_rom,
+                 device_get_bios_file(info, device_get_config_bios("bios"), 0),
                  0xc8000, 0x2000, 0x1fff, 0, MEM_MAPPING_EXTERNAL);
-    } else {
-        rom_init(&xtide->bios_rom, ROM_PATH_XT,
-                 0xc8000, 0x2000, 0x1fff, 0, MEM_MAPPING_EXTERNAL);
-    }
 
     xtide->ide_board = ide_xtide_init();
 
@@ -153,18 +149,6 @@ xtide_init(const device_t *info)
     return xtide;
 }
 
-static int
-xtide_available(void)
-{
-    return (rom_present(ROM_PATH_XT));
-}
-
-static int
-xtide_plus_available(void)
-{
-    return (rom_present(ROM_PATH_XTP));
-}
-
 static void *
 xtide_at_init(const device_t *info)
 {
@@ -172,31 +156,15 @@ xtide_at_init(const device_t *info)
 
     memset(xtide, 0x00, sizeof(xtide_t));
 
-    if (info->local == 1) {
-        rom_init(&xtide->bios_rom, ROM_PATH_AT_386,
+        rom_init(&xtide->bios_rom,
+                 device_get_bios_file(info, device_get_config_bios("bios"), 0),
                  0xc8000, 0x2000, 0x1fff, 0, MEM_MAPPING_EXTERNAL);
-    } else {
-        rom_init(&xtide->bios_rom, ROM_PATH_AT,
-                 0xc8000, 0x2000, 0x1fff, 0, MEM_MAPPING_EXTERNAL);
-    }
 
     device_add(&ide_isa_2ch_device);
 
     return xtide;
 }
 
-static int
-xtide_at_available(void)
-{
-    return (rom_present(ROM_PATH_AT));
-}
-
-static int
-xtide_at_386_available(void)
-{
-    return (rom_present(ROM_PATH_AT_386));
-}
-
 static void *
 xtide_acculogic_init(UNUSED(const device_t *info))
 {
@@ -261,6 +229,50 @@ xtide_at_close(void *priv)
     free(xtide);
 }
 
+static const device_config_t xtide_config[] = {
+    // clang-format off
+    {
+        .name = "bios",
+        .description = "BIOS",
+        .type = CONFIG_BIOS,
+        .default_string = "xt",
+        .default_int = 0,
+        .file_filter = "",
+        .spinner = { 0 }, /*W1*/
+        .bios = {
+            { .name = "Regular XT", .internal_name = "xt", .bios_type = BIOS_NORMAL,
+              .files_no = 1, .local = 0, .size = 8192, .files = { ROM_PATH_XT, "" } },
+            { .name = "XT+ (V20/V30/8018x)", .internal_name = "xt_plus", .bios_type = BIOS_NORMAL,
+              .files_no = 1, .local = 0, .size = 8192, .files = { ROM_PATH_XTP, "" } },
+            { .files_no = 0 }
+        },
+    },
+    { .name = "", .description = "", .type = CONFIG_END }
+    // clang-format on
+};
+
+static const device_config_t xtide_at_config[] = {
+    // clang-format off
+    {
+        .name = "bios",
+        .description = "BIOS",
+        .type = CONFIG_BIOS,
+        .default_string = "at",
+        .default_int = 0,
+        .file_filter = "",
+        .spinner = { 0 }, /*W1*/
+        .bios = {
+            { .name = "Regular AT", .internal_name = "at", .bios_type = BIOS_NORMAL,
+              .files_no = 1, .local = 0, .size = 8192, .files = { ROM_PATH_AT, "" } },
+            { .name = "386", .internal_name = "at_386", .bios_type = BIOS_NORMAL,
+              .files_no = 1, .local = 0, .size = 8192, .files = { ROM_PATH_AT_386, "" } },
+            { .files_no = 0 }
+        },
+    },
+    { .name = "", .description = "", .type = CONFIG_END }
+    // clang-format on
+};
+
 const device_t xtide_device = {
     .name          = "PC/XT XTIDE",
     .internal_name = "xtide",
@@ -269,24 +281,10 @@ const device_t xtide_device = {
     .init          = xtide_init,
     .close         = xtide_close,
     .reset         = NULL,
-    { .available = xtide_available },
+    { .available = NULL },
     .speed_changed = NULL,
     .force_redraw  = NULL,
-    .config        = NULL
-};
-
-const device_t xtide_plus_device = {
-    .name          = "PC/XT XTIDE (V20/V30/8018x)",
-    .internal_name = "xtide_plus",
-    .flags         = DEVICE_ISA,
-    .local         = 1,
-    .init          = xtide_init,
-    .close         = xtide_close,
-    .reset         = NULL,
-    { .available = xtide_plus_available },
-    .speed_changed = NULL,
-    .force_redraw  = NULL,
-    .config        = NULL
+    .config        = xtide_config
 };
 
 const device_t xtide_at_device = {
@@ -297,24 +295,10 @@ const device_t xtide_at_device = {
     .init          = xtide_at_init,
     .close         = xtide_at_close,
     .reset         = NULL,
-    { .available = xtide_at_available },
+    { .available = NULL },
     .speed_changed = NULL,
     .force_redraw  = NULL,
-    .config        = NULL
-};
-
-const device_t xtide_at_386_device = {
-    .name          = "PC/AT XTIDE (386)",
-    .internal_name = "xtide_at_386",
-    .flags         = DEVICE_ISA | DEVICE_AT,
-    .local         = 1,
-    .init          = xtide_at_init,
-    .close         = xtide_at_close,
-    .reset         = NULL,
-    { .available = xtide_at_386_available },
-    .speed_changed = NULL,
-    .force_redraw  = NULL,
-    .config        = NULL
+    .config        = xtide_at_config
 };
 
 const device_t xtide_acculogic_device = {

src/disk/zip.c

@@ -531,7 +531,7 @@ zip_load(zip_t *dev, char *fn)
     if (fseek(dev->drv->fp, dev->drv->base, SEEK_SET) == -1)
         fatal("zip_load(): Error seeking to the beginning of the file\n");
 
-    strncpy(dev->drv->image_path, fn, sizeof(dev->drv->image_path) - 1);
+    strncpy(dev->drv->image_path, fn, strlen(dev->drv->image_path) + 1);
 
     return 1;
 }

src/dma.c

@@ -949,16 +949,47 @@ dma_page_read(uint16_t addr, UNUSED(void *priv))
     uint8_t convert[8] = CHANNELS;
     uint8_t ret        = 0xff;
 
-    addr &= 0x0f;
-    ret = dmaregs[2][addr];
+    if (((addr & 0xfffc) == 0x80) && (CS == 0xf000) &&
+        ((cpu_state.pc & 0xfffffff8) == 0x00007278) &&
+        !strcmp(machine_get_internal_name(), "megapc"))  switch (addr) {
+        /* The Amstrad MegaPC Quadtel BIOS times a sequence of:
+               mov ax,di
+               div bx
+           And expects this value to be at least 0x06e0 for 20 MHz,
+           and at least 0x0898 for 25 MHz, everything below 0x06e0
+           is assumed to be 16 MHz. Given that for some reason, this
+           does not occur on 86Box, we have to work around it here,
+           we return 0x0580 for 16 MHz, because it logically follows
+           in the sequence (0x06e0 = 0x0898 * (20 / 25), and
+           0x0580 = 0x06e0 * (16 / 20)). */
+        case 0x0081:
+            if (cpu_busspeed >= 25000000)
+                ret = 0x98;
+            else if (cpu_busspeed >= 20000000)
+                ret = 0xe0;
+            else
+                ret = 0x80;
+            break;
+        case 0x0082:
+            if (cpu_busspeed >= 25000000)
+                ret = 0x08;
+            else if (cpu_busspeed >= 20000000)
+                ret = 0x06;
+            else
+                ret = 0x05;
+            break;
+    } else {
+        addr &= 0x0f;
+        ret = dmaregs[2][addr];
 
-    if (addr >= 8)
-        addr = convert[addr & 0x07] | 4;
-    else
-        addr = convert[addr & 0x07];
+        if (addr >= 8)
+            addr = convert[addr & 0x07] | 4;
+        else
+            addr = convert[addr & 0x07];
 
-    if (addr < 8)
-        ret = dma[addr].page_l;
+        if (addr < 8)
+            ret = dma[addr].page_l;
+    }
 
     return ret;
 }

src/floppy/fdc.c

@@ -212,6 +212,7 @@ fdc_ctrl_reset(void *priv)
     fdc->lock             = 0;
     fdc->head             = 0;
     fdc->step             = 0;
+    fdc->power_down       = 0;
     if (!(fdc->flags & FDC_FLAG_AT))
         fdc->rate = 2;
 }
@@ -257,7 +258,7 @@ fdc_set_wrong_am(fdc_t *fdc)
 int
 fdc_get_drive(fdc_t *fdc)
 {
-    return fdc->drive;
+    return (int) fdc->drive;
 }
 
 int         fdc_get_bitcell_period(fdc_t *fdc);
@@ -270,7 +271,7 @@ fdc_get_perp(fdc_t *fdc)
     if (!(fdc->flags & FDC_FLAG_AT) || (fdc->flags & FDC_FLAG_PCJR))
         return 0;
 
-    return fdc->perp;
+    return (int) fdc->perp;
 }
 
 int
@@ -292,7 +293,7 @@ fdc_get_gap2(fdc_t *fdc, int drive)
 int
 fdc_get_format_n(fdc_t *fdc)
 {
-    return fdc->format_n;
+    return (int) fdc->format_n;
 }
 
 int
@@ -321,7 +322,7 @@ fdc_stop_id_request(fdc_t *fdc)
 int
 fdc_get_gap(fdc_t *fdc)
 {
-    return fdc->gap;
+    return (int) fdc->gap;
 }
 
 int
@@ -333,7 +334,7 @@ fdc_get_dtl(fdc_t *fdc)
 int
 fdc_get_format_sectors(fdc_t *fdc)
 {
-    return fdc->format_sectors;
+    return (int) fdc->format_sectors;
 }
 
 static void
@@ -418,6 +419,12 @@ fdc_update_rates(fdc_t *fdc)
     fdc_rate(fdc, 3);
 }
 
+void
+fdc_set_power_down(fdc_t *fdc, uint8_t power_down)
+{
+    fdc->power_down = power_down;
+}
+
 void
 fdc_update_max_track(fdc_t *fdc, int max_track)
 {
@@ -427,7 +434,7 @@ fdc_update_max_track(fdc_t *fdc, int max_track)
 void
 fdc_update_enh_mode(fdc_t *fdc, int enh_mode)
 {
-    fdc->enh_mode = enh_mode;
+    fdc->enh_mode = !!enh_mode;
     fdc_update_rates(fdc);
 }
 
@@ -490,7 +497,7 @@ fdc_update_drvrate(fdc_t *fdc, int drive, int drvrate)
 void
 fdc_update_drv2en(fdc_t *fdc, int drv2en)
 {
-    fdc->drv2en = drv2en;
+    fdc->drv2en = !!drv2en;
 }
 
 void
@@ -500,37 +507,34 @@ fdc_update_rate(fdc_t *fdc, int drive)
         fdc->bit_rate = 500;
     else if ((fdc->rwc[drive] == 3) && fdc->enh_mode)
         fdc->bit_rate = 250;
-    else
-        switch (fdc->rate) {
-            case 0: /*High density*/
-                fdc->bit_rate = 500;
-                break;
-            case 1: /*Double density (360 rpm)*/
-                switch (fdc->drvrate[drive]) {
-                    case 0:
-                        fdc->bit_rate = 300;
-                        break;
-                    case 1:
-                        fdc->bit_rate = 500;
-                        break;
-                    case 2:
-                        fdc->bit_rate = 2000;
-                        break;
-
-                    default:
-                        break;
-                }
-                break;
-            case 2: /*Double density*/
-                fdc->bit_rate = 250;
-                break;
-            case 3: /*Extended density*/
-                fdc->bit_rate = 1000;
-                break;
-
-            default:
-                break;
-        }
+    else  switch (fdc->rate) {
+        default:
+            break;
+        case 0: /*High density*/
+            fdc->bit_rate = 500;
+            break;
+        case 1: /*Double density (360 rpm)*/
+            switch (fdc->drvrate[drive]) {
+                default:
+                    break;
+                case 0:
+                    fdc->bit_rate = 300;
+                    break;
+                case 1:
+                    fdc->bit_rate = 500;
+                    break;
+                case 2:
+                    fdc->bit_rate = 2000;
+                    break;
+            }
+            break;
+        case 2: /*Double density*/
+            fdc->bit_rate = 250;
+            break;
+        case 3: /*Extended density*/
+            fdc->bit_rate = 1000;
+            break;
+    }
 
     fdc->bitcell_period = (1000000 / fdc->bit_rate) * 2; /*Bitcell period in ns*/
 }
@@ -688,10 +692,6 @@ fdc_io_command_phase1(fdc_t *fdc, int out)
         fdc->stat |= 0x20;
     else
         dma_set_drq(fdc->dma_ch, 1);
-    if (out)
-        fdc->pos = 0;
-    else
-        fdc->inread = 1;
 }
 
 static void
@@ -741,7 +741,7 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
 
     cycles -= ISA_CYCLES(8);
 
-    switch (addr & 7) {
+    if (!fdc->power_down || ((addr & 7) == 2) || ((addr & 7) == 4))  switch (addr & 7) {
         case 0:
             return;
         case 1:
@@ -776,14 +776,20 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
                     fdc->pnum = fdc->ptot = 0;
                 }
                 if ((val & 4) && !(fdc->dor & 4)) {
-                    timer_set_delay_u64(&fdc->timer, 8 * TIMER_USEC);
-                    fdc->interrupt = -1;
-                    fdc->perp &= 0xfc;
+                    if (fdc->power_down) {
+                        timer_set_delay_u64(&fdc->timer, 1000 * TIMER_USEC);
+                        fdc->interrupt = -5;
+                    } else {
+                        timer_set_delay_u64(&fdc->timer, 8 * TIMER_USEC);
+                        fdc->interrupt = -1;
 
-                    for (i = 0; i < FDD_NUM; i++)
-                        ui_sb_update_icon(SB_FLOPPY | i, 0);
+                        fdc->perp &= 0xfc;
 
-                    fdc_ctrl_reset(fdc);
+                        for (i = 0; i < FDD_NUM; i++)
+                            ui_sb_update_icon(SB_FLOPPY | i, 0);
+
+                        fdc_ctrl_reset(fdc);
+                    }
                 }
                 /* We can now simplify this since each motor now spins separately. */
                 for (i = 0; i < FDD_NUM; i++) {
@@ -854,7 +860,6 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
                             fdc->pnum = 0;
                             fdc->ptot = 4;
                             fdc->stat |= 0x90;
-                            fdc->pos          = 0;
                             fdc->format_state = 0;
                         } else
                             fdc_bad_command(fdc);
@@ -866,7 +871,6 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
                         fdc->pnum               = 0;
                         fdc->ptot               = 8;
                         fdc->stat |= 0x90;
-                        fdc->pos = 0;
                         fdc->mfm = (fdc->command & 0x40) ? 1 : 0;
                         break;
                     case 0x03: /*Specify*/
@@ -888,7 +892,6 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
                         fdc->pnum               = 0;
                         fdc->ptot               = 8;
                         fdc->stat |= 0x90;
-                        fdc->pos = 0;
                         fdc->mfm = (fdc->command & 0x40) ? 1 : 0;
                         break;
                     case 0x06: /*Read data*/
@@ -907,7 +910,6 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
                         fdc->pnum = 0;
                         fdc->ptot = 8;
                         fdc->stat |= 0x90;
-                        fdc->pos = 0;
                         fdc->mfm = (fdc->command & 0x40) ? 1 : 0;
                         break;
                     case 0x17: /*Powerdown mode*/
@@ -924,28 +926,24 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
                     case 0x08: /*Sense interrupt status*/
                         fdc_log("fdc->fintr = %i, fdc->reset_stat = %i\n", fdc->fintr, fdc->reset_stat);
                         fdc->lastdrive = fdc->drive;
-                        fdc->pos       = 0;
                         fdc_sis(fdc);
                         break;
                     case 0x0a: /*Read sector ID*/
                         fdc->pnum = 0;
                         fdc->ptot = 1;
                         fdc->stat |= 0x90;
-                        fdc->pos = 0;
                         fdc->mfm = (fdc->command & 0x40) ? 1 : 0;
                         break;
                     case 0x0d: /*Format track*/
                         fdc->pnum = 0;
                         fdc->ptot = 5;
                         fdc->stat |= 0x90;
-                        fdc->pos          = 0;
                         fdc->mfm          = (fdc->command & 0x40) ? 1 : 0;
                         fdc->format_state = 0;
                         break;
                     case 0x0e: /*Dump registers*/
                         fdc->lastdrive = fdc->drive;
                         fdc->interrupt = 0x0e;
-                        fdc->pos       = 0;
                         fdc_callback(fdc);
                         break;
                     case 0x0f: /*Seek*/
@@ -964,7 +962,6 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
                     case 0x94: /*Lock*/
                         fdc->lastdrive = fdc->drive;
                         fdc->interrupt = fdc->command;
-                        fdc->pos       = 0;
                         fdc_callback(fdc);
                         break;
                     case 0x12: /*Set perpendicular mode*/
@@ -972,7 +969,6 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
                             fdc->pnum = 0;
                             fdc->ptot = 1;
                             fdc->stat |= 0x90;
-                            fdc->pos = 0;
                         } else
                             fdc_bad_command(fdc);
                         break;
@@ -980,7 +976,6 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
                         fdc->pnum = 0;
                         fdc->ptot = 3;
                         fdc->stat |= 0x90;
-                        fdc->pos = 0;
                         break;
                     default:
                         fdc_bad_command(fdc);
@@ -1151,7 +1146,6 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
                             fdc->format_sectors = fdc->params[2];
                             fdc->format_n       = fdc->params[1];
                             fdc->format_state   = 1;
-                            fdc->pos            = 0;
                             fdc->stat           = 0x10;
                             break;
                         case 0x0f: /* Seek */
@@ -1273,12 +1267,12 @@ uint8_t
 fdc_read(uint16_t addr, void *priv)
 {
     fdc_t  *fdc = (fdc_t *) priv;
-    uint8_t ret;
+    uint8_t ret = 0xff;
     int     drive = 0;
 
     cycles -= ISA_CYCLES(8);
 
-    switch (addr & 7) {
+    if (!fdc->power_down || ((addr & 7) == 2))  switch (addr & 7) {
         case 0: /* STA */
             if (fdc->flags & FDC_FLAG_PS1) {
                 drive = real_drive(fdc, fdc->dor & 3);
@@ -1513,7 +1507,6 @@ fdc_poll_readwrite_finish(fdc_t *fdc, int compare)
     if ((fdc->interrupt == 5) || (fdc->interrupt == 9))
         fdd_do_writeback(real_drive(fdc, fdc->drive));
 
-    fdc->inread    = 0;
     fdc->interrupt = -2;
 
     fdc_poll_common_finish(fdc, compare, 0);
@@ -1544,10 +1537,21 @@ fdc_callback(void *priv)
         case -2: /*End of command*/
             fdc->stat = (fdc->stat & 0xf) | 0x80;
             return;
+        case -5: /*Reset in power down mode */
+            fdc->perp &= 0xfc;
+
+            for (uint8_t i = 0; i < FDD_NUM; i++)
+                ui_sb_update_icon(SB_FLOPPY | i, 0);
+
+            fdc_ctrl_reset(fdc);
+
+            fdc->fintr = 0;
+            memset(fdc->pcn, 0x00, 4 * sizeof(uint16_t));
+            return;
         case -1: /*Reset*/
             fdc_int(fdc, 1);
             fdc->fintr = 0;
-            memset(fdc->pcn, 0, 4 * sizeof(int));
+            memset(fdc->pcn, 0x00, 4 * sizeof(uint16_t));
             fdc->reset_stat = 4;
             return;
         case 0x01: /* Mode */
@@ -1570,7 +1574,6 @@ fdc_callback(void *priv)
                     fdc->stat = 0x50;
                 }
             }
-            fdc->inread = 1;
             return;
         case 0x04: /* Sense drive status */
             fdc->res[10] = (fdc->params[0] & 7) | 0x20;
@@ -1715,7 +1718,6 @@ fdc_callback(void *priv)
                 default:
                     break;
             }
-            fdc->inread = 1;
             return;
         case 0x07: /* Recalibrate */
             fdc->pcn[fdc->params[0] & 3] = 0;
@@ -2004,18 +2006,11 @@ fdc_data(fdc_t *fdc, uint8_t data, int last)
     return 0;
 }
 
-void
-fdc_finishread(fdc_t *fdc)
-{
-    fdc->inread = 0;
-}
-
 void
 fdc_track_finishread(fdc_t *fdc, int condition)
 {
     fdc->stat = 0x10;
     fdc->satisfying_sectors |= condition;
-    fdc->inread = 0;
     fdc_callback(fdc);
 }
 
@@ -2025,7 +2020,6 @@ fdc_sector_finishcompare(fdc_t *fdc, int satisfying)
     fdc->stat = 0x10;
     if (satisfying)
         fdc->satisfying_sectors++;
-    fdc->inread = 0;
     fdc_callback(fdc);
 }
 
@@ -2033,7 +2027,6 @@ void
 fdc_sector_finishread(fdc_t *fdc)
 {
     fdc->stat   = 0x10;
-    fdc->inread = 0;
     fdc_callback(fdc);
 }
 
@@ -2356,6 +2349,8 @@ fdc_reset(void *priv)
 
     for (uint8_t i = 0; i < FDD_NUM; i++)
         ui_sb_update_icon(SB_FLOPPY | i, 0);
+
+    fdc->power_down = 0;
 }
 
 static void
@@ -2418,7 +2413,7 @@ fdc_init(const device_t *info)
 void
 fdc_3f1_enable(fdc_t *fdc, int enable)
 {
-    fdc->enable_3f1 = enable;
+    fdc->enable_3f1 = !!enable;
 }
 
 const device_t fdc_xt_device = {

src/floppy/fdd_86f.c

@@ -1274,18 +1274,19 @@ d86f_find_address_mark_fm(int drive, int side, find_t *find, uint16_t req_am, ui
     if (dev->last_word[side] == req_am) {
         dev->calc_crc.word = 0xFFFF;
         fdd_calccrc(decodefm(drive, dev->last_word[side]), &(dev->calc_crc));
-        find->sync_marks = find->bits_obtained = find->bytes_obtained = 0;
-        find->sync_pos                                                = 0xFFFFFFFF;
-        dev->preceding_bit[side]                                      = dev->last_word[side] & 1;
+        find->sync_marks = find->bits_obtained =
+        find->bytes_obtained                   = 0;
+        find->sync_pos                         = 0xFFFFFFFF;
+        dev->preceding_bit[side]               = dev->last_word[side] & 1;
         dev->state++;
         return;
     }
 
     if (wrong_am && (dev->last_word[side] == wrong_am)) {
-        dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0;
-        dev->error_condition                                                                     = 0;
-        dev->state                                                                               = STATE_IDLE;
-        fdc_finishread(d86f_fdc);
+        dev->data_find.sync_marks = dev->data_find.bits_obtained =
+        dev->data_find.bytes_obtained                            = 0;
+        dev->error_condition                                     = 0;
+        dev->state                                               = STATE_IDLE;
         fdc_nodataam(d86f_fdc);
         return;
     }
@@ -1328,8 +1329,9 @@ d86f_write_find_address_mark_fm(int drive, int side, find_t *find)
 
     /* If we hadn't found enough set bits but have found a clear bit, null the counter of set bits. */
     if (!(dev->last_word[side] & 1)) {
-        find->sync_marks = find->bits_obtained = find->bytes_obtained = 0;
-        find->sync_pos                                                = 0xFFFFFFFF;
+        find->sync_marks = find->bits_obtained =
+        find->bytes_obtained                   = 0;
+        find->sync_pos                         = 0xFFFFFFFF;
     }
 }
 
@@ -1347,10 +1349,10 @@ d86f_find_address_mark_mfm(int drive, int side, find_t *find, uint16_t req_am, u
     }
 
     if (wrong_am && (dev->last_word[side] == wrong_am) && (find->sync_marks >= 3)) {
-        dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0;
-        dev->error_condition                                                                     = 0;
-        dev->state                                                                               = STATE_IDLE;
-        fdc_finishread(d86f_fdc);
+        dev->data_find.sync_marks = dev->data_find.bits_obtained =
+        dev->data_find.bytes_obtained                            = 0;
+        dev->error_condition                                     = 0;
+        dev->state                                               = STATE_IDLE;
         fdc_nodataam(d86f_fdc);
         return;
     }
@@ -1433,22 +1435,26 @@ d86f_read_sector_id(int drive, int side, int match)
         if (!(dev->id_find.bits_obtained & 15)) {
             /* We've got a byte. */
             if (dev->id_find.bytes_obtained < 4) {
-                dev->last_sector.byte_array[dev->id_find.bytes_obtained] = decodefm(drive, dev->last_word[side]);
+                dev->last_sector.byte_array[dev->id_find.bytes_obtained] =
+                decodefm(drive, dev->last_word[side]);
                 fdd_calccrc(dev->last_sector.byte_array[dev->id_find.bytes_obtained], &(dev->calc_crc));
             } else if ((dev->id_find.bytes_obtained >= 4) && (dev->id_find.bytes_obtained < 6)) {
-                dev->track_crc.bytes[(dev->id_find.bytes_obtained & 1) ^ 1] = decodefm(drive, dev->last_word[side]);
+                dev->track_crc.bytes[(dev->id_find.bytes_obtained & 1) ^ 1] =
+                decodefm(drive, dev->last_word[side]);
             }
             dev->id_find.bytes_obtained++;
 
             if (dev->id_find.bytes_obtained == 6) {
                 /* We've got the ID. */
-                if ((dev->calc_crc.word != dev->track_crc.word) && (dev->last_sector.dword == dev->req_sector.dword)) {
-                    dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = 0;
-                    d86f_log("86F: ID CRC error: %04X != %04X (%08X)\n", dev->track_crc.word, dev->calc_crc.word, dev->last_sector.dword);
+                if ((dev->calc_crc.word != dev->track_crc.word) &&
+                    (dev->last_sector.dword == dev->req_sector.dword)) {
+                    dev->id_find.sync_marks = dev->id_find.bits_obtained =
+                    dev->id_find.bytes_obtained = 0;
+                    d86f_log("86F: ID CRC error: %04X != %04X (%08X)\n", dev->track_crc.word,
+                             dev->calc_crc.word, dev->last_sector.dword);
                     if ((dev->state != STATE_02_READ_ID) && (dev->state != STATE_0A_READ_ID)) {
                         dev->error_condition = 0;
                         dev->state           = STATE_IDLE;
-                        fdc_finishread(d86f_fdc);
                         fdc_headercrcerror(d86f_fdc);
                     } else if (dev->state == STATE_0A_READ_ID)
                         dev->state--;
@@ -1458,25 +1464,37 @@ d86f_read_sector_id(int drive, int side, int match)
                     }
                 } else if ((dev->calc_crc.word == dev->track_crc.word) && (dev->state == STATE_0A_READ_ID)) {
                     /* CRC is valid and this is a read sector ID command. */
-                    dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = dev->error_condition = 0;
-                    fdc_sectorid(d86f_fdc, dev->last_sector.id.c, dev->last_sector.id.h, dev->last_sector.id.r, dev->last_sector.id.n, 0, 0);
+                    dev->id_find.sync_marks = dev->id_find.bits_obtained =
+                    dev->id_find.bytes_obtained = dev->error_condition = 0;
+                    fdc_sectorid(d86f_fdc,
+                                 dev->last_sector.id.c, dev->last_sector.id.h,
+                                 dev->last_sector.id.r, dev->last_sector.id.n, 0, 0);
                     dev->state = STATE_IDLE;
                 } else {
                     /* CRC is valid. */
-                    dev->id_find.sync_marks = dev->id_find.bits_obtained = dev->id_find.bytes_obtained = 0;
+                    dev->id_find.sync_marks = dev->id_find.bits_obtained =
+                    dev->id_find.bytes_obtained = 0;
                     dev->id_found |= 1;
                     if ((dev->last_sector.dword == dev->req_sector.dword) || !match) {
-                        d86f_handler[drive].set_sector(drive, side, dev->last_sector.id.c, dev->last_sector.id.h, dev->last_sector.id.r, dev->last_sector.id.n);
+                        d86f_handler[drive].set_sector(drive, side,
+                                                       dev->last_sector.id.c, dev->last_sector.id.h,
+                                                      dev->last_sector.id.r, dev->last_sector.id.n);
                         if (dev->state == STATE_02_READ_ID) {
                             /* READ TRACK command, we need some special handling here. */
-                            /* Code corrected: Only the C, H, and N portions of the sector ID are compared, the R portion (the sector number) is ignored. */
-                            if ((dev->last_sector.id.c != fdc_get_read_track_sector(d86f_fdc).id.c) || (dev->last_sector.id.h != fdc_get_read_track_sector(d86f_fdc).id.h) || (dev->last_sector.id.n != fdc_get_read_track_sector(d86f_fdc).id.n)) {
-                                dev->error_condition |= 4; /* Mark that the sector ID is not the one expected by the FDC. */
+                            /* Code corrected: Only the C, H, and N portions of the
+                                               sector ID are compared, the R portion
+                                               (the sector number) is ignored. */
+                            if ((dev->last_sector.id.c != fdc_get_read_track_sector(d86f_fdc).id.c) ||
+                                (dev->last_sector.id.h != fdc_get_read_track_sector(d86f_fdc).id.h) ||
+                                (dev->last_sector.id.n != fdc_get_read_track_sector(d86f_fdc).id.n)) {
+                                /* Mark that the sector ID is not the one expected by the FDC. */
+                                dev->error_condition |= 4;
                                 /* Make sure we use the sector size from the FDC. */
                                 dev->last_sector.id.n = fdc_get_read_track_sector(d86f_fdc).id.n;
                             }
 
-                            /* If the two ID's are identical, then we do not need to do anything regarding the sector size. */
+                            /* If the two ID's are identical, then we do not need to do
+                               anything regarding the sector size. */
                         }
                         dev->state++;
                     } else {
@@ -1576,7 +1594,8 @@ d86f_read_sector_data(int drive, int side)
                     data = d86f_handler[drive].read_data(drive, side, dev->data_find.bytes_obtained);
                 else {
 #ifdef HACK_FOR_DBASE_III
-                    if ((dev->last_sector.id.c == 39) && (dev->last_sector.id.h == 0) && (dev->last_sector.id.r == 5) && (dev->data_find.bytes_obtained >= 272))
+                    if ((dev->last_sector.id.c == 39) && (dev->last_sector.id.h == 0) &&
+                        (dev->last_sector.id.r == 5) && (dev->data_find.bytes_obtained >= 272))
                         data = (random_generate() & 0xff);
                     else
 #endif
@@ -1589,7 +1608,9 @@ d86f_read_sector_data(int drive, int side)
                 } else {
                     if (dev->data_find.bytes_obtained < d86f_get_data_len(drive)) {
                         if (dev->state != STATE_16_VERIFY_DATA) {
-                            read_status = fdc_data(d86f_fdc, data, dev->data_find.bytes_obtained == (d86f_get_data_len(drive) - 1));
+                            read_status = fdc_data(d86f_fdc, data,
+                                                   dev->data_find.bytes_obtained ==
+                                                   (d86f_get_data_len(drive) - 1));
                             if (read_status == -1)
                                 dev->dma_over++;
                         }
@@ -1597,17 +1618,19 @@ d86f_read_sector_data(int drive, int side)
                 }
                 fdd_calccrc(data, &(dev->calc_crc));
             } else if (dev->data_find.bytes_obtained < crc_pos)
-                dev->track_crc.bytes[(dev->data_find.bytes_obtained - sector_len) ^ 1] = decodefm(drive, dev->last_word[side]);
+                dev->track_crc.bytes[(dev->data_find.bytes_obtained - sector_len) ^ 1] =
+                decodefm(drive, dev->last_word[side]);
             dev->data_find.bytes_obtained++;
 
             if (dev->data_find.bytes_obtained == (crc_pos + fdc_get_gap(d86f_fdc))) {
                 /* We've got the data. */
                 if ((dev->calc_crc.word != dev->track_crc.word) && (dev->state != STATE_02_READ_DATA)) {
-                    d86f_log("86F: Data CRC error: %04X != %04X (%08X)\n", dev->track_crc.word, dev->calc_crc.word, dev->last_sector.dword);
-                    dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0;
-                    dev->error_condition                                                                     = 0;
-                    dev->state                                                                               = STATE_IDLE;
-                    fdc_finishread(d86f_fdc);
+                    d86f_log("86F: Data CRC error: %04X != %04X (%08X)\n", dev->track_crc.word,
+                             dev->calc_crc.word, dev->last_sector.dword);
+                    dev->data_find.sync_marks = dev->data_find.bits_obtained =
+                    dev->data_find.bytes_obtained = 0;
+                    dev->error_condition          = 0;
+                    dev->state                    = STATE_IDLE;
                     fdc_datacrcerror(d86f_fdc);
                 } else if ((dev->calc_crc.word != dev->track_crc.word) && (dev->state == STATE_02_READ_DATA)) {
                     dev->data_find.sync_marks = dev->data_find.bits_obtained = dev->data_find.bytes_obtained = 0;
@@ -2146,7 +2169,8 @@ d86f_turbo_read(int drive, int side)
     } else {
         if (dev->turbo_pos < (128UL << dev->req_sector.id.n)) {
             if (dev->state != STATE_16_VERIFY_DATA) {
-                read_status = fdc_data(d86f_fdc, dat, dev->turbo_pos == ((128UL << dev->req_sector.id.n) - 1));
+                read_status = fdc_data(d86f_fdc, dat,
+                                       dev->turbo_pos == ((128UL << dev->req_sector.id.n) - 1));
                 if (read_status == -1)
                     dev->dma_over++;
             }
@@ -2163,7 +2187,6 @@ d86f_turbo_read(int drive, int side)
 #endif
             dev->error_condition = 0;
             dev->state           = STATE_IDLE;
-            fdc_finishread(d86f_fdc);
             fdc_datacrcerror(d86f_fdc);
         } else if ((flags & SECTOR_CRC_ERROR) && (dev->state == STATE_02_READ_DATA)) {
 #ifdef ENABLE_D86F_LOG

src/include/86box/86box.h

@@ -33,7 +33,7 @@
 
 /* Recently used images */
 #define MAX_PREV_IMAGES    4
-#define MAX_IMAGE_PATH_LEN 256
+#define MAX_IMAGE_PATH_LEN 2048
 
 /* Default language 0xFFFF = from system, 0x409 = en-US */
 #define DEFAULT_LANGUAGE 0x0409
@@ -125,6 +125,7 @@ extern int      gfxcard[2];                 /* (C) graphics/video card */
 extern char     video_shader[512];          /* (C) video */
 extern int      bugger_enabled;             /* (C) enable ISAbugger */
 extern int      postcard_enabled;           /* (C) enable POST card */
+extern int      unittester_enabled;         /* (C) enable unit tester device */
 extern int      isamem_type[];              /* (C) enable ISA mem cards */
 extern int      isartc_type;                /* (C) enable ISA RTC card */
 extern int      sound_is_float;             /* (C) sound uses FP values */

src/include/86box/cdrom.h

@@ -244,6 +244,7 @@ typedef struct cdrom {
     int prev_host_drive;
     int cd_buflen;
     int audio_op;
+    int audio_muted_soft;
     int sony_msf;
 
     const cdrom_ops_t *ops;

src/include/86box/chipset.h

@@ -174,6 +174,8 @@ extern const device_t vlsi_scamp_device;
 extern const device_t wd76c10_device;
 
 /* Miscellaneous Hardware */
+extern const device_t nec_mate_unk_device;
+
 extern const device_t phoenix_486_jumper_device;
 extern const device_t phoenix_486_jumper_pci_device;
 

src/include/86box/device.h

@@ -41,23 +41,41 @@
 #ifndef EMU_DEVICE_H
 #define EMU_DEVICE_H
 
-#define CONFIG_END         -1
-#define CONFIG_STRING       0
-#define CONFIG_INT          1
-#define CONFIG_BINARY       2
-#define CONFIG_SELECTION    3
-#define CONFIG_MIDI_OUT     4
-#define CONFIG_FNAME        5
-#define CONFIG_SPINNER      6
-#define CONFIG_HEX16        7
-#define CONFIG_HEX20        8
-#define CONFIG_MAC          9
-#define CONFIG_MIDI_IN     10
-#define CONFIG_BIOS        11
-#define CONFIG_SERPORT     12
+#define CONFIG_END         -1                          /* N/A */
 
-#define CONFIG_ONBOARD    256      /* only avaialble on the on-board variant */
-#define CONFIG_STANDALONE 257      /* not available on the on-board variant */
+#define CONFIG_SHIFT        4
+
+#define CONFIG_TYPE_INT     (0 << CONFIG_SHIFT)
+#define CONFIG_TYPE_STRING  (1 << CONFIG_SHIFT)
+#define CONFIG_TYPE_HEX16   (2 << CONFIG_SHIFT)
+#define CONFIG_TYPE_HEX20   (3 << CONFIG_SHIFT)
+#define CONFIG_TYPE_MAC     (4 << CONFIG_SHIFT)
+
+#define CONFIG_INT          (0 | CONFIG_TYPE_INT)      /* config_get_int() */
+#define CONFIG_BINARY       (1 | CONFIG_TYPE_INT)      /* config_get_int() */
+#define CONFIG_SELECTION    (2 | CONFIG_TYPE_INT)      /* config_get_int() */
+#define CONFIG_MIDI_OUT     (3 | CONFIG_TYPE_INT)      /* config_get_int() */
+#define CONFIG_SPINNER      (4 | CONFIG_TYPE_INT)      /* config_get_int() */
+#define CONFIG_MIDI_IN      (5 | CONFIG_TYPE_INT)      /* config_get_int() */
+
+#define CONFIG_STRING       (0 | CONFIG_TYPE_STRING)     /* config_get_string() */
+#define CONFIG_FNAME        (1 | CONFIG_TYPE_STRING)     /* config_get_string() */
+#define CONFIG_SERPORT      (2 | CONFIG_TYPE_STRING)     /* config_get_string() */
+#define CONFIG_BIOS         (3 | CONFIG_TYPE_STRING)     /* config_get_string() */
+
+#define CONFIG_HEX16        (0 | CONFIG_TYPE_HEX16)      /* config_get_hex16() */
+
+#define CONFIG_HEX20        (0 | CONFIG_TYPE_HEX20)      /* config_get_hex20() */
+
+#define CONFIG_MAC          (0 | CONFIG_TYPE_MAC)        /* N/A */
+
+#define CONFIG_SUBTYPE_MASK (CONFIG_IS_STRING - 1)
+
+#define CONFIG_DEP          (16 << CONFIG_SHIFT)
+#define CONFIG_TYPE_MASK    (CONFIG_DEP - 1)
+
+// #define CONFIG_ONBOARD    256      /* only avaialble on the on-board variant */
+// #define CONFIG_STANDALONE 257      /* not available on the on-board variant */
 
 enum {
     DEVICE_PCJR      = 2,          /* requires an IBM PCjr */
@@ -100,38 +118,49 @@ enum {
 #define BIOS_INTERLEAVED_INVERT          8
 #define BIOS_HIGH_BIT_INVERT             16
 
+#define device_common_config_t                      \
+    const char                     *name;           \
+    const char                     *description;    \
+    int                             type;           \
+    const char                     *default_string; \
+    int                             default_int;    \
+    const char                     *file_filter;    \
+    const device_config_spinner_t   spinner;        \
+    const device_config_selection_t selection[32]
+
 typedef struct device_config_selection_t {
     const char *description;
     int         value;
 } device_config_selection_t;
 
-typedef struct device_config_bios_t {
-    const char  *name;
-    const char  *internal_name;
-    int          bios_type;
-    int          files_no;
-    uint32_t     local;
-    uint32_t     size;
-    void        *dev1;
-    void        *dev2;
-    const char  *files[9];
-} device_config_bios_t;
-
 typedef struct device_config_spinner_t {
     int16_t min;
     int16_t max;
     int16_t step;
 } device_config_spinner_t;
 
-typedef struct device_config_t {
-    const char                     *name;
-    const char                     *description;
-    int                             type;
-    const char                     *default_string;
-    int                             default_int;
-    const char                     *file_filter;
-    const device_config_spinner_t   spinner;
-    const device_config_selection_t selection[32];
+typedef struct _device_dep_config_ {
+    device_common_config_t;
+} device_dep_config_t;
+
+typedef struct device_config_bios_t {
+    const char *name;
+    const char *internal_name;
+    int         bios_type;
+    int         files_no;
+    uint32_t    local;
+    uint32_t    size;
+    void       *dev1;
+    void       *dev2;
+    const char *files[9];
+    /* Configuration options that depend on the device variant.
+       To prevent excessive nesting, there is no CONFIG_BIOS
+       option a dep_config struct  */
+    const device_dep_config_t *dep_config;
+} device_config_bios_t;
+
+typedef struct _device_config_ {
+    device_common_config_t;
     const device_config_bios_t      bios[32];
 } device_config_t;
 
@@ -202,6 +231,8 @@ extern const char *device_get_bios_file(const device_t *dev, const char *interna
 
 extern int device_is_valid(const device_t *, int m);
 
+extern const device_t* device_context_get_device(void);
+
 extern int         device_get_config_int(const char *name);
 extern int         device_get_config_int_ex(const char *s, int dflt_int);
 extern int         device_get_config_hex16(const char *name);

src/include/86box/fdc.h

@@ -65,76 +65,85 @@ typedef struct fdc_t {
     uint8_t st0;
     uint8_t swap;
     uint8_t dtl;
+
     uint8_t swwp;
     uint8_t disable_write;
     uint8_t st5;
     uint8_t st6;
     uint8_t error;
-    uint8_t params[8];
-    uint8_t res[11];
-    uint8_t specify[2];
     uint8_t config;
     uint8_t pretrk;
+    uint8_t power_down;
+
+    uint8_t head;
+    uint8_t lastdrive;
+    uint8_t sector;
+    uint8_t drive;
+    uint8_t rate;
+    uint8_t tc;
+    uint8_t pnum;
+    uint8_t ptot;
+
+    uint8_t reset_stat;
+    uint8_t seek_dir;
+    uint8_t perp;
+    uint8_t format_state;
+    uint8_t format_n;
+    uint8_t step;
+    uint8_t noprec;
+    uint8_t data_ready;
+
+    uint8_t paramstogo;
+    uint8_t enh_mode;
+    uint8_t dma;
+    uint8_t densel_polarity;
+    uint8_t densel_force;
+    uint8_t fifo;
+    uint8_t tfifo;
+    uint8_t fifobufpos;
+
+    uint8_t drv2en;
+    uint8_t gap;
+    uint8_t enable_3f1;
+    uint8_t format_sectors;
+    uint8_t mfm;
+    uint8_t deleted;
+    uint8_t wrong_am;
+    uint8_t sc;
+
+    uint8_t fintr;
+    uint8_t rw_drive;
+
+    uint8_t lock;
+    uint8_t specify[2];
+
+    uint8_t res[11];
+
+    uint8_t eot[4];
+    uint8_t rwc[4];
+    uint8_t params[8];
     uint8_t fifobuf[16];
 
+    uint16_t pcn[4];
+
     uint16_t base_address;
+    uint16_t rw_track;
 
-    int head;
-    int sector;
-    int drive;
-    int lastdrive;
-    int pcn[4];
-    int eot[4];
-    int rw_track;
-    int pos;
-    int pnum;
-    int ptot;
-    int rate;
-    int reset_stat;
-    int lock;
-    int perp;
-    int format_state;
-    int format_n;
-    int step;
-    int seek_dir;
-    int tc;
-    int noprec;
+    int bit_rate;    /* Should be 250 at start. */
 
-    int data_ready;
-    int inread;
     int bitcell_period;
-    int enh_mode;
-    int rwc[4];
-    int drvrate[4];
     int boot_drive;
-    int dma;
-    int densel_polarity;
-    int densel_force;
-    int fifo;
-    int tfifo;
-    int fifobufpos;
-    int drv2en;
 
-    int gap;
-    int enable_3f1;
-    int format_sectors;
     int max_track;
-    int mfm;
-    int deleted;
-    int wrong_am;
-    int sc;
     int satisfying_sectors;
-    int fintr;
-    int rw_drive;
 
     int flags;
     int interrupt;
 
-    int irq;    /* Should be 6 by default. */
-    int dma_ch; /* Should be 2 by default. */
+    int irq;         /* Should be 6 by default. */
+    int dma_ch;      /* Should be 2 by default. */
 
-    int bit_rate; /* Should be 250 at start. */
-    int paramstogo;
+    int drvrate[4];
 
     sector_id_t read_track_sector;
     sector_id_t format_sector_id;
@@ -183,6 +192,7 @@ extern int         fdc_get_compare_condition(fdc_t *fdc);
 extern int         fdc_is_deleted(fdc_t *fdc);
 extern int         fdc_is_sk(fdc_t *fdc);
 extern void        fdc_set_wrong_am(fdc_t *fdc);
+extern void        fdc_set_power_down(fdc_t *fdc, uint8_t power_down);
 extern int         fdc_get_drive(fdc_t *fdc);
 extern int         fdc_get_perp(fdc_t *fdc);
 extern int         fdc_get_format_n(fdc_t *fdc);

src/include/86box/flash.h

@@ -60,4 +60,6 @@ extern const device_t sst_flash_49lf080_device;
 extern const device_t sst_flash_49lf016_device;
 extern const device_t sst_flash_49lf160_device;
 
+extern const device_t amd_flash_29f020a_device;
+
 #endif /*EMU_FLASH_H*/

src/include/86box/hdc.h

@@ -60,6 +60,9 @@ extern const device_t ide_vlb_2ch_device;     /* vlb_ide_2ch */
 extern const device_t ide_pci_device;         /* pci_ide */
 extern const device_t ide_pci_2ch_device;     /* pci_ide_2ch */
 
+extern const device_t ide_ali1489_device;                       /* ALi M1489 */
+extern const device_t ide_ali5213_device;                       /* ALi M5213 */
+
 extern const device_t ide_cmd640_vlb_device;                    /* CMD PCI-640B VLB */
 extern const device_t ide_cmd640_vlb_178_device;                /* CMD PCI-640B VLB (Port 178h) */
 extern const device_t ide_cmd640_vlb_pri_device;                /* CMD PCI-640B VLB (Only primary channel) */
@@ -86,9 +89,7 @@ extern const device_t xta_wdxt150_device; /* xta_wdxt150 */
 extern const device_t xta_hd20_device;    /* EuroPC internal */
 
 extern const device_t xtide_device;           /* xtide_xt */
-extern const device_t xtide_plus_device;      /* xtide_xt_plus */
 extern const device_t xtide_at_device;        /* xtide_at */
-extern const device_t xtide_at_386_device;    /* xtide_at_386 */
 extern const device_t xtide_acculogic_device; /* xtide_ps2 */
 extern const device_t xtide_at_ps2_device;    /* xtide_at_ps2 */
 

src/include/86box/hdc_ide.h

@@ -188,6 +188,8 @@ extern void   ide_atapi_attach(ide_t *dev);
 extern void *ide_xtide_init(void);
 extern void  ide_xtide_close(void);
 
+extern void  ide_drives_set_shadow(void);
+
 extern void     ide_writew(uint16_t addr, uint16_t val, void *priv);
 extern void     ide_write_devctl(uint16_t addr, uint8_t val, void *priv);
 extern void     ide_writeb(uint16_t addr, uint8_t val, void *priv);

src/include/86box/hdd.h

@@ -159,8 +159,8 @@ typedef struct hard_disk_t {
     char fn[1024];         /* Name of current image file */
     char vhd_parent[1041]; /* Differential VHD parent file */
 
-    uint32_t res0;
-    uint32_t pad1;
+    uint32_t seek_pos;
+    uint32_t seek_len;
     uint32_t base;
     uint32_t spt;
     uint32_t hpc; /* Physical geometry parameters */

src/include/86box/keyboard.h

@@ -79,6 +79,7 @@ typedef struct atkbc_dev_t {
     int     y;
     int     z;
     int     b;
+    int     ignore;
 
     int     *scan;
 

src/include/86box/lpt.h

@@ -83,6 +83,8 @@ extern lpt_port_t lpt_ports[PARALLEL_MAX];
 extern void    lpt_write(uint16_t port, uint8_t val, void *priv);
 extern uint8_t lpt_read(uint16_t port, void *priv);
 
+extern uint8_t lpt_read_port(int port, uint16_t reg);
+
 extern uint8_t lpt_read_status(int port);
 extern void    lpt_irq(void *priv, int raise);
 

src/include/86box/machine.h

@@ -49,37 +49,38 @@
 #define MACHINE_BUS_AGP       0x00080000 /* sys has AGP bus */
 #define MACHINE_BUS_AC97      0x00100000 /* sys has AC97 bus (ACR/AMR/CNR slot) */
 /* Aliases. */
-#define MACHINE_CASSETTE  (MACHINE_BUS_CASSETTE)  /* sys has cassette port */
-#define MACHINE_CARTRIDGE (MACHINE_BUS_CARTRIDGE) /* sys has two cartridge bays */
+#define MACHINE_CASSETTE    (MACHINE_BUS_CASSETTE)  /* sys has cassette port */
+#define MACHINE_CARTRIDGE   (MACHINE_BUS_CARTRIDGE) /* sys has two cartridge bays */
 /* Combined flags. */
-#define MACHINE_PC        (MACHINE_BUS_ISA)                     /* sys is PC/XT-compatible (ISA) */
-#define MACHINE_AT        (MACHINE_BUS_ISA | MACHINE_BUS_ISA16) /* sys is AT-compatible (ISA + ISA16) */
-#define MACHINE_PC98      (MACHINE_BUS_CBUS)                    /* sys is NEC PC-98x1 series */
-#define MACHINE_EISA      (MACHINE_BUS_EISA | MACHINE_AT)       /* sys is AT-compatible with EISA */
-#define MACHINE_VLB       (MACHINE_BUS_VLB | MACHINE_AT)        /* sys is AT-compatible with VLB */
-#define MACHINE_VLB98     (MACHINE_BUS_VLB | MACHINE_PC98)      /* sys is NEC PC-98x1 series with VLB (did that even exist?) */
-#define MACHINE_VLBE      (MACHINE_BUS_VLB | MACHINE_EISA)      /* sys is AT-compatible with EISA and VLB */
-#define MACHINE_MCA       (MACHINE_BUS_MCA)                     /* sys is MCA */
-#define MACHINE_PCI       (MACHINE_BUS_PCI | MACHINE_AT)        /* sys is AT-compatible with PCI */
-#define MACHINE_PCI98     (MACHINE_BUS_PCI | MACHINE_PC98)      /* sys is NEC PC-98x1 series with PCI */
-#define MACHINE_PCIE      (MACHINE_BUS_PCI | MACHINE_EISA)      /* sys is AT-compatible with PCI, and EISA */
-#define MACHINE_PCIV      (MACHINE_BUS_PCI | MACHINE_VLB)       /* sys is AT-compatible with PCI and VLB */
-#define MACHINE_PCIVE     (MACHINE_BUS_PCI | MACHINE_VLBE)      /* sys is AT-compatible with PCI, VLB, and EISA */
-#define MACHINE_PCMCIA    (MACHINE_BUS_PCMCIA | MACHINE_AT)     /* sys is AT-compatible laptop with PCMCIA */
-#define MACHINE_AGP       (MACHINE_BUS_AGP | MACHINE_PCI)       /* sys is AT-compatible with AGP  */
-#define MACHINE_AGP98     (MACHINE_BUS_AGP | MACHINE_PCI98)     /* sys is NEC PC-98x1 series with AGP (did that even exist?) */
+#define MACHINE_PC          (MACHINE_BUS_ISA)                     /* sys is PC/XT-compatible (ISA) */
+#define MACHINE_AT          (MACHINE_BUS_ISA | MACHINE_BUS_ISA16) /* sys is AT-compatible (ISA + ISA16) */
+#define MACHINE_PC98        (MACHINE_BUS_CBUS)                    /* sys is NEC PC-98x1 series */
+#define MACHINE_EISA        (MACHINE_BUS_EISA | MACHINE_AT)       /* sys is AT-compatible with EISA */
+#define MACHINE_VLB         (MACHINE_BUS_VLB | MACHINE_AT)        /* sys is AT-compatible with VLB */
+#define MACHINE_VLB98       (MACHINE_BUS_VLB | MACHINE_PC98)      /* sys is NEC PC-98x1 series with VLB (did that even exist?) */
+#define MACHINE_VLBE        (MACHINE_BUS_VLB | MACHINE_EISA)      /* sys is AT-compatible with EISA and VLB */
+#define MACHINE_MCA         (MACHINE_BUS_MCA)                     /* sys is MCA */
+#define MACHINE_PCI         (MACHINE_BUS_PCI | MACHINE_AT)        /* sys is AT-compatible with PCI */
+#define MACHINE_PCI98       (MACHINE_BUS_PCI | MACHINE_PC98)      /* sys is NEC PC-98x1 series with PCI */
+#define MACHINE_PCIE        (MACHINE_BUS_PCI | MACHINE_EISA)      /* sys is AT-compatible with PCI, and EISA */
+#define MACHINE_PCIV        (MACHINE_BUS_PCI | MACHINE_VLB)       /* sys is AT-compatible with PCI and VLB */
+#define MACHINE_PCIVE       (MACHINE_BUS_PCI | MACHINE_VLBE)      /* sys is AT-compatible with PCI, VLB, and EISA */
+#define MACHINE_PCMCIA      (MACHINE_BUS_PCMCIA | MACHINE_AT)     /* sys is AT-compatible laptop with PCMCIA */
+#define MACHINE_AGP         (MACHINE_BUS_AGP | MACHINE_PCI)       /* sys is AT-compatible with AGP  */
+#define MACHINE_AGP98       (MACHINE_BUS_AGP | MACHINE_PCI98)     /* sys is NEC PC-98x1 series with AGP (did that even exist?) */
 
-#define MACHINE_PC5150    (MACHINE_PC | MACHINE_CASSETTE)                     /* sys is IBM PC 5150 */
-#define MACHINE_PCJR      (MACHINE_PC | MACHINE_CASSETTE | MACHINE_CARTRIDGE) /* sys is PCjr */
-#define MACHINE_PS2       (MACHINE_AT | MACHINE_BUS_PS2)                      /* sys is PS/2 */
-#define MACHINE_PS2_MCA   (MACHINE_MCA | MACHINE_BUS_PS2)                     /* sys is MCA PS/2 */
-#define MACHINE_PS2_VLB   (MACHINE_VLB | MACHINE_BUS_PS2)                     /* sys is VLB PS/2 */
-#define MACHINE_PS2_PCI   (MACHINE_PCI | MACHINE_BUS_PS2)                     /* sys is PCI PS/2 */
-#define MACHINE_PS2_PCIV  (MACHINE_PCIV | MACHINE_BUS_PS2)                    /* sys is VLB/PCI PS/2 */
-#define MACHINE_PS2_AGP   (MACHINE_AGP | MACHINE_BUS_PS2)                     /* sys is AGP PS/2 */
-#define MACHINE_PS2_A97   (MACHINE_PS2_AGP | MACHINE_BUS_AC97)                /* sys is AGP/AC97 PS/2 */
-#define MACHINE_PS2_NOISA (MACHINE_PS2_AGP & ~MACHINE_AT)                     /* sys is AGP PS/2 without ISA */
-#define MACHINE_PS2_NOI97 (MACHINE_PS2_A97 & ~MACHINE_AT)                     /* sys is AGP/AC97 PS/2 without ISA */
+#define MACHINE_PC5150      (MACHINE_PC | MACHINE_CASSETTE)                     /* sys is IBM PC 5150 */
+#define MACHINE_PCJR        (MACHINE_PC | MACHINE_CASSETTE | MACHINE_CARTRIDGE) /* sys is PCjr */
+#define MACHINE_PS2         (MACHINE_AT | MACHINE_BUS_PS2)                      /* sys is PS/2 */
+#define MACHINE_PS2_MCA     (MACHINE_MCA | MACHINE_BUS_PS2)                     /* sys is MCA PS/2 */
+#define MACHINE_PS2_VLB     (MACHINE_VLB | MACHINE_BUS_PS2)                     /* sys is VLB PS/2 */
+#define MACHINE_PS2_PCI     (MACHINE_PCI | MACHINE_BUS_PS2)                     /* sys is PCI PS/2 */
+#define MACHINE_PS2_PCIV    (MACHINE_PCIV | MACHINE_BUS_PS2)                    /* sys is VLB/PCI PS/2 */
+#define MACHINE_PS2_AGP     (MACHINE_AGP | MACHINE_BUS_PS2)                     /* sys is AGP PS/2 */
+#define MACHINE_PS2_A97     (MACHINE_PS2_AGP | MACHINE_BUS_AC97)                /* sys is AGP/AC97 PS/2 */
+#define MACHINE_PS2_NOISA   (MACHINE_PS2_AGP & ~MACHINE_AT)                     /* sys is AGP PS/2 without ISA */
+#define MACHINE_PS2_PCIONLY (MACHINE_PS2_NOISA & ~MACHINE_BUS_AGP)              /* sys is PCI PS/2 without ISA */
+#define MACHINE_PS2_NOI97   (MACHINE_PS2_A97 & ~MACHINE_AT)                     /* sys is AGP/AC97 PS/2 without ISA */
 /* Feature flags for miscellaneous internal devices. */
 #define MACHINE_FLAGS_NONE        0x00000000 /* sys has no int devices */
 #define MACHINE_SOFTFLOAT_ONLY    0x00000001 /* sys requires SoftFloat FPU */
@@ -471,6 +472,7 @@ extern int machine_at_wd76c10_init(const machine_t *);
 extern int machine_at_arb1374_init(const machine_t *);
 extern int machine_at_sbc350a_init(const machine_t *);
 extern int machine_at_flytech386_init(const machine_t *);
+extern int machine_at_325ax_init(const machine_t *);
 extern int machine_at_mr1217_init(const machine_t *);
 extern int machine_at_pja511m_init(const machine_t *);
 extern int machine_at_prox1332_init(const machine_t *);
@@ -485,6 +487,7 @@ extern int machine_at_asus386_init(const machine_t *);
 extern int machine_at_ecs386_init(const machine_t *);
 extern int machine_at_spc6000a_init(const machine_t *);
 extern int machine_at_micronics386_init(const machine_t *);
+extern int machine_at_ecs386v_init(const machine_t *);
 
 extern int machine_at_rycleopardlx_init(const machine_t *);
 
@@ -504,6 +507,7 @@ extern int machine_at_winbios1429_init(const machine_t *);
 extern int machine_at_opti495_init(const machine_t *);
 extern int machine_at_opti495_ami_init(const machine_t *);
 extern int machine_at_opti495_mr_init(const machine_t *);
+extern int machine_at_exp4349_init(const machine_t *);
 
 extern int machine_at_vect486vl_init(const machine_t *);
 extern int machine_at_d824_init(const machine_t *);
@@ -511,6 +515,8 @@ extern int machine_at_d824_init(const machine_t *);
 extern int machine_at_403tg_init(const machine_t *);
 extern int machine_at_403tg_d_init(const machine_t *);
 extern int machine_at_403tg_d_mr_init(const machine_t *);
+extern int machine_at_pb450_init(const machine_t *);
+extern int machine_at_pb450_init(const machine_t *);
 extern int machine_at_pc330_6573_init(const machine_t *);
 extern int machine_at_mvi486_init(const machine_t *);
 
@@ -524,16 +530,23 @@ extern int machine_at_ami471_init(const machine_t *);
 extern int machine_at_dtk486_init(const machine_t *);
 extern int machine_at_px471_init(const machine_t *);
 extern int machine_at_win471_init(const machine_t *);
+extern int machine_at_pci400ca_init(const machine_t *);
 extern int machine_at_vi15g_init(const machine_t *);
 extern int machine_at_greenb_init(const machine_t *);
+extern int machine_at_4gpv5_init(const machine_t *);
 
 extern int machine_at_r418_init(const machine_t *);
 extern int machine_at_ls486e_init(const machine_t *);
 extern int machine_at_4dps_init(const machine_t *);
+extern int machine_at_ms4144_init(const machine_t *);
 extern int machine_at_4saw2_init(const machine_t *);
 extern int machine_at_m4li_init(const machine_t *);
 extern int machine_at_alfredo_init(const machine_t *);
+extern int machine_at_amis76_init(const machine_t *);
 extern int machine_at_ninja_init(const machine_t *);
+extern int machine_at_bat4ip3e_init(const machine_t *);
+extern int machine_at_486pi_init(const machine_t *);
+extern int machine_at_sb486p_init(const machine_t *);
 extern int machine_at_486sp3_init(const machine_t *);
 extern int machine_at_486sp3c_init(const machine_t *);
 extern int machine_at_486sp3g_init(const machine_t *);
@@ -545,6 +558,7 @@ extern int machine_at_win486pci_init(const machine_t *);
 extern int machine_at_ms4145_init(const machine_t *);
 extern int machine_at_sbc490_init(const machine_t *);
 extern int machine_at_tf486_init(const machine_t *);
+extern int machine_at_arb1476_init(const machine_t *);
 
 extern int machine_at_pci400cb_init(const machine_t *);
 extern int machine_at_g486ip_init(const machine_t *);
@@ -552,18 +566,24 @@ extern int machine_at_g486ip_init(const machine_t *);
 extern int machine_at_itoxstar_init(const machine_t *);
 extern int machine_at_arb1423c_init(const machine_t *);
 extern int machine_at_arb1479_init(const machine_t *);
+extern int machine_at_iach488_init(const machine_t *);
 extern int machine_at_pcm9340_init(const machine_t *);
 extern int machine_at_pcm5330_init(const machine_t *);
 
 extern int machine_at_ecs486_init(const machine_t *);
-extern int machine_at_hot433_init(const machine_t *);
+extern int machine_at_hot433a_init(const machine_t *);
 extern int machine_at_atc1415_init(const machine_t *);
 extern int machine_at_actionpc2600_init(const machine_t *);
+extern int machine_at_actiontower8400_init(const machine_t *);
 extern int machine_at_m919_init(const machine_t *);
 extern int machine_at_spc7700plw_init(const machine_t *);
 extern int machine_at_ms4134_init(const machine_t *);
 extern int machine_at_tg486gp_init(const machine_t *);
 extern int machine_at_tg486g_init(const machine_t *);
+extern int machine_at_dvent4xx_init(const machine_t *);
+extern int machine_at_ecsal486_init(const machine_t *);
+extern int machine_at_ap4100aa_init(const machine_t *);
+extern int machine_at_atc1762_init(const machine_t *);
 
 /* m_at_commodore.c */
 extern int machine_at_cmdpc_init(const machine_t *);
@@ -588,7 +608,7 @@ extern int machine_at_opti560l_init(const machine_t *);
 extern int machine_at_ambradp60_init(const machine_t *);
 extern int machine_at_valuepointp60_init(const machine_t *);
 extern int machine_at_revenge_init(const machine_t *);
-extern int machine_at_586mc1_init(const machine_t *);
+extern int machine_at_586is_init(const machine_t *);
 extern int machine_at_pb520r_init(const machine_t *);
 
 extern int machine_at_excalibur_init(const machine_t *);
@@ -602,17 +622,20 @@ extern int machine_at_p5sp4_init(const machine_t *);
 extern int machine_at_plato_init(const machine_t *);
 extern int machine_at_dellplato_init(const machine_t *);
 extern int machine_at_ambradp90_init(const machine_t *);
-extern int machine_at_430nx_init(const machine_t *);
+extern int machine_at_586ip_init(const machine_t *);
+extern int machine_at_tek932_init(const machine_t *);
 
 extern int machine_at_acerv30_init(const machine_t *);
 extern int machine_at_apollo_init(const machine_t *);
 extern int machine_at_zappa_init(const machine_t *);
 extern int machine_at_powermatev_init(const machine_t *);
 extern int machine_at_hawk_init(const machine_t *);
+extern int machine_at_pt2000_init(const machine_t *);
 
 extern int machine_at_pat54pv_init(const machine_t *);
 
 extern int machine_at_hot543_init(const machine_t *);
+extern int machine_at_ncselp90_init(const machine_t *);
 
 extern int machine_at_p54sp4_init(const machine_t *);
 extern int machine_at_sq588_init(const machine_t *);
@@ -638,10 +661,12 @@ extern int machine_at_8500tuc_init(const machine_t *);
 extern int machine_at_p55t2s_init(const machine_t *);
 
 extern int machine_at_p5vxb_init(const machine_t *);
+extern int machine_at_dellhannibalp_init(const machine_t *);
 extern int machine_at_gw2kte_init(const machine_t *);
 
 extern int machine_at_ap5s_init(const machine_t *);
 extern int machine_at_ms5124_init(const machine_t *);
+extern int machine_at_amis727_init(const machine_t *);
 extern int machine_at_vectra54_init(const machine_t *);
 
 /* m_at_socket7.c */
@@ -654,6 +679,7 @@ extern int machine_at_cu430hx_init(const machine_t *);
 extern int machine_at_equium5200_init(const machine_t *);
 extern int machine_at_pcv90_init(const machine_t *);
 extern int machine_at_p65up5_cp55t2d_init(const machine_t *);
+extern int machine_at_epc2102_init(const machine_t *);
 
 extern int machine_at_ap5vm_init(const machine_t *);
 extern int machine_at_p55tvp4_init(const machine_t *);
@@ -678,6 +704,8 @@ extern int machine_at_thunderbolt_init(const machine_t *);
 extern int machine_at_mb540n_init(const machine_t *);
 extern int machine_at_56a5_init(const machine_t *);
 extern int machine_at_p5mms98_init(const machine_t *);
+extern int machine_at_richmond_init(const machine_t *);
+extern int machine_at_tomahawk_init(const machine_t *);
 
 extern int machine_at_ficva502_init(const machine_t *);
 
@@ -685,6 +713,7 @@ extern int machine_at_ficpa2012_init(const machine_t *);
 
 extern int machine_at_r534f_init(const machine_t *);
 extern int machine_at_ms5146_init(const machine_t *);
+extern int machine_at_cb52xsi_init(const machine_t *);
 
 extern int machine_at_m560_init(const machine_t *);
 extern int machine_at_ms5164_init(const machine_t *);
@@ -692,6 +721,7 @@ extern int machine_at_ms5164_init(const machine_t *);
 /* m_at_sockets7.c */
 extern int machine_at_p5a_init(const machine_t *);
 extern int machine_at_m579_init(const machine_t *);
+extern int machine_at_gwlucas_init(const machine_t *);
 extern int machine_at_5aa_init(const machine_t *);
 extern int machine_at_5ax_init(const machine_t *);
 
@@ -701,11 +731,12 @@ extern int machine_at_ficva503a_init(const machine_t *);
 extern int machine_at_5emapro_init(const machine_t *);
 
 /* m_at_socket8.c */
+extern int machine_at_ap61_init(const machine_t *);
 extern int machine_at_p6rp4_init(const machine_t *);
-extern int machine_at_aurora_init(const machine_t *);
 
 extern int machine_at_686nx_init(const machine_t *);
 extern int machine_at_acerv60n_init(const machine_t *);
+extern int machine_at_lgibmx61_init(const machine_t *);
 extern int machine_at_vs440fx_init(const machine_t *);
 extern int machine_at_gw2kvenus_init(const machine_t *);
 extern int machine_at_ap440fx_init(const machine_t *);
@@ -726,9 +757,12 @@ extern int machine_at_kn97_init(const machine_t *);
 extern int machine_at_lx6_init(const machine_t *);
 extern int machine_at_spitfire_init(const machine_t *);
 
+extern int machine_at_ma30d_init(const machine_t *);
+
 extern int machine_at_p6i440e2_init(const machine_t *);
 
 extern int machine_at_p2bls_init(const machine_t *);
+extern int machine_at_lgibmx7g_init(const machine_t *);
 extern int machine_at_p3bf_init(const machine_t *);
 extern int machine_at_bf6_init(const machine_t *);
 extern int machine_at_ax6bc_init(const machine_t *);
@@ -846,6 +880,7 @@ extern int machine_xt_pc700_init(const machine_t *);
 extern int machine_xt_pc500_init(const machine_t *);
 extern int machine_xt_vendex_init(const machine_t *);
 extern int machine_xt_znic_init(const machine_t *);
+extern int machine_xt_glabios_init(const machine_t *);
 extern int machine_xt_super16t_init(const machine_t *);
 extern int machine_xt_super16te_init(const machine_t *);
 extern int machine_xt_top88_init(const machine_t *);

src/include/86box/mem.h

@@ -398,6 +398,7 @@ extern void mem_mapping_disable(mem_mapping_t *);
 extern void mem_mapping_enable(mem_mapping_t *);
 extern void mem_mapping_recalc(uint64_t base, uint64_t size);
 
+extern void mem_set_wp(uint64_t base, uint64_t size, uint8_t flags, uint8_t wp);
 extern void mem_set_access(uint8_t bitmap, int mode, uint32_t base, uint32_t size, uint16_t access);
 
 extern uint8_t  mem_readb_phys(uint32_t addr);
@@ -439,6 +440,8 @@ extern void mem_reset_page_blocks(void);
 extern void flushmmucache(void);
 extern void flushmmucache_nopc(void);
 
+extern void mem_debug_check_addr(uint32_t addr, int write);
+
 extern void mem_a20_init(void);
 extern void mem_a20_recalc(void);
 
@@ -447,6 +450,8 @@ extern void mem_close(void);
 extern void mem_reset(void);
 extern void mem_remap_top(int kb);
 
+extern void umc_smram_recalc(uint32_t start, int set);
+
 extern mem_mapping_t *read_mapping[MEM_MAPPINGS_NO];
 extern mem_mapping_t *write_mapping[MEM_MAPPINGS_NO];
 

src/include/86box/mouse.h

@@ -93,6 +93,7 @@ extern void            mouse_scale_x(int x);
 extern void            mouse_scale_y(int y);
 extern void            mouse_scalef(double x, double y);
 extern void            mouse_scale(int x, int y);
+extern void            mouse_scale_axis(int axis, int val);
 extern void            mouse_set_z(int z);
 extern void            mouse_clear_z(void);
 extern void            mouse_subtract_z(int *delta_z, int min, int max, int invert);

src/include/86box/net_pcnet.h

@@ -36,5 +36,6 @@ extern const device_t pcnet_am79c960_vlb_device;
 extern const device_t pcnet_am79c961_device;
 extern const device_t pcnet_am79c970a_device;
 extern const device_t pcnet_am79c973_device;
+extern const device_t pcnet_am79c973_onboard_device;
 
 #endif /*NET_PCNET_H*/

src/include/86box/net_tulip.h

@@ -1,3 +1,4 @@
 extern const device_t dec_tulip_device;
 extern const device_t dec_tulip_21140_device;
 extern const device_t dec_tulip_21140_vpc_device;
+extern const device_t dec_tulip_21040_device;

src/include/86box/pci.h

@@ -71,6 +71,7 @@
 #define FLAG_CONFIG_M1_IO_ON      0x00000020
 #define FLAG_NO_IRQ_STEERING      0x00000040
 #define FLAG_NO_BRIDGES           0x00000080
+#define FLAG_TRC_CONTROLS_CPURST  0x00000100
 
 #define FLAG_MECHANISM_MASK       FLAG_MECHANISM_1 | FLAG_MECHANISM_2
 #define FLAG_MASK                 0x0000007f

src/include/86box/plat.h

@@ -149,6 +149,7 @@ extern uint32_t plat_language_code(char *langcode);
 extern void     plat_language_code_r(uint32_t lcid, char *outbuf, int len);
 extern void     plat_get_cpu_string(char *outbuf, uint8_t len);
 extern double   plat_get_dpi(void);
+extern void     plat_set_thread_name(void *thread, const char *name);
 
 /* Resource management. */
 extern void     set_language(uint32_t id);

src/include/86box/printer.h

@@ -46,7 +46,8 @@
 #ifndef PRINTER_H
 #define PRINTER_H
 
-#define FONT_FILE_DOTMATRIX "dotmatrix.ttf"
+#define FONT_FILE_DOTMATRIX        "dotmatrix.otf"
+#define FONT_FILE_DOTMATRIX_ITALIC "dotmatrix_italic.otf"
 
 #define FONT_FILE_ROMAN     "roman.ttf"
 #define FONT_FILE_SANSSERIF "sansserif.ttf"

src/include/86box/resource.h

@@ -79,10 +79,10 @@
 #define IDT_JOYSTICK 1718 /* Joystick: */
 
 /* DLG_CFG_SOUND */
-#define IDT_SOUND1   1719 /* Sound card 1: */
-#define IDT_SOUND2   1720 /* Sound card 2: */
-#define IDT_SOUND3   1721 /* Sound card 3: */
-#define IDT_SOUND4   1722 /* Sound card 4: */
+#define IDT_SOUND1   1719 /* Sound card #1: */
+#define IDT_SOUND2   1720 /* Sound card #2: */
+#define IDT_SOUND3   1721 /* Sound card #3: */
+#define IDT_SOUND4   1722 /* Sound card #4: */
 #define IDT_MIDI_OUT 1723 /* MIDI Out Device: */
 #define IDT_MIDI_IN  1724 /* MIDI In Device: */
 

src/include/86box/scsi_pcscsi.h

@@ -26,6 +26,6 @@
 #define SCSI_PCSCSI_H
 
 extern const device_t dc390_pci_device;
-extern const device_t ncr53c90_mca_device;
+extern const device_t ncr53c90a_mca_device;
 
 #endif /*SCSI_BUSLOGIC_H*/

src/include/86box/serial.h

@@ -124,11 +124,11 @@ extern void      serial_set_next_inst(int ni);
 extern void      serial_standalone_init(void);
 extern void      serial_set_clock_src(serial_t *dev, double clock_src);
 extern void      serial_reset_port(serial_t *dev);
+extern uint8_t   serial_read(uint16_t addr, void *priv);
 extern void      serial_device_timeout(void *priv);
-
-extern void serial_set_cts(serial_t *dev, uint8_t enabled);
-extern void serial_set_dsr(serial_t *dev, uint8_t enabled);
-extern void serial_set_dcd(serial_t *dev, uint8_t enabled);
+extern void      serial_set_cts(serial_t *dev, uint8_t enabled);
+extern void      serial_set_dsr(serial_t *dev, uint8_t enabled);
+extern void      serial_set_dcd(serial_t *dev, uint8_t enabled);
 
 extern const device_t ns8250_device;
 extern const device_t ns8250_pcjr_device;

src/include/86box/sio.h

@@ -19,17 +19,21 @@
 extern void vt82c686_sio_write(uint8_t addr, uint8_t val, void *priv);
 
 extern const device_t acc3221_device;
+extern const device_t ali5105_device;
 extern const device_t ali5123_device;
 extern const device_t f82c710_device;
 extern const device_t f82c606_device;
 extern const device_t fdc37c651_device;
 extern const device_t fdc37c651_ide_device;
 extern const device_t fdc37c661_device;
+extern const device_t fdc37c661_ide_device;
+extern const device_t fdc37c661_ide_sec_device;
 extern const device_t fdc37c663_device;
 extern const device_t fdc37c663_ide_device;
 extern const device_t fdc37c665_device;
 extern const device_t fdc37c665_ide_device;
 extern const device_t fdc37c665_ide_pri_device;
+extern const device_t fdc37c665_ide_sec_device;
 extern const device_t fdc37c666_device;
 extern const device_t fdc37c67x_device;
 extern const device_t fdc37c669_device;

src/include/86box/thread.h

@@ -28,7 +28,7 @@ extern "C" {
 #    define event_t                             plat_event_t
 #    define mutex_t                             plat_mutex_t
 
-#    define thread_create                       plat_thread_create
+#    define thread_create_named                 plat_thread_create_named
 #    define thread_wait                         plat_thread_wait
 #    define thread_create_event                 plat_thread_create_event
 #    define thread_set_event                    plat_thread_set_event
@@ -48,7 +48,8 @@ typedef void thread_t;
 typedef void event_t;
 typedef void mutex_t;
 
-extern thread_t *thread_create(void (*thread_func)(void *param), void *param);
+#define thread_create(thread_func, param) thread_create_named((thread_func), (param), #thread_func)
+extern thread_t *thread_create_named(void (*thread_func)(void *param), void *param, const char *name);
 extern int       thread_wait(thread_t *arg);
 extern event_t  *thread_create_event(void);
 extern void      thread_set_event(event_t *arg);

src/include/86box/unittester.h

@@ -0,0 +1,37 @@
+/*
+ * 86Box    A hypervisor and IBM PC system emulator that specializes in
+ *          running old operating systems and software designed for IBM
+ *          PC systems and compatibles from 1981 through fairly recent
+ *          system designs based on the PCI bus.
+ *
+ *          This file is part of the 86Box distribution.
+ *
+ *          Debug device for assisting in unit testing.
+ *          See doc/specifications/86box-unit-tester.md for more info.
+ *          If modifying the protocol, you MUST modify the specification
+ *          and increment the version number.
+ *
+ *
+ *
+ * Authors: GreaseMonkey, <thematrixeatsyou+86b@gmail.com>
+ *
+ *          Copyright 2024 GreaseMonkey.
+ */
+
+#ifndef UNITTESTER_H
+#define UNITTESTER_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Global variables. */
+extern const device_t unittester_device;
+
+/* Functions. */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /*UNITTESTER_H*/

src/include/86box/vid_8514a.h

@@ -33,6 +33,8 @@ typedef struct hwcursor8514_t {
 } hwcursor8514_t;
 
 typedef struct ibm8514_t {
+    rom_t bios_rom;
+    rom_t bios_rom2;
     hwcursor8514_t hwcursor;
     hwcursor8514_t hwcursor_latch;
     uint8_t        pos_regs[8];
@@ -60,20 +62,24 @@ typedef struct ibm8514_t {
     int       dac_b;
     int       internal_pitch;
     int       hwcursor_on;
+    int       modechange;
+
+    uint64_t  dispontime;
+    uint64_t  dispofftime;
 
     struct {
         uint16_t subsys_cntl;
         uint16_t setup_md;
         uint16_t advfunc_cntl;
-        uint8_t  ext_advfunc_cntl;
         uint16_t cur_y;
-        uint16_t cur_y_bitres;
         uint16_t cur_x;
-        uint16_t cur_x_bitres;
+        int16_t  destx;
+        int16_t  desty;
         int16_t  desty_axstp;
         int16_t  destx_distp;
         int16_t  err_term;
         int16_t  maj_axis_pcnt;
+        int16_t  maj_axis_pcnt_no_limit;
         uint16_t cmd;
         uint16_t cmd_back;
         uint16_t short_stroke;
@@ -100,7 +106,9 @@ typedef struct ibm8514_t {
         int      sys_cnt2;
         int      temp_cnt;
         int16_t  cx;
+        int16_t  cx_back;
         int16_t  cy;
+        int16_t  oldcx;
         int16_t  oldcy;
         int16_t  sx;
         int16_t  sy;
@@ -133,19 +141,29 @@ typedef struct ibm8514_t {
         int      fill_state;
         int      xdir;
         int      ydir;
+        int      linedraw;
         uint32_t ge_offset;
     } accel;
 
     uint16_t test;
-    int      ibm_mode;
+    int      vendor_mode[2];
+    int      h_blankstart;
+    int      h_blank_end_val;
+    int      hblankstart;
+    int      hblank_end_val;
+    int      hblankend;
+    int      hblank_ext;
+    int      hblank_sub;
 
+    int      v_total_reg;
     int      v_total;
     int      dispend;
+    int      v_sync_start;
     int      v_syncstart;
     int      split;
     int      h_disp;
-    int      h_disp_old;
     int      h_total;
+    int      h_sync_width;
     int      h_disp_time;
     int      rowoffset;
     int      dispon;
@@ -172,20 +190,17 @@ typedef struct ibm8514_t {
 
     uint8_t data_available;
     uint8_t data_available2;
-    uint8_t scanmodulos;
     uint8_t rowcount;
+    int     hsync_start;
+    int     hsync_width;
     int     htotal;
     int     hdisp;
-    int     vtadj;
-    int     vdadj;
-    int     vsadj;
+    int     hdisped;
     int     sc;
-    int     vtb;
-    int     vdb;
-    int     vsb;
     int     vsyncstart;
     int     vsyncwidth;
     int     vtotal;
+    int     v_disp;
     int     vdisp;
     int     disp_cntl;
     int     interlace;
@@ -201,6 +216,7 @@ typedef struct ibm8514_t {
     int      pitch;
     int      ext_pitch;
     int      ext_crt_pitch;
+    int      extensions;
 } ibm8514_t;
 
 #endif /*VIDEO_8514A_H*/

src/include/86box/vid_ati_mach8.h

@@ -0,0 +1,162 @@
+/*
+ * 86Box    A hypervisor and IBM PC system emulator that specializes in
+ *          running old operating systems and software designed for IBM
+ *          PC systems and compatibles from 1981 through fairly recent
+ *          system designs based on the PCI bus.
+ *
+ *          This file is part of the 86Box distribution.
+ *
+ *          Emulation of the 8514/A-compatible Mach8 and Mach32 graphics
+ *          chips from ATI for the ISA/VLB/MCA/PCI buses.
+ *
+ *
+ *
+ * Authors: TheCollector1995.
+ *
+ *          Copyright 2022-2024 TheCollector1995.
+ */
+#ifndef VIDEO_ATI_MACH8_H
+#define VIDEO_ATI_MACH8_H
+
+typedef struct mach_t {
+    ati_eeprom_t eeprom;
+    svga_t       svga;
+
+    rom_t         bios_rom;
+    rom_t         bios_rom2;
+    mem_mapping_t mmio_linear_mapping;
+
+    int mca_bus;
+    int pci_bus;
+    int vlb_bus;
+    int has_bios;
+
+    uint8_t regs[256];
+    uint8_t pci_regs[256];
+    uint8_t int_line;
+    uint8_t pci_slot;
+    uint8_t irq_state;
+
+    int index;
+    int ramdac_type;
+    int old_mode;
+
+    uint32_t memory;
+
+    uint16_t config1;
+    uint16_t config2;
+
+    uint8_t  pos_regs[8];
+    uint8_t  pci_cntl_reg;
+    uint8_t  cursor_col_0;
+    uint8_t  cursor_col_1;
+    uint8_t  ext_cur_col_0_r;
+    uint8_t  ext_cur_col_1_r;
+    uint8_t  ext_cur_col_0_g;
+    uint8_t  ext_cur_col_1_g;
+    uint16_t cursor_col_0_rg;
+    uint16_t cursor_col_1_rg;
+    uint16_t cursor_col_b;
+    uint16_t cursor_offset_lo;
+    uint16_t cursor_offset_lo_reg;
+    uint16_t cursor_offset_hi;
+    uint16_t cursor_offset_hi_reg;
+    uint16_t cursor_vh_offset;
+    uint16_t cursor_x;
+    uint16_t cursor_y;
+    uint16_t misc;
+    uint16_t memory_aperture;
+    uint16_t local_cntl;
+    uint32_t linear_base;
+    uint8_t  ap_size;
+    uint8_t  bank_w;
+    uint8_t  bank_r;
+    uint16_t shadow_set;
+    uint16_t shadow_cntl;
+    int ext_on[2];
+    int compat_mode;
+
+    struct {
+        uint8_t  line_idx;
+        int16_t  line_array[6];
+        uint8_t  patt_idx;
+        uint8_t  patt_len;
+        uint8_t  pix_trans[2];
+        uint8_t  eeprom_control;
+        uint16_t dest_x_end;
+        uint16_t dest_x_start;
+        uint16_t dest_y_end;
+        uint16_t src_x_end;
+        uint16_t src_x_start;
+        uint16_t src_x;
+        uint16_t src_y;
+        int16_t  bres_count;
+        uint16_t clock_sel;
+        uint16_t crt_pitch;
+        uint16_t ge_pitch;
+        uint16_t dest_cmp_fn;
+        uint16_t dp_config;
+        uint16_t ext_ge_config;
+        uint16_t ge_offset_lo;
+        uint16_t ge_offset_hi;
+        uint16_t linedraw_opt;
+        uint16_t max_waitstates;
+        uint8_t  patt_data_idx;
+        uint8_t  patt_data[0x18];
+        uint16_t scan_to_x;
+        uint16_t scratch0;
+        uint16_t scratch1;
+        uint16_t test;
+        uint16_t pattern;
+        uint16_t test2;
+        int      src_y_dir;
+        int      cmd_type;
+        int      block_write_mono_pattern_enable;
+        int      mono_pattern_enable;
+        int16_t  cx_end_line;
+        int16_t  cy_end_line;
+        int16_t  cx;
+        int16_t  cx_end;
+        int16_t  cy_end;
+        int16_t  dx;
+        int16_t  dx_end;
+        int16_t  dy;
+        int16_t  dy_end;
+        int16_t  dx_start;
+        int16_t  dy_start;
+        int16_t  cy;
+        int16_t  sx_start;
+        int16_t  sx_end;
+        int16_t  sx;
+        int16_t  x_count;
+        int16_t  xx_count;
+        int16_t  xxx_count;
+        int16_t  sy;
+        int16_t  y_count;
+        int16_t  err;
+        int16_t  width;
+        int16_t  src_width;
+        int16_t  height;
+        int16_t  bleft, bright, btop, bbottom;
+        int      poly_src;
+        int      temp_cnt;
+        int      stepx;
+        int      stepy;
+        int      src_stepx;
+        uint8_t  color_pattern[16];
+        uint8_t  color_pattern_full[32];
+        uint16_t color_pattern_word[8];
+        int      mono_pattern[8][8];
+        uint32_t ge_offset;
+        uint32_t crt_offset;
+        uint32_t patt_len_reg;
+        int      poly_fill;
+        uint16_t dst_clr_cmp_mask;
+        int      clip_overrun;
+        int      color_pattern_idx;
+    } accel;
+
+    atomic_int force_busy;
+} mach_t;
+
+#endif /*VIDEO_ATI_MACH8_H*/

src/include/86box/vid_cga.h

@@ -66,6 +66,7 @@ typedef struct cga_t {
     int composite;
     int snow_enabled;
     int rgb_type;
+    int double_type;
 } cga_t;
 
 void    cga_init(cga_t *cga);

src/include/86box/vid_ega.h

@@ -56,6 +56,8 @@ typedef struct ega_t {
 
     uint8_t *vram;
 
+    uint16_t light_pen;
+
     int vidclock;
     int fast;
     int extvram;
@@ -109,6 +111,8 @@ typedef struct ega_t {
     int bpp;
     int index;
     int remap_required;
+    int actual_type;
+    int chipset;
 
     uint32_t charseta;
     uint32_t charsetb;
@@ -143,7 +147,7 @@ typedef struct ega_t {
 extern const device_t ega_device;
 extern const device_t cpqega_device;
 extern const device_t sega_device;
-extern const device_t atiega_device;
+extern const device_t atiega800p_device;
 extern const device_t iskra_ega_device;
 extern const device_t et2000_device;
 #endif

src/include/86box/vid_svga.h

@@ -118,16 +118,18 @@ typedef struct svga_t {
     int vram_display_mask;
     int vidclock;
     int dots_per_clock;
-    int hblank_ext;
     int hwcursor_on;
     int dac_hwcursor_on;
     int overlay_on;
     int set_override;
     int hblankstart;
     int hblankend;
-    int hblank_sub;
     int hblank_end_val;
     int hblank_end_len;
+    int hblank_end_mask;
+    int hblank_sub;
+    int packed_4bpp;
+    int ati_4color;
 
     /*The three variables below allow us to implement memory maps like that seen on a 1MB Trio64 :
       0MB-1MB - VRAM
@@ -164,8 +166,10 @@ typedef struct svga_t {
     latch_t  latch;
 
     pc_timer_t timer;
+    pc_timer_t timer8514;
 
     double clock;
+    double clock8514;
 
     hwcursor_t hwcursor;
     hwcursor_t hwcursor_latch;
@@ -231,6 +235,7 @@ typedef struct svga_t {
     uint8_t dac_status;
     uint8_t dpms;
     uint8_t dpms_ui;
+    uint8_t color_2bpp;
     uint8_t ksc5601_sbyte_mask;
     uint8_t ksc5601_udc_area_msb[2];
 
@@ -246,6 +251,11 @@ typedef struct svga_t {
       addresses are shifted to match*/
     int packed_chain4;
 
+    /*Disable 8bpp blink mode - some cards support it, some don't, it's a weird mode
+      If mode 13h appears in a reddish-brown background (0x88) with dark green text (0x8F),
+      you should set this flag when entering that mode*/
+    int disable_blink;
+
     /*Force CRTC to dword mode, regardless of CR14/CR17. Required for S3 enhanced mode*/
     int force_dword_mode;
 
@@ -263,22 +273,39 @@ typedef struct svga_t {
     /* Pointer to monitor */
     monitor_t *monitor;
 
+    /* Enable LUT mapping of >= 24 bpp modes. */
+    int lut_map;
+
+    /* Override the horizontal blanking stuff. */
+    int hoverride;
+
+    /* Return a 32 bpp color from a 15/16 bpp color. */
+    uint32_t (*conv_16to32)(struct svga_t *svga, uint16_t color, uint8_t bpp);
+
     void *  dev8514;
+    void *  ext8514;
     void *  xga;
 } svga_t;
 
 extern int vga_on;
 
-extern void    ibm8514_poll(void *priv, svga_t *svga);
+extern void    ibm8514_poll(void *priv);
 extern void    ibm8514_recalctimings(svga_t *svga);
 extern uint8_t ibm8514_ramdac_in(uint16_t port, void *priv);
 extern void    ibm8514_ramdac_out(uint16_t port, uint8_t val, void *priv);
 extern int     ibm8514_cpu_src(svga_t *svga);
 extern int     ibm8514_cpu_dest(svga_t *svga);
-extern void    ibm8514_accel_out_pixtrans(svga_t *svga, uint16_t port, uint16_t val, int len);
+extern void    ibm8514_accel_out_pixtrans(svga_t *svga, uint16_t port, uint32_t val, int len);
 extern void    ibm8514_short_stroke_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, svga_t *svga, uint8_t ssv, int len);
 extern void    ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat, svga_t *svga, int len);
 
+#ifdef ATI_8514_ULTRA
+extern void    ati8514_recalctimings(svga_t *svga);
+extern uint8_t ati8514_mca_read(int port, void *priv);
+extern void    ati8514_mca_write(int port, uint8_t val, void *priv);
+extern void    ati8514_init(svga_t *svga, void *ext8514, void *dev8514);
+#endif
+
 extern void xga_poll(void *priv, svga_t *svga);
 extern void xga_recalctimings(svga_t *svga);
 
@@ -329,6 +356,8 @@ enum {
     RAMDAC_8BIT
 };
 
+uint32_t svga_lookup_lut_ram(svga_t* svga, uint32_t val);
+
 /* We need a way to add a device with a pointer to a parent device so it can attach itself to it, and
    possibly also a second ATi 68860 RAM DAC type that auto-sets SVGA render on RAM DAC render change. */
 extern void    ati68860_ramdac_out(uint16_t addr, uint8_t val, void *priv, svga_t *svga);
@@ -388,11 +417,13 @@ extern float   stg_getclock(int clock, void *priv);
 extern void    tkd8001_ramdac_out(uint16_t addr, uint8_t val, void *priv, svga_t *svga);
 extern uint8_t tkd8001_ramdac_in(uint16_t addr, void *priv, svga_t *svga);
 
-extern void    tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *priv, svga_t *svga);
-extern uint8_t tvp3026_ramdac_in(uint16_t addr, int rs2, int rs3, void *priv, svga_t *svga);
-extern void    tvp3026_recalctimings(void *priv, svga_t *svga);
-extern void    tvp3026_hwcursor_draw(svga_t *svga, int displine);
-extern float   tvp3026_getclock(int clock, void *priv);
+extern void     tvp3026_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *priv, svga_t *svga);
+extern uint8_t  tvp3026_ramdac_in(uint16_t addr, int rs2, int rs3, void *priv, svga_t *svga);
+extern uint32_t tvp3026_conv_16to32(svga_t* svga, uint16_t color, uint8_t bpp);
+extern void     tvp3026_recalctimings(void *priv, svga_t *svga);
+extern void     tvp3026_hwcursor_draw(svga_t *svga, int displine);
+extern float    tvp3026_getclock(int clock, void *priv);
+extern void     tvp3026_gpio(uint8_t (*read)(uint8_t cntl, void *priv), void (*write)(uint8_t cntl, uint8_t data, void *priv), void *cb_priv, void *priv);
 
 #    ifdef EMU_DEVICE_H
 extern const device_t ati68860_ramdac_device;

src/include/86box/vid_svga_render.h

@@ -53,6 +53,7 @@ extern void svga_render_4bpp_lowres(svga_t *svga);
 extern void svga_render_4bpp_highres(svga_t *svga);
 extern void svga_render_8bpp_lowres(svga_t *svga);
 extern void svga_render_8bpp_highres(svga_t *svga);
+extern void svga_render_8bpp_clone_highres(svga_t *svga);
 extern void svga_render_8bpp_tseng_lowres(svga_t *svga);
 extern void svga_render_8bpp_tseng_highres(svga_t *svga);
 extern void svga_render_8bpp_gs_lowres(svga_t *svga);
@@ -74,6 +75,7 @@ extern void svga_render_ABGR8888_highres(svga_t *svga);
 extern void svga_render_RGBA8888_lowres(svga_t *svga);
 extern void svga_render_RGBA8888_highres(svga_t *svga);
 
+extern void ibm8514_render_blank(svga_t *svga);
 extern void ibm8514_render_8bpp(svga_t *svga);
 extern void ibm8514_render_15bpp(svga_t *svga);
 extern void ibm8514_render_16bpp(svga_t *svga);

src/include/86box/video.h

@@ -32,6 +32,9 @@ using atomic_int  = std::atomic_int;
 
 #define makecol(r, g, b)   ((b) | ((g) << 8) | ((r) << 16))
 #define makecol32(r, g, b) ((b) | ((g) << 8) | ((r) << 16))
+#define getcolr(color) (((color) >> 16) & 0xFF)
+#define getcolg(color) (((color) >> 8) & 0xFF)
+#define getcolb(color) ((color) & 0xFF)
 
 enum {
     VID_NONE = 0,
@@ -303,7 +306,7 @@ extern void xga_device_add(void);
 
 /* IBM 8514/A and clones*/
 extern void ibm8514_device_add(void);
-extern const device_t mach8_isa_device;
+extern const device_t mach8_vga_isa_device;
 extern const device_t mach32_isa_device;
 extern const device_t mach32_vlb_device;
 extern const device_t mach32_mca_device;
@@ -345,6 +348,7 @@ extern const device_t gd5426_diamond_speedstar_pro_a1_isa_device;
 extern const device_t gd5426_vlb_device;
 extern const device_t gd5426_onboard_device;
 extern const device_t gd5428_isa_device;
+extern const device_t gd5428_vlb_onboard_device;
 extern const device_t gd5428_vlb_device;
 extern const device_t gd5428_diamond_speedstar_pro_b1_vlb_device;
 extern const device_t gd5428_boca_isa_device;
@@ -431,12 +435,12 @@ extern const device_t ht216_32_standalone_device;
 extern const device_t im1024_device;
 extern const device_t pgc_device;
 
-#    if defined(DEV_BRANCH) && defined(USE_MGA)
 /* Matrox MGA */
 extern const device_t millennium_device;
 extern const device_t mystique_device;
 extern const device_t mystique_220_device;
-#    endif
+extern const device_t millennium_ii_device;
+extern const device_t productiva_g100_device;
 
 /* Oak OTI-0x7 */
 extern const device_t oti037c_device;
@@ -455,6 +459,7 @@ extern const device_t paradise_wd90c11_device;
 extern const device_t paradise_wd90c30_device;
 
 /* Realtek (S)VGA */
+extern const device_t realtek_rtg3105_device;
 extern const device_t realtek_rtg3106_device;
 
 /* S3 9XX/8XX/Vision/Trio */
@@ -475,7 +480,9 @@ extern const device_t s3_bahamas64_vlb_device;
 extern const device_t s3_bahamas64_pci_device;
 extern const device_t s3_9fx_vlb_device;
 extern const device_t s3_9fx_pci_device;
+extern const device_t s3_phoenix_trio32_onboard_vlb_device;
 extern const device_t s3_phoenix_trio32_vlb_device;
+extern const device_t s3_phoenix_trio32_onboard_pci_device;
 extern const device_t s3_phoenix_trio32_pci_device;
 extern const device_t s3_diamond_stealth_se_vlb_device;
 extern const device_t s3_diamond_stealth_se_pci_device;
@@ -485,6 +492,7 @@ extern const device_t s3_phoenix_trio64_onboard_pci_device;
 extern const device_t s3_phoenix_trio64_pci_device;
 extern const device_t s3_phoenix_trio64vplus_pci_device;
 extern const device_t s3_phoenix_trio64vplus_onboard_pci_device;
+extern const device_t s3_cardex_trio64vplus_pci_device;
 extern const device_t s3_mirocrystal_20sv_964_vlb_device;
 extern const device_t s3_mirocrystal_20sv_964_pci_device;
 extern const device_t s3_mirocrystal_20sd_864_vlb_device;

src/include_make/86box/version.h

@@ -34,7 +34,7 @@
 #define EMU_VERSION_FULL   EMU_VERSION
 #define EMU_VERSION_FULL_W EMU_VERSION_W
 
-#define COPYRIGHT_YEAR "2022"
+#define COPYRIGHT_YEAR "2024"
 
 /* Web URL info. */
 #define EMU_SITE       "86box.net"

src/lpt.c

@@ -165,6 +165,15 @@ lpt_read(uint16_t port, void *priv)
     return ret;
 }
 
+uint8_t
+lpt_read_port(int port, uint16_t reg)
+{
+    lpt_port_t *dev = &(lpt_ports[port]);
+    uint8_t ret = lpt_read(reg, dev);
+
+    return ret;
+}
+
 uint8_t
 lpt_read_status(int port)
 {

src/machine/m_amstrad.c

@@ -2124,7 +2124,6 @@ kbd_write(uint16_t port, uint8_t val, void *priv)
 
         case 0x66:
             softresetx86();
-            cpu_set_edx();
             break;
 
         default:

src/machine/m_at_286_386sx.c

@@ -304,6 +304,8 @@ machine_at_award286_init(const machine_t *model)
     if (fdc_type == FDC_INTERNAL)
         device_add(&fdc_at_device);
 
+    device_add(&ide_isa_device);
+
     return ret;
 }
 
@@ -406,6 +408,8 @@ machine_at_spc4200p_init(const machine_t *model)
     if (fdc_type == FDC_INTERNAL)
         device_add(&fdc_at_device);
 
+    device_add(&ide_isa_device);
+
     return ret;
 }
 
@@ -449,6 +453,8 @@ machine_at_spc4620p_init(const machine_t *model)
     if (fdc_type == FDC_INTERNAL)
         device_add(&fdc_at_device);
 
+    device_add(&ide_isa_device);
+
     return ret;
 }
 
@@ -483,6 +489,8 @@ machine_at_deskmaster286_init(const machine_t *model)
 
     if (fdc_type == FDC_INTERNAL)
         device_add(&fdc_at_device);
+        
+    device_add(&ide_isa_device);
 
     return ret;
 }
@@ -546,7 +554,7 @@ machine_at_wd76c10_init(const machine_t *model)
     if (bios_only || !ret)
         return ret;
 
-    machine_at_common_init(model);
+    machine_at_common_init_ex(model, 2);
 
     if (gfxcard[0] == VID_INTERNAL)
         device_add(&paradise_wd90c11_megapc_device);
@@ -711,7 +719,7 @@ machine_at_sbc350a_init(const machine_t *model)
 
     device_add(&ali1217_device);
     device_add(&fdc37c665_ide_device);
-    device_add(&keyboard_at_device);
+    device_add(&keyboard_ps2_ami_device);
 
     return ret;
 }
@@ -735,7 +743,27 @@ machine_at_flytech386_init(const machine_t *model)
     if (gfxcard[0] == VID_INTERNAL)
         device_add(&tvga8900d_device);
 
-    device_add(&keyboard_ps2_device);
+    device_add(&keyboard_at_ami_device);
+
+    return ret;
+}
+
+int
+machine_at_325ax_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/325ax/M27C512.BIN",
+                           0x000f0000, 65536, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init(model);
+
+    device_add(&ali1217_device);
+    device_add(&fdc_at_device);
+    device_add(&keyboard_at_ami_device);
 
     return ret;
 }
@@ -751,11 +779,11 @@ machine_at_mr1217_init(const machine_t *model)
     if (bios_only || !ret)
         return ret;
 
-    machine_at_common_ide_init(model);
+    machine_at_common_init(model);
 
     device_add(&ali1217_device);
     device_add(&fdc_at_device);
-    device_add(&keyboard_ps2_device);
+    device_add(&keyboard_at_ami_device);
 
     return ret;
 }

src/machine/m_at_386dx_486.c

@@ -93,7 +93,7 @@ machine_at_asus386_init(const machine_t *model)
 static void
 machine_at_sis401_common_init(const machine_t *model)
 {
-    machine_at_common_ide_init(model);
+    machine_at_common_init(model);
     device_add(&sis_85c401_device);
     device_add(&keyboard_at_ami_device);
 
@@ -144,7 +144,7 @@ machine_at_av4_init(const machine_t *model)
     if (bios_only || !ret)
         return ret;
 
-    machine_at_common_ide_init(model);
+    machine_at_common_init(model);
     device_add(&sis_85c460_device);
     device_add(&keyboard_at_ami_device);
 
@@ -224,6 +224,27 @@ machine_at_spc6000a_init(const machine_t *model)
     return ret;
 }
 
+int
+machine_at_ecs386v_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/ecs386v/PANDA_386V.BIN",
+               0x000f0000, 65536, 0);
+
+    if (bios_only || !ret)
+    return ret;
+
+    machine_at_common_init(model);
+    device_add(&ali1429_device);
+    device_add(&keyboard_ps2_intel_ami_pci_device);
+
+    if (fdc_type == FDC_INTERNAL)
+        device_add(&fdc_at_device);
+
+    return ret;
+}
+
 int
 machine_at_rycleopardlx_init(const machine_t *model)
 {
@@ -381,10 +402,9 @@ machine_at_acera1g_init(const machine_t *model)
         device_add(&gd5428_onboard_device);
 
     device_add(&keyboard_ps2_acer_pci_device);
-    device_add(&ide_isa_2ch_device);
 
-    if (fdc_type == FDC_INTERNAL)
-        device_add(&fdc_at_device);
+    device_add(&ali5105_device);
+    device_add(&ide_ali5213_device);
 
     return ret;
 }
@@ -404,7 +424,7 @@ machine_at_acerv10_init(const machine_t *model)
 
     device_add(&sis_85c461_device);
     device_add(&keyboard_ps2_acer_pci_device);
-    device_add(&ide_isa_2ch_device);
+    device_add(&ide_isa_device);
 
     if (fdc_type == FDC_INTERNAL)
         device_add(&fdc_at_device);
@@ -441,7 +461,7 @@ machine_at_decpclpv_init(const machine_t *model)
 static void
 machine_at_ali1429_common_init(const machine_t *model, int is_green)
 {
-    machine_at_common_ide_init(model);
+    machine_at_common_init(model);
 
     if (is_green)
         device_add(&ali1429g_device);
@@ -497,7 +517,7 @@ machine_at_opti495_init(const machine_t *model)
     if (bios_only || !ret)
         return ret;
 
-    machine_at_common_ide_init(model);
+    machine_at_common_init(model);
 
     device_add(&opti495_device);
 
@@ -512,7 +532,7 @@ machine_at_opti495_init(const machine_t *model)
 static void
 machine_at_opti495_ami_common_init(const machine_t *model)
 {
-    machine_at_common_ide_init(model);
+    machine_at_common_init(model);
 
     device_add(&opti495_device);
 
@@ -554,6 +574,27 @@ machine_at_opti495_mr_init(const machine_t *model)
     return ret;
 }
 
+int
+machine_at_exp4349_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/exp4349/biosdump.bin",
+                           0x000f0000, 65536, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init(model);
+
+    device_add(&ali1429g_device);
+    device_add(&keyboard_at_ami_device);
+
+    if (fdc_type == FDC_INTERNAL)
+        device_add(&fdc_at_device);
+    return ret;
+}
+
 static void
 machine_at_403tg_common_init(const machine_t *model, int nvr_hack)
 {
@@ -619,6 +660,39 @@ machine_at_403tg_d_mr_init(const machine_t *model)
     return ret;
 }
 
+int
+machine_at_pb450_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/pb450/OPTI802.BIN",
+                           0x000e0000, 131072, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init(model);
+
+    pci_init(PCI_CONFIG_TYPE_1);
+    pci_register_slot(0x10, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
+    pci_register_slot(0x11, PCI_CARD_NORMAL,      5, 4, 3, 2);
+    pci_register_slot(0x12, PCI_CARD_NORMAL,      9, 8, 7, 6);
+
+    device_add(&opti895_device);
+    device_add(&opti822_device);
+    device_add(&keyboard_ps2_intel_ami_pci_device);
+    device_add(&fdc37c661_ide_device);
+    device_add(&ide_opti611_vlb_sec_device);
+    device_add(&ide_vlb_2ch_device);
+    device_add(&intel_flash_bxt_device);
+    device_add(&phoenix_486_jumper_pci_device);
+
+    if (gfxcard[0] == VID_INTERNAL)
+        device_add(&gd5428_vlb_onboard_device);
+
+    return ret;
+}
+
 int
 machine_at_pc330_6573_init(const machine_t *model) /* doesn't like every CPU other than the iDX4 and the Intel OverDrive, hangs without a PS/2 mouse */
 {
@@ -700,7 +774,6 @@ machine_at_ami471_init(const machine_t *model)
         return ret;
 
     machine_at_sis_85c471_common_init(model);
-    device_add(&ide_vlb_device);
     device_add(&keyboard_at_ami_device);
 
     return ret;
@@ -718,8 +791,7 @@ machine_at_vli486sv2g_init(const machine_t *model)
         return ret;
 
     machine_at_sis_85c471_common_init(model);
-    device_add(&ide_vlb_2ch_device);
-    device_add(&keyboard_ps2_ami_device);
+    device_add(&keyboard_at_ami_device);
 
     return ret;
 }
@@ -736,7 +808,6 @@ machine_at_dtk486_init(const machine_t *model)
         return ret;
 
     machine_at_sis_85c471_common_init(model);
-    device_add(&ide_vlb_device);
     device_add(&keyboard_at_device);
 
     return ret;
@@ -772,12 +843,44 @@ machine_at_win471_init(const machine_t *model)
         return ret;
 
     machine_at_sis_85c471_common_init(model);
-    device_add(&ide_vlb_device);
     device_add(&keyboard_at_ami_device);
 
     return ret;
 }
 
+int
+machine_at_pci400ca_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/pci400ca/486-AA008851.BIN",
+                           0x000e0000, 131072, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init(model);
+
+    pci_init(PCI_CONFIG_TYPE_2 | PCI_NO_IRQ_STEERING);
+    pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
+    pci_register_slot(0x01, PCI_CARD_SCSI,        1, 2, 3, 4);
+    pci_register_slot(0x03, PCI_CARD_NORMAL,      1, 2, 3, 4);
+    pci_register_slot(0x04, PCI_CARD_NORMAL,      2, 3, 4, 1);
+    pci_register_slot(0x05, PCI_CARD_NORMAL,      3, 4, 1, 2);
+    pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
+    device_add(&keyboard_ps2_ami_device);
+    device_add(&sio_device);
+    device_add(&intel_flash_bxt_ami_device);
+
+    device_add(&i420tx_device);
+    device_add(&ncr53c810_onboard_pci_device);
+
+    if (fdc_type == FDC_INTERNAL)
+        device_add(&fdc_at_device);
+
+    return ret;
+}
+
 int
 machine_at_vi15g_init(const machine_t *model)
 {
@@ -790,7 +893,6 @@ machine_at_vi15g_init(const machine_t *model)
         return ret;
 
     machine_at_sis_85c471_common_init(model);
-    device_add(&ide_vlb_device);
     device_add(&keyboard_at_ami_device);
 
     return ret;
@@ -819,6 +921,29 @@ machine_at_greenb_init(const machine_t *model)
     return ret;
 }
 
+int
+machine_at_4gpv5_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/4gpv5/4GPV5.bin",
+                           0x000f0000, 65536, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init(model);
+
+    if (fdc_type == FDC_INTERNAL)
+        device_add(&fdc_at_device);
+
+    device_add(&contaq_82c596a_device);
+
+    device_add(&keyboard_at_device);
+
+    return ret;
+}
+
 static void
 machine_at_sis_85c496_common_init(UNUSED(const machine_t *model))
 {
@@ -939,6 +1064,33 @@ machine_at_4dps_init(const machine_t *model)
     return ret;
 }
 
+int
+machine_at_ms4144_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/ms4144/ms-4144-1.4.bin",
+                           0x000e0000, 131072, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init_ex(model, 2);
+
+    machine_at_sis_85c496_common_init(model);
+    device_add(&sis_85c496_ls486e_device);
+    pci_register_slot(0x03, PCI_CARD_NORMAL, 1, 2, 3, 4);
+    pci_register_slot(0x0D, PCI_CARD_NORMAL, 2, 3, 4, 1);
+    pci_register_slot(0x0F, PCI_CARD_NORMAL, 3, 4, 1, 2);
+
+    device_add(&w83787f_device);
+    device_add(&keyboard_at_ami_device);
+
+    device_add(&sst_flash_29ee010_device);
+
+    return ret;
+}
+
 int
 machine_at_486sp3c_init(const machine_t *model)
 {
@@ -1006,7 +1158,7 @@ machine_at_alfredo_init(const machine_t *model)
         return ret;
 
     machine_at_common_init(model);
-    device_add(&ide_pci_2ch_device);
+    device_add(&ide_pci_device);
 
     pci_init(PCI_CONFIG_TYPE_2 | PCI_NO_IRQ_STEERING);
     pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
@@ -1038,7 +1190,7 @@ machine_at_ninja_init(const machine_t *model)
 
     machine_at_common_init(model);
 
-    pci_init(PCI_CONFIG_TYPE_1 | PCI_NO_IRQ_STEERING);
+    pci_init(PCI_CONFIG_TYPE_1);
     pci_register_slot(0x05, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
     pci_register_slot(0x11, PCI_CARD_NORMAL,      1, 2, 1, 2);
     pci_register_slot(0x13, PCI_CARD_NORMAL,      2, 1, 2, 1);
@@ -1052,6 +1204,86 @@ machine_at_ninja_init(const machine_t *model)
     return ret;
 }
 
+int
+machine_at_bat4ip3e_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/bat4ip3e/404C.ROM",
+                           0x000e0000, 131072, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init(model);
+
+    pci_init(PCI_CONFIG_TYPE_1);
+    pci_register_slot(0x05, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
+    pci_register_slot(0x01, PCI_CARD_IDE,   0xfe, 0xff, 0, 0);
+    pci_register_slot(0x08, PCI_CARD_NORMAL,      1, 2, 1, 2);
+    pci_register_slot(0x09, PCI_CARD_NORMAL,      2, 1, 2, 1);
+    pci_register_slot(0x0a, PCI_CARD_NORMAL,      1, 2, 1, 2);
+
+    device_add(&phoenix_486_jumper_pci_device);
+    device_add(&keyboard_ps2_pci_device);
+    device_add(&i420ex_device);
+    device_add(&ide_cmd640_pci_device);
+    device_add(&fdc37c665_device);
+
+    return ret;
+}
+
+int
+machine_at_486pi_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/486pi/486pi.bin",
+                           0x000e0000, 131072, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init(model);
+
+    pci_init(PCI_CONFIG_TYPE_1);
+    pci_register_slot(0x05, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
+    pci_register_slot(0x12, PCI_CARD_NORMAL,      1, 2, 1, 2);
+    pci_register_slot(0x13, PCI_CARD_NORMAL,      2, 1, 2, 1);
+    pci_register_slot(0x14, PCI_CARD_NORMAL,      1, 2, 1, 2);
+
+    device_add(&keyboard_ps2_ami_pci_device);
+    device_add(&fdc37c665_device);
+    device_add(&i420ex_device);
+
+    return ret;
+}
+
+int
+machine_at_sb486p_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/sb486p/amiboot.rom",
+                           0x000e0000, 131072, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init(model);
+
+    pci_init(PCI_CONFIG_TYPE_1);
+    pci_register_slot(0x05, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
+    pci_register_slot(0x14, PCI_CARD_NORMAL,      1, 2, 1, 2);
+    pci_register_slot(0x13, PCI_CARD_NORMAL,      2, 1, 2, 1);
+
+    device_add(&keyboard_ps2_ami_pci_device);
+    device_add(&i82091aa_device);
+    device_add(&i420ex_device);
+
+    return ret;
+}
+
 int
 machine_at_486sp3_init(const machine_t *model)
 {
@@ -1085,6 +1317,36 @@ machine_at_486sp3_init(const machine_t *model)
     return ret;
 }
 
+int
+machine_at_amis76_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear_inverted("roms/machines/s76p/s76p.rom", 
+                                    0x000e0000, 131072, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init(model);
+    pci_init(PCI_CONFIG_TYPE_2 | PCI_NO_IRQ_STEERING);
+    pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
+    // pci_register_slot(0x01, PCI_CARD_IDE,         1, 2, 3 ,4);
+    pci_register_slot(0x0E, PCI_CARD_NORMAL,      1, 2, 3, 4);
+    pci_register_slot(0x0F, PCI_CARD_NORMAL,      2, 3, 4, 1);
+    pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
+    device_add(&keyboard_ps2_ami_pci_device);
+    device_add(&sio_device);
+    device_add(&fdc37c665_device);
+    device_add(&intel_flash_bxt_ami_device);
+
+    device_add(&i420tx_device);
+    // device_add(&ide_cmd640_pci_device); /* is this actually cmd640? is it single channel? */
+    device_add(&ide_pci_device);
+
+    return ret;
+}
+
 int
 machine_at_pci400cb_init(const machine_t *model)
 {
@@ -1098,7 +1360,6 @@ machine_at_pci400cb_init(const machine_t *model)
 
     machine_at_common_init_ex(model, 2);
     device_add(&ami_1994_nvr_device);
-    device_add(&ide_isa_device);
 
     pci_init(PCI_CONFIG_TYPE_1);
     pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
@@ -1130,7 +1391,6 @@ machine_at_g486ip_init(const machine_t *model)
 
     machine_at_common_init_ex(model, 2);
     device_add(&ami_1992_nvr_device);
-    device_add(&ide_isa_device);
 
     pci_init(PCI_CONFIG_TYPE_1);
     pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
@@ -1192,7 +1452,7 @@ machine_at_486ap4_init(const machine_t *model)
 
     machine_at_common_init(model);
 
-    pci_init(PCI_CONFIG_TYPE_1 | PCI_NO_IRQ_STEERING);
+    pci_init(PCI_CONFIG_TYPE_1);
     /* Excluded: 5, 6, 7, 8 */
     pci_register_slot(0x05, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
     pci_register_slot(0x09, PCI_CARD_NORMAL,      1, 2, 3, 4); /* 09 = Slot 1 */
@@ -1403,6 +1663,29 @@ machine_at_tf486_init(const machine_t *model)
 
     device_add(&ali1489_device);
     device_add(&w83977ef_device);
+    device_add(&keyboard_at_device);
+    device_add(&sst_flash_29ee010_device);
+
+    return ret;
+}
+
+int
+machine_at_arb1476_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/arb1476/w1476b.v21",
+                           0x000e0000, 131072, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init(model);
+    pci_init(PCI_CONFIG_TYPE_1);
+    pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
+
+    device_add(&ali1489_device);
+    device_add(&fdc37c669_device);
     device_add(&keyboard_ps2_device);
     device_add(&sst_flash_29ee010_device);
 
@@ -1492,6 +1775,30 @@ machine_at_arb1479_init(const machine_t *model)
     return ret;
 }
 
+int
+machine_at_iach488_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/iach488/FH48800B.980",
+                           0x000c0000, 262144, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init(model);
+
+    pci_init(PCI_CONFIG_TYPE_1);
+    pci_register_slot(0x0B, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
+    pci_register_slot(0x0C, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
+    device_add(&w83977f_device);
+    device_add(&keyboard_ps2_ami_pci_device);
+    device_add(&stpc_consumer2_device);
+    device_add(&sst_flash_29ee020_device);
+
+    return ret;
+}
+
 int
 machine_at_pcm9340_init(const machine_t *model)
 {
@@ -1580,7 +1887,7 @@ machine_at_ecs486_init(const machine_t *model)
 }
 
 int
-machine_at_hot433_init(const machine_t *model)
+machine_at_hot433a_init(const machine_t *model)
 {
     int ret;
 
@@ -1670,6 +1977,37 @@ machine_at_actionpc2600_init(const machine_t *model)
     return ret;
 }
 
+int
+machine_at_actiontower8400_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/actiontower8400/V31C.ROM",
+                           0x000e0000, 131072, 0);
+
+    if (bios_only || !ret)
+        return ret;
+    machine_at_common_init(model);
+
+    pci_init(PCI_CONFIG_TYPE_1);
+    pci_register_slot(0x10, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
+    pci_register_slot(0x12, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
+    if (gfxcard[0] == VID_INTERNAL)
+        pci_register_slot(0x15, PCI_CARD_VIDEO,   0, 0, 0, 0);
+    pci_register_slot(0x13, PCI_CARD_NORMAL,      1, 2, 3, 4);
+    pci_register_slot(0x14, PCI_CARD_NORMAL,      2, 3, 4, 1);
+
+    device_add(&umc_hb4_device);
+    device_add(&umc_8886af_device);
+    device_add(&fdc37c665_device);
+    device_add(&intel_flash_bxt_device); // The ActionPC 2600 has this so I'm gonna assume this does too.
+    device_add(&keyboard_ps2_ami_pci_device);
+    if (gfxcard[0] == VID_INTERNAL)
+        device_add(&gd5430_pci_device); // VBIOS not included in BIOS ROM
+
+    return ret;
+}
+
 int
 machine_at_m919_init(const machine_t *model)
 {
@@ -1821,3 +2159,92 @@ machine_at_tg486g_init(const machine_t *model)
 
     return ret;
 }
+
+int
+machine_at_dvent4xx_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/dvent4xx/Venturis466_BIOS.BIN",
+                           0x000e0000, 131072, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init(model);
+    device_add(&sis_85c471_device);
+    device_add(&ide_cmd640_vlb_pri_device);
+    device_add(&fdc37c665_ide_device);
+    device_add(&keyboard_ps2_device);
+
+    if (gfxcard[0] == VID_INTERNAL)
+        device_add(&s3_phoenix_trio32_onboard_vlb_device);
+
+    return ret;
+}
+
+int
+machine_at_ecsal486_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/ecsal486/ECS_AL486.BIN",
+                           0x000f0000, 65536, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init(model);
+
+    device_add(&ali1429g_device);
+    device_add(&keyboard_ps2_ami_pci_device);
+
+    if (fdc_type == FDC_INTERNAL)
+        device_add(&fdc_at_device);
+
+    return ret;
+}
+
+int
+machine_at_ap4100aa_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/ap4100aa/M27C512DIP28.BIN",
+                           0x000f0000, 65536, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init_ex(model, 2);
+
+    device_add(&ami_1994_nvr_device);
+    device_add(&ali1429g_device);
+    device_add(&keyboard_ps2_ami_pci_device);
+    device_add(&ide_vlb_device);
+    device_add(&um8669f_device); // needs um8663
+
+    return ret;
+}
+
+int
+machine_at_atc1762_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/atc1762/atc1762.bin",
+                           0x000f0000, 65536, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init(model);
+    device_add(&ali1429g_device);
+    device_add(&keyboard_ps2_ami_pci_device);
+
+    if (fdc_type == FDC_INTERNAL)
+        device_add(&fdc_at_device);
+
+
+    return ret;
+}

src/machine/m_at_compaq.c

@@ -795,11 +795,6 @@ machine_at_compaq_init(const machine_t *model, int type)
             break;
 
         case COMPAQ_PORTABLEIII:
-            if (gfxcard[0] == VID_INTERNAL)
-                device_add(&compaq_plasma_device);
-            machine_at_init(model);
-            break;
-
         case COMPAQ_PORTABLEIII386:
             if (hdc_current == 1)
                 device_add(&ide_isa_device);
@@ -810,8 +805,6 @@ machine_at_compaq_init(const machine_t *model, int type)
 
         case COMPAQ_DESKPRO386:
         case COMPAQ_DESKPRO386_05_1988:
-            if (hdc_current == 1)
-                device_add(&ide_isa_device);
             device_add(&compaq_386_device);
             machine_at_common_init(model);
             device_add(&keyboard_at_compaq_device);

src/machine/m_at_slot1.c

@@ -152,6 +152,42 @@ machine_at_spitfire_init(const machine_t *model)
     return ret;
 }
 
+int
+machine_at_ma30d_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/ma30d/BIOS.ROM",
+                           0x000c0000, 262144, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init_ex(model, 2);
+
+    pci_init(PCI_CONFIG_TYPE_1);
+    pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
+#ifdef UNKNOWN_SLOT
+    pci_register_slot(0x0A, PCI_CARD_NETWORK,     2, 3, 4, 1); /* ???? device - GPIO? */
+#endif
+    pci_register_slot(0x14, PCI_CARD_NORMAL,      1, 2, 3, 4);
+    pci_register_slot(0x12, PCI_CARD_NORMAL,      2, 3, 4, 1);
+    pci_register_slot(0x10, PCI_CARD_NORMAL,      3, 4, 1, 2);
+    pci_register_slot(0x0E, PCI_CARD_NORMAL,      4, 1, 2, 3);
+    pci_register_slot(0x0C, PCI_CARD_NORMAL,      1, 2, 3, 4);
+    pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
+    pci_register_slot(0x01, PCI_CARD_AGPBRIDGE,   3, 0, 0, 0);
+    device_add(&i440lx_device);
+    device_add(&piix4e_device);
+    device_add(&nec_mate_unk_device);
+    device_add(&keyboard_ps2_ami_pci_device);
+    device_add(&fdc37c67x_device);
+    device_add(&intel_flash_bxt_device);
+    spd_register(SPD_TYPE_SDRAM, 0x7, 256);
+
+    return ret;
+}
+
 int
 machine_at_p6i440e2_init(const machine_t *model)
 {
@@ -223,6 +259,37 @@ machine_at_p2bls_init(const machine_t *model)
     return ret;
 }
 
+int
+machine_at_lgibmx7g_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/lgibmx7g/ms6119.331",
+                           0x000c0000, 262144, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init_ex(model, 2);
+
+    pci_init(PCI_CONFIG_TYPE_1);
+    pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
+    pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
+    pci_register_slot(0x0E, PCI_CARD_NORMAL,      1, 2, 3, 4);
+    pci_register_slot(0x10, PCI_CARD_NORMAL,      2, 3, 4, 1);
+    pci_register_slot(0x12, PCI_CARD_NORMAL,      3, 4, 1, 2);
+    pci_register_slot(0x14, PCI_CARD_NORMAL,      4, 1, 2, 3);
+    pci_register_slot(0x01, PCI_CARD_AGPBRIDGE,   1, 2, 3, 4);
+    device_add(&i440bx_device);
+    device_add(&piix4e_device);
+    device_add(&keyboard_ps2_ami_pci_device);
+    device_add(&w83977tf_device);
+    device_add(&winbond_flash_w29c020_device);
+    spd_register(SPD_TYPE_SDRAM, 0x7, 256);
+
+    return ret;
+}
+
 int
 machine_at_p3bf_init(const machine_t *model)
 {

src/machine/m_at_socket370.c

@@ -141,6 +141,9 @@ machine_at_p6bap_init(const machine_t *model)
     device_add(&sst_flash_39sf020_device);
     spd_register(SPD_TYPE_SDRAM, 0x7, 256);
 
+    if (sound_card_current[0] == SOUND_INTERNAL)
+        device_add(&cmi8738_onboard_device);
+
     return ret;
 }
 

src/machine/m_at_socket4.c

@@ -45,7 +45,7 @@ void
 machine_at_premiere_common_init(const machine_t *model, int pci_switch)
 {
     machine_at_common_init(model);
-    device_add(&ide_pci_2ch_device);
+    device_add(&ide_pci_device);
 
     pci_init(PCI_CONFIG_TYPE_2 | pci_switch);
     pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
@@ -60,31 +60,6 @@ machine_at_premiere_common_init(const machine_t *model, int pci_switch)
     device_add(&intel_flash_bxt_ami_device);
 }
 
-void
-machine_at_award_common_init(const machine_t *model)
-{
-    machine_at_common_init(model);
-    device_add(&ide_pci_2ch_device);
-
-    pci_init(PCI_CONFIG_TYPE_2 | PCI_NO_IRQ_STEERING);
-    pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
-    pci_register_slot(0x01, PCI_CARD_IDE,         0, 0, 0, 0);
-    pci_register_slot(0x03, PCI_CARD_NORMAL,      1, 2, 3, 4); /* 03 = Slot 1 */
-    pci_register_slot(0x04, PCI_CARD_NORMAL,      2, 3, 4, 1); /* 04 = Slot 2 */
-    pci_register_slot(0x05, PCI_CARD_NORMAL,      3, 4, 1, 2); /* 05 = Slot 3 */
-    pci_register_slot(0x06, PCI_CARD_NORMAL,      4, 1, 2, 3); /* 06 = Slot 4 */
-    pci_register_slot(0x07, PCI_CARD_SCSI,        1, 2, 3, 4); /* 07 = SCSI   */
-    pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
-
-    if (fdc_type == FDC_INTERNAL)
-        device_add(&fdc_at_device);
-
-#if 0
-    device_add(&keyboard_ps2_pci_device);
-#endif
-    device_add(&keyboard_ps2_ami_pci_device);
-}
-
 void
 machine_at_sp4_common_init(const machine_t *model)
 {
@@ -181,7 +156,7 @@ machine_at_dellxp60_init(const machine_t *model)
         return ret;
 
     machine_at_common_init(model);
-    device_add(&ide_pci_2ch_device);
+    device_add(&ide_pci_device);
 
     pci_init(PCI_CONFIG_TYPE_2);
     pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
@@ -290,8 +265,8 @@ machine_at_revenge_init(const machine_t *model)
 {
     int ret;
 
-    ret = bios_load_linear_combined("roms/machines/revenge/1009af2_.bio",
-                                    "roms/machines/revenge/1009af2_.bi1",
+    ret = bios_load_linear_combined("roms/machines/revenge/1013af2_.bio",
+                                    "roms/machines/revenge/1013af2_.bi1",
                                     0x1c000, 128);
 
     if (bios_only || !ret)
@@ -304,12 +279,34 @@ machine_at_revenge_init(const machine_t *model)
     return ret;
 }
 
+void
+machine_at_award_common_init(const machine_t *model)
+{
+    machine_at_common_init(model);
+
+    pci_init(PCI_CONFIG_TYPE_2 | PCI_NO_IRQ_STEERING);
+    pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
+    pci_register_slot(0x03, PCI_CARD_NORMAL,      1, 2, 3, 4); /* 03 = Slot 1 */
+    pci_register_slot(0x04, PCI_CARD_NORMAL,      2, 3, 4, 1); /* 04 = Slot 2 */
+    pci_register_slot(0x05, PCI_CARD_NORMAL,      3, 4, 1, 2); /* 05 = Slot 3 */
+    pci_register_slot(0x06, PCI_CARD_NORMAL,      4, 1, 2, 3); /* 06 = Slot 4 */
+    pci_register_slot(0x07, PCI_CARD_SCSI,        1, 2, 3, 4); /* 07 = SCSI   */
+    pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
+
+    if (fdc_type == FDC_INTERNAL)
+        device_add(&fdc_at_device);
+
+    device_add(&keyboard_ps2_ami_pci_device);
+    device_add(&sio_zb_device);
+    device_add(&intel_flash_bxt_device);
+}
+
 int
-machine_at_586mc1_init(const machine_t *model)
+machine_at_586is_init(const machine_t *model)
 {
     int ret;
 
-    ret = bios_load_linear("roms/machines/586mc1/IS.34",
+    ret = bios_load_linear("roms/machines/586is/IS.34",
                            0x000e0000, 131072, 0);
 
     if (bios_only || !ret)
@@ -317,8 +314,6 @@ machine_at_586mc1_init(const machine_t *model)
 
     machine_at_award_common_init(model);
 
-    device_add(&sio_device);
-    device_add(&intel_flash_bxt_device);
     device_add(&i430lx_device);
 
     return ret;

src/machine/m_at_socket5.c

@@ -98,11 +98,11 @@ machine_at_ambradp90_init(const machine_t *model)
 }
 
 int
-machine_at_430nx_init(const machine_t *model)
+machine_at_586ip_init(const machine_t *model)
 {
     int ret;
 
-    ret = bios_load_linear("roms/machines/430nx/IP.20",
+    ret = bios_load_linear("roms/machines/586ip/IP.20",
                            0x000e0000, 131072, 0);
 
     if (bios_only || !ret)
@@ -110,13 +110,41 @@ machine_at_430nx_init(const machine_t *model)
 
     machine_at_award_common_init(model);
 
-    device_add(&sio_device);
-    device_add(&intel_flash_bxt_device);
     device_add(&i430nx_device);
 
     return ret;
 }
 
+int
+machine_at_tek932_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/tek932/B932_019.BIN",
+                           0x000e0000, 131072, 0);
+
+    if (bios_only || !ret)
+        return ret;
+    
+    machine_at_common_init(model);
+
+    pci_init(PCI_CONFIG_TYPE_2 | PCI_CAN_SWITCH_TYPE);
+    pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
+    pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
+    pci_register_slot(0x0F, PCI_CARD_NORMAL,      2, 3, 4, 1);
+    pci_register_slot(0x0E, PCI_CARD_NORMAL,      3, 4, 1, 2);
+    pci_register_slot(0x0D, PCI_CARD_NORMAL,      4, 1, 2, 3);
+    pci_register_slot(0x0C, PCI_CARD_NORMAL,      1, 3, 2, 4);
+    device_add(&keyboard_ps2_intel_ami_pci_device);
+    device_add(&i430nx_device);
+    device_add(&sio_zb_device);
+    device_add(&fdc37c665_ide_device);
+    device_add(&ide_vlb_device);
+    device_add(&intel_flash_bxt_ami_device);
+
+    return ret;
+}
+
 int
 machine_at_acerv30_init(const machine_t *model)
 {
@@ -297,6 +325,35 @@ machine_at_hawk_init(const machine_t *model)
     return ret;
 }
 
+int
+machine_at_pt2000_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/ficpt2000/PT2000_v1.01.BIN",
+                           0x000e0000, 131072, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init(model);
+
+    pci_init(PCI_CONFIG_TYPE_1);
+    pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
+    pci_register_slot(0x08, PCI_CARD_NORMAL,      1, 2, 3, 4);
+    pci_register_slot(0x09, PCI_CARD_NORMAL,      2, 3, 4, 1);
+    pci_register_slot(0x0A, PCI_CARD_NORMAL,      3, 4, 1, 2);
+    pci_register_slot(0x0B, PCI_CARD_NORMAL,      4, 1, 2, 3);
+    pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
+    device_add(&keyboard_ps2_ami_pci_device);
+    device_add(&i430fx_device);
+    device_add(&piix_device);
+    device_add(&pc87332_398_device);
+    device_add(&intel_flash_bxt_device);
+
+    return ret;
+}
+
 int
 machine_at_pat54pv_init(const machine_t *model)
 {
@@ -349,6 +406,36 @@ machine_at_hot543_init(const machine_t *model)
     return ret;
 }
 
+int
+machine_at_ncselp90_init(const machine_t *model)
+{
+    int ret;
+
+    ret = bios_load_linear("roms/machines/ncselp90/elegancep90.bin",
+                           0x000e0000, 131072, 0);
+
+    if (bios_only || !ret)
+        return ret;
+
+    machine_at_common_init(model);
+
+    pci_init(PCI_CONFIG_TYPE_1);
+    pci_register_slot(0x10, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
+    pci_register_slot(0x11, PCI_CARD_NORMAL,      1, 2, 3, 4);
+    pci_register_slot(0x12, PCI_CARD_NORMAL,      2, 3, 4, 1);
+    pci_register_slot(0x13, PCI_CARD_NORMAL,      3, 4, 1, 2);
+
+    device_add(&opti5x7_pci_device);
+    device_add(&opti822_device);
+    device_add(&sst_flash_29ee010_device);
+    device_add(&keyboard_ps2_ami_pci_device);
+    device_add(&ide_opti611_vlb_device);
+    device_add(&fdc37c665_ide_sec_device);
+    device_add(&ide_vlb_2ch_device);
+
+    return ret;
+}
+
 int
 machine_at_p54sp4_init(const machine_t *model)
 {