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synced 2026-02-25 04:45:31 -07:00
Hook up Bidirectional LPT, EPP, and ECP to all Super I/O chips (missing is vendor-specific Configuration Register B behavior but that's next on my list), fixed Super I/O chip mistakes for a number of machines, split 286/386SX/M6117D machines into three separate files and reordered them as well.
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@@ -53,6 +53,7 @@ typedef struct lpt_t {
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uint8_t epp;
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uint8_t ecp;
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uint8_t ecr;
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uint8_t ret_ecr;
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uint8_t in_dat;
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uint8_t fifo_stat;
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uint8_t dma_stat;
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@@ -61,8 +62,11 @@ typedef struct lpt_t {
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uint8_t strobe;
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uint8_t lv2;
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uint8_t cnfga_readout;
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uint8_t cfg_regs_enabled;
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uint8_t inst;
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uint8_t pad[5];
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uint8_t eir;
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uint8_t pad[2];
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uint8_t ext_regs[8];
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uint16_t addr;
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uint16_t id;
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uint16_t pad0[2];
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@@ -101,6 +105,8 @@ extern uint8_t lpt_read(uint16_t port, void *priv);
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extern uint8_t lpt_read_port(lpt_t *dev, uint16_t reg);
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extern uint8_t lpt_read_status(lpt_t *dev);
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extern uint8_t lpt_read_ecp_mode(lpt_t *dev);
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extern void lpt_irq(void *priv, int raise);
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extern int lpt_device_get_from_internal_name(const char *str);
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@@ -125,6 +131,7 @@ extern void lpt_set_ext(lpt_t *dev, uint8_t ext);
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extern void lpt_set_ecp(lpt_t *dev, uint8_t ecp);
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extern void lpt_set_epp(lpt_t *dev, uint8_t epp);
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extern void lpt_set_lv2(lpt_t *dev, uint8_t lv2);
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extern void lpt_set_cfg_regs_enabled(lpt_t *dev, uint8_t cfg_regs_enabled);
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extern void lpt_set_fifo_threshold(lpt_t *dev, int threshold);
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extern void lpt_set_cnfga_readout(lpt_t *dev, const uint8_t cnfga_readout);
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extern void lpt_port_setup(lpt_t *dev, uint16_t port);
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