diff --git a/src/include/86box/nv/vid_nv3.h b/src/include/86box/nv/vid_nv3.h index 80307a5ea..96d9d3dd1 100644 --- a/src/include/86box/nv/vid_nv3.h +++ b/src/include/86box/nv/vid_nv3.h @@ -908,7 +908,7 @@ extern const device_config_t nv3t_config[]; // Confi // These are nvidia, licensed from weitek (25-63) #define NV3_CRTC_REGISTER_RPC0 0x19 // 7:5 - [10:8] of CRTC. 4:0 - [20:16] of 21-bit display buffer address -#define NV3_CRTC_REGISTER_RPC1 0x1A // What does this mean? +#define NV3_CRTC_REGISTER_RPC1 0x1A // bit7=hsync enabled, bit6=vsync enabled, bit4="compatible text", bit2=large screen, bit1=6bit palette width (>1280) #define NV3_CRTC_REGISTER_READ_BANK 0x1D #define NV3_CRTC_REGISTER_WRITE_BANK 0x1E #define NV3_CRTC_REGISTER_FORMAT 0x25 @@ -921,8 +921,8 @@ extern const device_config_t nv3t_config[]; // Confi #define NV3_CRTC_REGISTER_HEB 0x2D // HRS most significant bit -#define NV3_CRTC_REGISTER_CURSOR_ADDR0 0x30 // Cursor high -#define NV3_CRTC_REGISTER_CURSOR_ADDR1 0x31 // Cursor low (1:0 = enable) +#define NV3_CRTC_REGISTER_CURSOR_ADDR0 0x30 // Cursor high 21:16 +#define NV3_CRTC_REGISTER_CURSOR_ADDR1 0x31 // Cursor low (1:0 = enable) 15:11 #define NV3_CRTC_REGISTER_PIXELMODE_VGA 0x00 // vga textmode #define NV3_CRTC_REGISTER_PIXELMODE_8BPP 0x01 @@ -1413,7 +1413,7 @@ typedef struct nv3_ptimer_s } nv3_ptimer_t; // Object name is just a uint32_t identifier it doesn't need a struct -// This is howt he cotnext is represented in ramin +// This is how the context is represented in ramin // IN PGRAPH IT IS DIFFERENT! ONLY 5 BITS FOR THE CLASS ID! WHY? typedef struct nv3_ramin_context_s { diff --git a/src/video/CMakeLists.txt b/src/video/CMakeLists.txt index 6f9693e5a..fa6887b50 100644 --- a/src/video/CMakeLists.txt +++ b/src/video/CMakeLists.txt @@ -192,7 +192,6 @@ add_library(vid OBJECT # Generic vid_bochs_vbe.c - ) if(G100) diff --git a/src/video/nv/nv3/nv3_core.c b/src/video/nv/nv3/nv3_core.c index e97c5fa1f..273582f84 100644 --- a/src/video/nv/nv3/nv3_core.c +++ b/src/video/nv/nv3/nv3_core.c @@ -585,7 +585,7 @@ void nv3_recalc_timings(svga_t* svga) nv3_t* nv3 = (nv3_t*)svga->priv; uint32_t pixel_mode = svga->crtc[NV3_CRTC_REGISTER_PIXELMODE] & 0x03; - svga->ma_latch += (svga->crtc[NV3_CRTC_REGISTER_RPC0] & 0x1F) << 16; + svga->memaddr_latch += (svga->crtc[NV3_CRTC_REGISTER_RPC0] & 0x1F) << 16; /* Turn off override if we are in VGA mode */ svga->override = !(pixel_mode == NV3_CRTC_REGISTER_PIXELMODE_VGA); diff --git a/src/video/nv/nv3/subsystems/nv3_pbus.c b/src/video/nv/nv3/subsystems/nv3_pbus.c index 16934998c..a2e340e85 100644 --- a/src/video/nv/nv3/subsystems/nv3_pbus.c +++ b/src/video/nv/nv3/subsystems/nv3_pbus.c @@ -164,13 +164,8 @@ uint8_t nv3_pbus_rma_read(uint16_t addr) ret = nv3_mmio_read8(real_final_address, NULL); else { - // ABOVE CODE IS TEMPORARY UNTIL PNVM EXISTS!!!!! - // would svga->fast work? - nv3->nvbase.svga.chain4 = true; - nv3->nvbase.svga.packed_chain4 = true; - ret = svga_read_linear((real_final_address - NV3_MMIO_SIZE) & (nv3->nvbase.svga.vram_max - 1), &nv3->nvbase.svga); - nv3->nvbase.svga.chain4 = false; - nv3->nvbase.svga.packed_chain4 = false; + /* Do we need to read RAMIN here? */ + ret = nv3->nvbase.svga.vram[real_final_address - NV3_MMIO_SIZE] & (nv3->nvbase.svga.vram_max - 1); } // log current location for vbios RE @@ -246,11 +241,8 @@ void nv3_pbus_rma_write(uint16_t addr, uint8_t val) nv3_mmio_write32(nv3->pbus.rma.addr, nv3->pbus.rma.data, NULL); else // failsafe code, i don't think you will ever write outside of VRAM? { - nv3->nvbase.svga.chain4 = true; - nv3->nvbase.svga.packed_chain4 = true; - svga_writel_linear((nv3->pbus.rma.addr - NV3_MMIO_SIZE) & (nv3->nvbase.svga.vram_max - 1), nv3->pbus.rma.data, &nv3->nvbase.svga); - nv3->nvbase.svga.chain4 = false; - nv3->nvbase.svga.packed_chain4 = false; + uint32_t* vram_32 = (uint32_t*)nv3->nvbase.svga.vram; + vram_32[(nv3->pbus.rma.addr - NV3_MMIO_SIZE) >> 2] = nv3->pbus.rma.data; } diff --git a/src/video/nv/nv3/subsystems/nv3_pramin.c b/src/video/nv/nv3/subsystems/nv3_pramin.c index 4cd6d10c3..59e3dcdbc 100644 --- a/src/video/nv/nv3/subsystems/nv3_pramin.c +++ b/src/video/nv/nv3/subsystems/nv3_pramin.c @@ -202,7 +202,7 @@ void nv3_pfifo_interrupt(uint32_t id, bool fire_now) /* RAMIN access arbitration functions -Arbitrates reads and writes to RAMFC (unused dma context storage), RAMRO (invalid object submission location), RAMHT (hashtable for graphics objectstorage) (RAMAU?) +Arbitrates reads and writes to RAMFC (unused dma context storage), RAMRO (invalid object submission location), RAMHT (hashtable for graphics objectstorage) unused audio memory (RAMAU?) and generic RAMIN Takes a pointer to a result integer. This is because we need to check its result in our normal write function.