diff --git a/src/include/86box/nv/vid_nv3.h b/src/include/86box/nv/vid_nv3.h
index 8f136944c..1e9b8064c 100644
--- a/src/include/86box/nv/vid_nv3.h
+++ b/src/include/86box/nv/vid_nv3.h
@@ -24,6 +24,11 @@ extern const device_config_t nv3_config[];
 
 #define NV3_MMIO_SIZE                                   0x1000000       // Max MMIO size
 
+#define NV3_LFB_RAMIN_MIRROR_START                      0x400000        // Mirror of ramin (VERIFY ON HARDWARE)
+#define NV3_LFB_2NDHALF_START                           0x800000        // The second half of LFB(?)
+#define NV3_LFB_RAMIN_START                             0xC00000        // RAMIN mapping start
+#define NV3_LFB_MAPPING_SIZE                            0x400000        // Size of RAMIN
+
 // various vbioses for testing
 // Coming soon: MIROmagic Premium BIOS (when I get mine dumped)
 //todo: move to hash system
diff --git a/src/video/nv/nv3/nv3_core.c b/src/video/nv/nv3/nv3_core.c
index 83b198461..c185200f4 100644
--- a/src/video/nv/nv3/nv3_core.c
+++ b/src/video/nv/nv3/nv3_core.c
@@ -696,9 +696,10 @@ void nv3_update_mappings()
     // LFB_BASE+VRAM_SIZE=RAMIN Mirror(?)                                                   0x1400000 (VERIFY PCBOX)
     // LFB_BASE+VRAM_SIZE*2=LFB Mirror(?)                                                   0x1800000            
     // LFB_BASE+VRAM_SIZE*3=Definitely RAMIN (then it ends, the total ram space is 16mb)    0x1C00000
-    mem_mapping_set_addr(&nv3->nvbase.ramin_mapping_mirror, nv3->nvbase.bar1_lfb_base + VRAM_SIZE_4MB, VRAM_SIZE_4MB);
-    mem_mapping_set_addr(&nv3->nvbase.framebuffer_mapping_mirror, nv3->nvbase.bar1_lfb_base + (VRAM_SIZE_4MB * 2), VRAM_SIZE_4MB);
-    mem_mapping_set_addr(&nv3->nvbase.ramin_mapping, nv3->nvbase.bar1_lfb_base + (VRAM_SIZE_4MB * 3), VRAM_SIZE_4MB);
+
+    mem_mapping_set_addr(&nv3->nvbase.ramin_mapping_mirror, nv3->nvbase.bar1_lfb_base + NV3_LFB_RAMIN_MIRROR_START, NV3_LFB_MAPPING_SIZE);
+    mem_mapping_set_addr(&nv3->nvbase.framebuffer_mapping_mirror, nv3->nvbase.bar1_lfb_base + NV3_LFB_2NDHALF_START, NV3_LFB_MAPPING_SIZE);
+    mem_mapping_set_addr(&nv3->nvbase.ramin_mapping, nv3->nvbase.bar1_lfb_base + NV3_LFB_RAMIN_START, NV3_LFB_MAPPING_SIZE);
             // TODO: RAMIN and its mirror
 
     // Did we change the banked SVGA mode?
@@ -751,6 +752,8 @@ void* nv3_init(const device_t *info)
     else    
             nv_log("NV3: Successfully loaded VBIOS %s located at %s\n", vbios_id, vbios_file);
 
+    uint32_t vram_amount = device_get_config_int("VRAM");
+
     // set up the bus and start setting up SVGA core
     if (nv3->nvbase.bus_generation == nv_bus_pci)
     {
@@ -758,7 +761,7 @@ void* nv3_init(const device_t *info)
 
         pci_add_card(PCI_ADD_NORMAL, nv3_pci_read, nv3_pci_write, NULL, &nv3->nvbase.pci_slot);
 
-        svga_init(&nv3_device_pci, &nv3->nvbase.svga, nv3, VRAM_SIZE_4MB, 
+        svga_init(&nv3_device_pci, &nv3->nvbase.svga, nv3, vram_amount, 
         nv3_recalc_timings, nv3_svga_in, nv3_svga_out, nv3_draw_cursor, NULL);
     }
     else if (nv3->nvbase.bus_generation == nv_bus_agp_1x)
@@ -767,7 +770,7 @@ void* nv3_init(const device_t *info)
 
         pci_add_card(PCI_ADD_AGP, nv3_pci_read, nv3_pci_write, NULL, &nv3->nvbase.pci_slot);
 
-        svga_init(&nv3_device_agp, &nv3->nvbase.svga, nv3, VRAM_SIZE_4MB, 
+        svga_init(&nv3_device_agp, &nv3->nvbase.svga, nv3, vram_amount, 
         nv3_recalc_timings, nv3_svga_in, nv3_svga_out, nv3_draw_cursor, NULL);
     }
 
diff --git a/src/video/nv/nv3/nv3_core_config.c b/src/video/nv/nv3/nv3_core_config.c
index 7a5bf10ea..f23286693 100644
--- a/src/video/nv/nv3/nv3_core_config.c
+++ b/src/video/nv/nv3/nv3_core_config.c
@@ -96,6 +96,7 @@ const device_config_t nv3_config[] =
         .name = "VRAM",
         .description = "VRAM",
         .type = CONFIG_SELECTION,
+        .default_int = VRAM_SIZE_4MB,
         .selection = 
         {
             // This never existed officially but was planned. Same for 64-bit bus. Debug only
diff --git a/src/video/nv/nv3/subsystems/nv3_pbus.c b/src/video/nv/nv3/subsystems/nv3_pbus.c
index a344d8627..fddedd5cf 100644
--- a/src/video/nv/nv3/subsystems/nv3_pbus.c
+++ b/src/video/nv/nv3/subsystems/nv3_pbus.c
@@ -152,7 +152,7 @@ uint8_t nv3_pbus_rma_read(uint16_t addr)
                 // would svga->fast work?
                 nv3->nvbase.svga.chain4 = true;
                 nv3->nvbase.svga.packed_chain4 = true;
-                ret = svga_read_linear((real_final_address - NV3_MMIO_SIZE) & (VRAM_SIZE_4MB - 1), &nv3->nvbase.svga);
+                ret = svga_read_linear((real_final_address - NV3_MMIO_SIZE) & (nv3->nvbase.svga.vram_max - 1), &nv3->nvbase.svga);
                 nv3->nvbase.svga.chain4 = false;
                 nv3->nvbase.svga.packed_chain4 = false;
             }
@@ -234,7 +234,7 @@ void nv3_pbus_rma_write(uint16_t addr, uint8_t val)
                 {
                     nv3->nvbase.svga.chain4 = true;
                     nv3->nvbase.svga.packed_chain4 = true;
-                    svga_writel_linear((nv3->pbus.rma.addr - NV3_MMIO_SIZE) & (VRAM_SIZE_4MB - 1), nv3->pbus.rma.data, &nv3->nvbase.svga);
+                    svga_writel_linear((nv3->pbus.rma.addr - NV3_MMIO_SIZE) & (nv3->nvbase.svga.vram_max - 1), nv3->pbus.rma.data, &nv3->nvbase.svga);
                     nv3->nvbase.svga.chain4 = false;
                     nv3->nvbase.svga.packed_chain4 = false;
                 }
diff --git a/src/video/nv/nv3/subsystems/nv3_pramin.c b/src/video/nv/nv3/subsystems/nv3_pramin.c
index cef9597c9..9750e2f4c 100644
--- a/src/video/nv/nv3/subsystems/nv3_pramin.c
+++ b/src/video/nv/nv3/subsystems/nv3_pramin.c
@@ -43,10 +43,10 @@
 // Read 8-bit ramin
 uint8_t nv3_ramin_read8(uint32_t addr, void* priv)
 {
-    addr &= (VRAM_SIZE_4MB - 1);
+    addr &= (nv3->nvbase.svga.vram_max - 1);
     uint32_t raw_addr = addr; // saved after and
 
-    addr ^= (VRAM_SIZE_4MB - 0x10);
+    addr ^= (nv3->nvbase.svga.vram_max- 0x10);
 
     uint8_t val = nv3->nvbase.svga.vram[addr];
 
@@ -58,14 +58,14 @@ uint8_t nv3_ramin_read8(uint32_t addr, void* priv)
 // Read 16-bit ramin
 uint16_t nv3_ramin_read16(uint32_t addr, void* priv)
 {
-    addr &= (VRAM_SIZE_4MB - 1);
+    addr &= (nv3->nvbase.svga.vram_max - 1);
 
     // why does this not work in one line
     svga_t* svga = &nv3->nvbase.svga;
     uint16_t* vram_16bit = (uint16_t*)svga->vram;
     uint32_t raw_addr = addr; // saved after and
 
-    addr ^= (VRAM_SIZE_4MB - 0x10);
+    addr ^= (nv3->nvbase.svga.vram_max - 0x10);
     addr >>= 1; // what
 
     uint16_t val = vram_16bit[addr]; // what
@@ -78,14 +78,14 @@ uint16_t nv3_ramin_read16(uint32_t addr, void* priv)
 // Read 32-bit ramin
 uint32_t nv3_ramin_read32(uint32_t addr, void* priv)
 {
-    addr &= (VRAM_SIZE_4MB - 1);
+    addr &= (nv3->nvbase.svga.vram_max - 1);
 
     // why does this not work in one line
     svga_t* svga = &nv3->nvbase.svga;
     uint32_t* vram_32bit = (uint32_t*)svga->vram;
     uint32_t raw_addr = addr; // saved after and
 
-    addr ^= (VRAM_SIZE_4MB - 0x10);
+    addr ^= (nv3->nvbase.svga.vram_max - 0x10);
     addr >>= 2; // what
 
     uint32_t val = vram_32bit[addr];
@@ -98,14 +98,14 @@ uint32_t nv3_ramin_read32(uint32_t addr, void* priv)
 // Write 8-bit ramin
 void nv3_ramin_write8(uint32_t addr, uint8_t val, void* priv)
 {
-    addr &= (VRAM_SIZE_4MB - 1);
+    addr &= (nv3->nvbase.svga.vram_max - 1);
     uint32_t raw_addr = addr; // saved after and
 
     // Structures in RAMIN are stored from the bottom of vram up in reverse order
     // this can be explained without bitwise math like so:
     // real VRAM address = VRAM_size - (ramin_address - (ramin_address % reversal_unit_size)) - reversal_unit_size + (ramin_address % reversal_unit_size) 
     // reversal unit size in this case is 16 bytes, vram size is 2-8mb (but 8mb is zx/nv3t only and 2mb...i haven't found a 22mb card)
-    addr ^= (VRAM_SIZE_4MB - 0x10);
+    addr ^= (nv3->nvbase.svga.vram_max - 0x10);
 
     nv3->nvbase.svga.vram[addr] = val;
 
@@ -115,14 +115,14 @@ void nv3_ramin_write8(uint32_t addr, uint8_t val, void* priv)
 // Write 16-bit ramin
 void nv3_ramin_write16(uint32_t addr, uint16_t val, void* priv)
 {
-    addr &= (VRAM_SIZE_4MB - 1);
+    addr &= (nv3->nvbase.svga.vram_max- 1);
 
     // why does this not work in one line
     svga_t* svga = &nv3->nvbase.svga;
     uint16_t* vram_16bit = (uint16_t*)svga->vram;
     uint32_t raw_addr = addr; // saved after and
 
-    addr ^= (VRAM_SIZE_4MB - 0x10);
+    addr ^= (nv3->nvbase.svga.vram_max - 0x10);
     addr >>= 1; // what
 
     vram_16bit[addr] = val;
@@ -133,14 +133,14 @@ void nv3_ramin_write16(uint32_t addr, uint16_t val, void* priv)
 // Write 32-bit ramin
 void nv3_ramin_write32(uint32_t addr, uint32_t val, void* priv)
 {
-    addr &= (VRAM_SIZE_4MB - 1);
+    addr &= (nv3->nvbase.svga.vram_max - 1);
 
     // why does this not work in one line
     svga_t* svga = &nv3->nvbase.svga;
     uint32_t* vram_32bit = (uint32_t*)svga->vram;
     uint32_t raw_addr = addr; // saved after and
 
-    addr ^= (VRAM_SIZE_4MB - 0x10);
+    addr ^= (nv3->nvbase.svga.vram_max - 0x10);
     addr >>= 2; // what
 
     vram_32bit[addr] = val;