From eb0429fddb8fa236fc6939f70c94d0f170ea8b96 Mon Sep 17 00:00:00 2001
From: Jasmine Iwanek <jasmine@iwanek.co.uk>
Date: Tue, 15 Nov 2022 20:28:24 -0500
Subject: [PATCH] Updates

---
 src/chipset/intel_815ep.c           | 1 -
 src/chipset/intel_ich2.c            | 4 +---
 src/device/hwm_nsc366.c             | 1 -
 src/device/intel_ich2_gpio.c        | 1 -
 src/device/intel_ich2_trap.c        | 1 -
 src/include/86box/acpi.h            | 2 +-
 src/include/86box/intel_ich2_gpio.h | 1 -
 src/include/86box/intel_ich2_trap.h | 1 -
 src/include/86box/nsc366.h          | 1 -
 src/include/86box/tco.h             | 1 -
 src/mem/815ep_spd_hack.c            | 1 -
 src/mem/sst_flash.c                 | 1 -
 src/sio/sio_nsc366.c                | 1 -
 13 files changed, 2 insertions(+), 15 deletions(-)

diff --git a/src/chipset/intel_815ep.c b/src/chipset/intel_815ep.c
index 7c2b06fa0..6d15d5d0f 100644
--- a/src/chipset/intel_815ep.c
+++ b/src/chipset/intel_815ep.c
@@ -15,7 +15,6 @@
  *
  *          Copyright 2022 Tiseno100.
  *          Copyright 2022 Jasmine Iwanek.
- *
  */
 
 #include <stdarg.h>
diff --git a/src/chipset/intel_ich2.c b/src/chipset/intel_ich2.c
index ac467007d..945aeb2df 100644
--- a/src/chipset/intel_ich2.c
+++ b/src/chipset/intel_ich2.c
@@ -15,7 +15,6 @@
  *
  *          Copyright 2022 Tiseno100.
  *          Copyright 2022 Jasmine Iwanek.
- *
  */
 
 #include <stdarg.h>
@@ -147,8 +146,7 @@ intel_ich2_pirq_update(int reset, int addr, uint8_t val)
     if (((val & 0x80) != 0x80) && !reset) {                                            /* 86Box doesn't have an APIC yet.                          */
         intel_ich2_log("Intel ICH2 LPC: Update PIRQ %c to IRQ %d\n", '@' + pirq, val); /* Under normal circumstances on an APIC enabled motherboard*/
         pci_set_irq_routing(pirq, intel_ich2_pirq_table(val));                         /* this remains disabled and the IRQ are handed by the APIC */
-    }                                                                                  /* itself.                                                  */
-    else if (reset)
+    } else if (reset)                                                                  /* itself.                                                  */
         for (int i = 1; i <= 8; i++)
             pci_set_irq_routing(i, PCI_IRQ_DISABLED);
 }
diff --git a/src/device/hwm_nsc366.c b/src/device/hwm_nsc366.c
index 34e5bd930..696b1a8ea 100644
--- a/src/device/hwm_nsc366.c
+++ b/src/device/hwm_nsc366.c
@@ -13,7 +13,6 @@
  * Authors: Tiseno100,
  *
  *          Copyright 2022 Tiseno100.
- *
  */
 
 /* The conversion algorithms were taken by the pc87360.c driver of the Linux kernel.
diff --git a/src/device/intel_ich2_gpio.c b/src/device/intel_ich2_gpio.c
index 2c79ef87b..81c17de63 100644
--- a/src/device/intel_ich2_gpio.c
+++ b/src/device/intel_ich2_gpio.c
@@ -13,7 +13,6 @@
  * Authors: Tiseno100,
  *
  *          Copyright 2022 Tiseno100.
- *
  */
 
 #include <stdarg.h>
diff --git a/src/device/intel_ich2_trap.c b/src/device/intel_ich2_trap.c
index 856aff788..177548072 100644
--- a/src/device/intel_ich2_trap.c
+++ b/src/device/intel_ich2_trap.c
@@ -13,7 +13,6 @@
  * Authors: Tiseno100,
  *
  *          Copyright 2022 Tiseno100.
- *
  */
 
 #include <stdarg.h>
diff --git a/src/include/86box/acpi.h b/src/include/86box/acpi.h
index 8337807ec..8b5d3560d 100644
--- a/src/include/86box/acpi.h
+++ b/src/include/86box/acpi.h
@@ -21,7 +21,7 @@
 extern "C" {
 #endif
 
-#include <86box/tco.h> /* TCO Header. Needed for the Intel ICH chipsets. */
+#include <86box/tco.h>
 
 #define ACPI_TIMER_FREQ 3579545
 #define PM_FREQ         ACPI_TIMER_FREQ
diff --git a/src/include/86box/intel_ich2_gpio.h b/src/include/86box/intel_ich2_gpio.h
index 86acf944f..457ebc823 100644
--- a/src/include/86box/intel_ich2_gpio.h
+++ b/src/include/86box/intel_ich2_gpio.h
@@ -13,7 +13,6 @@
  * Authors: Tiseno100,
  *
  *          Copyright 2022 Tiseno100.
- *
  */
 
 #ifndef EMU_INTEL_ICH2_GPIO_H
diff --git a/src/include/86box/intel_ich2_trap.h b/src/include/86box/intel_ich2_trap.h
index fb6814450..49f290edf 100644
--- a/src/include/86box/intel_ich2_trap.h
+++ b/src/include/86box/intel_ich2_trap.h
@@ -13,7 +13,6 @@
  * Authors: Tiseno100,
  *
  *          Copyright 2022 Tiseno100.
- *
  */
 
 #ifndef EMU_INTEL_ICH2_TRAP_H
diff --git a/src/include/86box/nsc366.h b/src/include/86box/nsc366.h
index 6f8c1b5f8..4b392aa4e 100644
--- a/src/include/86box/nsc366.h
+++ b/src/include/86box/nsc366.h
@@ -13,7 +13,6 @@
  * Authors: Tiseno100,
  *
  *          Copyright 2022 Tiseno100.
- *
  */
 
 #ifndef EMU_NSC_366_H
diff --git a/src/include/86box/tco.h b/src/include/86box/tco.h
index aa2706560..60ab049d7 100644
--- a/src/include/86box/tco.h
+++ b/src/include/86box/tco.h
@@ -13,7 +13,6 @@
  * Authors: Tiseno100,
  *
  *          Copyright 2022 Tiseno100.
- *
  */
 
 #ifndef EMU_TCO_H
diff --git a/src/mem/815ep_spd_hack.c b/src/mem/815ep_spd_hack.c
index fef53cfe4..febc378fe 100644
--- a/src/mem/815ep_spd_hack.c
+++ b/src/mem/815ep_spd_hack.c
@@ -13,7 +13,6 @@
  * Authors: Tiseno100,
  *
  *          Copyright 2022 Tiseno100.
- *
  */
 
 /* This is a hack because the 86Box SPD calculation algorithm is not made for the 815EP banking.
diff --git a/src/mem/sst_flash.c b/src/mem/sst_flash.c
index ca25f8844..40b6dd948 100644
--- a/src/mem/sst_flash.c
+++ b/src/mem/sst_flash.c
@@ -19,7 +19,6 @@
  *          Copyright 2020 Melissa Goad.
  *          Copyright 2022 Jasmine Iwanek.
  */
-
 #include <stdio.h>
 #include <stdint.h>
 #include <string.h>
diff --git a/src/sio/sio_nsc366.c b/src/sio/sio_nsc366.c
index 30baf743d..ed1136d87 100644
--- a/src/sio/sio_nsc366.c
+++ b/src/sio/sio_nsc366.c
@@ -14,7 +14,6 @@
  * Authors: Tiseno100,
  *
  *          Copyright 2022 Tiseno100.
- *
  */
 
 #include <stdarg.h>