mirror of
https://github.com/86Box/86Box.git
synced 2026-02-25 12:55:32 -07:00
Run PTIMER at a reasonable speed. Fix I2C register.s This means we actually for real get beyond stateGr and now try to accelerate rendering
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@@ -63,8 +63,8 @@ uint8_t nv3_mmio_read8(uint32_t addr, void* priv)
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ret = nv3_svga_in(real_address, nv3);
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nv_log("NV3: Redirected MMIO read8 to SVGA: addr=0x%04x returned 0x%02x", addr, ret);
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nv_log("NV3: Redirected MMIO read8 to SVGA: addr=0x%04x returned 0x%02x\n", addr, ret);
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return ret;
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}
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@@ -94,7 +94,7 @@ uint16_t nv3_mmio_read16(uint32_t addr, void* priv)
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ret = nv3_svga_in(real_address, nv3)
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| (nv3_svga_in(real_address + 1, nv3) << 8);
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nv_log("NV3: Redirected MMIO read16 to SVGA: addr=0x%04x returned 0x%04x", addr, ret);
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nv_log("NV3: Redirected MMIO read16 to SVGA: addr=0x%04x returned 0x%04x\n", addr, ret);
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return ret;
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}
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@@ -126,7 +126,7 @@ uint32_t nv3_mmio_read32(uint32_t addr, void* priv)
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| (nv3_svga_in(real_address + 2, nv3) << 16)
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| (nv3_svga_in(real_address + 3, nv3) << 24);
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nv_log("NV3: Redirected MMIO read32 to SVGA: addr=0x%04x returned 0x%08x", addr, ret);
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nv_log("NV3: Redirected MMIO read32 to SVGA: addr=0x%04x returned 0x%08x\n", addr, ret);
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return ret;
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}
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@@ -152,7 +152,7 @@ void nv3_mmio_write8(uint32_t addr, uint8_t val, void* priv)
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// svga writes are not logged anyway rn
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uint32_t real_address = addr & 0x3FF;
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nv_log("NV3: Redirected MMIO write8 to SVGA: addr=0x%04x val=0x%02x", addr, val);
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nv_log("NV3: Redirected MMIO write8 to SVGA: addr=0x%04x val=0x%02x\n", addr, val);
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nv3_svga_out(real_address, val & 0xFF, nv3);
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return;
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@@ -183,7 +183,7 @@ void nv3_mmio_write16(uint32_t addr, uint16_t val, void* priv)
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// svga writes are not logged anyway rn
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uint32_t real_address = addr & 0x3FF;
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nv_log("NV3: Redirected MMIO write16 to SVGA: addr=0x%04x val=0x%04x", addr, val);
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nv_log("NV3: Redirected MMIO write16 to SVGA: addr=0x%04x val=0x%04x\n", addr, val);
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nv3_svga_out(real_address, val & 0xFF, nv3);
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nv3_svga_out(real_address + 1, (val >> 8) & 0xFF, nv3);
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@@ -215,7 +215,7 @@ void nv3_mmio_write32(uint32_t addr, uint32_t val, void* priv)
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// svga writes are not logged anyway rn
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uint32_t real_address = addr & 0x3FF;
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nv_log("NV3: Redirected MMIO write32 to SVGA: addr=0x%04x val=0x%08x", addr, val);
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nv_log("NV3: Redirected MMIO write32 to SVGA: addr=0x%04x val=0x%08x\n", addr, val);
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nv3_svga_out(real_address, val & 0xFF, nv3);
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nv3_svga_out(real_address + 1, (val >> 8) & 0xFF, nv3);
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@@ -704,7 +704,7 @@ void nv3_svga_out(uint16_t addr, uint8_t val, void* priv)
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case NV3_CRTC_REGISTER_RMA:
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nv3->pbus.rma.mode = val & NV3_CRTC_REGISTER_RMA_MODE_MAX;
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break;
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case NV3_CRTC_REGISTER_I2C:
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case NV3_CRTC_REGISTER_I2C_GPIO:
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uint8_t scl = !!(val & 0x20);
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uint8_t sda = !!(val & 0x10);
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// Set an I2C GPIO register
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@@ -50,18 +50,16 @@ void nv3_pramdac_init()
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// Polls the pixel clock.
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// This updates the 2D/3D engine PGRAPH
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void nv3_pramdac_pixel_clock_poll()
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void nv3_pramdac_pixel_clock_poll(double real_time)
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{
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// TODO: UPDATE PGRAPH!
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// TODO: ????
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}
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// Polls the memory clock.
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void nv3_pramdac_memory_clock_poll()
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void nv3_pramdac_memory_clock_poll(double real_time)
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{
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//nv3_t* nv3_poll = (nv3_t*)priv;
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// Let's hope qeeg was right here.
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nv3_ptimer_tick();
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nv3_ptimer_tick(real_time);
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// TODO: UPDATE PGRAPH!
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}
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// Gets the vram clock register.
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@@ -120,10 +118,8 @@ void nv3_pramdac_set_vram_clock()
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nv_log("NV3: Memory clock = %.2f MHz\n", frequency / 1000000.0f);
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nv3->nvbase.memory_clock_period = time;
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nv3->nvbase.memory_clock_frequency = frequency;
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//timer_on_auto(&nv3->nvbase.memory_clock_timer, nv3->nvbase.memory_clock_period);
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// Create and start if it it's not running.
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if (!nv3->nvbase.memory_clock_timer)
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{
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@@ -170,7 +166,7 @@ void nv3_pramdac_set_pixel_clock()
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nv_log("NV3: Pixel clock = %.2f MHz\n", frequency / 1000000.0f);
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nv3->nvbase.pixel_clock_period = time;
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nv3->nvbase.pixel_clock_frequency = frequency;
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// Create and start if it it's not running.
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if (!nv3->nvbase.pixel_clock_timer)
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@@ -57,7 +57,7 @@ void nv3_ptimer_interrupt(uint32_t num)
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}
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// Ticks the timer.
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void nv3_ptimer_tick()
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void nv3_ptimer_tick(double real_time)
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{
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// do not divide by zero
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if (nv3->ptimer.clock_numerator == 0
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@@ -67,7 +67,14 @@ void nv3_ptimer_tick()
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// get the current time
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// Due to timer system limitations, the timer system is not capable of running at 100 megahertz. Therefore, we have to scale it down and then scale up the level of changes
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// to the state.
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double current_time = ((double)nv3->ptimer.clock_numerator * NV3_86BOX_TIMER_SYSTEM_FIX_QUOTIENT) / (double)nv3->ptimer.clock_denominator; // *10.0?
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// See Envytools. We need to use the frequency as a source.
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// But we need to figure out how many cycles actually occurred because this counts up every cycle...
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// Convert to microseconds
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double freq_base = (real_time / 1000000.0f) / ((double)1.0 / nv3->nvbase.memory_clock_frequency);
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double current_time = freq_base * ((double)nv3->ptimer.clock_numerator * NV3_86BOX_TIMER_SYSTEM_FIX_QUOTIENT) / (double)nv3->ptimer.clock_denominator; // *10.0?
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// Logging is suppressed when reading this register because it is read many times
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// So we only log when we update.
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@@ -59,7 +59,7 @@ void rivatimer_init()
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}
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// Creates a rivatimer.
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rivatimer_t* rivatimer_create(double period, void (*callback)())
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rivatimer_t* rivatimer_create(double period, void (*callback)(double real_time))
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{
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rivatimer_t* new_rivatimer = NULL;
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@@ -210,7 +210,7 @@ void rivatimer_update_all()
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continue;
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}
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rivatimer_ptr->callback();
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rivatimer_ptr->callback(microseconds);
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}
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rivatimer_ptr = rivatimer_ptr->next;
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@@ -254,7 +254,7 @@ double rivatimer_get_time(rivatimer_t* rivatimer_ptr)
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return rivatimer_ptr->time;
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}
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void rivatimer_set_callback(rivatimer_t* rivatimer_ptr, void (*callback)())
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void rivatimer_set_callback(rivatimer_t* rivatimer_ptr, void (*callback)(double real_time))
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{
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if (!rivatimer_really_exists(rivatimer_ptr))
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fatal("rivatimer_set_callback: The timer has been destroyed, or never existed in the first place. Punch starfrost in the face");
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