Commit Graph

2011 Commits

Author SHA1 Message Date
Miran Grča
430fa409ce S3 ViRGE: Remove an excess masking line. 2025-10-01 17:52:29 +02:00
Miran Grča
fc506d02e1 S3 ViRGE: Fix the LFB mappigs to operate in accordance with the documentation.
Fix certain UVCONFIG-using games at 16 or 32 MB of machine RAM.
2025-10-01 17:45:48 +02:00
Cacodemon345
4a6327da68 S3 ViRGE: Move sign bit 1 bit further to the right for K2 scaler registers (#6243)
* Fix sign position of DDA accumulator registers

* S3 ViRGE: Move sign bit 1 bit further to the right for K1/K2 scaler registers

* K1 scales are 13 bits
2025-09-27 21:58:07 +02:00
Cacodemon345
bc41f8bbb6 Fix sign position of DDA accumulator registers (#6241) 2025-09-27 19:57:12 +02:00
Cacodemon345
3fd58dde8f Implement YUV aperture on Mach64 VT2 (#6234)
Some GDBSTUB fixes
2025-09-27 13:32:00 +02:00
Miran Grča
810f17c50f Merge pull request #6192 from 86Box/feature/int-cast
Add integer casting macros
2025-09-22 00:55:49 +02:00
Cacodemon345
0b0bf2e438 Fix overflow crashes in certain cases 2025-09-21 17:39:40 +06:00
OBattler
e736dbc694 CL-GD 5436: Correct the ICS SB486PV check. 2025-09-21 12:24:17 +02:00
Jasmine Iwanek
3c5190a0db Header cleanups (1/2) 2025-09-21 00:48:38 -04:00
RichardG867
7c25ca22e3 Convert existing code to the integer casting macros 2025-09-19 20:09:29 -03:00
RichardG867
25146643f9 Migrate remaining machine-specific checks from internal name to init function 2025-09-19 19:41:01 -03:00
Miran Grča
d8380b07a9 ET4000/W32* PCI: Revert BIOS read/write code to PCem's, fixes #6175. 2025-09-16 23:50:45 +02:00
TC1995
c3a6e826b4 S3 928 and icd2061 mode rework (September 15th, 2025)
The rework resolves around implementing the clock multiplier and multiplexing rate of the bt485 ramdac alongside existing additional flags for eventual fixes (like cr31 bit 1) as well as the true color bypass (for 16-bit and true color modes). These, together, allow proper rendering of the generic VESA S3 drivers alongside non-VESA ELSA OEM drivers on various guests.
2025-09-15 17:48:24 +02:00
OBattler
82ad957380 PCjr: Fix 320x200x4 mode. 2025-09-14 19:16:55 +02:00
starfrost013
57ae731e22 Goodbye, 32-bit 2025-09-14 01:32:41 +01:00
OBattler
60d502daad (S)VGA pel panning: values above 7 behave like 7. 2025-09-10 00:28:05 +02:00
TC1995
3a67c54687 Overriding changes (September 9th, 2025)
Dealing with 3D card overriding with XGA/IBM 8514/A compatibles again...
2025-09-09 23:07:29 +02:00
OBattler
e630a8fa25 (S)VGA: Implement some level of pel shift memorization. 2025-09-09 21:50:49 +02:00
OBattler
51c2328949 (S)VGA: Implement odd pel shifts in 256-color modes. 2025-09-09 20:11:59 +02:00
OBattler
91d7bb3839 (S)VGA render: remove an excess logging line. 2025-09-09 01:29:47 +02:00
TC1995
3a703d0c0d Last minute changes for the high color S3 911/924 mode
Read mask initialized to 0xff allows proper colors on initial boot of Windows.
2025-09-09 00:18:14 +02:00
TC1995
8bb6444c7a Latest video fixes of the day (September 8th, 2025)
On soft-reset, reset the Misc Multifunc (0x0D/0x0E) values to sane defaults per manuals.
2025-09-08 22:59:34 +02:00
OBattler
84d96271de Implement the Super MegaZeux text mode. 2025-09-08 22:27:39 +02:00
Cacodemon345
22ba8b32c1 Add support for Trio3D/2X's 8-bit palette DAC 2025-09-08 15:37:11 +06:00
OBattler
a13bc2d532 EGA: Remove an excess logging line. 2025-09-07 23:31:07 +02:00
Cacodemon345
569827ce02 MGA: Implement unscaled YUV blits for ILOAD 2025-09-07 14:19:09 +06:00
TC1995
a6becc3158 Major video changes and fixes of the day (September 7th, 2025)
1. Rewritten Sierra SC1502x RAMDAC code to match the manual, allowing proper BPP selection on cards which use it.
2. Added a reference clock variable for cards which have a different default one (ELSA cards namely) on the ICD2061 code.
3. Reorganized RAMDAC selection in the S3 code.
4. Added more ELSA Winner cards based on the 928 chip (ELSA Winner 2000 ISA, 1000 VLB and 1000 PCI based on 928PCI).
5. The horizontal override is now also enabled for ELSA Winner 1000 (928 VLB and PCI) cards with 32bpp set, to avoid wrong horizontal displays.
6. LFB in PCI mode doesn't have the same limitations as on VLB or ISA.
7. Added more hdisp adjustments for the Elsa cards.
8. Mono patterns are now more correct in ROPBLT acceleration (command 14), fixes blackness in some instances of Win95 (matching the 968 manual).
9. Minor cleanup on the accel registers.
2025-09-07 01:01:03 +02:00
TC1995
5f06561469 EEPROM use changes and misc (September 3rd, 2025)
1.Move the 93cxx EEPROM implementation to the mem directory since it's used by cards which are not nics (e.g.: DC390 SCSI and S3 ELSA cards).
2. DC390 specific: remove the implementation used there and use the generic one from mem (used to be on the network directory) as well as fixing bus reset when interrupts are related.
3. S3: when the 64k size is selected in the LFB, use the SVGA 64k mapping as LFB (0xA0000).
2025-09-03 00:49:27 +02:00
OBattler
d8b7b25820 Rename MGA DMA states to MGA_DMA_STATE in preparation for the 6.0 CPU rewrite. 2025-09-02 22:47:13 +02:00
David Hrdlička
54fc345ee5 Fix warning 2025-09-02 10:28:58 +02:00
David Hrdlička
37a1aaa721 Rename file, add copyright header 2025-09-02 00:30:05 +02:00
David Hrdlička
8ab80ca26f Fix sign warnings 2025-09-02 00:18:36 +02:00
David Hrdlička
948e18945b Fix seeking in text mode 2025-09-02 00:06:41 +02:00
David Hrdlička
33c0f2eba8 Fix 2025-09-01 18:43:46 +02:00
David Hrdlička
043e2b6baa Rewrite custom EDID loading 2025-09-01 18:35:56 +02:00
Miran Grča
8529f1aa06 Merge pull request #6117 from Cacodemon345/edid-decode-text
Add support for parsing edid-decode text dumps
2025-09-01 12:44:13 +02:00
Cacodemon345
52f3ed1b42 Add support for parsing edid-decode text dumps 2025-09-01 13:21:59 +06:00
TC1995
0261e04365 S3 changes of the night (September 1st, 2025)
1. If a card uses the icd2061a clock, so be it in a better way.
2. Vertical display fixes for heights greater than 1024 pixels, e.g.: 1600x1200 on the ELSA 96x cards.
3. Misc fixes (ROPBLT).
4. 0x3ca and 0x3cb in read mode are actually different from writes.
2025-09-01 00:24:32 +02:00
OBattler
1b173963fe Fix the timings of the non-Elsa S3 Vision cards with the IBM RGB528 RAMDAC. 2025-08-31 20:44:40 +02:00
OBattler
28d678476d Implement the ELSA S3 EEPROM, the RGB528 RAMDAC clock selection, and fix split calculation on all the S3 cards (ViRGE included). 2025-08-31 19:35:04 +02:00
OBattler
3338a59283 S3 Trio32: Fix cursor in 15-bpp and 16-bpp mode. 2025-08-30 18:25:08 +02:00
Tiago Gasiba
331278084d Display::Name -> VMManager::Display::Name + changes for FreeBSD 2025-08-28 16:48:24 +02:00
Cacodemon345
68f9c87a85 Recalculate svga->fast on Voodoo 3/Banshee packed Chain4 mode toggles
Fixes Star Wars TIE Fighter 256-color screens after switching back from high-resolution modes.
2025-08-27 18:01:33 +06:00
Cacodemon345
b072745fd7 Revert "Voodoo 3/Banshee: Do not use the 16-bit and 32-bit handlers for legacy VRAM accesses, fixes #6072."
This reverts commit 993884c14c.
2025-08-27 17:57:57 +06:00
OBattler
993884c14c Voodoo 3/Banshee: Do not use the 16-bit and 32-bit handlers for legacy VRAM accesses, fixes #6072. 2025-08-27 13:01:00 +02:00
OBattler
e42ce145b1 Fixed C&T SuperEGA timings. 2025-08-27 03:37:31 +02:00
OBattler
08edbaff83 Implement the line doubling type selection for the Tandy machines as well. 2025-08-27 03:18:27 +02:00
OBattler
120a6e8b8b Implemented it for the PCjr as well. 2025-08-27 01:47:41 +02:00
OBattler
c0fe1ceea5 Implement the line doubling mode selection on the Amstrad PC1512 and PC1640, with None as default, and make the None mode on all 4 cards (the two Amstrads, CGA, and Yamaha V6355) operate like PCem. 2025-08-27 00:46:17 +02:00
OBattler
497f702c17 Merge branch 'master' of https://github.com/86Box/86Box 2025-08-26 18:00:34 +02:00