mirror of
https://github.com/86Box/86Box.git
synced 2026-02-23 09:58:19 -07:00
Thoroughly clean up the code to vastly reduce the number of compiler warnings and found and fixed several bugs in the process; Applied all mainline PCem commits; Added SCSI hard disk emulation; Commented out all unfinished machines and graphics cards; Added the AOpen AP53 and ASUS P/I-P55T2 machines as well as another Tyan 440FX machine, all three with AMI WinBIOS (patch from TheCollector1995); Added the Diamond Stealth 3D 3000 (S3 ViRGE/VX) graphics card (patch from TheCollector1995); Added the PS/2 XT IDE (AccuLogic) HDD Controller (patch from TheCollector1995); Added Microsoft/Logitech Bus Mouse emulation (patch from waltje); Overhauled the makefiles (patch from waltje); Added the Adaptec AHA-1542CF SCSI controller (patch from waltje); Added preliminary (but still unfinished) Adaptec AHA-154x SCSI controller BIOS support (patch from waltje); Added an ISABugger debugging device (patch from waltje); Added sanity checks to the Direct3D code.
165 lines
4.8 KiB
C
165 lines
4.8 KiB
C
/* Copyright holders: Sarah Walker
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see COPYING for more details
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*/
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#include <stdint.h>
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#include "ibm.h"
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#include "io.h"
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#include "mem.h"
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#include "pci.h"
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void (*pci_card_write[32])(int func, int addr, uint8_t val, void *priv);
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uint8_t (*pci_card_read[32])(int func, int addr, void *priv);
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void *pci_priv[32];
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static uint8_t pci_index, pci_func, pci_card, pci_bus, pci_enable, pci_key;
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static int pci_min_card, pci_max_card;
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int pci_burst_time, pci_nonburst_time;
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void pci_cf8_write(uint16_t port, uint32_t val, void *p)
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{
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pci_index = val & 0xff;
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pci_func = (val >> 8) & 7;
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pci_card = (val >> 11) & 31;
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pci_bus = (val >> 16) & 0xff;
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pci_enable = (val >> 31) & 1;
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}
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uint32_t pci_cf8_read(uint16_t port, void *p)
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{
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return pci_index | (pci_func << 8) | (pci_card << 11) | (pci_bus << 16) | (pci_enable << 31);
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}
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void pci_write(uint16_t port, uint8_t val, void *priv)
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{
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switch (port)
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{
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case 0xcfc: case 0xcfd: case 0xcfe: case 0xcff:
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if (!pci_enable)
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return;
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if (!pci_bus && pci_card_write[pci_card])
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pci_card_write[pci_card](pci_func, pci_index | (port & 3), val, pci_priv[pci_card]);
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break;
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}
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}
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uint8_t pci_read(uint16_t port, void *priv)
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{
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switch (port)
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{
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case 0xcfc: case 0xcfd: case 0xcfe: case 0xcff:
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if (!pci_enable)
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return 0xff;
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if (!pci_bus && pci_card_read[pci_card])
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return pci_card_read[pci_card](pci_func, pci_index | (port & 3), pci_priv[pci_card]);
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return 0xff;
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default:
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return 0xff;
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}
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}
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void pci_type2_write(uint16_t port, uint8_t val, void *priv);
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uint8_t pci_type2_read(uint16_t port, void *priv);
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void pci_type2_write(uint16_t port, uint8_t val, void *priv)
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{
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if (port == 0xcf8)
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{
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pci_func = (val >> 1) & 7;
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if (!pci_key && (val & 0xf0))
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io_sethandler(0xc000, 0x1000, pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL);
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else
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io_removehandler(0xc000, 0x1000, pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL);
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pci_key = val & 0xf0;
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}
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else if (port == 0xcfa)
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{
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pci_bus = val;
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}
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else
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{
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pci_card = (port >> 8) & 0xf;
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pci_index = port & 0xff;
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if (!pci_bus && pci_card_write[pci_card])
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pci_card_write[pci_card](pci_func, pci_index | (port & 3), val, pci_priv[pci_card]);
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}
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}
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uint8_t pci_type2_read(uint16_t port, void *priv)
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{
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if (port == 0xcf8)
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{
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return pci_key | (pci_func << 1);
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}
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else if (port == 0xcfa)
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{
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return pci_bus;
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}
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else
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{
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pci_card = (port >> 8) & 0xf;
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pci_index = port & 0xff;
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if (!pci_bus && pci_card_write[pci_card])
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return pci_card_read[pci_card](pci_func, pci_index | (port & 3), pci_priv[pci_card]);
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}
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return 0xff;
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}
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void pci_init(int type, int min_card, int max_card)
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{
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int c;
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PCI = 1;
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if (type == PCI_CONFIG_TYPE_1)
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{
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io_sethandler(0x0cf8, 0x0001, NULL, NULL, pci_cf8_read, NULL, NULL, pci_cf8_write, NULL);
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io_sethandler(0x0cfc, 0x0004, pci_read, NULL, NULL, pci_write, NULL, NULL, NULL);
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}
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else
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{
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io_sethandler(0x0cf8, 0x0001, pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL);
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io_sethandler(0x0cfa, 0x0001, pci_type2_read, NULL, NULL, pci_type2_write, NULL, NULL, NULL);
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}
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for (c = 0; c < 32; c++)
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{
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pci_card_read[c] = NULL;
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pci_card_write[c] = NULL;
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pci_priv[c] = NULL;
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}
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pci_min_card = min_card;
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pci_max_card = max_card;
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}
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void pci_add_specific(int card, uint8_t (*read)(int func, int addr, void *priv), void (*write)(int func, int addr, uint8_t val, void *priv), void *priv)
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{
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pci_card_read[card] = read;
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pci_card_write[card] = write;
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pci_priv[card] = priv;
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}
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void pci_add(uint8_t (*read)(int func, int addr, void *priv), void (*write)(int func, int addr, uint8_t val, void *priv), void *priv)
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{
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int c;
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for (c = pci_min_card; c <= pci_max_card; c++)
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{
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if (!pci_card_read[c] && !pci_card_write[c])
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{
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pci_card_read[c] = read;
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pci_card_write[c] = write;
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pci_priv[c] = priv;
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return;
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}
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}
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}
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