mirror of
https://github.com/86Box/86Box.git
synced 2026-02-23 18:08:20 -07:00
Cleaned up the parallel port emulation, added IRQ support, and made enabling/disabling per port; Added the Award 430NX and the Intel Classic/PCI (Alfredo, 420TX); Finished the 586MC1; Added 8087 emulation; Moved Cyrix 6x86'es to the Dev branch; Sanitized/cleaned up memregs.c/h and intel.c/h; Split the chipsets from machines and sanitized Port 92 emulation; Added support for the 15bpp mode to the Compaq ATI 28800; Moved the MR 386DX and 486 machines to the Dev branch; Ported the new dynamic recompiler from PCem, but it remains in Dev branch until after v2.00; Ported the new timer code from PCem; Cleaned up the CPU table of unused stuff and better optimized its structure; Ported the Open-XT and Open-AT from VARCem, the Open-AT is in the Dev branch; Ported the XT MFM controller rewrite and adding of more controllers (incl. two RLL ones), from VARCem; Added the AHA-1540A and the BusTek BT-542B; Moved the Sumo SCSI-AT to the Dev branch; Minor IDE, FDC, and floppy drive code clean-ups; Made NCR 5380/53C400-based cards' BIOS address configurable; Got rid of the legacy romset variable; Unified (video) buffer and buffer32 into one and make the unified buffer 32-bit; Added the Amstead PPC512 per PCem patch by John Elliott; Switched memory mapping granularity from 16k to 4k (less than 1k not possible due to internal pages); Rewrote the CL-GD 54xx blitter, fixes Win-OS/2 on the 54x6 among other thing; Added the Image Manager 1024 and Professional Graphics Controller per PCem patch by John Elliott and work done on VARCem; Added Headland HT-216, GC-205 and Video 7 VGA 1024i emulation based on PCem commit; Implemented the fuction keys for the Toshiba T1000/T1200/T3100 enhancement; Amstrad MegaPC does now works correctly with non-internal graphics card; The SLiRP code no longer casts a packed struct type to a non-packed struct type; The Xi8088 and PB410a no longer hang on 86Box when PS/2 mouse is not present; The S3 Virge on BeOS is no longer broken (was broken by build #1591); OS/2 2.0 build 6.167 now sees key presses again; Xi8088 now work on CGA again; 86F images converted from either the old or new variants of the HxC MFM format now work correctly; Hardware interrupts with a vector of 0xFF are now handled correctly; OPTi 495SX boards no longer incorrectly have 64 MB maximum RAM when 32 MB is correct; Fixed VNC keyboard input bugs; Fixed AT RTC periodic interrupt - Chicago 58s / 73f / 73g / 81 MIDI play no longer hangs with the build's own VTD driver; Fixed mouse polling with internal mice - Amstrad and Olivetti mice now work correctly; Triones ATAPI DMA driver now correctly reads a file at the end of a CD image with a sectors number not divisible by 4; Compaq Portable now works with all graphics cards; Fixed various MDSI Genius bugs; Added segment limit checks and improved page fault checks for several CPU instructions - Memphis 15xx WINSETUP and Chicago 58s WINDISK.CPL no longer issue a GPF, and some S3 drivers that used to have glitches, now work correctly; Further improved the 808x emulation, also fixes the noticably choppy sound when using 808x CPU's, also fixes #355; OS/2 installer no logner locks up on splash screen on PS/2 Model 70 and 80, fixes #400. Fixed several Amstead bugs, GEM no longer crashes on the Amstrad 1640, fixes #391. Ported John Elliott's Amstrad fixes and improvement from PCem, and fixed the default language so it's correctly Engliish, fixes #278, fixes #389. Fixed a minor IDE timing bug, fixes #388. Fixed Toshiba T1000 RAM issues, fixes #379. Fixed EGA/(S)VGA overscan border handling, fixes #378; Got rid of the now long useless IDE channel 2 auto-removal, fixes #370; Fixed the BIOS files used by the AMSTRAD PC1512, fixes #366; Ported the Unicode CD image file name fix from VARCem, fixes #365; Fixed high density floppy disks on the Xi8088, fixes #359; Fixed some bugs in the Hercules emulation, fixes #346, fixes #358; Fixed the SCSI hard disk mode sense pages, fixes #356; Removed the AMI Unknown 386SX because of impossibility to identify the chipset, closes #349; Fixed bugs in the serial mouse emulation, fixes #344; Compiled 86Box binaries now include all the required .DLL's, fixes #341; Made some combo boxes in the Settings dialog slightly wider, fixes #276.
526 lines
16 KiB
C
526 lines
16 KiB
C
/* Copyright holders: Sarah Walker
|
|
see COPYING for more details
|
|
*/
|
|
extern int tempc;
|
|
|
|
enum
|
|
{
|
|
FLAGS_UNKNOWN,
|
|
|
|
FLAGS_ZN8,
|
|
FLAGS_ZN16,
|
|
FLAGS_ZN32,
|
|
|
|
FLAGS_ADD8,
|
|
FLAGS_ADD16,
|
|
FLAGS_ADD32,
|
|
|
|
FLAGS_SUB8,
|
|
FLAGS_SUB16,
|
|
FLAGS_SUB32,
|
|
|
|
FLAGS_SHL8,
|
|
FLAGS_SHL16,
|
|
FLAGS_SHL32,
|
|
|
|
FLAGS_SHR8,
|
|
FLAGS_SHR16,
|
|
FLAGS_SHR32,
|
|
|
|
FLAGS_SAR8,
|
|
FLAGS_SAR16,
|
|
FLAGS_SAR32,
|
|
|
|
FLAGS_INC8,
|
|
FLAGS_INC16,
|
|
FLAGS_INC32,
|
|
|
|
FLAGS_DEC8,
|
|
FLAGS_DEC16,
|
|
FLAGS_DEC32
|
|
};
|
|
|
|
static __inline int ZF_SET()
|
|
{
|
|
switch (cpu_state.flags_op)
|
|
{
|
|
case FLAGS_ZN8:
|
|
case FLAGS_ZN16:
|
|
case FLAGS_ZN32:
|
|
case FLAGS_ADD8:
|
|
case FLAGS_ADD16:
|
|
case FLAGS_ADD32:
|
|
case FLAGS_SUB8:
|
|
case FLAGS_SUB16:
|
|
case FLAGS_SUB32:
|
|
case FLAGS_SHL8:
|
|
case FLAGS_SHL16:
|
|
case FLAGS_SHL32:
|
|
case FLAGS_SHR8:
|
|
case FLAGS_SHR16:
|
|
case FLAGS_SHR32:
|
|
case FLAGS_SAR8:
|
|
case FLAGS_SAR16:
|
|
case FLAGS_SAR32:
|
|
case FLAGS_INC8:
|
|
case FLAGS_INC16:
|
|
case FLAGS_INC32:
|
|
case FLAGS_DEC8:
|
|
case FLAGS_DEC16:
|
|
case FLAGS_DEC32:
|
|
return !cpu_state.flags_res;
|
|
|
|
case FLAGS_UNKNOWN:
|
|
return cpu_state.flags & Z_FLAG;
|
|
|
|
default:
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
static __inline int NF_SET()
|
|
{
|
|
switch (cpu_state.flags_op)
|
|
{
|
|
case FLAGS_ZN8:
|
|
case FLAGS_ADD8:
|
|
case FLAGS_SUB8:
|
|
case FLAGS_SHL8:
|
|
case FLAGS_SHR8:
|
|
case FLAGS_SAR8:
|
|
case FLAGS_INC8:
|
|
case FLAGS_DEC8:
|
|
return cpu_state.flags_res & 0x80;
|
|
|
|
case FLAGS_ZN16:
|
|
case FLAGS_ADD16:
|
|
case FLAGS_SUB16:
|
|
case FLAGS_SHL16:
|
|
case FLAGS_SHR16:
|
|
case FLAGS_SAR16:
|
|
case FLAGS_INC16:
|
|
case FLAGS_DEC16:
|
|
return cpu_state.flags_res & 0x8000;
|
|
|
|
case FLAGS_ZN32:
|
|
case FLAGS_ADD32:
|
|
case FLAGS_SUB32:
|
|
case FLAGS_SHL32:
|
|
case FLAGS_SHR32:
|
|
case FLAGS_SAR32:
|
|
case FLAGS_INC32:
|
|
case FLAGS_DEC32:
|
|
return cpu_state.flags_res & 0x80000000;
|
|
|
|
case FLAGS_UNKNOWN:
|
|
return cpu_state.flags & N_FLAG;
|
|
|
|
default:
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
static __inline int PF_SET()
|
|
{
|
|
switch (cpu_state.flags_op)
|
|
{
|
|
case FLAGS_ZN8:
|
|
case FLAGS_ZN16:
|
|
case FLAGS_ZN32:
|
|
case FLAGS_ADD8:
|
|
case FLAGS_ADD16:
|
|
case FLAGS_ADD32:
|
|
case FLAGS_SUB8:
|
|
case FLAGS_SUB16:
|
|
case FLAGS_SUB32:
|
|
case FLAGS_SHL8:
|
|
case FLAGS_SHL16:
|
|
case FLAGS_SHL32:
|
|
case FLAGS_SHR8:
|
|
case FLAGS_SHR16:
|
|
case FLAGS_SHR32:
|
|
case FLAGS_SAR8:
|
|
case FLAGS_SAR16:
|
|
case FLAGS_SAR32:
|
|
case FLAGS_INC8:
|
|
case FLAGS_INC16:
|
|
case FLAGS_INC32:
|
|
case FLAGS_DEC8:
|
|
case FLAGS_DEC16:
|
|
case FLAGS_DEC32:
|
|
return znptable8[cpu_state.flags_res & 0xff] & P_FLAG;
|
|
|
|
case FLAGS_UNKNOWN:
|
|
return cpu_state.flags & P_FLAG;
|
|
|
|
default:
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
static __inline int VF_SET()
|
|
{
|
|
switch (cpu_state.flags_op)
|
|
{
|
|
case FLAGS_ZN8:
|
|
case FLAGS_ZN16:
|
|
case FLAGS_ZN32:
|
|
case FLAGS_SAR8:
|
|
case FLAGS_SAR16:
|
|
case FLAGS_SAR32:
|
|
return 0;
|
|
|
|
case FLAGS_ADD8:
|
|
case FLAGS_INC8:
|
|
return !((cpu_state.flags_op1 ^ cpu_state.flags_op2) & 0x80) && ((cpu_state.flags_op1 ^ cpu_state.flags_res) & 0x80);
|
|
case FLAGS_ADD16:
|
|
case FLAGS_INC16:
|
|
return !((cpu_state.flags_op1 ^ cpu_state.flags_op2) & 0x8000) && ((cpu_state.flags_op1 ^ cpu_state.flags_res) & 0x8000);
|
|
case FLAGS_ADD32:
|
|
case FLAGS_INC32:
|
|
return !((cpu_state.flags_op1 ^ cpu_state.flags_op2) & 0x80000000) && ((cpu_state.flags_op1 ^ cpu_state.flags_res) & 0x80000000);
|
|
|
|
case FLAGS_SUB8:
|
|
case FLAGS_DEC8:
|
|
return ((cpu_state.flags_op1 ^ cpu_state.flags_op2) & (cpu_state.flags_op1 ^ cpu_state.flags_res) & 0x80);
|
|
case FLAGS_SUB16:
|
|
case FLAGS_DEC16:
|
|
return ((cpu_state.flags_op1 ^ cpu_state.flags_op2) & (cpu_state.flags_op1 ^ cpu_state.flags_res) & 0x8000);
|
|
case FLAGS_SUB32:
|
|
case FLAGS_DEC32:
|
|
return ((cpu_state.flags_op1 ^ cpu_state.flags_op2) & (cpu_state.flags_op1 ^ cpu_state.flags_res) & 0x80000000);
|
|
|
|
case FLAGS_SHL8:
|
|
return (((cpu_state.flags_op1 << cpu_state.flags_op2) ^ (cpu_state.flags_op1 << (cpu_state.flags_op2 - 1))) & 0x80);
|
|
case FLAGS_SHL16:
|
|
return (((cpu_state.flags_op1 << cpu_state.flags_op2) ^ (cpu_state.flags_op1 << (cpu_state.flags_op2 - 1))) & 0x8000);
|
|
case FLAGS_SHL32:
|
|
return (((cpu_state.flags_op1 << cpu_state.flags_op2) ^ (cpu_state.flags_op1 << (cpu_state.flags_op2 - 1))) & 0x80000000);
|
|
|
|
case FLAGS_SHR8:
|
|
return ((cpu_state.flags_op2 == 1) && (cpu_state.flags_op1 & 0x80));
|
|
case FLAGS_SHR16:
|
|
return ((cpu_state.flags_op2 == 1) && (cpu_state.flags_op1 & 0x8000));
|
|
case FLAGS_SHR32:
|
|
return ((cpu_state.flags_op2 == 1) && (cpu_state.flags_op1 & 0x80000000));
|
|
|
|
case FLAGS_UNKNOWN:
|
|
return cpu_state.flags & V_FLAG;
|
|
|
|
default:
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
static __inline int AF_SET()
|
|
{
|
|
switch (cpu_state.flags_op)
|
|
{
|
|
case FLAGS_ZN8:
|
|
case FLAGS_ZN16:
|
|
case FLAGS_ZN32:
|
|
case FLAGS_SHL8:
|
|
case FLAGS_SHL16:
|
|
case FLAGS_SHL32:
|
|
case FLAGS_SHR8:
|
|
case FLAGS_SHR16:
|
|
case FLAGS_SHR32:
|
|
case FLAGS_SAR8:
|
|
case FLAGS_SAR16:
|
|
case FLAGS_SAR32:
|
|
return 0;
|
|
|
|
case FLAGS_ADD8:
|
|
case FLAGS_ADD16:
|
|
case FLAGS_ADD32:
|
|
case FLAGS_INC8:
|
|
case FLAGS_INC16:
|
|
case FLAGS_INC32:
|
|
return ((cpu_state.flags_op1 & 0xF) + (cpu_state.flags_op2 & 0xF)) & 0x10;
|
|
|
|
case FLAGS_SUB8:
|
|
case FLAGS_SUB16:
|
|
case FLAGS_SUB32:
|
|
case FLAGS_DEC8:
|
|
case FLAGS_DEC16:
|
|
case FLAGS_DEC32:
|
|
return ((cpu_state.flags_op1 & 0xF) - (cpu_state.flags_op2 & 0xF)) & 0x10;
|
|
|
|
case FLAGS_UNKNOWN:
|
|
return cpu_state.flags & A_FLAG;
|
|
|
|
default:
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
static __inline int CF_SET()
|
|
{
|
|
switch (cpu_state.flags_op)
|
|
{
|
|
case FLAGS_ADD8:
|
|
return (cpu_state.flags_op1 + cpu_state.flags_op2) & 0x100;
|
|
case FLAGS_ADD16:
|
|
return (cpu_state.flags_op1 + cpu_state.flags_op2) & 0x10000;
|
|
case FLAGS_ADD32:
|
|
return (cpu_state.flags_res < cpu_state.flags_op1);
|
|
|
|
case FLAGS_SUB8:
|
|
case FLAGS_SUB16:
|
|
case FLAGS_SUB32:
|
|
return (cpu_state.flags_op1 < cpu_state.flags_op2);
|
|
|
|
case FLAGS_SHL8:
|
|
return (cpu_state.flags_op1 << (cpu_state.flags_op2 - 1)) & 0x80;
|
|
case FLAGS_SHL16:
|
|
return (cpu_state.flags_op1 << (cpu_state.flags_op2 - 1)) & 0x8000;
|
|
case FLAGS_SHL32:
|
|
return (cpu_state.flags_op1 << (cpu_state.flags_op2 - 1)) & 0x80000000;
|
|
|
|
case FLAGS_SHR8:
|
|
case FLAGS_SHR16:
|
|
case FLAGS_SHR32:
|
|
return (cpu_state.flags_op1 >> (cpu_state.flags_op2 - 1)) & 1;
|
|
|
|
case FLAGS_SAR8:
|
|
return ((int8_t)cpu_state.flags_op1 >> (cpu_state.flags_op2 - 1)) & 1;
|
|
case FLAGS_SAR16:
|
|
return ((int16_t)cpu_state.flags_op1 >> (cpu_state.flags_op2 - 1)) & 1;
|
|
case FLAGS_SAR32:
|
|
return ((int32_t)cpu_state.flags_op1 >> (cpu_state.flags_op2 - 1)) & 1;
|
|
|
|
case FLAGS_ZN8:
|
|
case FLAGS_ZN16:
|
|
case FLAGS_ZN32:
|
|
return 0;
|
|
|
|
case FLAGS_DEC8:
|
|
case FLAGS_DEC16:
|
|
case FLAGS_DEC32:
|
|
case FLAGS_INC8:
|
|
case FLAGS_INC16:
|
|
case FLAGS_INC32:
|
|
case FLAGS_UNKNOWN:
|
|
return cpu_state.flags & C_FLAG;
|
|
|
|
default:
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
static __inline void flags_rebuild()
|
|
{
|
|
if (cpu_state.flags_op != FLAGS_UNKNOWN)
|
|
{
|
|
uint16_t tempf = 0;
|
|
if (CF_SET()) tempf |= C_FLAG;
|
|
if (PF_SET()) tempf |= P_FLAG;
|
|
if (AF_SET()) tempf |= A_FLAG;
|
|
if (ZF_SET()) tempf |= Z_FLAG;
|
|
if (NF_SET()) tempf |= N_FLAG;
|
|
if (VF_SET()) tempf |= V_FLAG;
|
|
cpu_state.flags = (cpu_state.flags & ~0x8d5) | tempf;
|
|
cpu_state.flags_op = FLAGS_UNKNOWN;
|
|
}
|
|
}
|
|
|
|
static __inline void flags_extract()
|
|
{
|
|
cpu_state.flags_op = FLAGS_UNKNOWN;
|
|
}
|
|
|
|
static __inline void flags_rebuild_c()
|
|
{
|
|
if (cpu_state.flags_op != FLAGS_UNKNOWN)
|
|
{
|
|
if (CF_SET())
|
|
cpu_state.flags |= C_FLAG;
|
|
else
|
|
cpu_state.flags &= ~C_FLAG;
|
|
}
|
|
}
|
|
|
|
static __inline void setznp8(uint8_t val)
|
|
{
|
|
cpu_state.flags_op = FLAGS_ZN8;
|
|
cpu_state.flags_res = val;
|
|
}
|
|
static __inline void setznp16(uint16_t val)
|
|
{
|
|
cpu_state.flags_op = FLAGS_ZN16;
|
|
cpu_state.flags_res = val;
|
|
}
|
|
static __inline void setznp32(uint32_t val)
|
|
{
|
|
cpu_state.flags_op = FLAGS_ZN32;
|
|
cpu_state.flags_res = val;
|
|
}
|
|
|
|
#define set_flags_shift(op, orig, shift, res) \
|
|
cpu_state.flags_op = op; \
|
|
cpu_state.flags_res = res; \
|
|
cpu_state.flags_op1 = orig; \
|
|
cpu_state.flags_op2 = shift;
|
|
|
|
static __inline void setadd8(uint8_t a, uint8_t b)
|
|
{
|
|
cpu_state.flags_op1 = a;
|
|
cpu_state.flags_op2 = b;
|
|
cpu_state.flags_res = (a + b) & 0xff;
|
|
cpu_state.flags_op = FLAGS_ADD8;
|
|
}
|
|
static __inline void setadd16(uint16_t a, uint16_t b)
|
|
{
|
|
cpu_state.flags_op1 = a;
|
|
cpu_state.flags_op2 = b;
|
|
cpu_state.flags_res = (a + b) & 0xffff;
|
|
cpu_state.flags_op = FLAGS_ADD16;
|
|
}
|
|
static __inline void setadd32(uint32_t a, uint32_t b)
|
|
{
|
|
cpu_state.flags_op1 = a;
|
|
cpu_state.flags_op2 = b;
|
|
cpu_state.flags_res = a + b;
|
|
cpu_state.flags_op = FLAGS_ADD32;
|
|
}
|
|
static __inline void setadd8nc(uint8_t a, uint8_t b)
|
|
{
|
|
flags_rebuild_c();
|
|
cpu_state.flags_op1 = a;
|
|
cpu_state.flags_op2 = b;
|
|
cpu_state.flags_res = (a + b) & 0xff;
|
|
cpu_state.flags_op = FLAGS_INC8;
|
|
}
|
|
static __inline void setadd16nc(uint16_t a, uint16_t b)
|
|
{
|
|
flags_rebuild_c();
|
|
cpu_state.flags_op1 = a;
|
|
cpu_state.flags_op2 = b;
|
|
cpu_state.flags_res = (a + b) & 0xffff;
|
|
cpu_state.flags_op = FLAGS_INC16;
|
|
}
|
|
static __inline void setadd32nc(uint32_t a, uint32_t b)
|
|
{
|
|
flags_rebuild_c();
|
|
cpu_state.flags_op1 = a;
|
|
cpu_state.flags_op2 = b;
|
|
cpu_state.flags_res = a + b;
|
|
cpu_state.flags_op = FLAGS_INC32;
|
|
}
|
|
|
|
static __inline void setsub8(uint8_t a, uint8_t b)
|
|
{
|
|
cpu_state.flags_op1 = a;
|
|
cpu_state.flags_op2 = b;
|
|
cpu_state.flags_res = (a - b) & 0xff;
|
|
cpu_state.flags_op = FLAGS_SUB8;
|
|
}
|
|
static __inline void setsub16(uint16_t a, uint16_t b)
|
|
{
|
|
cpu_state.flags_op1 = a;
|
|
cpu_state.flags_op2 = b;
|
|
cpu_state.flags_res = (a - b) & 0xffff;
|
|
cpu_state.flags_op = FLAGS_SUB16;
|
|
}
|
|
static __inline void setsub32(uint32_t a, uint32_t b)
|
|
{
|
|
cpu_state.flags_op1 = a;
|
|
cpu_state.flags_op2 = b;
|
|
cpu_state.flags_res = a - b;
|
|
cpu_state.flags_op = FLAGS_SUB32;
|
|
}
|
|
|
|
static __inline void setsub8nc(uint8_t a, uint8_t b)
|
|
{
|
|
flags_rebuild_c();
|
|
cpu_state.flags_op1 = a;
|
|
cpu_state.flags_op2 = b;
|
|
cpu_state.flags_res = (a - b) & 0xff;
|
|
cpu_state.flags_op = FLAGS_DEC8;
|
|
}
|
|
static __inline void setsub16nc(uint16_t a, uint16_t b)
|
|
{
|
|
flags_rebuild_c();
|
|
cpu_state.flags_op1 = a;
|
|
cpu_state.flags_op2 = b;
|
|
cpu_state.flags_res = (a - b) & 0xffff;
|
|
cpu_state.flags_op = FLAGS_DEC16;
|
|
}
|
|
static __inline void setsub32nc(uint32_t a, uint32_t b)
|
|
{
|
|
flags_rebuild_c();
|
|
cpu_state.flags_op1 = a;
|
|
cpu_state.flags_op2 = b;
|
|
cpu_state.flags_res = a - b;
|
|
cpu_state.flags_op = FLAGS_DEC32;
|
|
}
|
|
|
|
static __inline void setadc8(uint8_t a, uint8_t b)
|
|
{
|
|
uint16_t c=(uint16_t)a+(uint16_t)b+tempc;
|
|
cpu_state.flags_op = FLAGS_UNKNOWN;
|
|
cpu_state.flags&=~0x8D5;
|
|
cpu_state.flags|=znptable8[c&0xFF];
|
|
if (c&0x100) cpu_state.flags|=C_FLAG;
|
|
if (!((a^b)&0x80)&&((a^c)&0x80)) cpu_state.flags|=V_FLAG;
|
|
if (((a&0xF)+(b&0xF))&0x10) cpu_state.flags|=A_FLAG;
|
|
}
|
|
static __inline void setadc16(uint16_t a, uint16_t b)
|
|
{
|
|
uint32_t c=(uint32_t)a+(uint32_t)b+tempc;
|
|
cpu_state.flags_op = FLAGS_UNKNOWN;
|
|
cpu_state.flags&=~0x8D5;
|
|
cpu_state.flags|=znptable16[c&0xFFFF];
|
|
if (c&0x10000) cpu_state.flags|=C_FLAG;
|
|
if (!((a^b)&0x8000)&&((a^c)&0x8000)) cpu_state.flags|=V_FLAG;
|
|
if (((a&0xF)+(b&0xF))&0x10) cpu_state.flags|=A_FLAG;
|
|
}
|
|
static __inline void setadc32(uint32_t a, uint32_t b)
|
|
{
|
|
uint32_t c=(uint32_t)a+(uint32_t)b+tempc;
|
|
cpu_state.flags_op = FLAGS_UNKNOWN;
|
|
cpu_state.flags&=~0x8D5;
|
|
cpu_state.flags|=((c&0x80000000)?N_FLAG:((!c)?Z_FLAG:0));
|
|
cpu_state.flags|=(znptable8[c&0xFF]&P_FLAG);
|
|
if ((c<a) || (c==a && tempc)) cpu_state.flags|=C_FLAG;
|
|
if (!((a^b)&0x80000000)&&((a^c)&0x80000000)) cpu_state.flags|=V_FLAG;
|
|
if (((a&0xF)+(b&0xF)+tempc)&0x10) cpu_state.flags|=A_FLAG;
|
|
}
|
|
|
|
|
|
static __inline void setsbc8(uint8_t a, uint8_t b)
|
|
{
|
|
uint16_t c=(uint16_t)a-(((uint16_t)b)+tempc);
|
|
cpu_state.flags_op = FLAGS_UNKNOWN;
|
|
cpu_state.flags&=~0x8D5;
|
|
cpu_state.flags|=znptable8[c&0xFF];
|
|
if (c&0x100) cpu_state.flags|=C_FLAG;
|
|
if ((a^b)&(a^c)&0x80) cpu_state.flags|=V_FLAG;
|
|
if (((a&0xF)-(b&0xF))&0x10) cpu_state.flags|=A_FLAG;
|
|
}
|
|
static __inline void setsbc16(uint16_t a, uint16_t b)
|
|
{
|
|
uint32_t c=(uint32_t)a-(((uint32_t)b)+tempc);
|
|
cpu_state.flags_op = FLAGS_UNKNOWN;
|
|
cpu_state.flags&=~0x8D5;
|
|
cpu_state.flags|=(znptable16[c&0xFFFF]&~4);
|
|
cpu_state.flags|=(znptable8[c&0xFF]&4);
|
|
if (c&0x10000) cpu_state.flags|=C_FLAG;
|
|
if ((a^b)&(a^c)&0x8000) cpu_state.flags|=V_FLAG;
|
|
if (((a&0xF)-(b&0xF))&0x10) cpu_state.flags|=A_FLAG;
|
|
}
|
|
|
|
static __inline void setsbc32(uint32_t a, uint32_t b)
|
|
{
|
|
uint32_t c=(uint32_t)a-(((uint32_t)b)+tempc);
|
|
cpu_state.flags_op = FLAGS_UNKNOWN;
|
|
cpu_state.flags&=~0x8D5;
|
|
cpu_state.flags|=((c&0x80000000)?N_FLAG:((!c)?Z_FLAG:0));
|
|
cpu_state.flags|=(znptable8[c&0xFF]&P_FLAG);
|
|
if ((c>a) || (c==a && tempc)) cpu_state.flags|=C_FLAG;
|
|
if ((a^b)&(a^c)&0x80000000) cpu_state.flags|=V_FLAG;
|
|
if (((a&0xF)-((b&0xF)+tempc))&0x10) cpu_state.flags|=A_FLAG;
|
|
}
|
|
|
|
extern void cpu_386_flags_extract();
|
|
extern void cpu_386_flags_rebuild(); |