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[boards] Add Tuya WBLC5 and CBLC5 boards

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This commit is contained in:
Kuba Szczodrzyński
2023-06-18 00:13:05 +02:00
parent 1335b84391
commit 7ed48bf9fc
10 changed files with 732 additions and 0 deletions
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104
boards/_base/pcb/cblc5-test.json Normal file
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{
"pcb": {
"test_pads": {
"TRST": "cblc5.back.rst.anchor",
"TRX1": "cblc5.back.r1.anchor",
"TTX1": "cblc5.back.t1.anchor",
"TRX2": "cblc5.back.r2.anchor",
"TTX2": "cblc5.back.t2.anchor",
"TCSN": "cblc5.back.csn.anchor"
},
"back": [
{
"name": "test_pad_1mm",
"pos": "1.1,1.1"
},
{
"id": "t1",
"name": "label_line_up",
"pos": "1.1,0.6",
"vars": {
"DIR": "right",
"RASTER": 2,
"W": 3.8,
"H": 1.4
}
},
{
"name": "test_pad_1mm",
"pos": "0.8,3.3"
},
{
"id": "r1",
"name": "label_line_up",
"pos": "0.8,2.8",
"vars": {
"DIR": "right",
"RASTER": 2,
"W": 4.1,
"H": 1.6
}
},
{
"name": "test_pad_1mm",
"pos": "2.4,4.1"
},
{
"id": "r2",
"name": "label_line_up",
"pos": "2.4,3.6",
"vars": {
"DIR": "right",
"RASTER": 2,
"W": 2.5,
"H": 0.4
}
},
{
"name": "test_pad_1mm",
"pos": "3.9,4.1"
},
{
"id": "t2",
"name": "label_line_down",
"pos": "3.9,4.6",
"vars": {
"DIR": "right",
"RASTER": 2,
"W": 1,
"H": 0.4
}
},
{
"name": "test_pad_1mm",
"pos": "1.2,4.9"
},
{
"name": "test_pad_1mm",
"pos": "1.7,7.0"
},
{
"id": "rst",
"name": "label_line_down",
"pos": "1.2,5.4",
"vars": {
"DIR": "right",
"RASTER": 2,
"W": 3.7,
"H": 1.6
}
},
{
"id": "csn",
"name": "label_line_down",
"pos": "1.7,7.5",
"vars": {
"DIR": "right",
"RASTER": 2,
"W": 3.2,
"H": 1.5
}
}
]
}
}

82
boards/_base/pcb/cblc5.json Normal file
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{
"pcb": {
"templates": [
"tuyalc5"
],
"vars": {
"MASK_PRESET": "mask_white",
"TRACE_COLOR": "#E0E0E0",
"SILK_COLOR": "black"
},
"pinout_hidden": "I2S,JTAG,FLASH,SDA1",
"pinout": {
"1": {
"CTRL": "ANT"
},
"2": {
"GND": null
},
"3": {
"IC": 16,
"ARD": "D0"
},
"4": {
"IC": 15,
"ARD": "D2"
},
"5": {
"IC": 22,
"ARD": "D1"
},
"6": {
"PWR": 3.3
},
"TRST": {
"IC": 21
},
"TRX1": {
"IC": 26,
"ARD": "D4"
},
"TTX1": {
"IC": 27,
"ARD": "D3"
},
"TRX2": {
"IC": 28,
"ARD": "D5"
},
"TTX2": {
"IC": 29,
"ARD": "D6"
},
"TCSN": {
"IC": 19,
"ARD": "D7"
}
},
"front": [
{
"name": "chip",
"pos": "2.7,3.8",
"vars": {
"W": 5,
"POS": 1
}
},
{
"name": "osc",
"pos": "2.5,0.5"
},
{
"type": "text",
"pos": "0.7,4.2",
"text": "${SYMBOL}",
"font_size": 1.2,
"fill": {
"color": "${SILK_COLOR}"
}
}
]
}
}

152
boards/_base/pcb/wblc5-test.json Normal file
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{
"pcb": {
"test_pads": {
"TRST": "wblc5.back.cen.anchor",
"TRX1": "wblc5.back.r1.anchor",
"TTX1": "wblc5.back.t1.anchor",
"TRX2": "wblc5.back.r2.anchor",
"TTX2": "wblc5.back.t2.anchor",
"TSCK": "wblc5.back.tck.anchor",
"TCSN": "wblc5.back.tms.anchor",
"TSI": "wblc5.back.tdi.anchor",
"TSO": "wblc5.back.tdo.anchor"
},
"back": [
{
"name": "test_pad_1mm",
"pos": "0.7,1.1"
},
{
"id": "r1",
"name": "label_line_up",
"pos": "0.7,0.6",
"vars": {
"DIR": "right",
"RASTER": 2,
"W": 7.2,
"H": 5.1
}
},
{
"name": "test_pad_1mm",
"pos": "1.9,0.9"
},
{
"id": "t1",
"name": "label_line_up",
"pos": "1.9,0.4",
"vars": {
"DIR": "right",
"RASTER": 2,
"W": 5.9,
"H": 2.9
}
},
{
"name": "test_pad_1mm",
"pos": "7.8,0.8"
},
{
"id": "r2",
"name": "label_line_up",
"pos": "7.8,0.3",
"vars": {
"DIR": "right",
"RASTER": 2,
"W": 0,
"H": 0.8
}
},
{
"name": "test_pad_1mm",
"pos": "7.8,2.4"
},
{
"id": "t2",
"name": "label_line_up",
"pos": "7.8,1.9",
"vars": {
"DIR": "right",
"RASTER": 2,
"W": 0,
"H": 0.4
}
},
{
"name": "test_pad_1mm",
"pos": "1.3,4.2"
},
{
"id": "cen",
"name": "label_line_up",
"pos": "2.1,4.3",
"vars": {
"DIR": "right",
"RASTER": 2,
"W": 5.7,
"H": 0
}
},
{
"name": "test_pad_1mm",
"pos": "1.6,5.3"
},
{
"name": "test_pad_1mm",
"pos": "1.3,6.3"
},
{
"name": "test_pad_1mm",
"pos": "4.5,7.6"
},
{
"name": "test_pad_1mm",
"pos": "3.8,8.7"
},
{
"id": "tck",
"name": "label_line_down",
"pos": "1.6,5.8",
"vars": {
"DIR": "right",
"RASTER": 2,
"W": 6.2,
"H": 0.3
}
},
{
"id": "tms",
"name": "label_line_down",
"pos": "1.3,6.8",
"vars": {
"DIR": "right",
"RASTER": 2,
"W": 6.5,
"H": 1.3
}
},
{
"id": "tdi",
"name": "label_line_down",
"pos": "4.5,8.1",
"vars": {
"DIR": "right",
"RASTER": 2,
"W": 3.3,
"H": 2.0
}
},
{
"id": "tdo",
"name": "label_line_down",
"pos": "3.8,9.2",
"vars": {
"DIR": "right",
"RASTER": 2,
"W": 4,
"H": 2.9
}
}
]
}
}

99
boards/_base/pcb/wblc5.json Normal file
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{
"pcb": {
"templates": [
"tuyalc5"
],
"vars": {
"MASK_PRESET": "mask_white",
"TRACE_COLOR": "#E0E0E0",
"SILK_COLOR": "black"
},
"pinout_hidden": "I2S",
"pinout": {
"1": {
"CTRL": "ANT"
},
"2": {
"GND": null
},
"3": {
"IC": 16,
"ARD": "D0"
},
"4": {
"IC": 15,
"ARD": "D2"
},
"5": {
"IC": 22,
"ARD": "D1"
},
"6": {
"PWR": 3.3
},
"TRST": {
"IC": 21
},
"TRX1": {
"IC": 26,
"ARD": "D3"
},
"TTX1": {
"IC": 27,
"ARD": "D4"
},
"TRX2": {
"IC": 28,
"ARD": "D5"
},
"TTX2": {
"IC": 29,
"ARD": "D6"
},
"TSCK": {
"IC": 20,
"ARD": "D7"
},
"TCSN": {
"IC": 19,
"ARD": "D8"
},
"TSO": {
"IC": 17,
"ARD": [
"D10",
"A0"
]
},
"TSI": {
"IC": 18,
"ARD": "D9"
}
},
"front": [
{
"name": "chip",
"pos": "2.3,3.5",
"vars": {
"W": 5,
"POS": 1
}
},
{
"type": "text",
"pos": "3.5,2.2",
"text": "${SYMBOL}",
"font_size": 1.2,
"fill": {
"color": "${SILK_COLOR}"
}
}
],
"back": [
{
"name": "osc",
"pos": "2.6,1.3"
}
]
}
}