From f2abb564c7354853a64b250406eb96d41ecd75a8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Kuba=20Szczodrzy=C5=84ski?= Date: Tue, 14 Jun 2022 16:15:43 +0200 Subject: [PATCH] [beken-72xx] Fix BK7231S 1.0.5 bootloader compatibility --- builder/frameworks/beken-72xx-sdk.py | 29 +- platform/beken-72xx/fixups/arch_main.c | 104 ++++ .../fixups/boot_handlers_105_bk7231s.S | 499 ++++++++++++++++++ platform/beken-72xx/fixups/intc.c | 420 +++++++++++++++ 4 files changed, 1047 insertions(+), 5 deletions(-) create mode 100644 platform/beken-72xx/fixups/arch_main.c create mode 100644 platform/beken-72xx/fixups/boot_handlers_105_bk7231s.S create mode 100644 platform/beken-72xx/fixups/intc.c diff --git a/builder/frameworks/beken-72xx-sdk.py b/builder/frameworks/beken-72xx-sdk.py index b5f98b8..b85c30f 100644 --- a/builder/frameworks/beken-72xx-sdk.py +++ b/builder/frameworks/beken-72xx-sdk.py @@ -97,6 +97,16 @@ env.Append( ], ) +srcs_core = [] +srcs_fixups = [] + +# Fix for BK7231T's bootloader compatibility +if board.get("build.bkboot_version") == "1.0.5-bk7231s": + env.Append(CPPDEFINES=[("CFG_SUPPORT_BOOTLOADER", "1")]) + srcs_fixups.append("+") +else: + srcs_core.append("+") + # Sources - from framework-beken-bdk/beken378/beken_src.mk env.AddLibrary( name="bdk_core", @@ -106,15 +116,11 @@ env.AddLibrary( "+", "+", "+", - "+", - "+", - "+", "+", - "+", - "+", "+", "+", "+", + *srcs_core, ], includes=[ "+", @@ -128,6 +134,17 @@ env.AddLibrary( ], ) +# Sources - parent family fixups +env.AddLibrary( + name="${FAMILY_PARENT_CODE}_fixups", + base_dir="$PARENT_DIR/fixups", + srcs=[ + "+", + "+", + *srcs_fixups, + ], +) + # Sources - app module env.AddLibrary( name="bdk_app", @@ -153,6 +170,7 @@ env.AddLibrary( name="bdk_driver", base_dir=DRIVER_DIR, srcs=[ + "+", "+", "+", "+", @@ -208,6 +226,7 @@ env.AddLibrary( name="bdk_func", base_dir=FUNC_DIR, srcs=[ + "+", "+", "+", "+", diff --git a/platform/beken-72xx/fixups/arch_main.c b/platform/beken-72xx/fixups/arch_main.c new file mode 100644 index 0000000..192ff36 --- /dev/null +++ b/platform/beken-72xx/fixups/arch_main.c @@ -0,0 +1,104 @@ +/** + **************************************************************************************** + * + * @file arch_main.c + * + * @brief Main loop of the application. + * + * Copyright (C) Beken Corp 2011-2020 + * + **************************************************************************************** + */ +#include "app.h" +#include "ate_app.h" +#include "driver_pub.h" +#include "func_pub.h" +#include "include.h" +#include "start_type_pub.h" + +beken_semaphore_t extended_app_sema = NULL; +uint32_t extended_app_stack_size = 2048; + +extern void user_main_entry(void); + +#if CFG_SUPPORT_BOOTLOADER +void entry_set_world_flag(void) { + *(volatile uint32_t *)0x00400000 = 1; +} +#endif // CFG_SUPPORT_BOOTLOADER + +void extended_app_launch_over(void) { + OSStatus ret; + ret = rtos_set_semaphore(&extended_app_sema); + (void)ret; +} + +void extended_app_waiting_for_launch(void) { + OSStatus ret; + ret = rtos_get_semaphore(&extended_app_sema, BEKEN_WAIT_FOREVER); + ASSERT(kNoErr == ret); + (void)ret; +} + +static void extended_app_task_handler(void *arg) { + func_init_extended(); + if (get_ate_mode_state()) { + ate_start(); + } else { + app_start(); + } + extended_app_launch_over(); + rtos_delete_thread(NULL); +} + +void extended_app_init(void) { + OSStatus ret; + ret = rtos_init_semaphore(&extended_app_sema, 1); + ASSERT(kNoErr == ret); +} + +void extended_app_uninit(void) { + OSStatus ret; + ret = rtos_deinit_semaphore(&extended_app_sema); + ASSERT(kNoErr == ret); +} + +void extended_app_launch(void) { + OSStatus ret; + ret = rtos_create_thread( + NULL, + THD_EXTENDED_APP_PRIORITY, + "extended_app", + (beken_thread_function_t)extended_app_task_handler, + extended_app_stack_size, + (beken_thread_arg_t)0 + ); + ASSERT(kNoErr == ret); +} + +void entry_main(void) { + // check GPIO0 and start ATE app + ate_app_init(); + // compatibility with BK7231S_1.0.5 +#if CFG_SUPPORT_BOOTLOADER + entry_set_world_flag(); +#endif + // read reboot cause into bk_misc_get_start_type() + bk_misc_init_start_type(); + // clear driver registration arrays + driver_init(); + // reboot the board if start_type == RESET_SOURCE_CRASH_PER_XAT0 + bk_misc_check_start_type(); + // init flash and intc + func_init_basic(); + // init semaphore for extended_app_launch + extended_app_init(); + // run task with init_app_thread + user_main_entry(); + // run task with extended_app_task_handler + extended_app_launch(); + // start FreeRTOS +#if (CFG_OS_FREERTOS) + vTaskStartScheduler(); +#endif +} diff --git a/platform/beken-72xx/fixups/boot_handlers_105_bk7231s.S b/platform/beken-72xx/fixups/boot_handlers_105_bk7231s.S new file mode 100644 index 0000000..e607951 --- /dev/null +++ b/platform/beken-72xx/fixups/boot_handlers_105_bk7231s.S @@ -0,0 +1,499 @@ +/** + **************************************************************************************** + * + * @file boot_handlers.s + * + * @brief ARM Exception Vector handler functions. + * + * Copyright (C) RivieraWaves 2011-2016 + * + **************************************************************************************** + */ + .globl entry_main + .globl intc_irq + .globl intc_fiq + .globl boot_reset + .globl boot_swi + .globl boot_undefined + .globl boot_pabort + .globl boot_dabort + .globl boot_reserved + .globl irq_handler + .globl fiq_handler + .globl vPortStartFirstTask + .globl do_irq + .globl do_fiq + .globl do_swi + .globl do_undefined + .globl do_pabort + .globl do_dabort + .globl do_reserved + .globl bk_trap_udef + .globl bk_trap_pabt + .globl bk_trap_dabt + .globl bk_trap_resv + +#include "sys_config.h" + +/* ======================================================================== + * Macros + * ======================================================================== */ +#define _FIQ_STACK_SIZE_ 0x7F0 +#define _IRQ_STACK_SIZE_ 0xFF0 +#define _SVC_STACK_SIZE_ 0x3F0 +#define _SYS_STACK_SIZE_ 0x3F0 +#define _UND_STACK_SIZE_ 0x010 +#define _ABT_STACK_SIZE_ 0x010 + +#define BOOT_MODE_MASK 0x1F +#define BOOT_MODE_USR 0x10 +#define BOOT_MODE_FIQ 0x11 +#define BOOT_MODE_IRQ 0x12 +#define BOOT_MODE_SVC 0x13 +#define BOOT_MODE_ABT 0x17 +#define BOOT_MODE_UND 0x1B +#define BOOT_MODE_SYS 0x1F +#define BOOT_FIQ_IRQ_MASK 0xC0 +#define BOOT_IRQ_MASK 0x80 + +#define BOOT_COLOR_UNUSED 0xAAAAAAAA //Pattern to fill UNUSED stack +#define BOOT_COLOR_SVC 0xBBBBBBBB //Pattern to fill SVC stack +#define BOOT_COLOR_IRQ 0xCCCCCCCC //Pattern to fill IRQ stack +#define BOOT_COLOR_FIQ 0xDDDDDDDD //Pattern to fill FIQ stack +#define BOOT_COLOR_SYS 0xEEEEEEEE //Pattern to fill SYS stack + +/* ======================================================================== + Context save and restore macro definitions + * ======================================================================== */ + +/* ========================================================================*/ +.macro portSAVE_CONTEXT + //Push R0 as we are going to use the register. + STMDB SP!, {R0} + + MRS R0, spsr + AND R0, R0, #0x1F + CMP R0, #0x1F + BNE 10f + + //Set R0 to point to the task stack pointer. + STMDB SP, {SP}^ + NOP + SUB SP, SP, #4 + LDMIA SP!, {R0} + + //Push the return address onto the stack. + STMDB R0!, {LR} + + //Now we have saved LR we can use it instead of R0. + MOV LR, R0 + + //Pop R0 so we can save it onto the system mode stack. + LDMIA SP!, {R0} + + //Push all the system mode registers onto the task stack. + STMDB LR, {R0-R14}^ + NOP + NOP + SUB LR, LR, #60 + + //Push the SPSR onto the task stack. + MRS R0, SPSR + STMDB LR!, {R0} + + LDR R0, =ulCriticalNesting + LDR R0, [R0] + STMDB LR!, {R0} + + //Store the new top of stack for the task. + LDR R0, =pxCurrentTCB + LDR R0, [R0] + STR LR, [R0] + + B 11f + +10: + LDMIA SP!, {R0} + + STMDB r13!, {r0-r12,r14} + NOP + NOP + + LDR R0, =ulCriticalNesting + LDR R0, [R0] + STMDB r13!, {R0} + + LDR R0, =pxCurrentTCB + LDR R0, [R0] + STMDB r13!, {R0} + + SUB r13, r13, #8 + +11: + MOV R0, R0 + .endm + +/* ========================================================================*/ +.macro portRESTORE_CONTEXT + MRS R0, spsr + AND R0, R0, #0x1F + CMP R0, #0x1F + BNE 20f + + //Set the LR to the task stack. + LDR R0, =pxCurrentTCB + LDR R0, [R0] + LDR LR, [R0] + + //The critical nesting depth is the first item on the stack. + //Load it into the ulCriticalNesting variable. + LDR R0, =ulCriticalNesting + LDMFD LR!, {R1} + STR R1, [R0] + + //Get the SPSR from the stack. + LDMFD LR!, {R0} + MSR SPSR_cxsf, R0 + + //Restore all system mode registers for the task. + LDMFD LR, {R0-R14}^ + NOP + NOP + + //Restore the return address. + LDR LR, [LR, #+60] + + //And return - correcting the offset in the LR to obtain the + //correct address. + SUBS PC, LR, #4 + +20: + ADD r13, r13, #0x8 + + LDR R0, =pxCurrentTCB + LDMFD r13!, {R1} + STR R1, [R0] + + LDR R0, =ulCriticalNesting + LDMFD r13!, {R1} + STR R1, [R0] + + LDMIA r13!, {r0-r12,r14} + NOP + NOP + + SUBS pc, r14, #0x4 + .endm + +/* ========================================================================*/ +.macro firstRESTORE_CONTEXT + //Set the LR to the task stack. + LDR R0, =pxCurrentTCB + LDR R0, [R0] + LDR LR, [R0] + + //The critical nesting depth is the first item on the stack. + //Load it into the ulCriticalNesting variable. + LDR R0, =ulCriticalNesting + LDMFD LR!, {R1} + STR R1, [R0] + + //Get the SPSR from the stack. + LDMFD LR!, {R0} + MSR SPSR_cxsf, R0 + + //Restore all system mode registers for the task. + LDMFD LR, {R0-R14}^ + NOP + NOP + + //Restore the return address. + LDR LR, [LR, #+60] + + //And return - correcting the offset in the LR to obtain the + //correct address. + SUBS PC, LR, #4 + .endm + +/* ======================================================================== + * Macro for switching ARM mode + */ +.macro BOOT_CHANGE_MODE, mode, mode_mask + MRS R0, CPSR + BIC R0, R0, #\mode_mask + ORR R0, R0, #\mode + MSR CPSR_c, R0 + .endm + +/* ======================================================================== + * Macro for setting the stack + */ +.macro BOOT_SET_STACK, stackStart, stackLen, color + LDR R0, \stackStart + LDR R1, \stackLen + + ADD R1, R1, R0 + MOV SP, R1 //Set stack pointer + + LDR R2, =\color + +3: + CMP R0, R1 //End of stack? + STRLT R2, [r0] //Colorize stack word + ADDLT R0, R0, #4 + BLT 3b //branch to previous local label + .endm + + .section .data + .align 3 + .global und_stack_start + und_stack_start: + .space _UND_STACK_SIZE_ + + .align 3 + .global abt_stack_start +abt_stack_start: + .space _ABT_STACK_SIZE_ + + .align 3 + .global fiq_stack_start +fiq_stack_start: + .space _FIQ_STACK_SIZE_ + + .align 3 + .global irq_stack_start + irq_stack_start: + .space _IRQ_STACK_SIZE_ + + .align 3 + .global sys_stack_start +sys_stack_start: + .space _SYS_STACK_SIZE_ + + .align 3 + .global svc_stack_start +svc_stack_start: + .space _SVC_STACK_SIZE_ + + +/* ======================================================================== + * Functions + * ======================================================================== + * Function to handle reset vector + */ + .globl boot_reset + .section ".boot", "ax" + +boot_reset: + //Disable IRQ and FIQ before starting anything + MRS R0, CPSR + ORR R0, R0, #0xC0 + MSR CPSR_c, R0 + + //Setup all stacks //Note: Abt and Usr mode are not used + BOOT_CHANGE_MODE BOOT_MODE_SYS BOOT_MODE_MASK + BOOT_SET_STACK boot_stack_base_SYS boot_stack_len_SYS BOOT_COLOR_SYS + + BOOT_CHANGE_MODE BOOT_MODE_ABT BOOT_MODE_MASK + BOOT_SET_STACK boot_stack_base_UNUSED boot_stack_len_UNUSED BOOT_COLOR_UNUSED + + BOOT_CHANGE_MODE BOOT_MODE_UND BOOT_MODE_MASK + BOOT_SET_STACK boot_stack_base_UNUSED boot_stack_len_UNUSED BOOT_COLOR_UNUSED + + BOOT_CHANGE_MODE BOOT_MODE_IRQ BOOT_MODE_MASK + BOOT_SET_STACK boot_stack_base_IRQ boot_stack_len_IRQ BOOT_COLOR_IRQ + + BOOT_CHANGE_MODE BOOT_MODE_FIQ BOOT_MODE_MASK + BOOT_SET_STACK boot_stack_base_FIQ boot_stack_len_FIQ BOOT_COLOR_FIQ + + //Clear FIQ banked registers while in FIQ mode + MOV R8, #0 + MOV R9, #0 + MOV R10, #0 + MOV R11, #0 + MOV R12, #0 + + BOOT_CHANGE_MODE BOOT_MODE_SVC BOOT_MODE_MASK + BOOT_SET_STACK boot_stack_base_SVC boot_stack_len_SVC BOOT_COLOR_SVC + + /*Stay in Supervisor Mode + copy data from binary to ram*/ + BL _sysboot_copy_data_to_ram + + /*Init the BSS section*/ + BL _sysboot_zi_init + + //================== + //Clear Registers + MOV R0, #0 + MOV R1, #0 + MOV R2, #0 + MOV R3, #0 + MOV R4, #0 + MOV R5, #0 + MOV R6, #0 + MOV R7, #0 + MOV R8, #0 + MOV R9, #0 + MOV R10, #0 + MOV R11, #0 + MOV R12, #0 + + /* start main entry*/ + B entry_main + B . + +/* ======================================================================== + * Globals + * ======================================================================== */ +boot_stack_base_UNUSED: + .word und_stack_start + +boot_stack_len_UNUSED: + .word _UND_STACK_SIZE_ + +boot_stack_base_IRQ: + .word irq_stack_start + +boot_stack_len_IRQ: + .word _IRQ_STACK_SIZE_ + +boot_stack_base_SVC: + .word svc_stack_start + +boot_stack_len_SVC: + .word _SVC_STACK_SIZE_ + +boot_stack_base_FIQ: + .word fiq_stack_start + +boot_stack_len_FIQ: + .word _FIQ_STACK_SIZE_ + +boot_stack_base_SYS: + .word sys_stack_start + +boot_stack_len_SYS: + .word _SYS_STACK_SIZE_ + +/*FUNCTION: _sysboot_copy_data_to_ram*/ +/*DESCRIPTION: copy main stack code from FLASH/ROM to SRAM*/ +_sysboot_copy_data_to_ram: + LDR R0, =_data_flash_begin + LDR R1, =_data_ram_begin + LDR R2, =_data_ram_end + +4: CMP R1, R2 + LDRLO R4, [R0], #4 + STRLO R4, [R1], #4 + BLO 4b + BX LR + +/*FUNCTION: _sysboot_zi_init*/ +/*DESCRIPTION: Initialise Zero-Init Data Segment*/ +_sysboot_zi_init: + LDR R0, =_bss_start + LDR R1, =_bss_end + + MOV R3, R1 + MOV R4, R0 + MOV R2, #0 +5: CMP R4, R3 + STRLO R2, [R4], #4 + BLO 5b + BX LR + +#if (CFG_SOC_NAME == SOC_BK7231N) +/*FUNCTION: _sysboot_copy_code_to_itcm*/ +/*DESCRIPTION: copy itcm code from FLASH/ROM to SRAM*/ +_sysboot_copy_code_to_itcm: + LDR R0, =_itcmcode_flash_begin + LDR R1, =_itcmcode_ram_begin + LDR R2, =_itcmcode_ram_end + +6: CMP R1, R2 + LDRLO R4, [R0], #4 + STRLO R4, [R1], #4 + BLO 6b + BX LR + +/*FUNCTION: _sysboot_sdbss_init*/ +/*DESCRIPTION: Initialise Zero-Init Data Segment of TCM */ +_sysboot_tcmbss_init: + LDR R0, =_tcmbss_start + LDR R1, =_tcmbss_end + + MOV R3, R1 + MOV R4, R0 + MOV R2, #0 +8: CMP R4, R3 + STRLO R2, [R4], #4 + BLO 8b + BX LR +#endif + + .align 5 +boot_undefined: + B boot_undefined + + .align 5 +boot_swi: + B vPortYieldProcessor + + .align 5 +boot_pabort: + B boot_pabort + + .align 5 +boot_dabort: + B boot_dabort + + .align 5 +boot_reserved: + B boot_reserved + + .align 5 +irq_handler: + portSAVE_CONTEXT + LDR R0, =intc_irq + MOV LR, PC + BX R0 + portRESTORE_CONTEXT + + .align 5 +fiq_handler: + portSAVE_CONTEXT + LDR R0, =intc_fiq + MOV LR, PC + BX R0 + portRESTORE_CONTEXT + +/*Starting the first task is just a matter of restoring the context that*/ +/*was created by pxPortInitialiseStack().*/ +vPortStartFirstTask: + firstRESTORE_CONTEXT + +/*Manual context switch function. This is the SWI hander.*/ +vPortYieldProcessor: +#if (0 == CFG_SUPPORT_BOOTLOADER) + ADD LR, LR, #4 //Add 4 to the LR to make the LR appear exactly + //as if the context was saved during and IRQ + //handler. +#endif // CFG_SUPPORT_BOOTLOADER + + portSAVE_CONTEXT //Save the context of the current task... + + LDR R0, =vTaskSwitchContext + MOV LR, PC + BX R0 + + portRESTORE_CONTEXT //Restore the context of the selected task. + + .code 32 + .global WFI + .type WFI,%function +WFI: + MOV R0, #0 + MCR p15, 0, R0, c7, c0, 4 + BX LR +/*EOF*/ diff --git a/platform/beken-72xx/fixups/intc.c b/platform/beken-72xx/fixups/intc.c new file mode 100644 index 0000000..27dfab3 --- /dev/null +++ b/platform/beken-72xx/fixups/intc.c @@ -0,0 +1,420 @@ +/** + **************************************************************************************** + * + * @file intc.c + * + * @brief Definition of the Interrupt Controller (INTCTRL) API. + * + * Copyright (C) RivieraWaves 2011-2016 + * + **************************************************************************************** + */ + +/* + * INCLUDE FILES + **************************************************************************************** + */ +#include "compiler.h" +#include "intc.h" +#include "intc_pub.h" + +#include "include.h" +#include "arm_arch.h" +#include "drv_model_pub.h" +#include "icu_pub.h" +#include "mem_pub.h" +#include "uart_pub.h" +#include "power_save_pub.h" +#include "start_type_pub.h" + +ISR_T _isrs[INTC_MAX_COUNT] = {{{0, 0}},}; +static UINT32 isrs_mask = 0; +static ISR_LIST_T isr_hdr = {{&isr_hdr.isr, &isr_hdr.isr},}; + +void intc_hdl_entry(UINT32 int_status) +{ + UINT32 i; + ISR_T *f; + UINT32 status; + LIST_HEADER_T *n; + LIST_HEADER_T *pos; + + status = int_status & isrs_mask; + INTC_PRT("intc:%x:%x\r\n", int_status, status); + + #if CFG_USE_STA_PS + power_save_dtim_wake(status); + #endif + + list_for_each_safe(pos, n, &isr_hdr.isr) + { + f = list_entry(pos, ISR_T, list); + i = f->int_num; + + if ((BIT(i) & status)) + { + f->isr_func(); + status &= ~(BIT(i)); + } + + if(0 == status) + { + return; + } + } +} + +void intc_service_register(UINT8 int_num, UINT8 int_pri, FUNCPTR isr) +{ + LIST_HEADER_T *pos, *n; + ISR_T *tmp_ptr, *cur_ptr; + ISR_T buf_ele; + + GLOBAL_INT_DECLARATION(); + + buf_ele = _isrs[int_num]; + cur_ptr = &_isrs[int_num]; + cur_ptr->isr_func = isr; + cur_ptr->int_num = int_num; + cur_ptr->pri = int_pri; + + INTC_PRT("reg_isr:%d:%d:%p\r\n", int_num, int_pri, isr); + + GLOBAL_INT_DISABLE(); + if (list_empty(&isr_hdr.isr)) + { + list_add_head(&cur_ptr->list, &isr_hdr.isr); + goto ok; + } + + /* Insert the ISR to the function list, this list is sorted by priority number */ + list_for_each_safe(pos, n, &isr_hdr.isr) + { + tmp_ptr = list_entry(pos, ISR_T, list); + + if (int_pri < tmp_ptr->pri) + { + /* add entry at the head of the queue */ + list_add_tail(&cur_ptr->list, &tmp_ptr->list); + + INTC_PRT("reg_isr_o1\r\n"); + + goto ok; + } + else if (int_pri == tmp_ptr->pri) + { + INTC_PRT("reg_isr_error\r\n"); + goto error; + } + } + + list_add_tail(&cur_ptr->list, &isr_hdr.isr); + INTC_PRT("reg_isr_o2\r\n"); + +ok: + isrs_mask |= BIT(int_num); + GLOBAL_INT_RESTORE(); + + return; + +error: + /* something wrong */ + _isrs[int_num] = buf_ele; + GLOBAL_INT_RESTORE(); + + return; +} + +void intc_service_change_handler(UINT8 int_num, FUNCPTR isr) +{ + LIST_HEADER_T *pos, *n; + ISR_T *tmp_ptr, *cur_ptr; + ISR_T buf_ele; + UINT8 int_pri; + + GLOBAL_INT_DECLARATION(); + + buf_ele = _isrs[int_num]; + cur_ptr = &_isrs[int_num]; + int_pri = cur_ptr->pri; + + if(!cur_ptr->isr_func) + return; + + INTC_PRT("reg_isr:%d:%d:%p\r\n", int_num, int_pri, isr); + + GLOBAL_INT_DISABLE(); + if (list_empty(&isr_hdr.isr)) + { + goto exit; + } + + /* Insert the ISR to the function list, this list is sorted by priority number */ + list_for_each_safe(pos, n, &isr_hdr.isr) + { + tmp_ptr = list_entry(pos, ISR_T, list); + + if (int_pri == tmp_ptr->pri) + { + buf_ele.isr_func = isr; + break; + } + } + +exit: + /* something wrong */ + _isrs[int_num] = buf_ele; + GLOBAL_INT_RESTORE(); + + return; +} + +/* + * FUNCTION DEFINITIONS + **************************************************************************************** + */ +void intc_spurious(void) +{ + ASSERT(0); +} + +void intc_enable(int index) +{ + UINT32 param; + + param = (1UL << index); + sddev_control(ICU_DEV_NAME, CMD_ICU_INT_ENABLE, ¶m); +} + +void intc_disable(int index) +{ + UINT32 param; + + param = (1UL << index); + sddev_control(ICU_DEV_NAME, CMD_ICU_INT_DISABLE, ¶m); +} + +void rf_ps_wakeup_isr_idle_int_cb(void) +{ +#if ( CONFIG_APP_MP3PLAYER == 1 ) + UINT32 irq_status; + + irq_status = sddev_control(ICU_DEV_NAME, CMD_GET_INTR_STATUS, 0); + + if(irq_status & 1<r0, regs->r1, regs->r2, regs->r3); + os_printf("r04:0x%08x r05:0x%08x r06:0x%08x r07:0x%08x\n", + regs->r4, regs->r5, regs->r6, regs->r7); + os_printf("r08:0x%08x r09:0x%08x r10:0x%08x\n", + regs->r8, regs->r9, regs->r10); + os_printf("fp :0x%08x ip :0x%08x\n", + regs->fp, regs->ip); + os_printf("sp :0x%08x lr :0x%08x pc :0x%08x\n", + regs->sp, regs->lr, regs->pc); + os_printf("SPSR:0x%08x\n", regs->spsr); + os_printf("CPSR:0x%08x\n", regs->cpsr); + + int i; + const unsigned int *reg1; + + os_printf("\nseparate regs:\n"); + + reg1 = (const unsigned int *)0x400024; + os_printf("SYS:cpsr r8-r14\n"); + for(i=0;i<0x20>>2;i++) + { + os_printf("0x%08x\n",*(reg1 + i)); + } + + os_printf("IRQ:cpsr spsr r8-r14\n"); + reg1 = (const unsigned int *)0x400044; + for(i=0;i<0x24>>2;i++) + { + os_printf("0x%08x\n",*(reg1 + i)); + } + + os_printf("FIR:cpsr spsr r8-r14\n"); + reg1 = (const unsigned int *)0x400068; + for(i=0;i<0x24>>2;i++) + { + os_printf("0x%08x\n",*(reg1 + i)); + } + + os_printf("ABT:cpsr spsr r8-r14\n"); + reg1 = (const unsigned int *)0x40008c; + for(i=0;i<0x24>>2;i++) + { + os_printf("0x%08x\n",*(reg1 + i)); + } + + os_printf("UND:cpsr spsr r8-r14\n"); + reg1 = (const unsigned int *)0x4000b0; + for(i=0;i<0x24>>2;i++) + { + os_printf("0x%08x\n",*(reg1 + i)); + } + + os_printf("SVC:cpsr spsr r8-r14\n"); + reg1 = (const unsigned int *)0x4000d4; + for(i=0;i<0x24>>2;i++) + { + os_printf("0x%08x\n",*(reg1 + i)); + } + + os_printf("\r\n"); + +} + +void bk_trap_udef(struct arm_registers *regs) +{ +#if (CFG_SOC_NAME == SOC_BK7231N) + *((volatile uint32_t *)START_TYPE_ADDR) = (uint32_t)(CRASH_UNDEFINED_VALUE & 0xffff); +#else + *((volatile uint32_t *)START_TYPE_ADDR) = (uint32_t)CRASH_UNDEFINED_VALUE; +#endif + os_printf("undefined instruction\n"); + bk_show_register(regs); + bk_cpu_shutdown(); +} + +void bk_trap_pabt(struct arm_registers *regs) +{ +#if (CFG_SOC_NAME == SOC_BK7231N) + *((volatile uint32_t *)START_TYPE_ADDR) = (uint32_t)(CRASH_PREFETCH_ABORT_VALUE & 0xffff); +#else + *((volatile uint32_t *)START_TYPE_ADDR) = (uint32_t)CRASH_PREFETCH_ABORT_VALUE; +#endif + os_printf("prefetch abort\n"); + bk_show_register(regs); + bk_cpu_shutdown(); +} + +void bk_trap_dabt(struct arm_registers *regs) +{ +#if (CFG_SOC_NAME == SOC_BK7231N) + *((volatile uint32_t *)START_TYPE_ADDR) = (uint32_t)(CRASH_DATA_ABORT_VALUE & 0xffff); +#else + *((volatile uint32_t *)START_TYPE_ADDR) = (uint32_t)CRASH_DATA_ABORT_VALUE; +#endif + os_printf("data abort\n"); + bk_show_register(regs); + bk_cpu_shutdown(); +} + +void bk_trap_resv(struct arm_registers *regs) +{ +#if (CFG_SOC_NAME == SOC_BK7231N) + *((volatile uint32_t *)START_TYPE_ADDR) = (uint32_t)(CRASH_UNUSED_VALUE & 0xffff); +#else + *((volatile uint32_t *)START_TYPE_ADDR) = (uint32_t)CRASH_UNUSED_VALUE; +#endif + os_printf("not used\n"); + bk_show_register(regs); + bk_cpu_shutdown(); +} + +/// @}