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Another round of sonarlint work

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This commit is contained in:
Jasmine Iwanek
2023-06-28 13:46:28 -04:00
parent b750471e5c
commit 1116aadb6f
135 changed files with 2425 additions and 1355 deletions
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7
src/86box.c
View File

@@ -1275,7 +1275,9 @@ pc_run(void)
#ifdef USE_GDBSTUB /* avoid a KBC FIFO overflow when CPU emulation is stalled */
// if (gdbstub_step == GDBSTUB_EXEC)
#endif
// mouse_process();
#if 0
mouse_process();
#endif
joystick_process();
endblit();
@@ -1416,6 +1418,9 @@ set_screen_size_monitor(int x, int y, int monitor_index)
monitors[monitor_index].mon_scrnsz_x = (monitors[monitor_index].mon_unscaled_size_x << 3);
monitors[monitor_index].mon_scrnsz_y = (monitors[monitor_index].mon_unscaled_size_y << 3);
break;
default:
break;
}
plat_resize_request(monitors[monitor_index].mon_scrnsz_x, monitors[monitor_index].mon_scrnsz_y, monitor_index);

235
src/acpi.c
View File

@@ -169,9 +169,9 @@ acpi_raise_smi(void *priv, int do_smi)
}
static uint32_t
acpi_reg_read_common_regs(int size, uint16_t addr, void *p)
acpi_reg_read_common_regs(UNUSED(int size), uint16_t addr, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
uint32_t ret = 0x00000000;
int shift16;
int shift32;
@@ -211,6 +211,9 @@ acpi_reg_read_common_regs(int size, uint16_t addr, void *p)
update_tsc();
#endif
break;
default:
break;
}
#ifdef ENABLE_ACPI_LOG
@@ -221,9 +224,9 @@ acpi_reg_read_common_regs(int size, uint16_t addr, void *p)
}
static uint32_t
acpi_reg_read_ali(int size, uint16_t addr, void *p)
acpi_reg_read_ali(int size, uint16_t addr, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
uint32_t ret = 0x00000000;
int shift16;
int shift32;
@@ -277,7 +280,7 @@ acpi_reg_read_ali(int size, uint16_t addr, void *p)
ret = dev->regs.pmcntrl;
break;
default:
ret = acpi_reg_read_common_regs(size, addr, p);
ret = acpi_reg_read_common_regs(size, addr, priv);
break;
}
@@ -289,9 +292,9 @@ acpi_reg_read_ali(int size, uint16_t addr, void *p)
}
static uint32_t
acpi_reg_read_intel(int size, uint16_t addr, void *p)
acpi_reg_read_intel(int size, uint16_t addr, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
uint32_t ret = 0x00000000;
int shift16;
int shift32;
@@ -374,7 +377,7 @@ acpi_reg_read_intel(int size, uint16_t addr, void *p)
ret = dev->regs.gporeg[addr & 3];
break;
default:
ret = acpi_reg_read_common_regs(size, addr, p);
ret = acpi_reg_read_common_regs(size, addr, priv);
break;
}
@@ -386,9 +389,9 @@ acpi_reg_read_intel(int size, uint16_t addr, void *p)
}
static uint32_t
acpi_reg_read_via_common(int size, uint16_t addr, void *p)
acpi_reg_read_via_common(int size, uint16_t addr, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
uint32_t ret = 0x00000000;
int shift16;
int shift32;
@@ -470,7 +473,7 @@ acpi_reg_read_via_common(int size, uint16_t addr, void *p)
ret = (dev->regs.gptren >> shift32) & 0xff;
break;
default:
ret = acpi_reg_read_common_regs(size, addr, p);
ret = acpi_reg_read_common_regs(size, addr, priv);
break;
}
@@ -482,9 +485,9 @@ acpi_reg_read_via_common(int size, uint16_t addr, void *p)
}
static uint32_t
acpi_reg_read_via(int size, uint16_t addr, void *p)
acpi_reg_read_via(int size, uint16_t addr, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
uint32_t ret = 0x00000000;
int shift16;
@@ -527,7 +530,7 @@ acpi_reg_read_via(int size, uint16_t addr, void *p)
ret = (dev->regs.gpi_val >> shift16) & 0xff;
break;
default:
ret = acpi_reg_read_via_common(size, addr, p);
ret = acpi_reg_read_via_common(size, addr, priv);
break;
}
@@ -539,9 +542,9 @@ acpi_reg_read_via(int size, uint16_t addr, void *p)
}
static uint32_t
acpi_reg_read_via_596b(int size, uint16_t addr, void *p)
acpi_reg_read_via_596b(int size, uint16_t addr, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
uint32_t ret = 0x00000000;
int shift16;
int shift32;
@@ -577,7 +580,7 @@ acpi_reg_read_via_596b(int size, uint16_t addr, void *p)
ret = (dev->regs.gpo_val >> shift32) & 0xff;
break;
default:
ret = acpi_reg_read_via_common(size, addr, p);
ret = acpi_reg_read_via_common(size, addr, priv);
break;
}
@@ -589,13 +592,13 @@ acpi_reg_read_via_596b(int size, uint16_t addr, void *p)
}
static uint32_t
acpi_reg_read_smc(int size, uint16_t addr, void *p)
acpi_reg_read_smc(int size, uint16_t addr, void *priv)
{
uint32_t ret = 0x00000000;
addr &= 0x0f;
ret = acpi_reg_read_common_regs(size, addr, p);
ret = acpi_reg_read_common_regs(size, addr, priv);
#ifdef ENABLE_ACPI_LOG
if (size != 1)
@@ -605,9 +608,9 @@ acpi_reg_read_smc(int size, uint16_t addr, void *p)
}
static uint32_t
acpi_aux_reg_read_smc(int size, uint16_t addr, void *p)
acpi_aux_reg_read_smc(UNUSED(int size), uint16_t addr, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
uint32_t ret = 0x00000000;
int shift16;
@@ -638,6 +641,9 @@ acpi_aux_reg_read_smc(int size, uint16_t addr, void *p)
/* Miscellaneous Control Register */
ret = dev->regs.glbctl & 0xff;
break;
default:
break;
}
acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret);
@@ -645,9 +651,9 @@ acpi_aux_reg_read_smc(int size, uint16_t addr, void *p)
}
static void
acpi_reg_write_common_regs(int size, uint16_t addr, uint8_t val, void *p)
acpi_reg_write_common_regs(UNUSED(int size), uint16_t addr, uint8_t val, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
int shift16;
int sus_typ;
@@ -719,13 +725,16 @@ acpi_reg_write_common_regs(int size, uint16_t addr, uint8_t val, void *p)
}
dev->regs.pmcntrl = ((dev->regs.pmcntrl & ~(0xff << shift16)) | (val << shift16)) & 0x3f07 /* 0x3c07 */;
break;
default:
break;
}
}
static void
acpi_reg_write_ali(int size, uint16_t addr, uint8_t val, void *p)
acpi_reg_write_ali(int size, uint16_t addr, uint8_t val, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
int shift16;
int shift32;
@@ -782,7 +791,7 @@ acpi_reg_write_ali(int size, uint16_t addr, uint8_t val, void *p)
dev->regs.pmcntrl = val & 1;
break;
default:
acpi_reg_write_common_regs(size, addr, val, p);
acpi_reg_write_common_regs(size, addr, val, priv);
/* Setting GBL_RLS also sets BIOS_STS and generates SMI. */
if ((addr == 0x00) && !(dev->regs.pmsts & 0x20))
dev->regs.gpcntrl &= ~0x0002;
@@ -795,9 +804,9 @@ acpi_reg_write_ali(int size, uint16_t addr, uint8_t val, void *p)
}
static void
acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *p)
acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
int shift16;
int shift32;
@@ -878,7 +887,7 @@ acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *p)
dev->regs.gporeg[addr & 3] = val;
break;
default:
acpi_reg_write_common_regs(size, addr, val, p);
acpi_reg_write_common_regs(size, addr, val, priv);
/* Setting GBL_RLS also sets BIOS_STS and generates SMI. */
if ((addr == 0x00) && !(dev->regs.pmsts & 0x20))
dev->regs.glbctl &= ~0x0002;
@@ -892,9 +901,9 @@ acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *p)
}
static void
acpi_reg_write_via_common(int size, uint16_t addr, uint8_t val, void *p)
acpi_reg_write_via_common(int size, uint16_t addr, uint8_t val, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
int shift16;
int shift32;
@@ -965,7 +974,7 @@ acpi_reg_write_via_common(int size, uint16_t addr, uint8_t val, void *p)
dev->regs.gptren = ((dev->regs.gptren & ~(0xff << shift32)) | (val << shift32)) & 0x000000d9;
break;
default:
acpi_reg_write_common_regs(size, addr, val, p);
acpi_reg_write_common_regs(size, addr, val, priv);
/* Setting GBL_RLS also sets BIOS_STS and generates SMI. */
if ((addr == 0x00) && !(dev->regs.pmsts & 0x20))
dev->regs.glbctl &= ~0x0002;
@@ -986,9 +995,9 @@ acpi_i2c_set(acpi_t *dev)
}
static void
acpi_reg_write_via(int size, uint16_t addr, uint8_t val, void *p)
acpi_reg_write_via(int size, uint16_t addr, uint8_t val, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
int shift16;
int shift32;
@@ -1044,15 +1053,15 @@ acpi_reg_write_via(int size, uint16_t addr, uint8_t val, void *p)
dev->regs.gpo_val = ((dev->regs.gpo_val & ~(0xff << shift16)) | (val << shift16)) & 0xffff;
break;
default:
acpi_reg_write_via_common(size, addr, val, p);
acpi_reg_write_via_common(size, addr, val, priv);
break;
}
}
static void
acpi_reg_write_via_596b(int size, uint16_t addr, uint8_t val, void *p)
acpi_reg_write_via_596b(int size, uint16_t addr, uint8_t val, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
int shift16;
int shift32;
@@ -1102,20 +1111,20 @@ acpi_reg_write_via_596b(int size, uint16_t addr, uint8_t val, void *p)
dev->regs.gpo_val = ((dev->regs.gpo_val & ~(0xff << shift32)) | (val << shift32)) & 0x7fffffff;
break;
default:
acpi_reg_write_via_common(size, addr, val, p);
acpi_reg_write_via_common(size, addr, val, priv);
break;
}
}
static void
acpi_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p)
acpi_reg_write_smc(int size, uint16_t addr, uint8_t val, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
addr &= 0x0f;
acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val);
acpi_reg_write_common_regs(size, addr, val, p);
acpi_reg_write_common_regs(size, addr, val, priv);
/* Setting GBL_RLS also sets BIOS_STS and generates SMI. */
if ((addr == 0x00) && !(dev->regs.pmsts & 0x20))
dev->regs.glbctl &= ~0x0001;
@@ -1127,9 +1136,9 @@ acpi_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p)
}
static void
acpi_aux_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p)
acpi_aux_reg_write_smc(UNUSED(int size), uint16_t addr, uint8_t val, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
int shift16;
addr &= 0x07;
@@ -1171,76 +1180,79 @@ acpi_aux_reg_write_smc(int size, uint16_t addr, uint8_t val, void *p)
acpi_update_irq(dev);
}
break;
default:
break;
}
}
static uint32_t
acpi_reg_read_common(int size, uint16_t addr, void *p)
acpi_reg_read_common(int size, uint16_t addr, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
uint8_t ret = 0xff;
if (dev->vendor == VEN_ALI)
ret = acpi_reg_read_ali(size, addr, p);
ret = acpi_reg_read_ali(size, addr, priv);
else if (dev->vendor == VEN_VIA)
ret = acpi_reg_read_via(size, addr, p);
ret = acpi_reg_read_via(size, addr, priv);
else if (dev->vendor == VEN_VIA_596B)
ret = acpi_reg_read_via_596b(size, addr, p);
ret = acpi_reg_read_via_596b(size, addr, priv);
else if (dev->vendor == VEN_INTEL)
ret = acpi_reg_read_intel(size, addr, p);
ret = acpi_reg_read_intel(size, addr, priv);
else if (dev->vendor == VEN_SMC)
ret = acpi_reg_read_smc(size, addr, p);
ret = acpi_reg_read_smc(size, addr, priv);
return ret;
}
static void
acpi_reg_write_common(int size, uint16_t addr, uint8_t val, void *p)
acpi_reg_write_common(int size, uint16_t addr, uint8_t val, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
if (dev->vendor == VEN_ALI)
acpi_reg_write_ali(size, addr, val, p);
acpi_reg_write_ali(size, addr, val, priv);
else if (dev->vendor == VEN_VIA)
acpi_reg_write_via(size, addr, val, p);
acpi_reg_write_via(size, addr, val, priv);
else if (dev->vendor == VEN_VIA_596B)
acpi_reg_write_via_596b(size, addr, val, p);
acpi_reg_write_via_596b(size, addr, val, priv);
else if (dev->vendor == VEN_INTEL)
acpi_reg_write_intel(size, addr, val, p);
acpi_reg_write_intel(size, addr, val, priv);
else if (dev->vendor == VEN_SMC)
acpi_reg_write_smc(size, addr, val, p);
acpi_reg_write_smc(size, addr, val, priv);
}
static uint32_t
acpi_aux_reg_read_common(int size, uint16_t addr, void *p)
acpi_aux_reg_read_common(int size, uint16_t addr, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
uint8_t ret = 0xff;
if (dev->vendor == VEN_SMC)
ret = acpi_aux_reg_read_smc(size, addr, p);
ret = acpi_aux_reg_read_smc(size, addr, priv);
return ret;
}
static void
acpi_aux_reg_write_common(int size, uint16_t addr, uint8_t val, void *p)
acpi_aux_reg_write_common(int size, uint16_t addr, uint8_t val, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
if (dev->vendor == VEN_SMC)
acpi_aux_reg_write_smc(size, addr, val, p);
acpi_aux_reg_write_smc(size, addr, val, priv);
}
static uint32_t
acpi_reg_readl(uint16_t addr, void *p)
acpi_reg_readl(uint16_t addr, void *priv)
{
uint32_t ret = 0x00000000;
ret = acpi_reg_read_common(4, addr, p);
ret |= (acpi_reg_read_common(4, addr + 1, p) << 8);
ret |= (acpi_reg_read_common(4, addr + 2, p) << 16);
ret |= (acpi_reg_read_common(4, addr + 3, p) << 24);
ret = acpi_reg_read_common(4, addr, priv);
ret |= (acpi_reg_read_common(4, addr + 1, priv) << 8);
ret |= (acpi_reg_read_common(4, addr + 2, priv) << 16);
ret |= (acpi_reg_read_common(4, addr + 3, priv) << 24);
acpi_log("ACPI: Read L %08X from %04X\n", ret, addr);
@@ -1248,12 +1260,12 @@ acpi_reg_readl(uint16_t addr, void *p)
}
static uint16_t
acpi_reg_readw(uint16_t addr, void *p)
acpi_reg_readw(uint16_t addr, void *priv)
{
uint16_t ret = 0x0000;
ret = acpi_reg_read_common(2, addr, p);
ret |= (acpi_reg_read_common(2, addr + 1, p) << 8);
ret = acpi_reg_read_common(2, addr, priv);
ret |= (acpi_reg_read_common(2, addr + 1, priv) << 8);
acpi_log("ACPI: Read W %08X from %04X\n", ret, addr);
@@ -1261,11 +1273,11 @@ acpi_reg_readw(uint16_t addr, void *p)
}
static uint8_t
acpi_reg_read(uint16_t addr, void *p)
acpi_reg_read(uint16_t addr, void *priv)
{
uint8_t ret = 0x00;
ret = acpi_reg_read_common(1, addr, p);
ret = acpi_reg_read_common(1, addr, priv);
acpi_log("ACPI: Read B %02X from %04X\n", ret, addr);
@@ -1273,14 +1285,14 @@ acpi_reg_read(uint16_t addr, void *p)
}
static uint32_t
acpi_aux_reg_readl(uint16_t addr, void *p)
acpi_aux_reg_readl(uint16_t addr, void *priv)
{
uint32_t ret = 0x00000000;
ret = acpi_aux_reg_read_common(4, addr, p);
ret |= (acpi_aux_reg_read_common(4, addr + 1, p) << 8);
ret |= (acpi_aux_reg_read_common(4, addr + 2, p) << 16);
ret |= (acpi_aux_reg_read_common(4, addr + 3, p) << 24);
ret = acpi_aux_reg_read_common(4, addr, priv);
ret |= (acpi_aux_reg_read_common(4, addr + 1, priv) << 8);
ret |= (acpi_aux_reg_read_common(4, addr + 2, priv) << 16);
ret |= (acpi_aux_reg_read_common(4, addr + 3, priv) << 24);
acpi_log("ACPI: Read Aux L %08X from %04X\n", ret, addr);
@@ -1288,12 +1300,12 @@ acpi_aux_reg_readl(uint16_t addr, void *p)
}
static uint16_t
acpi_aux_reg_readw(uint16_t addr, void *p)
acpi_aux_reg_readw(uint16_t addr, void *priv)
{
uint16_t ret = 0x0000;
ret = acpi_aux_reg_read_common(2, addr, p);
ret |= (acpi_aux_reg_read_common(2, addr + 1, p) << 8);
ret = acpi_aux_reg_read_common(2, addr, priv);
ret |= (acpi_aux_reg_read_common(2, addr + 1, priv) << 8);
acpi_log("ACPI: Read Aux W %04X from %04X\n", ret, addr);
@@ -1301,11 +1313,11 @@ acpi_aux_reg_readw(uint16_t addr, void *p)
}
static uint8_t
acpi_aux_reg_read(uint16_t addr, void *p)
acpi_aux_reg_read(uint16_t addr, void *priv)
{
uint8_t ret = 0x00;
ret = acpi_aux_reg_read_common(1, addr, p);
ret = acpi_aux_reg_read_common(1, addr, priv);
acpi_log("ACPI: Read Aux B %02X from %04X\n", ret, addr);
@@ -1313,59 +1325,59 @@ acpi_aux_reg_read(uint16_t addr, void *p)
}
static void
acpi_reg_writel(uint16_t addr, uint32_t val, void *p)
acpi_reg_writel(uint16_t addr, uint32_t val, void *priv)
{
acpi_log("ACPI: Write L %08X to %04X\n", val, addr);
acpi_reg_write_common(4, addr, val & 0xff, p);
acpi_reg_write_common(4, addr + 1, (val >> 8) & 0xff, p);
acpi_reg_write_common(4, addr + 2, (val >> 16) & 0xff, p);
acpi_reg_write_common(4, addr + 3, (val >> 24) & 0xff, p);
acpi_reg_write_common(4, addr, val & 0xff, priv);
acpi_reg_write_common(4, addr + 1, (val >> 8) & 0xff, priv);
acpi_reg_write_common(4, addr + 2, (val >> 16) & 0xff, priv);
acpi_reg_write_common(4, addr + 3, (val >> 24) & 0xff, priv);
}
static void
acpi_reg_writew(uint16_t addr, uint16_t val, void *p)
acpi_reg_writew(uint16_t addr, uint16_t val, void *priv)
{
acpi_log("ACPI: Write W %04X to %04X\n", val, addr);
acpi_reg_write_common(2, addr, val & 0xff, p);
acpi_reg_write_common(2, addr + 1, (val >> 8) & 0xff, p);
acpi_reg_write_common(2, addr, val & 0xff, priv);
acpi_reg_write_common(2, addr + 1, (val >> 8) & 0xff, priv);
}
static void
acpi_reg_write(uint16_t addr, uint8_t val, void *p)
acpi_reg_write(uint16_t addr, uint8_t val, void *priv)
{
acpi_log("ACPI: Write B %02X to %04X\n", val, addr);
acpi_reg_write_common(1, addr, val, p);
acpi_reg_write_common(1, addr, val, priv);
}
static void
acpi_aux_reg_writel(uint16_t addr, uint32_t val, void *p)
acpi_aux_reg_writel(uint16_t addr, uint32_t val, void *priv)
{
acpi_log("ACPI: Write Aux L %08X to %04X\n", val, addr);
acpi_aux_reg_write_common(4, addr, val & 0xff, p);
acpi_aux_reg_write_common(4, addr + 1, (val >> 8) & 0xff, p);
acpi_aux_reg_write_common(4, addr + 2, (val >> 16) & 0xff, p);
acpi_aux_reg_write_common(4, addr + 3, (val >> 24) & 0xff, p);
acpi_aux_reg_write_common(4, addr, val & 0xff, priv);
acpi_aux_reg_write_common(4, addr + 1, (val >> 8) & 0xff, priv);
acpi_aux_reg_write_common(4, addr + 2, (val >> 16) & 0xff, priv);
acpi_aux_reg_write_common(4, addr + 3, (val >> 24) & 0xff, priv);
}
static void
acpi_aux_reg_writew(uint16_t addr, uint16_t val, void *p)
acpi_aux_reg_writew(uint16_t addr, uint16_t val, void *priv)
{
acpi_log("ACPI: Write Aux W %04X to %04X\n", val, addr);
acpi_aux_reg_write_common(2, addr, val & 0xff, p);
acpi_aux_reg_write_common(2, addr + 1, (val >> 8) & 0xff, p);
acpi_aux_reg_write_common(2, addr, val & 0xff, priv);
acpi_aux_reg_write_common(2, addr + 1, (val >> 8) & 0xff, priv);
}
static void
acpi_aux_reg_write(uint16_t addr, uint8_t val, void *p)
acpi_aux_reg_write(uint16_t addr, uint8_t val, void *priv)
{
acpi_log("ACPI: Write Aux B %02X to %04X\n", val, addr);
acpi_aux_reg_write_common(1, addr, val, p);
acpi_aux_reg_write_common(1, addr, val, priv);
}
void
@@ -1374,9 +1386,9 @@ acpi_update_io_mapping(acpi_t *dev, uint32_t base, int chipset_en)
int size;
switch (dev->vendor) {
default:
case VEN_ALI:
case VEN_INTEL:
default:
size = 0x040;
break;
case VEN_SMC:
@@ -1545,9 +1557,9 @@ acpi_pwrbtn_timer(void *priv)
}
static void
acpi_apm_out(uint16_t port, uint8_t val, void *p)
acpi_apm_out(uint16_t port, uint8_t val, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
acpi_log("[%04X:%08X] APM write: %04X = %02X (AX = %04X, BX = %04X, CX = %04X)\n", CS, cpu_state.pc, port, val, AX, BX, CX);
@@ -1557,7 +1569,9 @@ acpi_apm_out(uint16_t port, uint8_t val, void *p)
if (port == 0x0001) {
acpi_log("ALi SOFT SMI# status set (%i)\n", dev->apm->do_smi);
dev->apm->cmd = val;
// acpi_raise_smi(dev, dev->apm->do_smi);
#if 0
acpi_raise_smi(dev, dev->apm->do_smi);
#endif
if (dev->apm->do_smi)
smi_raise();
dev->regs.ali_soft_smi = 1;
@@ -1575,9 +1589,9 @@ acpi_apm_out(uint16_t port, uint8_t val, void *p)
}
static uint8_t
acpi_apm_in(uint16_t port, void *p)
acpi_apm_in(uint16_t port, void *priv)
{
acpi_t *dev = (acpi_t *) p;
acpi_t *dev = (acpi_t *) priv;
uint8_t ret = 0xff;
port &= 0x0001;
@@ -1731,6 +1745,9 @@ acpi_init(const device_t *info)
dev->suspend_types[3] = SUS_SUSPEND | SUS_RESET_CACHE;
dev->suspend_types[4] = SUS_SUSPEND;
break;
default:
break;
}
timer_add(&dev->timer, acpi_timer_overflow, dev, 0);

16
src/apm.c
View File

@@ -52,9 +52,9 @@ apm_set_do_smi(apm_t *dev, uint8_t do_smi)
}
static void
apm_out(uint16_t port, uint8_t val, void *p)
apm_out(uint16_t port, uint8_t val, void *priv)
{
apm_t *dev = (apm_t *) p;
apm_t *dev = (apm_t *) priv;
apm_log("[%04X:%08X] APM write: %04X = %02X (BX = %04X, CX = %04X)\n", CS, cpu_state.pc, port, val, BX, CX);
@@ -69,9 +69,9 @@ apm_out(uint16_t port, uint8_t val, void *p)
}
static uint8_t
apm_in(uint16_t port, void *p)
apm_in(uint16_t port, void *priv)
{
apm_t *dev = (apm_t *) p;
apm_t *dev = (apm_t *) priv;
uint8_t ret = 0xff;
port &= 0x0001;
@@ -87,17 +87,17 @@ apm_in(uint16_t port, void *p)
}
static void
apm_reset(void *p)
apm_reset(void *priv)
{
apm_t *dev = (apm_t *) p;
apm_t *dev = (apm_t *) priv;
dev->cmd = dev->stat = 0x00;
}
static void
apm_close(void *p)
apm_close(void *priv)
{
apm_t *dev = (apm_t *) p;
apm_t *dev = (apm_t *) priv;
free(dev);
}

29
src/config.c
View File

@@ -893,11 +893,11 @@ load_ports(void)
sprintf(temp, "serial%d_enabled", c + 1);
com_ports[c].enabled = !!ini_section_get_int(cat, temp, (c >= 2) ? 0 : 1);
/*
#if 0
sprintf(temp, "serial%d_device", c + 1);
p = (char *) ini_section_get_string(cat, temp, "none");
com_ports[c].device = com_device_get_from_internal_name(p);
*/
#endif
sprintf(temp, "serial%d_passthrough_enabled", c + 1);
serial_passthrough_enabled[c] = !!ini_section_get_int(cat, temp, 0);
@@ -1075,8 +1075,8 @@ load_hard_disks(void)
hdd[c].bus = hdd_string_to_bus(s, 0);
switch (hdd[c].bus) {
case HDD_BUS_DISABLED:
default:
case HDD_BUS_DISABLED:
max_spt = max_hpc = max_tracks = 0;
break;
@@ -1306,8 +1306,10 @@ load_floppy_drives(void)
else
strncpy(floppyfns[c], p, 511);
/* if (*wp != L'\0')
config_log("Floppy%d: %ls\n", c, floppyfns[c]); */
#if 0
if (*wp != L'\0')
config_log("Floppy%d: %ls\n", c, floppyfns[c]);
#endif
sprintf(temp, "fdd_%02i_writeprot", c + 1);
ui_writeprot[c] = !!ini_section_get_int(cat, temp, 0);
ini_section_delete_var(cat, temp);
@@ -1372,8 +1374,10 @@ load_floppy_and_cdrom_drives(void)
else
strncpy(floppyfns[c], p, 511);
/* if (*wp != L'\0')
config_log("Floppy%d: %ls\n", c, floppyfns[c]); */
#if 0
if (*wp != L'\0')
config_log("Floppy%d: %ls\n", c, floppyfns[c]);
#endif
sprintf(temp, "fdd_%02i_writeprot", c + 1);
ui_writeprot[c] = !!ini_section_get_int(cat, temp, 0);
sprintf(temp, "fdd_%02i_turbo", c + 1);
@@ -2528,6 +2532,9 @@ save_network(void)
case NET_TYPE_VDE:
ini_section_set_string(cat, temp, "vde");
break;
default:
break;
}
sprintf(temp, "net_%02i_host_device", c + 1);
@@ -2537,7 +2544,9 @@ save_network(void)
else
ini_section_set_string(cat, temp, net_cards_conf[c].host_dev_name);
} else {
/* ini_section_set_string(cat, temp, "none"); */
#if 0
ini_section_set_string(cat, temp, "none");
#endif
ini_section_delete_var(cat, temp);
}
@@ -2568,7 +2577,7 @@ save_ports(void)
else
ini_section_set_int(cat, temp, com_ports[c].enabled);
/*
#if 0
sprintf(temp, "serial%d_type", c + 1);
if (!com_ports[c].enabled))
ini_section_delete_var(cat, temp);
@@ -2581,7 +2590,7 @@ save_ports(void)
else
ini_section_set_string(cat, temp,
(char *) com_device_get_internal_name(com_ports[c].device));
*/
#endif
sprintf(temp, "serial%d_passthrough_enabled", c + 1);
if (serial_passthrough_enabled[c]) {

17
src/ddma.c
View File

@@ -34,6 +34,7 @@
#include <86box/pit.h>
#include <86box/dma.h>
#include <86box/ddma.h>
#include <86box/plat_unused.h>
#ifdef ENABLE_DDMA_LOG
int ddma_do_log = ENABLE_DDMA_LOG;
@@ -54,9 +55,9 @@ ddma_log(const char *fmt, ...)
#endif
static uint8_t
ddma_reg_read(uint16_t addr, void *p)
ddma_reg_read(uint16_t addr, void *priv)
{
ddma_channel_t *dev = (ddma_channel_t *) p;
ddma_channel_t *dev = (ddma_channel_t *) priv;
uint8_t ret = 0xff;
int ch = dev->channel;
int dmab = (ch >= 4) ? 0xc0 : 0x00;
@@ -80,15 +81,18 @@ ddma_reg_read(uint16_t addr, void *p)
case 0x09:
ret = inb(dmab + 0x08);
break;
default:
break;
}
return ret;
}
static void
ddma_reg_write(uint16_t addr, uint8_t val, void *p)
ddma_reg_write(uint16_t addr, uint8_t val, void *priv)
{
ddma_channel_t *dev = (ddma_channel_t *) p;
ddma_channel_t *dev = (ddma_channel_t *) priv;
int ch = dev->channel;
int page_regs[4] = { 7, 3, 1, 2 };
int dmab = (ch >= 4) ? 0xc0 : 0x00;
@@ -138,6 +142,9 @@ ddma_reg_write(uint16_t addr, uint8_t val, void *p)
case 0x0f:
outb(dmab + 0x0a, (val << 2) | (ch & 3));
break;
default:
break;
}
}
@@ -163,7 +170,7 @@ ddma_close(void *priv)
}
static void *
ddma_init(const device_t *info)
ddma_init(UNUSED(const device_t *info))
{
ddma_t *dev;

192
src/device.c
View File

@@ -88,46 +88,46 @@ device_init(void)
}
void
device_set_context(device_context_t *c, const device_t *d, int inst)
device_set_context(device_context_t *c, const device_t *dev, int inst)
{
void *sec;
void *single_sec;
memset(c, 0, sizeof(device_context_t));
c->dev = d;
c->dev = dev;
c->instance = inst;
if (inst) {
sprintf(c->name, "%s #%i", d->name, inst);
sprintf(c->name, "%s #%i", dev->name, inst);
/* If this is the first instance and a numbered section is not present, but a non-numbered
section of the same name is, rename the non-numbered section to numbered. */
if (inst == 1) {
sec = config_find_section(c->name);
single_sec = config_find_section((char *) d->name);
single_sec = config_find_section((char *) dev->name);
if ((sec == NULL) && (single_sec != NULL))
config_rename_section(single_sec, c->name);
}
} else
sprintf(c->name, "%s", d->name);
sprintf(c->name, "%s", dev->name);
}
static void
device_context_common(const device_t *d, int inst)
device_context_common(const device_t *dev, int inst)
{
memcpy(&device_prev, &device_current, sizeof(device_context_t));
device_set_context(&device_current, d, inst);
device_set_context(&device_current, dev, inst);
}
void
device_context(const device_t *d)
device_context(const device_t *dev)
{
device_context_common(d, 0);
device_context_common(dev, 0);
}
void
device_context_inst(const device_t *d, int inst)
device_context_inst(const device_t *dev, int inst)
{
device_context_common(d, inst);
device_context_common(dev, inst);
}
void
@@ -137,13 +137,13 @@ device_context_restore(void)
}
static void *
device_add_common(const device_t *d, const device_t *cd, void *p, void *params, int inst)
device_add_common(const device_t *dev, const device_t *cd, void *p, void *params, int inst)
{
void *priv = NULL;
int c;
for (c = 0; c < 256; c++) {
if (!inst && (devices[c] == (device_t *) d)) {
if (!inst && (devices[c] == (device_t *) dev)) {
device_log("DEVICE: device already exists!\n");
return (NULL);
}
@@ -157,17 +157,17 @@ device_add_common(const device_t *d, const device_t *cd, void *p, void *params,
/* Do this so that a chained device_add will not identify the same ID
its master device is already trying to assign. */
devices[c] = (device_t *) d;
devices[c] = (device_t *) dev;
if (p == NULL) {
memcpy(&device_prev, &device_current, sizeof(device_context_t));
device_set_context(&device_current, cd, inst);
if (d->init != NULL) {
priv = (d->flags & DEVICE_EXTPARAMS) ? d->init_ext(d, params) : d->init(d);
if (dev->init != NULL) {
priv = (dev->flags & DEVICE_EXTPARAMS) ? dev->init_ext(dev, params) : dev->init(dev);
if (priv == NULL) {
if (d->name)
device_log("DEVICE: device '%s' init failed\n", d->name);
if (dev->name)
device_log("DEVICE: device '%s' init failed\n", dev->name);
else
device_log("DEVICE: device init failed\n");
@@ -178,8 +178,8 @@ device_add_common(const device_t *d, const device_t *cd, void *p, void *params,
}
}
if (d->name)
device_log("DEVICE: device '%s' init successful\n", d->name);
if (dev->name)
device_log("DEVICE: device '%s' init successful\n", dev->name);
else
device_log("DEVICE: device init successful\n");
@@ -192,114 +192,114 @@ device_add_common(const device_t *d, const device_t *cd, void *p, void *params,
}
char *
device_get_internal_name(const device_t *d)
device_get_internal_name(const device_t *dev)
{
if (d == NULL)
if (dev == NULL)
return "";
return (char *) d->internal_name;
return (char *) dev->internal_name;
}
void *
device_add(const device_t *d)
device_add(const device_t *dev)
{
return device_add_common(d, d, NULL, NULL, 0);
return device_add_common(dev, dev, NULL, NULL, 0);
}
void *
device_add_parameters(const device_t *d, void *params)
device_add_parameters(const device_t *dev, void *params)
{
return device_add_common(d, d, NULL, params, 0);
return device_add_common(dev, dev, NULL, params, 0);
}
/* For devices that do not have an init function (internal video etc.) */
void
device_add_ex(const device_t *d, void *priv)
device_add_ex(const device_t *dev, void *priv)
{
device_add_common(d, d, priv, NULL, 0);
device_add_common(dev, dev, priv, NULL, 0);
}
void
device_add_ex_parameters(const device_t *d, void *priv, void *params)
device_add_ex_parameters(const device_t *dev, void *priv, void *params)
{
device_add_common(d, d, priv, params, 0);
device_add_common(dev, dev, priv, params, 0);
}
void *
device_add_inst(const device_t *d, int inst)
device_add_inst(const device_t *dev, int inst)
{
return device_add_common(d, d, NULL, NULL, inst);
return device_add_common(dev, dev, NULL, NULL, inst);
}
void *
device_add_inst_parameters(const device_t *d, int inst, void *params)
device_add_inst_parameters(const device_t *dev, int inst, void *params)
{
return device_add_common(d, d, NULL, params, inst);
return device_add_common(dev, dev, NULL, params, inst);
}
/* For devices that do not have an init function (internal video etc.) */
void
device_add_inst_ex(const device_t *d, void *priv, int inst)
device_add_inst_ex(const device_t *dev, void *priv, int inst)
{
device_add_common(d, d, priv, NULL, inst);
device_add_common(dev, dev, priv, NULL, inst);
}
void
device_add_inst_ex_parameters(const device_t *d, void *priv, int inst, void *params)
device_add_inst_ex_parameters(const device_t *dev, void *priv, int inst, void *params)
{
device_add_common(d, d, priv, params, inst);
device_add_common(dev, dev, priv, params, inst);
}
/* These eight are to add a device with another device's context - will be
used to add machines' internal devices. */
void *
device_cadd(const device_t *d, const device_t *cd)
device_cadd(const device_t *dev, const device_t *cd)
{
return device_add_common(d, cd, NULL, NULL, 0);
return device_add_common(dev, cd, NULL, NULL, 0);
}
void *
device_cadd_parameters(const device_t *d, const device_t *cd, void *params)
device_cadd_parameters(const device_t *dev, const device_t *cd, void *params)
{
return device_add_common(d, cd, NULL, params, 0);
return device_add_common(dev, cd, NULL, params, 0);
}
/* For devices that do not have an init function (internal video etc.) */
void
device_cadd_ex(const device_t *d, const device_t *cd, void *priv)
device_cadd_ex(const device_t *dev, const device_t *cd, void *priv)
{
device_add_common(d, cd, priv, NULL, 0);
device_add_common(dev, cd, priv, NULL, 0);
}
void
device_cadd_ex_parameters(const device_t *d, const device_t *cd, void *priv, void *params)
device_cadd_ex_parameters(const device_t *dev, const device_t *cd, void *priv, void *params)
{
device_add_common(d, cd, priv, params, 0);
device_add_common(dev, cd, priv, params, 0);
}
void *
device_cadd_inst(const device_t *d, const device_t *cd, int inst)
device_cadd_inst(const device_t *dev, const device_t *cd, int inst)
{
return device_add_common(d, cd, NULL, NULL, inst);
return device_add_common(dev, cd, NULL, NULL, inst);
}
void *
device_cadd_inst_parameters(const device_t *d, const device_t *cd, int inst, void *params)
device_cadd_inst_parameters(const device_t *dev, const device_t *cd, int inst, void *params)
{
return device_add_common(d, cd, NULL, params, inst);
return device_add_common(dev, cd, NULL, params, inst);
}
/* For devices that do not have an init function (internal video etc.) */
void
device_cadd_inst_ex(const device_t *d, const device_t *cd, void *priv, int inst)
device_cadd_inst_ex(const device_t *dev, const device_t *cd, void *priv, int inst)
{
device_add_common(d, cd, priv, NULL, inst);
device_add_common(dev, cd, priv, NULL, inst);
}
void
device_cadd_inst_ex_parameters(const device_t *d, const device_t *cd, void *priv, int inst, void *params)
device_cadd_inst_ex_parameters(const device_t *dev, const device_t *cd, void *priv, int inst, void *params)
{
device_add_common(d, cd, priv, params, inst);
device_add_common(dev, cd, priv, params, inst);
}
void
@@ -328,11 +328,11 @@ device_reset_all(uint32_t match_flags)
}
void *
device_get_priv(const device_t *d)
device_get_priv(const device_t *dev)
{
for (uint16_t c = 0; c < DEVICE_MAX; c++) {
if (devices[c] != NULL) {
if (devices[c] == d)
if (devices[c] == dev)
return (device_priv[c]);
}
}
@@ -341,15 +341,15 @@ device_get_priv(const device_t *d)
}
int
device_available(const device_t *d)
device_available(const device_t *dev)
{
device_config_t *config = NULL;
device_config_bios_t *bios = NULL;
int roms_present = 0;
int i = 0;
if (d != NULL) {
config = (device_config_t *) d->config;
if (dev != NULL) {
config = (device_config_t *) dev->config;
if (config != NULL) {
while (config->type != -1) {
if (config->type == CONFIG_BIOS) {
@@ -372,8 +372,8 @@ device_available(const device_t *d)
}
/* No CONFIG_BIOS field present, use the classic available(). */
if (d->available != NULL)
return (d->available());
if (dev->available != NULL)
return (dev->available());
else
return 1;
}
@@ -383,13 +383,13 @@ device_available(const device_t *d)
}
const char *
device_get_bios_file(const device_t *d, const char *internal_name, int file_no)
device_get_bios_file(const device_t *dev, const char *internal_name, int file_no)
{
device_config_t *config = NULL;
device_config_bios_t *bios = NULL;
if (d != NULL) {
config = (device_config_t *) d->config;
if (dev != NULL) {
config = (device_config_t *) dev->config;
if (config != NULL) {
while (config->type != -1) {
if (config->type == CONFIG_BIOS) {
@@ -416,18 +416,18 @@ device_get_bios_file(const device_t *d, const char *internal_name, int file_no)
}
int
device_has_config(const device_t *d)
device_has_config(const device_t *dev)
{
int c = 0;
device_config_t *config;
if (d == NULL)
if (dev == NULL)
return 0;
if (d->config == NULL)
if (dev->config == NULL)
return 0;
config = (device_config_t *) d->config;
config = (device_config_t *) dev->config;
while (config->type != -1) {
if (config->type != CONFIG_MAC)
@@ -439,11 +439,11 @@ device_has_config(const device_t *d)
}
int
device_poll(const device_t *d, int x, int y, int z, int b)
device_poll(const device_t *dev, int x, int y, int z, int b)
{
for (uint16_t c = 0; c < DEVICE_MAX; c++) {
if (devices[c] != NULL) {
if (devices[c] == d) {
if (devices[c] == dev) {
if (devices[c]->poll)
return (devices[c]->poll(x, y, z, b, 0, 0, device_priv[c]));
}
@@ -454,11 +454,11 @@ device_poll(const device_t *d, int x, int y, int z, int b)
}
void
device_register_pci_slot(const device_t *d, int device, int type, int inta, int intb, int intc, int intd)
device_register_pci_slot(const device_t *dev, int device, int type, int inta, int intb, int intc, int intd)
{
for (uint16_t c = 0; c < DEVICE_MAX; c++) {
if (devices[c] != NULL) {
if (devices[c] == d) {
if (devices[c] == dev) {
if (devices[c]->register_pci_slot)
devices[c]->register_pci_slot(device, type, inta, intb, intc, intd, device_priv[c]);
return;
@@ -470,38 +470,38 @@ device_register_pci_slot(const device_t *d, int device, int type, int inta, int
}
void
device_get_name(const device_t *d, int bus, char *name)
device_get_name(const device_t *dev, int bus, char *name)
{
char *sbus = NULL;
char *fbus;
char *tname;
char pbus[8] = { 0 };
if (d == NULL)
if (dev == NULL)
return;
name[0] = 0x00;
if (bus) {
if (d->flags & DEVICE_ISA)
sbus = (d->flags & DEVICE_AT) ? "ISA16" : "ISA";
else if (d->flags & DEVICE_CBUS)
if (dev->flags & DEVICE_ISA)
sbus = (dev->flags & DEVICE_AT) ? "ISA16" : "ISA";
else if (dev->flags & DEVICE_CBUS)
sbus = "C-BUS";
else if (d->flags & DEVICE_MCA)
else if (dev->flags & DEVICE_MCA)
sbus = "MCA";
else if (d->flags & DEVICE_EISA)
else if (dev->flags & DEVICE_EISA)
sbus = "EISA";
else if (d->flags & DEVICE_VLB)
else if (dev->flags & DEVICE_VLB)
sbus = "VLB";
else if (d->flags & DEVICE_PCI)
else if (dev->flags & DEVICE_PCI)
sbus = "PCI";
else if (d->flags & DEVICE_AGP)
else if (dev->flags & DEVICE_AGP)
sbus = "AGP";
else if (d->flags & DEVICE_AC97)
else if (dev->flags & DEVICE_AC97)
sbus = "AMR";
else if (d->flags & DEVICE_COM)
else if (dev->flags & DEVICE_COM)
sbus = "COM";
else if (d->flags & DEVICE_LPT)
else if (dev->flags & DEVICE_LPT)
sbus = "LPT";
if (sbus != NULL) {
@@ -515,7 +515,7 @@ device_get_name(const device_t *d, int bus, char *name)
sbus = "ISA";
else if (!strcmp(sbus, "COM") || !strcmp(sbus, "LPT")) {
sbus = NULL;
strcat(name, d->name);
strcat(name, dev->name);
return;
}
@@ -525,17 +525,17 @@ device_get_name(const device_t *d, int bus, char *name)
strcat(pbus, ")");
/* Allocate the temporary device name string and set it to all zeroes. */
tname = (char *) malloc(strlen(d->name) + 1);
memset(tname, 0x00, strlen(d->name) + 1);
tname = (char *) malloc(strlen(dev->name) + 1);
memset(tname, 0x00, strlen(dev->name) + 1);
/* First strip the bus string with parentheses. */
fbus = strstr(d->name, pbus);
if (fbus == d->name)
strcat(tname, d->name + strlen(pbus) + 1);
fbus = strstr(dev->name, pbus);
if (fbus == dev->name)
strcat(tname, dev->name + strlen(pbus) + 1);
else if (fbus == NULL)
strcat(tname, d->name);
strcat(tname, dev->name);
else {
strncat(tname, d->name, fbus - d->name - 1);
strncat(tname, dev->name, fbus - dev->name - 1);
strcat(tname, fbus + strlen(pbus));
}
@@ -556,9 +556,9 @@ device_get_name(const device_t *d, int bus, char *name)
free(tname);
tname = NULL;
} else
strcat(name, d->name);
strcat(name, dev->name);
} else
strcat(name, d->name);
strcat(name, dev->name);
}
void

8
src/disk/hdc_esdi_at.c
View File

@@ -70,7 +70,7 @@
#define CMD_SET_PARAMETERS 0x91
#define CMD_READ_PARAMETERS 0xec
typedef struct {
typedef struct drive_t {
int cfg_spt;
int cfg_hpc;
int current_cylinder;
@@ -81,7 +81,7 @@ typedef struct {
int hdd_num;
} drive_t;
typedef struct {
typedef struct esdi_t {
uint8_t status;
uint8_t error;
int secount;
@@ -821,9 +821,9 @@ loadhd(esdi_t *esdi, int hdd_num, int d, UNUSED(const char *fn))
}
static void
esdi_rom_write(uint32_t addr, uint8_t val, void *p)
esdi_rom_write(uint32_t addr, uint8_t val, void *priv)
{
rom_t *rom = (rom_t *) p;
rom_t *rom = (rom_t *) priv;
addr &= rom->mask;

5
src/disk/hdc_esdi_mca.c
View File

@@ -96,7 +96,8 @@
#define CMD_ADAPTER 0
typedef struct esdi_drive_t {
int spt, hpc;
int spt;
int hpc;
int tracks;
int sectors;
int present;
@@ -139,7 +140,7 @@ typedef struct esdi_t {
uint32_t rba;
struct {
struct cmds {
int req_in_progress;
} cmds[3];

25
src/disk/hdc_ide.c
View File

@@ -110,7 +110,7 @@
#define IDE_TIME 10.0
typedef struct {
typedef struct ide_board_t {
int bit32;
int cur_dev;
int irq;
@@ -123,7 +123,7 @@ typedef struct {
ide_t *ide[2];
} ide_board_t;
typedef struct {
typedef struct ide_bm_t {
int (*dma)(int channel, uint8_t *data, int transfer_length, int out, void *priv);
void (*set_irq)(int channel, void *priv);
void *priv;
@@ -244,6 +244,9 @@ ide_get_xfer_time(ide_t *ide, int size)
case 0x10:
period = (50.0 / 3.0);
break;
default:
break;
}
break;
case 0x100: /* Single Word DMA */
@@ -257,6 +260,9 @@ ide_get_xfer_time(ide_t *ide, int size)
case 0x04:
period = (25.0 / 3.0);
break;
default:
break;
}
break;
case 0x200: /* Multiword DMA */
@@ -270,6 +276,9 @@ ide_get_xfer_time(ide_t *ide, int size)
case 0x04:
period = (50.0 / 3.0);
break;
default:
break;
}
break;
case 0x300: /* Ultra DMA */
@@ -292,8 +301,14 @@ ide_get_xfer_time(ide_t *ide, int size)
case 0x20:
period = 100.0;
break;
default:
break;
}
break;
default:
break;
}
period = (1.0 / period); /* get us for 1 byte */
@@ -2576,6 +2591,9 @@ ide_callback(void *priv)
case 0xFF:
goto abort_cmd;
default:
break;
}
abort_cmd:
@@ -3043,6 +3061,9 @@ ide_init(const device_t *info)
if (info->local & 1)
ide_board_init(1, 15, 0x170, 0x376, info->local);
break;
default:
break;
}
return ide_drives;

2
src/disk/hdc_ide_cmd640.c
View File

@@ -37,7 +37,7 @@
#include <86box/zip.h>
#include <86box/mo.h>
typedef struct {
typedef struct cmd640_t {
uint8_t vlb_idx;
uint8_t id;
uint8_t in_cfg;

2
src/disk/hdc_ide_cmd646.c
View File

@@ -37,7 +37,7 @@
#include <86box/zip.h>
#include <86box/mo.h>
typedef struct {
typedef struct cmd646_t {
uint8_t vlb_idx;
uint8_t single_channel;
uint8_t in_cfg;

10
src/disk/hdc_ide_opti611.c
View File

@@ -30,11 +30,11 @@
#include <86box/hdc_ide.h>
#include <86box/plat_unused.h>
typedef struct
{
uint8_t tries,
in_cfg, cfg_locked,
regs[19];
typedef struct opti611_t {
uint8_t tries;
uint8_t in_cfg;
uint8_t cfg_locked;
uint8_t regs[19];
} opti611_t;
static void opti611_ide_handler(opti611_t *dev);

23
src/disk/hdc_ide_sff8038i.c
View File

@@ -462,29 +462,27 @@ sff_bus_master_reset(sff8038i_t *dev, uint16_t old_base)
}
static void
sff_reset(void *p)
sff_reset(void *priv)
{
int i = 0;
#ifdef ENABLE_SFF_LOG
sff_log("SFF8038i: Reset\n");
#endif
for (i = 0; i < CDROM_NUM; i++) {
for (uint8_t i = 0; i < CDROM_NUM; i++) {
if ((cdrom[i].bus_type == CDROM_BUS_ATAPI) && (cdrom[i].ide_channel < 4) && cdrom[i].priv)
scsi_cdrom_reset((scsi_common_t *) cdrom[i].priv);
}
for (i = 0; i < ZIP_NUM; i++) {
for (uint8_t i = 0; i < ZIP_NUM; i++) {
if ((zip_drives[i].bus_type == ZIP_BUS_ATAPI) && (zip_drives[i].ide_channel < 4) && zip_drives[i].priv)
zip_reset((scsi_common_t *) zip_drives[i].priv);
}
for (i = 0; i < MO_NUM; i++) {
for (uint8_t i = 0; i < MO_NUM; i++) {
if ((mo_drives[i].bus_type == MO_BUS_ATAPI) && (mo_drives[i].ide_channel < 4) && mo_drives[i].priv)
mo_reset((scsi_common_t *) mo_drives[i].priv);
}
sff_bus_master_set_irq(0x00, p);
sff_bus_master_set_irq(0x01, p);
sff_bus_master_set_irq(0x00, priv);
sff_bus_master_set_irq(0x01, priv);
}
void
@@ -543,9 +541,9 @@ sff_set_irq_pin(sff8038i_t *dev, int irq_pin)
}
static void
sff_close(void *p)
sff_close(void *priv)
{
sff8038i_t *dev = (sff8038i_t *) p;
sff8038i_t *dev = (sff8038i_t *) priv;
free(dev);
@@ -554,9 +552,8 @@ sff_close(void *p)
next_id = 0;
}
static void
*
sff_init(UNUSED(const device_t *info))
static void *
sff_init(UNUSED(const device_t *info))
{
sff8038i_t *dev = (sff8038i_t *) malloc(sizeof(sff8038i_t));
memset(dev, 0, sizeof(sff8038i_t));

7
src/disk/hdc_st506_at.c
View File

@@ -74,7 +74,7 @@
#define CMD_DIAGNOSE 0x90
#define CMD_SET_PARAMETERS 0x91
typedef struct {
typedef struct drive_t {
int8_t present; /* drive is present */
int8_t hdd_num; /* drive number in system */
int8_t steprate; /* current servo step rate */
@@ -89,7 +89,7 @@ typedef struct {
int16_t curcyl; /* current track number */
} drive_t;
typedef struct {
typedef struct mfm_t {
uint8_t precomp; /* 1: precomp/error register */
uint8_t error;
uint8_t secount; /* 2: sector count register */
@@ -435,6 +435,9 @@ mfm_write(uint16_t port, uint8_t val, void *priv)
mfm->fdisk = val;
irq_update(mfm);
break;
default:
break;
}
}

69
src/disk/hdc_st506_xt.c
View File

@@ -229,7 +229,7 @@ enum {
STATE_DONE
};
typedef struct {
typedef struct drive_t {
int8_t present;
uint8_t hdd_num;
@@ -247,7 +247,7 @@ typedef struct {
uint16_t cfg_cyl;
} drive_t;
typedef struct {
typedef struct hdc_t {
uint8_t type; /* controller type */
uint8_t spt; /* sectors-per-track for controller */
@@ -290,7 +290,7 @@ typedef struct {
} hdc_t;
/* Supported drives table for the Xebec controller. */
typedef struct {
typedef struct hd_type_t {
uint16_t tracks;
uint8_t hpc;
uint8_t spt;
@@ -508,6 +508,9 @@ st506_callback(void *priv)
case STATE_DONE:
st506_complete(dev);
break;
default:
break;
}
break;
@@ -534,6 +537,9 @@ st506_callback(void *priv)
case STATE_SENT_DATA:
st506_complete(dev);
break;
default:
break;
}
break;
@@ -570,6 +576,9 @@ st506_callback(void *priv)
ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0);
st506_complete(dev);
break;
default:
break;
}
break;
@@ -602,6 +611,9 @@ st506_callback(void *priv)
timer_advance_u64(&dev->timer, ST506_TIME);
break;
default:
break;
}
break;
@@ -645,6 +657,9 @@ st506_callback(void *priv)
ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0);
st506_complete(dev);
break;
default:
break;
}
break;
@@ -737,6 +752,9 @@ st506_callback(void *priv)
}
dev->state = STATE_SEND_DATA;
break;
default:
break;
}
break;
@@ -832,6 +850,9 @@ st506_callback(void *priv)
}
dev->state = STATE_RECEIVE_DATA;
break;
default:
break;
}
break;
@@ -887,6 +908,9 @@ st506_callback(void *priv)
}
st506_complete(dev);
break;
default:
break;
}
break;
@@ -906,6 +930,9 @@ st506_callback(void *priv)
case STATE_SENT_DATA:
st506_complete(dev);
break;
default:
break;
}
break;
@@ -946,6 +973,9 @@ st506_callback(void *priv)
case STATE_SENT_DATA:
st506_complete(dev);
break;
default:
break;
}
break;
@@ -987,6 +1017,9 @@ st506_callback(void *priv)
case STATE_RECEIVED_DATA:
st506_complete(dev);
break;
default:
break;
}
break;
@@ -1008,6 +1041,9 @@ st506_callback(void *priv)
case STATE_SENT_DATA:
st506_complete(dev);
break;
default:
break;
}
else {
st506_error(dev, ERR_BAD_COMMAND);
@@ -1120,6 +1156,9 @@ st506_callback(void *priv)
case STATE_SENT_DATA:
st506_complete(dev);
break;
default:
break;
}
break;
@@ -1139,6 +1178,9 @@ st506_callback(void *priv)
/* FIXME: ignore the results. */
st506_complete(dev);
break;
default:
break;
}
break;
@@ -1161,6 +1203,9 @@ st506_callback(void *priv)
case STATE_SENT_DATA:
st506_complete(dev);
break;
default:
break;
}
break;
@@ -1205,6 +1250,9 @@ st506_read(uint16_t port, void *priv)
timer_set_delay_u64(&dev->timer, ST506_TIME);
}
break;
default:
break;
}
break;
@@ -1217,6 +1265,9 @@ st506_read(uint16_t port, void *priv)
case 2: /* read option jumpers */
ret = dev->switches;
break;
default:
break;
}
st506_xt_log("ST506: read(%04x) = %02x\n", port, ret);
@@ -1257,6 +1308,9 @@ st506_write(uint16_t port, uint8_t val, void *priv)
timer_set_delay_u64(&dev->timer, ST506_TIME);
}
break;
default:
break;
}
break;
@@ -1282,6 +1336,9 @@ st506_write(uint16_t port, uint8_t val, void *priv)
picintc(1 << dev->irq);
}
break;
default:
break;
}
}
@@ -1561,6 +1618,9 @@ st506_init(const device_t *info)
case 19: /* v2.0 */
fn = ST11_BIOS_FILE_NEW;
break;
default:
break;
}
dev->base = device_get_config_hex16("base");
dev->irq = device_get_config_int("irq");
@@ -1665,6 +1725,9 @@ st506_init(const device_t *info)
dev->base = 0x01f0;
dev->switches = 0x0c;
break;
default:
break;
}
/* Load the ROM BIOS. */

46
src/disk/hdc_xta.c
View File

@@ -182,7 +182,7 @@ enum {
/* The device control block (6 bytes) */
#pragma pack(push, 1)
typedef struct {
typedef struct dcb_t {
uint8_t cmd; /* [7:5] class, [4:0] opcode */
uint8_t head : 5; /* [4:0] head number */
@@ -202,7 +202,7 @@ typedef struct {
/* The (configured) Drive Parameters. */
#pragma pack(push, 1)
typedef struct {
typedef struct dprm_t {
uint8_t cyl_high; /* (MSB) number of cylinders */
uint8_t cyl_low; /* (LSB) number of cylinders */
uint8_t heads; /* number of heads per cylinder */
@@ -215,7 +215,7 @@ typedef struct {
#pragma pack(pop)
/* Define an attached drive. */
typedef struct {
typedef struct drive_t {
int8_t id; /* drive ID on bus */
int8_t present; /* drive is present */
int8_t hdd_num; /* index to global disk table */
@@ -232,7 +232,7 @@ typedef struct {
uint16_t cfg_tracks;
} drive_t;
typedef struct {
typedef struct hdc_t {
const char *name; /* controller name */
uint16_t base; /* controller base I/O address */
@@ -436,6 +436,9 @@ do_fmt:
/* This saves us a LOT of code. */
goto do_fmt;
default:
break;
}
/* De-activate the status icon. */
@@ -497,6 +500,10 @@ hdc_callback(void *priv)
case STATE_SDONE:
set_intr(dev);
break;
default:
break;
}
break;
@@ -606,6 +613,9 @@ do_send:
/* This saves us a LOT of code. */
dev->state = STATE_SEND;
goto do_send;
default:
break;
}
break;
@@ -710,6 +720,9 @@ do_recv:
/* This saves us a LOT of code. */
dev->state = STATE_RECV;
goto do_recv;
default:
break;
}
break;
@@ -758,6 +771,9 @@ do_recv:
dev->status &= ~STAT_REQ;
set_intr(dev);
break;
default:
break;
}
break;
@@ -802,6 +818,9 @@ do_recv:
dev->data, dev->buf_len);
set_intr(dev);
break;
default:
break;
}
break;
@@ -815,6 +834,9 @@ do_recv:
case STATE_RDONE:
set_intr(dev);
break;
default:
break;
}
break;
@@ -834,6 +856,9 @@ do_recv:
case STATE_RDONE:
set_intr(dev);
break;
default:
break;
}
break;
@@ -847,6 +872,9 @@ do_recv:
case STATE_RDONE:
set_intr(dev);
break;
default:
break;
}
break;
@@ -900,6 +928,9 @@ hdc_read(uint16_t port, void *priv)
case 2: /* "read option jumpers" */
ret = 0xff; /* all switches off */
break;
default:
break;
}
return ret;
@@ -963,6 +994,9 @@ hdc_write(uint16_t port, uint8_t val, void *priv)
#endif
dev->intr = val;
break;
default:
break;
}
}
@@ -1000,12 +1034,16 @@ xta_init(const device_t *info)
dev->irq = 5;
dev->dma = 3;
break;
default:
break;
}
xta_log("%s: initializing (I/O=%04X, IRQ=%d, DMA=%d",
dev->name, dev->base, dev->irq, dev->dma);
if (dev->rom_addr != 0x000000)
xta_log(", BIOS=%06X", dev->rom_addr);
xta_log(")\n");
/* Load any disks for this device class. */

5
src/disk/hdc_xtide.c
View File

@@ -52,7 +52,7 @@
#define ROM_PATH_PS2AT "roms/hdd/xtide/ide_at_1_1_5.bin"
#define ROM_PATH_AT_386 "roms/hdd/xtide/ide_386.bin"
typedef struct {
typedef struct xtide_t {
void *ide_board;
uint8_t data_high;
rom_t bios_rom;
@@ -85,6 +85,9 @@ xtide_write(uint16_t port, uint8_t val, void *priv)
case 0xe:
ide_write_devctl(0x0, val, xtide->ide_board);
return;
default:
break;
}
}

4
src/disk/hdd.c
View File

@@ -107,8 +107,8 @@ hdd_bus_to_string(int bus, UNUSED(int cdrom))
char *s = "none";
switch (bus) {
case HDD_BUS_DISABLED:
default:
case HDD_BUS_DISABLED:
break;
case HDD_BUS_MFM:
@@ -165,7 +165,7 @@ hdd_seek_get_time(hard_disk_t *hdd, uint32_t dst_addr, uint8_t operation, uint8_
fatal("hdd_seek_get_time(): hdd->num_zones < 0)\n");
return 0.0;
}
for (int i = 0; i < hdd->num_zones; i++) {
for (uint32_t i = 0; i < hdd->num_zones; i++) {
zone = &hdd->zones[i];
if (zone->end_sector >= dst_addr)
break;

3
src/disk/hdd_image.c
View File

@@ -40,8 +40,7 @@
#define HDD_IMAGE_HDX 2
#define HDD_IMAGE_VHD 3
typedef struct
{
typedef struct hdd_image_t {
FILE *file; /* Used for HDD_IMAGE_RAW, HDD_IMAGE_HDI, and HDD_IMAGE_HDX. */
MVHDMeta *vhd; /* Used for HDD_IMAGE_VHD. */
uint32_t base;

27
src/disk/mo.c
View File

@@ -498,6 +498,9 @@ mo_atapi_phase_to_scsi(mo_t *dev)
return 1;
case 3:
return 7;
default:
break;
}
} else {
if ((dev->phase & 3) == 3)
@@ -569,6 +572,9 @@ mo_mode_sense_read(mo_t *dev, uint8_t page_control, uint8_t page, uint8_t pos)
else
return mo_mode_sense_pages_default.pages[page][pos];
break;
default:
break;
}
return 0;
@@ -1419,6 +1425,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb)
dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]);
mo_log("MO %i: Length: %i, LBA: %i\n", dev->id, dev->sector_len, dev->sector_pos);
break;
default:
break;
}
if (!dev->sector_len) {
@@ -1512,6 +1521,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb)
dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]);
dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]);
break;
default:
break;
}
if ((dev->sector_pos >= dev->drv->medium_size) /* ||
@@ -1637,6 +1649,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb)
case 3: /* Load the disk (close tray). */
mo_reload(dev->id);
break;
default:
break;
}
mo_command_complete(dev);
@@ -1744,6 +1759,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb)
case GPCMD_SEEK_10:
pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5];
break;
default:
break;
}
mo_seek(dev, pos);
mo_command_complete(dev);
@@ -1782,6 +1800,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb)
case GPCMD_ERASE_12:
dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]);
break;
default:
break;
}
/*Erase all remaining sectors*/
@@ -1804,6 +1825,9 @@ mo_command(scsi_common_t *sc, uint8_t *cdb)
case GPCMD_ERASE_12:
dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]);
break;
default:
break;
}
dev->sector_pos += previous_pos;
@@ -1958,6 +1982,9 @@ mo_phase_data_out(scsi_common_t *sc)
return 0;
}
break;
default:
break;
}
mo_command_stop((scsi_common_t *) dev);

30
src/disk/zip.c
View File

@@ -643,6 +643,9 @@ zip_atapi_phase_to_scsi(zip_t *dev)
return 1;
case 3:
return 7;
default:
break;
}
} else {
if ((dev->phase & 3) == 3)
@@ -713,13 +716,11 @@ zip_mode_sense_read(zip_t *dev, uint8_t page_control, uint8_t page, uint8_t pos)
if (dev->drv->is_250 && (page == 5) && (pos == 9) && (dev->drv->medium_size == ZIP_SECTORS))
return 0x60;
return dev->ms_pages_saved.pages[page][pos];
break;
case 1:
if (dev->drv->is_250)
return zip_250_mode_sense_pages_changeable.pages[page][pos];
else
return zip_mode_sense_pages_changeable.pages[page][pos];
break;
case 2:
if (dev->drv->is_250) {
if ((page == 5) && (pos == 9) && (dev->drv->medium_size == ZIP_SECTORS))
@@ -734,6 +735,8 @@ zip_mode_sense_read(zip_t *dev, uint8_t page_control, uint8_t page, uint8_t pos)
else
return zip_mode_sense_pages_default.pages[page][pos];
}
default:
break;
}
@@ -962,7 +965,7 @@ zip_data_command_finish(zip_t *dev, int len, int block_len, int alloc_len, int d
}
static void
zip_sense_clear(zip_t *dev, int command)
zip_sense_clear(zip_t *dev, UNUSED(int command))
{
zip_sense_key = zip_asc = zip_ascq = 0;
}
@@ -1116,7 +1119,7 @@ zip_data_phase_error(zip_t *dev)
}
static int
zip_blocks(zip_t *dev, int32_t *len, int first_batch, int out)
zip_blocks(zip_t *dev, int32_t *len, UNUSED(int first_batch), int out)
{
*len = 0;
@@ -1251,7 +1254,9 @@ zip_pre_execution_check(zip_t *dev, uint8_t *cdb)
static void
zip_seek(zip_t *dev, uint32_t pos)
{
/* zip_log("ZIP %i: Seek %08X\n", dev->id, pos); */
#if 0
zip_log("ZIP %i: Seek %08X\n", dev->id, pos);
#endif
dev->sector_pos = pos;
}
@@ -1513,6 +1518,9 @@ zip_command(scsi_common_t *sc, uint8_t *cdb)
dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]);
dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]);
break;
default:
break;
}
if (!dev->sector_len) {
@@ -1597,6 +1605,9 @@ zip_command(scsi_common_t *sc, uint8_t *cdb)
dev->sector_len = (((uint32_t) cdb[6]) << 24) | (((uint32_t) cdb[7]) << 16) | (((uint32_t) cdb[8]) << 8) | ((uint32_t) cdb[9]);
dev->sector_pos = (((uint32_t) cdb[2]) << 24) | (((uint32_t) cdb[3]) << 16) | (((uint32_t) cdb[4]) << 8) | ((uint32_t) cdb[5]);
break;
default:
break;
}
if ((dev->sector_pos >= dev->drv->medium_size) /* ||
@@ -1775,6 +1786,9 @@ zip_command(scsi_common_t *sc, uint8_t *cdb)
case 3: /* Load the disc (close tray). */
zip_reload(dev->id);
break;
default:
break;
}
zip_command_complete(dev);
@@ -1911,6 +1925,9 @@ atapi_out:
case GPCMD_SEEK_10:
pos = (cdb[2] << 24) | (cdb[3] << 16) | (cdb[4] << 8) | cdb[5];
break;
default:
break;
}
zip_seek(dev, pos);
zip_command_complete(dev);
@@ -2177,6 +2194,9 @@ zip_phase_data_out(scsi_common_t *sc)
return 0;
}
break;
default:
break;
}
zip_command_stop((scsi_common_t *) dev);

79
src/dma.c
View File

@@ -31,6 +31,7 @@
#include <86box/io.h>
#include <86box/pic.h>
#include <86box/dma.h>
#include <86box/plat_unused.h>
dma_t dma[8];
uint8_t dma_e;
@@ -50,9 +51,9 @@ static uint16_t dma_sg_base;
static uint16_t dma16_buffer[65536];
static uint32_t dma_mask;
static struct {
int xfr_command,
xfr_channel;
static struct dma_ps2_t {
int xfr_command;
int xfr_channel;
int byte_ptr;
int is_ps2;
@@ -228,6 +229,9 @@ dma_sg_write(uint16_t port, uint8_t val, void *priv)
dev->ptr = (dev->ptr & 0x00fffffc) | (val << 24);
dev->ptr %= (mem_size * 1024);
break;
default:
break;
}
}
@@ -258,6 +262,9 @@ dma_sg_writew(uint16_t port, uint16_t val, void *priv)
dev->ptr = (dev->ptr & 0x0000fffc) | (val << 16);
dev->ptr %= (mem_size * 1024);
break;
default:
break;
}
}
@@ -284,6 +291,9 @@ dma_sg_writel(uint16_t port, uint32_t val, void *priv)
dev->ptr %= (mem_size * 1024);
dev->ptr0 = val & 0xff;
break;
default:
break;
}
}
@@ -325,6 +335,9 @@ dma_sg_read(uint16_t port, void *priv)
case 0x23:
ret = dev->ptr >> 24;
break;
default:
break;
}
dma_log("DMA S/G BYTE read : %04X %02X\n", port, ret);
@@ -356,6 +369,9 @@ dma_sg_readw(uint16_t port, void *priv)
case 0x22:
ret = dev->ptr >> 16;
break;
default:
break;
}
dma_log("DMA S/G WORD read : %04X %04X\n", port, ret);
@@ -384,6 +400,9 @@ dma_sg_readl(uint16_t port, void *priv)
case 0x20:
ret = dev->ptr0 | (dev->ptr & 0xffffff00);
break;
default:
break;
}
dma_log("DMA S/G DWORD read : %04X %08X\n", port, ret);
@@ -392,7 +411,7 @@ dma_sg_readl(uint16_t port, void *priv)
}
static void
dma_ext_mode_write(uint16_t addr, uint8_t val, void *priv)
dma_ext_mode_write(uint16_t addr, uint8_t val, UNUSED(void *priv))
{
int channel = (val & 0x03);
@@ -416,11 +435,14 @@ dma_ext_mode_write(uint16_t addr, uint8_t val, void *priv)
case 0x03:
dma[channel].transfer_mode = 0x0102;
break;
default:
break;
}
}
static uint8_t
dma_sg_int_status_read(uint16_t addr, void *priv)
dma_sg_int_status_read(UNUSED(uint16_t addr), UNUSED(void *priv))
{
uint8_t ret = 0x00;
@@ -433,7 +455,7 @@ dma_sg_int_status_read(uint16_t addr, void *priv)
}
static uint8_t
dma_read(uint16_t addr, void *priv)
dma_read(uint16_t addr, UNUSED(void *priv))
{
int channel = (addr >> 1) & 3;
uint8_t temp;
@@ -468,13 +490,16 @@ dma_read(uint16_t addr, void *priv)
case 0xd: /*Temporary register*/
return 0;
default:
break;
}
return (dmaregs[0][addr & 0xf]);
}
static void
dma_write(uint16_t addr, uint8_t val, void *priv)
dma_write(uint16_t addr, uint8_t val, UNUSED(void *priv))
{
int channel = (addr >> 1) & 3;
@@ -562,11 +587,14 @@ dma_write(uint16_t addr, uint8_t val, void *priv)
case 0xf: /*Mask write*/
dma_m = (dma_m & 0xf0) | (val & 0xf);
return;
default:
break;
}
}
static uint8_t
dma_ps2_read(uint16_t addr, void *priv)
dma_ps2_read(uint16_t addr, UNUSED(void *priv))
{
dma_t *dma_c = &dma[dma_ps2.xfr_channel];
uint8_t temp = 0xff;
@@ -589,6 +617,9 @@ dma_ps2_read(uint16_t addr, void *priv)
temp = (dma_c->ac >> 16) & 0xff;
dma_ps2.byte_ptr = 0;
break;
default:
break;
}
break;
@@ -626,12 +657,15 @@ dma_ps2_read(uint16_t addr, void *priv)
fatal("Bad XFR Read command %i channel %i\n", dma_ps2.xfr_command, dma_ps2.xfr_channel);
}
break;
default:
break;
}
return temp;
}
static void
dma_ps2_write(uint16_t addr, uint8_t val, void *priv)
dma_ps2_write(uint16_t addr, uint8_t val, UNUSED(void *priv))
{
dma_t *dma_c = &dma[dma_ps2.xfr_channel];
uint8_t mode;
@@ -654,6 +688,9 @@ dma_ps2_write(uint16_t addr, uint8_t val, void *priv)
if (!(dma_m & (1 << dma_ps2.xfr_channel)))
dma_ps2_run(dma_ps2.xfr_channel);
break;
default:
break;
}
break;
@@ -683,6 +720,9 @@ dma_ps2_write(uint16_t addr, uint8_t val, void *priv)
dma_c->ac = (dma_c->ac & 0x00ffff) | (val << 16);
dma_ps2.byte_ptr = 0;
break;
default:
break;
}
dma_c->ab = dma_c->ac;
break;
@@ -719,11 +759,14 @@ dma_ps2_write(uint16_t addr, uint8_t val, void *priv)
fatal("Bad XFR command %i channel %i val %02x\n", dma_ps2.xfr_command, dma_ps2.xfr_channel, val);
}
break;
default:
break;
}
}
static uint8_t
dma16_read(uint16_t addr, void *priv)
dma16_read(uint16_t addr, UNUSED(void *priv))
{
int channel = ((addr >> 2) & 3) + 4;
uint8_t temp;
@@ -760,13 +803,16 @@ dma16_read(uint16_t addr, void *priv)
temp |= dma_stat >> 4;
dma_stat &= ~0xf0;
return temp;
default:
break;
}
return (dmaregs[1][addr & 0xf]);
}
static void
dma16_write(uint16_t addr, uint8_t val, void *priv)
dma16_write(uint16_t addr, uint8_t val, UNUSED(void *priv))
{
int channel = ((addr >> 2) & 3) + 4;
addr >>= 1;
@@ -855,6 +901,9 @@ dma16_write(uint16_t addr, uint8_t val, void *priv)
case 0xf: /*Mask write*/
dma_m = (dma_m & 0x0f) | ((val & 0xf) << 4);
return;
default:
break;
}
}
@@ -864,7 +913,7 @@ dma16_write(uint16_t addr, uint8_t val, void *priv)
}
static void
dma_page_write(uint16_t addr, uint8_t val, void *priv)
dma_page_write(uint16_t addr, uint8_t val, UNUSED(void *priv))
{
uint8_t convert[8] = CHANNELS;
@@ -897,7 +946,7 @@ dma_page_write(uint16_t addr, uint8_t val, void *priv)
}
static uint8_t
dma_page_read(uint16_t addr, void *priv)
dma_page_read(uint16_t addr, UNUSED(void *priv))
{
uint8_t convert[8] = CHANNELS;
uint8_t ret = 0xff;
@@ -917,7 +966,7 @@ dma_page_read(uint16_t addr, void *priv)
}
static void
dma_high_page_write(uint16_t addr, uint8_t val, void *priv)
dma_high_page_write(uint16_t addr, uint8_t val, UNUSED(void *priv))
{
uint8_t convert[8] = CHANNELS;
@@ -937,7 +986,7 @@ dma_high_page_write(uint16_t addr, uint8_t val, void *priv)
}
static uint8_t
dma_high_page_read(uint16_t addr, void *priv)
dma_high_page_read(uint16_t addr, UNUSED(void *priv))
{
uint8_t convert[8] = CHANNELS;
uint8_t ret = 0xff;

42
src/floppy/fdc.c
View File

@@ -203,9 +203,9 @@ fdc_get_current_drive(void)
}
void
fdc_ctrl_reset(void *p)
fdc_ctrl_reset(void *priv)
{
fdc_t *fdc = (fdc_t *) p;
fdc_t *fdc = (fdc_t *) priv;
fdc->stat = 0x80;
fdc->pnum = fdc->ptot = 0;
@@ -227,8 +227,8 @@ int
fdc_get_compare_condition(fdc_t *fdc)
{
switch (fdc->interrupt) {
case 0x11:
default:
case 0x11:
return 0;
case 0x19:
return 1;
@@ -517,6 +517,9 @@ fdc_update_rate(fdc_t *fdc, int drive)
case 2:
fdc->bit_rate = 2000;
break;
default:
break;
}
break;
case 2: /*Double density*/
@@ -525,6 +528,9 @@ fdc_update_rate(fdc_t *fdc, int drive)
case 3: /*Extended density*/
fdc->bit_rate = 1000;
break;
default:
break;
}
fdc->bitcell_period = (1000000 / fdc->bit_rate) * 2; /*Bitcell period in ns*/
@@ -544,8 +550,9 @@ fdc_get_bit_rate(fdc_t *fdc)
return 2;
case 1000:
return 3;
default:
return 2;
break;
}
return 2;
}
@@ -566,6 +573,9 @@ fdc_get_densel(fdc_t *fdc, int drive)
return 0;
case 2:
return 1;
default:
break;
}
}
@@ -575,6 +585,9 @@ fdc_get_densel(fdc_t *fdc, int drive)
return 1;
case 3:
return 0;
default:
break;
}
} else {
switch (fdc->densel_force) {
@@ -582,6 +595,9 @@ fdc_get_densel(fdc_t *fdc, int drive)
return 0;
case 1:
return 1;
default:
break;
}
}
@@ -592,6 +608,9 @@ fdc_get_densel(fdc_t *fdc, int drive)
case 1:
case 2:
return fdc->densel_polarity ? 0 : 1;
default:
break;
}
return 0;
@@ -1230,6 +1249,9 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
fdc->perp |= (fdc->params[0] & 0x03);
}
return;
default:
break;
}
} else
fdc->stat = 0x90 | (fdc->stat & 0xf);
@@ -1242,6 +1264,9 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
if (fdc->flags & FDC_FLAG_PS1)
fdc->noprec = !!(val & 0x04);
return;
default:
break;
}
}
@@ -1300,6 +1325,9 @@ fdc_read(uint16_t addr, void *priv)
case 3:
ret |= 0x61;
break;
default:
break;
}
} else {
if (is486 || !fdc->enable_3f1)
@@ -1684,6 +1712,9 @@ fdc_callback(void *priv)
fdc->stat = 0x90;
}
break;
default:
break;
}
fdc->inread = 1;
return;
@@ -1787,6 +1818,9 @@ fdc_callback(void *priv)
fdc->paramstogo = 1;
fdc->interrupt = 0;
return;
default:
break;
}
}

4
src/floppy/fdc_magitronic.c
View File

@@ -35,7 +35,7 @@
#define ROM_ADDR (uint32_t)(device_get_config_hex20("bios_addr") & 0x000fffff)
#define DRIVE_SELECT (int) (real_drive(dev->fdc_controller, i))
typedef struct {
typedef struct b215_t {
fdc_t *fdc_controller;
rom_t rom;
} b215_t;
@@ -58,7 +58,7 @@ b215_read(UNUSED(uint16_t addr), void *priv)
*/
int drive_spec[2];
for (int i = 0; i <= 1; i++) {
for (uint8_t i = 0; i <= 1; i++) {
if (fdd_is_525(DRIVE_SELECT)) {
if (!fdd_is_dd(DRIVE_SELECT))
drive_spec[i] = 1;

2
src/floppy/fdc_monster.c
View File

@@ -37,7 +37,7 @@
#define BIOS_ADDR (uint32_t)(device_get_config_hex20("bios_addr") & 0x000fffff)
#define ROM_MONSTER_FDC "roms/floppy/monster-fdc/floppy_bios.bin"
typedef struct {
typedef struct monster_fdc_t {
rom_t bios_rom;
fdc_t *fdc_pri;
fdc_t *fdc_sec;

2
src/floppy/fdc_pii15xb.c
View File

@@ -80,7 +80,7 @@ MiniMicro 4 also won't work with the XT FDC which the Zilog claims to be.
#define ROM_PII_151B "roms/floppy/dtk/pii-151b.rom"
#define ROM_PII_158B "roms/floppy/dtk/pii-158b.rom"
typedef struct {
typedef struct pii_t {
rom_t bios_rom;
} pii_t;

72
src/floppy/fdd_86f.c
View File

@@ -125,30 +125,30 @@ enum {
FMT_POSTTRK_GAP4
};
typedef struct {
typedef struct sliding_buffer_t {
uint8_t buffer[10];
uint32_t pos;
uint32_t len;
} sliding_buffer_t;
typedef struct {
typedef struct find_t {
uint32_t bits_obtained;
uint16_t bytes_obtained;
uint16_t sync_marks;
uint32_t sync_pos;
} find_t;
typedef struct {
typedef struct split_byte_t {
unsigned nibble0 : 4;
unsigned nibble1 : 4;
} split_byte_t;
typedef union {
typedef union decoded_t {
uint8_t byte;
split_byte_t nibbles;
} decoded_t;
typedef struct {
typedef struct sector_t {
uint8_t c;
uint8_t h;
uint8_t r;
@@ -179,7 +179,7 @@ typedef struct {
* If bits 6, 5 are 0, and bit 7 is 1, the extra bitcell count
* specifies the entire bitcell count
*/
typedef struct {
typedef struct d86f_t {
FILE *f;
uint8_t state;
uint8_t fill;
@@ -369,43 +369,43 @@ d86f_index_hole_pos(int drive, int side)
}
uint32_t
null_index_hole_pos(int drive, int side)
null_index_hole_pos(UNUSED(int drive), UNUSED(int side))
{
return 0;
}
uint16_t
null_disk_flags(int drive)
null_disk_flags(UNUSED(int drive))
{
return 0x09;
}
uint16_t
null_side_flags(int drive)
null_side_flags(UNUSED(int drive))
{
return 0x0A;
}
void
null_writeback(int drive)
null_writeback(UNUSED(int drive))
{
return;
}
void
null_set_sector(int drive, int side, uint8_t c, uint8_t h, uint8_t r, uint8_t n)
null_set_sector(UNUSED(int drive), UNUSED(int side), UNUSED(uint8_t c), UNUSED(uint8_t h), UNUSED(uint8_t r), UNUSED(uint8_t n))
{
return;
}
void
null_write_data(int drive, int side, uint16_t pos, uint8_t data)
null_write_data(UNUSED(int drive), UNUSED(int side), UNUSED(uint16_t pos), UNUSED(uint8_t data))
{
return;
}
int
null_format_conditions(int drive)
null_format_conditions(UNUSED(int drive))
{
return 0;
}
@@ -419,7 +419,7 @@ d86f_extra_bit_cells(int drive, int side)
}
int32_t
null_extra_bit_cells(int drive, int side)
null_extra_bit_cells(UNUSED(int drive), UNUSED(int side))
{
return 0;
}
@@ -433,7 +433,7 @@ common_encoded_data(int drive, int side)
}
void
common_read_revolution(int drive)
common_read_revolution(UNUSED(int drive))
{
return;
}
@@ -637,9 +637,9 @@ d86f_get_array_size(int drive, int side, int words)
array_size = 0;
else
switch (hole) {
default:
case 0:
case 1:
default:
array_size = 12500;
switch (rm) {
case 1:
@@ -830,7 +830,7 @@ d86f_has_extra_bit_cells(int drive)
}
uint32_t
d86f_header_size(int drive)
d86f_header_size(UNUSED(int drive))
{
return 8;
}
@@ -902,15 +902,14 @@ d86f_wrong_densel(int drive)
is_3mode = 1;
switch (d86f_hole(drive)) {
case 0:
default:
case 0:
if (fdd_is_dd(drive))
return 0;
if (fdd_get_densel(drive))
return 1;
else
return 0;
break;
case 1:
if (fdd_is_dd(drive))
@@ -923,7 +922,6 @@ d86f_wrong_densel(int drive)
else
return 1;
}
break;
case 2:
if (fdd_is_dd(drive) || !fdd_is_ed(drive))
@@ -932,7 +930,6 @@ d86f_wrong_densel(int drive)
return 0;
else
return 1;
break;
}
}
@@ -983,6 +980,9 @@ d86f_encode_byte(int drive, int sync, decoded_t b, decoded_t prev_b)
case 0xfc:
return result | d86f_encode_get_clock(0x01);
default:
break;
}
} else {
switch (b.byte) {
@@ -993,6 +993,9 @@ d86f_encode_byte(int drive, int sync, decoded_t b, decoded_t prev_b)
case 0xfc:
return result | d86f_encode_get_clock(0xd7);
default:
break;
}
}
}
@@ -1040,6 +1043,9 @@ d86f_get_bitcell_period(int drive)
case 5:
rate = 2000.0;
break;
default:
break;
}
if (!mfm)
@@ -1194,7 +1200,7 @@ d86f_put_bit(int drive, int side, int bit)
}
static uint8_t
decodefm(int drive, uint16_t dat)
decodefm(UNUSED(int drive), uint16_t dat)
{
uint8_t temp = 0;
@@ -1542,6 +1548,9 @@ d86f_compare_byte(int drive, uint8_t received_byte, uint8_t disk_byte)
if ((received_byte >= disk_byte) || (received_byte == 0xFF))
dev->satisfying_bytes++;
break;
default:
break;
}
}
@@ -1850,7 +1859,7 @@ endian_swap(uint16_t word)
}
void
d86f_format_finish(int drive, int side, int mfm, uint16_t sc, uint16_t gap_fill, int do_write)
d86f_format_finish(int drive, int side, int mfm, UNUSED(uint16_t sc), uint16_t gap_fill, int do_write)
{
d86f_t *dev = d86f[drive];
@@ -1871,7 +1880,7 @@ d86f_format_finish(int drive, int side, int mfm, uint16_t sc, uint16_t gap_fill,
}
void
d86f_format_turbo_finish(int drive, int side, int do_write)
d86f_format_turbo_finish(int drive, UNUSED(int side), int do_write)
{
d86f_t *dev = d86f[drive];
@@ -2071,13 +2080,14 @@ d86f_format_track(int drive, int side, int do_write)
/* Sector within allotted amount, change state to SECTOR_ID_SYNC. */
dev->format_state = FMT_SECTOR_ID_SYNC;
fdc_request_next_sector_id(d86f_fdc);
break;
} else {
dev->format_state = FMT_POSTTRK_GAP4;
dev->sector_count = 0;
break;
}
break;
default:
break;
}
}
}
@@ -2922,8 +2932,8 @@ d86f_read_track(int drive, int track, int thin_track, int side, uint16_t *da, ui
} else {
if (!thin_track) {
switch ((dev->disk_flags >> 1) & 3) {
case 0:
default:
case 0:
dev->side_flags[side] = 0x0A;
break;
@@ -3174,7 +3184,7 @@ d86f_stop(int drive)
}
int
d86f_common_command(int drive, int sector, int track, int side, int rate, int sector_size)
d86f_common_command(int drive, int sector, int track, int side, UNUSED(int rate), int sector_size)
{
d86f_t *dev = d86f[drive];
@@ -3258,7 +3268,7 @@ d86f_comparesector(int drive, int sector, int track, int side, int rate, int sec
}
void
d86f_readaddress(int drive, int side, int rate)
d86f_readaddress(int drive, UNUSED(int side), UNUSED(int rate))
{
d86f_t *dev = d86f[drive];
@@ -3308,7 +3318,7 @@ d86f_add_track(int drive, int track, int side)
}
void
d86f_common_format(int drive, int side, int rate, uint8_t fill, int proxy)
d86f_common_format(int drive, int side, UNUSED(int rate), uint8_t fill, int proxy)
{
d86f_t *dev = d86f[drive];
uint16_t temp;
@@ -3753,8 +3763,8 @@ d86f_load(int drive, char *fn)
}
} else {
switch ((dev->disk_flags >> 1) >> 3) {
case 0:
default:
case 0:
dev->side_flags[1] = 0x0a;
break;

9
src/game/gameport.c
View File

@@ -37,7 +37,7 @@
#include <86box/joystick_tm_fcs.h>
#include <86box/plat_unused.h>
typedef struct {
typedef struct g_axis_t {
pc_timer_t timer;
int axis_nr;
struct _joystick_instance_ *joystick;
@@ -116,9 +116,10 @@ static uint8_t gameport_pnp_rom[] = {
};
static const isapnp_device_config_t gameport_pnp_defaults[] = {
{.activate = 1,
.io = {
{ .base = 0x200 },
}}
.io = {
{ .base = 0x200 },
}
}
};
const device_t *standalone_gameport_type;

3
src/game/joystick_sw_pad.c
View File

@@ -67,8 +67,7 @@
#include <86box/joystick_sw_pad.h>
#include <86box/plat_unused.h>
typedef struct
{
typedef struct sw_data {
pc_timer_t poll_timer;
int poll_left;
int poll_clock;

6
src/include/86box/acpi.h
View File

@@ -59,8 +59,7 @@ extern "C" {
#define VEN_VIA 0x01106
#define VEN_VIA_596B 0x11106
typedef struct
{
typedef struct acpi_regs_t {
uint8_t acpitst;
uint8_t auxen;
uint8_t auxsts;
@@ -111,8 +110,7 @@ typedef struct
uint32_t pad0;
} acpi_regs_t;
typedef struct
{
typedef struct acpi_t {
acpi_regs_t regs;
uint8_t gpireg2_default;
uint8_t pad[3];

3
src/include/86box/apm.h
View File

@@ -21,8 +21,7 @@
extern "C" {
#endif
typedef struct
{
typedef struct apm_t {
uint8_t cmd;
uint8_t stat;
uint8_t do_smi;

6
src/include/86box/cdrom.h
View File

@@ -114,7 +114,7 @@ static const struct {
/* To shut up the GCC compilers. */
struct cdrom;
typedef struct {
typedef struct subchannel_t {
uint8_t attr;
uint8_t track;
uint8_t index;
@@ -126,7 +126,7 @@ typedef struct {
uint8_t rel_f;
} subchannel_t;
typedef struct {
typedef struct track_info_t {
int number;
uint8_t attr;
uint8_t m;
@@ -135,7 +135,7 @@ typedef struct {
} track_info_t;
/* Define the various CD-ROM drive operations (ops). */
typedef struct {
typedef struct cdrom_ops_t {
void (*get_tracks)(struct cdrom *dev, int *first, int *last);
void (*get_track_info)(struct cdrom *dev, uint32_t track, int end, track_info_t *ti);
void (*get_subchannel)(struct cdrom *dev, uint32_t lba, subchannel_t *subc);

4
src/include/86box/config.h
View File

@@ -27,7 +27,7 @@ extern "C" {
#endif
#if 0
typedef struct {
typedef struct storage_cfg_t {
uint8_t id;
uint8_t bus_type; /* Bus type: IDE, SCSI, etc. */
uint8_t bus, : 4; /* ID of the bus (for example, for IDE,
@@ -47,7 +47,7 @@ typedef struct {
uint32_t tracks;
} storage_cfg_t;
typedef struct {
typedef struct config_t {
/* General configuration */
int vid_resize; /* Window is resizable or not */
int vid_renderer; /* Renderer */

6
src/include/86box/ddma.h
View File

@@ -21,15 +21,13 @@
extern "C" {
#endif
typedef struct
{
typedef struct ddma_channel_t {
uint16_t io_base;
int channel;
int enable;
} ddma_channel_t;
typedef struct
{
typedef struct ddma_t {
ddma_channel_t channels[8];
} ddma_t;

10
src/include/86box/device.h
View File

@@ -86,12 +86,12 @@ enum {
#define BIOS_INTERLEAVED_INVERT 8
#define BIOS_HIGH_BIT_INVERT 16
typedef struct {
typedef struct device_config_selection_t {
const char *description;
int value;
} device_config_selection_t;
typedef struct {
typedef struct device_config_bios_t {
const char *name;
const char *internal_name;
int bios_type;
@@ -103,13 +103,13 @@ typedef struct {
const char *files[9];
} device_config_bios_t;
typedef struct {
typedef struct device_config_spinner_t {
int16_t min;
int16_t max;
int16_t step;
} device_config_spinner_t;
typedef struct {
typedef struct device_config_t {
const char *name;
const char *description;
int type;
@@ -144,7 +144,7 @@ typedef struct _device_ {
const device_config_t *config;
} device_t;
typedef struct {
typedef struct device_context_t {
const device_t *dev;
char name[2048];
int instance;

2
src/include/86box/disksizes.h
View File

@@ -22,7 +22,7 @@
extern "C" {
#endif
typedef struct {
typedef struct disk_size_t {
int hole;
int sides;
int data_rate;

2
src/include/86box/dma.h
View File

@@ -43,7 +43,7 @@
#define DMA_OVER 0x10000
#define DMA_VERIFY 0x20000
typedef struct {
typedef struct dma_t {
uint8_t m;
uint8_t mode;
uint8_t page;

2
src/include/86box/fdc.h
View File

@@ -56,7 +56,7 @@ extern int fdc_type;
#define FDC_FLAG_TER 0x2000 /* Is Tertiary */
#define FDC_FLAG_QUA 0x3000 /* Is Quaternary */
typedef struct {
typedef struct fdc_t {
uint8_t dor;
uint8_t stat;
uint8_t command;

2
src/include/86box/fdd.h
View File

@@ -65,7 +65,7 @@ extern int fdd_get_from_internal_name(char *s);
extern int fdd_current_track(int drive);
typedef struct {
typedef struct DRIVE {
int id;
void (*seek)(int drive, int track);

2
src/include/86box/fifo8.h
View File

@@ -1,7 +1,7 @@
#ifndef EMU_FIFO8_H
#define EMU_FIFO8_H
typedef struct {
typedef struct Fifo8 {
/* All fields are private */
uint8_t *data;
uint32_t capacity;

6
src/include/86box/gameport.h
View File

@@ -34,7 +34,7 @@
#define GAMEPORT_SIO 0x1000000
typedef struct {
typedef struct plat_joystick_t {
char name[260];
int a[8];
@@ -68,7 +68,7 @@ typedef struct {
int nr_sliders;
} plat_joystick_t;
typedef struct {
typedef struct joystick_t {
int axis[8];
int button[32];
int pov[4];
@@ -79,7 +79,7 @@ typedef struct {
int pov_mapping[4][2];
} joystick_t;
typedef struct {
typedef struct joystick_if_t {
const char *name;
const char *internal_name;

3
src/include/86box/hdc_ide_sff8038i.h
View File

@@ -20,8 +20,7 @@
#ifndef EMU_HDC_IDE_SFF8038I_H
#define EMU_HDC_IDE_SFF8038I_H
typedef struct
{
typedef struct sff8038i_t {
uint8_t command;
uint8_t status;
uint8_t ptr0;

10
src/include/86box/hdd.h
View File

@@ -87,7 +87,7 @@ enum {
#define HDD_MAX_ZONES 16
#define HDD_MAX_CACHE_SEG 16
typedef struct {
typedef struct hdd_preset_t {
const char *name;
const char *internal_name;
uint32_t zones;
@@ -101,7 +101,7 @@ typedef struct {
double track_seek_ms;
} hdd_preset_t;
typedef struct {
typedef struct hdd_cache_seg_t {
uint32_t id;
uint32_t lba_addr;
uint32_t ra_addr;
@@ -110,7 +110,7 @@ typedef struct {
uint8_t valid;
} hdd_cache_seg_t;
typedef struct {
typedef struct hdd_cache_t {
// Read cache
hdd_cache_seg_t segments[HDD_MAX_CACHE_SEG];
uint32_t num_segments;
@@ -126,7 +126,7 @@ typedef struct {
uint64_t write_start_time;
} hdd_cache_t;
typedef struct {
typedef struct hdd_zone_t {
uint32_t cylinders;
uint32_t sectors_per_track;
double sector_time_usec;
@@ -136,7 +136,7 @@ typedef struct {
} hdd_zone_t;
/* Define the virtual Hard Disk. */
typedef struct {
typedef struct hard_disk_t {
uint8_t id;
union {
uint8_t channel; /* Needed for Settings to reduce the number of if's */

12
src/include/86box/isapnp.h
View File

@@ -31,25 +31,25 @@ enum {
ISAPNP_CARD_NO_KEY = 3 /* cheat code for Crystal CS423x */
};
typedef struct {
typedef struct isapnp_device_config_t {
uint8_t activate;
struct {
struct pnp_mem_t {
uint32_t base : 24;
uint32_t size : 24;
} mem[4];
struct {
struct pnp_mem32_t {
uint32_t base;
uint32_t size;
} mem32[4];
struct {
struct pnp_io_t {
uint16_t base;
} io[8];
struct {
struct pnp_irq_t {
uint8_t irq : 4;
uint8_t level : 1;
uint8_t type : 1;
} irq[2];
struct {
struct pnp_dma_t {
uint8_t dma : 3;
} dma[2];
} isapnp_device_config_t;

6
src/include/86box/keyboard.h
View File

@@ -39,7 +39,7 @@ enum {
};
/* Used by the AT / PS/2 keyboard controller, common device, keyboard, and mouse. */
typedef struct {
typedef struct kbc_at_port_t {
uint8_t wantcmd;
uint8_t dat;
@@ -51,7 +51,7 @@ typedef struct {
} kbc_at_port_t;
/* Used by the AT / PS/2 common device, keyboard, and mouse. */
typedef struct {
typedef struct atkbc_dev_t {
const char *name; /* name of this device */
uint8_t type;
@@ -88,7 +88,7 @@ typedef struct {
kbc_at_port_t *port;
} atkbc_dev_t;
typedef struct {
typedef struct scancode {
const uint8_t mk[4];
const uint8_t brk[4];
} scancode;

3
src/include/86box/lpt.h
View File

@@ -17,8 +17,7 @@
#define LPT6_IRQ 5
#endif
typedef struct
{
typedef struct lpt_device_t {
const char *name;
const char *internal_name;

8
src/include/86box/machine_status.h
View File

@@ -1,20 +1,20 @@
#ifndef EMU_MACHINE_STATUS_H
#define EMU_MACHINE_STATUS_H
typedef struct {
typedef struct dev_status_empty_active_t {
atomic_bool_t empty;
atomic_bool_t active;
} dev_status_empty_active_t;
typedef struct {
typedef struct dev_status_active_t {
atomic_bool_t active;
} dev_status_active_t;
typedef struct {
typedef struct dev_status_empty_t {
atomic_bool_t empty;
} dev_status_empty_t;
typedef struct {
typedef struct machine_status_t {
dev_status_empty_active_t fdd[FDD_NUM];
dev_status_empty_active_t cdrom[CDROM_NUM];
dev_status_empty_active_t zip[ZIP_NUM];

7
src/include/86box/mem.h
View File

@@ -158,20 +158,21 @@
#define mem_set_access_smram_bus(smm, base, size, is_smram) \
mem_set_access((smm ? ACCESS_BUS_SMM : ACCESS_BUS), 1, base, size, is_smram)
typedef struct {
typedef struct state_t {
uint16_t x : 5;
uint16_t w : 5;
uint16_t r : 5;
uint16_t pad : 1;
} state_t;
typedef union {
typedef union mem_state_t {
uint16_t vals[4];
state_t states[4];
} mem_state_t;
typedef struct _mem_mapping_ {
struct _mem_mapping_ *prev, *next;
struct _mem_mapping_ *prev;
struct _mem_mapping_ *next;
int enable;

9
src/include/86box/mo.h
View File

@@ -27,7 +27,7 @@
#define MO_TIME 10.0
typedef struct {
typedef struct mo_type_t {
uint32_t sectors;
uint16_t bytes_per_sector;
} mo_type_t;
@@ -48,8 +48,7 @@ static const mo_type_t mo_types[KNOWN_MO_TYPES] = {
{ 637041, 1024},
};
typedef struct
{
typedef struct mo_drive_type_t {
const char vendor[9];
const char model[16];
const char revision[5];
@@ -89,7 +88,7 @@ enum {
MO_BUS_USB = 7
};
typedef struct {
typedef struct mo_drive_t {
uint8_t id;
union {
@@ -121,7 +120,7 @@ typedef struct {
} mo_drive_t;
typedef struct {
typedef struct mo_t {
mode_sense_pages_t ms_pages_saved;
mo_drive_t *drv;

2
src/include/86box/net_dp8390.h
View File

@@ -36,7 +36,7 @@
#define DP8390_FLAG_CHECK_CR 0x02
#define DP8390_FLAG_CLEAR_IRQ 0x04
typedef struct {
typedef struct dp8390_t {
/* Page 0 */
/* Command Register - 00h read/write */

2
src/include/86box/net_event.h
View File

@@ -1,7 +1,7 @@
#ifndef EMU_NET_EVENT_H
#define EMU_NET_EVENT_H
typedef struct {
typedef struct net_evt_t {
#ifdef _WIN32
HANDLE handle;
#else

4
src/include/86box/network.h
View File

@@ -93,7 +93,7 @@ enum {
NET_QUEUE_TX_HOST = 2
};
typedef struct {
typedef struct netcard_conf_t {
uint16_t device_num;
int net_type;
char host_dev_name[128];
@@ -111,7 +111,7 @@ typedef struct netpkt {
int len;
} netpkt_t;
typedef struct {
typedef struct netqueue_t {
netpkt_t packets[NET_QUEUE_LEN];
int head;
int tail;

16
src/include/86box/pit.h
View File

@@ -19,7 +19,7 @@
#ifndef EMU_PIT_H
#define EMU_PIT_H
typedef struct {
typedef struct ctr_t {
uint8_t m;
uint8_t ctrl;
uint8_t read_status;
@@ -44,13 +44,13 @@ typedef struct {
int do_read_status;
union {
int count;
int32_t count;
struct {
int units : 4;
int tens : 4;
int hundreds : 4;
int thousands : 4;
int myriads : 4;
int32_t units : 4;
int32_t tens : 4;
int32_t hundreds : 4;
int32_t thousands : 4;
int32_t myriads : 4;
};
};
@@ -77,7 +77,7 @@ enum {
PIT_8254_FAST = 3
};
typedef struct {
typedef struct pit_intf_t {
uint8_t (*read)(uint16_t addr, void *priv);
void (*write)(uint16_t addr, uint8_t val, void *priv);
/* Gets a counter's count. */

16
src/include/86box/pit_fast.h
View File

@@ -19,7 +19,7 @@
#ifndef EMU_PIT_FAST_H
#define EMU_PIT_FAST_H
typedef struct {
typedef struct ctrf_t {
uint8_t m;
uint8_t ctrl;
uint8_t read_status;
@@ -45,13 +45,13 @@ typedef struct {
int rereadlatch;
union {
int count;
int32_t count;
struct {
int units : 4;
int tens : 4;
int hundreds : 4;
int thousands : 4;
int myriads : 4;
int32_t units : 4;
int32_t tens : 4;
int32_t hundreds : 4;
int32_t thousands : 4;
int32_t myriads : 4;
};
};
@@ -62,7 +62,7 @@ typedef struct {
void (*out_func)(int new_out, int old_out);
} ctrf_t;
typedef struct {
typedef struct pitf_t {
int flags;
ctrf_t counters[3];

2
src/include/86box/plat_dir.h
View File

@@ -39,7 +39,7 @@ struct dirent {
};
# define d_namlen d_reclen
typedef struct {
typedef struct DIR_t {
short flags; /* internal flags */
short offset; /* offset of entry into dir */
long handle; /* open handle to Win32 system */

2
src/include/86box/plat_dynld.h
View File

@@ -18,7 +18,7 @@
#ifndef PLAT_DYNLD_H
#define PLAT_DYNLD_H
typedef struct {
typedef struct dllimp_t {
const char *name;
void *func;
} dllimp_t;

3
src/include/86box/port_6x.h
View File

@@ -20,8 +20,7 @@
#define EMU_PORT_6X_H
#ifdef _TIMER_H_
typedef struct
{
typedef struct port_6x_t {
uint8_t refresh;
uint8_t flags;

3
src/include/86box/port_92.h
View File

@@ -20,8 +20,7 @@
#define EMU_PORT_92_H
#ifdef _TIMER_H_
typedef struct
{
typedef struct port_92_t {
uint8_t reg;
uint8_t flags;

2
src/include/86box/rom.h
View File

@@ -32,7 +32,7 @@
#define bios_load_interleavedr(a, b, c, d, e) bios_load(a, b, c, d, e, FLAG_INT | FLAG_REP)
#define bios_load_aux_interleaved(a, b, c, d, e) bios_load(a, b, c, d, e, FLAG_INT | FLAG_AUX)
typedef struct {
typedef struct rom_t {
uint8_t *rom;
int sz;
uint32_t mask;

2
src/include/86box/scsi_cdrom.h
View File

@@ -22,7 +22,7 @@
#define CDROM_TIME 10.0
#ifdef SCSI_DEVICE_H
typedef struct {
typedef struct scsi_cdrom_t {
/* Common block. */
mode_sense_pages_t ms_pages_saved;

4
src/include/86box/scsi_device.h
View File

@@ -338,7 +338,7 @@
#define MODE_SELECT_PHASE_PAGE_HEADER 3
#define MODE_SELECT_PHASE_PAGE 4
typedef struct {
typedef struct mode_sense_pages_t {
uint8_t pages[0x40][0x40];
} mode_sense_pages_t;
@@ -384,7 +384,7 @@ typedef struct scsi_common_s {
double callback;
} scsi_common_t;
typedef struct {
typedef struct scsi_device_t {
int32_t buffer_length;
uint8_t status;

2
src/include/86box/scsi_disk.h
View File

@@ -16,7 +16,7 @@
#ifndef SCSI_DISK_H
#define SCSI_DISK_H
typedef struct {
typedef struct scsi_disk_t {
mode_sense_pages_t ms_pages_saved;
hard_disk_t *drv;

193
src/include/86box/scsi_x54x.h
View File

@@ -203,13 +203,13 @@ typedef struct addr24_s {
} addr24_t;
/* Structure for the INQUIRE_SETUP_INFORMATION reply. */
typedef struct {
typedef struct ReplyInquireSetupInformationSynchronousValue_t {
uint8_t uOffset : 4;
uint8_t uTransferPeriod : 3;
uint8_t fSynchronous : 1;
} ReplyInquireSetupInformationSynchronousValue;
typedef struct {
typedef struct ReplyInquireSetupInformation_t {
uint8_t fSynchronousInitiationEnabled : 1;
uint8_t fParityCheckingEnabled : 1;
uint8_t uReserved1 : 6;
@@ -223,24 +223,24 @@ typedef struct {
uint8_t VendorSpecificData[28];
} ReplyInquireSetupInformation;
typedef struct {
typedef struct MailboxInit_t {
uint8_t Count;
addr24_t Address;
} MailboxInit_t;
typedef struct {
typedef struct Mailbox_t {
uint8_t CmdStatus;
addr24_t CCBPointer;
} Mailbox_t;
typedef struct {
typedef struct Mailbox32_t {
uint32_t CCBPointer;
union {
struct {
struct out_t {
uint8_t Reserved[3];
uint8_t ActionCode;
} out;
struct {
struct in_t {
uint8_t HostStatus;
uint8_t TargetStatus;
uint8_t Reserved;
@@ -255,7 +255,7 @@ typedef struct {
Bytes 16 and 17 Reserved (must be 0)
Bytes 18 through 18+n-1, where n=size of CDB Command Descriptor Block */
typedef struct {
typedef struct CCB32_t {
uint8_t Opcode;
uint8_t Reserved1 : 3,
ControlByte : 2,
@@ -277,7 +277,7 @@ typedef struct {
uint32_t SensePointer;
} CCB32;
typedef struct {
typedef struct CCB_t {
uint8_t Opcode;
uint8_t Lun : 3;
uint8_t ControlByte : 2;
@@ -294,7 +294,7 @@ typedef struct {
uint8_t Cdb[12];
} CCB;
typedef struct {
typedef struct CCBC_t {
uint8_t Opcode;
uint8_t Pad1 : 3,
ControlByte : 2,
@@ -309,7 +309,7 @@ typedef struct {
uint8_t Cdb[12];
} CCBC;
typedef union {
typedef union CCBU_t {
CCB32 new;
CCB old;
CCBC common;
@@ -320,26 +320,25 @@ typedef struct {
uint8_t *RequestSenseBuffer;
uint32_t CCBPointer;
int Is24bit;
uint8_t TargetID,
LUN,
HostStatus,
TargetStatus,
MailboxCompletionCode;
uint8_t TargetID;
uint8_t LUN;
uint8_t HostStatus;
uint8_t TargetStatus;
uint8_t MailboxCompletionCode;
} Req_t;
typedef struct
{
typedef struct BIOSCMD_t {
uint8_t command;
uint8_t lun : 3,
reserved : 2,
id : 3;
union {
struct {
struct chs_t {
uint16_t cyl;
uint8_t head;
uint8_t sec;
} chs;
struct {
struct lba_t {
uint8_t lba0; /* MSB */
uint8_t lba1;
uint8_t lba2;
@@ -350,12 +349,12 @@ typedef struct
addr24_t dma_address;
} BIOSCMD;
typedef struct {
typedef struct SGE32_t {
uint32_t Segment;
uint32_t SegmentPointer;
} SGE32;
typedef struct {
typedef struct SGE_t {
addr24_t Segment;
addr24_t SegmentPointer;
} SGE;
@@ -368,92 +367,111 @@ typedef struct {
#define X54X_MBX_24BIT 16
#define X54X_ISAPNP 32
typedef struct {
typedef struct x54x_t {
/* 32 bytes */
char vendor[16], /* name of device vendor */
name[16]; /* name of device */
char vendor[16]; /* name of device vendor */
char name[16]; /* name of device */
/* 24 bytes */
int8_t type, /* type of device */
IrqEnabled, Irq,
DmaChannel,
HostID;
int8_t type; /* type of device */
int8_t IrqEnabled;
int8_t Irq;
int8_t DmaChannel;
int8_t HostID;
uint8_t callback_phase : 4,
callback_sub_phase : 4,
scsi_cmd_phase, bus,
sync,
parity, shram_mode,
Geometry, Control,
Command, CmdParam,
BusOnTime, BusOffTime,
ATBusSpeed, setup_info_len,
max_id, pci_slot,
temp_cdb[12];
uint8_t callback_phase : 4;
uint8_t callback_sub_phase : 4;
uint8_t scsi_cmd_phase;
uint8_t bus;
uint8_t sync;
uint8_t parity;
uint8_t shram_mode;
uint8_t Geometry;
uint8_t Control;
uint8_t Command;
uint8_t CmdParam;
uint8_t BusOnTime;
uint8_t BusOffTime;
uint8_t ATBusSpeed;
uint8_t setup_info_len;
uint8_t max_id;
uint8_t pci_slot;
uint8_t temp_cdb[12];
volatile uint8_t /* for multi-threading, keep */
Status,
Interrupt, /* these volatile */
MailboxIsBIOS, ToRaise,
flags;
/* for multi-threading, keep these volatile */
volatile uint8_t Status;
volatile uint8_t Interrupt;
volatile uint8_t MailboxIsBIOS;
volatile uint8_t ToRaise;
volatile uint8_t flags;
/* 65928 bytes */
uint8_t pos_regs[8], /* MCA */
CmdBuf[128],
DataBuf[65536],
shadow_ram[128],
dma_buffer[128],
cmd_33_buf[4096];
uint8_t pos_regs[8]; /* MCA */
uint8_t CmdBuf[128];
uint8_t DataBuf[65536];
uint8_t shadow_ram[128];
uint8_t dma_buffer[128];
uint8_t cmd_33_buf[4096];
/* 16 bytes */
char *fw_rev; /* The 4 bytes of the revision command information + 2 extra bytes for BusLogic */
uint8_t *rom1, /* main BIOS image */
*rom2, /* SCSI-Select image */
*nvr; /* EEPROM buffer */
uint8_t *rom1; /* main BIOS image */
uint8_t *rom2; /* SCSI-Select image */
uint8_t *nvr; /* EEPROM buffer */
/* 6 words = 12 bytes */
uint16_t DataReply, DataReplyLeft,
rom_ioaddr, /* offset in BIOS of I/O addr */
rom_shram, /* index to shared RAM */
rom_shramsz, /* size of shared RAM */
rom_fwhigh, /* offset in BIOS of ver ID */
pnp_len, /* length of the PnP ROM */
pnp_offset, /* offset in the microcode ROM of the PnP ROM */
cmd_33_len, /* length of the SCSISelect code decompressor program */
cmd_33_offset; /* offset in the microcode ROM of the SCSISelect code decompressor program */
uint16_t DataReply;
uint16_t DataReplyLeft;
uint16_t rom_ioaddr; /* offset in BIOS of I/O addr */
uint16_t rom_shram; /* index to shared RAM */
uint16_t rom_shramsz; /* size of shared RAM */
uint16_t rom_fwhigh; /* offset in BIOS of ver ID */
uint16_t pnp_len; /* length of the PnP ROM */
uint16_t pnp_offset; /* offset in the microcode ROM of the PnP ROM */
uint16_t cmd_33_len; /* length of the SCSISelect code decompressor program */
uint16_t cmd_33_offset; /* offset in the microcode ROM of the SCSISelect code decompressor program */
/* 16 + 20 + 52 = 88 bytes */
volatile int
MailboxOutInterrupts,
PendingInterrupt, Lock,
target_data_len, pad0;
volatile int MailboxOutInterrupts;
volatile int PendingInterrupt;
volatile int Lock;
volatile int target_data_len;
volatile int pad0;
uint32_t Base, fdc_address, rom_addr, /* address of BIOS ROM */
CmdParamLeft, Outgoing,
transfer_size;
uint32_t Base;
uint32_t fdc_address;
uint32_t rom_addr; /* address of BIOS ROM */
uint32_t CmdParamLeft;
uint32_t Outgoing;
uint32_t transfer_size;
volatile uint32_t
MailboxInit,
MailboxCount,
MailboxOutAddr, MailboxOutPosCur,
MailboxInAddr, MailboxInPosCur,
MailboxReq,
BIOSMailboxInit, BIOSMailboxCount,
BIOSMailboxOutAddr, BIOSMailboxOutPosCur,
BIOSMailboxReq,
Residue, card_bus; /* Basically a copy of device flags */
volatile uint32_t MailboxInit;
volatile uint32_t MailboxCount;
volatile uint32_t MailboxOutAddr;
volatile uint32_t MailboxOutPosCur;
volatile uint32_t MailboxInAddr;
volatile uint32_t MailboxInPosCur;
volatile uint32_t MailboxReq;
volatile uint32_t BIOSMailboxInit;
volatile uint32_t BIOSMailboxCount;
volatile uint32_t BIOSMailboxOutAddr;
volatile uint32_t BIOSMailboxOutPosCur;
volatile uint32_t BIOSMailboxReq;
volatile uint32_t Residue;
volatile uint32_t card_bus; /* Basically a copy of device flags */
/* 8 bytes */
uint64_t temp_period;
/* 16 bytes */
double media_period, ha_bps; /* bytes per second */
double media_period;
double ha_bps; /* bytes per second */
/* 8 bytes */
char *bios_path, /* path to BIOS image file */
*mcode_path, /* path to microcode image file, needed by the AHA-1542CP */
*nvr_path; /* path to NVR image file */
char *bios_path; /* path to BIOS image file */
char *mcode_path; /* path to microcode image file, needed by the AHA-1542CP */
char *nvr_path; /* path to NVR image file */
/* 56 bytes */
/* Pointer to a structure of vendor-specific data that only the vendor-specific code can understand */
@@ -486,12 +504,13 @@ typedef struct {
/* Pointer to a function that resets vendor-specific data */
void (*ven_reset)(void *p);
rom_t bios, /* BIOS memory descriptor */
uppersck; /* BIOS memory descriptor */
rom_t bios; /* BIOS memory descriptor */
rom_t uppersck; /* BIOS memory descriptor */
mem_mapping_t mmio_mapping;
pc_timer_t timer, ResetCB;
pc_timer_t timer;
pc_timer_t ResetCB;
Req_t Req;

2
src/include/86box/serial.h
View File

@@ -107,7 +107,7 @@ typedef struct serial_device_s {
serial_t *serial;
} serial_device_t;
typedef struct {
typedef struct serial_port_s {
uint8_t enabled;
} serial_port_t;

4
src/include/86box/smbus.h
View File

@@ -29,7 +29,7 @@ enum {
SMBUS_VIA = 1
};
typedef struct {
typedef struct smbus_piix4_t {
uint32_t local;
uint16_t io_base;
int clock;
@@ -47,7 +47,7 @@ typedef struct {
void *i2c;
} smbus_piix4_t;
typedef struct {
typedef struct smbus_ali7101_t {
uint32_t local;
uint16_t io_base;
uint8_t stat;

20
src/include/86box/snd_ac97.h
View File

@@ -103,21 +103,21 @@ enum {
AC97_CODEC_AK4540 = 7
};
typedef struct {
typedef struct ac97_vendor_reg_t {
const uint16_t index;
const uint16_t value;
const uint16_t write_mask;
} ac97_vendor_reg_t;
typedef struct {
uint32_t vendor_id;
uint32_t min_rate;
uint32_t max_rate;
uint32_t misc_flags;
uint16_t reset_flags;
uint16_t extid_flags;
uint16_t powerdown_mask;
uint16_t regs[64];
typedef struct ac97_codec_t {
uint32_t vendor_id;
uint32_t min_rate;
uint32_t max_rate;
uint32_t misc_flags;
uint16_t reset_flags;
uint16_t extid_flags;
uint16_t powerdown_mask;
uint16_t regs[64];
uint8_t codec_id;
uint8_t vendor_reg_page_max;
const ac97_vendor_reg_t *vendor_regs;

2
src/include/86box/snd_ad1848.h
View File

@@ -30,7 +30,7 @@ enum {
AD1848_TYPE_CS4236 = 4
};
typedef struct {
typedef struct ad1848_t {
uint8_t type;
uint8_t index;
uint8_t xindex;

2
src/include/86box/snd_opl.h
View File

@@ -31,7 +31,7 @@ enum fm_driver {
FM_DRV_MAX = 2
};
typedef struct {
typedef struct fm_drv_t {
uint8_t (*read)(uint16_t port, void *priv);
void (*write)(uint16_t port, uint8_t val, void *priv);
int32_t *(*update)(void *priv);

36
src/include/86box/usb.h
View File

@@ -56,16 +56,14 @@ typedef struct usb_params_t
void* parent_priv;
} usb_params_t;
typedef union
{
typedef union {
uint32_t l;
uint16_t w[2];
uint8_t b[4];
} ohci_mmio_t;
/* USB Host Controller device struct */
typedef struct usb_t
{
typedef struct usb_t {
uint8_t uhci_io[32];
ohci_mmio_t ohci_mmio[1024];
uint16_t uhci_io_base;
@@ -88,14 +86,12 @@ typedef struct usb_t
#pragma pack(push, 1)
/* Base USB descriptor struct. */
typedef struct usb_desc_base_t
{
typedef struct usb_desc_base_t {
uint8_t bLength;
uint8_t bDescriptorType;
} usb_desc_base_t;
enum usb_desc_setup_req_types
{
enum usb_desc_setup_req_types {
USB_SETUP_TYPE_DEVICE = 0x0,
USB_SETUP_TYPE_INTERFACE = 0x1,
USB_SETUP_TYPE_ENDPOING = 0x2,
@@ -106,8 +102,7 @@ enum usb_desc_setup_req_types
#define USB_SETUP_DEV_TO_HOST 0x80
typedef struct usb_desc_setup_t
{
typedef struct usb_desc_setup_t {
uint8_t bmRequestType;
uint8_t bRequest;
uint16_t wValue;
@@ -115,8 +110,7 @@ typedef struct usb_desc_setup_t
uint16_t wLength;
} usb_desc_setup_t;
typedef struct usb_desc_endpoint_t
{
typedef struct usb_desc_endpoint_t {
usb_desc_base_t base;
uint8_t bEndpointAddress;
uint8_t bmAttributes;
@@ -124,8 +118,7 @@ typedef struct usb_desc_endpoint_t
uint8_t bInterval;
} usb_desc_endpoint_t;
typedef struct usb_desc_hid_t
{
typedef struct usb_desc_hid_t {
usb_desc_base_t base;
uint16_t bcdHID;
@@ -135,8 +128,7 @@ typedef struct usb_desc_hid_t
uint16_t wDescriptorLength;
} usb_desc_hid_t;
typedef struct usb_desc_interface_t
{
typedef struct usb_desc_interface_t {
usb_desc_base_t base;
uint8_t bInterfaceNumber;
@@ -148,14 +140,12 @@ typedef struct usb_desc_interface_t
uint8_t iInterface;
} usb_desc_interface_t;
typedef struct usb_desc_string_t
{
typedef struct usb_desc_string_t {
usb_desc_base_t base;
uint16_t bString[];
} usb_desc_string_t;
typedef struct usb_desc_conf_t
{
typedef struct usb_desc_conf_t {
usb_desc_base_t base;
uint16_t wTotalLength;
@@ -166,8 +156,7 @@ typedef struct usb_desc_conf_t
uint8_t bMaxPower;
} usb_desc_conf_t;
typedef struct usb_desc_device_t
{
typedef struct usb_desc_device_t {
usb_desc_base_t base;
uint16_t bcdUSB;
@@ -187,8 +176,7 @@ typedef struct usb_desc_device_t
#pragma pack(pop)
/* USB endpoint device struct. Incomplete and unused. */
typedef struct usb_device_t
{
typedef struct usb_device_t {
usb_desc_device_t device_desc;
struct {
usb_desc_conf_t conf_desc;

105
src/include/86box/video.h
View File

@@ -63,47 +63,54 @@ enum {
#define VIDEO_FLAG_TYPE_NONE 3
#define VIDEO_FLAG_TYPE_MASK 3
typedef struct {
typedef struct video_timings_t {
int type;
int write_b, write_w, write_l;
int read_b, read_w, read_l;
int write_b;
int write_w;
int write_l;
int read_b;
int read_w;
int read_l;
} video_timings_t;
typedef struct {
int w, h;
typedef struct bitmap_t {
int w;
int h;
uint32_t *dat;
uint32_t *line[2112];
} bitmap_t;
typedef struct {
uint8_t r, g, b;
typedef struct rgb_t {
uint8_t r;
uint8_t g;
uint8_t b;
} rgb_t;
typedef struct {
typedef struct dbcs_font_t {
uint8_t chr[32];
} dbcs_font_t;
struct blit_data_struct;
typedef struct monitor_t {
char name[512];
int mon_xsize;
int mon_ysize;
int mon_scrnsz_x;
int mon_scrnsz_y;
int mon_efscrnsz_y;
int mon_unscaled_size_x;
int mon_unscaled_size_y;
int mon_res_x;
int mon_res_y;
int mon_bpp;
bitmap_t *target_buffer;
int mon_video_timing_read_b,
mon_video_timing_read_w,
mon_video_timing_read_l;
int mon_video_timing_write_b,
mon_video_timing_write_w,
mon_video_timing_write_l;
char name[512];
int mon_xsize;
int mon_ysize;
int mon_scrnsz_x;
int mon_scrnsz_y;
int mon_efscrnsz_y;
int mon_unscaled_size_x;
int mon_unscaled_size_y;
int mon_res_x;
int mon_res_y;
int mon_bpp;
bitmap_t *target_buffer;
int mon_video_timing_read_b;
int mon_video_timing_read_w;
int mon_video_timing_read_l;
int mon_video_timing_write_b;
int mon_video_timing_write_w;
int mon_video_timing_write_l;
int mon_overscan_x;
int mon_overscan_y;
int mon_force_resize;
@@ -137,10 +144,14 @@ extern int video_fullscreen_scale_maximized;
typedef rgb_t PALETTE[256];
// extern int changeframecount;
#if 0
extern int changeframecount;
#endif
extern volatile int screenshots;
// extern bitmap_t *buffer32;
#if 0
extern bitmap_t *buffer32;
#endif
#define buffer32 (monitors[monitor_index_global].target_buffer)
#define pal_lookup (monitors[monitor_index_global].mon_pal_lookup)
#define overscan_x (monitors[monitor_index_global].mon_overscan_x)
@@ -163,12 +174,14 @@ extern volatile int screenshots;
#define efscrnsz_y (monitors[monitor_index_global].mon_efscrnsz_y)
#define unscaled_size_x (monitors[monitor_index_global].mon_unscaled_size_x)
#define unscaled_size_y (monitors[monitor_index_global].mon_unscaled_size_y)
extern PALETTE cgapal;
extern PALETTE cgapal_mono[6];
// extern uint32_t pal_lookup[256];
extern int video_fullscreen;
extern int video_fullscreen_scale;
extern int video_fullscreen_first;
extern PALETTE cgapal;
extern PALETTE cgapal_mono[6];
#if 0
extern uint32_t pal_lookup[256];
#endif
extern int video_fullscreen;
extern int video_fullscreen_scale;
extern int video_fullscreen_first;
extern uint8_t fontdat[2048][8];
extern uint8_t fontdatm[2048][16];
extern uint8_t fontdatw[512][32];
@@ -176,18 +189,18 @@ extern uint8_t fontdat8x12[256][16];
extern uint8_t fontdat12x18[256][36];
extern dbcs_font_t *fontdatksc5601;
extern dbcs_font_t *fontdatksc5601_user;
extern uint32_t *video_6to8,
*video_8togs,
*video_8to32,
*video_15to32,
*video_16to32;
extern int enable_overscan;
extern int force_43;
extern int vid_resize;
extern int herc_blend;
extern int vid_cga_contrast;
extern int video_grayscale;
extern int video_graytype;
extern uint32_t *video_6to8;
extern uint32_t *video_8togs;
extern uint32_t *video_8to32;
extern uint32_t *video_15to32;
extern uint32_t *video_16to32;
extern int enable_overscan;
extern int force_43;
extern int vid_resize;
extern int herc_blend;
extern int vid_cga_contrast;
extern int video_grayscale;
extern int video_graytype;
extern double cpuclock;
extern int emu_fps;

4
src/ini.c
View File

@@ -42,7 +42,7 @@ typedef struct _list_ {
struct _list_ *next;
} list_t;
typedef struct {
typedef struct section_t {
list_t list;
char name[128];
@@ -50,7 +50,7 @@ typedef struct {
list_t entry_head;
} section_t;
typedef struct {
typedef struct entry_t {
list_t list;
char name[128];

15
src/io.c
View File

@@ -47,10 +47,11 @@ typedef struct _io_ {
} io_t;
typedef struct {
uint8_t enable;
uint16_t base, size;
void (*func)(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv),
*priv;
uint8_t enable;
uint16_t base;
uint16_t size;
void (*func)(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv);
void *priv;
} io_trap_t;
int initialized = 0;
@@ -310,8 +311,10 @@ inb(uint16_t port)
cycles -= io_delay;
/* TriGem 486-BIOS MHz output. */
/* if (port == 0x1ed)
ret = 0xfe; */
#if 0
if (port == 0x1ed)
ret = 0xfe;
#endif
io_log("[%04X:%08X] (%i, %i, %04i) in b(%04X) = %02X\n", CS, cpu_state.pc, in_smm, found, qfound, port, ret);

10
src/ioapic.c
View File

@@ -27,8 +27,9 @@
#include <86box/machine.h>
#include <86box/mem.h>
#include <86box/chipset.h>
#include <86box/plat_unused.h>
typedef struct {
typedef struct ioapic_t {
uint8_t dummy;
} ioapic_t;
@@ -51,7 +52,7 @@ ioapic_log(const char *fmt, ...)
#endif
static void
ioapic_write(uint16_t port, uint8_t val, void *priv)
ioapic_write(UNUSED(uint16_t port), uint8_t val, UNUSED(void *priv))
{
uint32_t pcmp;
@@ -83,8 +84,9 @@ ioapic_write(uint16_t port, uint8_t val, void *priv)
}
static void
ioapic_reset(ioapic_t *dev)
ioapic_reset(UNUSED(ioapic_t *dev))
{
//
}
static void
@@ -99,7 +101,7 @@ ioapic_close(void *priv)
}
static void *
ioapic_init(const device_t *info)
ioapic_init(UNUSED(const device_t *info))
{
ioapic_t *dev = (ioapic_t *) malloc(sizeof(ioapic_t));
memset(dev, 0, sizeof(ioapic_t));

9
src/log.c
View File

@@ -35,10 +35,11 @@
#include <86box/log.h>
#ifndef RELEASE_BUILD
typedef struct
{
char buff[1024], *dev_name;
int seen, suppr_seen;
typedef struct log_t {
char buff[1024];
char *dev_name;
int seen;
int suppr_seen;
} log_t;
extern FILE *stdlog; /* file to log output to */

6
src/lpt.c
View File

@@ -124,6 +124,9 @@ lpt_write(uint16_t port, uint8_t val, void *priv)
dev->ctrl = val;
dev->enable_irq = val & 0x10;
break;
default:
break;
}
}
@@ -154,6 +157,9 @@ lpt_read(uint16_t port, void *priv)
else
ret = 0xe0 | dev->ctrl | dev->enable_irq;
break;
default:
break;
}
return ret;

26
src/mem/catalyst_flash.c
View File

@@ -55,19 +55,22 @@ enum {
};
typedef struct flash_t {
uint8_t command, pad,
pad0, pad1,
*array;
uint8_t command;
uint8_t pad;
uint8_t pad0;
uint8_t pad1;
uint8_t *array;
mem_mapping_t mapping, mapping_h[2];
mem_mapping_t mapping;
mem_mapping_t mapping_h[2];
} flash_t;
static char flash_path[1024];
static uint8_t
flash_read(uint32_t addr, void *p)
flash_read(uint32_t addr, void *priv)
{
flash_t *dev = (flash_t *) p;
flash_t *dev = (flash_t *) priv;
uint8_t ret = 0xff;
addr &= biosmask;
@@ -86,6 +89,9 @@ flash_read(uint32_t addr, void *p)
else if (addr == 0x00001)
ret = 0xB4; /* 28F010 */
break;
default:
break;
}
return ret;
@@ -141,13 +147,15 @@ flash_write(uint32_t addr, uint8_t val, void *p)
}
static void
flash_writew(uint32_t addr, uint16_t val, void *p)
flash_writew(UNUSED(uint32_t addr), UNUSED(uint16_t val), UNUSED(void *priv))
{
//
}
static void
flash_writel(uint32_t addr, uint32_t val, void *p)
flash_writel(UNUSED(uint32_t addr), UNUSED(uint32_t val), UNUSED(void *priv))
{
//
}
static void
@@ -179,7 +187,7 @@ catalyst_flash_reset(void *priv)
}
static void *
catalyst_flash_init(const device_t *info)
catalyst_flash_init(UNUSED(const device_t *info))
{
FILE *f;
flash_t *dev;

21
src/mem/i2c_eeprom.c
View File

@@ -23,13 +23,18 @@
#include <wchar.h>
#include <86box/86box.h>
#include <86box/i2c.h>
#include <86box/plat_unused.h>
typedef struct {
typedef struct i2c_eeprom_t {
void *i2c;
uint8_t addr, *data, writable;
uint8_t addr;
uint8_t *data;
uint8_t writable;
uint32_t addr_mask, addr_register;
uint8_t addr_len, addr_pos;
uint32_t addr_mask;
uint32_t addr_register;
uint8_t addr_len;
uint8_t addr_pos;
} i2c_eeprom_t;
#ifdef ENABLE_I2C_EEPROM_LOG
@@ -51,7 +56,7 @@ i2c_eeprom_log(const char *fmt, ...)
#endif
static uint8_t
i2c_eeprom_start(void *bus, uint8_t addr, uint8_t read, void *priv)
i2c_eeprom_start(UNUSED(void *bus), uint8_t addr, uint8_t read, void *priv)
{
i2c_eeprom_t *dev = (i2c_eeprom_t *) priv;
@@ -66,7 +71,7 @@ i2c_eeprom_start(void *bus, uint8_t addr, uint8_t read, void *priv)
}
static uint8_t
i2c_eeprom_read(void *bus, uint8_t addr, void *priv)
i2c_eeprom_read(UNUSED(void *bus), UNUSED(uint8_t addr), void *priv)
{
i2c_eeprom_t *dev = (i2c_eeprom_t *) priv;
uint8_t ret = dev->data[dev->addr_register];
@@ -79,7 +84,7 @@ i2c_eeprom_read(void *bus, uint8_t addr, void *priv)
}
static uint8_t
i2c_eeprom_write(void *bus, uint8_t addr, uint8_t data, void *priv)
i2c_eeprom_write(UNUSED(void *bus), uint8_t addr, uint8_t data, void *priv)
{
i2c_eeprom_t *dev = (i2c_eeprom_t *) priv;
@@ -104,7 +109,7 @@ i2c_eeprom_write(void *bus, uint8_t addr, uint8_t data, void *priv)
}
static void
i2c_eeprom_stop(void *bus, uint8_t addr, void *priv)
i2c_eeprom_stop(UNUSED(void *bus), UNUSED(uint8_t addr), void *priv)
{
i2c_eeprom_t *dev = (i2c_eeprom_t *) priv;

62
src/mem/intel_flash.c
View File

@@ -58,25 +58,30 @@ enum {
};
typedef struct flash_t {
uint8_t command, status,
pad, flags,
*array;
uint8_t command;
uint8_t status;
uint8_t pad;
uint8_t flags;
uint8_t *array;
uint16_t flash_id, pad16;
uint16_t flash_id;
uint16_t pad16;
uint32_t program_addr,
block_start[BLOCKS_NUM], block_end[BLOCKS_NUM],
block_len[BLOCKS_NUM];
uint32_t program_addr;
uint32_t block_start[BLOCKS_NUM];
uint32_t block_end[BLOCKS_NUM];
uint32_t block_len[BLOCKS_NUM];
mem_mapping_t mapping[4], mapping_h[16];
mem_mapping_t mapping[4];
mem_mapping_t mapping_h[16];
} flash_t;
static char flash_path[1024];
static uint8_t
flash_read(uint32_t addr, void *p)
flash_read(uint32_t addr, void *priv)
{
flash_t *dev = (flash_t *) p;
flash_t *dev = (flash_t *) priv;
uint8_t ret = 0xff;
if (dev->flags & FLAG_INV_A16)
@@ -84,8 +89,8 @@ flash_read(uint32_t addr, void *p)
addr &= biosmask;
switch (dev->command) {
case CMD_READ_ARRAY:
default:
case CMD_READ_ARRAY:
ret = dev->array[addr];
break;
@@ -105,9 +110,9 @@ flash_read(uint32_t addr, void *p)
}
static uint16_t
flash_readw(uint32_t addr, void *p)
flash_readw(uint32_t addr, void *priv)
{
flash_t *dev = (flash_t *) p;
flash_t *dev = (flash_t *) priv;
uint16_t *q;
uint16_t ret = 0xffff;
@@ -123,8 +128,8 @@ flash_readw(uint32_t addr, void *p)
if (dev->flags & FLAG_WORD)
switch (dev->command) {
case CMD_READ_ARRAY:
default:
case CMD_READ_ARRAY:
break;
case CMD_IID:
@@ -143,9 +148,9 @@ flash_readw(uint32_t addr, void *p)
}
static uint32_t
flash_readl(uint32_t addr, void *p)
flash_readl(uint32_t addr, void *priv)
{
flash_t *dev = (flash_t *) p;
flash_t *dev = (flash_t *) priv;
uint32_t *q;
if (dev->flags & FLAG_INV_A16)
@@ -158,10 +163,9 @@ flash_readl(uint32_t addr, void *p)
}
static void
flash_write(uint32_t addr, uint8_t val, void *p)
flash_write(uint32_t addr, uint8_t val, void *priv)
{
flash_t *dev = (flash_t *) p;
int i;
flash_t *dev = (flash_t *) priv;
uint32_t bb_mask = biosmask & 0xffffe000;
if (biosmask == 0x7ffff)
bb_mask &= 0xffff8000;
@@ -175,7 +179,7 @@ flash_write(uint32_t addr, uint8_t val, void *p)
switch (dev->command) {
case CMD_ERASE_SETUP:
if (val == CMD_ERASE_CONFIRM) {
for (i = 0; i < 6; i++) {
for (uint8_t i = 0; i < 6; i++) {
if ((i == dev->program_addr) && (addr >= dev->block_start[i]) && (addr <= dev->block_end[i]))
memset(&(dev->array[dev->block_start[i]]), 0xff, dev->block_len[i]);
}
@@ -200,7 +204,7 @@ flash_write(uint32_t addr, uint8_t val, void *p)
dev->status = 0;
break;
case CMD_ERASE_SETUP:
for (i = 0; i < 7; i++) {
for (uint8_t i = 0; i < 7; i++) {
if ((addr >= dev->block_start[i]) && (addr <= dev->block_end[i]))
dev->program_addr = i;
}
@@ -209,6 +213,9 @@ flash_write(uint32_t addr, uint8_t val, void *p)
case CMD_PROGRAM_SETUP_ALT:
dev->program_addr = addr;
break;
default:
break;
}
}
}
@@ -266,16 +273,19 @@ flash_writew(uint32_t addr, uint16_t val, void *p)
case CMD_PROGRAM_SETUP_ALT:
dev->program_addr = addr;
break;
default:
break;
}
}
}
static void
flash_writel(uint32_t addr, uint32_t val, void *p)
flash_writel(UNUSED(uint32_t addr), UNUSED(uint32_t val), UNUSED(void *priv))
{
#if 0
flash_writew(addr, val & 0xffff, p);
flash_writew(addr + 2, (val >> 16) & 0xffff, p);
flash_writew(addr, val & 0xffff, priv);
flash_writew(addr + 2, (val >> 16) & 0xffff, priv);
#endif
}
@@ -522,10 +532,10 @@ intel_flash_init(const device_t *info)
}
static void
intel_flash_close(void *p)
intel_flash_close(void *priv)
{
FILE *f;
flash_t *dev = (flash_t *) p;
flash_t *dev = (flash_t *) priv;
f = nvr_fopen(flash_path, "wb");
fwrite(&(dev->array[dev->block_start[BLOCK_MAIN1]]), dev->block_len[BLOCK_MAIN1], 1, f);

194
src/mem/mem.c
View File

@@ -1776,7 +1776,7 @@ mem_write_phys(void *src, uint32_t addr, int transfer_size)
}
uint8_t
mem_read_ram(uint32_t addr, void *priv)
mem_read_ram(uint32_t addr, UNUSED(void *priv))
{
#ifdef ENABLE_MEM_LOG
if ((addr >= 0xa0000) && (addr <= 0xbffff))
@@ -1790,7 +1790,7 @@ mem_read_ram(uint32_t addr, void *priv)
}
uint16_t
mem_read_ramw(uint32_t addr, void *priv)
mem_read_ramw(uint32_t addr, UNUSED(void *priv))
{
#ifdef ENABLE_MEM_LOG
if ((addr >= 0xa0000) && (addr <= 0xbffff))
@@ -1804,7 +1804,7 @@ mem_read_ramw(uint32_t addr, void *priv)
}
uint32_t
mem_read_raml(uint32_t addr, void *priv)
mem_read_raml(uint32_t addr, UNUSED(void *priv))
{
#ifdef ENABLE_MEM_LOG
if ((addr >= 0xa0000) && (addr <= 0xbffff))
@@ -1818,7 +1818,7 @@ mem_read_raml(uint32_t addr, void *priv)
}
uint8_t
mem_read_ram_2gb(uint32_t addr, void *priv)
mem_read_ram_2gb(uint32_t addr, UNUSED(void *priv))
{
#ifdef ENABLE_MEM_LOG
if ((addr >= 0xa0000) && (addr <= 0xbffff))
@@ -1831,7 +1831,7 @@ mem_read_ram_2gb(uint32_t addr, void *priv)
}
uint16_t
mem_read_ram_2gbw(uint32_t addr, void *priv)
mem_read_ram_2gbw(uint32_t addr, UNUSED(void *priv))
{
#ifdef ENABLE_MEM_LOG
if ((addr >= 0xa0000) && (addr <= 0xbffff))
@@ -1844,7 +1844,7 @@ mem_read_ram_2gbw(uint32_t addr, void *priv)
}
uint32_t
mem_read_ram_2gbl(uint32_t addr, void *priv)
mem_read_ram_2gbl(uint32_t addr, UNUSED(void *priv))
{
#ifdef ENABLE_MEM_LOG
if ((addr >= 0xa0000) && (addr <= 0xbffff))
@@ -1858,71 +1858,71 @@ mem_read_ram_2gbl(uint32_t addr, void *priv)
#ifdef USE_NEW_DYNAREC
static inline int
page_index(page_t *p)
page_index(page_t *page)
{
return ((uintptr_t) p - (uintptr_t) pages) / sizeof(page_t);
return ((uintptr_t) page - (uintptr_t) pages) / sizeof(page_t);
}
void
page_add_to_evict_list(page_t *p)
page_add_to_evict_list(page_t *page)
{
pages[purgable_page_list_head].evict_prev = page_index(p);
p->evict_next = purgable_page_list_head;
p->evict_prev = 0;
pages[purgable_page_list_head].evict_prev = page_index(page);
page->evict_next = purgable_page_list_head;
page->evict_prev = 0;
purgable_page_list_head = pages[purgable_page_list_head].evict_prev;
purgeable_page_count++;
}
void
page_remove_from_evict_list(page_t *p)
page_remove_from_evict_list(page_t *page)
{
if (!page_in_evict_list(p))
if (!page_in_evict_list(page))
fatal("page_remove_from_evict_list: not in evict list!\n");
if (p->evict_prev)
pages[p->evict_prev].evict_next = p->evict_next;
if (page->evict_prev)
pages[page->evict_prev].evict_next = page->evict_next;
else
purgable_page_list_head = p->evict_next;
if (p->evict_next)
pages[p->evict_next].evict_prev = p->evict_prev;
p->evict_prev = EVICT_NOT_IN_LIST;
purgable_page_list_head = page->evict_next;
if (page->evict_next)
pages[page->evict_next].evict_prev = page->evict_prev;
page->evict_prev = EVICT_NOT_IN_LIST;
purgeable_page_count--;
}
void
mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *p)
mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *page)
{
if (p == NULL)
if (page == NULL)
return;
# ifdef USE_DYNAREC
if ((p->mem == NULL) || (p->mem == page_ff) || (val != p->mem[addr & 0xfff]) || codegen_in_recompile) {
if ((page->mem == NULL) || (page->mem == page_ff) || (val != page->mem[addr & 0xfff]) || codegen_in_recompile) {
# else
if ((p->mem == NULL) || (p->mem == page_ff) || (val != p->mem[addr & 0xfff])) {
if ((page->mem == NULL) || (page->mem == page_ff) || (val != page->mem[addr & 0xfff])) {
# endif
uint64_t mask = (uint64_t) 1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK);
int byte_offset = (addr >> PAGE_BYTE_MASK_SHIFT) & PAGE_BYTE_MASK_OFFSET_MASK;
uint64_t byte_mask = (uint64_t) 1 << (addr & PAGE_BYTE_MASK_MASK);
p->mem[addr & 0xfff] = val;
p->dirty_mask |= mask;
if ((p->code_present_mask & mask) && !page_in_evict_list(p))
page_add_to_evict_list(p);
p->byte_dirty_mask[byte_offset] |= byte_mask;
if ((p->byte_code_present_mask[byte_offset] & byte_mask) && !page_in_evict_list(p))
page_add_to_evict_list(p);
page->mem[addr & 0xfff] = val;
page->dirty_mask |= mask;
if ((page->code_present_mask & mask) && !page_in_evict_list(page))
page_add_to_evict_list(page);
page->byte_dirty_mask[byte_offset] |= byte_mask;
if ((page->byte_code_present_mask[byte_offset] & byte_mask) && !page_in_evict_list(page))
page_add_to_evict_list(page);
}
}
void
mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p)
mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *page)
{
if (p == NULL)
if (page == NULL)
return;
# ifdef USE_DYNAREC
if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint16_t *) &p->mem[addr & 0xfff]) || codegen_in_recompile) {
if ((page->mem == NULL) || (page->mem == page_ff) || (val != *(uint16_t *) &page->mem[addr & 0xfff]) || codegen_in_recompile) {
# else
if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint16_t *) &p->mem[addr & 0xfff])) {
if ((page->mem == NULL) || (page->mem == page_ff) || (val != *(uint16_t *) &page->mem[addr & 0xfff])) {
# endif
uint64_t mask = (uint64_t) 1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK);
int byte_offset = (addr >> PAGE_BYTE_MASK_SHIFT) & PAGE_BYTE_MASK_OFFSET_MASK;
@@ -1930,34 +1930,34 @@ mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p)
if ((addr & 0xf) == 0xf)
mask |= (mask << 1);
*(uint16_t *) &p->mem[addr & 0xfff] = val;
p->dirty_mask |= mask;
if ((p->code_present_mask & mask) && !page_in_evict_list(p))
page_add_to_evict_list(p);
*(uint16_t *) &page->mem[addr & 0xfff] = val;
page->dirty_mask |= mask;
if ((page->code_present_mask & mask) && !page_in_evict_list(page))
page_add_to_evict_list(page);
if ((addr & PAGE_BYTE_MASK_MASK) == PAGE_BYTE_MASK_MASK) {
p->byte_dirty_mask[byte_offset + 1] |= 1;
if ((p->byte_code_present_mask[byte_offset + 1] & 1) && !page_in_evict_list(p))
page_add_to_evict_list(p);
page->byte_dirty_mask[byte_offset + 1] |= 1;
if ((page->byte_code_present_mask[byte_offset + 1] & 1) && !page_in_evict_list(page))
page_add_to_evict_list(page);
} else
byte_mask |= (byte_mask << 1);
p->byte_dirty_mask[byte_offset] |= byte_mask;
page->byte_dirty_mask[byte_offset] |= byte_mask;
if ((p->byte_code_present_mask[byte_offset] & byte_mask) && !page_in_evict_list(p))
page_add_to_evict_list(p);
if ((page->byte_code_present_mask[byte_offset] & byte_mask) && !page_in_evict_list(page))
page_add_to_evict_list(page);
}
}
void
mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p)
mem_write_raml_page(uint32_t addr, uint32_t val, page_t *page)
{
if (p == NULL)
if (page == NULL)
return;
# ifdef USE_DYNAREC
if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint32_t *) &p->mem[addr & 0xfff]) || codegen_in_recompile) {
if ((page->mem == NULL) || (page->mem == page_ff) || (val != *(uint32_t *) &page->mem[addr & 0xfff]) || codegen_in_recompile) {
# else
if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint32_t *) &p->mem[addr & 0xfff])) {
if ((page->mem == NULL) || (page->mem == page_ff) || (val != *(uint32_t *) &page->mem[addr & 0xfff])) {
# endif
uint64_t mask = (uint64_t) 1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK);
int byte_offset = (addr >> PAGE_BYTE_MASK_SHIFT) & PAGE_BYTE_MASK_OFFSET_MASK;
@@ -1965,79 +1965,79 @@ mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p)
if ((addr & 0xf) >= 0xd)
mask |= (mask << 1);
*(uint32_t *) &p->mem[addr & 0xfff] = val;
p->dirty_mask |= mask;
p->byte_dirty_mask[byte_offset] |= byte_mask;
if (!page_in_evict_list(p) && ((p->code_present_mask & mask) || (p->byte_code_present_mask[byte_offset] & byte_mask)))
page_add_to_evict_list(p);
*(uint32_t *) &page->mem[addr & 0xfff] = val;
page->dirty_mask |= mask;
page->byte_dirty_mask[byte_offset] |= byte_mask;
if (!page_in_evict_list(page) && ((page->code_present_mask & mask) || (page->byte_code_present_mask[byte_offset] & byte_mask)))
page_add_to_evict_list(page);
if ((addr & PAGE_BYTE_MASK_MASK) > (PAGE_BYTE_MASK_MASK - 3)) {
uint32_t byte_mask_2 = 0xf >> (4 - (addr & 3));
p->byte_dirty_mask[byte_offset + 1] |= byte_mask_2;
if ((p->byte_code_present_mask[byte_offset + 1] & byte_mask_2) && !page_in_evict_list(p))
page_add_to_evict_list(p);
page->byte_dirty_mask[byte_offset + 1] |= byte_mask_2;
if ((page->byte_code_present_mask[byte_offset + 1] & byte_mask_2) && !page_in_evict_list(page))
page_add_to_evict_list(page);
}
}
}
#else
void
mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *p)
mem_write_ramb_page(uint32_t addr, uint8_t val, page_t *page)
{
if (p == NULL)
if (page == NULL)
return;
# ifdef USE_DYNAREC
if ((p->mem == NULL) || (p->mem == page_ff) || (val != p->mem[addr & 0xfff]) || codegen_in_recompile) {
if ((page->mem == NULL) || (page->mem == page_ff) || (val != page->mem[addr & 0xfff]) || codegen_in_recompile) {
# else
if ((p->mem == NULL) || (p->mem == page_ff) || (val != p->mem[addr & 0xfff])) {
if ((page->mem == NULL) || (page->mem == page_ff) || (val != page->mem[addr & 0xfff])) {
# endif
uint64_t mask = (uint64_t) 1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK);
p->dirty_mask[(addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK] |= mask;
p->mem[addr & 0xfff] = val;
page->dirty_mask[(addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK] |= mask;
page->mem[addr & 0xfff] = val;
}
}
void
mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *p)
mem_write_ramw_page(uint32_t addr, uint16_t val, page_t *page)
{
if (p == NULL)
if (page == NULL)
return;
# ifdef USE_DYNAREC
if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint16_t *) &p->mem[addr & 0xfff]) || codegen_in_recompile) {
if ((page->mem == NULL) || (page->mem == page_ff) || (val != *(uint16_t *) &page->mem[addr & 0xfff]) || codegen_in_recompile) {
# else
if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint16_t *) &p->mem[addr & 0xfff])) {
if ((page->mem == NULL) || (page->mem == page_ff) || (val != *(uint16_t *) &page->mem[addr & 0xfff])) {
# endif
uint64_t mask = (uint64_t) 1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK);
if ((addr & 0xf) == 0xf)
mask |= (mask << 1);
p->dirty_mask[(addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK] |= mask;
*(uint16_t *) &p->mem[addr & 0xfff] = val;
page->dirty_mask[(addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK] |= mask;
*(uint16_t *) &page->mem[addr & 0xfff] = val;
}
}
void
mem_write_raml_page(uint32_t addr, uint32_t val, page_t *p)
mem_write_raml_page(uint32_t addr, uint32_t val, page_t *page)
{
if (p == NULL)
if (page == NULL)
return;
# ifdef USE_DYNAREC
if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint32_t *) &p->mem[addr & 0xfff]) || codegen_in_recompile) {
if ((page->mem == NULL) || (page->mem == page_ff) || (val != *(uint32_t *) &page->mem[addr & 0xfff]) || codegen_in_recompile) {
# else
if ((p->mem == NULL) || (p->mem == page_ff) || (val != *(uint32_t *) &p->mem[addr & 0xfff])) {
if ((page->mem == NULL) || (page->mem == page_ff) || (val != *(uint32_t *) &page->mem[addr & 0xfff])) {
# endif
uint64_t mask = (uint64_t) 1 << ((addr >> PAGE_MASK_SHIFT) & PAGE_MASK_MASK);
if ((addr & 0xf) >= 0xd)
mask |= (mask << 1);
p->dirty_mask[(addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK] |= mask;
*(uint32_t *) &p->mem[addr & 0xfff] = val;
page->dirty_mask[(addr >> PAGE_MASK_INDEX_SHIFT) & PAGE_MASK_INDEX_MASK] |= mask;
*(uint32_t *) &page->mem[addr & 0xfff] = val;
}
}
#endif
void
mem_write_ram(uint32_t addr, uint8_t val, void *priv)
mem_write_ram(uint32_t addr, uint8_t val, UNUSED(void *priv))
{
#ifdef ENABLE_MEM_LOG
if ((addr >= 0xa0000) && (addr <= 0xbffff))
@@ -2065,7 +2065,7 @@ mem_write_ramw(uint32_t addr, uint16_t val, void *priv)
}
void
mem_write_raml(uint32_t addr, uint32_t val, void *priv)
mem_write_raml(uint32_t addr, uint32_t val, UNUSED(void *priv))
{
#ifdef ENABLE_MEM_LOG
if ((addr >= 0xa0000) && (addr <= 0xbffff))
@@ -2079,7 +2079,7 @@ mem_write_raml(uint32_t addr, uint32_t val, void *priv)
}
static uint8_t
mem_read_remapped(uint32_t addr, void *priv)
mem_read_remapped(uint32_t addr, UNUSED(void *priv))
{
addr = 0xA0000 + (addr - remap_start_addr);
if (is286)
@@ -2088,7 +2088,7 @@ mem_read_remapped(uint32_t addr, void *priv)
}
static uint16_t
mem_read_remappedw(uint32_t addr, void *priv)
mem_read_remappedw(uint32_t addr, UNUSED(void *priv))
{
addr = 0xA0000 + (addr - remap_start_addr);
if (is286)
@@ -2097,7 +2097,7 @@ mem_read_remappedw(uint32_t addr, void *priv)
}
static uint32_t
mem_read_remappedl(uint32_t addr, void *priv)
mem_read_remappedl(uint32_t addr, UNUSED(void *priv))
{
addr = 0xA0000 + (addr - remap_start_addr);
if (is286)
@@ -2106,7 +2106,7 @@ mem_read_remappedl(uint32_t addr, void *priv)
}
static uint8_t
mem_read_remapped2(uint32_t addr, void *priv)
mem_read_remapped2(uint32_t addr, UNUSED(void *priv))
{
addr = 0xD0000 + (addr - remap_start_addr2);
if (is286)
@@ -2115,7 +2115,7 @@ mem_read_remapped2(uint32_t addr, void *priv)
}
static uint16_t
mem_read_remappedw2(uint32_t addr, void *priv)
mem_read_remappedw2(uint32_t addr, UNUSED(void *priv))
{
addr = 0xD0000 + (addr - remap_start_addr2);
if (is286)
@@ -2124,7 +2124,7 @@ mem_read_remappedw2(uint32_t addr, void *priv)
}
static uint32_t
mem_read_remappedl2(uint32_t addr, void *priv)
mem_read_remappedl2(uint32_t addr, UNUSED(void *priv))
{
addr = 0xD0000 + (addr - remap_start_addr2);
if (is286)
@@ -2133,7 +2133,7 @@ mem_read_remappedl2(uint32_t addr, void *priv)
}
static void
mem_write_remapped(uint32_t addr, uint8_t val, void *priv)
mem_write_remapped(uint32_t addr, uint8_t val, UNUSED(void *priv))
{
uint32_t oldaddr = addr;
addr = 0xA0000 + (addr - remap_start_addr);
@@ -2157,7 +2157,7 @@ mem_write_remappedw(uint32_t addr, uint16_t val, void *priv)
}
static void
mem_write_remappedl(uint32_t addr, uint32_t val, void *priv)
mem_write_remappedl(uint32_t addr, uint32_t val, UNUSED(void *priv))
{
uint32_t oldaddr = addr;
addr = 0xA0000 + (addr - remap_start_addr);
@@ -2169,7 +2169,7 @@ mem_write_remappedl(uint32_t addr, uint32_t val, void *priv)
}
static void
mem_write_remapped2(uint32_t addr, uint8_t val, void *priv)
mem_write_remapped2(uint32_t addr, uint8_t val, UNUSED(void *priv))
{
uint32_t oldaddr = addr;
addr = 0xD0000 + (addr - remap_start_addr2);
@@ -2193,7 +2193,7 @@ mem_write_remappedw2(uint32_t addr, uint16_t val, void *priv)
}
static void
mem_write_remappedl2(uint32_t addr, uint32_t val, void *priv)
mem_write_remappedl2(uint32_t addr, uint32_t val, UNUSED(void *priv))
{
uint32_t oldaddr = addr;
addr = 0xD0000 + (addr - remap_start_addr2);
@@ -2208,7 +2208,7 @@ void
mem_invalidate_range(uint32_t start_addr, uint32_t end_addr)
{
#ifdef USE_NEW_DYNAREC
page_t *p;
page_t *page;
start_addr &= ~PAGE_MASK_MASK;
end_addr = (end_addr + PAGE_MASK_MASK) & ~PAGE_MASK_MASK;
@@ -2217,15 +2217,15 @@ mem_invalidate_range(uint32_t start_addr, uint32_t end_addr)
if ((start_addr >> 12) >= pages_sz)
continue;
p = &pages[start_addr >> 12];
if (p) {
p->dirty_mask = 0xffffffffffffffffULL;
page = &pages[start_addr >> 12];
if (page) {
page->dirty_mask = 0xffffffffffffffffULL;
if ((p->mem != page_ff) && p->byte_dirty_mask)
memset(p->byte_dirty_mask, 0xff, 64 * sizeof(uint64_t));
if ((page->mem != page_ff) && page->byte_dirty_mask)
memset(page->byte_dirty_mask, 0xff, 64 * sizeof(uint64_t));
if (!page_in_evict_list(p))
page_add_to_evict_list(p);
if (!page_in_evict_list(page))
page_add_to_evict_list(page);
}
}
#else
@@ -2598,7 +2598,9 @@ mem_a20_init(void)
if (is6117)
rammask |= 0x03000000;
flushmmucache();
// mem_a20_state = mem_a20_key | mem_a20_alt;
#if 0
mem_a20_state = mem_a20_key | mem_a20_alt;
#endif
} else {
rammask = 0xfffff;
flushmmucache();

8
src/mem/rom.c
View File

@@ -384,7 +384,7 @@ rom_reset(uint32_t addr, int sz)
}
uint8_t
bios_read(uint32_t addr, void *priv)
bios_read(uint32_t addr, UNUSED(void *priv))
{
uint8_t ret = 0xff;
@@ -397,7 +397,7 @@ bios_read(uint32_t addr, void *priv)
}
uint16_t
bios_readw(uint32_t addr, void *priv)
bios_readw(uint32_t addr, UNUSED(void *priv))
{
uint16_t ret = 0xffff;
@@ -410,7 +410,7 @@ bios_readw(uint32_t addr, void *priv)
}
uint32_t
bios_readl(uint32_t addr, void *priv)
bios_readl(uint32_t addr, UNUSED(void *priv))
{
uint32_t ret = 0xffffffff;
@@ -524,7 +524,7 @@ bios_load(const char *fn1, const char *fn2, uint32_t addr, int sz, int off, int
}
int
bios_load_linear_combined(const char *fn1, const char *fn2, int sz, int off)
bios_load_linear_combined(const char *fn1, const char *fn2, int sz, UNUSED(int off))
{
uint8_t ret = 0;

23
src/mem/spd.c
View File

@@ -27,6 +27,7 @@
#include <86box/spd.h>
#include <86box/version.h>
#include <86box/machine.h>
#include <86box/plat_unused.h>
#define SPD_ROLLUP(x) ((x) >= 16 ? ((x) -15) : (x))
@@ -54,7 +55,7 @@ spd_log(const char *fmt, ...)
#endif
static void
spd_close(void *priv)
spd_close(UNUSED(void *priv))
{
spd_log("SPD: close()\n");
@@ -67,7 +68,7 @@ spd_close(void *priv)
}
static void *
spd_init(const device_t *info)
spd_init(UNUSED(const device_t *info))
{
spd_log("SPD: init()\n");
@@ -181,7 +182,6 @@ spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size)
uint8_t slot;
uint8_t slot_count;
uint8_t row;
uint8_t i;
uint16_t min_module_size;
uint16_t rows[SPD_MAX_SLOTS];
uint16_t asym;
@@ -262,7 +262,7 @@ spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size)
edo_data->dram_width = 8;
edo_data->spd_rev = 0x12;
for (i = spd_write_part_no(edo_data->part_no, (ram_type == SPD_TYPE_FPM) ? "FPM" : "EDO", rows[row]);
for (int i = spd_write_part_no(edo_data->part_no, (ram_type == SPD_TYPE_FPM) ? "FPM" : "EDO", rows[row]);
i < sizeof(edo_data->part_no); i++)
edo_data->part_no[i] = ' '; /* part number should be space-padded */
edo_data->rev_code[0] = BCD8(EMU_VERSION_MAJ);
@@ -270,9 +270,9 @@ spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size)
edo_data->mfg_year = 20;
edo_data->mfg_week = 17;
for (i = 0; i < 63; i++)
for (uint8_t i = 0; i < 63; i++)
edo_data->checksum += spd_modules[slot]->data[i];
for (i = 0; i < 129; i++)
for (uint8_t i = 0; i < 129; i++)
edo_data->checksum2 += spd_modules[slot]->data[i];
break;
@@ -316,7 +316,7 @@ spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size)
sdram_data->ca_hold = sdram_data->data_hold = 0x08;
sdram_data->spd_rev = 0x12;
for (i = spd_write_part_no(sdram_data->part_no, "SDR", rows[row]);
for (int i = spd_write_part_no(sdram_data->part_no, "SDR", rows[row]);
i < sizeof(sdram_data->part_no); i++)
sdram_data->part_no[i] = ' '; /* part number should be space-padded */
sdram_data->rev_code[0] = BCD8(EMU_VERSION_MAJ);
@@ -327,11 +327,14 @@ spd_register(uint8_t ram_type, uint8_t slot_mask, uint16_t max_module_size)
sdram_data->freq = 100;
sdram_data->features = 0xFF;
for (i = 0; i < 63; i++)
for (uint8_t i = 0; i < 63; i++)
sdram_data->checksum += spd_modules[slot]->data[i];
for (i = 0; i < 129; i++)
for (uint8_t i = 0; i < 129; i++)
sdram_data->checksum2 += spd_modules[slot]->data[i];
break;
default:
break;
}
row++;
@@ -388,7 +391,7 @@ spd_write_drbs(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit
/* Write DRB register, adding the previous DRB's value. */
if (row == 0)
regs[drb] = 0;
else if ((apollo) && (drb == apollo))
else if (apollo && (drb == apollo))
regs[drb] = regs[drb | 0xf]; /* 5F comes before 56 */
else
regs[drb] = regs[drb - 1];

63
src/mem/sst_flash.c
View File

@@ -35,21 +35,31 @@
#include <86box/m_xt_xi8088.h>
typedef struct sst_t {
uint8_t manufacturer, id, has_bbp, is_39,
page_bytes, sdp, bbp_first_8k, bbp_last_8k;
uint8_t manufacturer;
uint8_t id;
uint8_t has_bbp;
uint8_t is_39;
uint8_t page_bytes;
uint8_t sdp;
uint8_t bbp_first_8k;
uint8_t bbp_last_8k;
int command_state, id_mode,
dirty;
int command_state;
int id_mode;
int dirty;
uint32_t size, mask,
page_mask, page_base,
last_addr;
uint32_t size;
uint32_t mask;
uint32_t page_mask;
uint32_t page_base;
uint32_t last_addr;
uint8_t page_buffer[128],
page_dirty[128];
uint8_t page_buffer[128];
uint8_t page_dirty[128];
uint8_t *array;
mem_mapping_t mapping[8], mapping_h[8];
mem_mapping_t mapping[8];
mem_mapping_t mapping_h[8];
pc_timer_t page_write_timer;
} sst_t;
@@ -252,9 +262,9 @@ sst_page_write(void *priv)
}
static uint8_t
sst_read_id(uint32_t addr, void *p)
sst_read_id(uint32_t addr, void *priv)
{
sst_t *dev = (sst_t *) p;
sst_t *dev = (sst_t *) priv;
uint8_t ret = 0x00;
if ((addr & 0xffff) == 0)
@@ -291,9 +301,9 @@ sst_buf_write(sst_t *dev, uint32_t addr, uint8_t val)
}
static void
sst_write(uint32_t addr, uint8_t val, void *p)
sst_write(uint32_t addr, uint8_t val, void *priv)
{
sst_t *dev = (sst_t *) p;
sst_t *dev = (sst_t *) priv;
switch (dev->command_state) {
case 0:
@@ -359,19 +369,22 @@ sst_write(uint32_t addr, uint8_t val, void *p)
dev->bbp_last_8k = 0xff;
dev->command_state = 0;
break;
default:
break;
}
}
static uint8_t
sst_read(uint32_t addr, void *p)
sst_read(uint32_t addr, void *priv)
{
sst_t *dev = (sst_t *) p;
sst_t *dev = (sst_t *) priv;
uint8_t ret = 0xff;
addr &= 0x000fffff;
if (dev->id_mode)
ret = sst_read_id(addr, p);
ret = sst_read_id(addr, priv);
else {
if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask)))
ret = dev->array[addr - biosaddr];
@@ -381,15 +394,15 @@ sst_read(uint32_t addr, void *p)
}
static uint16_t
sst_readw(uint32_t addr, void *p)
sst_readw(uint32_t addr, void *priv)
{
sst_t *dev = (sst_t *) p;
sst_t *dev = (sst_t *) priv;
uint16_t ret = 0xffff;
addr &= 0x000fffff;
if (dev->id_mode)
ret = sst_read(addr, p) | (sst_read(addr + 1, p) << 8);
ret = sst_read(addr, priv) | (sst_read(addr + 1, priv) << 8);
else {
if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask)))
ret = *(uint16_t *) &dev->array[addr - biosaddr];
@@ -399,15 +412,15 @@ sst_readw(uint32_t addr, void *p)
}
static uint32_t
sst_readl(uint32_t addr, void *p)
sst_readl(uint32_t addr, void *priv)
{
sst_t *dev = (sst_t *) p;
sst_t *dev = (sst_t *) priv;
uint32_t ret = 0xffffffff;
addr &= 0x000fffff;
if (dev->id_mode)
ret = sst_readw(addr, p) | (sst_readw(addr + 2, p) << 16);
ret = sst_readw(addr, priv) | (sst_readw(addr + 2, priv) << 16);
else {
if ((addr >= biosaddr) && (addr <= (biosaddr + biosmask)))
ret = *(uint32_t *) &dev->array[addr - biosaddr];
@@ -499,10 +512,10 @@ sst_init(const device_t *info)
}
static void
sst_close(void *p)
sst_close(void *priv)
{
FILE *f;
sst_t *dev = (sst_t *) p;
sst_t *dev = (sst_t *) priv;
if (dev->dirty) {
f = nvr_fopen(flash_path, "wb");

3
src/nmi.c
View File

@@ -7,11 +7,12 @@
#include <wchar.h>
#include <86box/io.h>
#include <86box/nmi.h>
#include <86box/plat_unused.h>
int nmi_mask;
void
nmi_write(uint16_t port, uint8_t val, void *p)
nmi_write(UNUSED(uint16_t port), uint8_t val, UNUSED(void *priv))
{
nmi_mask = val & 0x80;
}

40
src/nvr_at.c
View File

@@ -297,23 +297,30 @@
#define FLAG_P6RP4_HACK 0x10
#define FLAG_PIIX4 0x20
typedef struct {
typedef struct local_t {
int8_t stat;
uint8_t cent, def,
flags, read_addr,
wp_0d, wp_32,
pad, pad0;
uint8_t cent;
uint8_t def;
uint8_t flags;
uint8_t read_addr;
uint8_t wp_0d;
uint8_t wp_32;
uint8_t pad;
uint8_t pad0;
uint8_t addr[8], wp[2],
bank[8], *lock;
uint8_t addr[8];
uint8_t wp[2];
uint8_t bank[8];
uint8_t *lock;
int16_t count, state;
int16_t count;
int16_t state;
uint64_t ecount,
rtc_time;
pc_timer_t update_timer,
rtc_timer;
uint64_t ecount;
uint64_t rtc_time;
pc_timer_t update_timer;
pc_timer_t rtc_timer;
} local_t;
static uint8_t nvr_at_inited = 0;
@@ -650,8 +657,10 @@ nvr_write(uint16_t addr, uint8_t val, void *priv)
return;
if (addr & 1) {
// if (local->bank[addr_id] == 0xff)
// return;
#if 0
if (local->bank[addr_id] == 0xff)
return;
#endif
nvr_reg_write(local->addr[addr_id], val, priv);
} else {
local->addr[addr_id] = (val & (nvr->size - 1));
@@ -1065,6 +1074,9 @@ nvr_at_init(const device_t *info)
nvr->irq = -1;
local->cent = RTC_CENTURY_ELT;
break;
default:
break;
}
local->read_addr = 1;

8
src/nvr_ps2.c
View File

@@ -49,7 +49,7 @@
#include <86box/nvr_ps2.h>
#include <86box/rom.h>
typedef struct {
typedef struct ps2_nvr_t {
int addr;
uint8_t *ram;
@@ -76,6 +76,9 @@ ps2_nvr_read(uint16_t port, void *priv)
case 0x76:
ret = nvr->ram[nvr->addr];
break;
default:
break;
}
return ret;
@@ -98,6 +101,9 @@ ps2_nvr_write(uint16_t port, uint8_t val, void *priv)
case 0x76:
nvr->ram[nvr->addr] = val;
break;
default:
break;
}
}

68
src/pci.c
View File

@@ -34,9 +34,12 @@
#include <86box/dma.h>
#include <86box/pci.h>
#include <86box/keyboard.h>
#include <86box/plat_unused.h>
typedef struct {
uint8_t bus, id, type;
typedef struct pci_card_t {
uint8_t bus;
uint8_t id;
uint8_t type;
uint8_t irq_routing[4];
void *priv;
@@ -44,7 +47,7 @@ typedef struct {
uint8_t (*read)(int func, int addr, void *priv);
} pci_card_t;
typedef struct {
typedef struct pci_mirq_t {
uint8_t enabled;
uint8_t irq_line;
} pci_mirq_t;
@@ -141,7 +144,7 @@ pci_relocate_slot(int type, int new_slot)
}
static void
pci_cf8_write(uint16_t port, uint32_t val, void *priv)
pci_cf8_write(UNUSED(uint16_t port), uint32_t val, UNUSED(void *priv))
{
pci_log("cf8 write: %08X\n", val);
pci_index = val & 0xff;
@@ -152,13 +155,13 @@ pci_cf8_write(uint16_t port, uint32_t val, void *priv)
}
static uint32_t
pci_cf8_read(uint16_t port, void *priv)
pci_cf8_read(UNUSED(uint16_t port), UNUSED(void *priv))
{
return pci_index | (pci_func << 8) | (pci_card << 11) | (pci_bus << 16) | (pci_enable << 31);
}
static void
pci_write(uint16_t port, uint8_t val, void *priv)
pci_write(uint16_t port, uint8_t val, UNUSED(void *priv))
{
uint8_t slot = 0;
@@ -191,11 +194,14 @@ pci_write(uint16_t port, uint8_t val, void *priv)
#endif
break;
default:
break;
}
}
static void
pci_writew(uint16_t port, uint16_t val, void *priv)
pci_writew(uint16_t port, uint16_t val, UNUSED(void *priv))
{
uint8_t slot = 0;
@@ -229,11 +235,14 @@ pci_writew(uint16_t port, uint16_t val, void *priv)
#endif
break;
default:
break;
}
}
static void
pci_writel(uint16_t port, uint32_t val, void *priv)
pci_writel(uint16_t port, uint32_t val, UNUSED(void *priv))
{
uint8_t slot = 0;
@@ -269,11 +278,14 @@ pci_writel(uint16_t port, uint32_t val, void *priv)
#endif
break;
default:
break;
}
}
static uint8_t
pci_read(uint16_t port, void *priv)
pci_read(uint16_t port, UNUSED(void *priv))
{
uint8_t slot = 0;
uint8_t ret = 0xff;
@@ -302,6 +314,10 @@ pci_read(uint16_t port, void *priv)
else
pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3));
#endif
break;
default:
break;
}
pci_log("Reading %02X, from PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", ret, pci_bus, pci_card, slot, pci_func, pci_index | (port & 3));
@@ -310,7 +326,7 @@ pci_read(uint16_t port, void *priv)
}
static uint16_t
pci_readw(uint16_t port, void *priv)
pci_readw(uint16_t port, UNUSED(void *priv))
{
uint8_t slot = 0;
uint16_t ret = 0xffff;
@@ -341,6 +357,10 @@ pci_readw(uint16_t port, void *priv)
else
pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3));
#endif
break;
default:
break;
}
pci_log("Reading %04X, from PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", ret, pci_bus, pci_card, slot, pci_func, pci_index | (port & 3));
@@ -349,7 +369,7 @@ pci_readw(uint16_t port, void *priv)
}
static uint32_t
pci_readl(uint16_t port, void *priv)
pci_readl(uint16_t port, UNUSED(void *priv))
{
uint8_t slot = 0;
uint32_t ret = 0xffffffff;
@@ -382,6 +402,10 @@ pci_readl(uint16_t port, void *priv)
else
pci_log("Reading from unasisgned PCI card on slot %02X (pci_cards[%i]) (%02X:%02X)...\n", pci_card, slot, pci_func, pci_index | (port & 3));
#endif
break;
default:
break;
}
pci_log("Reading %08X, from PCI card on bus %i, slot %02X (pci_cards[%i]) (%02X:%02X)...\n", ret, pci_bus, pci_card, slot, pci_func, pci_index | (port & 3));
@@ -396,7 +420,9 @@ void
pci_set_pmc(uint8_t pmc)
{
pci_log("pci_set_pmc(%02X)\n", pmc);
// pci_reset_regs();
#if 0
pci_reset_regs();
#endif
if (!pci_pmc && (pmc & 0x01)) {
io_removehandler(pci_base, pci_size,
@@ -439,7 +465,7 @@ pci_set_pmc(uint8_t pmc)
}
static void
pci_type2_write(uint16_t port, uint8_t val, void *priv)
pci_type2_write(uint16_t port, uint8_t val, UNUSED(void *priv))
{
uint8_t slot = 0;
@@ -510,7 +536,7 @@ pci_type2_writel(uint16_t port, uint32_t val, void *priv)
}
static uint8_t
pci_type2_read(uint16_t port, void *priv)
pci_type2_read(uint16_t port, UNUSED(void *priv))
{
uint8_t slot = 0;
uint8_t ret = 0xff;
@@ -899,19 +925,19 @@ pci_slots_clear(void)
}
uint32_t
trc_readl(uint16_t port, void *priv)
trc_readl(UNUSED(uint16_t port), UNUSED(void *priv))
{
return 0xffffffff;
}
uint16_t
trc_readw(uint16_t port, void *priv)
trc_readw(UNUSED(uint16_t port), UNUSED(void *priv))
{
return 0xffff;
}
uint8_t
trc_read(uint16_t port, void *priv)
trc_read(UNUSED(uint16_t port), UNUSED(void *priv))
{
return trc_reg & 0xfb;
}
@@ -939,17 +965,19 @@ trc_reset(uint8_t val)
}
void
trc_writel(uint16_t port, uint32_t val, void *priv)
trc_writel(UNUSED(uint16_t port), UNUSED(uint32_t val), UNUSED(void *priv))
{
//
}
void
trc_writew(uint16_t port, uint16_t val, void *priv)
trc_writew(UNUSED(uint16_t port), UNUSED(uint16_t val), UNUSED(void *priv))
{
//
}
void
trc_write(uint16_t port, uint8_t val, void *priv)
trc_write(UNUSED(uint16_t port), uint8_t val, UNUSED(void *priv))
{
pci_log("TRC Write: %02X\n", val);

54
src/pci_dummy.c
View File

@@ -9,14 +9,15 @@
#include <86box/io.h>
#include <86box/pci.h>
#include <86box/pci_dummy.h>
#include <86box/plat_unused.h>
typedef struct
{
typedef struct pci_dummy_t {
uint8_t pci_regs[256];
bar_t pci_bar[2];
uint8_t card, interrupt_on;
uint8_t card;
uint8_t interrupt_on;
} pci_dummy_t;
static void
@@ -29,12 +30,12 @@ pci_dummy_interrupt(int set, pci_dummy_t *dev)
}
static uint8_t
pci_dummy_read(uint16_t Port, void *p)
pci_dummy_read(uint16_t port, void *priv)
{
pci_dummy_t *dev = (pci_dummy_t *) p;
pci_dummy_t *dev = (pci_dummy_t *) priv;
uint8_t ret = 0xff;
switch (Port & 0x20) {
switch (port & 0x20) {
case 0x00:
ret = 0x1a;
break;
@@ -60,48 +61,54 @@ pci_dummy_read(uint16_t Port, void *p)
dev->interrupt_on = 0;
}
break;
default:
break;
}
return ret;
}
static uint16_t
pci_dummy_readw(uint16_t Port, void *p)
pci_dummy_readw(uint16_t port, void *priv)
{
return pci_dummy_read(Port, p);
return pci_dummy_read(port, priv);
}
static uint32_t
pci_dummy_readl(uint16_t Port, void *p)
pci_dummy_readl(uint16_t port, void *priv)
{
return pci_dummy_read(Port, p);
return pci_dummy_read(port, priv);
}
static void
pci_dummy_write(uint16_t Port, uint8_t Val, void *p)
pci_dummy_write(uint16_t port, UNUSED(uint8_t val), void *priv)
{
pci_dummy_t *dev = (pci_dummy_t *) p;
pci_dummy_t *dev = (pci_dummy_t *) priv;
switch (Port & 0x20) {
switch (port & 0x20) {
case 0x06:
if (!dev->interrupt_on) {
dev->interrupt_on = 1;
pci_dummy_interrupt(1, dev);
}
break;
default:
break;
}
}
static void
pci_dummy_writew(uint16_t Port, uint16_t Val, void *p)
pci_dummy_writew(uint16_t port, uint16_t val, void *priv)
{
pci_dummy_write(Port, Val & 0xFF, p);
pci_dummy_write(port, val & 0xFF, priv);
}
static void
pci_dummy_writel(uint16_t Port, uint32_t Val, void *p)
pci_dummy_writel(uint16_t port, uint32_t val, void *priv)
{
pci_dummy_write(Port, Val & 0xFF, p);
pci_dummy_write(port, val & 0xFF, priv);
}
static void
@@ -172,7 +179,9 @@ pci_dummy_pci_read(int func, int addr, void *priv)
break;
}
// pclog("AB0B:071A: PCI_Read(%d, %04X) = %02X\n", func, addr, ret);
#if 0
pclog("AB0B:071A: PCI_Read(%d, %04X) = %02X\n", func, addr, ret);
#endif
return ret;
}
@@ -183,7 +192,9 @@ pci_dummy_pci_write(int func, int addr, uint8_t val, void *priv)
pci_dummy_t *dev = (pci_dummy_t *) priv;
uint8_t valxor;
// pclog("AB0B:071A: PCI_Write(%d, %04X, %02X)\n", func, addr, val);
#if 0
pclog("AB0B:071A: PCI_Write(%d, %04X, %02X)\n", func, addr, val);
#endif
if (func == 0x00)
switch (addr) {
@@ -225,6 +236,9 @@ pci_dummy_pci_write(int func, int addr, uint8_t val, void *priv)
pclog("AB0B:071A Device %02X: IRQ now: %i\n", dev->card, val);
dev->pci_regs[addr] = val;
return;
default:
break;
}
}
@@ -252,7 +266,7 @@ pci_dummy_close(void *priv)
}
static void *
pci_dummy_card_init(const device_t *info)
pci_dummy_card_init(UNUSED(const device_t *info))
{
pci_dummy_t *dev = (pci_dummy_t *) calloc(1, sizeof(pci_dummy_t));

24
src/pic.c
View File

@@ -37,6 +37,7 @@
#include <86box/apm.h>
#include <86box/nvr.h>
#include <86box/acpi.h>
#include <86box/plat_unused.h>
enum {
STATE_NONE = 0,
@@ -140,7 +141,7 @@ pic_elcr_write(uint16_t port, uint8_t val, void *priv)
}
uint8_t
pic_elcr_read(uint16_t port, void *priv)
pic_elcr_read(UNUSED(uint16_t port), void *priv)
{
pic_t *dev = (pic_t *) priv;
@@ -191,8 +192,8 @@ find_best_interrupt(pic_t *dev)
{
uint8_t b;
uint8_t intr;
int j;
int ret = -1;
uint8_t j;
int8_t ret = -1;
for (uint8_t i = 0; i < 8; i++) {
j = (i + dev->priority) & 7;
@@ -334,7 +335,7 @@ pic_acknowledge(pic_t *dev)
static uint8_t
pic_non_specific_find(pic_t *dev)
{
int j;
uint8_t j;
uint8_t b;
uint8_t irq = 0xff;
@@ -398,7 +399,7 @@ pic_command(pic_t *dev)
}
uint8_t
pic_latch_read(uint16_t addr, void *priv)
pic_latch_read(UNUSED(uint16_t addr), UNUSED(void *priv))
{
uint8_t ret = 0xff;
@@ -495,6 +496,9 @@ pic_write(uint16_t addr, uint8_t val, void *priv)
dev->imr = val;
update_pending();
break;
default:
break;
}
} else {
if (val & 0x10) {
@@ -531,14 +535,12 @@ pic_write(uint16_t addr, uint8_t val, void *priv)
void
pic_set_pci(void)
{
int i;
for (i = 0x0024; i < 0x0040; i += 4) {
for (uint8_t i = 0x0024; i < 0x0040; i += 4) {
io_sethandler(i, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic);
io_sethandler(i + 0x0080, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic2);
}
for (i = 0x1120; i < 0x1140; i += 4) {
for (uint16_t i = 0x1120; i < 0x1140; i += 4) {
io_sethandler(i, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic);
io_sethandler(i + 0x0080, 0x0002, pic_read, NULL, NULL, pic_write, NULL, NULL, &pic2);
}
@@ -628,7 +630,7 @@ picint_common(uint16_t num, int level, int set)
/* Make sure to ignore all slave IRQ's, and in case of AT+,
translate IRQ 2 to IRQ 9. */
for (uint8_t i = 0; i < 8; i++) {
b = (1 << i);
b = (uint8_t) (1 << i);
raise = num & b;
if (pic.icw3 & b) {
@@ -779,7 +781,7 @@ pic_irq_ack_read(pic_t *dev, int phase)
uint8_t
pic_irq_ack(void)
{
int ret;
uint8_t ret;
/* Needed for Xi8088. */
if ((pic.ack_bytes == 0) && pic.int_pending && pic_slave_on(&pic, pic.interrupt)) {

46
src/pit.c
View File

@@ -41,6 +41,7 @@
#include <86box/sound.h>
#include <86box/snd_speaker.h>
#include <86box/video.h>
#include <86box/plat_unused.h>
pit_intf_t pit_devs[2];
@@ -171,6 +172,9 @@ ctr_tick(ctr_t *ctr)
case 3:
ctr_decrease_count(ctr);
break;
default:
break;
}
break;
case 1:
@@ -189,6 +193,9 @@ ctr_tick(ctr_t *ctr)
case 6:
ctr_decrease_count(ctr);
break;
default:
break;
}
break;
case 2:
@@ -211,6 +218,9 @@ ctr_tick(ctr_t *ctr)
}
}
break;
default:
break;
}
break;
case 3:
@@ -254,6 +264,9 @@ ctr_tick(ctr_t *ctr)
ctr->newcount = 0;
}
break;
default:
break;
}
break;
case 4:
@@ -279,6 +292,9 @@ ctr_tick(ctr_t *ctr)
ctr->state = 0;
ctr_set_out(ctr, 1);
break;
default:
break;
}
}
break;
@@ -369,6 +385,9 @@ ctr_latch_count(ctr_t *ctr)
ctr->rl = count;
ctr->latched = 2;
break;
default:
break;
}
pit_log("latched counter = %04X\n", ctr->rl & 0xffff);
@@ -439,6 +458,9 @@ pit_ctr_set_gate(void *data, int counter_id, int gate)
ctr_set_out(ctr, 1);
}
break;
default:
break;
}
}
@@ -487,9 +509,9 @@ pit_ctr_set_using_timer(void *data, int counter_id, int using_timer)
}
static void
pit_timer_over(void *p)
pit_timer_over(void *priv)
{
pit_t *dev = (pit_t *) p;
pit_t *dev = (pit_t *) priv;
dev->clock ^= 1;
@@ -602,8 +624,14 @@ pit_write(uint16_t addr, uint8_t val, void *priv)
else
ctr->wm |= 0x80;
break;
default:
break;
}
break;
default:
break;
}
}
@@ -675,8 +703,14 @@ pit_read(uint16_t addr, void *priv)
else
ctr->rm |= 0x80;
break;
default:
break;
}
break;
default:
break;
}
pit_log("[%04X:%08X] pit_read(%04X, %08X) = %02X\n", CS, cpu_state.pc, addr, priv, ret);
@@ -714,7 +748,7 @@ pit_refresh_timer_at(int new_out, int old_out)
}
void
pit_speaker_timer(int new_out, int old_out)
pit_speaker_timer(int new_out, UNUSED(int old_out))
{
int l;
@@ -734,7 +768,7 @@ pit_speaker_timer(int new_out, int old_out)
}
void
pit_nmi_timer_ps2(int new_out, int old_out)
pit_nmi_timer_ps2(int new_out, UNUSED(int old_out))
{
nmi = new_out;
@@ -893,8 +927,8 @@ pit_common_init(int type, void (*out0)(int new_out, int old_out), void (*out1)(i
pit_intf_t *pit_intf = &pit_devs[0];
switch (type) {
case PIT_8253:
default:
case PIT_8253:
pit = device_add(&i8253_device);
*pit_intf = pit_classic_intf;
break;
@@ -937,8 +971,8 @@ pit_ps2_init(int type)
pit_intf_t *ps2_pit = &pit_devs[1];
switch (type) {
case PIT_8254:
default:
case PIT_8254:
pit = device_add(&i8254_ps2_device);
*ps2_pit = pit_classic_intf;
break;

36
src/pit_fast.c
View File

@@ -207,6 +207,9 @@ pitf_ctr_load(ctrf_t *ctr)
case 5: /*Hardware triggered stobe*/
ctr->enabled = 1;
break;
default:
break;
}
if (ctr->load_func != NULL)
@@ -266,6 +269,9 @@ pitf_set_gate_no_timer(ctrf_t *ctr, int gate)
}
ctr->enabled = gate;
break;
default:
break;
}
ctr->gate = gate;
ctr->running = ctr->enabled && ctr->using_timer && !ctr->disabled;
@@ -327,7 +333,10 @@ pitf_over(ctrf_t *ctr)
if (ctr->using_timer)
timer_advance_u64(&ctr->timer, (uint64_t) (((l + 1) >> 1) * PITCONST));
}
// if (!t) pclog("pit_over: square wave mode c=%x %lli %f\n", pit.c[t], tsc, PITCONST);
#if 0
if (!t)
pclog("pit_over: square wave mode c=%x %lli %f\n", pit.c[t], tsc, PITCONST);
#endif
break;
case 4: /*Software triggered strove*/
if (!ctr->thit) {
@@ -356,6 +365,9 @@ pitf_over(ctrf_t *ctr)
if (ctr->using_timer)
timer_advance_u64(&ctr->timer, (uint64_t) (0xffff * PITCONST));
break;
default:
break;
}
ctr->running = ctr->enabled && ctr->using_timer && !ctr->disabled;
if (ctr->using_timer && !ctr->running)
@@ -366,8 +378,10 @@ static __inline void
pitf_ctr_latch_count(ctrf_t *ctr)
{
ctr->rl = pitf_read_timer(ctr);
// pclog("Timer latch %f %04X %04X\n",pit->c[0],pit->rl[0],pit->l[0]);
// pit->ctrl |= 0x30;
#if 0
pclog("Timer latch %f %04X %04X\n",pit->c[0],pit->rl[0],pit->l[0]);
pit->ctrl |= 0x30;
#endif
ctr->rereadlatch = 0;
ctr->rm = 3;
ctr->latched = 1;
@@ -472,8 +486,14 @@ pitf_write(uint16_t addr, uint8_t val, void *priv)
ctr->l |= val;
ctr->wm = 0;
break;
default:
break;
}
break;
default:
break;
}
}
@@ -530,8 +550,14 @@ pitf_read(uint16_t addr, void *priv)
else
ctr->rm = 0;
break;
default:
break;
}
break;
default:
break;
}
pit_log("[%04X:%08X] pit_read(%04X, %08X) = %02X\n", CS, cpu_state.pc, addr, priv, ret);
@@ -540,9 +566,9 @@ pitf_read(uint16_t addr, void *priv)
}
static void
pitf_timer_over(void *p)
pitf_timer_over(void *priv)
{
ctrf_t *ctr = (ctrf_t *) p;
ctrf_t *ctr = (ctrf_t *) priv;
pitf_over(ctr);
}

10
src/port_6x.c
View File

@@ -36,6 +36,7 @@
#include <86box/ppi.h>
#include <86box/video.h>
#include <86box/port_6x.h>
#include <86box/plat_unused.h>
#define PS2_REFRESH_TIME (16 * TIMER_USEC)
@@ -68,11 +69,14 @@ port_6x_write(uint16_t port, uint8_t val, void *priv)
if (dev->flags & PORT_6X_TURBO)
xi8088_turbo_set(!!(val & 0x04));
break;
default:
break;
}
}
static uint8_t
port_61_read_simple(uint16_t port, void *priv)
port_61_read_simple(UNUSED(uint16_t port), UNUSED(void *priv))
{
uint8_t ret = ppi.pb & 0x1f;
@@ -83,7 +87,7 @@ port_61_read_simple(uint16_t port, void *priv)
}
static uint8_t
port_61_read(uint16_t port, void *priv)
port_61_read(UNUSED(uint16_t port), void *priv)
{
port_6x_t *dev = (port_6x_t *) priv;
uint8_t ret = 0xff;
@@ -106,7 +110,7 @@ port_61_read(uint16_t port, void *priv)
}
static uint8_t
port_62_read(uint16_t port, void *priv)
port_62_read(UNUSED(uint16_t port), UNUSED(void *priv))
{
uint8_t ret = 0xff;

5
src/port_92.c
View File

@@ -29,6 +29,7 @@
#include <86box/mem.h>
#include <86box/pit.h>
#include <86box/port_92.h>
#include <86box/plat_unused.h>
#define PORT_92_INV 1
#define PORT_92_WORD 2
@@ -74,7 +75,7 @@ port_92_readw(uint16_t port, void *priv)
TODO: ALi M1543(c) behavior.
*/
static void
port_92_pulse(void *priv)
port_92_pulse(UNUSED(void *priv))
{
softresetx86(); /* Pulse reset! */
cpu_set_edx();
@@ -174,7 +175,7 @@ port_92_remove(void *priv)
}
static void
port_92_reset(void *priv)
port_92_reset(UNUSED(void *priv))
{
cpu_alt_reset = 0;

4
src/printer/png.c
View File

@@ -92,13 +92,13 @@ png_log(const char *fmt, ...)
#endif
static void
error_handler(png_structp arg, const char *str)
error_handler(UNUSED(png_structp arg), UNUSED(const char *str))
{
png_log("PNG: stream 0x%08lx error '%s'\n", arg, str);
}
static void
warning_handler(png_structp arg, const char *str)
warning_handler(UNUSED(png_structp arg), UNUSED(const char *str))
{
png_log("PNG: stream 0x%08lx warning '%s'\n", arg, str);
}

2
src/printer/prt_cpmap.c
View File

@@ -572,7 +572,7 @@ static const struct {
void
select_codepage(uint16_t code, uint16_t *curmap)
{
int i = 0;
uint16_t i = 0;
const uint16_t *map_to_use;
map_to_use = maps[0].map;

19
src/printer/prt_escp.c
View File

@@ -181,7 +181,7 @@ static dllimp_t ft_imports[] = {
#define PIXX ((unsigned) floor(dev->curr_x * dev->dpi + 0.5))
#define PIXY ((unsigned) floor(dev->curr_y * dev->dpi + 0.5))
typedef struct {
typedef struct psurface_t {
int8_t dirty; /* has the page been printed on? */
char pad;
@@ -192,7 +192,7 @@ typedef struct {
uint8_t *pixels; /* grayscale pixel data */
} psurface_t;
typedef struct {
typedef struct escp_t {
const char *name;
void *lpt;
@@ -204,12 +204,12 @@ typedef struct {
uint8_t color;
/* page data (TODO: make configurable) */
double page_width, /* all in inches */
page_height,
left_margin,
top_margin,
right_margin,
bottom_margin;
double page_width; /* all in inches */
double page_height;
double left_margin;
double top_margin;
double right_margin;
double bottom_margin;
uint16_t dpi;
double cpi; /* defined chars per inch */
double lpi; /* defined lines per inch */
@@ -255,7 +255,8 @@ typedef struct {
char fontpath[1024];
char pagepath[1024];
psurface_t *page;
double curr_x, curr_y; /* print head position (inch) */
double curr_x; /* print head position (x, inch) */
double curr_y; /* print head position (y, inch) */
uint16_t current_font;
FT_Face fontface;
int8_t lq_typeface;

16
src/printer/prt_ps.c
View File

@@ -236,9 +236,9 @@ timeout_timer(void *priv)
}
static void
ps_write_data(uint8_t val, void *p)
ps_write_data(uint8_t val, void *priv)
{
ps_t *dev = (ps_t *) p;
ps_t *dev = (ps_t *) priv;
if (dev == NULL)
return;
@@ -285,9 +285,9 @@ process_data(ps_t *dev)
}
static void
ps_write_ctrl(uint8_t val, void *p)
ps_write_ctrl(uint8_t val, void *priv)
{
ps_t *dev = (ps_t *) p;
ps_t *dev = (ps_t *) priv;
if (dev == NULL)
return;
@@ -317,9 +317,9 @@ ps_write_ctrl(uint8_t val, void *p)
}
static uint8_t
ps_read_status(void *p)
ps_read_status(void *priv)
{
ps_t *dev = (ps_t *) p;
ps_t *dev = (ps_t *) priv;
uint8_t ret = 0x9f;
if (!dev->ack)
@@ -368,9 +368,9 @@ ps_init(void *lpt)
}
static void
ps_close(void *p)
ps_close(void *priv)
{
ps_t *dev = (ps_t *) p;
ps_t *dev = (ps_t *) priv;
if (dev == NULL)
return;

28
src/printer/prt_text.c
View File

@@ -81,7 +81,7 @@
#define PAGE_CPI 10.0 /* standard 10 cpi */
#define PAGE_LPI 6.0 /* standard 6 lpi */
typedef struct {
typedef struct psurface_t {
int8_t dirty; /* has the page been printed on? */
char pad;
@@ -91,7 +91,7 @@ typedef struct {
char *chars; /* character data */
} psurface_t;
typedef struct {
typedef struct prnt_t {
const char *name;
void *lpt;
@@ -104,23 +104,23 @@ typedef struct {
pc_timer_t timeout_timer;
/* page data (TODO: make configurable) */
double page_width, /* all in inches */
page_height,
left_margin,
top_margin,
right_margin,
bot_margin;
double page_width; /* all in inches */
double page_height;
double left_margin;
double top_margin;
double right_margin;
double bot_margin;
/* internal page data */
psurface_t *page;
uint8_t max_chars,
max_lines;
uint8_t curr_x, /* print head position (chars) */
curr_y;
uint8_t max_chars;
uint8_t max_lines;
uint8_t curr_x; /* print head position (x, chars) */
uint8_t curr_y; /* print head position (y, chars) */
/* font data */
double cpi, /* defined chars per inch */
lpi; /* defined lines per inch */
double cpi; /* defined chars per inch */
double lpi; /* defined lines per inch */
/* handshake data */
uint8_t data;

16
src/sio/sio_82091aa.c
View File

@@ -35,9 +35,10 @@
#include <86box/fdc.h>
#include <86box/sio.h>
typedef struct {
uint8_t cur_reg, has_ide,
regs[81];
typedef struct i82091aa_t {
uint8_t cur_reg;
uint8_t has_ide;
uint8_t regs[81];
uint16_t base_address;
fdc_t *fdc;
serial_t *uart[2];
@@ -71,6 +72,9 @@ lpt1_handler(i82091aa_t *dev)
case 3:
lpt_port = 0x000;
break;
default:
break;
}
if ((dev->regs[0x20] & 0x01) && lpt_port)
@@ -112,6 +116,9 @@ serial_handler(i82091aa_t *dev, int uart)
case 0x07:
uart_port = COM3_ADDR;
break;
default:
break;
}
if (dev->regs[reg] & 0x01)
@@ -193,6 +200,9 @@ i82091aa_write(uint16_t port, uint8_t val, void *priv)
if (dev->has_ide && (valxor & 0x03))
ide_handler(dev);
break;
default:
break;
}
}

14
src/sio/sio_acc3221.c
View File

@@ -31,6 +31,7 @@
#include <86box/fdd.h>
#include <86box/fdc.h>
#include <86box/sio.h>
#include <86box/plat_unused.h>
typedef struct acc3221_t {
int reg_idx;
@@ -344,9 +345,9 @@ acc3221_serial2_handler(acc3221_t *dev)
}
static void
acc3221_write(uint16_t addr, uint8_t val, void *p)
acc3221_write(uint16_t addr, uint8_t val, void *priv)
{
acc3221_t *dev = (acc3221_t *) p;
acc3221_t *dev = (acc3221_t *) priv;
uint8_t old;
if (!(addr & 1))
@@ -405,14 +406,17 @@ acc3221_write(uint16_t addr, uint8_t val, void *p)
ide_pri_enable();
}
break;
default:
break;
}
}
}
static uint8_t
acc3221_read(uint16_t addr, void *p)
acc3221_read(uint16_t addr, void *priv)
{
acc3221_t *dev = (acc3221_t *) p;
acc3221_t *dev = (acc3221_t *) priv;
if (!(addr & 1))
return dev->reg_idx;
@@ -448,7 +452,7 @@ acc3221_close(void *priv)
}
static void *
acc3221_init(const device_t *info)
acc3221_init(UNUSED(const device_t *info))
{
acc3221_t *dev = (acc3221_t *) malloc(sizeof(acc3221_t));
memset(dev, 0, sizeof(acc3221_t));

43
src/sio/sio_ali5123.c
View File

@@ -37,13 +37,14 @@
#define AB_RST 0x80
typedef struct {
uint8_t chip_id, is_apm,
tries,
regs[48],
ld_regs[13][256];
int locked,
cur_reg;
typedef struct ali5123_t {
uint8_t chip_id;
uint8_t is_apm;
uint8_t tries;
uint8_t regs[48];
uint8_t ld_regs[13][256];
int locked;
int cur_reg;
fdc_t *fdc;
serial_t *uart[3];
} ali5123_t;
@@ -125,6 +126,9 @@ ali5123_serial_handler(ali5123_t *dev, int uart)
case 0x05:
serial_set_clock_src(dev->uart[uart], 2000000.0);
break;
default:
break;
}
}
@@ -256,6 +260,10 @@ ali5123_write(uint16_t port, uint8_t val, void *priv)
case 0x07:
if (dev->cur_reg == 0xf0)
val &= 0xbf;
break;
default:
break;
}
dev->ld_regs[cur_ld][dev->cur_reg] = val;
}
@@ -288,6 +296,9 @@ ali5123_write(uint16_t port, uint8_t val, void *priv)
ali5123_serial_handler(dev, 2);
}
break;
default:
break;
}
return;
@@ -332,6 +343,9 @@ ali5123_write(uint16_t port, uint8_t val, void *priv)
if (valxor & 0x08)
fdc_update_drvrate(dev->fdc, 3, (val & 0x08) >> 3);
break;
default:
break;
}
break;
case 3:
@@ -346,6 +360,9 @@ ali5123_write(uint16_t port, uint8_t val, void *priv)
if (valxor)
ali5123_lpt_handler(dev);
break;
default:
break;
}
break;
case 4:
@@ -361,6 +378,9 @@ ali5123_write(uint16_t port, uint8_t val, void *priv)
if (valxor)
ali5123_serial_handler(dev, 0);
break;
default:
break;
}
break;
case 5:
@@ -376,6 +396,9 @@ ali5123_write(uint16_t port, uint8_t val, void *priv)
if (valxor)
ali5123_serial_handler(dev, (dev->regs[0x2d] & 0x20) ? 2 : 1);
break;
default:
break;
}
break;
case 0x0b:
@@ -391,8 +414,14 @@ ali5123_write(uint16_t port, uint8_t val, void *priv)
if (valxor)
ali5123_serial_handler(dev, (dev->regs[0x2d] & 0x20) ? 1 : 2);
break;
default:
break;
}
break;
default:
break;
}
}

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