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Merge 86box master to Immersive86box master

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This commit is contained in:
Toni Riikonen
2025-09-22 21:28:55 +03:00
parent 1621761382 4f0cdcad0b
commit 28bc20707e
353 changed files with 5391 additions and 1418 deletions
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6
.github/workflows/cmake_linux.yml vendored
View File

@@ -55,6 +55,7 @@ jobs:
- name: SDL GUI
qt: off
qt6: off
slug: -SDL
static: on
- name: Qt 5 GUI
qt: on
@@ -121,10 +122,9 @@ jobs:
- name: Configure CMake
run: >-
cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
--toolchain ${{ matrix.environment.toolchain }}
cmake -S . -B build --preset ${{ matrix.build.preset }}
--toolchain ${{ matrix.environment.toolchain }}
-D NEW_DYNAREC=${{ matrix.dynarec.new }}
-D CMAKE_INSTALL_PREFIX=./build/artifacts
-D QT=${{ matrix.ui.qt }}
-D USE_QT6=${{ matrix.ui.qt6 }}

109
.github/workflows/cmake_macos.yml vendored
View File

@@ -26,11 +26,11 @@ on:
jobs:
macos13-x86_64:
macos:
name: "${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, x86_64"
name: "${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, ${{ matrix.environment.arch }}"
runs-on: macos-13
runs-on: ${{ matrix.environment.runner }}
strategy:
fail-fast: true
@@ -54,12 +54,27 @@ jobs:
ui:
- name: SDL GUI
qt: off
slug: -SDL
static: on
- name: Qt GUI
- name: Qt 5 GUI
qt: on
slug: -Qt
slug: -Qt5
packages: >-
qt@5
environment:
- arch: x86_64
toolchain: ./cmake/flags-gcc-x86_64.cmake
slug: -x86_64
runner: macos-13
- arch: arm64
toolchain: ./cmake/llvm-macos-aarch64.cmake
slug: -arm64
runner: macos-14
exclude:
- dynarec:
new: off
environment:
arch: arm64
steps:
- name: Install dependencies
@@ -81,10 +96,9 @@ jobs:
- name: Configure CMake
run: >-
cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
--toolchain ./cmake/flags-gcc-x86_64.cmake
cmake -S . -B build --preset ${{ matrix.build.preset }}
--toolchain ${{ matrix.environment.toolchain }}
-D NEW_DYNAREC=${{ matrix.dynarec.new }}
-D CMAKE_INSTALL_PREFIX=./build/artifacts
-D QT=${{ matrix.ui.qt }}
-D Qt5_ROOT=$(brew --prefix qt@5)
-D Qt5LinguistTools_ROOT=$(brew --prefix qt@5)
@@ -100,82 +114,5 @@ jobs:
- name: Upload artifact
uses: actions/upload-artifact@v4
with:
name: '86Box${{ matrix.ui.slug }}${{ matrix.dynarec.slug }}${{ matrix.build.slug }}-macOS-x86_64-gha${{ github.run_number }}'
path: build/artifacts/**
macos14-arm64:
name: "${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, arm64"
runs-on: macos-14
strategy:
fail-fast: true
matrix:
build:
# - name: Regular
# preset: regular
- name: Debug
preset: dev_debug
slug: -Debug
- name: Dev
preset: development
slug: -Dev
dynarec:
# - name: ODR
# new: off
# slug: -ODR
- name: NDR
new: on
slug: -NDR
ui:
- name: SDL GUI
qt: off
static: on
- name: Qt GUI
qt: on
slug: -Qt
packages: >-
qt@5
steps:
- name: Install dependencies
run: >-
brew install
sdl2
rtmidi
openal-soft
fluidsynth
libslirp
vde
libserialport
${{ matrix.ui.packages }}
- name: Checkout repository
uses: actions/checkout@v4
with:
fetch-depth: 0 # Shallow clones should be disabled for a better relevancy of analysis
- name: Configure CMake
run: >-
cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
--toolchain ./cmake/llvm-macos-aarch64.cmake
-D NEW_DYNAREC=${{ matrix.dynarec.new }}
-D CMAKE_INSTALL_PREFIX=./build/artifacts
-D QT=${{ matrix.ui.qt }}
-D Qt5_ROOT=$(brew --prefix qt@5)
-D Qt5LinguistTools_ROOT=$(brew --prefix qt@5)
-D OpenAL_ROOT=$(brew --prefix openal-soft)
-D LIBSERIALPORT_ROOT=$(brew --prefix libserialport)
- name: Build
run: cmake --build build
- name: Generate package
run: cmake --install build
- name: Upload artifact
uses: actions/upload-artifact@v4
with:
name: '86Box${{ matrix.ui.slug }}${{ matrix.dynarec.slug }}${{ matrix.build.slug }}-macOS-arm64-gha${{ github.run_number }}'
name: '86Box${{ matrix.ui.slug }}${{ matrix.dynarec.slug }}${{ matrix.build.slug }}-macOS${{ matrix.environment.slug }}-gha${{ github.run_number }}'
path: build/artifacts/**

24
.github/workflows/cmake_windows_msys2.yml vendored
View File

@@ -1,4 +1,4 @@
name: CMake (Windows, msys2)
name: CMake (Windows)
on:
@@ -26,9 +26,9 @@ on:
jobs:
msys2:
windows:
name: "${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, ${{ matrix.environment.msystem }}"
name: "${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, ${{ matrix.environment.msystem }}"
runs-on: ${{ matrix.environment.runner }}
@@ -56,14 +56,15 @@ jobs:
new: on
slug: -NDR
ui:
- name: Qt GUI
- name: Qt 5 GUI
qt: on
slug: -Qt5
static: on
slug: -Qt
packages: >-
qt5-base:p
qt5-tools:p
qt5-static:p
vulkan-headers:p
# qt5-base:p
# qt5-tools:p
environment:
# - msystem: MSYS
# toolchain: ./cmake/flags-gcc-x86_64.cmake
@@ -77,10 +78,12 @@ jobs:
# prefix: mingw-w64-clang-x86_64
# toolchain: ./cmake/llvm-win32-x86_64.cmake
# slug: "CLANG64"
# runner: windows-2022
# - msystem: UCRT64
# prefix: mingw-w64-ucrt-x86_64
# toolchain: ./cmake/flags-gcc-x86_64.cmake
# slug: "UCRT64"
# runner: windows-2022
- msystem: CLANGARM64
toolchain: ./cmake/flags-gcc-aarch64.cmake
slug: -arm64
@@ -112,8 +115,7 @@ jobs:
libslirp:p
fluidsynth:p
libserialport:p
qt5-static:p
vulkan-headers:p
${{ matrix.ui.packages }}
openmp:p
- name: Checkout repository
@@ -123,10 +125,10 @@ jobs:
- name: Configure CMake
run: >-
cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
cmake -S . -B build --preset ${{ matrix.build.preset }}
--toolchain ${{ matrix.environment.toolchain }}
-D NEW_DYNAREC=${{ matrix.dynarec.new }}
-D CMAKE_INSTALL_PREFIX=./build/artifacts
-D QT=${{ matrix.ui.qt }}
- name: Build
run: cmake --build build

31
.github/workflows/codeql_linux.yml vendored
View File

@@ -33,7 +33,7 @@ jobs:
analyze-linux:
name: "Analyze (${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, x86_64)"
name: "${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, ${{ matrix.environment.arch }}"
runs-on: ubuntu-22.04
@@ -68,10 +68,13 @@ jobs:
ui:
- name: SDL GUI
qt: off
qt6: off
slug: -SDL
static: on
- name: Qt GUI
- name: Qt 5 GUI
qt: on
slug: -Qt
qt6: off
slug: -Qt5
packages: >-
qtbase5-dev
qtbase5-private-dev
@@ -79,6 +82,20 @@ jobs:
qttranslations5-l10n
libevdev-dev
libxkbcommon-x11-dev
environment:
- arch: x86_64
toolchain: ./cmake/flags-gcc-x86_64.cmake
slug: "-x86_64"
runner: ubuntu-22.04
# - arch: arm64
# toolchain: ./cmake/flags-gcc-aarch64.cmake
# slug: -arm64
# runner: ubuntu-22.04-arm
# exclude:
# - dynarec:
# new: off
# environment:
# arch: arm64
steps:
- name: Install dependencies
@@ -114,11 +131,11 @@ jobs:
- name: Configure CMake
run: >-
cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
--toolchain ./cmake/flags-gcc-x86_64.cmake
cmake -S . -B build --preset ${{ matrix.build.preset }}
--toolchain ${{ matrix.environment.toolchain }}
-D NEW_DYNAREC=${{ matrix.dynarec.new }}
-D CMAKE_INSTALL_PREFIX=./build/artifacts
-D QT=${{ matrix.ui.qt }}
-D USE_QT6=${{ matrix.ui.qt6 }}
- name: Build
run: |
@@ -140,4 +157,4 @@ jobs:
with:
# Consult https://docs.sonarsource.com/sonarqube-server/latest/analyzing-source-code/scanners/sonarscanner/ for more information and options
args: >
--define sonar.cfamily.compile-commands="${{ env.BUILD_WRAPPER_OUT_DIR }}/compile_commands.json"
--define sonar.cfamily.compile-commands=build/compile_commands.json

37
.github/workflows/codeql_macos.yml vendored
View File

@@ -31,11 +31,11 @@ on:
jobs:
analyze-macos13-x86_64:
analyze-macos:
name: "Analyze (${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, x86_64)"
name: "${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, ${{ matrix.environment.arch }}"
runs-on: macos-13
runs-on: ${{ matrix.environment.runner }}
env:
BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed
@@ -66,13 +66,29 @@ jobs:
new: on
slug: -NDR
ui:
- name: SDL GUI
qt: off
- name: Qt GUI
# - name: SDL GUI
# qt: off
# slug: -SDL
# static: on
- name: Qt 5 GUI
qt: on
slug: -Qt
slug: -Qt5
packages: >-
qt@5
environment:
- arch: x86_64
toolchain: ./cmake/flags-gcc-x86_64.cmake
slug: -x86_64
runner: macos-13
# - arch: arm64
# toolchain: ./cmake/llvm-macos-aarch64.cmake
# slug: -arm64
# runner: macos-14
# exclude:
# - dynarec:
# new: off
# environment:
# arch: arm64
steps:
- name: Install dependencies
@@ -103,10 +119,9 @@ jobs:
- name: Configure CMake
run: >-
cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
--toolchain ./cmake/flags-gcc-x86_64.cmake
cmake -S . -B build --preset ${{ matrix.build.preset }}
--toolchain ${{ matrix.environment.toolchain }}
-D NEW_DYNAREC=${{ matrix.dynarec.new }}
-D CMAKE_INSTALL_PREFIX=./build/artifacts
-D QT=${{ matrix.ui.qt }}
-D Qt5_ROOT=$(brew --prefix qt@5)
-D Qt5LinguistTools_ROOT=$(brew --prefix qt@5)
@@ -133,4 +148,4 @@ jobs:
with:
# Consult https://docs.sonarsource.com/sonarqube-server/latest/analyzing-source-code/scanners/sonarscanner/ for more information and options
args: >
--define sonar.cfamily.compile-commands="${{ env.BUILD_WRAPPER_OUT_DIR }}/compile_commands.json"
--define sonar.cfamily.compile-commands=build/compile_commands.json

16
.github/workflows/codeql_windows_msys2.yml vendored
View File

@@ -1,4 +1,4 @@
name: CodeQL Analysis (Windows, msys2)
name: CodeQL Analysis (Windows)
on:
@@ -31,9 +31,9 @@ on:
jobs:
analyze-msys2:
analyze-windows:
name: "Analyze (${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, ${{ matrix.environment.msystem }})"
name: "${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, ${{ matrix.environment.msystem }}"
runs-on: ${{ matrix.environment.runner }}
@@ -70,14 +70,15 @@ jobs:
new: on
slug: -NDR
ui:
- name: Qt GUI
- name: Qt 5 GUI
qt: on
slug: -Qt5
static: off
slug: -Qt
packages: >-
qt5-base:p
qt5-tools:p
vulkan-headers:p
# qt5-static:p
environment:
# - msystem: MSYS
# toolchain: ./cmake/flags-gcc-x86_64.cmake
@@ -147,10 +148,9 @@ jobs:
- name: Configure CMake
run: >-
cmake -G Ninja -S . -B build --preset ${{ matrix.build.preset }}
cmake -S . -B build --preset ${{ matrix.build.preset }}
--toolchain ${{ matrix.environment.toolchain }}
-D NEW_DYNAREC=${{ matrix.dynarec.new }}
-D CMAKE_INSTALL_PREFIX=./build/artifacts
-D QT=${{ matrix.ui.qt }}
-D STATIC_BUILD=${{ matrix.ui.static }}
@@ -177,4 +177,4 @@ jobs:
with:
# Consult https://docs.sonarsource.com/sonarqube-server/latest/analyzing-source-code/scanners/sonarscanner/ for more information and options
args: >
--define sonar.cfamily.compile-commands="${{ env.BUILD_WRAPPER_OUT_DIR }}/compile_commands.json"
--define sonar.cfamily.compile-commands=build/compile_commands.json

1
CMakeLists.txt
View File

@@ -185,6 +185,7 @@ cmake_dependent_option(SIO_DETECT "Super I/O Detection Helper"
cmake_dependent_option(WACOM "Wacom Input Devices" ON "DEV_BRANCH" OFF)
cmake_dependent_option(XL24 "ATI VGA Wonder XL24 (ATI-28800-6)" ON "DEV_BRANCH" OFF)
cmake_dependent_option(NETSWITCH "Network Switch Support" ON "DEV_BRANCH" OFF)
cmake_dependent_option(VFIO "Virtual Function I/O" ON "DEV_BRANCH" OFF)
# Ditto but for Qt
if(QT)

8
sonar-project.properties
View File

@@ -1,12 +1,16 @@
sonar.projectKey=86Box_86Box
sonar.organization=86box
# This is the name and version displayed in the SonarCloud UI.
#sonar.projectName=86Box
sonar.projectName=86Box
#sonar.projectVersion=1.0
# Path is relative to the sonar-project.properties file. Replace "\" by "/" on Windows.
# Path is relative to the sonar-project.properties file. Defaults to .
#sonar.sources=.
# Encoding of the source code. Default is default system encoding
#sonar.sourceEncoding=UTF-8
sonar.cfamily.compile-commands=build/compile_commands.json

6
src/86box.c
View File

@@ -107,6 +107,7 @@
#include <86box/apm.h>
#include <86box/acpi.h>
#include <86box/nv/vid_nv_rivatimer.h>
#include <86box/vfio.h>
// Disable c99-designator to avoid the warnings about int ng
#ifdef __clang__
@@ -1647,6 +1648,11 @@ pc_reset_hard_init(void)
the chances of the SCSI controller ending up on the bridge. */
video_voodoo_init();
#if defined(USE_VFIO) && defined(__linux__)
/* Initialize VFIO */
vfio_init();
#endif
/* installs first game port if no device provides one, must be late */
if (joystick_type[0])
gameport_update_joystick_type(0);

10
src/CMakeLists.txt
View File

@@ -103,6 +103,16 @@ if(VNC)
endif()
endif()
if(CMAKE_SYSTEM_NAME MATCHES "Linux")
if(VFIO)
include(CheckIncludeFile)
check_include_file("linux/vfio.h" VFIO_AVAILABLE)
if(VFIO_AVAILABLE)
add_compile_definitions(USE_VFIO)
endif()
endif()
endif()
if(INSTRUMENT)
add_compile_definitions(USE_INSTRUMENT)
endif()

16
src/acpi.c
View File

@@ -8,8 +8,6 @@
*
* ACPI emulation.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2020 Miran Grca.
@@ -1222,7 +1220,7 @@ acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *priv)
/* GPOREG - General Purpose Output Register (IO) */
if (size == 1) {
dev->regs.gporeg[addr & 3] = val;
if ((addr == 0x34) && !strcmp(machine_get_internal_name(), "cubx"))
if ((addr == 0x34) && (machines[machine].init == machine_at_cubx_init))
hdc_onboard_enabled = (val & 0x01);
}
break;
@@ -1749,7 +1747,7 @@ acpi_reg_write_sis_5595(int size, uint16_t addr, uint8_t val, void *priv)
break;
case 0x1c:
dev->regs.gpe_pin = ((dev->regs.gpe_pin & ~(0xff << shift32)) | ((val & 0xff) << shift32));
if (!strcmp(machine_get_internal_name(), "m747") && (val & 0x10) &&
if ((machines[machine].init == machine_at_m747_init) && (val & 0x10) &&
!(dev->regs.gpe_io & 0x00000010))
resetx86();
break;
@@ -2365,7 +2363,7 @@ acpi_reset(void *priv)
/* PC Chips M773:
- Bit 3: 80-conductor cable on unknown IDE channel (active low)
- Bit 1: 80-conductor cable on unknown IDE channel (active low) */
dev->regs.gpireg[0] = !strcmp(machine_get_internal_name(), "m773") ? 0xf5 : 0xff;
dev->regs.gpireg[0] = (machines[machine].init == machine_at_m773_init) ? 0xf5 : 0xff;
dev->regs.gpireg[1] = 0xff;
/* A-Trend ATC7020BXII:
- Bit 3: 80-conductor cable on secondary IDE channel (active low)
@@ -2399,9 +2397,9 @@ acpi_reset(void *priv)
- Bit 19: password cleared (active low).
*/
dev->regs.gpi_val = 0xfff57fc1;
if (!strcmp(machine_get_internal_name(), "ficva503a") || !strcmp(machine_get_internal_name(), "6via90ap"))
if ((machines[machine].init == machine_at_ficva503a_init) || (machines[machine].init == machine_at_6via90ap_init))
dev->regs.gpi_val |= 0x00000004;
else if (!strcmp(machine_get_internal_name(), "ficka6130"))
else if ((machines[machine].init == machine_at_ficka6130_init))
dev->regs.gpi_val |= 0x00080000;
/*
TriGem Delhi-III second GPI word:
@@ -2409,7 +2407,7 @@ acpi_reset(void *priv)
- Bit 6 = Password jumper (must be set);
- Bit 5 = Enable Setup (must be set).
*/
else if (!strcmp(machine_get_internal_name(), "delhi3"))
else if (machines[machine].init == machine_at_delhi3_init)
dev->regs.gpi_val |= 0x00008000;
}
@@ -2420,7 +2418,7 @@ acpi_reset(void *priv)
}
/* The Gateway Tomahawk requires the LID polarity bit to be set. */
if (!strcmp(machine_get_internal_name(), "tomahawk"))
if (machines[machine].init == machine_at_tomahawk_init)
dev->regs.glbctl |= 0x02000000;
acpi_rtc_status = 0;

2
src/apm.c
View File

@@ -8,8 +8,6 @@
*
* Advanced Power Management emulation.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2019 Miran Grca.

2
src/arch_detect.c
View File

@@ -8,8 +8,6 @@
*
* Configure-time architecture detection for the CMake build.
*
*
*
* Authors: David Hrdlička, <hrdlickadavid@outlook.com>
*
* Copyright 2020-2021 David Hrdlička.

2
src/cdrom/cdrom.c
View File

@@ -8,8 +8,6 @@
*
* Generic CD-ROM drive core.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2018-2021 Miran Grca.

14
src/cdrom/cdrom_image_viso.c
View File

@@ -880,7 +880,7 @@ viso_init(const uint8_t id, const char *dirname, int *error)
if (dirp) { /* create empty directory if opendir failed */
while ((readdir_entry = readdir(dirp))) {
/* Ignore . and .. pseudo-directories. */
if ((readdir_entry->d_name[0] == '.') && ((readdir_entry->d_name[1] == '\0') || (*((uint16_t *) &readdir_entry->d_name[1]) == '.')))
if ((readdir_entry->d_name[0] == '.') && ((readdir_entry->d_name[1] == '\0') || (AS_U16(readdir_entry->d_name[1]) == '.')))
continue;
children_count++;
}
@@ -927,7 +927,7 @@ viso_init(const uint8_t id, const char *dirname, int *error)
/* Ignore . and .. pseudo-directories. */
if ((readdir_entry->d_name[0] == '.') &&
((readdir_entry->d_name[1] == '\0') ||
(*((uint16_t *) &readdir_entry->d_name[1]) == '.')))
(AS_U16(readdir_entry->d_name[1]) == '.')))
continue;
/* Add and fill entry. */
@@ -1245,8 +1245,8 @@ next_dir:
/* Calculate checksum. */
uint16_t eltorito_checksum = 0;
for (int i = 0; i < (p - data); i += 2)
eltorito_checksum -= le16_to_cpu(*((uint16_t *) &data[i]));
*((uint16_t *) &data[28]) = cpu_to_le16(eltorito_checksum);
eltorito_checksum -= le16_to_cpu(AS_U16(data[i]));
AS_U16(data[28]) = cpu_to_le16(eltorito_checksum);
/* Now fill the default boot entry. */
*p++ = 0x88; /* bootable flag */
@@ -1552,11 +1552,11 @@ next_entry:
uint32_t boot_size = entry->stats.st_size;
if (boot_size % 512) /* round up */
boot_size += 512 - (boot_size % 512);
*((uint16_t *) &data[0]) = cpu_to_le16(boot_size / 512);
AS_U16(data[0]) = cpu_to_le16(boot_size / 512);
} else { /* emulation */
*((uint16_t *) &data[0]) = cpu_to_le16(1);
AS_U16(data[0]) = cpu_to_le16(1);
}
*((uint32_t *) &data[2]) = cpu_to_le32(viso->all_sectors * base_factor);
AS_U32(data[2]) = cpu_to_le32(viso->all_sectors * base_factor);
viso_pwrite(data, eltorito_offset, 6, 1, viso->tf.fp);
} else {
p = data;

2
src/chipset/82c100.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of Chips&Technology's 82C100 chipset.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2021 Miran Grca.

2
src/chipset/acc2168.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the ACC 2046/2168 chipset
*
*
*
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
* Tiseno100
*

2
src/chipset/ali1409.c
View File

@@ -11,8 +11,6 @@
* Note: This chipset has no datasheet, everything were done via
* reverse engineering.
*
*
*
* Authors: Jose Phillips, <jose@latinol.com>
* Sarah Walker, <https://pcem-emulator.co.uk/>
*

2
src/chipset/ali1429.c
View File

@@ -11,8 +11,6 @@
* Note: This chipset has no datasheet, everything were done via
* reverse engineering the BIOS of various machines using it.
*
*
*
* Authors: Tiseno100,
* Miran Grca, <mgrca8@gmail.com>
*

2
src/chipset/ali1435.c
View File

@@ -7,8 +7,6 @@
* Emulation of ALi M1435 chipset that acts as both the
* southbridge.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2020 Miran Grca.

2
src/chipset/ali1489.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the ALi M1489 chipset.
*
*
*
* Authors: Tiseno100,
* Miran Grca, <mgrca8@gmail.com>
*

2
src/chipset/ali1531.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the ALi M1531B CPU-to-PCI Bridge.
*
*
*
* Authors: Tiseno100,
*
* Copyright 2021 Tiseno100.

2
src/chipset/ali1541.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the ALi M1541/2 CPU-to-PCI Bridge.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2021 Miran Grca.

2
src/chipset/ali1543.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the ALi M1543 Desktop South Bridge.
*
*
*
* Authors: Tiseno100,
*
* Copyright 2021 Tiseno100.

2
src/chipset/ali1621.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the ALi M1621/2 CPU-to-PCI Bridge.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2021 Miran Grca.

2
src/chipset/ali6117.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the ALi M6117 SoC.
*
*
*
* Authors: RichardG, <richardg867@gmail.com>
*
* Copyright 2020 RichardG.

2
src/chipset/contaq_82c59x.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the Contaq/Cypress 82C596(A) and 597 chipsets.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2021 Miran Grca.

2
src/chipset/cs4031.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the Chips & Technologies CS4031 chipset.
*
*
*
* Authors: Tiseno100
*
* Copyright 2021 Tiseno100

2
src/chipset/cs8220.c
View File

@@ -160,7 +160,7 @@ cs8220_init(UNUSED(const device_t *info))
/*
Dell System 200: 640 kB soldered on-board, any other RAM is expansion.
*/
if (!strcmp(machine_get_internal_name(), "dells200")) switch (mem_size) {
if ((machines[machine].init == machine_at_dells200_init)) switch (mem_size) {
default:
dev->ram_banks[2].virt = 0x00100000;
dev->ram_banks[2].phys = 0x000a0000;

2
src/chipset/cs8230.c
View File

@@ -8,8 +8,6 @@
*
* Emulation of C&T CS8230 ("386/AT") chipset.
*
*
*
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
*
* Copyright 2020 Sarah Walker.

2
src/chipset/et6000.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the ETEQ Cheetah ET6000 chipset.
*
*
*
* Authors: Tiseno100
*
* Copyright 2021 Tiseno100

2
src/chipset/gc100.c
View File

@@ -12,8 +12,6 @@
* GC100 chipset, the GC100A chipset has been reverese-engineered.
* Thus, its behavior may not be fully accurate.
*
*
*
* Authors: EngiNerd, <webmaster.crrc@yahoo.it>
*
* Copyright 2020-2021 EngiNerd.

1
src/chipset/grid1520.c
View File

@@ -9,6 +9,7 @@
* Implementation of the GRiD GRiDcase 1520
*
* The GRiDcase 1520 is a 286-based portable.
*
* These are HDDs supported by GRiD1520 (and probably other 15XX) BIOS
* "CP3022",5
* "CP3024",5, 615,4,17 BIOS table type 2

2
src/chipset/headland.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the HEADLAND AT286 chipset.
*
*
*
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
* Fred N. van Kempen, <decwiz@yahoo.com>
* Original by GreatPsycho for PCem.

2
src/chipset/ims8848.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the IMS 8848/8849 chipset.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
* Tiseno100,
*

2
src/chipset/intel_420ex.c
View File

@@ -9,8 +9,6 @@
* Emulation of Intel 82420EX chipset that acts as both the
* northbridge and the southbridge.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2020 Miran Grca.

4
src/chipset/intel_4x0.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the Intel PCISet chips from 420TX to 440GX.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2019-2020 Miran Grca.
@@ -1549,7 +1547,7 @@ i4x0_read(int func, int addr, void *priv)
with the addition of bits 3 and 0. */
if ((func == 0) && (addr == 0x93) && ((dev->type == INTEL_440FX) || (dev->type == INTEL_440LX) || (dev->type == INTEL_440EX)))
ret = (ret & 0xf9) | (pci_read(0x0cf9, NULL) & 0x06);
else if ((func == 0) && (addr == 0x52) && (dev->type == INTEL_430TX) && !strcmp(machine_get_internal_name(), "tomahawk"))
else if ((func == 0) && (addr == 0x52) && (dev->type == INTEL_430TX) && (machines[machine].init == machine_at_tomahawk_init))
ret = 0xb2;
}

2
src/chipset/intel_82335.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the Intel 82335(KU82335) chipset.
*
*
*
* Authors: Tiseno100
*
* Copyright 2021 Tiseno100.

4
src/chipset/intel_piix.c
View File

@@ -11,8 +11,6 @@
* word 0 - base address
* word 1 - bits 1-15 = byte count, bit 31 = end of transfer
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2020 Miran Grca.
@@ -1595,7 +1593,7 @@ piix_init(const device_t *info)
- Bit 4: CMOS clear jumper, must be clear;
- Bit 0: Password switch, must be clear.
*/
if (!strcmp(machine_get_internal_name(), "richmond"))
if (machines[machine].init == machine_at_richmond_init)
acpi_set_gpireg2_default(dev->acpi, 0xee);
else
acpi_set_gpireg2_default(dev->acpi, (dev->type > 4) ? 0xf1 : 0xdd);

4
src/chipset/intel_sio.c
View File

@@ -6,8 +6,6 @@
*
* Emulation of Intel System I/O PCI chip.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2018 Miran Grca.
@@ -368,7 +366,7 @@ sio_config_read(uint16_t port, UNUSED(void *priv))
- 1, 0 = M;
- 1, 1 = M.
*/
if (!strcmp(machine_get_internal_name(), "opti560l"))
if (machines[machine].init == machine_at_opti560l_init)
ret = 0x20;
else
ret = 0xd3;

2
src/chipset/neat.c
View File

@@ -13,8 +13,6 @@
* 8MB of DRAM chips', because it works fine with bus-based
* memory expansion.
*
*
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
*
* Copyright 2018 Fred N. van Kempen.

2
src/chipset/olivetti_eva.c
View File

@@ -11,8 +11,6 @@
* Note: This chipset has no datasheet, everything were done via
* reverse engineering the BIOS of various machines using it.
*
*
*
* Authors: EngiNerd <webmaster.crrc@yahoo.it>
*
* Copyright 2020-2021 EngiNerd

2
src/chipset/opti283.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the OPTi 82C283 chipset.
*
*
*
* Authors: Tiseno100,
* Miran Grca, <mgrca8@gmail.com>
*

2
src/chipset/opti291.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the OPTi 82C291 chipset.
*
*
*
* Authors: plant/nerd73, Tiseno100
*
* Copyright 2020 plant/nerd73.

2
src/chipset/opti391.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the OPTi 82C391/392 chipset.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2021 Miran Grca.

2
src/chipset/opti499.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the OPTi 82C493/82C499 chipset.
*
*
*
* Authors: Tiseno100,
* Miran Grca, <mgrca8@gmail.com>
*

2
src/chipset/opti822.c
View File

@@ -9,8 +9,6 @@
* Implementation of the OPTi 82C822 VESA Local Bus to PCI
* Bridge Interface.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2022 Miran Grca.

2
src/chipset/opti895.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the OPTi 82C802G/82C895 chipset.
*
*
*
* Authors: Tiseno100,
* Miran Grca, <mgrca8@gmail.com>
*

2
src/chipset/scamp.c
View File

@@ -13,8 +13,6 @@
* 8MB of DRAM chips', because it works fine with bus-based
* memory expansion.
*
*
*
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
*
* Copyright 2020 Sarah Walker.

2
src/chipset/scat.c
View File

@@ -10,8 +10,6 @@
*
* Re-worked version based on the 82C235 datasheet and errata.
*
*
*
* Authors: Original by GreatPsycho for PCem.
* Fred N. van Kempen, <decwiz@yahoo.com>
*

2
src/chipset/sis_5571_old.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the SiS 5571 Chipset.
*
*
*
* Authors: Tiseno100,
*
* Copyright 2021 Tiseno100.

2
src/chipset/sis_85c496.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the SiS 85c496/85c497 chip.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2019-2020 Miran Grca.

6
src/chipset/sis_85c4xx.c
View File

@@ -9,8 +9,6 @@
* Emulation of the SiS 85c401/85c402, 85c460, 85c461, and
* 85c407/85c471 chipsets.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2019-2020 Miran Grca.
@@ -766,7 +764,7 @@ sis_85c4xx_reset(void *priv)
if (dev->is_471) {
dev->regs[0x09] = 0x40;
if (!strcmp(machine_get_internal_name(), "vli486sv2g")) {
if (machines[machine].init == machine_at_vli486sv2g_init) {
if (mem_size_mb == 64)
dev->regs[0x09] |= 0x1f;
else
@@ -784,7 +782,7 @@ sis_85c4xx_reset(void *priv)
dev->regs[0x09] |= 0x34;
else
dev->regs[0x09] |= 0x35;
} else if (!strcmp(machine_get_internal_name(), "tg486g"))
} else if (machines[machine].init == machine_at_tg486g_init)
dev->regs[0x09] |= ram_tg486g[mem_size_mb];
else
dev->regs[0x09] |= ram_471[mem_size_mb];

2
src/chipset/stpc.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the STMicroelectronics STPC series of SoCs.
*
*
*
* Authors: RichardG, <richardg867@gmail.com>
*
* Copyright 2020 RichardG.

2
src/chipset/umc_8886.c
View File

@@ -11,8 +11,6 @@
* Note: This chipset has no datasheet, everything were done via
* reverse engineering the BIOS of various machines using it.
*
*
*
* Authors: Tiseno100,
* Miran Grca, <mgrca8@gmail.com>
*

2
src/chipset/via_apollo.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the VIA Apollo series of chips.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
* RichardG, <richardg867@gmail.com>
* Tiseno100,

2
src/chipset/via_pipc.c
View File

@@ -8,8 +8,6 @@
*
* Emulation of the VIA PIPC southbridges.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
* RichardG, <richardg867@gmail.com>
*

2
src/chipset/via_vt82c49x.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the VIA VT82C49X chipset.
*
*
*
* Authors: Tiseno100,
* Miran Grca, <mgrca8@gmail.com>
*

2
src/chipset/via_vt82c505.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the VIA VT82C505 VL/PCI Bridge Controller.
*
*
*
* Authors: Tiseno100,
* Miran Grca, <mgrca8@gmail.com>
*

16
src/chipset/vl82c480.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the VLSI VL82c480 chipset.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2020 Miran Grca.
@@ -30,6 +28,8 @@
#include <86box/port_92.h>
#include <86box/chipset.h>
#define machine_at_prolineamt_init NULL /* checks for a removed machine */
typedef struct vl82c480_t {
uint8_t idx;
uint8_t regs[256];
@@ -132,8 +132,8 @@ vl82c480_write(uint16_t addr, uint8_t val, void *priv)
break;
case 0x02: case 0x03:
dev->regs[dev->idx] = val;
if (!strcmp(machine_get_internal_name(), "martin") ||
!strcmp(machine_get_internal_name(), "prolineamt"))
if ((machines[machine].init == machine_at_martin_init) ||
(machines[machine].init == machine_at_prolineamt_init))
vl82c480_recalc_banks(dev);
break;
case 0x04:
@@ -220,9 +220,9 @@ vl82c480_init(const device_t *info)
vl82c480_t *dev = (vl82c480_t *) calloc(1, sizeof(vl82c480_t));
uint32_t sizes[8] = { 0, 0, 1024, 2048, 4096, 8192, 16384, 32768 };
uint32_t ms = mem_size;
uint8_t min_i = !strcmp(machine_get_internal_name(), "prolineamt") ? 1 : 0;
uint8_t min_j = !strcmp(machine_get_internal_name(), "prolineamt") ? 4 : 2;
uint8_t max_j = !strcmp(machine_get_internal_name(), "prolineamt") ? 8 : 7;
uint8_t min_i = (machines[machine].init == machine_at_prolineamt_init) ? 1 : 0;
uint8_t min_j = (machines[machine].init == machine_at_prolineamt_init) ? 4 : 2;
uint8_t max_j = (machines[machine].init == machine_at_prolineamt_init) ? 8 : 7;
dev->regs[0x00] = info->local;
dev->regs[0x01] = 0xff;
@@ -233,7 +233,7 @@ vl82c480_init(const device_t *info)
dev->regs[0x07] = 0x21;
dev->regs[0x08] = 0x38;
if (!strcmp(machine_get_internal_name(), "prolineamt")) {
if (machines[machine].init == machine_at_prolineamt_init) {
dev->banks[0] = 4096;
/* Bank 0 is ignored if 64 MB is installed. */

1
src/chipset/wd76c10.c
View File

@@ -11,7 +11,6 @@
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2024 Miran Grca.
*
*/
#include <stdarg.h>
#include <stdint.h>

2
src/config.c
View File

@@ -573,7 +573,7 @@ load_input_devices(void)
p = ini_section_get_string(cat, "keyboard_type", NULL);
if (p != NULL)
keyboard_type = keyboard_get_from_internal_name(p);
else if (strstr(machine_get_internal_name(), "pc5086"))
else if (machines[machine].init == machine_xt_pc5086_init)
keyboard_type = KEYBOARD_TYPE_PC_XT;
else if (machine_has_bus(machine, MACHINE_BUS_PS2_PORTS)) {
if (machine_has_flags(machine, MACHINE_KEYBOARD_JIS))

2
src/cpu/386_common.h
View File

@@ -542,7 +542,7 @@ fastreadl_fetch(uint32_t a)
# if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)
return *((uint32_t *) (((uintptr_t) &pccache2[a] & 0x00000000ffffffffULL) | ((uintptr_t) &pccache2[0] & 0xffffffff00000000ULL)));
# else
return *((uint32_t *) &pccache2[a]);
return AS_U32(pccache2[a]);
# endif
}
val = fastreadw_fetch(a);

6
src/cpu/cpu.c
View File

@@ -386,11 +386,7 @@ cpu_is_eligible(const cpu_family_t *cpu_family, int cpu, int machine)
return 1;
/* Cyrix 6x86MX on the NuPRO 592. */
if (((cpu_s->cyrix_id & 0xff00) == 0x0400) && (strstr(machine_s->internal_name, "nupro") != NULL))
return 0;
/* Cyrix 6x86MX or MII on the P5MMS98. */
if ((cpu_s->cpu_type == CPU_Cx6x86MX) && (strstr(machine_s->internal_name, "p5mms98") != NULL))
if (((cpu_s->cyrix_id & 0xff00) == 0x0400) && (machine_s->init == machine_at_nupro592_init))
return 0;
/* Check CPU blocklist. */

2
src/ddma.c
View File

@@ -8,8 +8,6 @@
*
* Distributed DMA emulation.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2020 Miran Grca.

2
src/device.c
View File

@@ -9,8 +9,6 @@
* Implementation of the generic device interface to handle
* all devices attached to the emulator.
*
*
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Miran Grca, <mgrca8@gmail.com>
* Sarah Walker, <https://pcem-emulator.co.uk/>

11
src/device/CMakeLists.txt
View File

@@ -81,6 +81,17 @@ if(ISAMEM_BRAT)
target_compile_definitions(dev PRIVATE USE_ISAMEM_BRAT)
endif()
if(CMAKE_SYSTEM_NAME MATCHES "Linux")
if(VFIO)
include(CheckIncludeFile)
check_include_file("linux/vfio.h" VFIO_AVAILABLE)
if(VFIO_AVAILABLE)
add_compile_definitions(USE_VFIO)
target_sources(dev PRIVATE vfio.c)
endif()
endif()
endif()
if(LASERXT)
target_compile_definitions(dev PRIVATE USE_LASERXT)
endif()

3
src/device/bugger.c
View File

@@ -44,9 +44,8 @@
* configuration register (CTRL_SPCFG bit set) but have to
* remember that stuff first...
*
*
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
*
* Copyright 1989-2018 Fred N. van Kempen.
*/
#include <stdarg.h>

2
src/device/cartridge.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the PCjr cartridge emulation.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2021 Miran Grca.

2
src/device/clock_ics9xxx.c
View File

@@ -8,8 +8,6 @@
*
* Emulation of the ICS9xxx series of clock generators.
*
*
*
* Authors: RichardG, <richardg867@gmail.com>
*
* Copyright 2020 RichardG.

2
src/device/hasp.c
View File

@@ -12,8 +12,6 @@
* emulation is enough to satisfy that game, but not Aladdin's
* DiagnostiX utility.
*
*
*
* Authors: RichardG, <richardg867@gmail.com>
* Peter Ferrie
*

3
src/device/hwm.c
View File

@@ -8,13 +8,10 @@
*
* Common functions for hardware monitoring chips.
*
*
*
* Authors: RichardG, <richardg867@gmail.com>
*
* Copyright 2020 RichardG.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>

2
src/device/hwm_gl518sm.c
View File

@@ -8,8 +8,6 @@
*
* Emulation of the Genesys Logic GL518SM hardware monitoring chip.
*
*
*
* Authors: RichardG, <richardg867@gmail.com>
*
* Copyright 2020 RichardG.

2
src/device/hwm_lm75.c
View File

@@ -8,8 +8,6 @@
*
* Emulation of the National Semiconductor LM75 temperature sensor chip.
*
*
*
* Authors: RichardG, <richardg867@gmail.com>
*
* Copyright 2020 RichardG.

2
src/device/hwm_lm78.c
View File

@@ -8,8 +8,6 @@
*
* Emulation of the National Semiconductor LM78 hardware monitoring chip.
*
*
*
* Authors: RichardG, <richardg867@gmail.com>
*
* Copyright 2020 RichardG.

2
src/device/hwm_vt82c686.c
View File

@@ -8,8 +8,6 @@
*
* Emulation of the VIA VT82C686A/B integrated hardware monitor.
*
*
*
* Authors: RichardG, <richardg867@gmail.com>
*
* Copyright 2020 RichardG.

2
src/device/i2c.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the I2C bus and its operations.
*
*
*
* Authors: RichardG, <richardg867@gmail.com>
*
* Copyright 2020 RichardG.

2
src/device/i2c_gpio.c
View File

@@ -8,8 +8,6 @@
*
* Emulation of a GPIO-based I2C host controller.
*
*
*
* Authors: RichardG, <richardg867@gmail.com>
*
* Copyright 2020 RichardG.

2
src/device/ibm_5161.c
View File

@@ -6,8 +6,6 @@
*
* Emulation of the IBM Expansion Unit (5161).
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2016-2018 Miran Grca.

50
src/device/isapnp.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of ISA Plug and Play.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
* RichardG, <richardg867@gmail.com>
*
@@ -815,22 +813,22 @@ isapnp_update_card_rom(void *priv, uint8_t *rom, uint16_t rom_size)
isapnp_log("ISAPnP: >>%s Memory range %d with %d bytes at %06X-%06X to %06X-%06X, align %d",
/* %s */ in_df ? ">" : "",
/* %d */ mem_range,
/* %d */ *((uint16_t *) &card->rom[i + 8]),
/* %06X */ *((uint16_t *) &card->rom[i + 4]) << 8,
/* %d */ AS_U16(card->rom[i + 8]),
/* %06X */ AS_U16(card->rom[i + 4]) << 8,
/* %06X */ ((card->rom[i + 3] & 0x4) ?
/* High address. */
(*((uint16_t *) &card->rom[i + 10]) << 8) :
(AS_U16(card->rom[i + 10]) << 8) :
/* Range. */
(*((uint16_t *) &card->rom[i + 4]) << 8)) +
(*((uint16_t *) &card->rom[i + 10]) << 8),
/* %06X */ *((uint16_t *) &card->rom[i + 6]) << 8,
(AS_U16(card->rom[i + 4]) << 8)) +
(AS_U16(card->rom[i + 10]) << 8),
/* %06X */ AS_U16(card->rom[i + 6]) << 8,
/* %06X */ ((card->rom[i + 3] & 0x4) ?
/* High address. */
(*((uint16_t *) &card->rom[i + 10]) << 8) :
(AS_U16(card->rom[i + 10]) << 8) :
/* Range. */
(*((uint16_t *) &card->rom[i + 6]) << 8)) +
(*((uint16_t *) &card->rom[i + 10]) << 8),
/* %d */ *((uint16_t *) &card->rom[i + 8]));
(AS_U16(card->rom[i + 6]) << 8)) +
(AS_U16(card->rom[i + 10]) << 8),
/* %d */ AS_U16(card->rom[i + 8]));
res = 1 << mem_range;
mem_range++;
} else {
@@ -847,22 +845,22 @@ isapnp_update_card_rom(void *priv, uint8_t *rom, uint16_t rom_size)
isapnp_log("ISAPnP: >>%s 32-bit memory range %d with %d bytes at %08X-%08X, align %d",
/* %s */ in_df ? ">" : "",
/* %d */ mem_range_32,
/* %d */ *((uint32_t *) &card->rom[i + 12]),
/* %08X */ *((uint32_t *) &card->rom[i + 4]),
/* %d */ AS_U32(card->rom[i + 12]),
/* %08X */ AS_U32(card->rom[i + 4]),
/* %08X */ ((card->rom[i + 3] & 0x4) ?
/* High address. */
*((uint32_t *) &card->rom[i + 16]) :
AS_U32(card->rom[i + 16]) :
/* Range. */
*((uint32_t *) &card->rom[i + 4])) +
*((uint32_t *) &card->rom[i + 16]),
/* %08X */ *((uint32_t *) &card->rom[i + 8]),
AS_U32(card->rom[i + 4])) +
AS_U32(card->rom[i + 16]),
/* %08X */ AS_U32(card->rom[i + 8]),
/* %08X */ ((card->rom[i + 3] & 0x4) ?
/* High address. */
*((uint32_t *) &card->rom[i + 16]) :
AS_U32(card->rom[i + 16]) :
/* Range. */
*((uint32_t *) &card->rom[i + 8])) +
*((uint32_t *) &card->rom[i + 16]),
/* %d */ *((uint32_t *) &card->rom[i + 12]));
AS_U32(card->rom[i + 8])) +
AS_U32(card->rom[i + 16]),
/* %d */ AS_U32(card->rom[i + 12]));
res = 1 << (4 + mem_range_32);
mem_range_32++;
}
@@ -972,7 +970,7 @@ isapnp_update_card_rom(void *priv, uint8_t *rom, uint16_t rom_size)
else /* specific */
res = card->rom[i + 3] & 0x0f;
isapnp_log("ISAPnP: >>%s IRQ index %d with mask %04X, types %01X\n", in_df ? ">" : "", irq, *((uint16_t *) &card->rom[i + 1]), res);
isapnp_log("ISAPnP: >>%s IRQ index %d with mask %04X, types %01X\n", in_df ? ">" : "", irq, AS_U16(card->rom[i + 1]), res);
ld->irq_types &= ~(0x0f << (4 * irq));
ld->irq_types |= res << (4 * irq);
@@ -1038,7 +1036,7 @@ isapnp_update_card_rom(void *priv, uint8_t *rom, uint16_t rom_size)
break;
}
isapnp_log("ISAPnP: >>%s I/O range %d with %d ports at %04X-%04X, align %d, %d-bit decode\n", in_df ? ">" : "", io, card->rom[i + 7], *((uint16_t *) &card->rom[i + 2]), *((uint16_t *) &card->rom[i + 4]), card->rom[i + 6], (card->rom[i + 1] & 0x01) ? 16 : 10);
isapnp_log("ISAPnP: >>%s I/O range %d with %d ports at %04X-%04X, align %d, %d-bit decode\n", in_df ? ">" : "", io, card->rom[i + 7], AS_U16(card->rom[i + 2]), AS_U16(card->rom[i + 4]), card->rom[i + 6], (card->rom[i + 1] & 0x01) ? 16 : 10);
if (card->rom[i + 1] & 0x01)
ld->io_16bit |= 1 << io;
@@ -1063,7 +1061,7 @@ isapnp_update_card_rom(void *priv, uint8_t *rom, uint16_t rom_size)
break;
}
isapnp_log("ISAPnP: >>%s Fixed I/O range %d with %d ports at %04X\n", in_df ? ">" : "", io, card->rom[i + 3], *((uint16_t *) &card->rom[i + 1]));
isapnp_log("ISAPnP: >>%s Fixed I/O range %d with %d ports at %04X\n", in_df ? ">" : "", io, card->rom[i + 3], AS_U16(card->rom[i + 1]));
/* Fixed I/O port ranges of this kind are always 10-bit. */
ld->io_16bit &= ~(1 << io);
@@ -1117,6 +1115,8 @@ isapnp_enable_card(void *priv, uint8_t enable)
/* Enable or disable the card. */
if (!!enable ^ !!card->enable)
card->state = (enable == ISAPNP_CARD_FORCE_CONFIG) ? PNP_STATE_CONFIG : PNP_STATE_WAIT_FOR_KEY;
if (enable == ISAPNP_CARD_FORCE_SLEEP)
card->state = PNP_STATE_SLEEP;
int old_enable = card->enable;
card->enable = enable;

4
src/device/isartc.c
View File

@@ -26,8 +26,6 @@
* NOTE: The IRQ functionalities have been implemented, but not yet
* tested, as I need to write test software for them first :)
*
*
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
*
* Copyright 2018 Fred N. van Kempen.
@@ -523,7 +521,7 @@ isartc_init(const device_t *info)
{
rtcdev_t *dev;
int is_at = IS_AT(machine);
is_at = is_at || !strcmp(machine_get_internal_name(), "xi8088");
is_at = is_at || (machines[machine].init == machine_xt_xi8088_init);
/* Create a device instance. */
dev = (rtcdev_t *) calloc(1, sizeof(rtcdev_t));

12
src/device/kbc_at.c
View File

@@ -806,15 +806,15 @@ write_p2(atkbc_t *dev, uint8_t val)
cpu_set_edx();
flushmmucache();
if ((kbc_ven == KBC_VEN_ALI) ||
!strcmp(machine_get_internal_name(), "spc7700plw") ||
!strcmp(machine_get_internal_name(), "pl4600c"))
(machines[machine].init == machine_at_spc7700plw_init) ||
(machines[machine].init == machine_at_pl4600c_init))
smbase = 0x00030000;
/* Yes, this is a hack, but until someone gets ahold of the real PCD-2L
and can find out what they actually did to make it boot from FFFFF0
correctly despite A20 being gated when the CPU is reset, this will
have to do. */
if ((kbc_ven == KBC_VEN_SIEMENS) || !strcmp(machine_get_internal_name(), "acera1g"))
if ((kbc_ven == KBC_VEN_SIEMENS) || (machines[machine].init == machine_at_acera1g_init))
is486 ? loadcs(0xf000) : loadcs_2386(0xf000);
}
}
@@ -1187,7 +1187,7 @@ write_cmd_ami(void *priv, uint8_t val)
kbc_at_log("ATkbc: set KBC lines P22-P23 (P2 bits 2-3) low\n");
if (!(dev->flags & DEVICE_PCI))
write_p2(dev, dev->p2 & ~(4 << (val & 0x01)));
if (strstr(machine_get_internal_name(), "sb486pv") != NULL)
if (machines[machine].init == machine_at_sb486pv_init)
kbc_delay_to_ob(dev, 0x03, 0, 0x00);
else
kbc_delay_to_ob(dev, dev->ob, 0, 0x00);
@@ -2627,7 +2627,7 @@ kbc_at_process_cmd(void *priv)
if (dev->ib == 0xbb)
break;
if (strstr(machine_get_internal_name(), "pb41") != NULL)
if (machines[machine].init == machine_at_pb410a_init)
cpu_override_dynarec = 1;
if (dev->misc_flags & FLAG_PS2) {
@@ -2759,7 +2759,7 @@ kbc_at_port_1_read(uint16_t port, void *priv)
*/
if (!(dev->misc_flags & FLAG_PS2) && (dev->irq[0] != 0xffff))
picintclevel(1 << dev->irq[0], &dev->irq_state);
if ((strstr(machine_get_internal_name(), "pb41") != NULL) && (cpu_override_dynarec == 1))
if ((machines[machine].init == machine_at_pb410a_init) && (cpu_override_dynarec == 1))
cpu_override_dynarec = 0;
kbc_at_log("ATkbc: [%04X:%08X] read (%04X) = %02X\n", CS, cpu_state.pc, port, ret);

2
src/device/kbc_xt.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the XT-style keyboard.
*
*
*
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>

2
src/device/keyboard.c
View File

@@ -8,8 +8,6 @@
*
* General keyboard driver interface.
*
*
*
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>

2
src/device/keyboard_xt.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the XT-style keyboard.
*
*
*
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>

2
src/device/mouse.c
View File

@@ -11,8 +11,6 @@
* TODO: Add the Genius bus- and serial mouse.
* Remove the '3-button' flag from mouse types.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>
*

2
src/device/mouse_bus.c
View File

@@ -57,8 +57,6 @@
* Microsoft Windows NT 3.1
* Microsoft Windows 98 SE
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>
*

2
src/device/mouse_microtouch_touchscreen.c
View File

@@ -8,8 +8,6 @@
*
* 3M MicroTouch Serial emulation.
*
*
*
* Authors: Cacodemon345, mourix
*
* Copyright 2024 Cacodemon345

2
src/device/nec_mate_unk.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the NEC Mate NX MA30D/23D Unknown Readout.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2020-2023 Miran Grca.

2
src/device/novell_cardkey.c
View File

@@ -9,12 +9,10 @@
* Implementation of the Novell NetWare 2.x Key Card, which
* was used for anti-piracy protection.
*
*
* Authors: Cacodemon345
*
* Copyright 2024 Cacodemon345.
*/
#include <stdint.h>
#include <stdlib.h>
#include <stdio.h>

3
src/device/pci_bridge.c
View File

@@ -8,13 +8,10 @@
*
* Implementation of PCI-PCI and host-AGP bridges.
*
*
*
* Authors: RichardG, <richardg867@gmail.com>
*
* Copyright 2020 RichardG.
*/
#include <stdio.h>
#include <stdint.h>
#include <string.h>

2
src/device/phoenix_486_jumper.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of the Phoenix 486 Jumper Readout.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
* Tiseno100,
*

2
src/device/postcard.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of a port 80h POST diagnostic card.
*
*
*
* Authors: RichardG, <richardg867@gmail.com>
*
* Copyright 2020 RichardG.

2
src/device/serial.c
View File

@@ -10,8 +10,6 @@
*
* Now passes all the AMIDIAG tests.
*
*
*
* Authors: Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>
*

2
src/device/serial_passthrough.c
View File

@@ -8,14 +8,12 @@
*
* Implementation of Serial passthrough device.
*
*
* Authors: Andreas J. Reichel <webmaster@6th-dimension.com>,
* Jasmine Iwanek <jasmine@iwanek.co.uk>
*
* Copyright 2021 Andreas J. Reichel.
* Copyright 2021-2025 Jasmine Iwanek.
*/
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>

2
src/device/smbus_piix4.c
View File

@@ -8,8 +8,6 @@
*
* Implementation of a generic PIIX4-compatible SMBus host controller.
*
*
*
* Authors: RichardG, <richardg867@gmail.com>
*
* Copyright 2020 RichardG.

2
src/device/unittester.c
View File

@@ -11,8 +11,6 @@
* If modifying the protocol, you MUST modify the specification
* and increment the version number.
*
*
*
* Authors: GreaseMonkey, <thematrixeatsyou+86b@gmail.com>
*
* Copyright 2024 GreaseMonkey.

3377
src/device/vfio.c Normal file
View File

File diff suppressed because it is too large Load Diff

2
src/device/zenith_scratchpad.c
View File

@@ -9,8 +9,6 @@
* Emulation of various Zenith PC compatible machines.
* Currently only the Zenith Data Systems Supersport is emulated.
*
*
*
* Authors: Tux,
* Miran Grca, <mgrca8@gmail.com>
* TheCollector1995, <mariogplayer@gmail.com>

2
src/discord.c
View File

@@ -8,8 +8,6 @@
*
* Discord integration module.
*
*
*
* Authors: David Hrdlička, <hrdlickadavid@outlook.com>
*
* Copyright 2019 David Hrdlička.

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