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@@ -193,6 +193,7 @@ extern const device_config_t nv3_config[];
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#define NV3_PRMIO_END 0x7FFF
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#define NV3_PTIMER_START 0x9000 // Programmable Interval Timer
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#define NV3_PTIMER_INTR 0x9100
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#define NV3_PTIMER_INTR_ALARM 0 // Alarm interrupt
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#define NV3_PTIMER_INTR_EN 0x9140
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#define NV3_PTIMER_NUMERATOR 0x9200
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#define NV3_PTIMER_DENOMINATOR 0x9210
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@@ -301,6 +302,7 @@ extern const device_config_t nv3_config[];
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#define NV3_PGRAPH_INTR_1 0x400104
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#define NV3_PGRAPH_INTR_EN_0 0x400140 // Interrupt Control for PGRAPH #1
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#define NV3_PGRAPH_INTR_EN_0_VBLANK 8 // Fired every frame
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#define NV3_PGRAPH_INTR_EN_0_VBLANK_ENABLED 0x1 // Is the vblank interrupt enabled?
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//todo: add what this does
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#define NV3_PGRAPH_INTR_EN_1 0x400180 // Interrupt Control for PGRAPH #2 (it can receive two at onc)
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@@ -48,14 +48,28 @@ void nv3_ptimer_init()
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nv_log("Done!\n");
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}
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// Handles the PTIMER alarm interrupt
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void nv3_ptimer_interrupt(uint32_t num)
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{
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nv3->ptimer.interrupt_enable |= (1 << num);
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nv3_pmc_handle_interrupts(true);
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}
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// Ticks the timer.
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void nv3_ptimer_tick()
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{
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if (nv3->ptimer.time >= nv3->ptimer.alarm)
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{
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nv3_ptimer_interrupt(NV3_PTIMER_INTR_ALARM);
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}
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}
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uint32_t nv3_ptimer_read(uint32_t address)
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{
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// before doing anything, check the subsystem enablement
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// always enabled
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nv_register_t* reg = nv_get_register(address, ptimer_registers, sizeof(ptimer_registers)/sizeof(ptimer_registers[0]));
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// todo: friendly logging
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nv_log("NV3: PTIMER Read from 0x%08x", address);
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// if the register actually exists
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