actually initialise mappings

src/include/86box/nv/vid_nv4.h

@@ -91,7 +91,10 @@ extern nv4_t* nv4;                                                      // Alloc
 //
 
 // Device Core
-void        nv4_init();
+bool        nv4_init();
+
+void*       nv4_init_stb4400(const device_t* info);
+
 void        nv4_close(void* priv);
 void        nv4_speed_changed(void *priv);
 void        nv4_draw_cursor(svga_t* svga, int32_t drawline);
@@ -117,6 +120,8 @@ uint32_t    nv4_ramin_read32(uint32_t addr, void* priv);
 void        nv4_ramin_write8(uint32_t addr, uint8_t val, void* priv);
 void        nv4_ramin_write16(uint32_t addr, uint16_t val, void* priv);
 void        nv4_ramin_write32(uint32_t addr, uint32_t val, void* priv);
+uint8_t     nv4_pci_read(int32_t func, int32_t addr, void* priv);
+void        nv4_pci_write(int32_t func, int32_t addr, uint8_t val, void* priv);
 
 
 uint8_t     nv4_svga_read(uint16_t addr, void* priv);

src/video/CMakeLists.txt

@@ -201,6 +201,7 @@ add_library(vid OBJECT
     nv/nv4/nv4_core.c
     nv/nv4/nv4_core_io.c
     nv/nv4/nv4_core_config.c
+    nv/nv4/subsystems/nv4_ptimer.c
 
     # Generic
     vid_bochs_vbe.c

src/video/nv/nv3/nv3_core.c

@@ -138,10 +138,7 @@ uint32_t nv3_mmio_read32(uint32_t addr, void* priv)
         return ret; 
     }
 
-
     ret = nv3_mmio_arbitrate_read(addr);
-
-
     return ret; 
 
 }

src/video/nv/nv4/nv4_core.c

@@ -29,6 +29,9 @@
 
 nv4_t* nv4;
 
+// Stolen from Voodoo 3
+static video_timings_t timing_nv4_agp = { .type = VIDEO_AGP, .write_b = 2, .write_w = 2, .write_l = 1, .read_b = 20, .read_w = 20, .read_l = 21 };
+
 // Initialise the MMIO mappings
 void nv4_init_mappings_mmio(void)
 {
@@ -185,7 +188,7 @@ void nv4_update_mappings(void)
 }
 
 
-void nv4_init()
+bool nv4_init()
 {
     nv4 = calloc(1, sizeof(nv4_t));
  
@@ -200,13 +203,46 @@ void nv4_init()
     else
         nv4->nvbase.log = log_open_cyclic("NV4");
 
+    nv4->nvbase.bus_generation = nv_bus_agp_2x;
+
     nv_log_set_device(nv4->nvbase.log);
+    // Figure out which vbios the user selected
+    // This depends on the bus we are using and if the gpu is rev a/b or rev c
+
+    const char* vbios_file = NV4_VBIOS_STB_REVA;
+
+    int32_t err = rom_init(&nv4->nvbase.vbios, vbios_file, 0xC0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
+    
+    if (err)
+    {
+        nv_log("NV4 FATAL: failed to load VBIOS err=%d\n", err);
+        fatal("Nvidia NV4 init failed: Somehow selected a nonexistent VBIOS? err=%d\n", err);
+        return false;
+    }
+    else    
+        nv_log("Successfully loaded VBIOS located at %s\n", vbios_file);
+
+    pci_add_card(PCI_ADD_AGP, nv4_pci_read, nv4_pci_write, NULL, &nv4->nvbase.pci_slot);
+
+    svga_init(&nv4_device_agp, &nv4->nvbase.svga, nv4, nv4->nvbase.vram_amount, 
+            nv4_recalc_timings, nv4_svga_read, nv4_svga_write, nv4_draw_cursor, NULL);
+
+    video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_nv4_agp);
+
+    nv4_init_mappings();
+    //nv4_update_mappings();
+
+    return true; 
 }
 
 void* nv4_init_stb4400(const device_t *info)
 {
-    nv4_init();
-    return nv4;   
+    bool successful = nv4_init();
+
+    if (successful)
+        return nv4;
+    else
+        return NULL;
 }
 
 void nv4_close(void* priv)

src/video/nv/nv4/nv4_core_config.c

@@ -55,11 +55,7 @@ const device_config_t nv4_config[] =
     {
 
         .name = "pgraph_threads",
-#ifndef RELEASE_BUILD
-        .description = "PFIFO/PGRAPH - Number of threads to split large object method execution into",
-#else
         .description = "Render threads",
-#endif 
         .type = CONFIG_SELECTION,
         .default_int = 1, // todo: change later
         .selection = 

src/video/nv/nv4/subsystems/nv4_ptimer.c

@@ -52,7 +52,8 @@ void nv4_ptimer_interrupt(uint32_t num)
 {
     nv4->ptimer.interrupt_status |= (1 << num);
 
-    nv4_pmc_handle_interrupts(true);
+    //todo
+    //nv4_pmc_handle_interrupts(true);
 }
 
 // Ticks the timer.
@@ -128,14 +129,14 @@ uint32_t nv4_ptimer_read(uint32_t address)
                     break;
                 // 64-bit value
                 // High part
-                case NV4_PTIMER_TIME_0_NSEC:
+                case NV4_PTIMER_TIME_0:
                     ret = nv4->ptimer.time & 0xFFFFFFFF; //28:0
                     break;
                 // Low part
-                case NV4_PTIMER_TIME_1_NSEC:
+                case NV4_PTIMER_TIME_1:
                     ret = nv4->ptimer.time >> 32; // 31:5
                     break;
-                case NV4_PTIMER_ALARM_NSEC: 
+                case NV4_PTIMER_ALARM: 
                     ret = nv4->ptimer.alarm; // 31:5
                     break;
             }
@@ -186,7 +187,7 @@ void nv4_ptimer_write(uint32_t address, uint32_t value)
 
                 case NV4_PTIMER_INTR:
                     nv4->ptimer.interrupt_status &= ~value;
-                    nv4_pmc_clear_interrupts();
+                    //TODO nv4_pmc_clear_interrupts();
                     break;
 
                 // Interrupt enablement state
@@ -206,11 +207,11 @@ void nv4_ptimer_write(uint32_t address, uint32_t value)
                     break;
                 // 64-bit value
                 // High part
-                case NV4_PTIMER_TIME_0_NSEC:
+                case NV4_PTIMER_TIME_0:
                     nv4->ptimer.time |= (value) & 0xFFFFFFE0; //28:0
                     break;
                 // Low part
-                case NV4_PTIMER_TIME_1_NSEC:
+                case NV4_PTIMER_TIME_1:
                     nv4->ptimer.time |= ((uint64_t)(value & 0xFFFFFFE0) << 32); // 31:5
                     break;
                 case NV4_PTIMER_ALARM: