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Merge branch 'master' into nec-v20

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This commit is contained in:
Jasmine Iwanek
2022-07-19 20:00:03 -04:00
parent fcc0c3089a 6eadfbf5d3
commit 5f1e64fab7
71 changed files with 11900 additions and 1762 deletions
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2
.ci/Jenkinsfile vendored
View File

@@ -317,7 +317,7 @@ pipeline {
scmWebUrl: commitBrowser[buildBranch]
/* Notify IRC, which needs a node for whatever reason. */
node('citadel') {
node('citadel || rg || master') {
ircNotify()
}
} catch (e) {

106
src/chipset/ali6117.c
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@@ -41,12 +41,49 @@ typedef struct ali6117_t
uint32_t local;
/* Main registers (port 22h/23h) */
uint8_t unlocked;
uint8_t unlocked, mode;
uint8_t reg_offset;
uint8_t regs[256];
} ali6117_t;
/* Total size, Bank 0 size, Bank 1 size, Bank 2 size, Bank 3 size. */
static uint32_t ali6117_modes[32][5] = {
{ 1024, 512, 512, 0, 0 },
{ 2048, 512, 512, 512, 512 },
{ 3072, 512, 512, 2048, 0 },
{ 5120, 512, 512, 2048, 2048 },
{ 9216, 512, 512, 8192, 0 },
{ 1024, 1024, 0, 0, 0 },
{ 2048, 1024, 1024, 0, 0 },
{ 4096, 1024, 1024, 2048, 0 },
{ 6144, 1024, 1024, 2048, 2048 },
{ 10240, 1024, 1024, 8192, 0 },
{ 18432, 1024, 1024, 8192, 8192 },
{ 3072, 1024, 2048, 0, 0 },
{ 5120, 1024, 2048, 2048, 0 },
{ 9216, 1024, 8192, 0, 0 },
{ 2048, 2048, 0, 0, 0 },
{ 4096, 2048, 2048, 0, 0 },
{ 6144, 2048, 2048, 2048, 0 },
{ 8192, 2048, 2048, 2048, 2048 },
{ 12288, 2048, 2048, 8192, 0 },
{ 20480, 2048, 2048, 8192, 8192 },
{ 10240, 2048, 8192, 0, 0 },
{ 18432, 2048, 8192, 8192, 0 },
{ 26624, 2048, 8192, 8192, 8192 },
{ 4096, 4096, 0, 0, 0 },
{ 8192, 4096, 4096, 0, 0 },
{ 24576, 4096, 4096, 8192, 8192 },
{ 12288, 4096, 8192, 0, 0 },
{ 8192, 8192, 0, 0, 0 },
{ 16384, 8192, 8192, 0, 0 },
{ 24576, 8192, 8192, 8192, 0 },
{ 32768, 8192, 8192, 8192, 8192 },
{ 65536, 32768, 32768, 0, 0 }
};
#ifdef ENABLE_ALI6117_LOG
int ali6117_do_log = ENABLE_ALI6117_LOG;
@@ -113,6 +150,51 @@ ali6117_recalcmapping(ali6117_t *dev)
}
static void
ali6117_bank_recalc(ali6117_t *dev)
{
int i;
uint32_t bank, addr;
for (i = 0x00000000; i < (mem_size << 10); i += 4096) {
if ((i >= 0x000a0000) && (i < 0x00100000))
continue;
if (!is6117 && (i >= 0x00f00000) && (i < 0x01000000))
continue;
if (is6117 && (i >= 0x03f00000) && (i < 0x04000000))
continue;
switch (dev->regs[0x10] & 0xf8) {
case 0xe8:
bank = (i >> 12) & 3;
addr = (i & 0xfff) | ((i >> 14) << 12);
ali6117_log("E8 (%08X): Bank %i, address %08X vs. bank size %08X\n", i, bank, addr, ali6117_modes[dev->mode][bank + 1] * 1024);
if (addr < (ali6117_modes[dev->mode][bank + 1] * 1024))
mem_set_mem_state_both(i, 4096, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
else
mem_set_mem_state_both(i, 4096, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
break;
case 0xf8:
bank = (i >> 12) & 1;
addr = (i & 0xfff) | ((i >> 13) << 12);
ali6117_log("F8 (%08X): Bank %i, address %08X vs. bank size %08X\n", i, bank, addr, ali6117_modes[dev->mode][bank + 1] * 1024);
if (addr < (ali6117_modes[dev->mode][bank + 1] * 1024))
mem_set_mem_state_both(i, 4096, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
else
mem_set_mem_state_both(i, 4096, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
break;
default:
mem_set_mem_state_both(i, 4096, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
break;
}
}
flushmmucache();
}
static void
ali6117_reg_write(uint16_t addr, uint8_t val, void *priv)
{
@@ -135,6 +217,14 @@ ali6117_reg_write(uint16_t addr, uint8_t val, void *priv)
case 0x10:
refresh_at_enable = !(val & 0x02) || !!(dev->regs[0x20] & 0x80);
dev->regs[dev->reg_offset] = val;
if (val & 0x04)
mem_set_mem_state_both(0x00f00000, 0x00100000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
else
mem_set_mem_state_both(0x00f00000, 0x00100000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
ali6117_bank_recalc(dev);
break;
case 0x12:
@@ -326,6 +416,10 @@ ali6117_reset(void *priv)
cpu_set_isa_speed(7159091);
refresh_at_enable = 1;
/* On-board memory 15-16M is enabled by default. */
mem_set_mem_state_both(0x00f00000, 0x00100000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
ali6117_bank_recalc(dev);
}
@@ -357,6 +451,8 @@ ali6117_close(void *priv)
static void *
ali6117_init(const device_t *info)
{
int i, last_match = 0;
ali6117_log("ALI6117: init()\n");
ali6117_t *dev = (ali6117_t *) malloc(sizeof(ali6117_t));
@@ -367,6 +463,14 @@ ali6117_init(const device_t *info)
device_add(&ide_isa_device);
ali6117_setup(dev);
for (i = 31; i >= 0; i--) {
if ((mem_size >= ali6117_modes[i][0]) && (ali6117_modes[i][0] > last_match)) {
last_match = ali6117_modes[i][0];
dev->mode = i;
}
}
ali6117_reset(dev);
if (!(dev->local & 0x08))

23
src/config.c
View File

@@ -593,9 +593,9 @@ load_general(void)
mouse_sensitivity = config_get_double(cat, "mouse_sensitivity", 1.0);
if (mouse_sensitivity < 0.5)
mouse_sensitivity = 0.5;
mouse_sensitivity = 0.5;
else if (mouse_sensitivity > 2.0)
mouse_sensitivity = 2.0;
mouse_sensitivity = 2.0;
p = config_get_string(cat, "iconset", NULL);
if (p != NULL)
@@ -1376,6 +1376,18 @@ load_hard_disks(void)
if (hdd[c].tracks > max_tracks)
hdd[c].tracks = max_tracks;
sprintf(temp, "hdd_%02i_speed", c+1);
switch (hdd[c].bus) {
case HDD_BUS_IDE:
sprintf(tmp2, "1997_5400rpm");
break;
default:
sprintf(tmp2, "ramdisk");
break;
}
p = config_get_string(cat, temp, tmp2);
hdd[c].speed_preset = hdd_preset_get_from_internal_name(p);
/* MFM/RLL */
sprintf(temp, "hdd_%02i_mfm_channel", c+1);
if (hdd[c].bus == HDD_BUS_MFM)
@@ -2912,6 +2924,13 @@ save_hard_disks(void)
}
else
config_delete_var(cat, temp);
sprintf(temp, "hdd_%02i_speed", c+1);
if (!hdd_is_valid(c) || (hdd[c].bus != HDD_BUS_IDE))
config_delete_var(cat, temp);
else
config_set_string(cat, temp, hdd_preset_get_internal_name(hdd[c].speed_preset));
}
delete_section_if_empty(cat);

2
src/cpu/386_common.c
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@@ -1173,6 +1173,8 @@ enter_smm(int in_hlt)
if (unmask_a20_in_smm) {
old_rammask = rammask;
rammask = cpu_16bitbus ? 0xFFFFFF : 0xFFFFFFFF;
if (is6117)
rammask |= 0x3000000;
flushmmucache();
}

36
src/cpu/cpu.c
View File

@@ -115,7 +115,7 @@ int isa_cycles, cpu_inited,
cpu_cyrix_alignment, CPUID,
is186, is_nec,
is286, is386, is486 = 1,
is286, is386, is6117, is486 = 1,
cpu_isintel, cpu_iscyrix, hascache, isibm486, israpidcad, is_vpc,
is_am486, is_am486dxl, is_pentium, is_k5, is_k6, is_p6, is_cxsmm, hasfpu,
@@ -237,7 +237,7 @@ cpu_is_eligible(const cpu_family_t *cpu_family, int cpu, int machine)
return 1;
/* Add implicit CPU package compatibility. */
packages = machine_s->cpu_package;
packages = machine_s->cpu.package;
if (packages & CPU_PKG_SOCKET3)
packages |= CPU_PKG_SOCKET1;
else if (packages & CPU_PKG_SLOT1)
@@ -252,11 +252,11 @@ cpu_is_eligible(const cpu_family_t *cpu_family, int cpu, int machine)
return 1;
/* Check CPU blocklist. */
if (machine_s->cpu_block) {
if (machine_s->cpu.block) {
i = 0;
while (machine_s->cpu_block[i]) {
if (machine_s->cpu_block[i++] == cpu_s->cpu_type)
while (machine_s->cpu.block[i]) {
if (machine_s->cpu.block[i++] == cpu_s->cpu_type)
return 0;
}
}
@@ -264,19 +264,19 @@ cpu_is_eligible(const cpu_family_t *cpu_family, int cpu, int machine)
bus_speed = cpu_s->rspeed / cpu_s->multi;
/* Minimum bus speed with ~0.84 MHz (for 8086) tolerance. */
if (machine_s->cpu_min_bus && (bus_speed < (machine_s->cpu_min_bus - 840907)))
if (machine_s->cpu.min_bus && (bus_speed < (machine_s->cpu.min_bus - 840907)))
return 0;
/* Maximum bus speed with ~0.84 MHz (for 8086) tolerance. */
if (machine_s->cpu_max_bus && (bus_speed > (machine_s->cpu_max_bus + 840907)))
if (machine_s->cpu.max_bus && (bus_speed > (machine_s->cpu.max_bus + 840907)))
return 0;
/* Minimum voltage with 0.1V tolerance. */
if (machine_s->cpu_min_voltage && (cpu_s->voltage < (machine_s->cpu_min_voltage - 100)))
if (machine_s->cpu.min_voltage && (cpu_s->voltage < (machine_s->cpu.min_voltage - 100)))
return 0;
/* Maximum voltage with 0.1V tolerance. */
if (machine_s->cpu_max_voltage && (cpu_s->voltage > (machine_s->cpu_max_voltage + 100)))
if (machine_s->cpu.max_voltage && (cpu_s->voltage > (machine_s->cpu.max_voltage + 100)))
return 0;
/* Account for CPUs which use a different internal multiplier than specified by jumpers. */
@@ -286,7 +286,7 @@ cpu_is_eligible(const cpu_family_t *cpu_family, int cpu, int machine)
if (cpu_s->cpu_flags & CPU_FIXED_MULTIPLIER)
return 1;
else if (cpu_family->package & CPU_PKG_SOCKET5_7) {
if ((multi == 1.5) && (cpu_s->cpu_type == CPU_5K86) && (machine_s->cpu_min_multi > 1.5)) /* K5 5k86 */
if ((multi == 1.5) && (cpu_s->cpu_type == CPU_5K86) && (machine_s->cpu.min_multi > 1.5)) /* K5 5k86 */
multi = 2.0;
else if (multi == 1.75) /* K5 5k86 */
multi = 2.5;
@@ -297,7 +297,7 @@ cpu_is_eligible(const cpu_family_t *cpu_family, int cpu, int machine)
else if ((cpu_s->cpu_type == CPU_K6_2P) || (cpu_s->cpu_type == CPU_K6_3P))
multi = 2.5;
else if (((cpu_s->cpu_type == CPU_WINCHIP) || (cpu_s->cpu_type == CPU_WINCHIP2)) &&
(machine_s->cpu_min_multi > 2.0)) /* WinChip (2) */
(machine_s->cpu.min_multi > 2.0)) /* WinChip (2) */
multi = 2.5;
}
else if (multi == (7.0 / 3.0)) /* WinChip 2A - 2.33x */
@@ -313,27 +313,27 @@ cpu_is_eligible(const cpu_family_t *cpu_family, int cpu, int machine)
else if (multi == 4.0) {
/* WinChip (2) */
if ((cpu_s->cpu_type == CPU_WINCHIP) || (cpu_s->cpu_type == CPU_WINCHIP2)) {
if (machine_s->cpu_min_multi >= 1.5)
if (machine_s->cpu.min_multi >= 1.5)
multi = 1.5;
else if (machine_s->cpu_min_multi >= 3.5)
else if (machine_s->cpu.min_multi >= 3.5)
multi = 3.5;
else if (machine_s->cpu_min_multi >= 4.5)
else if (machine_s->cpu.min_multi >= 4.5)
multi = 4.5;
} else if ((cpu_s->cpu_type == CPU_Cx6x86) || (cpu_s->cpu_type == CPU_Cx6x86L)) /* 6x86(L) */
multi = 3.0;
} else if ((multi == 5.0) && ((cpu_s->cpu_type == CPU_WINCHIP) || (cpu_s->cpu_type == CPU_WINCHIP2)) &&
(machine_s->cpu_min_multi > 5.0)) /* WinChip (2) */
(machine_s->cpu.min_multi > 5.0)) /* WinChip (2) */
multi = 5.5;
else if (multi == 6.0) /* K6-2(+) / K6-3(+) */
multi = 2.0;
}
/* Minimum multiplier, */
if (multi < machine_s->cpu_min_multi)
if (multi < machine_s->cpu.min_multi)
return 0;
/* Maximum multiplier. */
if (machine_s->cpu_max_multi && (multi > machine_s->cpu_max_multi))
if (machine_s->cpu.max_multi && (multi > machine_s->cpu.max_multi))
return 0;
return 1;
@@ -385,6 +385,8 @@ cpu_set(void)
is_am486 = (cpu_s->cpu_type == CPU_ENH_Am486DX);
is_am486dxl = (cpu_s->cpu_type == CPU_Am486DXL);
is6117 = !strcmp(cpu_f->manufacturer, "ALi");
cpu_isintel = !strcmp(cpu_f->manufacturer, "Intel");
cpu_iscyrix = !strcmp(cpu_f->manufacturer, "Cyrix") || !strcmp(cpu_f->manufacturer, "ST");

2
src/cpu/cpu.h
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@@ -503,7 +503,7 @@ extern double fpu_multi;
extern int cpu_cyrix_alignment; /*Cyrix 5x86/6x86 only has data misalignment
penalties when crossing 8-byte boundaries*/
extern int is8086, is_nec, is186, is286, is386, is486;
extern int is8086, is_nec, is186, is286, is386, is6117, is486;
extern int is_am486, is_am486dxl, is_pentium, is_k5, is_k6, is_p6, is_cxsmm;
extern int hascache;
extern int isibm486;

2
src/cpu/x86.c
View File

@@ -272,6 +272,8 @@ reset_common(int hard)
loadcs(0xF000);
cpu_state.pc = 0xFFF0;
rammask = cpu_16bitbus ? 0xFFFFFF : 0xFFFFFFFF;
if (is6117)
rammask |= 0x03000000;
}
idt.base = 0;
cpu_state.flags = 2;

5
src/cpu/x86seg.c
View File

@@ -83,7 +83,10 @@ seg_reset(x86seg *s)
if (s == &cpu_state.seg_cs) {
if (!cpu_inited)
fatal("seg_reset(&cpu_state.seg.cs) without an initialized CPU\n");
s->base = is286 ? (cpu_16bitbus ? 0x00ff0000 : 0xffff0000) : 0x000ffff0;
if (is6117)
s->base = 0x03ff0000;
else
s->base = is286 ? (cpu_16bitbus ? 0x00ff0000 : 0xffff0000) : 0x000ffff0;
s->seg = is286 ? 0xf000 : 0xffff;
} else {
s->base = 0;

16
src/disk/hdc_ide.c
View File

@@ -734,7 +734,7 @@ loadhd(ide_t *ide, int d, const char *fn)
return;
}
hdd_preset_auto(&hdd[d]);
hdd_preset_apply(d);
ide->spt = ide->cfg_spt = hdd[d].spt;
ide->hpc = ide->cfg_hpc = hdd[d].hpc;
@@ -2614,7 +2614,7 @@ ide_read_ali_76(void)
}
static void
void
ide_set_handlers(uint8_t board)
{
if (ide_boards[board] == NULL)
@@ -2636,7 +2636,7 @@ ide_set_handlers(uint8_t board)
}
static void
void
ide_remove_handlers(uint8_t board)
{
if (ide_boards[board] == NULL)
@@ -2878,11 +2878,11 @@ ide_board_init(int board, int irq, int base_main, int side_main, int type)
void
ide_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv)
{
intptr_t board = (intptr_t) priv;
if (ld)
return;
intptr_t board = (intptr_t) priv;
if (ide_boards[board]->base_main || ide_boards[board]->side_main) {
ide_remove_handlers(board);
ide_boards[board]->base_main = ide_boards[board]->side_main = 0;
@@ -2891,10 +2891,10 @@ ide_pnp_config_changed(uint8_t ld, isapnp_device_config_t *config, void *priv)
ide_boards[board]->irq = -1;
if (config->activate) {
ide_boards[board]->base_main = config->io[0].base;
ide_boards[board]->side_main = config->io[1].base;
ide_boards[board]->base_main = (config->io[0].base != ISAPNP_IO_DISABLED) ? config->io[0].base : 0x0000;
ide_boards[board]->side_main = (config->io[1].base != ISAPNP_IO_DISABLED) ? config->io[1].base : 0x0000;
if ((ide_boards[board]->base_main != ISAPNP_IO_DISABLED) && (ide_boards[board]->side_main != ISAPNP_IO_DISABLED))
if (ide_boards[board]->base_main && ide_boards[board]->side_main)
ide_set_handlers(board);
if (config->irq[0].irq != ISAPNP_IRQ_DISABLED)

589
src/disk/hdd.c
View File

@@ -31,6 +31,10 @@
#include <86box/video.h>
#include "cpu.h"
#define HDD_OVERHEAD_TIME 50.0
hard_disk_t hdd[HDD_NUM];
@@ -155,364 +159,397 @@ hdd_is_valid(int c)
return(1);
}
double
hdd_seek_get_time(hard_disk_t *hdd, uint32_t dst_addr, uint8_t operation, uint8_t continuous, double max_seek_time)
{
hdd_zone_t *zone = NULL;
for (int i = 0; i < hdd->num_zones; i++) {
zone = &hdd->zones[i];
if (zone->end_sector >= dst_addr)
break;
if (!hdd->speed_preset)
return HDD_OVERHEAD_TIME;
hdd_zone_t *zone = NULL;
for (int i = 0; i < hdd->num_zones; i++) {
zone = &hdd->zones[i];
if (zone->end_sector >= dst_addr)
break;
}
double continuous_times[2][2] = { { hdd->head_switch_usec, hdd->cyl_switch_usec },
{ zone->sector_time_usec, zone->sector_time_usec } };
double times[2] = { HDD_OVERHEAD_TIME, hdd->avg_rotation_lat_usec };
uint32_t new_track = zone->start_track + ((dst_addr - zone->start_sector) / zone->sectors_per_track);
uint32_t new_cylinder = new_track / hdd->phy_heads;
uint32_t cylinder_diff = abs((int)hdd->cur_cylinder - (int)new_cylinder);
bool sequential = dst_addr == hdd->cur_addr + 1;
continuous = continuous && sequential;
double seek_time = 0.0;
if (continuous)
seek_time = continuous_times[new_track == hdd->cur_track][!!cylinder_diff];
else {
if (!cylinder_diff)
seek_time = times[operation != HDD_OP_SEEK];
else {
seek_time = hdd->cyl_switch_usec + (hdd->full_stroke_usec * (double)cylinder_diff / (double)hdd->phy_cyl) +
((operation != HDD_OP_SEEK) * hdd->avg_rotation_lat_usec);
}
}
#ifndef OLD_CODE
double continuous_times[2][2] = { { hdd->head_switch_usec, hdd->cyl_switch_usec },
{ zone->sector_time_usec, zone->sector_time_usec } };
double times[2] = { 50.0, hdd->avg_rotation_lat_usec };
#endif
if (!max_seek_time || seek_time <= max_seek_time) {
hdd->cur_addr = dst_addr;
hdd->cur_track = new_track;
hdd->cur_cylinder = new_cylinder;
}
uint32_t new_track = zone->start_track + ((dst_addr - zone->start_sector) / zone->sectors_per_track);
uint32_t new_cylinder = new_track / hdd->phy_heads;
uint32_t cylinder_diff = abs((int)hdd->cur_cylinder - (int)new_cylinder);
bool sequential = dst_addr == hdd->cur_addr + 1;
continuous = continuous && sequential;
double seek_time = 0.0;
if (continuous) {
#ifdef OLD_CODE
if (new_track == hdd->cur_track) {
// Same track
seek_time = zone->sector_time_usec;
} else if (!cylinder_diff) {
// Same cylinder, sequential track
seek_time = hdd->head_switch_usec;
} else {
// Sequential cylinder
seek_time = hdd->cyl_switch_usec;
}
#else
seek_time = continuous_times[new_track == hdd->cur_track][!!cylinder_diff];
#endif
} else {
if (!cylinder_diff) {
#ifdef OLD_CODE
if (operation != HDD_OP_SEEK) {
seek_time = hdd->avg_rotation_lat_usec;
} else {
//seek_time = hdd->cyl_switch_usec;
seek_time = 50.0;
}
#else
seek_time = times[operation != HDD_OP_SEEK];
#endif
} else {
#ifdef OLD_CODE
seek_time = hdd->cyl_switch_usec + (hdd->full_stroke_usec * (double)cylinder_diff / (double)hdd->phy_cyl);
if (operation != HDD_OP_SEEK) {
seek_time += hdd->avg_rotation_lat_usec;
}
#else
seek_time = hdd->cyl_switch_usec + (hdd->full_stroke_usec * (double)cylinder_diff / (double)hdd->phy_cyl) +
((operation != HDD_OP_SEEK) * hdd->avg_rotation_lat_usec);
#endif
}
}
if (!max_seek_time || seek_time <= max_seek_time) {
hdd->cur_addr = dst_addr;
hdd->cur_track = new_track;
hdd->cur_cylinder = new_cylinder;
}
return seek_time;
return seek_time;
}
static void
hdd_readahead_update(hard_disk_t *hdd)
{
hdd_cache_t *cache = &hdd->cache;
if (cache->ra_ongoing) {
hdd_cache_seg_t *segment = &cache->segments[cache->ra_segment];
uint64_t elapsed_cycles;
double elapsed_us, seek_time;
uint32_t max_read_ahead, i;
uint32_t space_needed;
uint64_t elapsed_cycles = tsc - cache->ra_start_time;
double elapsed_us = (double)elapsed_cycles / cpuclock * 1000000.0;
// Do not overwrite data not yet read by host
uint32_t max_read_ahead = (segment->host_addr + cache->segment_size) - segment->ra_addr;
hdd_cache_t *cache = &hdd->cache;
if (cache->ra_ongoing) {
hdd_cache_seg_t *segment = &cache->segments[cache->ra_segment];
double seek_time = 0.0;
elapsed_cycles = tsc - cache->ra_start_time;
elapsed_us = (double)elapsed_cycles / cpuclock * 1000000.0;
/* Do not overwrite data not yet read by host */
max_read_ahead = (segment->host_addr + cache->segment_size) - segment->ra_addr;
for (uint32_t i = 0; i < max_read_ahead; i++) {
seek_time += hdd_seek_get_time(hdd, segment->ra_addr, HDD_OP_READ, 1, elapsed_us - seek_time);
if (seek_time > elapsed_us)
break;
seek_time = 0.0;
segment->ra_addr++;
}
for (i = 0; i < max_read_ahead; i++) {
seek_time += hdd_seek_get_time(hdd, segment->ra_addr, HDD_OP_READ, 1, elapsed_us - seek_time);
if (seek_time > elapsed_us)
break;
if (segment->ra_addr > segment->lba_addr + cache->segment_size) {
uint32_t space_needed = segment->ra_addr - (segment->lba_addr + cache->segment_size);
segment->lba_addr += space_needed;
}
segment->ra_addr++;
}
if (segment->ra_addr > segment->lba_addr + cache->segment_size) {
space_needed = segment->ra_addr - (segment->lba_addr + cache->segment_size);
segment->lba_addr += space_needed;
}
}
}
static double
hdd_writecache_flush(hard_disk_t *hdd)
{
double seek_time = 0.0;
while (hdd->cache.write_pending) {
seek_time += hdd_seek_get_time(hdd, hdd->cache.write_addr, HDD_OP_WRITE, 1, 0);
hdd->cache.write_addr++;
hdd->cache.write_pending--;
}
double seek_time = 0.0;
return seek_time;
while (hdd->cache.write_pending) {
seek_time += hdd_seek_get_time(hdd, hdd->cache.write_addr, HDD_OP_WRITE, 1, 0);
hdd->cache.write_addr++;
hdd->cache.write_pending--;
}
return seek_time;
}
static void
hdd_writecache_update(hard_disk_t *hdd)
{
if (hdd->cache.write_pending) {
uint64_t elapsed_cycles = tsc - hdd->cache.write_start_time;
double elapsed_us = (double)elapsed_cycles / cpuclock * 1000000.0;
double seek_time = 0.0;
uint64_t elapsed_cycles;
double elapsed_us, seek_time;
while (hdd->cache.write_pending) {
seek_time += hdd_seek_get_time(hdd, hdd->cache.write_addr, HDD_OP_WRITE, 1, elapsed_us - seek_time);
if (seek_time > elapsed_us)
break;
if (hdd->cache.write_pending) {
elapsed_cycles = tsc - hdd->cache.write_start_time;
elapsed_us = (double)elapsed_cycles / cpuclock * 1000000.0;
seek_time = 0.0;
hdd->cache.write_addr++;
hdd->cache.write_pending--;
}
while (hdd->cache.write_pending) {
seek_time += hdd_seek_get_time(hdd, hdd->cache.write_addr, HDD_OP_WRITE, 1, elapsed_us - seek_time);
if (seek_time > elapsed_us)
break;
hdd->cache.write_addr++;
hdd->cache.write_pending--;
}
}
}
double
hdd_timing_write(hard_disk_t *hdd, uint32_t addr, uint32_t len)
{
hdd_readahead_update(hdd);
hdd_writecache_update(hdd);
double seek_time = 0.0;
uint32_t flush_needed;
hdd->cache.ra_ongoing = 0;
if (!hdd->speed_preset)
return HDD_OVERHEAD_TIME;
double seek_time = 0.0;
hdd_readahead_update(hdd);
hdd_writecache_update(hdd);
if (hdd->cache.write_pending && (addr != (hdd->cache.write_addr + hdd->cache.write_pending))) {
// New request is not sequential to existing cache, need to flush it
seek_time += hdd_writecache_flush(hdd);
hdd->cache.ra_ongoing = 0;
if (hdd->cache.write_pending && (addr != (hdd->cache.write_addr + hdd->cache.write_pending))) {
/* New request is not sequential to existing cache, need to flush it */
seek_time += hdd_writecache_flush(hdd);
}
if (!hdd->cache.write_pending) {
/* Cache is empty */
hdd->cache.write_addr = addr;
}
hdd->cache.write_pending += len;
if (hdd->cache.write_pending > hdd->cache.write_size) {
/* If request is bigger than free cache, flush some data first */
flush_needed = hdd->cache.write_pending - hdd->cache.write_size;
for (uint32_t i = 0; i < flush_needed; i++) {
seek_time += hdd_seek_get_time(hdd, hdd->cache.write_addr, HDD_OP_WRITE, 1, 0);
hdd->cache.write_addr++;
}
}
if (!hdd->cache.write_pending) {
// Cache is empty
hdd->cache.write_addr = addr;
}
hdd->cache.write_start_time = tsc + (uint32_t)(seek_time * cpuclock / 1000000.0);
hdd->cache.write_pending += len;
if (hdd->cache.write_pending > hdd->cache.write_size) {
// If request is bigger than free cache, flush some data first
uint32_t flush_needed = hdd->cache.write_pending - hdd->cache.write_size;
for (uint32_t i = 0; i < flush_needed; i++) {
seek_time += hdd_seek_get_time(hdd, hdd->cache.write_addr, HDD_OP_WRITE, 1, 0);
hdd->cache.write_addr++;
}
}
hdd->cache.write_start_time = tsc + (uint32_t)(seek_time * cpuclock / 1000000.0);
return seek_time;
return seek_time;
}
double
hdd_timing_read(hard_disk_t *hdd, uint32_t addr, uint32_t len)
{
hdd_readahead_update(hdd);
hdd_writecache_update(hdd);
double seek_time = 0.0;
double seek_time = 0.0;
seek_time += hdd_writecache_flush(hdd);
if (!hdd->speed_preset)
return HDD_OVERHEAD_TIME;
hdd_cache_t *cache = &hdd->cache;
hdd_cache_seg_t *active_seg = &cache->segments[0];
hdd_readahead_update(hdd);
hdd_writecache_update(hdd);
for (uint32_t i = 0; i < cache->num_segments; i++) {
hdd_cache_seg_t *segment = &cache->segments[i];
if (!segment->valid) {
active_seg = segment;
continue;
}
seek_time += hdd_writecache_flush(hdd);
if (segment->lba_addr <= addr && (segment->lba_addr + cache->segment_size) >= addr) {
// Cache HIT
segment->host_addr = addr;
active_seg = segment;
if (addr + len > segment->ra_addr) {
uint32_t need_read = (addr + len) - segment->ra_addr;
for (uint32_t j = 0; j < need_read; j++) {
seek_time += hdd_seek_get_time(hdd, segment->ra_addr, HDD_OP_READ, 1, 0.0);
segment->ra_addr++;
}
}
if (addr + len > segment->lba_addr + cache->segment_size) {
// Need to erase some previously cached data
uint32_t space_needed = (addr + len) - (segment->lba_addr + cache->segment_size);
segment->lba_addr += space_needed;
}
goto update_lru;
} else {
if (segment->lru > active_seg->lru) {
active_seg = segment;
}
}
hdd_cache_t *cache = &hdd->cache;
hdd_cache_seg_t *active_seg = &cache->segments[0];
for (uint32_t i = 0; i < cache->num_segments; i++) {
hdd_cache_seg_t *segment = &cache->segments[i];
if (!segment->valid) {
active_seg = segment;
continue;
}
// Cache MISS
active_seg->lba_addr = addr;
active_seg->valid = 1;
active_seg->host_addr = addr;
active_seg->ra_addr = addr;
for (uint32_t i = 0; i < len; i++) {
seek_time += hdd_seek_get_time(hdd, active_seg->ra_addr, HDD_OP_READ, i != 0, 0.0);
active_seg->ra_addr++;
if (segment->lba_addr <= addr && (segment->lba_addr + cache->segment_size) >= addr) {
/* Cache HIT */
segment->host_addr = addr;
active_seg = segment;
if (addr + len > segment->ra_addr) {
uint32_t need_read = (addr + len) - segment->ra_addr;
for (uint32_t j = 0; j < need_read; j++) {
seek_time += hdd_seek_get_time(hdd, segment->ra_addr, HDD_OP_READ, 1, 0.0);
segment->ra_addr++;
}
}
if (addr + len > segment->lba_addr + cache->segment_size) {
/* Need to erase some previously cached data */
uint32_t space_needed = (addr + len) - (segment->lba_addr + cache->segment_size);
segment->lba_addr += space_needed;
}
goto update_lru;
} else {
if (segment->lru > active_seg->lru)
active_seg = segment;
}
}
/* Cache MISS */
active_seg->lba_addr = addr;
active_seg->valid = 1;
active_seg->host_addr = addr;
active_seg->ra_addr = addr;
for (uint32_t i = 0; i < len; i++) {
seek_time += hdd_seek_get_time(hdd, active_seg->ra_addr, HDD_OP_READ, i != 0, 0.0);
active_seg->ra_addr++;
}
update_lru:
for (uint32_t i = 0; i < cache->num_segments; i++) {
cache->segments[i].lru++;
}
for (uint32_t i = 0; i < cache->num_segments; i++)
cache->segments[i].lru++;
active_seg->lru = 0;
active_seg->lru = 0;
cache->ra_ongoing = 1;
cache->ra_segment = active_seg->id;
cache->ra_start_time = tsc + (uint32_t)(seek_time * cpuclock / 1000000.0);
return seek_time;
cache->ra_ongoing = 1;
cache->ra_segment = active_seg->id;
cache->ra_start_time = tsc + (uint32_t)(seek_time * cpuclock / 1000000.0);
return seek_time;
}
static void
hdd_cache_init(hard_disk_t *hdd)
{
hdd_cache_t *cache = &hdd->cache;
cache->ra_segment = 0;
cache->ra_ongoing = 0;
cache->ra_start_time = 0;
hdd_cache_t *cache = &hdd->cache;
uint32_t i;
for (uint32_t i = 0; i < cache->num_segments; i++) {
cache->segments[i].valid = 0;
cache->segments[i].lru = 0;
cache->segments[i].id = i;
cache->segments[i].ra_addr = 0;
cache->segments[i].host_addr = 0;
}
cache->ra_segment = 0;
cache->ra_ongoing = 0;
cache->ra_start_time = 0;
for (i = 0; i < cache->num_segments; i++) {
cache->segments[i].valid = 0;
cache->segments[i].lru = 0;
cache->segments[i].id = i;
cache->segments[i].ra_addr = 0;
cache->segments[i].host_addr = 0;
}
}
static void
hdd_zones_init(hard_disk_t *hdd)
{
uint32_t lba = 0;
uint32_t track = 0;
double revolution_usec = 60.0 / (double)hdd->rpm * 1000000.0;
for (uint32_t i = 0; i < hdd->num_zones; i++) {
hdd_zone_t *zone = &hdd->zones[i];
zone->start_sector = lba;
zone->start_track = track;
zone->sector_time_usec = revolution_usec / (double)zone->sectors_per_track;
uint32_t tracks = zone->cylinders * hdd->phy_heads;
lba += tracks * zone->sectors_per_track;
zone->end_sector = lba - 1;
track += tracks - 1;
}
uint32_t lba = 0, track = 0;
uint32_t i, tracks;
double revolution_usec = 60.0 / (double)hdd->rpm * 1000000.0;
hdd_zone_t *zone;
for (i = 0; i < hdd->num_zones; i++) {
zone = &hdd->zones[i];
zone->start_sector = lba;
zone->start_track = track;
zone->sector_time_usec = revolution_usec / (double)zone->sectors_per_track;
tracks = zone->cylinders * hdd->phy_heads;
lba += tracks * zone->sectors_per_track;
zone->end_sector = lba - 1;
track += tracks - 1;
}
}
hdd_preset_t hdd_presets[] = {
{ .target_year = 1989, .match_max_mbyte = 99, .zones = 1, .avg_spt = 35, .heads = 2, .rpm = 3500, .full_stroke_ms = 40, .track_seek_ms = 8,
.rcache_num_seg = 1, .rcache_seg_size = 16, .max_multiple = 8 },
{ .target_year = 1992, .match_max_mbyte = 249, .zones = 1, .avg_spt = 45, .heads = 2, .rpm = 3500, .full_stroke_ms = 30, .track_seek_ms = 6,
.rcache_num_seg = 4, .rcache_seg_size = 16, .max_multiple = 8 },
static hdd_preset_t hdd_speed_presets[] = {
{ .name = "RAM Disk (max. speed)", .internal_name = "ramdisk", .rcache_num_seg = 16, .rcache_seg_size = 128, .max_multiple = 32 },
{ .target_year = 1994, .match_max_mbyte = 999, .zones = 8, .avg_spt = 80, .heads = 4, .rpm = 4500, .full_stroke_ms = 26, .track_seek_ms = 5,
.rcache_num_seg = 4, .rcache_seg_size = 32, .max_multiple = 16 },
{ .name = "[1989] 3500 RPM", .internal_name = "1989_3500rpm", .zones = 1, .avg_spt = 35, .heads = 2, .rpm = 3500,
.full_stroke_ms = 40, .track_seek_ms = 8, .rcache_num_seg = 1, .rcache_seg_size = 16, .max_multiple = 8 },
{ .target_year = 1996, .match_max_mbyte = 1999, .zones = 16, .avg_spt = 135, .heads = 4, .rpm = 5400, .full_stroke_ms = 24, .track_seek_ms = 3,
.rcache_num_seg = 4, .rcache_seg_size = 64, .max_multiple = 16 },
{ .name = "[1992] 3600 RPM", .internal_name = "1992_3600rpm", .zones = 1, .avg_spt = 45, .heads = 2, .rpm = 3600,
.full_stroke_ms = 30, .track_seek_ms = 6, .rcache_num_seg = 4, .rcache_seg_size = 16, .max_multiple = 8 },
{ .target_year = 1997, .match_max_mbyte = 4999, .zones = 16, .avg_spt = 185, .heads = 6, .rpm = 5400, .full_stroke_ms = 20, .track_seek_ms = 2.5,
.rcache_num_seg = 8, .rcache_seg_size = 64, .max_multiple = 32 },
{ .name = "[1994] 4500 RPM", .internal_name = "1994_4500rpm", .zones = 8, .avg_spt = 80, .heads = 4, .rpm = 4500,
.full_stroke_ms = 26, .track_seek_ms = 5, .rcache_num_seg = 4, .rcache_seg_size = 32, .max_multiple = 16 },
{ .target_year = 1998, .match_max_mbyte = 9999, .zones = 16, .avg_spt = 300, .heads = 8, .rpm = 5400, .full_stroke_ms = 20, .track_seek_ms = 2,
.rcache_num_seg = 8, .rcache_seg_size = 128, .max_multiple = 32 },
{ .name = "[1996] 5400 RPM", .internal_name = "1996_5400rpm", .zones = 16, .avg_spt = 135, .heads = 4, .rpm = 5400,
.full_stroke_ms = 24, .track_seek_ms = 3, .rcache_num_seg = 4, .rcache_seg_size = 64, .max_multiple = 16 },
{ .target_year = 2000, .match_max_mbyte = 99999, .zones = 16, .avg_spt = 350, .heads = 6, .rpm = 7200, .full_stroke_ms = 15, .track_seek_ms = 2,
.rcache_num_seg = 16, .rcache_seg_size = 128, .max_multiple = 32 },
{ .name = "[1997] 5400 RPM", .internal_name = "1997_5400rpm", .zones = 16, .avg_spt = 185, .heads = 6, .rpm = 5400,
.full_stroke_ms = 20, .track_seek_ms = 2.5, .rcache_num_seg = 8, .rcache_seg_size = 64, .max_multiple = 32 },
{ .name = "[1998] 5400 RPM", .internal_name = "1998_5400rpm", .zones = 16, .avg_spt = 300, .heads = 8, .rpm = 5400,
.full_stroke_ms = 20, .track_seek_ms = 2, .rcache_num_seg = 8, .rcache_seg_size = 128, .max_multiple = 32 },
{ .name = "[2000] 7200 RPM", .internal_name = "2000_7200rpm", .zones = 16, .avg_spt = 350, .heads = 6, .rpm = 7200,
.full_stroke_ms = 15, .track_seek_ms = 2, .rcache_num_seg = 16, .rcache_seg_size = 128, .max_multiple = 32 },
};
void
hdd_preset_apply(hard_disk_t *hdd, hdd_preset_t *preset)
int
hdd_preset_get_num()
{
hdd->phy_heads = preset->heads;
hdd->rpm = preset->rpm;
double revolution_usec = 60.0 / (double)hdd->rpm * 1000000.0;
hdd->avg_rotation_lat_usec = revolution_usec / 2;
hdd->full_stroke_usec = preset->full_stroke_ms * 1000;
hdd->head_switch_usec = preset->track_seek_ms * 1000;
hdd->cyl_switch_usec = preset->track_seek_ms * 1000;
hdd->cache.num_segments = preset->rcache_num_seg;
hdd->cache.segment_size = preset->rcache_seg_size;
hdd->max_multiple_block = preset->max_multiple;
hdd->cache.write_size = 64;
hdd->num_zones = preset->zones;
uint32_t disk_sectors = hdd->tracks * hdd->hpc * hdd->spt;
uint32_t sectors_per_surface = (uint32_t)ceil((double)disk_sectors / (double)hdd->phy_heads);
uint32_t cylinders = (uint32_t)ceil((double)sectors_per_surface / (double)preset->avg_spt);
hdd->phy_cyl = cylinders;
uint32_t cylinders_per_zone = cylinders / preset->zones;
uint32_t total_sectors = 0;
for (uint32_t i = 0; i < preset->zones; i++) {
uint32_t spt;
double zone_percent = i * 100 / (double)preset->zones;
if (i < preset->zones - 1) {
// Function for realistic zone sector density
double spt_percent = -0.00341684 * pow(zone_percent, 2) - 0.175811 * zone_percent + 118.48;
spt = (uint32_t)ceil((double)preset->avg_spt * spt_percent / 100);
} else {
spt = (uint32_t)ceil((double)(disk_sectors - total_sectors) / (double)(cylinders_per_zone*preset->heads));
}
uint32_t zone_sectors = spt * cylinders_per_zone * preset->heads;
total_sectors += zone_sectors;
hdd->zones[i].cylinders = cylinders_per_zone;
hdd->zones[i].sectors_per_track = spt;
}
hdd_zones_init(hdd);
hdd_cache_init(hdd);
return sizeof(hdd_speed_presets) / sizeof(hdd_preset_t);
}
void
hdd_preset_auto(hard_disk_t *hdd)
char *
hdd_preset_getname(int preset)
{
uint32_t disk_sectors = hdd->tracks * hdd->hpc * hdd->spt;
uint32_t disk_size_mb = disk_sectors * 512 / 1024 / 1024;
int i;
for (i = 0; i < (sizeof(hdd_presets) / sizeof(hdd_presets[0])); i++) {
if (hdd_presets[i].match_max_mbyte >= disk_size_mb)
break;
}
return (char *)hdd_speed_presets[preset].name;
}
hdd_preset_t *preset = &hdd_presets[i];
hdd_preset_apply(hdd, preset);
}
char *
hdd_preset_get_internal_name(int preset)
{
return (char *)hdd_speed_presets[preset].internal_name;
}
int
hdd_preset_get_from_internal_name(char *s)
{
int c = 0;
for (int i = 0; i < (sizeof(hdd_speed_presets) / sizeof(hdd_preset_t)); i++) {
if (!strcmp((char *)hdd_speed_presets[c].internal_name, s))
return c;
c++;
}
return 0;
}
void
hdd_preset_apply(int hdd_id)
{
hard_disk_t *hd = &hdd[hdd_id];
double revolution_usec, zone_percent;
uint32_t disk_sectors, sectors_per_surface, cylinders, cylinders_per_zone;
uint32_t total_sectors = 0, i;
uint32_t spt, zone_sectors;
if (hd->speed_preset >= hdd_preset_get_num())
hd->speed_preset = 0;
hdd_preset_t *preset = &hdd_speed_presets[hd->speed_preset];
hd->cache.num_segments = preset->rcache_num_seg;
hd->cache.segment_size = preset->rcache_seg_size;
hd->max_multiple_block = preset->max_multiple;
if (!hd->speed_preset)
return;
hd->phy_heads = preset->heads;
hd->rpm = preset->rpm;
revolution_usec = 60.0 / (double)hd->rpm * 1000000.0;
hd->avg_rotation_lat_usec = revolution_usec / 2;
hd->full_stroke_usec = preset->full_stroke_ms * 1000;
hd->head_switch_usec = preset->track_seek_ms * 1000;
hd->cyl_switch_usec = preset->track_seek_ms * 1000;
hd->cache.write_size = 64;
hd->num_zones = preset->zones;
disk_sectors = hd->tracks * hd->hpc * hd->spt;
sectors_per_surface = (uint32_t)ceil((double)disk_sectors / (double)hd->phy_heads);
cylinders = (uint32_t)ceil((double)sectors_per_surface / (double)preset->avg_spt);
hd->phy_cyl = cylinders;
cylinders_per_zone = cylinders / preset->zones;
for (i = 0; i < preset->zones; i++) {
zone_percent = i * 100 / (double)preset->zones;
if (i < preset->zones - 1) {
/* Function for realistic zone sector density */
double spt_percent = -0.00341684 * pow(zone_percent, 2) - 0.175811 * zone_percent + 118.48;
spt = (uint32_t)ceil((double)preset->avg_spt * spt_percent / 100);
} else
spt = (uint32_t)ceil((double)(disk_sectors - total_sectors) / (double)(cylinders_per_zone*preset->heads));
zone_sectors = spt * cylinders_per_zone * preset->heads;
total_sectors += zone_sectors;
hd->zones[i].cylinders = cylinders_per_zone;
hd->zones[i].sectors_per_track = spt;
}
hdd_zones_init(hd);
hdd_cache_init(hd);
}

7
src/dma.c
View File

@@ -622,7 +622,7 @@ dma_ps2_read(uint16_t addr, void *priv)
else
temp = dma_c->cc & 0xff;
dma_ps2.byte_ptr = (dma_ps2.byte_ptr + 1) & 1;
break;
break;
case 6: /*Read DMA status*/
if (dma_ps2.byte_ptr) {
@@ -650,7 +650,6 @@ dma_ps2_read(uint16_t addr, void *priv)
}
break;
}
return(temp);
}
@@ -719,7 +718,7 @@ dma_ps2_write(uint16_t addr, uint8_t val, void *priv)
dma_c->cc = (dma_c->cc & 0xff00) | val;
dma_ps2.byte_ptr = (dma_ps2.byte_ptr + 1) & 1;
dma_c->cb = dma_c->cc;
break;
break;
case 7: /*Mode register*/
mode = 0;
@@ -727,7 +726,7 @@ dma_ps2_write(uint16_t addr, uint8_t val, void *priv)
mode |= 0x20;
if ((val & DMA_PS2_XFER_MASK) == DMA_PS2_XFER_MEM_TO_IO)
mode |= 8;
else if ((val & DMA_PS2_XFER_MASK) == DMA_PS2_XFER_IO_TO_MEM)
else if ((val & DMA_PS2_XFER_MASK) == DMA_PS2_XFER_IO_TO_MEM)
mode |= 4;
dma_c->mode = (dma_c->mode & ~0x2c) | mode;
dma_c->ps2_mode = val;

14
src/game/gameport.c
View File

@@ -698,3 +698,17 @@ const device_t gameport_sio_device = {
.force_redraw = NULL,
.config = NULL
};
const device_t gameport_sio_1io_device = {
.name = "Game port (Super I/O, 1 I/O port)",
.internal_name = "gameport_sio",
.flags = 0,
.local = 0x1010000,
.init = gameport_init,
.close = gameport_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};

1
src/include/86box/gameport.h
View File

@@ -121,6 +121,7 @@ extern const device_t gameport_tm_acm_device;
extern const device_t gameport_pnp_device;
extern const device_t gameport_pnp_6io_device;
extern const device_t gameport_sio_device;
extern const device_t gameport_sio_1io_device;
extern const device_t *standalone_gameport_type;
#endif

3
src/include/86box/hdc_ide.h
View File

@@ -143,6 +143,9 @@ extern void win_cdrom_reload(uint8_t id);
extern void ide_set_base(int board, uint16_t port);
extern void ide_set_side(int board, uint16_t port);
extern void ide_set_handlers(uint8_t board);
extern void ide_remove_handlers(uint8_t board);
extern void ide_pri_enable(void);
extern void ide_pri_disable(void);
extern void ide_sec_enable(void);

13
src/include/86box/hdd.h
View File

@@ -82,12 +82,12 @@ enum {
#define HDD_MAX_CACHE_SEG 16
typedef struct {
uint32_t match_max_mbyte;
const char *name;
const char *internal_name;
uint32_t zones;
uint32_t avg_spt;
uint32_t heads;
uint32_t rpm;
uint32_t target_year;
uint32_t rcache_num_seg;
uint32_t rcache_seg_size;
uint32_t max_multiple;
@@ -169,6 +169,8 @@ typedef struct {
uint32_t cur_track;
uint32_t cur_addr;
uint32_t speed_preset;
double avg_rotation_lat_usec;
double full_stroke_usec;
double head_switch_usec;
@@ -207,7 +209,10 @@ extern int image_is_vhd(const char *s, int check_signature);
extern double hdd_timing_write(hard_disk_t *hdd, uint32_t addr, uint32_t len);
extern double hdd_timing_read(hard_disk_t *hdd, uint32_t addr, uint32_t len);
extern double hdd_seek_get_time(hard_disk_t *hdd, uint32_t dst_addr, uint8_t operation, uint8_t continuous, double max_seek_time);
extern void hdd_preset_apply(hard_disk_t *hdd, hdd_preset_t *preset);
extern void hdd_preset_auto(hard_disk_t *hdd);
int hdd_preset_get_num();
char * hdd_preset_getname(int preset);
extern char *hdd_preset_get_internal_name(int preset);
extern int hdd_preset_get_from_internal_name(char *s);
extern void hdd_preset_apply(int hdd_id);
#endif /*EMU_HDD_H*/

88
src/include/86box/keyboard.h
View File

@@ -41,6 +41,94 @@ typedef struct {
#define RSHIFT_OFF 0x105
/* KBC #define's */
#define KBC_UNKNOWN 0x0000 /* As yet unknown keyboard */
/* IBM-style controllers */
#define KBC_IBM_PC_XT 0x0000 /* IBM PC/XT */
#define KBC_IBM_PCJR 0x0001 /* IBM PCjr */
#define KBC_IBM_TYPE_1 0x0002 /* IBM AT / PS/2 Type 1 */
#define KBC_IBM_TYPE_2 0x0003 /* IBM PS/2 Type 2 */
#define KBC_AMI_ACCESS_METHODS 0x0004 /* Access Methods AMI */
#define KBC_JU_JET 0x0005 /* Ju-Jet */
/* OEM proprietary */
#define KBC_TANDY 0x0011 /* Tandy 1000/1000HX */
#define KBC_TANDY_SL2 0x0012 /* Tandy 1000SL2 */
#define KBC_AMSTRAD 0x0013 /* Amstrad */
#define KBC_OLIVETTI_XT 0x0014 /* Olivetti XT */
#define KBC_OLIVETTI 0x0015 /* Olivetti AT */
#define KBC_TOSHIBA 0x0016 /* Toshiba AT */
#define KBC_COMPAQ 0x0017 /* Compaq */
#define KBC_NCR 0x0018 /* NCR */
#define KBC_QUADTEL 0x0019 /* Quadtel */
#define KBC_SIEMENS 0x001A /* Siemens */
/* Phoenix MultiKey/42 */
#define PHOENIX_MK42_105 0x0521 /* Phoenix MultiKey/42 1.05 */
#define PHOENIX_MK42_129 0x2921 /* Phoenix MultiKey/42 1.29 */
#define PHOENIX_MK42_138 0x3821 /* Phoenix MultiKey/42 1.38 */
#define PHOENIX_MK42_140 0x3821 /* Phoenix MultiKey/42 1.40 */
#define PHOENIX_MKC42_214 0x1422 /* Phoenix MultiKey/C42 2.14 */
#define PHOENIX_MK42I_416 0x1624 /* Phoenix MultiKey/42i 4.16 */
#define PHOENIX_MK42I_419 0x1924 /* Phoenix MultiKey/42i 4.19 */
/* AMI 0x3x */
#define KBC_ACER_V30 0x0030 /* Acer (0xA1 returns nothing, 0xAF returns 0x00) */
#define KBC_AMI_MEGAKEY_SUPER_IO 0x0035 /* AMI '5' MegaKey 1994 NSC (and SM(S)C?) */
#define KBC_AMI_8 0x0038 /* AMI '8' */
/* AMI 0x4x */
#define KBC_AMI_B 0x0042 /* AMI 'B' */
#define KBC_AMI_D 0x0044 /* AMI 'D' */
#define KBC_AMI_E 0x0045 /* AMI 'E' */
#define KBC_AMIKEY 0x0046 /* AMI 'F'/AMIKEY */
#define KBC_AMIKEY_2 0x0048 /* AMI 'H'/AMIEY-2 */
#define KBC_MR 0x004D /* MR 'M' - Temporary classification until we get a dump */
/* AMI 0x5x */
#define KBC_AMI_MEGAKEY_1993 0x0050 /* AMI 'P' MegaKey 1993 */
#define KBC_AMI_MEGAKEY_1994 0x0052 /* AMI 'R' MegaKey 1994 - 0xA0 returns 1993 copyright */
#define KBC_AMI_TRIGEM 0x005A /* TriGem AMI 'Z' (1990 AMI copyright) */
/* AMI 0x6x */
#define KBC_TANDON 0x0061 /* Tandon 'a' - Temporary classification until we get a dump */
/* Holtek */
#define KBC_HT_REGIONAL_6542 0x1046 /* Holtek 'F' (Regional 6542) */
#define KBC_HT_HT6542B_BESTKEY 0x1048 /* Holtek 'H' (Holtek HT6542B, BestKey) */
/* AMI 0x0x clone without command 0xA0 */
#define KBC_UNK_00 0x2000 /* Unknown 0x00 */
#define KBC_UNK_01 0x2001 /* Unknown 0x01 */
/* AMI 0x3x clone without command 0xA0 */
#define KBC_UNK_7 0x2037 /* Unknown '7' - Temporary classification until we get a dump */
#define KBC_UNK_9 0x2037 /* Unknown '9' - Temporary classification until we get a dump */
#define KBC_JETKEY_NO_VER 0x2038 /* No-version JetKey '8' */
/* AMI 0x4x clone without command 0xA0 */
#define KBC_UNK_A 0x2041 /* Unknown 'A' - Temporary classification until we get a dump */
#define KBC_JETKEY_5_W83C42 0x2046 /* JetKey 5.0 'F' and Winbond W83C42 */
#define KBC_UNK_G 0x2047 /* Unknown 'G' - Temporary classification until we get a dump */
#define KBC_MB_300E_SIS 0x2048 /* MB-300E Non-VIA 'H' and SiS 5582/559x */
#define KBC_UNK_L 0x204C /* Unknown 'L' - Temporary classification until we get a dump */
/* AMI 0x0x clone with command 0xA0 (Get Copyright String) only returning 0x00 */
#define KBC_VPC_2007 0x3000 /* Microsoft Virtual PC 2007 - everything returns 0x00 */
/* AMI 0x4x clone with command 0xA0 (Get Copyright String) only returning 0x00 */
#define KBC_ALI_M148X 0x3045 /* ALi M148x 'E'/'U' (0xA1 actually returns 'F' but BIOS shows 'E' or 'U') */
#define KBC_LANCE_UTRON 0x3046 /* Lance LT38C41 'F', Utron */
/* AMI 0x5x clone with command 0xA0 (Get Copyright String) only returning 0x00 */
#define KBC_SARC_6042 0x3055 /* SARC 6042 'U' */
/* Award and clones */
#define KBC_AWARD 0x4200 /* Award (0xA1 returns 0x00) - Temporary classification until we get
the real 0xAF return */
#define KBC_VIA_VT82C4XN 0x4246 /* VIA VT82C41N, VT82C4N (0xA1 returns 'F') */
#define KBC_VIA_VT82C586A 0x4346 /* VIA VT82C586A (0xA1 returns 'F') */
#define KBC_VIA_VT82C586B 0x4446 /* VIA VT82C586B (0xA1 returns 'F') */
#define KBC_VIA_VT82C686B 0x4546 /* VIA VT82C686B (0xA1 returns 'F') */
/* UMC */
#define KBC_UMC_UM8886 0x5048 /* UMC UM8886 'H' */
/* IBM-style controllers with inverted P1 video type bit polarity */
#define KBC_IBM_TYPE_1_XI8088 0x8000 /* Xi8088: IBM Type 1 */
/* AMI (this is the 0xA1 revision byte) with inverted P1 video type bit polarity */
#define KBC_ACER_V30_INV 0x8030 /* Acer (0xA1 returns nothing, 0xAF returns 0x00) */
/* Holtek with inverted P1 video type bit polarity */
#define KBC_HT_HT6542B_XI8088 0x9048 /* Xi8088: Holtek 'H' (Holtek HT6542B, BestKey) */
/* Award and clones with inverted P1 video type bit polarity */
#define KBC_VIA_VT82C4XN_XI8088 0xC246 /* Xi8088: VIA VT82C41N, VT82C4N (0xA1 returns 'F') */
#ifdef __cplusplus
extern "C" {
#endif

65
src/include/86box/machine.h
View File

@@ -126,11 +126,9 @@
#define IS_AT(m) (((machines[m].bus_flags & (MACHINE_BUS_ISA16 | MACHINE_BUS_EISA | MACHINE_BUS_VLB | MACHINE_BUS_MCA | MACHINE_BUS_PCI | MACHINE_BUS_PCMCIA | MACHINE_BUS_AGP | MACHINE_BUS_AC97)) && !(machines[m].bus_flags & MACHINE_PC98)) ? 1 : 0)
#define CPU_BLOCK(...) (const uint8_t[]) {__VA_ARGS__, 0}
#define MACHINE_MULTIPLIER_FIXED -1, -1
#define MACHINE_MULTIPLIER_FIXED -1
#define CPU_BLOCK_NONE 0
#define CPU_BLOCK_QDI_FMB CPU_BLOCK(CPU_WINCHIP, CPU_WINCHIP2, CPU_Cx6x86, CPU_Cx6x86L, CPU_Cx6x86MX)
#define CPU_BLOCK_SOYO_4SAW2 CPU_BLOCK(CPU_i486SX, CPU_i486DX, CPU_Am486SX, CPU_Am486DX)
/* Make sure it's always an invalid value to avoid misdetections. */
#if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)
@@ -256,6 +254,22 @@ typedef struct _machine_filter_ {
const char id;
} machine_filter_t;
typedef struct _machine_cpu_ {
uint32_t package;
const uint8_t *block;
uint32_t min_bus;
uint32_t max_bus;
uint16_t min_voltage;
uint16_t max_voltage;
float min_multi;
float max_multi;
} machine_cpu_t;
typedef struct _machine_memory_ {
uint32_t min, max;
int step;
} machine_memory_t;
typedef struct _machine_ {
const char *name;
const char *internal_name;
@@ -263,25 +277,29 @@ typedef struct _machine_ {
uint32_t chipset;
int (*init)(const struct _machine_ *);
uintptr_t pad, pad0, pad1, pad2;
uint32_t cpu_package;
const uint8_t *cpu_block;
uint32_t cpu_min_bus;
uint32_t cpu_max_bus;
uint16_t cpu_min_voltage;
uint16_t cpu_max_voltage;
float cpu_min_multi;
float cpu_max_multi;
const machine_cpu_t cpu;
uintptr_t bus_flags;
uintptr_t flags;
uint32_t min_ram, max_ram;
const machine_memory_t ram;
int ram_granularity;
int nvrmask;
uint16_t kbc;
/* Bits:
7-0 Set bits are forced set on P1 (no forced set = 0x00);
15-8 Clear bits are forced clear on P1 (no foced clear = 0xff). */
uint16_t kbc_p1;
uint32_t gpio;
uint32_t gpio_acpi;
#ifdef EMU_DEVICE_H
const device_t *(*get_device)(void);
const device_t *(*get_vid_device)(void);
const device_t *device;
const device_t *vid_device;
const device_t *snd_device;
const device_t *net_device;
#else
void *get_device;
void *get_vid_device;
void *device;
void *vid_device;
void *snd_device;
void *net_device;
#endif
} machine_t;
@@ -658,6 +676,7 @@ extern int machine_at_5emapro_init(const machine_t *);
/* m_at_socket8.c */
extern int machine_at_p6rp4_init(const machine_t *);
extern int machine_at_aurora_init(const machine_t *);
extern int machine_at_686nx_init(const machine_t *);
extern int machine_at_acerv60n_init(const machine_t *);
@@ -772,14 +791,16 @@ extern const device_t ps1_hdc_device;
#endif
/* m_ps2_isa.c */
extern int machine_ps2_m30_286_init(const machine_t *);
extern int machine_ps2_m30_286_init(const machine_t *);
/* m_ps2_mca.c */
extern int machine_ps2_model_50_init(const machine_t *);
extern int machine_ps2_model_55sx_init(const machine_t *);
extern int machine_ps2_model_70_type3_init(const machine_t *);
extern int machine_ps2_model_80_init(const machine_t *);
extern int machine_ps2_model_80_axx_init(const machine_t *);
extern int machine_ps2_model_50_init(const machine_t *);
extern int machine_ps2_model_60_init(const machine_t *);
extern int machine_ps2_model_55sx_init(const machine_t *);
extern int machine_ps2_model_65sx_init(const machine_t *);
extern int machine_ps2_model_70_type3_init(const machine_t *);
extern int machine_ps2_model_80_init(const machine_t *);
extern int machine_ps2_model_80_axx_init(const machine_t *);
/* m_tandy.c */
extern int tandy1k_eeprom_read(void);

6
src/include/86box/mem.h
View File

@@ -182,6 +182,8 @@ typedef struct _mem_mapping_ {
uint32_t base;
uint32_t size;
uint32_t mask;
uint8_t (*read_b)(uint32_t addr, void *priv);
uint16_t (*read_w)(uint32_t addr, void *priv);
uint32_t (*read_l)(uint32_t addr, void *priv);
@@ -270,6 +272,7 @@ extern int writelookup[256];
extern uintptr_t * writelookup2;
extern int writelnext;
extern uint32_t ram_mapped_addr[64];
extern uint8_t page_ff[4096];
extern mem_mapping_t ram_low_mapping,
#if 1
@@ -298,6 +301,8 @@ extern int memspeed[11];
extern int mmu_perm;
extern uint8_t high_page; /* if a high (> 4 gb) page was detected */
extern uint32_t pages_sz; /* #pages in table */
extern int mem_a20_state,
mem_a20_alt,
mem_a20_key;
@@ -370,6 +375,7 @@ extern void mem_mapping_set_p(mem_mapping_t *, void *p);
extern void mem_mapping_set_addr(mem_mapping_t *,
uint32_t base, uint32_t size);
extern void mem_mapping_set_exec(mem_mapping_t *, uint8_t *exec);
extern void mem_mapping_set_mask(mem_mapping_t *, uint32_t mask);
extern void mem_mapping_disable(mem_mapping_t *);
extern void mem_mapping_enable(mem_mapping_t *);
extern void mem_mapping_recalc(uint64_t base, uint64_t size);

1
src/include/86box/nvr_ps2.h
View File

@@ -40,6 +40,7 @@
extern const device_t ps2_nvr_device;
extern const device_t ps2_nvr_55ls_device;
#endif /*EMU_NVRPS2_H*/

1
src/include/86box/sio.h
View File

@@ -42,6 +42,7 @@ extern const device_t fdc37m60x_370_device;
extern const device_t it8661f_device;
extern const device_t i82091aa_device;
extern const device_t i82091aa_398_device;
extern const device_t i82091aa_ide_pri_device;
extern const device_t i82091aa_ide_device;
extern const device_t pc87306_device;
extern const device_t pc87307_device;

2
src/include/86box/snd_sb_dsp.h
View File

@@ -83,7 +83,7 @@ typedef struct sb_dsp_t {
pc_timer_t output_timer, input_timer;
uint64_t sblatcho, sblatchi;
double sblatcho, sblatchi;
uint16_t sb_addr;

62
src/machine/m_amstrad.c
View File

@@ -670,7 +670,7 @@ vid_speed_change_1512(void *priv)
recalc_timings_1512(vid);
}
device_config_t vid_1512_config[] = {
const device_config_t vid_1512_config[] = {
{
.name = "display_type",
.description = "Display type",
@@ -723,7 +723,7 @@ device_config_t vid_1512_config[] = {
{ .name = "", .description = "", .type = CONFIG_END }
};
static const device_t vid_1512_device = {
const device_t vid_1512_device = {
.name = "Amstrad PC1512 (video)",
.internal_name = "vid_1512",
.flags = 0,
@@ -737,13 +737,6 @@ static const device_t vid_1512_device = {
.config = vid_1512_config
};
const device_t *
pc1512_get_device(void)
{
return(&vid_1512_device);
}
static void
recalc_timings_1640(amsvid_t *vid)
{
@@ -882,7 +875,7 @@ vid_speed_changed_1640(void *priv)
recalc_timings_1640(vid);
}
device_config_t vid_1640_config[] = {
const device_config_t vid_1640_config[] = {
{
.name = "language",
.description = "BIOS language",
@@ -906,7 +899,7 @@ device_config_t vid_1640_config[] = {
{ .name = "", .description = "", .type = CONFIG_END }
};
static const device_t vid_1640_device = {
const device_t vid_1640_device = {
.name = "Amstrad PC1640 (video)",
.internal_name = "vid_1640",
.flags = 0,
@@ -920,12 +913,6 @@ static const device_t vid_1640_device = {
.config = vid_1640_config
};
const device_t *
pc1640_get_device(void)
{
return(&vid_1640_device);
}
/* Display type */
#define PC200_CGA 0 /* CGA monitor */
#define PC200_MDA 1 /* MDA monitor */
@@ -1715,7 +1702,7 @@ vid_close_200(void *priv)
}
device_config_t vid_200_config[] = {
const device_config_t vid_200_config[] = {
/* TODO: Should have options here for:
*
* > Display port (TTL or RF)
@@ -1791,7 +1778,7 @@ device_config_t vid_200_config[] = {
{ .name = "", .description = "", .type = CONFIG_END }
};
static const device_t vid_200_device = {
const device_t vid_200_device = {
.name = "Amstrad PC200 (video)",
.internal_name = "vid_200",
.flags = 0,
@@ -1805,13 +1792,7 @@ static const device_t vid_200_device = {
.config = vid_200_config
};
const device_t *
pc200_get_device(void)
{
return(&vid_200_device);
}
device_config_t vid_ppc512_config[] = {
const device_config_t vid_ppc512_config[] = {
/* TODO: Should have options here for:
*
* > Display port (TTL or RF)
@@ -1895,7 +1876,7 @@ device_config_t vid_ppc512_config[] = {
{ .name = "", .description = "", .type = CONFIG_END }
};
static const device_t vid_ppc512_device = {
const device_t vid_ppc512_device = {
.name = "Amstrad PPC512 (video)",
.internal_name = "vid_ppc512",
.flags = 0,
@@ -1909,13 +1890,7 @@ static const device_t vid_ppc512_device = {
.config = vid_ppc512_config
};
const device_t *
ppc512_get_device(void)
{
return(&vid_ppc512_device);
}
device_config_t vid_pc2086_config[] = {
const device_config_t vid_pc2086_config[] = {
{
.name = "language",
.description = "BIOS language",
@@ -1933,7 +1908,7 @@ device_config_t vid_pc2086_config[] = {
{ .name = "", .description = "", .type = CONFIG_END }
};
static const device_t vid_pc2086_device = {
const device_t vid_pc2086_device = {
.name = "Amstrad PC2086",
.internal_name = "vid_pc2086",
.flags = 0,
@@ -1947,13 +1922,7 @@ static const device_t vid_pc2086_device = {
.config = vid_pc2086_config
};
const device_t *
pc2086_get_device(void)
{
return(&vid_pc2086_device);
}
device_config_t vid_pc3086_config[] = {
const device_config_t vid_pc3086_config[] = {
{
.name = "language",
.description = "BIOS language",
@@ -1971,7 +1940,7 @@ device_config_t vid_pc3086_config[] = {
{ .name = "", .description = "", .type = CONFIG_END }
};
static const device_t vid_pc3086_device = {
const device_t vid_pc3086_device = {
.name = "Amstrad PC3086",
.internal_name = "vid_pc3086",
.flags = 0,
@@ -1985,13 +1954,6 @@ static const device_t vid_pc3086_device = {
.config = vid_pc3086_config
};
const device_t *
pc3086_get_device(void)
{
return(&vid_pc3086_device);
}
static void
ms_write(uint16_t addr, uint8_t val, void *priv)
{

16
src/machine/m_at_286_386sx.c
View File

@@ -99,14 +99,6 @@ machine_at_tg286m_init(const machine_t *model)
return ret;
}
const device_t *
at_ama932j_get_device(void)
{
return &oti067_ama932j_device;
}
int
machine_at_ama932j_init(const machine_t *model)
{
@@ -418,14 +410,6 @@ machine_at_spc4216p_init(const machine_t *model)
return ret;
}
const device_t *
at_spc4620p_get_device(void)
{
return &ati28800k_spc4620p_device;
}
int
machine_at_spc4620p_init(const machine_t *model)
{

39
src/machine/m_at_386dx_486.c
View File

@@ -186,14 +186,6 @@ machine_at_valuepoint433_init(const machine_t *model) // hangs without the PS/2
return ret;
}
const device_t *
at_valuepoint433_get_device(void)
{
return &et4000w32_onboard_device;
}
int
machine_at_ecs386_init(const machine_t *model)
{
@@ -361,13 +353,6 @@ machine_at_vect486vl_init(const machine_t *model) // has HDC problems
return ret;
}
const device_t *
at_vect486vl_get_device(void)
{
return &gd5428_onboard_device;
}
int
machine_at_d824_init(const machine_t *model)
{
@@ -392,14 +377,6 @@ machine_at_d824_init(const machine_t *model)
return ret;
}
const device_t *
at_d824_get_device(void)
{
return &gd5428_onboard_device;
}
int
machine_at_acera1g_init(const machine_t *model)
{
@@ -426,14 +403,6 @@ machine_at_acera1g_init(const machine_t *model)
return ret;
}
const device_t *
at_acera1g_get_device(void)
{
return &gd5428_onboard_device;
}
int
machine_at_acerv10_init(const machine_t *model)
{
@@ -1453,14 +1422,6 @@ machine_at_sbc490_init(const machine_t *model)
return ret;
}
const device_t *
at_sbc490_get_device(void)
{
return &tgui9440_onboard_pci_device;
}
int
machine_at_tf486_init(const machine_t *model)
{

8
src/machine/m_at_compaq.c
View File

@@ -719,7 +719,7 @@ const device_config_t compaq_plasma_config[] = {
{ .name = "", .description = "", .type = CONFIG_END }
};
static const device_t compaq_plasma_device = {
const device_t compaq_plasma_device = {
.name = "Compaq Plasma",
.internal_name = "compaq_plasma",
.flags = 0,
@@ -792,12 +792,6 @@ write_raml(uint32_t addr, uint32_t val, void *priv)
mem_write_raml_page(addr, val, &pages[addr >> 12]);
}
const device_t *
at_cpqiii_get_device(void)
{
return &compaq_plasma_device;
}
static void
machine_at_compaq_init(const machine_t *model, int type)
{

8
src/machine/m_at_slot1.c
View File

@@ -481,14 +481,6 @@ machine_at_s1846_init(const machine_t *model)
return ret;
}
const device_t *
at_s1846_get_device(void)
{
return &es1371_onboard_device;
}
int
machine_at_ficka6130_init(const machine_t *model)
{

8
src/machine/m_at_socket370.c
View File

@@ -436,14 +436,6 @@ machine_at_cuv4xls_init(const machine_t *model)
return ret;
}
const device_t *
at_cuv4xls_get_device(void)
{
return &cmi8738_onboard_device;
}
int
machine_at_6via90ap_init(const machine_t *model)
{

8
src/machine/m_at_socket4.c
View File

@@ -363,14 +363,6 @@ machine_at_pb520r_init(const machine_t *model)
return ret;
}
const device_t *
at_pb520r_get_device(void)
{
return &gd5434_onboard_pci_device;
}
int
machine_at_excalibur_init(const machine_t *model)
{

7
src/machine/m_at_socket7.c
View File

@@ -418,13 +418,6 @@ machine_at_presario2240_init(const machine_t *model)
}
const device_t *
at_presario2240_get_device(void)
{
return &s3_trio64v2_dx_onboard_pci_device;
}
int
machine_at_presario4500_init(const machine_t *model)
{

24
src/machine/m_at_socket7_3v.c
View File

@@ -159,14 +159,6 @@ machine_at_thor_init(const machine_t *model)
return ret;
}
const device_t *
at_thor_get_device(void)
{
return &s3_phoenix_trio64vplus_onboard_pci_device;
}
int
machine_at_mrthor_init(const machine_t *model)
{
@@ -218,14 +210,6 @@ machine_at_endeavor_init(const machine_t *model)
return ret;
}
const device_t *
at_endeavor_get_device(void)
{
return &s3_phoenix_trio64_onboard_pci_device;
}
int
machine_at_ms5119_init(const machine_t *model)
{
@@ -289,14 +273,6 @@ machine_at_pb640_init(const machine_t *model)
return ret;
}
const device_t *
at_pb640_get_device(void)
{
return &gd5440_onboard_pci_device;
}
int
machine_at_fmb_init(const machine_t *model)
{

9
src/machine/m_pcjr.c
View File

@@ -788,7 +788,7 @@ static const device_config_t pcjr_config[] = {
{ .name = "", .description = "", .type = CONFIG_END }
};
static const device_t pcjr_device = {
const device_t pcjr_device = {
"IBM PCjr",
"pcjr",
0,
@@ -802,13 +802,6 @@ static const device_t pcjr_device = {
pcjr_config
};
const device_t *
pcjr_get_device(void)
{
return &pcjr_device;
}
int
machine_pcjr_init(const machine_t *model)
{

7
src/machine/m_ps1.c
View File

@@ -68,7 +68,7 @@
typedef struct {
int model;
rom_t high_rom;
rom_t mid_rom, high_rom;
uint8_t ps1_91,
ps1_92,
@@ -300,6 +300,11 @@ ps1_setup(int model)
io_sethandler(0x00e0, 2,
ps1_read, NULL, NULL, ps1_write, NULL, NULL, ps);
if (rom_present("roms/machines/ibmps1_2121/F80000.BIN")) {
rom_init(&ps->mid_rom,
"roms/machines/ibmps1_2121/F80000.BIN",
0xf80000, 0x40000, 0x3ffff, 0, MEM_MAPPING_EXTERNAL);
}
rom_init(&ps->high_rom,
"roms/machines/ibmps1_2121/FC0000.BIN",
0xfc0000, 0x40000, 0x3ffff, 0, MEM_MAPPING_EXTERNAL);

308
src/machine/m_ps2_isa.c
View File

@@ -1,5 +1,6 @@
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#include <86box/86box.h>
@@ -25,181 +26,194 @@
#include <86box/machine.h>
static uint8_t ps2_91, ps2_94, ps2_102, ps2_103, ps2_104, ps2_105, ps2_190;
static serial_t *ps2_uart;
typedef struct {
int model;
int cpu_type;
uint8_t ps2_91,
ps2_92,
ps2_94,
ps2_102,
ps2_103,
ps2_104,
ps2_105,
ps2_190;
serial_t *uart;
} ps2_isa_t;
static struct
static void
ps2_write(uint16_t port, uint8_t val, void *priv)
{
uint8_t status, int_status;
uint8_t attention, ctrl;
} ps2_hd;
ps2_isa_t *ps2 = (ps2_isa_t *)priv;
switch (port) {
case 0x0094:
ps2->ps2_94 = val;
break;
static uint8_t ps2_read(uint16_t port, void *p)
{
uint8_t temp;
case 0x0102:
if (!(ps2->ps2_94 & 0x80)) {
lpt1_remove();
serial_remove(ps2->uart);
if (val & 0x04) {
if (val & 0x08)
serial_setup(ps2->uart, COM1_ADDR, COM1_IRQ);
else
serial_setup(ps2->uart, COM2_ADDR, COM2_IRQ);
}
if (val & 0x10) {
switch ((val >> 5) & 3) {
case 0:
lpt1_init(LPT_MDA_ADDR);
break;
case 1:
lpt1_init(LPT1_ADDR);
break;
case 2:
lpt1_init(LPT2_ADDR);
break;
}
}
ps2->ps2_102 = val;
}
break;
switch (port)
{
case 0x91:
temp = ps2_91;
ps2_91 = 0;
return temp;
case 0x94:
return ps2_94;
case 0x102:
return ps2_102 | 8;
case 0x103:
return ps2_103;
case 0x104:
return ps2_104;
case 0x105:
return ps2_105;
case 0x190:
return ps2_190;
case 0x0103:
ps2->ps2_103 = val;
break;
#ifdef FIXME
case 0x322:
temp = ps2_hd.status;
break;
case 0x324:
temp = ps2_hd.int_status;
ps2_hd.int_status &= ~0x02;
break;
#endif
case 0x0104:
ps2->ps2_104 = val;
break;
default:
temp = 0xff;
break;
}
case 0x0105:
ps2->ps2_105 = val;
break;
return temp;
}
static void ps2_write(uint16_t port, uint8_t val, void *p)
{
switch (port)
{
case 0x94:
ps2_94 = val;
break;
case 0x102:
if (!(ps2_94 & 0x80)) {
lpt1_remove();
serial_remove(ps2_uart);
if (val & 0x04) {
if (val & 0x08)
serial_setup(ps2_uart, COM1_ADDR, COM1_IRQ);
else
serial_setup(ps2_uart, COM2_ADDR, COM2_IRQ);
}
if (val & 0x10) {
switch ((val >> 5) & 3)
{
case 0:
lpt1_init(LPT_MDA_ADDR);
break;
case 1:
lpt1_init(LPT1_ADDR);
break;
case 2:
lpt1_init(LPT2_ADDR);
break;
}
}
ps2_102 = val;
}
break;
case 0x103:
ps2_103 = val;
break;
case 0x104:
ps2_104 = val;
break;
case 0x105:
ps2_105 = val;
break;
case 0x190:
ps2_190 = val;
break;
#ifdef FIXME
case 0x322:
ps2_hd.ctrl = val;
if (val & 0x80)
ps2_hd.status |= 0x02;
break;
case 0x324:
ps2_hd.attention = val & 0xf0;
if (ps2_hd.attention)
ps2_hd.status = 0x14;
break;
#endif
}
case 0x0190:
ps2->ps2_190 = val;
break;
}
}
static void ps2board_init(void)
static uint8_t
ps2_read(uint16_t port, void *priv)
{
io_sethandler(0x0091, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL);
io_sethandler(0x0094, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL);
io_sethandler(0x0102, 0x0004, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL);
io_sethandler(0x0190, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL);
#ifdef FIXME
io_sethandler(0x0320, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL);
io_sethandler(0x0322, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL);
io_sethandler(0x0324, 0x0001, ps2_read, NULL, NULL, ps2_write, NULL, NULL, NULL);
#endif
ps2_isa_t *ps2 = (ps2_isa_t *)priv;
uint8_t temp = 0xff;
switch (port) {
case 0x0091:
temp = ps2->ps2_91;
ps2->ps2_91 = 0;
break;
case 0x0094:
temp = ps2->ps2_94;
break;
case 0x0102:
temp = ps2->ps2_102 | 0x08;
break;
case 0x0103:
temp = ps2->ps2_103;
break;
case 0x0104:
temp = ps2->ps2_104;
break;
case 0x0105:
temp = ps2->ps2_105;
break;
case 0x0190:
temp = ps2->ps2_190;
break;
}
return temp;
}
static void
ps2_isa_setup(int model, int cpu_type)
{
ps2_isa_t *ps2;
void *priv;
ps2 = (ps2_isa_t *)malloc(sizeof(ps2_isa_t));
memset(ps2, 0x00, sizeof(ps2_isa_t));
ps2->model = model;
ps2->cpu_type = cpu_type;
io_sethandler(0x0091, 1,
ps2_read, NULL, NULL, ps2_write, NULL, NULL, ps2);
io_sethandler(0x0094, 1,
ps2_read, NULL, NULL, ps2_write, NULL, NULL, ps2);
io_sethandler(0x0102, 4,
ps2_read, NULL, NULL, ps2_write, NULL, NULL, ps2);
io_sethandler(0x0190, 1,
ps2_read, NULL, NULL, ps2_write, NULL, NULL, ps2);
ps2->uart = device_add_inst(&ns16450_device, 1);
lpt1_remove();
lpt1_init(LPT_MDA_ADDR);
device_add(&port_92_device);
ps2_190 = 0;
mem_remap_top(384);
ps2_uart = device_add_inst(&ns16450_device, 1);
device_add(&ps_nvr_device);
lpt1_init(LPT_MDA_ADDR);
device_add(&fdc_at_ps1_device);
memset(&ps2_hd, 0, sizeof(ps2_hd));
/* Enable the builtin HDC. */
if (hdc_current == 1) {
priv = device_add(&ps1_hdc_device);
ps1_hdc_inform(priv, &ps2->ps2_91);
}
device_add(&ps1vga_device);
}
static void
ps2_isa_common_init(const machine_t *model)
{
machine_common_init(model);
refresh_at_enable = 1;
pit_ctr_set_out_func(&pit->counters[1], pit_refresh_timer_at);
dma16_init();
pic2_init();
device_add(&keyboard_ps2_device);
device_add(&port_6x_ps2_device);
}
int
machine_ps2_m30_286_init(const machine_t *model)
{
void *priv;
int ret;
int ret;
ret = bios_load_linear("roms/machines/ibmps2_m30_286/33f5381a.bin",
0x000e0000, 131072, 0);
ret = bios_load_linear("roms/machines/ibmps2_m30_286/33f5381a.bin",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
if (bios_only || !ret)
return ret;
ps2_isa_common_init(model);
machine_common_init(model);
ps2_isa_setup(30, 286);
mem_remap_top(384);
device_add(&fdc_at_ps1_device);
refresh_at_enable = 1;
pit_ctr_set_out_func(&pit->counters[1], pit_refresh_timer_at);
dma16_init();
device_add(&keyboard_ps2_device);
device_add(&port_6x_ps2_device);
device_add(&ps_nvr_device);
pic2_init();
ps2board_init();
device_add(&ps1vga_device);
/* Enable the builtin HDC. */
if (hdc_current == 1) {
priv = device_add(&ps1_hdc_device);
ps1_hdc_inform(priv, &ps2_91);
}
return ret;
return ret;
}

97
src/machine/m_ps2_mca.c
View File

@@ -253,9 +253,9 @@ static uint8_t model_50_read(uint16_t port)
switch (port)
{
case 0x100:
return 0xff;
return ps2.planar_id & 0xff;
case 0x101:
return 0xfb;
return ps2.planar_id >> 8;
case 0x102:
return ps2.option[0];
case 0x103:
@@ -277,9 +277,9 @@ static uint8_t model_55sx_read(uint16_t port)
switch (port)
{
case 0x100:
return 0xff;
return ps2.planar_id & 0xff;
case 0x101:
return 0xfb;
return ps2.planar_id >> 8;
case 0x102:
return ps2.option[0];
case 0x103:
@@ -325,9 +325,9 @@ static uint8_t model_80_read(uint16_t port)
switch (port)
{
case 0x100:
return 0xff;
return ps2.planar_id & 0xff;
case 0x101:
return 0xfd;
return ps2.planar_id >> 8;
case 0x102:
return ps2.option[0];
case 0x103:
@@ -829,17 +829,17 @@ static void ps2_mca_write(uint16_t port, uint8_t val, void *p)
static void ps2_mca_board_common_init()
{
io_sethandler(0x0091, 0x0001, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL);
io_sethandler(0x0094, 0x0001, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL);
io_sethandler(0x0096, 0x0001, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL);
io_sethandler(0x0100, 0x0008, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL);
io_sethandler(0x0091, 0x0001, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL);
io_sethandler(0x0094, 0x0001, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL);
io_sethandler(0x0096, 0x0001, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL);
io_sethandler(0x0100, 0x0008, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL);
device_add(&port_6x_ps2_device);
device_add(&port_92_device);
device_add(&port_92_device);
ps2.setup = 0xff;
ps2.setup = 0xff;
lpt1_init(LPT_MDA_ADDR);
lpt1_init(LPT_MDA_ADDR);
}
static uint8_t ps2_mem_expansion_read(int port, void *p)
@@ -951,12 +951,12 @@ static void ps2_mca_mem_d071_init(int start_mb)
}
static void ps2_mca_board_model_50_init()
static void ps2_mca_board_model_50_init(int slots)
{
ps2_mca_board_common_init();
mem_remap_top(384);
mca_init(4);
mca_init(slots);
device_add(&keyboard_ps2_mca_2_device);
ps2.planar_read = model_50_read;
@@ -972,7 +972,7 @@ static void ps2_mca_board_model_50_init()
device_add(&ps1vga_mca_device);
}
static void ps2_mca_board_model_55sx_init()
static void ps2_mca_board_model_55sx_init(int has_sec_nvram, int slots)
{
ps2_mca_board_common_init();
@@ -1015,11 +1015,16 @@ static void ps2_mca_board_model_55sx_init()
break;
}
mca_init(4);
mca_init(slots);
device_add(&keyboard_ps2_mca_device);
ps2.planar_read = model_55sx_read;
ps2.planar_write = model_55sx_write;
if (has_sec_nvram == 1)
device_add(&ps2_nvr_55ls_device);
else if (has_sec_nvram == 2)
device_add(&ps2_nvr_device);
ps2.planar_read = model_55sx_read;
ps2.planar_write = model_55sx_write;
if (gfxcard == VID_INTERNAL)
device_add(&ps1vga_mca_device);
@@ -1383,7 +1388,31 @@ machine_ps2_model_50_init(const machine_t *model)
machine_ps2_common_init(model);
ps2_mca_board_model_50_init();
ps2.planar_id = 0xfbff;
ps2_mca_board_model_50_init(4);
return ret;
}
int
machine_ps2_model_60_init(const machine_t *model)
{
int ret;
ret = bios_load_interleaved("roms/machines/ibmps2_m50/90x7420.zm13",
"roms/machines/ibmps2_m50/90x7429.zm18",
0x000f0000, 131072, 0);
ret &= bios_load_aux_interleaved("roms/machines/ibmps2_m50/90x7423.zm14",
"roms/machines/ibmps2_m50/90x7426.zm16",
0x000e0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_ps2_common_init(model);
ps2.planar_id = 0xf7ff;
ps2_mca_board_model_50_init(8);
return ret;
}
@@ -1403,12 +1432,33 @@ machine_ps2_model_55sx_init(const machine_t *model)
machine_ps2_common_init(model);
ps2_mca_board_model_55sx_init();
ps2.planar_id = 0xfffb;
ps2_mca_board_model_55sx_init(0, 4);
return ret;
}
int
machine_ps2_model_65sx_init(const machine_t *model)
{
int ret;
ret = bios_load_interleaved("roms/machines/ibmps2_m65sx/64F3608.BIN",
"roms/machines/ibmps2_m65sx/64F3611.BIN",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_ps2_common_init(model);
ps2.planar_id = 0xe3ff;
ps2_mca_board_model_55sx_init(1, 8);
return ret;
}
int
machine_ps2_model_70_type3_init(const machine_t *model)
{
@@ -1443,9 +1493,10 @@ machine_ps2_model_80_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_ps2_common_init(model);
machine_ps2_common_init(model);
ps2_mca_board_model_80_type2_init(0);
ps2.planar_id = 0xfdff;
ps2_mca_board_model_80_type2_init(0);
return ret;
}

28
src/machine/m_tandy.c
View File

@@ -1143,7 +1143,7 @@ vid_init(tandy_t *dev)
}
static const device_config_t vid_config[] = {
const device_config_t vid_config[] = {
{
.name = "display_type",
.description = "Display type",
@@ -1161,7 +1161,7 @@ static const device_config_t vid_config[] = {
{ .name = "", .description = "", .type = CONFIG_END }
};
static const device_t vid_device = {
const device_t vid_device = {
.name = "Tandy 1000",
.internal_name = "tandy1000_video",
.flags = 0,
@@ -1175,7 +1175,7 @@ static const device_t vid_device = {
.config = vid_config
};
static const device_t vid_device_hx = {
const device_t vid_device_hx = {
.name = "Tandy 1000 HX",
.internal_name = "tandy1000_hx_video",
.flags = 0,
@@ -1189,7 +1189,7 @@ static const device_t vid_device_hx = {
.config = vid_config
};
static const device_t vid_device_sl = {
const device_t vid_device_sl = {
.name = "Tandy 1000SL2",
.internal_name = "tandy1000_sl_video",
.flags = 0,
@@ -1203,26 +1203,6 @@ static const device_t vid_device_sl = {
.config = NULL
};
const device_t *
tandy1k_get_device(void)
{
return &vid_device;
}
const device_t *
tandy1k_hx_get_device(void)
{
return &vid_device_hx;
}
const device_t *
tandy1k_sl_get_device(void)
{
return &vid_device_sl;
}
static void
eep_write(uint16_t addr, uint8_t val, void *priv)
{

15
src/machine/m_xt_olivetti.c
View File

@@ -642,13 +642,6 @@ const device_t m19_vid_device = {
.config = m19_vid_config
};
const device_t *
m19_get_device(void)
{
return &m19_vid_device;
}
static uint8_t
m24_read(uint16_t port, void *priv)
{
@@ -738,14 +731,6 @@ m24_read(uint16_t port, void *priv)
return(ret);
}
const device_t *
m24_get_device(void)
{
return &ogc_m24_device;
}
int
machine_xt_m24_init(const machine_t *model)
{

8
src/machine/m_xt_t1000.c
View File

@@ -841,14 +841,6 @@ t1000_read_roml(uint32_t addr, void *priv)
return(*(uint32_t *)(&sys->romdrive[sys->rom_offset + (addr & 0xffff)]));
}
const device_t *
t1000_get_device(void)
{
return(&t1000_video_device);
}
int
machine_xt_t1000_init(const machine_t *model)
{

7
src/machine/m_xt_xi8088.c
View File

@@ -177,13 +177,6 @@ const device_t xi8088_device = {
.config = xi8088_config
};
const device_t *
xi8088_get_device(void)
{
return &xi8088_device;
}
int
machine_xt_xi8088_init(const machine_t *model)
{

6
src/machine/m_xt_zenith.c
View File

@@ -130,12 +130,6 @@ machine_zenith_init(const machine_t *model){
}
const device_t *
z184_get_device(void)
{
return &cga_device;
}
/*
* Current bugs and limitations:
* - missing NVRAM implementation

10590
src/machine/machine_table.c
View File

File diff suppressed because it is too large Load Diff

43
src/mem/mem.c
View File

@@ -1319,7 +1319,6 @@ writememll(uint32_t addr, uint32_t val)
uint32_t
readmemll_no_mmut(uint32_t addr, uint32_t *a64)
{
#ifndef NO_MMUT
mem_mapping_t *map;
GDBSTUB_MEM_ACCESS(addr, GDBSTUB_MEM_READ, 4);
@@ -1367,9 +1366,6 @@ readmemll_no_mmut(uint32_t addr, uint32_t *a64)
((uint32_t) (map->read_b(addr + 3, map->p)) << 24);
return 0xffffffff;
#else
return readmemll(addr);
#endif
}
@@ -1377,7 +1373,6 @@ readmemll_no_mmut(uint32_t addr, uint32_t *a64)
void
writememll_no_mmut(uint32_t addr, uint32_t *a64, uint32_t val)
{
#ifndef NO_MMUT
mem_mapping_t *map;
GDBSTUB_MEM_ACCESS(addr, GDBSTUB_MEM_WRITE, 4);
@@ -1435,9 +1430,6 @@ writememll_no_mmut(uint32_t addr, uint32_t *a64, uint32_t val)
map->write_b(addr + 3, val >> 24, map->p);
return;
}
#else
writememll(addr, val);
#endif
}
@@ -1668,7 +1660,7 @@ mem_readb_phys(uint32_t addr)
if (map) {
if (map->exec)
ret = map->exec[addr - map->base];
ret = map->exec[(addr - map->base) & map->mask];
else if (map->read_b)
ret = map->read_b(addr, map->p);
}
@@ -1686,7 +1678,7 @@ mem_readw_phys(uint32_t addr)
mem_logical_addr = 0xffffffff;
if (((addr & MEM_GRANULARITY_MASK) <= MEM_GRANULARITY_HBOUND) && (map && map->exec)) {
p = (uint16_t *) &(map->exec[addr - map->base]);
p = (uint16_t *) &(map->exec[(addr - map->base) & map->mask]);
ret = *p;
} else if (((addr & MEM_GRANULARITY_MASK) <= MEM_GRANULARITY_HBOUND) && (map && map->read_w))
ret = map->read_w(addr, map->p);
@@ -1708,7 +1700,7 @@ mem_readl_phys(uint32_t addr)
mem_logical_addr = 0xffffffff;
if (((addr & MEM_GRANULARITY_MASK) <= MEM_GRANULARITY_QBOUND) && (map && map->exec)) {
p = (uint32_t *) &(map->exec[addr - map->base]);
p = (uint32_t *) &(map->exec[(addr - map->base) & map->mask]);
ret = *p;
} else if (((addr & MEM_GRANULARITY_MASK) <= MEM_GRANULARITY_QBOUND) && (map && map->read_l))
ret = map->read_l(addr, map->p);
@@ -1750,7 +1742,7 @@ mem_writeb_phys(uint32_t addr, uint8_t val)
if (map) {
if (map->exec)
map->exec[addr - map->base] = val;
map->exec[(addr - map->base) & map->mask] = val;
else if (map->write_b)
map->write_b(addr, val, map->p);
}
@@ -1766,7 +1758,7 @@ mem_writew_phys(uint32_t addr, uint16_t val)
mem_logical_addr = 0xffffffff;
if (((addr & MEM_GRANULARITY_MASK) <= MEM_GRANULARITY_HBOUND) && (map && map->exec)) {
p = (uint16_t *) &(map->exec[addr - map->base]);
p = (uint16_t *) &(map->exec[(addr - map->base) & map->mask]);
*p = val;
} else if (((addr & MEM_GRANULARITY_MASK) <= MEM_GRANULARITY_HBOUND) && (map && map->write_w))
map->write_w(addr, val, map->p);
@@ -1786,7 +1778,7 @@ mem_writel_phys(uint32_t addr, uint32_t val)
mem_logical_addr = 0xffffffff;
if (((addr & MEM_GRANULARITY_MASK) <= MEM_GRANULARITY_QBOUND) && (map && map->exec)) {
p = (uint32_t *) &(map->exec[addr - map->base]);
p = (uint32_t *) &(map->exec[(addr - map->base) & map->mask]);
*p = val;
} else if (((addr & MEM_GRANULARITY_MASK) <= MEM_GRANULARITY_QBOUND) && (map && map->write_l))
map->write_l(addr, val, map->p);
@@ -2362,6 +2354,7 @@ mem_mapping_set(mem_mapping_t *map,
map->enable = 0;
map->base = base;
map->size = size;
map->mask = (map->size ? 0xffffffff : 0x00000000);
map->read_b = read_b;
map->read_w = read_w;
map->read_l = read_l;
@@ -2479,6 +2472,15 @@ mem_mapping_set_exec(mem_mapping_t *map, uint8_t *exec)
}
void
mem_mapping_set_mask(mem_mapping_t *map, uint32_t mask)
{
map->mask = mask;
mem_mapping_recalc(map->base, map->size);
}
void
mem_mapping_set_p(mem_mapping_t *map, void *p)
{
@@ -2560,6 +2562,8 @@ mem_a20_init(void)
{
if (is286) {
rammask = cpu_16bitbus ? 0xefffff : 0xffefffff;
if (is6117)
rammask |= 0x03000000;
flushmmucache();
mem_a20_state = mem_a20_key | mem_a20_alt;
} else {
@@ -2690,6 +2694,9 @@ mem_reset(void)
if (cpu_16bitbus) {
/* 80286/386SX; maximum address space is 16MB. */
m = 4096;
/* ALi M6117; maximum address space is 64MB. */
if (is6117)
m <<= 2;
} else {
/* 80386DX+; maximum address space is 4GB. */
m = 1048576;
@@ -2761,8 +2768,10 @@ mem_reset(void)
mem_init_ram_mapping(&ram_low_mapping, 0x000000, (mem_size > 640) ? 0xa0000 : mem_size * 1024);
if (mem_size > 1024) {
if (cpu_16bitbus && mem_size > 16256)
if (cpu_16bitbus && !is6117 && mem_size > 16256)
mem_init_ram_mapping(&ram_high_mapping, 0x100000, (16256 - 1024) * 1024);
else if (cpu_16bitbus && is6117 && mem_size > 65408)
mem_init_ram_mapping(&ram_high_mapping, 0x100000, (65408 - 1024) * 1024);
else {
if (mem_size > 1048576) {
mem_init_ram_mapping(&ram_high_mapping, 0x100000, (1048576 - 1024) * 1024);
@@ -2904,9 +2913,13 @@ mem_a20_recalc(void)
state = mem_a20_key | mem_a20_alt;
if (state && !mem_a20_state) {
rammask = (cpu_16bitbus) ? 0xffffff : 0xffffffff;
if (is6117)
rammask |= 0x03000000;
flushmmucache();
} else if (!state && mem_a20_state) {
rammask = (cpu_16bitbus) ? 0xefffff : 0xffefffff;
if (is6117)
rammask |= 0x03000000;
flushmmucache();
}

13
src/mem/rom.c
View File

@@ -451,12 +451,13 @@ static void
bios_add(void)
{
int temp_cpu_type, temp_cpu_16bitbus = 1;
int temp_is286 = 0;
int temp_is286 = 0, temp_is6117 = 0;
if (/*AT && */cpu_s) {
temp_cpu_type = cpu_s->cpu_type;
temp_cpu_16bitbus = (temp_cpu_type == CPU_286 || temp_cpu_type == CPU_386SX || temp_cpu_type == CPU_486SLC || temp_cpu_type == CPU_IBM386SLC || temp_cpu_type == CPU_IBM486SLC );
temp_is286 = (temp_cpu_type >= CPU_286);
temp_is6117 = !strcmp(cpu_f->manufacturer, "ALi");
}
if (biosmask > 0x1ffff) {
@@ -478,7 +479,15 @@ bios_add(void)
MEM_READ_ROMCS | MEM_WRITE_ROMCS);
}
if (temp_is286) {
if (temp_is6117) {
mem_mapping_add(&bios_high_mapping, biosaddr | 0x03f00000, biosmask + 1,
bios_read,bios_readw,bios_readl,
NULL,NULL,NULL,
rom, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, 0);
mem_set_mem_state_both(biosaddr | 0x03f00000, biosmask + 1,
MEM_READ_ROMCS | MEM_WRITE_ROMCS);
} else if (temp_is286) {
mem_mapping_add(&bios_high_mapping, biosaddr | (temp_cpu_16bitbus ? 0x00f00000 : 0xfff00000), biosmask + 1,
bios_read,bios_readw,bios_readl,
NULL,NULL,NULL,

8
src/mem/spd.c
View File

@@ -359,7 +359,7 @@ spd_write_drbs(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t drb_unit
/* No SPD: split SIMMs into pairs as if they were "DIMM"s. */
if (!spd_present) {
dimm = ((reg_max - reg_min) + 1) >> 1; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */
spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].max_ram >> 10) / dimm)), 0);
spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].ram.max >> 10) / dimm)), 0);
}
/* Write DRBs for each row. */
@@ -411,7 +411,7 @@ spd_write_drbs_with_ext(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint8_t
/* No SPD: split SIMMs into pairs as if they were "DIMM"s. */
if (!spd_present) {
dimm = ((reg_max - reg_min) + 1) >> 1; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */
spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].max_ram >> 10) / dimm)), 0);
spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].ram.max >> 10) / dimm)), 0);
}
/* Write DRBs for each row. */
@@ -462,7 +462,7 @@ spd_write_drbs_interleaved(uint8_t *regs, uint8_t reg_min, uint8_t reg_max, uint
/* No SPD: split SIMMs into pairs as if they were "DIMM"s. */
if (!spd_present) {
dimm = ((reg_max - reg_min) + 1) >> 2; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */
spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].max_ram >> 10) / dimm)), 0);
spd_populate(rows, dimm, mem_size >> 10, drb_unit, 1 << (log2i((machines[machine].ram.max >> 10) / dimm)), 0);
}
/* Write DRBs for each row. */
@@ -514,7 +514,7 @@ spd_write_drbs_ali1621(uint8_t *regs, uint8_t reg_min, uint8_t reg_max)
/* No SPD: split SIMMs into pairs as if they were "DIMM"s. */
if (!spd_present) {
dimm = ((reg_max - reg_min) + 1) >> 2; /* amount of "DIMM"s, also used to determine the maximum "DIMM" size */
spd_populate(rows, dimm, mem_size >> 10, 4, 1 << (log2i((machines[machine].max_ram >> 10) / dimm)), 0);
spd_populate(rows, dimm, mem_size >> 10, 4, 1 << (log2i((machines[machine].ram.max >> 10) / dimm)), 0);
}
/* Write DRBs for each row. */

15
src/mem/sst_flash.c
View File

@@ -400,10 +400,17 @@ sst_add_mappings(sst_t *dev)
sst_write, NULL, NULL,
dev->array + fbase, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev);
}
mem_mapping_add(&(dev->mapping_h[i]), (base | (cpu_16bitbus ? 0xf00000 : 0xfff00000)), 0x10000,
sst_read, sst_readw, sst_readl,
sst_write, NULL, NULL,
dev->array + fbase, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev);
if (is6117) {
mem_mapping_add(&(dev->mapping_h[i]), (base | 0x3f00000), 0x10000,
sst_read, sst_readw, sst_readl,
sst_write, NULL, NULL,
dev->array + fbase, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev);
} else {
mem_mapping_add(&(dev->mapping_h[i]), (base | (cpu_16bitbus ? 0xf00000 : 0xfff00000)), 0x10000,
sst_read, sst_readw, sst_readl,
sst_write, NULL, NULL,
dev->array + fbase, MEM_MAPPING_EXTERNAL|MEM_MAPPING_ROM|MEM_MAPPING_ROMCS, (void *) dev);
}
}
}

2
src/network/net_ne2000.c
View File

@@ -1211,7 +1211,7 @@ static const device_config_t ne2000_config[] = {
.description = "IRQ",
.type = CONFIG_SELECTION,
.default_string = "",
.default_int = 3,
.default_int = 10,
.file_filter = "",
.spinner = { 0 },
.selection = {

18
src/nvr_at.c
View File

@@ -466,11 +466,11 @@ timer_update(void *priv)
check_alarm_via(nvr, RTC_MONTH, RTC_ALMONT_SIS)*/) {
nvr->regs[RTC_REGC] |= REGC_AF;
if (nvr->regs[RTC_REGB] & REGB_AIE) {
nvr->regs[RTC_REGC] |= REGC_IRQF;
/* Generate an interrupt. */
if (nvr->irq != -1)
if ((nvr->irq != -1) && (!(nvr->regs[RTC_REGC] & REGC_IRQF)))
picint(1 << nvr->irq);
nvr->regs[RTC_REGC] |= REGC_IRQF;
}
}
@@ -480,11 +480,11 @@ timer_update(void *priv)
*/
nvr->regs[RTC_REGC] |= REGC_UF;
if (nvr->regs[RTC_REGB] & REGB_UIE) {
nvr->regs[RTC_REGC] |= REGC_IRQF;
/* Generate an interrupt. */
if (nvr->irq != -1)
if ((nvr->irq != -1) && (!(nvr->regs[RTC_REGC] & REGC_IRQF)))
picint(1 << nvr->irq);
nvr->regs[RTC_REGC] |= REGC_IRQF;
}
}
}
@@ -532,11 +532,11 @@ timer_intr(void *priv)
nvr->regs[RTC_REGC] |= REGC_PF;
if (nvr->regs[RTC_REGB] & REGB_PIE) {
nvr->regs[RTC_REGC] |= REGC_IRQF;
/* Generate an interrupt. */
if (nvr->irq != -1)
if ((nvr->irq != -1) && (!(nvr->regs[RTC_REGC] & REGC_IRQF)))
picint(1 << nvr->irq);
nvr->regs[RTC_REGC] |= REGC_IRQF;
}
}
}

35
src/nvr_ps2.c
View File

@@ -53,7 +53,8 @@
typedef struct {
int addr;
uint8_t ram[8192];
uint8_t *ram;
int size;
char *fn;
} ps2_nvr_t;
@@ -114,6 +115,11 @@ ps2_nvr_init(const device_t *info)
nvr = (ps2_nvr_t *)malloc(sizeof(ps2_nvr_t));
memset(nvr, 0x00, sizeof(ps2_nvr_t));
if (info->local)
nvr->size = 2048;
else
nvr->size = 8192;
/* Set up the NVR file's name. */
c = strlen(machine_get_internal_name()) + 9;
nvr->fn = (char *)malloc(c + 1);
@@ -124,9 +130,10 @@ ps2_nvr_init(const device_t *info)
f = nvr_fopen(nvr->fn, "rb");
memset(nvr->ram, 0xff, 8192);
nvr->ram = (uint8_t *)malloc(nvr->size);
memset(nvr->ram, 0xff, nvr->size);
if (f != NULL) {
if (fread(nvr->ram, 1, 8192, f) != 8192)
if (fread(nvr->ram, 1, nvr->size, f) != nvr->size)
fatal("ps2_nvr_init(): Error reading EEPROM data\n");
fclose(f);
}
@@ -144,16 +151,18 @@ ps2_nvr_close(void *priv)
f = nvr_fopen(nvr->fn, "wb");
if (f != NULL) {
(void)fwrite(nvr->ram, 8192, 1, f);
(void)fwrite(nvr->ram, nvr->size, 1, f);
fclose(f);
}
if (nvr->ram != NULL)
free(nvr->ram);
free(nvr);
}
const device_t ps2_nvr_device = {
.name = "PS/2 Secondary NVRAM",
.name = "PS/2 Secondary NVRAM for PS/2 Models 70-80",
.internal_name = "ps2_nvr",
.flags = 0,
.local = 0,
@@ -165,3 +174,17 @@ const device_t ps2_nvr_device = {
.force_redraw = NULL,
.config = NULL
};
const device_t ps2_nvr_55ls_device = {
.name = "PS/2 Secondary NVRAM for PS/2 Models 55LS-65SX",
.internal_name = "ps2_nvr_55ls",
.flags = 0,
.local = 1,
.init = ps2_nvr_init,
.close = ps2_nvr_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};

6
src/qt/qt_harddiskdialog.cpp
View File

@@ -138,6 +138,10 @@ QString HarddiskDialog::fileName() const {
return ui->fileField->fileName();
}
uint32_t HarddiskDialog::speed() const {
return static_cast<uint32_t>(ui->comboBoxSpeed->currentData().toUInt());
}
void HarddiskDialog::on_comboBoxFormat_currentIndexChanged(int index) {
bool enabled;
if (index == 5) { /* They switched to a diff VHD; disable the geometry fields. */
@@ -700,6 +704,8 @@ void HarddiskDialog::on_comboBoxBus_currentIndexChanged(int index) {
ui->lineEditSectors->setValidator(new QIntValidator(1, max_sectors, this));
Harddrives::populateBusChannels(ui->comboBoxChannel->model(), ui->comboBoxBus->currentData().toInt());
Harddrives::populateSpeeds(ui->comboBoxSpeed->model(), ui->comboBoxBus->currentData().toInt());
switch (ui->comboBoxBus->currentData().toInt())
{
case HDD_BUS_MFM:

1
src/qt/qt_harddiskdialog.hpp
View File

@@ -21,6 +21,7 @@ public:
uint32_t cylinders() const { return cylinders_; }
uint32_t heads() const { return heads_; }
uint32_t sectors() const { return sectors_; }
uint32_t speed() const;
signals:
void fileProgress(int i);

10
src/qt/qt_harddiskdialog.ui
View File

@@ -42,6 +42,16 @@
</property>
</widget>
</item>
<item row="6" column="4">
<widget class="QLabel" name="label_9">
<property name="text">
<string>Speed:</string>
</property>
</widget>
</item>
<item row="6" column="5">
<widget class="QComboBox" name="comboBoxSpeed"/>
</item>
<item row="3" column="4">
<widget class="QLabel" name="label_5">
<property name="text">

21
src/qt/qt_harddrive_common.cpp
View File

@@ -54,6 +54,27 @@ void Harddrives::populateRemovableBuses(QAbstractItemModel *model) {
model->setData(model->index(2, 0), HDD_BUS_SCSI, Qt::UserRole);
}
void Harddrives::populateSpeeds(QAbstractItemModel *model, int bus) {
int num_preset;
switch (bus) {
case HDD_BUS_IDE:
num_preset = hdd_preset_get_num();
break;
default:
num_preset = 1;
}
model->removeRows(0, model->rowCount());
model->insertRows(0, num_preset);
for (int i = 0; i < num_preset; i++) {
model->setData(model->index(i, 0), QObject::tr(hdd_preset_getname(i)));
model->setData(model->index(i, 0), i, Qt::UserRole);
}
}
void Harddrives::populateBusChannels(QAbstractItemModel *model, int bus) {
model->removeRows(0, model->rowCount());

1
src/qt/qt_harddrive_common.hpp
View File

@@ -10,6 +10,7 @@ namespace Harddrives {
void populateBuses(QAbstractItemModel* model);
void populateRemovableBuses(QAbstractItemModel* model);
void populateBusChannels(QAbstractItemModel* model, int bus);
void populateSpeeds(QAbstractItemModel* model, int bus);
QString BusChannelName(uint8_t bus, uint8_t channel);
inline SettingsBusTracking* busTrackClass = nullptr;
};

4
src/qt/qt_rendererstack.cpp
View File

@@ -314,7 +314,6 @@ RendererStack::createRenderer(Renderer renderer)
connect(hw, &OpenGLRenderer::errorInitializing, [=]() {
/* Renderer not could initialize, fallback to software. */
imagebufs = {};
endblit();
QTimer::singleShot(0, this, [this]() { switchRenderer(Renderer::Software); });
});
current.reset(this->createWindowContainer(hw, this));
@@ -332,7 +331,6 @@ RendererStack::createRenderer(Renderer renderer)
msgBox->setAttribute(Qt::WA_DeleteOnClose);
msgBox->show();
imagebufs = {};
endblit();
QTimer::singleShot(0, this, [this]() { switchRenderer(Renderer::Software); });
});
connect(hw, &D3D9Renderer::initialized, this, [this]()
@@ -356,7 +354,6 @@ RendererStack::createRenderer(Renderer renderer)
msgBox->setAttribute(Qt::WA_DeleteOnClose);
msgBox->show();
imagebufs = {};
endblit();
QTimer::singleShot(0, this, [this]() { switchRenderer(Renderer::Software); });
current.reset(nullptr);
break;
@@ -375,7 +372,6 @@ RendererStack::createRenderer(Renderer renderer)
msgBox->setAttribute(Qt::WA_DeleteOnClose);
msgBox->show();
imagebufs = {};
endblit();
QTimer::singleShot(0, this, [this]() { switchRenderer(Renderer::Software); });
});
current.reset(this->createWindowContainer(hw, this));

2
src/qt/qt_settings.cpp
View File

@@ -143,7 +143,7 @@ Settings::Settings(QWidget *parent) :
ui->stackedWidget->setCurrentIndex(current.row());
});
ui->listView->setMaximumWidth(ui->listView->sizeHintForColumn(0) + qApp->style()->pixelMetric(QStyle::PM_ScrollBarExtent));
ui->listView->setMinimumWidth(ui->listView->sizeHintForColumn(0) + qApp->style()->pixelMetric(QStyle::PM_ScrollBarExtent));
Settings::settings = this;
}

32
src/qt/qt_settingsharddisks.cpp
View File

@@ -37,6 +37,7 @@ const int ColumnCylinders = 2;
const int ColumnHeads = 3;
const int ColumnSectors = 4;
const int ColumnSize = 5;
const int ColumnSpeed = 6;
const int DataBus = Qt::UserRole;
const int DataBusChannel = Qt::UserRole + 1;
@@ -94,6 +95,8 @@ static void addRow(QAbstractItemModel* model, hard_disk_t* hd) {
model->setData(model->index(row, ColumnHeads), hd->hpc);
model->setData(model->index(row, ColumnSectors), hd->spt);
model->setData(model->index(row, ColumnSize), (hd->tracks * hd->hpc * hd->spt) >> 11);
model->setData(model->index(row, ColumnSpeed), hdd_preset_getname(hd->speed_preset));
model->setData(model->index(row, ColumnSpeed), hd->speed_preset, Qt::UserRole);
}
SettingsHarddisks::SettingsHarddisks(QWidget *parent) :
@@ -102,13 +105,14 @@ SettingsHarddisks::SettingsHarddisks(QWidget *parent) :
{
ui->setupUi(this);
QAbstractItemModel* model = new QStandardItemModel(0, 6, this);
QAbstractItemModel* model = new QStandardItemModel(0, 7, this);
model->setHeaderData(ColumnBus, Qt::Horizontal, tr("Bus"));
model->setHeaderData(ColumnFilename, Qt::Horizontal, tr("File"));
model->setHeaderData(ColumnCylinders, Qt::Horizontal, tr("C"));
model->setHeaderData(ColumnHeads, Qt::Horizontal, tr("H"));
model->setHeaderData(ColumnSectors, Qt::Horizontal, tr("S"));
model->setHeaderData(ColumnSize, Qt::Horizontal, tr("MiB"));
model->setHeaderData(ColumnSpeed, Qt::Horizontal, tr("Speed"));
ui->tableView->setModel(model);
for (int i = 0; i < HDD_NUM; i++) {
@@ -149,6 +153,7 @@ void SettingsHarddisks::save() {
hdd[i].tracks = idx.siblingAtColumn(ColumnCylinders).data().toUInt();
hdd[i].hpc = idx.siblingAtColumn(ColumnHeads).data().toUInt();
hdd[i].spt = idx.siblingAtColumn(ColumnSectors).data().toUInt();
hdd[i].speed_preset = idx.siblingAtColumn(ColumnSpeed).data(Qt::UserRole).toUInt();
QByteArray fileName = idx.siblingAtColumn(ColumnFilename).data(Qt::UserRole).toString().toUtf8();
strncpy(hdd[i].fn, fileName.data(), sizeof(hdd[i].fn) - 1);
@@ -173,6 +178,7 @@ void SettingsHarddisks::on_comboBoxBus_currentIndexChanged(int index) {
}
Harddrives::populateBusChannels(ui->comboBoxChannel->model(), ui->comboBoxBus->currentData().toInt());
Harddrives::populateSpeeds(ui->comboBoxSpeed->model(), ui->comboBoxBus->currentData().toInt());
int chanIdx = 0;
switch (ui->comboBoxBus->currentData().toInt())
@@ -221,15 +227,32 @@ void SettingsHarddisks::on_comboBoxChannel_currentIndexChanged(int index) {
}
}
void SettingsHarddisks::on_comboBoxSpeed_currentIndexChanged(int index) {
if (index < 0) {
return;
}
auto idx = ui->tableView->selectionModel()->currentIndex();
if (idx.isValid()) {
auto* model = ui->tableView->model();
auto col = idx.siblingAtColumn(ColumnSpeed);
model->setData(col, ui->comboBoxSpeed->currentData(Qt::UserRole), Qt::UserRole);
model->setData(col, hdd_preset_getname(ui->comboBoxSpeed->currentData(Qt::UserRole).toUInt()));
}
}
void SettingsHarddisks::onTableRowChanged(const QModelIndex &current) {
bool hidden = !current.isValid();
ui->labelBus->setHidden(hidden);
ui->labelChannel->setHidden(hidden);
ui->labelSpeed->setHidden(hidden);
ui->comboBoxBus->setHidden(hidden);
ui->comboBoxChannel->setHidden(hidden);
ui->comboBoxSpeed->setHidden(hidden);
uint32_t bus = current.siblingAtColumn(ColumnBus).data(DataBus).toUInt();
uint32_t busChannel = current.siblingAtColumn(ColumnBus).data(DataBusChannel).toUInt();
uint32_t speed = current.siblingAtColumn(ColumnSpeed).data(Qt::UserRole).toUInt();
auto* model = ui->comboBoxBus->model();
auto match = model->match(model->index(0, 0), Qt::UserRole, bus);
@@ -241,6 +264,12 @@ void SettingsHarddisks::onTableRowChanged(const QModelIndex &current) {
if (! match.isEmpty()) {
ui->comboBoxChannel->setCurrentIndex(match.first().row());
}
model = ui->comboBoxSpeed->model();
match = model->match(model->index(0, 0), Qt::UserRole, speed);
if (! match.isEmpty()) {
ui->comboBoxSpeed->setCurrentIndex(match.first().row());
}
}
static void addDriveFromDialog(Ui::SettingsHarddisks* ui, const HarddiskDialog& dlg) {
@@ -255,6 +284,7 @@ static void addDriveFromDialog(Ui::SettingsHarddisks* ui, const HarddiskDialog&
hd.hpc = dlg.heads();
hd.spt = dlg.sectors();
strncpy(hd.fn, fn.data(), sizeof(hd.fn) - 1);
hd.speed_preset = dlg.speed();
addRow(ui->tableView->model(), &hd);
ui->tableView->resizeColumnsToContents();

1
src/qt/qt_settingsharddisks.hpp
View File

@@ -19,6 +19,7 @@ public:
private slots:
void on_comboBoxChannel_currentIndexChanged(int index);
void on_comboBoxSpeed_currentIndexChanged(int index);
private slots:
void on_pushButtonRemove_clicked();

10
src/qt/qt_settingsharddisks.ui
View File

@@ -64,6 +64,16 @@
<item>
<widget class="QComboBox" name="comboBoxChannel"/>
</item>
<item>
<widget class="QLabel" name="labelSpeed">
<property name="text">
<string>Speed:</string>
</property>
</widget>
</item>
<item>
<widget class="QComboBox" name="comboBoxSpeed"/>
</item>
</layout>
</item>
<item>

30
src/sio/sio_82091aa.c
View File

@@ -125,11 +125,13 @@ serial_handler(i82091aa_t *dev, int uart)
static void
ide_handler(i82091aa_t *dev)
{
ide_sec_disable();
ide_set_base(1, (dev->regs[0x50] & 0x02) ? 0x170 : 0x1f0);
ide_set_side(1, (dev->regs[0x50] & 0x02) ? 0x376 : 0x3f6);
int board = dev->has_ide - 1;
ide_remove_handlers(board);
ide_set_base(board, (dev->regs[0x50] & 0x02) ? 0x170 : 0x1f0);
ide_set_side(board, (dev->regs[0x50] & 0x02) ? 0x376 : 0x3f6);
if (dev->regs[0x50] & 0x01)
ide_sec_enable();
ide_set_handlers(board);
}
@@ -258,7 +260,7 @@ i82091aa_init(const device_t *info)
dev->uart[0] = device_add_inst(&ns16550_device, 1);
dev->uart[1] = device_add_inst(&ns16550_device, 2);
dev->has_ide = !!(info->local & 0x200);
dev->has_ide = (info->local >> 9) & 0x03;
i82091aa_reset(dev);
@@ -303,8 +305,8 @@ const device_t i82091aa_398_device = {
.config = NULL
};
const device_t i82091aa_ide_device = {
.name = "Intel 82091AA Super I/O (With IDE)",
const device_t i82091aa_ide_pri_device = {
.name = "Intel 82091AA Super I/O (With Primary IDE)",
.internal_name = "i82091aa_ide",
.flags = 0,
.local = 0x240,
@@ -316,3 +318,17 @@ const device_t i82091aa_ide_device = {
.force_redraw = NULL,
.config = NULL
};
const device_t i82091aa_ide_device = {
.name = "Intel 82091AA Super I/O (With IDE)",
.internal_name = "i82091aa_ide",
.flags = 0,
.local = 0x440,
.init = i82091aa_init,
.close = i82091aa_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};

24
src/sio/sio_w83787f.c
View File

@@ -34,6 +34,7 @@
#include <86box/fdc.h>
#include <86box/hdc.h>
#include <86box/hdc_ide.h>
#include <86box/gameport.h>
#include <86box/sio.h>
#ifdef ENABLE_W83787_LOG
@@ -82,6 +83,7 @@ typedef struct {
ide_start;
fdc_t *fdc;
serial_t *uart[2];
void *gameport;
} w83787f_t;
@@ -200,6 +202,16 @@ w83787f_lpt_handler(w83787f_t *dev)
}
static void
w83787f_gameport_handler(w83787f_t *dev)
{
if (!(dev->regs[3] & 0x40) && !(dev->regs[4] & 0x40))
gameport_remap(dev->gameport, 0x201);
else
gameport_remap(dev->gameport, 0);
}
static void
w83787f_fdc_handler(w83787f_t *dev)
{
@@ -282,6 +294,8 @@ w83787f_write(uint16_t port, uint8_t val, void *priv)
case 3:
if (valxor & 0x80)
w83787f_lpt_handler(dev);
if (valxor & 0x40)
w83787f_gameport_handler(dev);
if (valxor & 0x08)
w83787f_serial_handler(dev, 0);
if (valxor & 0x04)
@@ -294,6 +308,8 @@ w83787f_write(uint16_t port, uint8_t val, void *priv)
w83787f_serial_handler(dev, 0);
if (valxor & 0x80)
w83787f_lpt_handler(dev);
if (valxor & 0x40)
w83787f_gameport_handler(dev);
break;
case 6:
if (valxor & 0x08)
@@ -392,16 +408,20 @@ w83787f_reset(w83787f_t *dev)
fdc_reset(dev->fdc);
dev->regs[0x01] = 0x2C;
dev->regs[0x03] = 0x30;
dev->regs[0x03] = 0x70;
dev->regs[0x07] = 0xF5;
dev->regs[0x09] = dev->reg_init & 0xff;
dev->regs[0x0a] = 0x1F;
dev->regs[0x0c] = 0x2C;
dev->regs[0x0d] = 0xA3;
gameport_remap(dev->gameport, 0);
serial_setup(dev->uart[0], COM1_ADDR, COM1_IRQ);
serial_setup(dev->uart[1], COM2_ADDR, COM2_IRQ);
w83787f_lpt_handler(dev);
dev->key = 0x89;
w83787f_remap(dev);
@@ -433,6 +453,8 @@ w83787f_init(const device_t *info)
dev->uart[0] = device_add_inst(&ns16550_device, 1);
dev->uart[1] = device_add_inst(&ns16550_device, 2);
dev->gameport = gameport_add(&gameport_sio_1io_device);
if ((dev->ide_function & 0x30) == 0x10)
device_add(&ide_isa_device);

22
src/sound/snd_sb.c
View File

@@ -1816,6 +1816,16 @@ sb_16_pnp_init(const device_t *info)
isapnp_add_card(sb_16_pnp_rom, sizeof(sb_16_pnp_rom), sb_16_pnp_config_changed, NULL, NULL, NULL, sb);
sb_dsp_setaddr(&sb->dsp, 0);
sb_dsp_setirq(&sb->dsp, 0);
sb_dsp_setdma8(&sb->dsp, ISAPNP_DMA_DISABLED);
sb_dsp_setdma16(&sb->dsp, ISAPNP_DMA_DISABLED);
mpu401_change_addr(sb->mpu, 0);
ide_remove_handlers(2);
gameport_remap(sb->gameport, 0);
return sb;
}
@@ -2017,6 +2027,18 @@ sb_awe32_pnp_init(const device_t *info)
break;
}
sb_dsp_setaddr(&sb->dsp, 0);
sb_dsp_setirq(&sb->dsp, 0);
sb_dsp_setdma8(&sb->dsp, ISAPNP_DMA_DISABLED);
sb_dsp_setdma16(&sb->dsp, ISAPNP_DMA_DISABLED);
mpu401_change_addr(sb->mpu, 0);
ide_remove_handlers(2);
emu8k_change_addr(&sb->emu8k, 0);
gameport_remap(sb->gameport, 0);
return sb;
}

32
src/sound/snd_sb_dsp.c
View File

@@ -326,14 +326,14 @@ void
sb_dsp_speed_changed(sb_dsp_t *dsp)
{
if (dsp->sb_timeo < 256)
dsp->sblatcho = TIMER_USEC * (256 - dsp->sb_timeo);
dsp->sblatcho = (256.0 - (double) dsp->sb_timeo);
else
dsp->sblatcho = (uint64_t) (TIMER_USEC * (1000000.0f / (float) (dsp->sb_timeo - 256)));
dsp->sblatcho = ((1000000.0 / ((double) dsp->sb_timeo - 256.0)));
if (dsp->sb_timei < 256)
dsp->sblatchi = TIMER_USEC * (256 - dsp->sb_timei);
dsp->sblatchi = (256.0 - (double) dsp->sb_timei);
else
dsp->sblatchi = (uint64_t) (TIMER_USEC * (1000000.0f / (float) (dsp->sb_timei - 256)));
dsp->sblatchi = ((1000000.0 / ((double) dsp->sb_timei - 256.0)));
}
void
@@ -359,7 +359,7 @@ sb_start_dma(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int len)
dsp->sb_16_enable = 0;
dsp->sb_8_output = 1;
if (!timer_is_enabled(&dsp->output_timer))
timer_set_delay_u64(&dsp->output_timer, dsp->sblatcho);
timer_on_auto(&dsp->output_timer, dsp->sblatcho);
dsp->sbleftright = dsp->sbleftright_default;
dsp->sbdacpos = 0;
} else {
@@ -372,7 +372,7 @@ sb_start_dma(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int len)
dsp->sb_8_enable = 0;
dsp->sb_16_output = 1;
if (!timer_is_enabled(&dsp->output_timer))
timer_set_delay_u64(&dsp->output_timer, dsp->sblatcho);
timer_on_auto(&dsp->output_timer, dsp->sblatcho);
}
}
@@ -389,7 +389,7 @@ sb_start_dma_i(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int len)
dsp->sb_16_enable = 0;
dsp->sb_8_output = 0;
if (!timer_is_enabled(&dsp->input_timer))
timer_set_delay_u64(&dsp->input_timer, dsp->sblatchi);
timer_on_auto(&dsp->input_timer, dsp->sblatchi);
} else {
dsp->sb_16_length = dsp->sb_16_origlength = len;
dsp->sb_16_format = format;
@@ -400,7 +400,7 @@ sb_start_dma_i(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int len)
dsp->sb_8_enable = 0;
dsp->sb_16_output = 0;
if (!timer_is_enabled(&dsp->input_timer))
timer_set_delay_u64(&dsp->input_timer, dsp->sblatchi);
timer_on_auto(&dsp->input_timer, dsp->sblatchi);
}
memset(dsp->record_buffer, 0, sizeof(dsp->record_buffer));
@@ -508,10 +508,10 @@ sb_exec_command(sb_dsp_t *dsp)
mode does not imply such samplerate. Position is increased in sb_poll_i(). */
if (!timer_is_enabled(&dsp->input_timer)) {
dsp->sb_timei = 256 - 22;
dsp->sblatchi = TIMER_USEC * 22;
dsp->sblatchi = 22.0;
temp = 1000000 / 22;
dsp->sb_freq = temp;
timer_set_delay_u64(&dsp->input_timer, dsp->sblatchi);
timer_on_auto(&dsp->input_timer, dsp->sblatchi);
}
break;
case 0x24: /* 8-bit single cycle DMA input */
@@ -561,7 +561,7 @@ sb_exec_command(sb_dsp_t *dsp)
break;
case 0x40: /* Set time constant */
dsp->sb_timei = dsp->sb_timeo = dsp->sb_data[0];
dsp->sblatcho = dsp->sblatchi = TIMER_USEC * (256 - dsp->sb_data[0]);
dsp->sblatcho = dsp->sblatchi = (256.0 - (double) dsp->sb_data[0]);
temp = 256 - dsp->sb_data[0];
temp = 1000000 / temp;
sb_dsp_log("Sample rate - %ihz (%i)\n", temp, dsp->sblatcho);
@@ -572,8 +572,8 @@ sb_exec_command(sb_dsp_t *dsp)
case 0x41: /* Set output sampling rate */
case 0x42: /* Set input sampling rate */
if (dsp->sb_type >= SB16) {
dsp->sblatcho = (uint64_t) (TIMER_USEC * (1000000.0f / (float) (dsp->sb_data[1] + (dsp->sb_data[0] << 8))));
sb_dsp_log("Sample rate - %ihz (%i)\n", dsp->sb_data[1] + (dsp->sb_data[0] << 8), dsp->sblatcho);
dsp->sblatcho = ((1000000.0 / (double) (dsp->sb_data[1] + (dsp->sb_data[0] << 8))));
sb_dsp_log("Sample rate - %ihz (%lf)\n", dsp->sb_data[1] + (dsp->sb_data[0] << 8), dsp->sblatcho);
temp = dsp->sb_freq;
dsp->sb_freq = dsp->sb_data[1] + (dsp->sb_data[0] << 8);
dsp->sb_timeo = 256LL + dsp->sb_freq;
@@ -631,7 +631,7 @@ sb_exec_command(sb_dsp_t *dsp)
case 0x80: /* Pause DAC */
dsp->sb_pausetime = dsp->sb_data[0] + (dsp->sb_data[1] << 8);
if (!timer_is_enabled(&dsp->output_timer))
timer_set_delay_u64(&dsp->output_timer, dsp->sblatcho);
timer_on_auto(&dsp->output_timer, dsp->sblatcho);
break;
case 0x90: /* High speed 8-bit autoinit DMA output */
if (dsp->sb_type >= SB2)
@@ -1200,7 +1200,7 @@ pollsb(void *p)
int tempi, ref;
int data[2];
timer_advance_u64(&dsp->output_timer, dsp->sblatcho);
timer_on_auto(&dsp->output_timer, dsp->sblatcho);
if (dsp->sb_8_enable && !dsp->sb_8_pause && dsp->sb_pausetime < 0 && dsp->sb_8_output) {
sb_dsp_update(dsp);
@@ -1457,7 +1457,7 @@ sb_poll_i(void *p)
sb_dsp_t *dsp = (sb_dsp_t *) p;
int processed = 0;
timer_advance_u64(&dsp->input_timer, dsp->sblatchi);
timer_on_auto(&dsp->input_timer, dsp->sblatchi);
if (dsp->sb_8_enable && !dsp->sb_8_pause && dsp->sb_pausetime < 0 && !dsp->sb_8_output) {
switch (dsp->sb_8_format) {

2
src/unix/assets/net.86box.86Box.desktop
View File

@@ -6,4 +6,4 @@ Exec=86Box
Icon=net.86box.86Box
Terminal=false
Type=Application
Categories=System;Emulator
Categories=System;Emulator;

5
src/unix/assets/net.86box.86Box.metainfo.xml
View File

@@ -28,5 +28,10 @@
want to emulate.
</p>
</description>
<screenshots>
<screenshot type="default">
<image type="source">https://raw.githubusercontent.com/86Box/86Box/master/src/unix/assets/screenshots/86Box.png</image>
</screenshot>
</screenshots>
<url type="homepage">https://86box.net</url>
</component>

BIN
src/unix/assets/screenshots/86Box.png Normal file
View File

Binary file not shown.
Side by Side

After

Width:  |  Height:  |  Size: 14 KiB

17
src/video/vid_ati_mach64.c
View File

@@ -3532,13 +3532,10 @@ static void *mach64_common_init(const device_t *info)
mach64_overlay_draw);
mach64->svga.dac_hwcursor.cur_ysize = 64;
if (info->flags & DEVICE_PCI)
mem_mapping_disable(&mach64->bios_rom.mapping);
mem_mapping_add(&mach64->linear_mapping, 0, 0, svga_read_linear, svga_readw_linear, svga_readl_linear, svga_write_linear, svga_writew_linear, svga_writel_linear, NULL, MEM_MAPPING_EXTERNAL, &mach64->svga);
mem_mapping_add(&mach64->mmio_linear_mapping, 0, 0, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64);
mem_mapping_add(&mach64->mmio_linear_mapping_2, 0, 0, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64);
mem_mapping_add(&mach64->mmio_mapping, 0xbc000, 0x04000, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64);
mem_mapping_add(&mach64->linear_mapping, 0, 0, svga_read_linear, svga_readw_linear, svga_readl_linear, svga_write_linear, svga_writew_linear, svga_writel_linear, NULL, MEM_MAPPING_EXTERNAL, &mach64->svga);
mem_mapping_add(&mach64->mmio_linear_mapping, 0, 0, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64);
mem_mapping_add(&mach64->mmio_linear_mapping_2, 0, 0, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64);
mem_mapping_add(&mach64->mmio_mapping, 0xbc000, 0x04000, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64);
mem_mapping_disable(&mach64->mmio_mapping);
mach64_io_set(mach64);
@@ -3604,6 +3601,9 @@ static void *mach64gx_init(const device_t *info)
else if (info->flags & DEVICE_ISA)
rom_init(&mach64->bios_rom, BIOS_ISA_ROM_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
if (info->flags & DEVICE_PCI)
mem_mapping_disable(&mach64->bios_rom.mapping);
return mach64;
}
static void *mach64vt2_init(const device_t *info)
@@ -3628,6 +3628,9 @@ static void *mach64vt2_init(const device_t *info)
rom_init(&mach64->bios_rom, BIOS_ROMVT2_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
if (info->flags & DEVICE_PCI)
mem_mapping_disable(&mach64->bios_rom.mapping);
svga->vblank_start = mach64_vblank_start;
return mach64;

11
src/video/vid_cl54xx.c
View File

@@ -3708,6 +3708,11 @@ cl_pci_write(int func, int addr, uint8_t val, void *p)
io_sethandler(0x03c0, 0x0020, gd54xx_in, NULL, NULL, gd54xx_out, NULL, NULL, gd54xx);
if ((val & PCI_COMMAND_MEM) && (gd54xx->vgablt_base != 0x00000000) && (gd54xx->vgablt_base < 0xfff00000))
mem_mapping_set_addr(&gd54xx->vgablt_mapping, gd54xx->vgablt_base, 0x1000);
if ((gd54xx->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM) && (gd54xx->pci_regs[0x30] & 0x01)) {
uint32_t addr = (gd54xx->pci_regs[0x32] << 16) | (gd54xx->pci_regs[0x33] << 24);
mem_mapping_set_addr(&gd54xx->bios_rom.mapping, addr, 0x8000);
} else
mem_mapping_disable(&gd54xx->bios_rom.mapping);
gd543x_recalc_mapping(gd54xx);
break;
@@ -3735,7 +3740,7 @@ cl_pci_write(int func, int addr, uint8_t val, void *p)
case 0x30: case 0x32: case 0x33:
gd54xx->pci_regs[addr] = val;
if (gd54xx->pci_regs[0x30] & 0x01) {
if ((gd54xx->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM) && (gd54xx->pci_regs[0x30] & 0x01)) {
uint32_t addr = (gd54xx->pci_regs[0x32] << 16) | (gd54xx->pci_regs[0x33] << 24);
mem_mapping_set_addr(&gd54xx->bios_rom.mapping, addr, 0x8000);
} else
@@ -4061,8 +4066,10 @@ static void
}
io_sethandler(0x03c0, 0x0020, gd54xx_in, NULL, NULL, gd54xx_out, NULL, NULL, gd54xx);
if (gd54xx->pci && id >= CIRRUS_ID_CLGD5430)
if (gd54xx->pci && id >= CIRRUS_ID_CLGD5430) {
pci_add_card(PCI_ADD_VIDEO, cl_pci_read, cl_pci_write, gd54xx);
mem_mapping_disable(&gd54xx->bios_rom.mapping);
}
mem_mapping_set_p(&svga->mapping, gd54xx);
mem_mapping_disable(&gd54xx->mmio_mapping);

243
src/video/vid_ibm_rgb528_ramdac.c
View File

@@ -101,40 +101,37 @@ ibm_rgb528_render_4bpp(svga_t *svga)
svga->lastline_draw = svga->displine;
for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) {
if (svga->crtc[0x17] & 0x80) {
if (vram_size == 3) {
if (!(x & 31)) {
dat64 = *(uint64_t *)(&svga->vram[svga->ma]);
dat642 = *(uint64_t *)(&svga->vram[svga->ma + 8]);
if (swap_word) {
dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL);
dat642 = (dat642 << 32ULL) | (dat642 >> 32ULL);
}
if (vram_size == 3) {
if (!(x & 31)) {
dat64 = *(uint64_t *)(&svga->vram[svga->ma]);
dat642 = *(uint64_t *)(&svga->vram[svga->ma + 8]);
if (swap_word) {
dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL);
dat642 = (dat642 << 32ULL) | (dat642 >> 32ULL);
}
if (swap_nib)
dat = (((x & 16) ? dat642 : dat64) >> ((x & 15) << 2)) & 0xf;
else
dat = (((x & 16) ? dat642 : dat64) >> (((x & 15) << 2) ^ 4)) & 0xf;
} else if (vram_size == 1) {
if (!(x & 15)) {
dat64 = *(uint64_t *)(&svga->vram[svga->ma]);
if (swap_word)
dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL);
}
if (swap_nib)
dat = (dat64 >> ((x & 15) << 2)) & 0xf;
else
dat = (dat64 >> (((x & 15) << 2) ^ 4)) & 0xf;
} else {
if (!(x & 7))
dat32 = *(uint32_t *)(&svga->vram[svga->ma]);
if (swap_nib)
dat = (dat32 >> ((x & 7) << 2)) & 0xf;
else
dat = (dat32 >> (((x & 7) << 2) ^ 4)) & 0xf;
}
} else
dat = 0x00000000;
if (swap_nib)
dat = (((x & 16) ? dat642 : dat64) >> ((x & 15) << 2)) & 0xf;
else
dat = (((x & 16) ? dat642 : dat64) >> (((x & 15) << 2) ^ 4)) & 0xf;
} else if (vram_size == 1) {
if (!(x & 15)) {
dat64 = *(uint64_t *)(&svga->vram[svga->ma]);
if (swap_word)
dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL);
}
if (swap_nib)
dat = (dat64 >> ((x & 15) << 2)) & 0xf;
else
dat = (dat64 >> (((x & 15) << 2) ^ 4)) & 0xf;
} else {
if (!(x & 7))
dat32 = *(uint32_t *)(&svga->vram[svga->ma]);
if (swap_nib)
dat = (dat32 >> ((x & 7) << 2)) & 0xf;
else
dat = (dat32 >> (((x & 7) << 2) ^ 4)) & 0xf;
}
if (b8_dcol == 0x00) {
dat_out.a = 0x00;
dat_out.r = ramdac->palettes[0][partition | dat];
@@ -184,31 +181,28 @@ ibm_rgb528_render_8bpp(svga_t *svga)
svga->lastline_draw = svga->displine;
for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) {
if (svga->crtc[0x17] & 0x80) {
if (vram_size == 3) {
if (!(x & 15)) {
dat64 = *(uint64_t *)(&svga->vram[svga->ma]);
dat642 = *(uint64_t *)(&svga->vram[svga->ma + 8]);
if (swap_word) {
dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL);
dat642 = (dat642 << 32ULL) | (dat642 >> 32ULL);
}
if (vram_size == 3) {
if (!(x & 15)) {
dat64 = *(uint64_t *)(&svga->vram[svga->ma]);
dat642 = *(uint64_t *)(&svga->vram[svga->ma + 8]);
if (swap_word) {
dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL);
dat642 = (dat642 << 32ULL) | (dat642 >> 32ULL);
}
dat = (((x & 8) ? dat642 : dat64) >> ((x & 7) << 3)) & 0xff;
} else if (vram_size == 1) {
if (!(x & 7)) {
dat64 = *(uint64_t *)(&svga->vram[svga->ma]);
if (swap_word)
dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL);
}
dat = (dat64 >> ((x & 7) << 3)) & 0xff;
} else {
if (!(x & 3))
dat32 = *(uint32_t *)(&svga->vram[svga->ma]);
dat = (dat32 >> ((x & 3) << 3)) & 0xff;
}
} else
dat = 0x00000000;
dat = (((x & 8) ? dat642 : dat64) >> ((x & 7) << 3)) & 0xff;
} else if (vram_size == 1) {
if (!(x & 7)) {
dat64 = *(uint64_t *)(&svga->vram[svga->ma]);
if (swap_word)
dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL);
}
dat = (dat64 >> ((x & 7) << 3)) & 0xff;
} else {
if (!(x & 3))
dat32 = *(uint32_t *)(&svga->vram[svga->ma]);
dat = (dat32 >> ((x & 3) << 3)) & 0xff;
}
if (b8_dcol == 0x00) {
dat_out.a = 0x00;
dat_out.r = ramdac->palettes[0][dat];
@@ -268,31 +262,28 @@ ibm_rgb528_render_15_16bpp(svga_t *svga)
svga->lastline_draw = svga->displine;
for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) {
if (svga->crtc[0x17] & 0x80) {
if (vram_size == 2) {
if (!(x & 7)) {
dat64 = *(uint64_t *)(&svga->vram[svga->ma]);
dat642 = *(uint64_t *)(&svga->vram[svga->ma + 8]);
if (swap_word) {
dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL);
dat642 = (dat64 << 32ULL) | (dat642 >> 32ULL);
}
if (vram_size == 2) {
if (!(x & 7)) {
dat64 = *(uint64_t *)(&svga->vram[svga->ma]);
dat642 = *(uint64_t *)(&svga->vram[svga->ma + 8]);
if (swap_word) {
dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL);
dat642 = (dat64 << 32ULL) | (dat642 >> 32ULL);
}
dat = (((x & 4) ? dat642 : dat64) >> ((x & 3) << 4)) & 0xffff;
} else if (vram_size == 1) {
if (!(x & 3)) {
dat64 = *(uint64_t *)(&svga->vram[svga->ma]);
if (swap_word)
dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL);
}
dat = (dat64 >> ((x & 3) << 4)) & 0xffff;
} else {
if (!(x & 1))
dat32 = *(uint32_t *)(&svga->vram[svga->ma]);
dat = (dat32 >> ((x & 1) << 4)) & 0xffff;
}
} else
dat = 0x00000000;
dat = (((x & 4) ? dat642 : dat64) >> ((x & 3) << 4)) & 0xffff;
} else if (vram_size == 1) {
if (!(x & 3)) {
dat64 = *(uint64_t *)(&svga->vram[svga->ma]);
if (swap_word)
dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL);
}
dat = (dat64 >> ((x & 3) << 4)) & 0xffff;
} else {
if (!(x & 1))
dat32 = *(uint32_t *)(&svga->vram[svga->ma]);
dat = (dat32 >> ((x & 1) << 4)) & 0xffff;
}
dat_ex = (ibm_rgb528_pixel16_t *) &dat;
if (b555_565 && (b16_dcol != 0x01)) {
if (swaprb) {
@@ -389,39 +380,36 @@ ibm_rgb528_render_24bpp(svga_t *svga)
for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) {
dat_ex = (ibm_rgb528_pixel32_t *) &dat;
if (svga->crtc[0x17] & 0x80) {
if (vram_size == 3) {
if ((x & 15) == 0) {
dat64[0] = *(uint64_t *)(&svga->vram[svga->ma & svga->vram_display_mask]);
dat64[1] = *(uint64_t *)(&svga->vram[(svga->ma + 8) & svga->vram_display_mask]);
dat64[2] = *(uint64_t *)(&svga->vram[(svga->ma + 16) & svga->vram_display_mask]);
dat64[3] = *(uint64_t *)(&svga->vram[(svga->ma + 24) & svga->vram_display_mask]);
dat64[4] = *(uint64_t *)(&svga->vram[(svga->ma + 32) & svga->vram_display_mask]);
dat64[5] = *(uint64_t *)(&svga->vram[(svga->ma + 40) & svga->vram_display_mask]);
if (swap_word) {
dat64[0] = (dat64[0] << 32ULL) | (dat64[0] >> 32ULL);
dat64[1] = (dat64[1] << 32ULL) | (dat64[1] >> 32ULL);
dat64[2] = (dat64[2] << 32ULL) | (dat64[2] >> 32ULL);
dat64[3] = (dat64[3] << 32ULL) | (dat64[3] >> 32ULL);
dat64[4] = (dat64[4] << 32ULL) | (dat64[4] >> 32ULL);
dat64[5] = (dat64[5] << 32ULL) | (dat64[5] >> 32ULL);
}
if (vram_size == 3) {
if ((x & 15) == 0) {
dat64[0] = *(uint64_t *)(&svga->vram[svga->ma & svga->vram_display_mask]);
dat64[1] = *(uint64_t *)(&svga->vram[(svga->ma + 8) & svga->vram_display_mask]);
dat64[2] = *(uint64_t *)(&svga->vram[(svga->ma + 16) & svga->vram_display_mask]);
dat64[3] = *(uint64_t *)(&svga->vram[(svga->ma + 24) & svga->vram_display_mask]);
dat64[4] = *(uint64_t *)(&svga->vram[(svga->ma + 32) & svga->vram_display_mask]);
dat64[5] = *(uint64_t *)(&svga->vram[(svga->ma + 40) & svga->vram_display_mask]);
if (swap_word) {
dat64[0] = (dat64[0] << 32ULL) | (dat64[0] >> 32ULL);
dat64[1] = (dat64[1] << 32ULL) | (dat64[1] >> 32ULL);
dat64[2] = (dat64[2] << 32ULL) | (dat64[2] >> 32ULL);
dat64[3] = (dat64[3] << 32ULL) | (dat64[3] >> 32ULL);
dat64[4] = (dat64[4] << 32ULL) | (dat64[4] >> 32ULL);
dat64[5] = (dat64[5] << 32ULL) | (dat64[5] >> 32ULL);
}
dat_ex = (ibm_rgb528_pixel32_t *) &(dat8[((x & 15) * 3)]);
} else if (vram_size == 1) {
if ((x & 7) == 0) {
dat64[0] = *(uint64_t *)(&svga->vram[svga->ma & svga->vram_display_mask]);
dat64[1] = *(uint64_t *)(&svga->vram[(svga->ma + 8) & svga->vram_display_mask]);
dat64[2] = *(uint64_t *)(&svga->vram[(svga->ma + 16) & svga->vram_display_mask]);
if (swap_word) {
dat64[0] = (dat64[0] << 32ULL) | (dat64[0] >> 32ULL);
dat64[1] = (dat64[1] << 32ULL) | (dat64[1] >> 32ULL);
dat64[2] = (dat64[2] << 32ULL) | (dat64[2] >> 32ULL);
}
}
dat_ex = (ibm_rgb528_pixel32_t *) &(dat8[((x & 15) * 3)]);
} else if (vram_size == 1) {
if ((x & 7) == 0) {
dat64[0] = *(uint64_t *)(&svga->vram[svga->ma & svga->vram_display_mask]);
dat64[1] = *(uint64_t *)(&svga->vram[(svga->ma + 8) & svga->vram_display_mask]);
dat64[2] = *(uint64_t *)(&svga->vram[(svga->ma + 16) & svga->vram_display_mask]);
if (swap_word) {
dat64[0] = (dat64[0] << 32ULL) | (dat64[0] >> 32ULL);
dat64[1] = (dat64[1] << 32ULL) | (dat64[1] >> 32ULL);
dat64[2] = (dat64[2] << 32ULL) | (dat64[2] >> 32ULL);
}
dat_ex = (ibm_rgb528_pixel32_t *) &(dat8[((x & 7) * 3)]);
} else
dat = 0x00000000;
}
dat_ex = (ibm_rgb528_pixel32_t *) &(dat8[((x & 7) * 3)]);
} else
dat = 0x00000000;
if (swaprb) {
@@ -482,28 +470,25 @@ ibm_rgb528_render_32bpp(svga_t *svga)
svga->lastline_draw = svga->displine;
for (x = 0; x <= (svga->hdisp + svga->scrollcache); x++) {
if (svga->crtc[0x17] & 0x80) {
if (vram_size == 3) {
if (!(x & 3)) {
dat64 = *(uint64_t *)(&svga->vram[svga->ma]);
dat642 = *(uint64_t *)(&svga->vram[svga->ma + 8]);
if (swap_word) {
dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL);
dat642 = (dat642 << 32ULL) | (dat642 >> 32ULL);
}
if (vram_size == 3) {
if (!(x & 3)) {
dat64 = *(uint64_t *)(&svga->vram[svga->ma]);
dat642 = *(uint64_t *)(&svga->vram[svga->ma + 8]);
if (swap_word) {
dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL);
dat642 = (dat642 << 32ULL) | (dat642 >> 32ULL);
}
dat = (((x & 2) ? dat642 : dat64) >> ((x & 1ULL) << 5ULL)) & 0xffffffff;
} else if (vram_size == 1) {
if (!(x & 1)) {
dat64 = *(uint64_t *)(&svga->vram[svga->ma]);
if (swap_word)
dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL);
}
dat = (dat64 >> ((x & 1ULL) << 5ULL)) & 0xffffffff;
} else
dat = *(uint32_t *)(&svga->vram[svga->ma]);
}
dat = (((x & 2) ? dat642 : dat64) >> ((x & 1ULL) << 5ULL)) & 0xffffffff;
} else if (vram_size == 1) {
if (!(x & 1)) {
dat64 = *(uint64_t *)(&svga->vram[svga->ma]);
if (swap_word)
dat64 = (dat64 << 32ULL) | (dat64 >> 32ULL);
}
dat = (dat64 >> ((x & 1ULL) << 5ULL)) & 0xffffffff;
} else
dat = 0x00000000;
dat = *(uint32_t *)(&svga->vram[svga->ma]);
dat_ex = (ibm_rgb528_pixel32_t *) &dat;
if (swaprb) {
temp = dat_ex->r;

2
src/video/vid_svga.c
View File

@@ -460,7 +460,7 @@ svga_recalctimings(svga_t *svga)
svga->hdisp_time = svga->hdisp;
svga->render = svga_render_blank;
if (!svga->scrblank && svga->attr_palette_enable) {
if (!svga->scrblank && (svga->crtc[0x17] & 0x80) && svga->attr_palette_enable) {
if (!(svga->gdcreg[6] & 1) && !(svga->attrregs[0x10] & 1)) { /*Text mode*/
if (svga->seqregs[1] & 8) /*40 column*/ {
svga->render = svga_render_text_40;

802
src/video/vid_svga_render.c
View File

File diff suppressed because it is too large Load Diff

7
src/video/vid_tgui9440.c
View File

@@ -3079,8 +3079,11 @@ static void *tgui_init(const device_t *info)
tgui->has_bios = (bios_fn != NULL);
if (tgui->has_bios)
if (tgui->has_bios) {
rom_init(&tgui->bios_rom, (char *) bios_fn, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
if (tgui->pci)
mem_mapping_disable(&tgui->bios_rom.mapping);
}
if (tgui->pci)
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_tgui_pci);
@@ -3107,7 +3110,7 @@ static void *tgui_init(const device_t *info)
if (tgui->pci && (tgui->type >= TGUI_9440)) {
if (tgui->has_bios)
tgui->card = pci_add_card(PCI_ADD_VIDEO, tgui_pci_read, tgui_pci_write, tgui);
tgui->card = pci_add_card(PCI_ADD_VIDEO, tgui_pci_read, tgui_pci_write, tgui);
else
tgui->card = pci_add_card(PCI_ADD_VIDEO | PCI_ADD_STRICT, tgui_pci_read, tgui_pci_write, tgui);
}

4
src/video/vid_xga.c
View File

@@ -577,7 +577,7 @@ xga_ext_inb(uint16_t addr, void *p)
ret = 0x0b;
break;
case 0x53:
ret = 0xb0;
ret = 0x70;
break;
case 0x54:
ret = xga->clk_sel_1;
@@ -1915,7 +1915,7 @@ xga_memio_writel(uint32_t addr, uint32_t val, void *p)
static uint8_t
xga_mem_read(uint32_t addr, xga_t *xga, svga_t *svga)
{
uint8_t temp = 0xff;
uint8_t temp = 0;
addr &= 0x1fff;