Actually add the memory and pixel clocks

src/include/86box/nv/vid_nv.h

@@ -82,7 +82,7 @@ typedef struct nv_base_s
 {
     rom_t vbios;                                // NVIDIA/OEm VBIOS
     // move to nv3_cio_t?
-    svga_t svga;                                // SVGA core (separate to nv3)
+    svga_t svga;                                // SVGA core (separate to nv3) - Weitek licensed
     // stuff that doesn't fit in the svga structure
     uint32_t cio_read_bank;                     // SVGA read bank
     uint32_t cio_write_bank;                    // SVGA write bank
@@ -98,6 +98,8 @@ typedef struct nv_base_s
     uint32_t bar1_lfb_base;                     // PCI Base Address Register 1 - Linear Framebuffer (NV_BASE)
     nv_bus_generation bus_generation;           // current bus (see nv_bus_generation documentation)
     uint32_t gpu_revision;                      // GPU Stepping
+    pc_timer_t pixel_clock_timer;               // Pixel Clock Timer
+    pc_timer_t memory_clock_timer;              // Memory Clock Timer
 } nv_base_t;
 
 #define NV_REG_LIST_END                 0xD15EA5E
@@ -497,6 +499,7 @@ void        nv3_pramdac_set_pixel_clock();
 
 // NV3 PTIMER
 void        nv3_ptimer_init();
+void        nv3_ptimer_tick();
 
 // NV3 PVIDEO
 void        nv3_pvideo_init();

src/video/nv/nv3/nv3_core.c

@@ -728,6 +728,20 @@ void nv3_update_mappings()
     }
 }
 
+// Polls the pixel clock.
+// This updates the 2D/3D engine PGRAPH
+void nv3_pixel_clock_poll(void* priv)
+{
+
+}
+
+// Polls the memory clock.
+void nv3_memory_clock_poll(void* poll)
+{
+    // Let's hope qeeg was right here.
+    nv3_ptimer_tick();
+}
+
 // 
 // Init code
 //
@@ -799,6 +813,12 @@ void* nv3_init(const device_t *info)
     nv3_ptimer_init();              // Initialise programmable interval timer
     nv3_pvideo_init();              // Initialise video overlay engine
 
+    nv_log("NV3: Starting timers...");
+
+    // Add the 
+    timer_add(&nv3->nvbase.pixel_clock_timer, nv3_pixel_clock_poll, nv3, true);
+    timer_add(&nv3->nvbase.memory_clock_timer, nv3_memory_clock_poll, nv3, true);
+
     return nv3;
 }
 

src/video/nv/nv3/nv3_core_arbiter.c

@@ -180,8 +180,6 @@ uint32_t    nv3_prm_read(uint32_t address) { return 0; };
 void        nv3_prm_write(uint32_t address, uint32_t value) {};
 uint32_t    nv3_prmio_read(uint32_t address) { return 0; };
 void        nv3_prmio_write(uint32_t address, uint32_t value) {};
-uint32_t    nv3_ptimer_read(uint32_t address) { return 0; };
-void        nv3_ptimer_write(uint32_t address, uint32_t value) {};
 uint32_t    nv3_prom_read(uint32_t address) { return 0; };
 void        nv3_prom_write(uint32_t address, uint32_t value) {};
 uint32_t    nv3_palt_read(uint32_t address) { return 0; };

src/video/nv/nv3/subsystems/nv3_ptimer.c

@@ -51,13 +51,21 @@ void nv3_ptimer_init()
 // Handles the PTIMER alarm interrupt
 void nv3_ptimer_interrupt(uint32_t num)
 {
-    nv3->ptimer.interrupt_enable |= (1 << num);
+    nv3->ptimer.interrupt_status |= (1 << num);
+
     nv3_pmc_handle_interrupts(true);
 }
 
 // Ticks the timer.
 void nv3_ptimer_tick()
 {
+    // get the current time
+    double current_time = ((double)nv3->ptimer.clock_numerator) / (double)nv3->ptimer.clock_denominator; // *10.0?
+
+    // truncate it 
+    nv3->ptimer.time += (uint64_t)current_time;
+
+    // Check if the alarm has actually triggered...
     if (nv3->ptimer.time >= nv3->ptimer.alarm)
     {
         nv3_ptimer_interrupt(NV3_PTIMER_INTR_ALARM);