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SDL renderer improvements and fixes and added SDL OpenGL option;

Browse Source 
Various performance improvements;
Fixed USB UHCI HCHalt;
Cirrus Logic CL-GD 5422/24 fixes and removed them from the Dev branch;
The Storage controllers sections of Settings now has its own corresponding section of the configuration file;
Fixed the AT clock divisors for some Pentium OverDrive CPU's;
Added the ACPI RTC status (no ACPI RTC alarm event yet).
This commit is contained in:
OBattler
2020-11-26 18:20:24 +01:00
parent 21d6f2e9f1
commit 6e233f4ac8
53 changed files with 618 additions and 279 deletions
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68
src/acpi.c
View File

@@ -39,6 +39,9 @@
#include <86box/i2c.h>
int acpi_rtc_status = 0;
#ifdef ENABLE_ACPI_LOG
int acpi_do_log = ENABLE_ACPI_LOG;
@@ -119,6 +122,8 @@ acpi_reg_read_common_regs(int size, uint16_t addr, void *p)
case 0x00: case 0x01:
/* PMSTS - Power Management Status Register (IO) */
ret = (dev->regs.pmsts >> shift16) & 0xff;
if (addr == 0x01)
ret |= (acpi_rtc_status << 2);
break;
case 0x02: case 0x03:
/* PMEN - Power Management Resume Enable Register (IO) */
@@ -127,6 +132,8 @@ acpi_reg_read_common_regs(int size, uint16_t addr, void *p)
case 0x04: case 0x05:
/* PMCNTRL - Power Management Control Register (IO) */
ret = (dev->regs.pmcntrl >> shift16) & 0xff;
if (addr == 0x05)
ret = (ret & 0xdf) | 0x02; /* Bit 5 is write-only. */
break;
case 0x08: case 0x09: case 0x0a: case 0x0b:
/* PMTMR - Power Management Timer Register (IO) */
@@ -138,7 +145,10 @@ acpi_reg_read_common_regs(int size, uint16_t addr, void *p)
break;
}
acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret);
#ifdef ENABLE_ACPI_LOG
if (size != 1)
acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret);
#endif
return ret;
}
@@ -211,7 +221,10 @@ acpi_reg_read_intel(int size, uint16_t addr, void *p)
break;
}
acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret);
#ifdef ENABLE_ACPI_LOG
if (size != 1)
acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret);
#endif
return ret;
}
@@ -285,7 +298,10 @@ acpi_reg_read_via_common(int size, uint16_t addr, void *p)
break;
}
acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret);
#ifdef ENABLE_ACPI_LOG
if (size != 1)
acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret);
#endif
return ret;
}
@@ -338,7 +354,10 @@ acpi_reg_read_via(int size, uint16_t addr, void *p)
break;
}
acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret);
#ifdef ENABLE_ACPI_LOG
if (size != 1)
acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret);
#endif
return ret;
}
@@ -372,7 +391,10 @@ acpi_reg_read_via_596b(int size, uint16_t addr, void *p)
break;
}
acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret);
#ifdef ENABLE_ACPI_LOG
if (size != 1)
acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret);
#endif
return ret;
}
@@ -386,7 +408,10 @@ acpi_reg_read_smc(int size, uint16_t addr, void *p)
ret = acpi_reg_read_common_regs(size, addr, p);
acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret);
#ifdef ENABLE_ACPI_LOG
if (size != 1)
acpi_log("(%i) ACPI Read (%i) %02X: %02X\n", in_smm, size, addr, ret);
#endif
return ret;
}
@@ -436,13 +461,18 @@ acpi_reg_write_common_regs(int size, uint16_t addr, uint8_t val, void *p)
int shift16, sus_typ;
addr &= 0x3f;
acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val);
#ifdef ENABLE_ACPI_LOG
if (size != 1)
acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val);
#endif
shift16 = (addr & 1) << 3;
switch (addr) {
case 0x00: case 0x01:
/* PMSTS - Power Management Status Register (IO) */
dev->regs.pmsts &= ~((val << shift16) & 0x8d31);
if ((addr == 0x01) && (val & 0x04))
acpi_rtc_status = 0;
acpi_update_irq(dev);
break;
case 0x02: case 0x03:
@@ -452,8 +482,7 @@ acpi_reg_write_common_regs(int size, uint16_t addr, uint8_t val, void *p)
break;
case 0x04: case 0x05:
/* PMCNTRL - Power Management Control Register (IO) */
dev->regs.pmcntrl = ((dev->regs.pmcntrl & ~(0xff << shift16)) | (val << shift16)) & 0x3c07;
if (dev->regs.pmcntrl & 0x2000) {
if ((addr == 0x05) && (dev->regs.pmcntrl & 0x2000)) {
sus_typ = (dev->regs.pmcntrl >> 10) & 7;
switch (sus_typ) {
case 0:
@@ -479,8 +508,12 @@ acpi_reg_write_common_regs(int size, uint16_t addr, uint8_t val, void *p)
resetx86();
break;
default:
dev->regs.pmcntrl = ((dev->regs.pmcntrl & ~(0xff << shift16)) | (val << shift16)) & 0x3c07;
break;
}
}
} else
dev->regs.pmcntrl = ((dev->regs.pmcntrl & ~(0xff << shift16)) | (val << shift16)) & 0x3c07;
break;
}
}
@@ -493,7 +526,10 @@ acpi_reg_write_intel(int size, uint16_t addr, uint8_t val, void *p)
int shift16, shift32;
addr &= 0x3f;
acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val);
#ifdef ENABLE_ACPI_LOG
if (size != 1)
acpi_log("(%i) ACPI Write (%i) %02X: %02X\n", in_smm, size, addr, val);
#endif
shift16 = (addr & 1) << 3;
shift32 = (addr & 3) << 3;
@@ -876,6 +912,8 @@ acpi_reg_read(uint16_t addr, void *p)
ret = acpi_reg_read_common(1, addr, p);
acpi_log("ACPI: Read B %02X from %04X\n", ret, addr);
return ret;
}
@@ -924,6 +962,8 @@ acpi_aux_read_read(uint16_t addr, void *p)
static void
acpi_reg_writel(uint16_t addr, uint32_t val, void *p)
{
acpi_log("ACPI: Write L %08X to %04X\n", val, addr);
acpi_reg_write_common(4, addr, val & 0xff, p);
acpi_reg_write_common(4, addr + 1, (val >> 8) & 0xff, p);
acpi_reg_write_common(4, addr + 2, (val >> 16) & 0xff, p);
@@ -934,6 +974,8 @@ acpi_reg_writel(uint16_t addr, uint32_t val, void *p)
static void
acpi_reg_writew(uint16_t addr, uint16_t val, void *p)
{
acpi_log("ACPI: Write W %04X to %04X\n", val, addr);
acpi_reg_write_common(2, addr, val & 0xff, p);
acpi_reg_write_common(2, addr + 1, (val >> 8) & 0xff, p);
}
@@ -942,6 +984,8 @@ acpi_reg_writew(uint16_t addr, uint16_t val, void *p)
static void
acpi_reg_write(uint16_t addr, uint8_t val, void *p)
{
acpi_log("ACPI: Write B %02X to %04X\n", val, addr);
acpi_reg_write_common(1, addr, val, p);
}
@@ -1188,6 +1232,8 @@ acpi_reset(void *priv)
- Bit 1: 80-conductor cable on primary IDE channel (active low) */
dev->regs.gpi_val = !strcmp(machines[machine].internal_name, "wcf681") ? 0xffffffe3 : 0xffffffe5;
}
acpi_rtc_status = 0;
}

4
src/chipset/intel_sio.c
View File

@@ -105,7 +105,7 @@ sio_timer_read(uint16_t addr, void *priv)
uint8_t ret = 0xff;
if (!(addr & 0x0002)) {
sub_cycles((int)(PITCONST >> 32));
cycles -= ((int) (PITCONST >> 32));
sio_timer_latch = timer_get_remaining_us(&dev->timer);
@@ -126,7 +126,7 @@ sio_timer_readw(uint16_t addr, void *priv)
uint16_t ret = 0xffff;
if (!(addr & 0x0002)) {
sub_cycles((int)(PITCONST >> 32));
cycles -= ((int) (PITCONST >> 32));
ret = timer_get_remaining_us(&dev->timer);
}

125
src/config.c
View File

@@ -113,6 +113,7 @@ static list_t config_head;
/* TODO: Backwards compatibility, get rid of this when enough time has passed. */
static int backwards_compat = 0;
static int backwards_compat2 = 0;
#ifdef ENABLE_CONFIG_LOG
@@ -873,14 +874,16 @@ load_ports(void)
}
/* Load "Other Peripherals" section. */
/* Load "Storage Controllers" section. */
static void
load_other_peripherals(void)
load_storage_controllers(void)
{
char *cat = "Other peripherals";
char *cat = "Storage controllers";
char *p;
char temp[512];
int c, free_p = 0;
int free_p = 0;
/* TODO: Backwards compatibility, get rid of this when enough time has passed. */
backwards_compat2 = (find_section(cat) == NULL);
p = config_get_string(cat, "scsicard", NULL);
if (p != NULL)
@@ -921,19 +924,6 @@ load_other_peripherals(void)
ide_ter_enabled = !!config_get_int(cat, "ide_ter", 0);
ide_qua_enabled = !!config_get_int(cat, "ide_qua", 0);
bugger_enabled = !!config_get_int(cat, "bugger_enabled", 0);
postcard_enabled = !!config_get_int(cat, "postcard_enabled", 0);
for (c = 0; c < ISAMEM_MAX; c++) {
sprintf(temp, "isamem%d_type", c);
p = config_get_string(cat, temp, "none");
isamem_type[c] = isamem_get_from_internal_name(p);
}
p = config_get_string(cat, "isartc_type", "none");
isartc_type = isartc_get_from_internal_name(p);
}
@@ -1518,7 +1508,6 @@ load_other_removable_devices(void)
sprintf(temp, "zip_%02i_iso_path", c+1);
config_delete_var(cat, temp);
}
memset(temp, 0x00, sizeof(temp));
for (c=0; c<MO_NUM; c++) {
@@ -1584,6 +1573,78 @@ load_other_removable_devices(void)
}
/* Load "Other Peripherals" section. */
static void
load_other_peripherals(void)
{
char *cat = "Other peripherals";
char *p;
char temp[512];
int c, free_p = 0;
if (backwards_compat2) {
p = config_get_string(cat, "scsicard", NULL);
if (p != NULL)
scsi_card_current = scsi_card_get_from_internal_name(p);
else
scsi_card_current = 0;
config_delete_var(cat, "scsicard");
p = config_get_string(cat, "fdc", NULL);
if (p != NULL)
fdc_type = fdc_card_get_from_internal_name(p);
else
fdc_type = FDC_INTERNAL;
config_delete_var(cat, "fdc");
p = config_get_string(cat, "hdc", NULL);
if (p == NULL) {
if (machines[machine].flags & MACHINE_HDC) {
p = (char *)malloc((strlen("internal")+1)*sizeof(char));
strcpy(p, "internal");
} else {
p = (char *)malloc((strlen("none")+1)*sizeof(char));
strcpy(p, "none");
}
free_p = 1;
}
if (!strcmp(p, "mfm_xt"))
hdc_current = hdc_get_from_internal_name("st506_xt");
else if (!strcmp(p, "mfm_xt_dtc5150x"))
hdc_current = hdc_get_from_internal_name("st506_xt_dtc5150x");
else if (!strcmp(p, "mfm_at"))
hdc_current = hdc_get_from_internal_name("st506_at");
else
hdc_current = hdc_get_from_internal_name(p);
config_delete_var(cat, "hdc");
if (free_p) {
free(p);
p = NULL;
}
ide_ter_enabled = !!config_get_int(cat, "ide_ter", 0);
config_delete_var(cat, "ide_ter");
ide_qua_enabled = !!config_get_int(cat, "ide_qua", 0);
config_delete_var(cat, "ide_qua");
}
backwards_compat2 = 0;
bugger_enabled = !!config_get_int(cat, "bugger_enabled", 0);
postcard_enabled = !!config_get_int(cat, "postcard_enabled", 0);
for (c = 0; c < ISAMEM_MAX; c++) {
sprintf(temp, "isamem%d_type", c);
p = config_get_string(cat, temp, "none");
isamem_type[c] = isamem_get_from_internal_name(p);
}
p = config_get_string(cat, "isartc_type", "none");
isartc_type = isartc_get_from_internal_name(p);
}
/* Load the specified or a default configuration file. */
void
config_load(void)
@@ -1648,12 +1709,13 @@ config_load(void)
load_sound(); /* Sound */
load_network(); /* Network */
load_ports(); /* Ports (COM & LPT) */
load_other_peripherals(); /* Other peripherals */
load_storage_controllers(); /* Storage controllers */
load_hard_disks(); /* Hard disks */
load_floppy_and_cdrom_drives(); /* Floppy and CD-ROM drives */
/* TODO: Backwards compatibility, get rid of this when enough time has passed. */
load_floppy_drives(); /* Floppy drives */
load_other_removable_devices(); /* Other removable devices */
load_other_peripherals(); /* Other peripherals */
/* Mark the configuration as changed. */
config_changed = 1;
@@ -2080,13 +2142,11 @@ save_ports(void)
}
/* Save "Other Peripherals" section. */
/* Save "Storage Controllers" section. */
static void
save_other_peripherals(void)
save_storage_controllers(void)
{
char *cat = "Other peripherals";
char temp[512];
int c;
char *cat = "Storage controllers";
if (scsi_card_current == 0)
config_delete_var(cat, "scsicard");
@@ -2113,6 +2173,18 @@ save_other_peripherals(void)
else
config_set_int(cat, "ide_qua", ide_qua_enabled);
delete_section_if_empty(cat);
}
/* Save "Other Peripherals" section. */
static void
save_other_peripherals(void)
{
char *cat = "Other peripherals";
char temp[512];
int c;
if (bugger_enabled == 0)
config_delete_var(cat, "bugger_enabled");
else
@@ -2401,10 +2473,11 @@ config_save(void)
save_sound(); /* Sound */
save_network(); /* Network */
save_ports(); /* Ports (COM & LPT) */
save_other_peripherals(); /* Other peripherals */
save_storage_controllers(); /* Storage controllers */
save_hard_disks(); /* Hard disks */
save_floppy_and_cdrom_drives(); /* Floppy and CD-ROM drives */
save_other_removable_devices(); /* Other removable devices */
save_other_peripherals(); /* Other peripherals */
config_write(cfg_path);
}

17
src/cpu/808x.c
View File

@@ -271,6 +271,19 @@ sub_cycles(int c)
}
void
resub_cycles(int old_cycles)
{
int cyc_diff = 0;
if (old_cycles > cycles) {
cyc_diff = old_cycles - cycles;
cycles = old_cycles;
resub_cycles(cyc_diff);
}
}
#undef readmemb
#undef readmemw
#undef readmeml
@@ -280,6 +293,8 @@ sub_cycles(int c)
static void
cpu_io(int bits, int out, uint16_t port)
{
int old_cycles = cycles;
if (out) {
wait(4, 1);
if (bits == 16) {
@@ -305,6 +320,8 @@ cpu_io(int bits, int out, uint16_t port)
} else
AL = inb(port);
}
resub_cycles(old_cycles);
}

4
src/cpu/cpu_table.c
View File

@@ -600,9 +600,9 @@ const cpu_family_t cpu_families[] = {
.name = "Pentium OverDrive",
.internal_name = "pentium_p54c_od3v",
.cpus = {
{"125", CPU_PENTIUM, fpus_internal, 125000000, 3.0, 3520, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC | CPU_FIXED_MULTIPLIER, 12,12,7,7, 16},
{"125", CPU_PENTIUM, fpus_internal, 125000000, 3.0, 3520, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC | CPU_FIXED_MULTIPLIER, 12,12,7,7, 15},
{"150", CPU_PENTIUM, fpus_internal, 150000000, 2.5, 3520, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC | CPU_FIXED_MULTIPLIER, 15,15,7,7, 35/2},
{"166", CPU_PENTIUM, fpus_internal, 166666666, 2.5, 3520, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC | CPU_FIXED_MULTIPLIER, 15,15,7,7, 40},
{"166", CPU_PENTIUM, fpus_internal, 166666666, 2.5, 3520, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC | CPU_FIXED_MULTIPLIER, 15,15,7,7, 20},
{"", 0}
}
}, {

4
src/device/isartc.c
View File

@@ -388,7 +388,7 @@ mm67_read(uint16_t port, void *priv)
uint8_t ret = 0xff;
/* This chip is directly mapped on I/O. */
sub_cycles(ISA_CYCLES(4));
cycles -= ISA_CYCLES(4);
switch(reg) {
case MM67_ISTAT: /* IRQ status (RO) */
@@ -424,7 +424,7 @@ mm67_write(uint16_t port, uint8_t val, void *priv)
#endif
/* This chip is directly mapped on I/O. */
sub_cycles(ISA_CYCLES(4));
cycles -= ISA_CYCLES(4);
switch(reg) {
case MM67_ISTAT: /* intr status (RO) */

2
src/device/keyboard_at.c
View File

@@ -2047,7 +2047,7 @@ kbd_read(uint16_t port, void *priv)
uint8_t ret = 0xff;
if ((dev->flags & KBC_TYPE_MASK) >= KBC_TYPE_PS2_NOREF)
sub_cycles(ISA_CYCLES(8));
cycles -= ISA_CYCLES(8);
if (((dev->flags & KBC_VEN_MASK) == KBC_VEN_XI8088) && (port == 0x63))
port = 0x61;

1
src/device/mouse_serial.c
View File

@@ -173,7 +173,6 @@ sermouse_callback(struct serial_s *serial, void *priv)
dev->format = 7;
dev->transmit_period = sermouse_transmit_period(dev, 1200, -1);
timer_stop(&dev->command_timer);
sub_cycles(ISA_CYCLES(8));
#ifdef USE_NEW_DYNAREC
sermouse_timer_on(dev, 5000.0, 0);
#else

4
src/device/serial.c
View File

@@ -355,7 +355,7 @@ serial_write(uint16_t addr, uint8_t val, void *p)
serial_log("UART: Write %02X to port %02X\n", val, addr);
sub_cycles(ISA_CYCLES(8));
cycles -= ISA_CYCLES(8);
switch (addr & 7) {
case 0:
@@ -513,7 +513,7 @@ serial_read(uint16_t addr, void *p)
serial_t *dev = (serial_t *)p;
uint8_t i, ret = 0;
sub_cycles(ISA_CYCLES(8));
cycles -= ISA_CYCLES(8);
switch (addr & 7) {
case 0:

2
src/disk/hdc_xtide.c
View File

@@ -276,7 +276,7 @@ const device_t xtide_acculogic_device = {
const device_t xtide_at_ps2_device = {
"PS/2 AT XTIDE (1.1.5)",
DEVICE_AT,
DEVICE_ISA | DEVICE_AT,
0,
xtide_at_ps2_init, xtide_at_close, NULL,
{ xtide_at_ps2_available }, NULL, NULL,

4
src/floppy/fdc.c
View File

@@ -735,7 +735,7 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
fdc_log("Write FDC %04X %02X\n", addr, val);
sub_cycles(ISA_CYCLES(8));
cycles -= ISA_CYCLES(8);
switch (addr&7) {
case 0:
@@ -1261,7 +1261,7 @@ fdc_read(uint16_t addr, void *priv)
uint8_t ret;
int drive;
sub_cycles(ISA_CYCLES(8));
cycles -= ISA_CYCLES(8);
switch (addr & 7) {
case 0: /* STA */

2
src/floppy/fdd.c
View File

@@ -552,7 +552,7 @@ fdd_hole(int drive)
}
uint64_t
static __inline uint64_t
fdd_byteperiod(int drive)
{
if (!fdd_get_turbo(drive) && drives[drive].byteperiod)

4
src/game/gameport.c
View File

@@ -186,7 +186,7 @@ gameport_write(uint16_t addr, uint8_t val, void *priv)
p->joystick->write(p->joystick_dat);
sub_cycles(ISA_CYCLES(8));
cycles -= ISA_CYCLES(8);
}
@@ -198,7 +198,7 @@ gameport_read(uint16_t addr, void *priv)
ret = p->state | p->joystick->read(p->joystick_dat);
sub_cycles(ISA_CYCLES(8));
cycles -= ISA_CYCLES(8);
return(ret);
}

1
src/include/86box/86box.h
View File

@@ -177,6 +177,7 @@ extern uint16_t get_last_addr(void);
should be in cpu.c but I put it here to avoid
having to include cpu.c everywhere. */
extern void sub_cycles(int c);
extern void resub_cycles(int old_cycles);
extern double isa_timing;
extern int io_delay;

2
src/include/86box/acpi.h
View File

@@ -89,6 +89,8 @@ typedef struct
/* Global variables. */
extern int acpi_rtc_status;
extern const device_t acpi_intel_device;
extern const device_t acpi_smc_device;
extern const device_t acpi_via_device;

3
src/include/86box/resource.h
View File

@@ -295,8 +295,9 @@
#define IDM_VID_REMEMBER 40041
#define IDM_VID_SDL_SW 40050
#define IDM_VID_SDL_HW 40051
#define IDM_VID_SDL_OPENGL 40052
#ifdef USE_VNC
#define IDM_VID_VNC 40052
#define IDM_VID_VNC 40053
#endif
#define IDM_VID_SCALE_1X 40055
#define IDM_VID_SCALE_2X 40056

3
src/include/86box/vid_svga.h
View File

@@ -20,7 +20,8 @@
#define FLAG_EXTRA_BANKS 1
#define FLAG_ADDR_BY8 2
#define FLAG_LATCH8 4
#define FLAG_EXT_WRITE 4
#define FLAG_LATCH8 8
typedef struct {

2
src/include/86box/video.h
View File

@@ -214,10 +214,8 @@ extern const device_t gd5401_isa_device;
extern const device_t gd5402_isa_device;
extern const device_t gd5402_onboard_device;
extern const device_t gd5420_isa_device;
#if defined(DEV_BRANCH) && defined(USE_CL5422)
extern const device_t gd5422_isa_device;
extern const device_t gd5424_vlb_device;
#endif
extern const device_t gd5426_vlb_device;
extern const device_t gd5426_onboard_device;
extern const device_t gd5428_isa_device;

4
src/include/86box/win.h
View File

@@ -83,9 +83,9 @@ DECLARE_HANDLE(DPI_AWARENESS_CONTEXT);
#define WM_HAS_SHUTDOWN 0x8897
#ifdef USE_VNC
#define RENDERERS_NUM 3
#define RENDERERS_NUM 4
#else
#define RENDERERS_NUM 2
#define RENDERERS_NUM 3
#endif

2
src/include/86box/win_sdl.h
View File

@@ -53,8 +53,10 @@
extern void sdl_close(void);
extern int sdl_inits(HWND h);
extern int sdl_inith(HWND h);
extern int sdl_initho(HWND h);
extern int sdl_inits_fs(HWND h);
extern int sdl_inith_fs(HWND h);
extern int sdl_initho_fs(HWND h);
extern int sdl_pause(void);
extern void sdl_resize(int x, int y);
extern void sdl_enable(int enable);

12
src/io.c
View File

@@ -307,7 +307,7 @@ inb(uint16_t port)
amstrad_latch = AMSTRAD_SW9;
if (!found)
sub_cycles(io_delay);
cycles -= io_delay;
io_log("[%04X:%08X] (%i, %i, %04i) in b(%04X) = %02X\n", CS, cpu_state.pc, in_smm, found, qfound, port, ret);
@@ -334,7 +334,7 @@ outb(uint16_t port, uint8_t val)
}
if (!found) {
sub_cycles(io_delay);
cycles -= io_delay;
#ifdef USE_DYNAREC
if (cpu_use_dynarec && ((port == 0xeb) || (port == 0xed)))
update_tsc();
@@ -392,7 +392,7 @@ inw(uint16_t port)
amstrad_latch = AMSTRAD_SW9;
if (!found)
sub_cycles(io_delay);
cycles -= io_delay;
io_log("[%04X:%08X] (%i, %i, %04i) in w(%04X) = %04X\n", CS, cpu_state.pc, in_smm, found, qfound, port, ret);
@@ -433,7 +433,7 @@ outw(uint16_t port, uint16_t val)
}
if (!found) {
sub_cycles(io_delay);
cycles -= io_delay;
#ifdef USE_DYNAREC
if (cpu_use_dynarec && ((port == 0xeb) || (port == 0xed)))
update_tsc();
@@ -510,7 +510,7 @@ inl(uint16_t port)
amstrad_latch = AMSTRAD_SW9;
if (!found)
sub_cycles(io_delay);
cycles -= io_delay;
io_log("[%04X:%08X] (%i, %i, %04i) in l(%04X) = %08X\n", CS, cpu_state.pc, in_smm, found, qfound, port, ret);
@@ -566,7 +566,7 @@ outl(uint16_t port, uint32_t val)
}
if (!found) {
sub_cycles(io_delay);
cycles -= io_delay;
#ifdef USE_DYNAREC
if (cpu_use_dynarec && ((port == 0xeb) || (port == 0xed)))
update_tsc();

4
src/machine/m_amstrad.c
View File

@@ -301,7 +301,7 @@ vid_write_1512(uint32_t addr, uint8_t val, void *priv)
amsvid_t *vid = (amsvid_t *)priv;
egawrites++;
sub_cycles(12);
cycles -= 12;
addr &= 0x3fff;
if ((vid->cgamode & 0x12) == 0x12) {
@@ -320,7 +320,7 @@ vid_read_1512(uint32_t addr, void *priv)
amsvid_t *vid = (amsvid_t *)priv;
egareads++;
sub_cycles(12);
cycles -= 12;
addr &= 0x3fff;
if ((vid->cgamode & 0x12) == 0x12)

4
src/machine/m_at_t3100e_vid.c
View File

@@ -204,7 +204,7 @@ void t3100e_write(uint32_t addr, uint8_t val, void *p)
egawrites++;
t3100e->vram[addr & 0x7fff] = val;
sub_cycles(4);
cycles -= 4;
}
@@ -213,7 +213,7 @@ uint8_t t3100e_read(uint32_t addr, void *p)
{
t3100e_t *t3100e = (t3100e_t *)p;
egareads++;
sub_cycles(4);
cycles -= 4;
return t3100e->vram[addr & 0x7fff];
}

4
src/machine/m_xt_t1000_vid.c
View File

@@ -194,14 +194,14 @@ static void t1000_write(uint32_t addr, uint8_t val, void *p)
egawrites++;
t1000->vram[addr & 0x3fff] = val;
sub_cycles(4);
cycles -= 4;
}
static uint8_t t1000_read(uint32_t addr, void *p)
{
t1000_t *t1000 = (t1000_t *)p;
egareads++;
sub_cycles(4);
cycles -= 4;
return t1000->vram[addr & 0x3fff];
}

89
src/mem/mem.c
View File

@@ -273,7 +273,7 @@ mem_flush_write_page(uint32_t addr, uint32_t virt)
#define rammap(x) ((uint32_t *)(_mem_exec[(x) >> MEM_GRANULARITY_BITS]))[((x) >> 2) & MEM_GRANULARITY_QMASK]
#define rammap64(x) ((uint64_t *)(_mem_exec[(x) >> MEM_GRANULARITY_BITS]))[((x) >> 3) & MEM_GRANULARITY_PMASK]
static uint64_t
static __inline uint64_t
mmutranslatereal_normal(uint32_t addr, int rw)
{
uint32_t temp,temp2,temp3;
@@ -335,7 +335,7 @@ mmutranslatereal_normal(uint32_t addr, int rw)
}
static uint64_t
static __inline uint64_t
mmutranslatereal_pae(uint32_t addr, int rw)
{
uint64_t temp,temp2,temp3,temp4;
@@ -428,7 +428,7 @@ mmutranslatereal32(uint32_t addr, int rw)
}
static uint64_t
static __inline uint64_t
mmutranslate_noabrt_normal(uint32_t addr, int rw)
{
uint32_t temp,temp2,temp3;
@@ -461,7 +461,7 @@ mmutranslate_noabrt_normal(uint32_t addr, int rw)
}
static uint64_t
static __inline uint64_t
mmutranslate_noabrt_pae(uint32_t addr, int rw)
{
uint64_t temp,temp2,temp3,temp4;
@@ -571,7 +571,7 @@ addreadlookup(uint32_t virt, uint32_t phys)
readlookup[readlnext++] = virt >> 12;
readlnext &= (cachesize-1);
sub_cycles(9);
cycles -= 9;
}
@@ -624,7 +624,7 @@ addwritelookup(uint32_t virt, uint32_t phys)
writelookup[writelnext++] = virt >> 12;
writelnext &= (cachesize - 1);
sub_cycles(9);
cycles -= 9;
}
@@ -664,15 +664,19 @@ uint8_t
read_mem_b(uint32_t addr)
{
mem_mapping_t *map;
uint8_t ret = 0xff;
int old_cycles = cycles;
mem_logical_addr = addr;
addr &= rammask;
map = read_mapping[addr >> MEM_GRANULARITY_BITS];
if (map && map->read_b)
return map->read_b(addr, map->p);
ret = map->read_b(addr, map->p);
return 0xff;
resub_cycles(old_cycles);
return ret;
}
@@ -680,22 +684,26 @@ uint16_t
read_mem_w(uint32_t addr)
{
mem_mapping_t *map;
uint16_t ret = 0xffff;
int old_cycles = cycles;
mem_logical_addr = addr;
addr &= rammask;
if (addr & 1)
return read_mem_b(addr) | (read_mem_b(addr + 1) << 8);
ret = read_mem_b(addr) | (read_mem_b(addr + 1) << 8);
else {
map = read_mapping[addr >> MEM_GRANULARITY_BITS];
map = read_mapping[addr >> MEM_GRANULARITY_BITS];
if (map && map->read_w)
ret = map->read_w(addr, map->p);
else if (map && map->read_b)
ret = map->read_b(addr, map->p) | (map->read_b(addr + 1, map->p) << 8);
}
if (map && map->read_w)
return map->read_w(addr, map->p);
resub_cycles(old_cycles);
if (map && map->read_b)
return map->read_b(addr, map->p) | (map->read_b(addr + 1, map->p) << 8);
return 0xffff;
return ret;
}
@@ -703,6 +711,7 @@ void
write_mem_b(uint32_t addr, uint8_t val)
{
mem_mapping_t *map;
int old_cycles = cycles;
mem_logical_addr = addr;
addr &= rammask;
@@ -710,6 +719,8 @@ write_mem_b(uint32_t addr, uint8_t val)
map = write_mapping[addr >> MEM_GRANULARITY_BITS];
if (map && map->write_b)
map->write_b(addr, val, map->p);
resub_cycles(old_cycles);
}
@@ -717,6 +728,7 @@ void
write_mem_w(uint32_t addr, uint16_t val)
{
mem_mapping_t *map;
int old_cycles = cycles;
mem_logical_addr = addr;
addr &= rammask;
@@ -724,18 +736,19 @@ write_mem_w(uint32_t addr, uint16_t val)
if (addr & 1) {
write_mem_b(addr, val);
write_mem_b(addr + 1, val >> 8);
return;
}
map = write_mapping[addr >> MEM_GRANULARITY_BITS];
if (map) {
if (map->write_w)
map->write_w(addr, val, map->p);
else if (map->write_b) {
map->write_b(addr, val, map->p);
map->write_b(addr + 1, val >> 8, map->p);
} else {
map = write_mapping[addr >> MEM_GRANULARITY_BITS];
if (map) {
if (map->write_w)
map->write_w(addr, val, map->p);
else if (map->write_b) {
map->write_b(addr, val, map->p);
map->write_b(addr + 1, val >> 8, map->p);
}
}
}
resub_cycles(old_cycles);
}
@@ -802,7 +815,7 @@ readmemwl(uint32_t addr)
if (addr64 & 1) {
if (!cpu_cyrix_alignment || (addr64 & 7) == 7)
sub_cycles(timing_misaligned);
cycles -= timing_misaligned;
if ((addr64 & 0xfff) > 0xffe) {
if (cr0 >> 31) {
if (mmutranslate_read(addr) == 0xffffffffffffffffULL)
@@ -846,7 +859,7 @@ writememwl(uint32_t addr, uint16_t val)
if (addr & 1) {
if (!cpu_cyrix_alignment || (addr & 7) == 7)
sub_cycles(timing_misaligned);
cycles -= timing_misaligned;
if ((addr & 0xFFF) > 0xFFE) {
if (cr0 >> 31) {
if (mmutranslate_write(addr) == 0xffffffff)
@@ -899,7 +912,7 @@ readmemll(uint32_t addr)
if (addr & 3) {
if (!cpu_cyrix_alignment || (addr & 7) > 4)
sub_cycles(timing_misaligned);
cycles -= timing_misaligned;
if ((addr & 0xfff) > 0xffc) {
if (cr0>>31) {
if (mmutranslate_read(addr) == 0xffffffffffffffffULL)
@@ -949,7 +962,7 @@ writememll(uint32_t addr, uint32_t val)
if (addr & 3) {
if (!cpu_cyrix_alignment || (addr & 7) > 4)
sub_cycles(timing_misaligned);
cycles -= timing_misaligned;
if ((addr & 0xFFF) > 0xFFC) {
if (cr0>>31) {
if (mmutranslate_write(addr) == 0xffffffffffffffffULL)
@@ -1005,7 +1018,7 @@ readmemql(uint32_t addr)
mem_logical_addr = addr;
if (addr & 7) {
sub_cycles(timing_misaligned);
cycles -= timing_misaligned;
if ((addr & 0xFFF) > 0xFF8) {
if (cr0>>31) {
if (mmutranslate_read(addr) == 0xffffffffffffffffULL)
@@ -1045,7 +1058,7 @@ writememql(uint32_t addr, uint64_t val)
mem_logical_addr = addr;
if (addr & 7) {
sub_cycles(timing_misaligned);
cycles -= timing_misaligned;
if ((addr & 0xFFF) > 0xFF8) {
if (cr0>>31) {
if (mmutranslate_write(addr) == 0xffffffffffffffffULL)
@@ -1122,7 +1135,7 @@ readmemwl(uint32_t seg, uint32_t addr)
if (addr2 & 1) {
if (!cpu_cyrix_alignment || (addr2 & 7) == 7)
sub_cycles(timing_misaligned);
cycles -= timing_misaligned;
if ((addr2 & 0xfff) > 0xffe) {
if (cr0 >> 31) {
if (mmutranslate_read(addr2) == 0xffffffffffffffffULL)
@@ -1174,7 +1187,7 @@ writememwl(uint32_t seg, uint32_t addr, uint16_t val)
if (addr2 & 1) {
if (!cpu_cyrix_alignment || (addr2 & 7) == 7)
sub_cycles(timing_misaligned);
cycles -= timing_misaligned;
if ((addr2 & 0xFFF) > 0xffe) {
if (cr0 >> 31) {
if (mmutranslate_write(addr2) == 0xffffffffffffffffULL) return;
@@ -1234,7 +1247,7 @@ readmemll(uint32_t seg, uint32_t addr)
if (addr2 & 3) {
if (!cpu_cyrix_alignment || (addr2 & 7) > 4)
sub_cycles(timing_misaligned);
cycles -= timing_misaligned;
if ((addr2 & 0xfff) > 0xffc) {
if (cr0 >> 31) {
if (mmutranslate_read(addr2) == 0xffffffffffffffffULL) return 0xffffffff;
@@ -1284,7 +1297,7 @@ writememll(uint32_t seg, uint32_t addr, uint32_t val)
if (addr2 & 3) {
if (!cpu_cyrix_alignment || (addr2 & 7) > 4)
sub_cycles(timing_misaligned);
cycles -= timing_misaligned;
if ((addr2 & 0xfff) > 0xffc) {
if (cr0 >> 31) {
if (mmutranslate_write(addr2) == 0xffffffffffffffffULL) return;
@@ -1344,7 +1357,7 @@ readmemql(uint32_t seg, uint32_t addr)
uint32_t addr2 = mem_logical_addr = seg + addr;
if (addr2 & 7) {
sub_cycles(timing_misaligned);
cycles -= timing_misaligned;
if ((addr2 & 0xfff) > 0xff8) {
if (cr0 >> 31) {
if (mmutranslate_read(addr2) == 0xffffffffffffffffULL) return 0xffffffffffffffffULL;
@@ -1382,7 +1395,7 @@ writememql(uint32_t seg, uint32_t addr, uint64_t val)
uint32_t addr2 = mem_logical_addr = seg + addr;
if (addr2 & 7) {
sub_cycles(timing_misaligned);
cycles -= timing_misaligned;
if ((addr2 & 0xfff) > 0xff8) {
if (cr0 >> 31) {
if (mmutranslate_write(addr2) == 0xffffffffffffffffULL) return;

4
src/nvr_at.c
View File

@@ -638,7 +638,7 @@ nvr_write(uint16_t addr, uint8_t val, void *priv)
local_t *local = (local_t *)nvr->data;
uint8_t addr_id = (addr & 0x0e) >> 1;
sub_cycles(ISA_CYCLES(8));
cycles -= ISA_CYCLES(8);
if (local->bank[addr_id] == 0xff)
return;
@@ -673,7 +673,7 @@ nvr_read(uint16_t addr, void *priv)
uint8_t addr_id = (addr & 0x0e) >> 1;
uint16_t i, checksum = 0x0000;
sub_cycles(ISA_CYCLES(8));
cycles -= ISA_CYCLES(8);
if (/* (addr & 1) && */(local->bank[addr_id] == 0xff))
return 0xff;

24
src/pic.c
View File

@@ -31,6 +31,10 @@
#include <86box/pic.h>
#include <86box/timer.h>
#include <86box/pit.h>
#include <86box/device.h>
#include <86box/apm.h>
#include <86box/nvr.h>
#include <86box/acpi.h>
enum
@@ -142,7 +146,7 @@ pic_cascade_mode(pic_t *dev)
}
static uint8_t
static __inline uint8_t
pic_slave_on(pic_t *dev, int channel)
{
pic_log("pic_slave_on(%i): %i, %02X, %02X\n", channel, pic_cascade_mode(dev), dev->icw4 & 0x0c, dev->icw3 & (1 << channel));
@@ -152,7 +156,7 @@ pic_slave_on(pic_t *dev, int channel)
}
static int
static __inline int
find_best_interrupt(pic_t *dev)
{
uint8_t b, s;
@@ -184,7 +188,7 @@ find_best_interrupt(pic_t *dev)
}
void
static __inline void
pic_update_pending(void)
{
int is_at = IS_ARCH(machine, (MACHINE_BUS_ISA16 | MACHINE_BUS_MCA | MACHINE_BUS_PCMCIA));
@@ -321,7 +325,7 @@ pic_action(pic_t *dev, uint8_t irq, uint8_t eoi, uint8_t rotate)
/* Automatic non-specific EOI. */
static void
static __inline void
pic_auto_non_specific_eoi(pic_t *dev)
{
uint8_t irq;
@@ -520,6 +524,9 @@ picint_common(uint16_t num, int level, int set)
return;
}
if (num & 0x0100)
acpi_rtc_status = !!set;
if (set) {
if (num & 0xff00) {
if (level)
@@ -650,8 +657,13 @@ picinterrupt()
pit_ctr_set_gate(&pit2->counters[0], 0);
/* Two ACK's - do them in a loop to avoid potential compiler misoptimizations. */
for (i = 0; i < 2; i++)
ret = pic_irq_ack();
for (i = 0; i < 2; i++) {
ret = pic_irq_ack_read(&pic, pic.ack_bytes);
pic.ack_bytes = (pic.ack_bytes + 1) % (pic_i86_mode(&pic) ? 2 : 3);
if (pic.ack_bytes == 0)
pic_update_pending();
}
}
return ret;

17
src/pit.c
View File

@@ -358,7 +358,7 @@ ctr_load(ctr_t *ctr)
}
static void
static __inline void
ctr_latch_status(ctr_t *ctr)
{
ctr->read_status = (ctr->ctrl & 0x3f) | (ctr->out ? 0x80 : 0) | (ctr->null_count ? 0x40 : 0);
@@ -366,7 +366,7 @@ ctr_latch_status(ctr_t *ctr)
}
static void
static __inline void
ctr_latch_count(ctr_t *ctr)
{
int count = (ctr->latch || (ctr->state == 1)) ? ctr->l : ctr->count;
@@ -459,8 +459,8 @@ pit_ctr_set_gate(ctr_t *ctr, int gate)
}
void
pit_ctr_set_clock(ctr_t *ctr, int clock)
static __inline void
pit_ctr_set_clock_common(ctr_t *ctr, int clock)
{
int old = ctr->clock;
@@ -491,6 +491,13 @@ pit_ctr_set_clock(ctr_t *ctr, int clock)
}
void
pit_ctr_set_clock(ctr_t *ctr, int clock)
{
pit_ctr_set_clock_common(ctr, clock);
}
void
pit_ctr_set_using_timer(ctr_t *ctr, int using_timer)
{
@@ -509,7 +516,7 @@ pit_timer_over(void *p)
dev->clock ^= 1;
for (i = 0; i < 3; i++)
pit_ctr_set_clock(&dev->counters[i], dev->clock);
pit_ctr_set_clock_common(&dev->counters[i], dev->clock);
timer_advance_u64(&dev->callback_timer, PITCONST >> 1ULL);
}

4
src/sound/snd_opl.c
View File

@@ -228,7 +228,7 @@ opl2_read(uint16_t port, void *priv)
opl_t *dev = (opl_t *)priv;
if (dev->flags & FLAG_CYCLES)
sub_cycles((int) (isa_timing * 8));
cycles -= ((int) (isa_timing * 8));
opl2_update(dev);
@@ -277,7 +277,7 @@ opl3_read(uint16_t port, void *priv)
opl_t *dev = (opl_t *)priv;
if (dev->flags & FLAG_CYCLES)
sub_cycles((int)(isa_timing * 8));
cycles -= ((int)(isa_timing * 8));
opl3_update(dev);

2
src/sound/snd_sb.c
View File

@@ -1207,7 +1207,7 @@ sb_pro_v1_opl_read(uint16_t port, void *priv)
{
sb_t *sb = (sb_t *)priv;
sub_cycles((int)(isa_timing * 8));
cycles -= ((int) (isa_timing * 8));
(void)opl2_read(port, &sb->opl2); // read, but ignore
return(opl2_read(port, &sb->opl));

6
src/usb.c
View File

@@ -102,8 +102,10 @@ uhci_reg_writew(uint16_t addr, uint16_t val, void *p)
switch (addr) {
case 0x00:
if ((regs[0x00] & 0x0001) && !(val & 0x0001))
regs[0x02] |= 0x20;
if ((val & 0x0001) && !(regs[0x00] & 0x0001))
regs[0x01] &= ~0x20;
else if (!(val & 0x0001))
regs[0x01] |= 0x20;
regs[0x00] = (val & 0x00ff);
break;
case 0x06:

2
src/video/vid_cga.c
View File

@@ -123,7 +123,7 @@ cga_waitstates(void *p)
int ws;
ws = ws_array[cycles & 0xf];
sub_cycles(ws);
cycles -= ws;
}

24
src/video/vid_cl54xx.c
View File

@@ -42,11 +42,7 @@
#define BIOS_GD5402_PATH L"roms/video/cirruslogic/avga2.rom"
#define BIOS_GD5402_ONBOARD_PATH L"roms/machines/cbm_sl386sx25/Commodore386SX-25_AVGA2.bin"
#define BIOS_GD5420_PATH L"roms/video/cirruslogic/5420.vbi"
#if defined(DEV_BRANCH) && defined(USE_CL5422)
#define BIOS_GD5422_PATH L"roms/video/cirruslogic/cl5422.bin"
#endif
#define BIOS_GD5426_PATH L"roms/video/cirruslogic/Diamond SpeedStar PRO VLB v3.04.bin"
#define BIOS_GD5428_ISA_PATH L"roms/video/cirruslogic/5428.bin"
#define BIOS_GD5428_PATH L"roms/video/cirruslogic/vlbusjapan.BIN"
@@ -535,6 +531,8 @@ gd54xx_out(uint16_t addr, uint8_t val, void *p)
svga->adv_flags = FLAG_EXTRA_BANKS;
if (svga->gdcreg[0xb] & 0x02)
svga->adv_flags |= FLAG_ADDR_BY8;
if (svga->gdcreg[0xb] & 0x04)
svga->adv_flags |= FLAG_EXT_WRITE;
if (svga->gdcreg[0xb] & 0x08)
svga->adv_flags |= FLAG_LATCH8;
gd54xx_recalc_banking(gd54xx);
@@ -1447,6 +1445,7 @@ gd54xx_write_modes45(svga_t *svga, uint8_t val, uint32_t addr)
case 4:
if (svga->gdcreg[0xb] & 0x10) {
addr <<= 2;
addr &= svga->decode_mask;
for (i = 0; i < 8; i++) {
if (val & svga->seqregs[2] & (0x80 >> i)) {
@@ -1456,6 +1455,7 @@ gd54xx_write_modes45(svga_t *svga, uint8_t val, uint32_t addr)
}
} else {
addr <<= 1;
addr &= svga->decode_mask;
for (i = 0; i < 8; i++) {
if (val & svga->seqregs[2] & (0x80 >> i))
@@ -1467,6 +1467,7 @@ gd54xx_write_modes45(svga_t *svga, uint8_t val, uint32_t addr)
case 5:
if (svga->gdcreg[0xb] & 0x10) {
addr <<= 2;
addr &= svga->decode_mask;
for (i = 0; i < 8; i++) {
j = (0x80 >> i);
@@ -1479,6 +1480,7 @@ gd54xx_write_modes45(svga_t *svga, uint8_t val, uint32_t addr)
}
} else {
addr <<= 1;
addr &= svga->decode_mask;
for (i = 0; i < 8; i++) {
j = (0x80 >> i);
@@ -1602,7 +1604,7 @@ gd54xx_readw_linear(uint32_t addr, void *p)
temp |= (svga_readb_linear(addr, svga) << 8);
if (svga->fast)
sub_cycles(video_timing_read_w);
cycles -= video_timing_read_w;
return temp;
case 3:
@@ -1653,7 +1655,7 @@ gd54xx_readl_linear(uint32_t addr, void *p)
temp |= (svga_readb_linear(addr + 2, svga) << 24);
if (svga->fast)
sub_cycles(video_timing_read_l);
cycles -= video_timing_read_l;
return temp;
case 2:
@@ -1663,7 +1665,7 @@ gd54xx_readl_linear(uint32_t addr, void *p)
temp |= (svga_readb_linear(addr, svga) << 24);
if (svga->fast)
sub_cycles(video_timing_read_l);
cycles -= video_timing_read_l;
return temp;
case 3:
@@ -1852,7 +1854,7 @@ gd54xx_writew_linear(uint32_t addr, uint16_t val, void *p)
svga_writeb_linear(addr, val >> 8, svga);
if (svga->fast)
sub_cycles(video_timing_write_w);
cycles -= video_timing_write_w;
case 3:
return;
}
@@ -3072,12 +3074,10 @@ static void
romfn = BIOS_GD5420_PATH;
break;
#if defined(DEV_BRANCH) && defined(USE_CL5422)
case CIRRUS_ID_CLGD5422:
case CIRRUS_ID_CLGD5424:
romfn = BIOS_GD5422_PATH;
break;
#endif
case CIRRUS_ID_CLGD5426:
if (info->local & 0x200)
@@ -3295,13 +3295,11 @@ gd5420_available(void)
return rom_present(BIOS_GD5420_PATH);
}
#if defined(DEV_BRANCH) && defined(USE_CL5422)
static int
gd5422_available(void)
{
return rom_present(BIOS_GD5422_PATH);
}
#endif
static int
gd5426_available(void)
@@ -3589,7 +3587,6 @@ const device_t gd5420_isa_device =
gd5422_config,
};
#if defined(DEV_BRANCH) && defined(USE_CL5422)
const device_t gd5422_isa_device = {
"Cirrus Logic GD-5422",
DEVICE_AT | DEVICE_ISA,
@@ -3613,7 +3610,6 @@ const device_t gd5424_vlb_device = {
gd54xx_force_redraw,
gd5422_config,
};
#endif
const device_t gd5426_vlb_device =
{

4
src/video/vid_colorplus.c
View File

@@ -100,7 +100,7 @@ void colorplus_write(uint32_t addr, uint8_t val, void *p)
colorplus->cga.charbuffer[offset | 1] = colorplus->cga.vram[addr & 0x7fff];
}
egawrites++;
sub_cycles(4);
cycles -= 4;
}
uint8_t colorplus_read(uint32_t addr, void *p)
@@ -117,7 +117,7 @@ uint8_t colorplus_read(uint32_t addr, void *p)
{
addr &= 0x3FFF;
}
sub_cycles(4);
cycles -= 4;
if (colorplus->cga.snow_enabled)
{
int offset = ((timer_get_remaining_u64(&colorplus->cga.timer) / CGACONST) * 2) & 0xfc;

4
src/video/vid_ega.c
View File

@@ -732,7 +732,7 @@ ega_write(uint32_t addr, uint8_t val, void *p)
int writemask2 = ega->writemask;
egawrites++;
sub_cycles(video_timing_write_b);
cycles -= video_timing_write_b;
if (addr >= 0xB0000) addr &= 0x7fff;
else addr &= 0xffff;
@@ -859,7 +859,7 @@ ega_read(uint32_t addr, void *p)
int readplane = ega->readplane;
egareads++;
sub_cycles(video_timing_read_b);
cycles -= video_timing_read_b;
if (addr >= 0xb0000) addr &= 0x7fff;
else addr &= 0xffff;

2
src/video/vid_genius.c
View File

@@ -253,7 +253,7 @@ genius_waitstates(void)
int ws;
ws = ws_array[cycles & 0xf];
sub_cycles(ws);
cycles -= ws;
}

2
src/video/vid_hercules.c
View File

@@ -212,7 +212,7 @@ hercules_waitstates(void *p)
int ws;
ws = ws_array[cycles & 0xf];
sub_cycles(ws);
cycles -= ws;
}

4
src/video/vid_ht216.c
View File

@@ -729,7 +729,7 @@ ht216_write_common(ht216_t *ht216, uint32_t addr, uint8_t val)
svga_t *svga = &ht216->svga;
uint8_t bit_mask = 0, rop_select = 0;
sub_cycles(video_timing_write_b);
cycles -= video_timing_write_b;
egawrites++;
@@ -911,7 +911,7 @@ ht216_read_common(ht216_t *ht216, uint32_t addr)
addr &= 0xfffff;
sub_cycles(video_timing_read_b);
cycles -= video_timing_read_b;
egareads++;

12
src/video/vid_mga.c
View File

@@ -2132,7 +2132,7 @@ mystique_readb_linear(uint32_t addr, void *p)
egareads++;
sub_cycles(video_timing_read_b);
cycles -= video_timing_read_b;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
@@ -2149,7 +2149,7 @@ mystique_readw_linear(uint32_t addr, void *p)
egareads += 2;
sub_cycles(video_timing_read_w);
cycles -= video_timing_read_w;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
@@ -2166,7 +2166,7 @@ mystique_readl_linear(uint32_t addr, void *p)
egareads += 4;
sub_cycles(video_timing_read_l);
cycles -= video_timing_read_l;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
@@ -2183,7 +2183,7 @@ mystique_writeb_linear(uint32_t addr, uint8_t val, void *p)
egawrites++;
sub_cycles(video_timing_write_b);
cycles -= video_timing_write_b;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
@@ -2201,7 +2201,7 @@ mystique_writew_linear(uint32_t addr, uint16_t val, void *p)
egawrites += 2;
sub_cycles(video_timing_write_w);
cycles -= video_timing_write_w;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
@@ -2219,7 +2219,7 @@ mystique_writel_linear(uint32_t addr, uint32_t val, void *p)
egawrites += 4;
sub_cycles(video_timing_write_l);
cycles -= video_timing_write_l;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)

4
src/video/vid_sigma.c
View File

@@ -344,7 +344,7 @@ sigma_write(uint32_t addr, uint8_t val, void *p)
sigma->vram[sigma->plane * 0x8000 + (addr & 0x7fff)] = val;
egawrites++;
sub_cycles(4);
cycles -= 4;
}
@@ -353,7 +353,7 @@ sigma_read(uint32_t addr, void *p)
{
sigma_t *sigma = (sigma_t *)p;
sub_cycles(4);
cycles -= 4;
egareads++;
return sigma->vram[sigma->plane * 0x8000 + (addr & 0x7fff)];
}

82
src/video/vid_svga.c
View File

@@ -1015,7 +1015,7 @@ svga_write_common(uint32_t addr, uint8_t val, uint8_t linear, void *p)
egawrites++;
sub_cycles(video_timing_write_b);
cycles -= video_timing_write_b;
if (!linear) {
addr = svga_decode_addr(svga, addr, 1);
@@ -1057,14 +1057,23 @@ svga_write_common(uint32_t addr, uint8_t val, uint8_t linear, void *p)
if (svga->adv_flags & FLAG_LATCH8)
count = 8;
/* Undocumented Cirrus Logic behavior: The datasheet says that, with EXT_WRITE and FLAG_ADDR_BY8, the write mask only
changes meaning in write modes 4 and 5, as well as write mode 1. In reality, however, all other write modes are also
affected, as proven by the Windows 3.1 CL-GD 5422/4 drivers in 8bpp modes. */
switch (svga->writemode) {
case 0:
if (svga->gdcreg[3] & 7)
val = svga_rotate[svga->gdcreg[3] & 7][val];
val = ((val >> (svga->gdcreg[3] & 7)) | (val << (8 - (svga->gdcreg[3] & 7))));
// if (svga->gdcreg[3] & 7)
// val = svga_rotate[svga->gdcreg[3] & 7][val];
if ((svga->gdcreg[8] == 0xff) && !(svga->gdcreg[3] & 0x18) && (!svga->gdcreg[1] || svga->set_reset_disabled)) {
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
svga->vram[addr | i] = val;
if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) {
if (writemask2 & (0x80 >> i))
svga->vram[addr | i] = val;
} else {
if (writemask2 & (1 << i))
svga->vram[addr | i] = val;
}
}
return;
} else {
@@ -1078,8 +1087,13 @@ svga_write_common(uint32_t addr, uint8_t val, uint8_t linear, void *p)
break;
case 1:
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
svga->vram[addr | i] = svga->latch.b[i];
if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) {
if (writemask2 & (0x80 >> i))
svga->vram[addr | i] = svga->latch.b[i];
} else {
if (writemask2 & (1 << i))
svga->vram[addr | i] = svga->latch.b[i];
}
}
return;
case 2:
@@ -1095,8 +1109,9 @@ svga_write_common(uint32_t addr, uint8_t val, uint8_t linear, void *p)
}
break;
case 3:
if (svga->gdcreg[3] & 7)
val = svga_rotate[svga->gdcreg[3] & 7][val];
val = ((val >> (svga->gdcreg[3] & 7)) | (val << (8 - (svga->gdcreg[3] & 7))));
// if (svga->gdcreg[3] & 7)
// val = svga_rotate[svga->gdcreg[3] & 7][val];
wm = svga->gdcreg[8];
svga->gdcreg[8] &= val;
@@ -1114,26 +1129,46 @@ svga_write_common(uint32_t addr, uint8_t val, uint8_t linear, void *p)
switch (svga->gdcreg[3] & 0x18) {
case 0x00: /* Set */
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]);
if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) {
if (writemask2 & (0x80 >> i))
svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]);
} else {
if (writemask2 & (1 << i))
svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]);
}
}
break;
case 0x08: /* AND */
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
svga->vram[addr | i] = (vall.b[i] | ~svga->gdcreg[8]) & svga->latch.b[i];
if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) {
if (writemask2 & (0x80 >> i))
svga->vram[addr | i] = (vall.b[i] | ~svga->gdcreg[8]) & svga->latch.b[i];
} else {
if (writemask2 & (1 << i))
svga->vram[addr | i] = (vall.b[i] | ~svga->gdcreg[8]) & svga->latch.b[i];
}
}
break;
case 0x10: /* OR */
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | svga->latch.b[i];
if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) {
if (writemask2 & (0x80 >> i))
svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | svga->latch.b[i];
} else {
if (writemask2 & (1 << i))
svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | svga->latch.b[i];
}
}
break;
case 0x18: /* XOR */
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) ^ svga->latch.b[i];
if ((svga->adv_flags & FLAG_EXT_WRITE) && (svga->adv_flags & FLAG_ADDR_BY8)) {
if (writemask2 & (0x80 >> i))
svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) ^ svga->latch.b[i];
} else {
if (writemask2 & (1 << i))
svga->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) ^ svga->latch.b[i];
}
}
break;
}
@@ -1156,7 +1191,7 @@ svga_read_common(uint32_t addr, uint8_t linear, void *p)
if (svga->adv_flags & FLAG_ADDR_BY8)
readplane = svga->gdcreg[4] & 7;
sub_cycles(video_timing_read_b);
cycles -= video_timing_read_b;
egareads++;
@@ -1182,6 +1217,9 @@ svga_read_common(uint32_t addr, uint8_t linear, void *p)
addr = svga->translate_address(addr, p);
if (addr >= svga->vram_max)
return 0xff;
latch_addr = (addr & svga->vram_mask) & ~3;
for (i = 0; i < count; i++)
svga->latch.b[i] = svga->vram[latch_addr | i];
return svga->vram[addr & svga->vram_mask];
} else if (svga->chain2_read) {
readplane = (readplane & 2) | (addr & 1);
@@ -1381,7 +1419,7 @@ svga_writew_common(uint32_t addr, uint16_t val, uint8_t linear, void *p)
egawrites += 2;
sub_cycles(video_timing_write_w);
cycles -= video_timing_write_w;
if (!linear) {
addr = svga_decode_addr(svga, addr, 1);
@@ -1442,7 +1480,7 @@ svga_writel_common(uint32_t addr, uint32_t val, uint8_t linear, void *p)
egawrites += 4;
sub_cycles(video_timing_write_l);
cycles -= video_timing_write_l;
if (!linear) {
addr = svga_decode_addr(svga, addr, 1);
@@ -1526,7 +1564,7 @@ svga_readw_common(uint32_t addr, uint8_t linear, void *p)
egareads += 2;
sub_cycles(video_timing_read_w);
cycles -= video_timing_read_w;
if (!linear) {
addr = svga_decode_addr(svga, addr, 0);
@@ -1579,7 +1617,7 @@ svga_readl_common(uint32_t addr, uint8_t linear, void *p)
egareads += 4;
sub_cycles(video_timing_read_l);
cycles -= video_timing_read_l;
if (!linear) {
addr = svga_decode_addr(svga, addr, 0);

4
src/video/vid_table.c
View File

@@ -71,9 +71,7 @@ video_cards[] = {
{ "cl_gd5401_isa", &gd5401_isa_device },
{ "cl_gd5402_isa", &gd5402_isa_device },
{ "cl_gd5420_isa", &gd5420_isa_device },
#if defined(DEV_BRANCH) && defined(USE_CL5422)
{ "cl_gd5422_isa", &gd5422_isa_device },
#endif
{ "cl_gd5428_isa", &gd5428_isa_device },
{ "cl_gd5429_isa", &gd5429_isa_device },
{ "cl_gd5434_isa", &gd5434_isa_device },
@@ -154,9 +152,7 @@ video_cards[] = {
{ "voodoo3_3k_pci", &voodoo_3_3000_device },
{ "mach64gx_vlb", &mach64gx_vlb_device },
{ "et4000w32p_vlb", &et4000w32p_cardex_vlb_device },
#if defined(DEV_BRANCH) && defined(USE_CL5422)
{ "cl_gd5424_vlb", &gd5424_vlb_device },
#endif
{ "cl_gd5428_vlb", &gd5428_vlb_device },
{ "cl_gd5429_vlb", &gd5429_vlb_device },
{ "cl_gd5434_vlb", &gd5434_vlb_device },

6
src/video/vid_tgui9440.c
View File

@@ -798,7 +798,7 @@ static uint8_t tgui_ext_linear_read(uint32_t addr, void *p)
tgui_t *tgui = (tgui_t *)svga->p;
int c;
sub_cycles(video_timing_read_b);
cycles -= video_timing_read_b;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
@@ -829,7 +829,7 @@ static void tgui_ext_linear_write(uint32_t addr, uint8_t val, void *p)
uint8_t bg[2] = {tgui->ext_gdc_regs[1], tgui->ext_gdc_regs[2]};
uint8_t mask = tgui->ext_gdc_regs[7];
sub_cycles(video_timing_write_b);
cycles -= video_timing_write_b;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
@@ -898,7 +898,7 @@ static void tgui_ext_linear_writew(uint32_t addr, uint16_t val, void *p)
uint8_t bg[2] = {tgui->ext_gdc_regs[1], tgui->ext_gdc_regs[2]};
uint16_t mask = (tgui->ext_gdc_regs[7] << 8) | tgui->ext_gdc_regs[8];
sub_cycles(video_timing_write_w);
cycles -= video_timing_write_w;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)

10
src/video/vid_voodoo.c
View File

@@ -151,7 +151,7 @@ static uint16_t voodoo_readw(uint32_t addr, void *p)
addr &= 0xffffff;
sub_cycles(voodoo->read_time);
cycles -= voodoo->read_time;
if ((addr & 0xc00000) == 0x400000) /*Framebuffer*/
{
@@ -190,7 +190,7 @@ static uint32_t voodoo_readl(uint32_t addr, void *p)
voodoo->rd_count++;
addr &= 0xffffff;
sub_cycles(voodoo->read_time);
cycles -= voodoo->read_time;
if (addr & 0x800000) /*Texture*/
{
@@ -403,7 +403,7 @@ static void voodoo_writew(uint32_t addr, uint16_t val, void *p)
voodoo->wr_count++;
addr &= 0xffffff;
sub_cycles(voodoo->write_time);
cycles -= voodoo->write_time;
if ((addr & 0xc00000) == 0x400000) /*Framebuffer*/
voodoo_queue_command(voodoo, addr | FIFO_WRITEW_FB, val);
@@ -418,9 +418,9 @@ static void voodoo_writel(uint32_t addr, uint32_t val, void *p)
addr &= 0xffffff;
if (addr == voodoo->last_write_addr+4)
sub_cycles(voodoo->burst_time);
cycles -= voodoo->burst_time;
else
sub_cycles(voodoo->write_time);
cycles -= voodoo->write_time;
voodoo->last_write_addr = addr;
if (addr & 0x800000) /*Texture*/

36
src/video/vid_voodoo_banshee.c
View File

@@ -835,7 +835,7 @@ static uint32_t banshee_ext_inl(uint16_t addr, void *p)
svga_t *svga = &banshee->svga;
uint32_t ret = 0xffffffff;
sub_cycles(voodoo->read_time);
cycles -= voodoo->read_time;
switch (addr & 0xff)
{
@@ -1026,7 +1026,7 @@ static uint32_t banshee_reg_readl(uint32_t addr, void *p)
voodoo_t *voodoo = banshee->voodoo;
uint32_t ret = 0xffffffff;
sub_cycles(voodoo->read_time);
cycles -= voodoo->read_time;
switch (addr & 0x1f00000)
{
@@ -1178,7 +1178,7 @@ static void banshee_reg_writew(uint32_t addr, uint16_t val, void *p)
banshee_t *banshee = (banshee_t *)p;
voodoo_t *voodoo = banshee->voodoo;
sub_cycles(voodoo->write_time);
cycles -= voodoo->write_time;
// banshee_log("banshee_reg_writew: addr=%08x val=%04x\n", addr, val);
switch (addr & 0x1f00000)
@@ -1253,9 +1253,9 @@ static void banshee_reg_writel(uint32_t addr, uint32_t val, void *p)
voodoo_t *voodoo = banshee->voodoo;
if (addr == voodoo->last_write_addr+4)
sub_cycles(voodoo->burst_time);
cycles -= voodoo->burst_time;
else
sub_cycles(voodoo->write_time);
cycles -= voodoo->write_time;
voodoo->last_write_addr = addr;
// banshee_log("banshee_reg_writel: addr=%08x val=%08x\n", addr, val);
@@ -1351,7 +1351,7 @@ static uint8_t banshee_read_linear(uint32_t addr, void *p)
voodoo_t *voodoo = banshee->voodoo;
svga_t *svga = &banshee->svga;
sub_cycles(voodoo->read_time);
cycles -= voodoo->read_time;
addr &= svga->decode_mask;
if (addr >= voodoo->tile_base)
@@ -1369,7 +1369,7 @@ static uint8_t banshee_read_linear(uint32_t addr, void *p)
return 0xff;
egareads++;
sub_cycles(video_timing_read_b);
cycles -= video_timing_read_b;
// banshee_log("read_linear: addr=%08x val=%02x\n", addr, svga->vram[addr & svga->vram_mask]);
@@ -1385,8 +1385,7 @@ static uint16_t banshee_read_linear_w(uint32_t addr, void *p)
if (addr & 1)
return banshee_read_linear(addr, p) | (banshee_read_linear(addr+1, p) << 8);
sub_cycles(voodoo->read_time);
cycles -= voodoo->read_time;
addr &= svga->decode_mask;
if (addr >= voodoo->tile_base)
{
@@ -1403,7 +1402,7 @@ static uint16_t banshee_read_linear_w(uint32_t addr, void *p)
return 0xff;
egareads++;
sub_cycles(video_timing_read_w);
cycles -= video_timing_read_w;
// banshee_log("read_linear: addr=%08x val=%02x\n", addr, svga->vram[addr & svga->vram_mask]);
@@ -1419,7 +1418,7 @@ static uint32_t banshee_read_linear_l(uint32_t addr, void *p)
if (addr & 3)
return banshee_read_linear_w(addr, p) | (banshee_read_linear_w(addr+2, p) << 16);
sub_cycles(voodoo->read_time);
cycles -= voodoo->read_time;
addr &= svga->decode_mask;
if (addr >= voodoo->tile_base)
@@ -1437,7 +1436,7 @@ static uint32_t banshee_read_linear_l(uint32_t addr, void *p)
return 0xff;
egareads++;
sub_cycles(video_timing_read_l);
cycles -= video_timing_read_l;
// banshee_log("read_linear: addr=%08x val=%02x\n", addr, svga->vram[addr & svga->vram_mask]);
@@ -1450,7 +1449,7 @@ static void banshee_write_linear(uint32_t addr, uint8_t val, void *p)
voodoo_t *voodoo = banshee->voodoo;
svga_t *svga = &banshee->svga;
sub_cycles(voodoo->write_time);
cycles -= voodoo->write_time;
// banshee_log("write_linear: addr=%08x val=%02x\n", addr, val);
addr &= svga->decode_mask;
@@ -1470,7 +1469,7 @@ static void banshee_write_linear(uint32_t addr, uint8_t val, void *p)
egawrites++;
sub_cycles(video_timing_write_b);
cycles -= video_timing_write_b;
svga->changedvram[addr >> 12] = changeframecount;
svga->vram[addr & svga->vram_mask] = val;
@@ -1489,8 +1488,7 @@ static void banshee_write_linear_w(uint32_t addr, uint16_t val, void *p)
return;
}
sub_cycles(voodoo->write_time);
cycles -= voodoo->write_time;
// banshee_log("write_linear: addr=%08x val=%02x\n", addr, val);
addr &= svga->decode_mask;
if (addr >= voodoo->tile_base)
@@ -1509,7 +1507,7 @@ static void banshee_write_linear_w(uint32_t addr, uint16_t val, void *p)
egawrites++;
sub_cycles(video_timing_write_w);
cycles -= video_timing_write_w;
svga->changedvram[addr >> 12] = changeframecount;
*(uint16_t *)&svga->vram[addr & svga->vram_mask] = val;
@@ -1533,7 +1531,7 @@ static void banshee_write_linear_l(uint32_t addr, uint32_t val, void *p)
timing = voodoo->burst_time;
else
timing = voodoo->write_time;
sub_cycles(timing);
cycles -= timing;
voodoo->last_write_addr = addr;
// /*if (val) */banshee_log("write_linear_l: addr=%08x val=%08x %08x\n", addr, val, voodoo->tile_base);
@@ -1555,7 +1553,7 @@ static void banshee_write_linear_l(uint32_t addr, uint32_t val, void *p)
egawrites += 4;
sub_cycles(video_timing_write_l);
cycles -= video_timing_write_l;
svga->changedvram[addr >> 12] = changeframecount;
*(uint32_t *)&svga->vram[addr & svga->vram_mask] = val;

18
src/video/video.c
View File

@@ -336,7 +336,7 @@ static png_infop info_ptr;
static void
video_take_screenshot(const wchar_t *fn, int startx, int starty, int w, int h)
video_take_screenshot(const wchar_t *fn, int startx, int starty, int y1, int y2, int w, int h)
{
int i, x, y;
png_bytep *b_rgb = NULL;
@@ -382,7 +382,7 @@ video_take_screenshot(const wchar_t *fn, int startx, int starty, int w, int h)
for (y = 0; y < h; ++y) {
b_rgb[y] = (png_byte *) malloc(png_get_rowbytes(png_ptr, info_ptr));
for (x = 0; x < w; ++x) {
temp = render_buffer->line[y + starty][x + startx];
temp = render_buffer->dat[(y * w) + x];
b_rgb[y][(x) * 3 + 0] = (temp >> 16) & 0xff;
b_rgb[y][(x) * 3 + 1] = (temp >> 8) & 0xff;
@@ -407,7 +407,7 @@ video_take_screenshot(const wchar_t *fn, int startx, int starty, int w, int h)
static void
video_screenshot(int x, int y, int w, int h)
video_screenshot(int x, int y, int y1, int y2, int w, int h)
{
wchar_t path[1024], fn[128];
@@ -426,7 +426,7 @@ video_screenshot(int x, int y, int w, int h)
video_log("taking screenshot to: %S\n", path);
video_take_screenshot((const wchar_t *) path, x, y, w, h);
video_take_screenshot((const wchar_t *) path, x, y, y1, y2, w, h);
png_destroy_write_struct(&png_ptr, &info_ptr);
}
@@ -449,20 +449,20 @@ video_blit_memtoscreen(int x, int y, int y1, int y2, int w, int h)
{
int yy;
if ((w > 0) && (h > 0)) {
for (yy = 0; yy < h; yy++) {
if (y2 > 0) {
for (yy = y1; yy < y2; yy++) {
if (((y + yy) >= 0) && ((y + yy) < buffer32->h)) {
if (video_grayscale || invert_display)
video_transform_copy(&(render_buffer->line[y + yy][x]), &(buffer32->line[y + yy][x]), w);
video_transform_copy(&(render_buffer->dat)[yy * w], &(buffer32->line[y + yy][x]), w);
else
memcpy(&(render_buffer->line[y + yy][x]), &(buffer32->line[y + yy][x]), w << 2);
memcpy(&(render_buffer->dat)[yy * w], &(buffer32->line[y + yy][x]), w << 2);
}
}
}
if (screenshots) {
if (render_buffer != NULL)
video_screenshot(x, y, w, h);
video_screenshot(x, y, y1, y2, w, h);
screenshots--;
video_log("screenshot taken, %i left\n", screenshots);
}

2
src/vnc.c
View File

@@ -176,7 +176,7 @@ vnc_blit(int x, int y, int y1, int y2, int w, int h)
p = (uint32_t *)&(((uint32_t *)rfb->frameBuffer)[yy*VNC_MAX_X]);
if ((y+yy) >= 0 && (y+yy) < VNC_MAX_Y)
memcpy(p, &(render_buffer->line[y+yy][x]), w*4);
memcpy(p, &(render_buffer->dat[yy * w]), w*4);
}
video_blit_complete();

3
src/win/86Box.rc
View File

@@ -66,7 +66,8 @@ BEGIN
POPUP "Re&nderer"
BEGIN
MENUITEM "&SDL (Software)", IDM_VID_SDL_SW
MENUITEM "&SDL (Hardware)", IDM_VID_SDL_HW
MENUITEM "SDL (&Hardware)", IDM_VID_SDL_HW
MENUITEM "SDL (&OpenGL)", IDM_VID_SDL_OPENGL
#ifdef USE_VNC
MENUITEM "&VNC", IDM_VID_VNC
#endif

4
src/win/Makefile.mingw
View File

@@ -509,10 +509,6 @@ ifeq ($(AMD_K5), y)
OPTS += -DUSE_AMD_K5
endif
ifeq ($(CL5422), y)
OPTS += -DUSE_CL5422
endif
ifeq ($(CYRIX_6X86), y)
OPTS += -DUSE_CYRIX_6X86
endif

22
src/win/win.c
View File

@@ -89,14 +89,16 @@ static const struct {
} vid_apis[2][RENDERERS_NUM] = {
{
{ "SDL_Software", 1, (int(*)(void*))sdl_inits, sdl_close, NULL, sdl_pause, sdl_enable },
{ "SDL_Hardware", 1, (int(*)(void*))sdl_inith, sdl_close, NULL, sdl_pause, sdl_enable }
{ "SDL_Hardware", 1, (int(*)(void*))sdl_inith, sdl_close, NULL, sdl_pause, sdl_enable },
{ "SDL_OpenGL", 1, (int(*)(void*))sdl_initho, sdl_close, NULL, sdl_pause, sdl_enable }
#ifdef USE_VNC
,{ "VNC", 0, vnc_init, vnc_close, vnc_resize, vnc_pause, NULL }
#endif
},
{
{ "SDL_Software", 1, (int(*)(void*))sdl_inits_fs, sdl_close, sdl_resize, sdl_pause, sdl_enable },
{ "SDL_Hardware", 1, (int(*)(void*))sdl_inith_fs, sdl_close, sdl_resize, sdl_pause, sdl_enable }
{ "SDL_Hardware", 1, (int(*)(void*))sdl_inith_fs, sdl_close, sdl_resize, sdl_pause, sdl_enable },
{ "SDL_OpenGL", 1, (int(*)(void*))sdl_initho_fs, sdl_close, sdl_resize, sdl_pause, sdl_enable }
#ifdef USE_VNC
,{ "VNC", 0, vnc_init, vnc_close, vnc_resize, vnc_pause, NULL }
#endif
@@ -700,9 +702,12 @@ plat_vidapi_name(int api)
break;
case 1:
break;
case 2:
name = "sdl_opengl";
break;
#ifdef USE_VNC
case 2:
case 3:
name = "vnc";
break;
#endif
@@ -762,12 +767,21 @@ plat_vidsize(int x, int y)
void
plat_vidapi_enable(int enable)
{
int i = 1;
if (!vid_api_inited || !vid_apis[video_fullscreen][vid_api].enable) return;
startblit();
video_wait_for_blit();
vid_apis[video_fullscreen][vid_api].enable(enable);
vid_apis[video_fullscreen][vid_api].enable(enable & 1);
endblit();
if (! i) return;
if (enable)
device_force_redraw();
}
int

125
src/win/win_sdl.c
View File

@@ -75,6 +75,7 @@
#define RENDERER_FULL_SCREEN 1
#define RENDERER_HARDWARE 2
#define RENDERER_OPENGL 4
static SDL_Window *sdl_win = NULL;
@@ -83,12 +84,55 @@ static SDL_Texture *sdl_tex = NULL;
static HWND sdl_parent_hwnd = NULL;
static HWND sdl_hwnd = NULL;
static int sdl_w, sdl_h;
static int sdl_fs;
static int sdl_fs, sdl_flags = -1;
static int cur_w, cur_h;
static int cur_wx = 0, cur_wy = 0, cur_ww =0, cur_wh = 0;
static volatile int sdl_enabled = 0;
static SDL_mutex* sdl_mutex = NULL;
typedef struct
{
const void *magic;
Uint32 id;
char *title;
SDL_Surface *icon;
int x, y;
int w, h;
int min_w, min_h;
int max_w, max_h;
Uint32 flags;
Uint32 last_fullscreen_flags;
/* Stored position and size for windowed mode */
SDL_Rect windowed;
SDL_DisplayMode fullscreen_mode;
float brightness;
Uint16 *gamma;
Uint16 *saved_gamma; /* (just offset into gamma) */
SDL_Surface *surface;
SDL_bool surface_valid;
SDL_bool is_hiding;
SDL_bool is_destroying;
void *shaper;
SDL_HitTest hit_test;
void *hit_test_data;
void *data;
void *driverdata;
SDL_Window *prev;
SDL_Window *next;
} SDL_Window_Ex;
#ifdef ENABLE_SDL_LOG
int sdl_do_log = ENABLE_SDL_LOG;
@@ -190,9 +234,7 @@ static void
sdl_blit(int x, int y, int y1, int y2, int w, int h)
{
SDL_Rect r_src;
void *pixeldata;
int pitch;
int yy, ret;
int ret;
if (!sdl_enabled) {
video_blit_complete();
@@ -211,22 +253,13 @@ sdl_blit(int x, int y, int y1, int y2, int w, int h)
SDL_LockMutex(sdl_mutex);
/*
* TODO:
* SDL_UpdateTexture() might be better here, as it is
* (reportedly) slightly faster.
*/
SDL_LockTexture(sdl_tex, 0, &pixeldata, &pitch);
for (yy = y1; yy < y2; yy++) {
if ((y + yy) >= 0 && (y + yy) < render_buffer->h)
memcpy((uint32_t *) &(((uint8_t *)pixeldata)[yy * pitch]), &(render_buffer->line[y + yy][x]), w * 4);
}
r_src.x = 0;
r_src.y = y1;
r_src.w = w;
r_src.h = y2 - y1;
SDL_UpdateTexture(sdl_tex, &r_src, &(render_buffer->dat)[y1 * w], w * 4);
video_blit_complete();
SDL_UnlockTexture(sdl_tex);
if (sdl_fs) {
sdl_log("sdl_blit(%i, %i, %i, %i, %i, %i) (%i, %i)\n", x, y, y1, y2, w, h, unscaled_size_x, efscrnsz_y);
if (w == unscaled_size_x)
@@ -234,6 +267,8 @@ sdl_blit(int x, int y, int y1, int y2, int w, int h)
sdl_log("(%08X, %08X, %08X)\n", sdl_win, sdl_render, sdl_tex);
}
SDL_RenderClear(sdl_render);
r_src.x = 0;
r_src.y = 0;
r_src.w = w;
@@ -252,6 +287,8 @@ sdl_blit(int x, int y, int y1, int y2, int w, int h)
void
sdl_close(void)
{
SDL_LockMutex(sdl_mutex);
/* Unregister our renderer! */
video_setblit(NULL);
@@ -297,6 +334,8 @@ sdl_close(void)
/* Quit. */
SDL_Quit();
sdl_flags = -1;
}
@@ -340,8 +379,12 @@ sdl_init_common(int flags)
return(0);
}
if (flags & RENDERER_HARDWARE)
sdl_select_best_hw_driver();
if (flags & RENDERER_HARDWARE) {
if (flags & RENDERER_OPENGL)
SDL_SetHint(SDL_HINT_RENDER_DRIVER, "OpenGL");
else
sdl_select_best_hw_driver();
}
if (flags & RENDERER_FULL_SCREEN) {
/* Get the size of the (current) desktop. */
@@ -461,6 +504,8 @@ sdl_init_common(int flags)
sdl_mutex = SDL_CreateMutex();
sdl_flags = flags;
return(1);
}
@@ -479,6 +524,13 @@ sdl_inith(HWND h)
}
int
sdl_initho(HWND h)
{
return sdl_init_common(RENDERER_HARDWARE | RENDERER_OPENGL);
}
int
sdl_inits_fs(HWND h)
{
@@ -493,15 +545,30 @@ sdl_inith_fs(HWND h)
}
int
sdl_initho_fs(HWND h)
{
return sdl_init_common(RENDERER_FULL_SCREEN | RENDERER_HARDWARE | RENDERER_OPENGL);
}
void
sdl_reinit_texture()
{
if (sdl_render == NULL)
if ((sdl_render == NULL) || (sdl_flags == -1))
return;
SDL_DestroyTexture(sdl_tex);
SDL_DestroyRenderer(sdl_render);
if (sdl_flags & RENDERER_HARDWARE) {
sdl_render = SDL_CreateRenderer(sdl_win, -1, SDL_RENDERER_ACCELERATED);
SDL_SetHint(SDL_HINT_RENDER_SCALE_QUALITY, "2");
} else
sdl_render = SDL_CreateRenderer(sdl_win, -1, SDL_RENDERER_SOFTWARE);
sdl_tex = SDL_CreateTexture(sdl_render, SDL_PIXELFORMAT_ARGB8888,
SDL_TEXTUREACCESS_STREAMING, 2048, 2048);
SDL_SetWindowSize(sdl_win, cur_ww, cur_wh);
SDL_SetWindowPosition(sdl_win, cur_wx, cur_wy);
}
@@ -520,6 +587,8 @@ sdl_resize(int x, int y)
if ((x == cur_w) && (y == cur_h))
return;
SDL_LockMutex(sdl_mutex);
ww = x;
wh = y;
@@ -531,12 +600,26 @@ sdl_resize(int x, int y)
cur_w = x;
cur_h = y;
cur_wx = wx;
cur_wy = wy;
cur_ww = ww;
cur_wh = wh;
sdl_reinit_texture();
SDL_UnlockMutex(sdl_mutex);
}
void
sdl_enable(int enable)
{
if (sdl_flags == -1)
return;
SDL_LockMutex(sdl_mutex);
sdl_enabled = enable;
if (enable)
sdl_reinit_texture();
SDL_UnlockMutex(sdl_mutex);
}

73
src/win/win_settings.c
View File

@@ -2232,10 +2232,18 @@ win_settings_hard_disks_resize_columns(HWND hdlg)
{
/* Bus, File, Cylinders, Heads, Sectors, Size */
int iCol, width[C_COLUMNS_HARD_DISKS] = {104, 177, 50, 26, 32, 50};
int total = 0;
HWND hwndList = GetDlgItem(hdlg, IDC_LIST_HARD_DISKS);
RECT r;
for (iCol = 0; iCol < C_COLUMNS_HARD_DISKS; iCol++)
GetWindowRect(hwndList, &r);
for (iCol = 0; iCol < (C_COLUMNS_HARD_DISKS - 1); iCol++) {
width[iCol] = MulDiv(width[iCol], dpi, 96);
total += width[iCol];
ListView_SetColumnWidth(hwndList, iCol, MulDiv(width[iCol], dpi, 96));
}
width[C_COLUMNS_HARD_DISKS - 1] = (r.right - r.left) - 4 - total;
ListView_SetColumnWidth(hwndList, C_COLUMNS_HARD_DISKS - 1, width[C_COLUMNS_HARD_DISKS - 1]);
}
@@ -3678,11 +3686,19 @@ win_settings_zip_drives_recalc_list(HWND hdlg)
static void
win_settings_floppy_drives_resize_columns(HWND hdlg)
{
int iCol, width[3] = {292, 58, 89};
int total = 0;
HWND hwndList = GetDlgItem(hdlg, IDC_LIST_FLOPPY_DRIVES);
RECT r;
ListView_SetColumnWidth(hwndList, 0, MulDiv(292, dpi, 96));
ListView_SetColumnWidth(hwndList, 1, MulDiv(58, dpi, 96));
ListView_SetColumnWidth(hwndList, 2, MulDiv(89, dpi, 96));
GetWindowRect(hwndList, &r);
for (iCol = 0; iCol < 2; iCol++) {
width[iCol] = MulDiv(width[iCol], dpi, 96);
total += width[iCol];
ListView_SetColumnWidth(hwndList, iCol, MulDiv(width[iCol], dpi, 96));
}
width[2] = (r.right - r.left) - 4 - total;
ListView_SetColumnWidth(hwndList, 2, width[2]);
}
@@ -3729,10 +3745,15 @@ win_settings_floppy_drives_init_columns(HWND hdlg)
static void
win_settings_cdrom_drives_resize_columns(HWND hdlg)
{
int width[2] = {292, 147};
HWND hwndList = GetDlgItem(hdlg, IDC_LIST_CDROM_DRIVES);
RECT r;
ListView_SetColumnWidth(hwndList, 0, MulDiv(292, dpi, 96));
ListView_SetColumnWidth(hwndList, 1, MulDiv(147, dpi, 96));
GetWindowRect(hwndList, &r);
width[0] = MulDiv(width[0], dpi, 96);
ListView_SetColumnWidth(hwndList, 0, MulDiv(width[0], dpi, 96));
width[1] = (r.right - r.left) - 4 - width[0];
ListView_SetColumnWidth(hwndList, 1, width[1]);
}
@@ -3770,10 +3791,15 @@ win_settings_cdrom_drives_init_columns(HWND hdlg)
static void
win_settings_mo_drives_resize_columns(HWND hdlg)
{
int width[2] = {292, 147};
HWND hwndList = GetDlgItem(hdlg, IDC_LIST_MO_DRIVES);
RECT r;
ListView_SetColumnWidth(hwndList, 0, MulDiv(292, dpi, 96));
ListView_SetColumnWidth(hwndList, 1, MulDiv(147, dpi, 96));
GetWindowRect(hwndList, &r);
width[0] = MulDiv(width[0], dpi, 96);
ListView_SetColumnWidth(hwndList, 0, MulDiv(width[0], dpi, 96));
width[1] = (r.right - r.left) - 4 - width[0];
ListView_SetColumnWidth(hwndList, 1, width[1]);
}
@@ -3811,10 +3837,15 @@ win_settings_mo_drives_init_columns(HWND hdlg)
static void
win_settings_zip_drives_resize_columns(HWND hdlg)
{
int width[2] = {292, 147};
HWND hwndList = GetDlgItem(hdlg, IDC_LIST_ZIP_DRIVES);
RECT r;
ListView_SetColumnWidth(hwndList, 0, MulDiv(292, dpi, 96));
ListView_SetColumnWidth(hwndList, 1, MulDiv(147, dpi, 96));
GetWindowRect(hwndList, &r);
width[0] = MulDiv(width[0], dpi, 96);
ListView_SetColumnWidth(hwndList, 0, MulDiv(width[0], dpi, 96));
width[1] = (r.right - r.left) - 4 - width[0];
ListView_SetColumnWidth(hwndList, 1, width[1]);
}
@@ -4981,6 +5012,17 @@ win_settings_confirm(HWND hdlg)
}
static void
win_settings_categories_resize_columns(HWND hdlg)
{
HWND hwndList = GetDlgItem(hdlg, IDC_SETTINGSCATLIST);
RECT r;
GetWindowRect(hwndList, &r);
ListView_SetColumnWidth(hwndList, 0, (r.right - r.left) + 1 - 5);
}
static BOOL
win_settings_categories_init_columns(HWND hdlg)
{
@@ -4999,20 +5041,11 @@ win_settings_categories_init_columns(HWND hdlg)
if (ListView_InsertColumn(hwndList, iCol, &lvc) == -1)
return FALSE;
win_settings_hard_disks_resize_columns(hdlg);
win_settings_categories_resize_columns(hdlg);
return TRUE;
}
static void
win_settings_categories_resize_columns(HWND hdlg)
{
HWND hwndList = GetDlgItem(hdlg, IDC_SETTINGSCATLIST);
ListView_SetColumnWidth(hwndList, 0, MulDiv(171, dpi, 96));
}
#if defined(__amd64__) || defined(__aarch64__)
static LRESULT CALLBACK
#else

26
src/win/win_ui.c
View File

@@ -216,6 +216,7 @@ ResetAllMenus(void)
CheckMenuItem(menuMain, IDM_VID_RESIZE, MF_UNCHECKED);
CheckMenuItem(menuMain, IDM_VID_SDL_SW, MF_UNCHECKED);
CheckMenuItem(menuMain, IDM_VID_SDL_HW, MF_UNCHECKED);
CheckMenuItem(menuMain, IDM_VID_SDL_OPENGL, MF_UNCHECKED);
#ifdef USE_VNC
CheckMenuItem(menuMain, IDM_VID_VNC, MF_UNCHECKED);
#endif
@@ -418,7 +419,6 @@ MainWindowProcedure(HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam)
break;
case IDM_ACTION_RESET_CAD:
pclog("-\n");
pc_send_cad();
break;
@@ -538,6 +538,7 @@ MainWindowProcedure(HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam)
case IDM_VID_SDL_SW:
case IDM_VID_SDL_HW:
case IDM_VID_SDL_OPENGL:
#ifdef USE_VNC
case IDM_VID_VNC:
#endif
@@ -730,6 +731,7 @@ MainWindowProcedure(HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam)
temp_y = (lParam >> 16);
if ((temp_x <= 0) || (temp_y <= 0)) {
plat_vidapi_enable(0);
minimized = 1;
break;
} else if (minimized == 1) {
@@ -936,6 +938,14 @@ MainWindowProcedure(HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam)
#endif
break;
case WM_ACTIVATE:
if (wParam != WA_INACTIVE) {
video_force_resize_set(1);
plat_vidapi_enable(0);
plat_vidapi_enable(1);
}
break;
case WM_ENTERSIZEMOVE:
user_resize = 1;
break;
@@ -1071,18 +1081,18 @@ ui_init(int nCmdShow)
ui_window_title(title);
/* Get the current DPI */
dpi = win_get_dpi(hwndMain);
/* Get the current DPI */
dpi = win_get_dpi(hwndMain);
/* Check if we have a padded window frame */
padded_frame = (GetSystemMetrics(SM_CXPADDEDBORDER) != 0);
/* Check if we have a padded window frame */
padded_frame = (GetSystemMetrics(SM_CXPADDEDBORDER) != 0);
/* Create the status bar window. */
StatusBarCreate(hwndMain, IDC_STATUS, hinstance);
/* Get the actual height of the status bar */
GetWindowRect(hwndSBAR, &sbar_rect);
sbar_height = sbar_rect.bottom - sbar_rect.top;
/* Get the actual height of the status bar */
GetWindowRect(hwndSBAR, &sbar_rect);
sbar_height = sbar_rect.bottom - sbar_rect.top;
/* Set up main window for resizing if configured. */
if (vid_resize)