Major commit, cleaning a lot of old stuff.

IBM.H is gone, video stuff re-organized. Keyboard stuff reorganized.
Machines that have their own video, mouse and/or keyboard now have all this in their machine file.
Fixed and other cleanups here and there.
This commit is contained in:
waltje
2017-11-05 01:57:04 -05:00
parent f5d4436672
commit 7c67e867c8
238 changed files with 5139 additions and 7832 deletions

View File

@@ -8,7 +8,7 @@
*
* Main include file for the application.
*
* Version: @(#)86box.h 1.0.11 2017/11/01
* Version: @(#)86box.h 1.0.12 2017/11/04
*
* Authors: Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>
@@ -51,6 +51,8 @@
# define ENABLE_LOG_COMMANDS 1
#endif
#define MIN(a, b) ((a) < (b) ? (a) : (b))
#ifdef __cplusplus
extern "C" {
@@ -83,7 +85,8 @@ extern int serial_enabled[], /* (C) enable serial ports */
lpt_enabled, /* (C) enable LPT ports */
bugger_enabled; /* (C) enable ISAbugger */
extern int gfxcard; /* (C) graphics/video card */
extern int GAMEBLASTER, /* (C) sound option */
extern int sound_is_float, /* (C) sound uses FP values */
GAMEBLASTER, /* (C) sound option */
GUS, /* (C) sound option */
SSI2001, /* (C) sound option */
voodoo_enabled; /* (C) video option */

View File

@@ -9,7 +9,7 @@
* Implementation of the CD-ROM drive with SCSI(-like)
* commands, for both ATAPI and SCSI usage.
*
* Version: @(#)cdrom.c 1.0.21 2017/11/02
* Version: @(#)cdrom.c 1.0.22 2017/11/04
*
* Author: Miran Grca, <mgrca8@gmail.com>
*
@@ -23,7 +23,6 @@
#include <wchar.h>
#include "../86box.h"
#include "../config.h"
#include "../ibm.h"
#include "../timer.h"
#include "../device.h"
#include "../piix.h"
@@ -2127,7 +2126,7 @@ void cdrom_command(uint8_t id, uint8_t *cdb)
cdrom[id].cd_status = cdrom_drives[id].handler->status(id);
if (cdb[0] != 0) {
cdrom_log("CD-ROM %i: Command 0x%02X, Sense Key %02X, Asc %02X, Ascq %02X, %i, Unit attention: %i\n", id, cdb[0], cdrom_sense_key, cdrom_asc, cdrom_ascq, ins, cdrom[id].unit_attention);
cdrom_log("CD-ROM %i: Command 0x%02X, Sense Key %02X, Asc %02X, Ascq %02X, Unit attention: %i\n", id, cdb[0], cdrom_sense_key, cdrom_asc, cdrom_ascq, cdrom[id].unit_attention);
cdrom_log("CD-ROM %i: Request length: %04X\n", id, cdrom[id].request_length);
#if 1

View File

@@ -9,7 +9,7 @@
* Implementation of the CD-ROM null interface for unmounted
* guest CD-ROM drives.
*
* Version: @(#)cdrom_null.c 1.0.5 2017/10/16
* Version: @(#)cdrom_null.c 1.0.6 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -22,7 +22,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "cdrom.h"

View File

@@ -8,7 +8,7 @@
*
* Configuration file handler.
*
* Version: @(#)config.c 1.0.30 2017/11/01
* Version: @(#)config.c 1.0.31 2017/11/04
*
* Authors: Sarah Walker,
* Miran Grca, <mgrca8@gmail.com>
@@ -30,7 +30,6 @@
#include <wchar.h>
#include <inttypes.h>
#include "86box.h"
#include "ibm.h"
#include "cpu/cpu.h"
#include "nvr.h"
#include "config.h"
@@ -48,6 +47,7 @@
#include "mouse.h"
#include "network/network.h"
#include "scsi/scsi.h"
#include "sound/sound.h"
#include "sound/midi.h"
#include "sound/snd_dbopl.h"
#include "sound/snd_mpu401.h"
@@ -519,15 +519,27 @@ load_video(void)
char *cat = "Video";
char *p;
p = config_get_string(cat, "gfxcard", NULL);
if (p != NULL)
if (machines[machine].fixed_gfxcard) {
config_delete_var(cat, "gfxcard");
config_delete_var(cat, "voodoo");
gfxcard = GFX_INTERNAL;
} else {
p = config_get_string(cat, "gfxcard", NULL);
if (p == NULL) {
if (machines[machine].flags & MACHINE_VIDEO) {
p = (char *)malloc((strlen("internal")+1)*sizeof(char));
strcpy(p, "internal");
} else {
p = (char *)malloc((strlen("none")+1)*sizeof(char));
strcpy(p, "none");
}
}
gfxcard = video_get_video_from_internal_name(p);
else
gfxcard = 0;
video_speed = config_get_int(cat, "video_speed", 3);
video_speed = config_get_int(cat, "video_speed", 3);
voodoo_enabled = !!config_get_int(cat, "voodoo", 0);
voodoo_enabled = !!config_get_int(cat, "voodoo", 0);
}
}
@@ -704,7 +716,7 @@ load_other_peripherals(void)
config_delete_var(cat, "hdd_controller");
}
if (p == NULL) {
if (machines[machine].flags & MACHINE_HAS_HDC) {
if (machines[machine].flags & MACHINE_HDC) {
hdc_name = (char *) malloc((strlen("internal") + 1) * sizeof(char));
strcpy(hdc_name, "internal");
} else {

View File

@@ -8,10 +8,10 @@
# define INFINITY (__builtin_inff())
#endif
#include "../86box.h"
#include "../ibm.h"
#include "cpu.h"
#include "x86.h"
#include "x87.h"
#include "../nmi.h"
#include "../mem.h"
#include "../pic.h"
#include "../pit.h"

View File

@@ -8,7 +8,6 @@
# define INFINITY (__builtin_inff())
#endif
#include "../86box.h"
#include "../ibm.h"
#include "cpu.h"
#include "x86.h"
#include "x86_ops.h"

View File

@@ -7,7 +7,6 @@
# define INFINITY (__builtin_inff())
#endif
#include "../86box.h"
#include "../ibm.h"
#include "cpu.h"
#include "x86.h"
#include "x86_ops.h"

View File

@@ -18,7 +18,7 @@
* 2 clocks - fetch opcode 1 2 clocks - execute
* 2 clocks - fetch opcode 2 etc
*
* Version: @(#)808x.c 1.0.6 2017/11/01
* Version: @(#)808x.c 1.0.7 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -31,7 +31,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "cpu.h"
#include "x86.h"
#include "../machine/machine.h"

View File

@@ -3,8 +3,8 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../mem.h"
#include "cpu.h"
#include "x86_ops.h"
#include "codegen.h"

View File

@@ -3,8 +3,8 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../mem.h"
#include "cpu.h"
#include "x86.h"
#include "x86_ops.h"
#include "x86_flags.h"

View File

@@ -3,7 +3,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../mem.h"
#include "cpu.h"
#include "x86.h"

View File

@@ -13,7 +13,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../mem.h"
#include "cpu.h"
#include "x86.h"

View File

@@ -3,7 +3,7 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "cpu.h"
#include "codegen_timing_common.h"

View File

@@ -14,7 +14,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../mem.h"
#include "cpu.h"
#include "x86.h"

View File

@@ -3,7 +3,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "cpu.h"
#include "x86.h"
#include "x86_ops.h"

View File

@@ -6,7 +6,6 @@
#include <stdlib.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../mem.h"
#include "cpu.h"
#include "x86.h"

View File

@@ -6,9 +6,8 @@
#include <stdlib.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../mem.h"
#include "cpu.h"
#include "../mem.h"
#include "x86.h"
#include "x86_flags.h"
#include "x86_ops.h"

View File

@@ -8,7 +8,7 @@
*
* CPU type handler.
*
* Version: @(#)cpu.c 1.0.6 2017/11/01
* Version: @(#)cpu.c 1.0.7 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* leilei,
@@ -23,7 +23,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "cpu.h"
#include "../device.h"
#include "../machine/machine.h"
@@ -123,6 +122,7 @@ int israpidcad, is_pentium;
uint64_t tsc = 0;
cr0_t CR0;
uint64_t pmc[2] = {0, 0};
uint16_t temp_seg_data[4] = {0, 0, 0, 0};
@@ -172,453 +172,6 @@ int timing_misaligned;
msr_t msr;
/*Available cpuspeeds :
0 = 16 MHz
1 = 20 MHz
2 = 25 MHz
3 = 33 MHz
4 = 40 MHz
5 = 50 MHz
6 = 66 MHz
7 = 75 MHz
8 = 80 MHz
9 = 90 MHz
10 = 100 MHz
11 = 120 MHz
12 = 133 MHz
13 = 150 MHz
14 = 160 MHz
15 = 166 MHz
16 = 180 MHz
17 = 200 MHz
*/
CPU cpus_8088[] =
{
/*8088 standard*/
{"8088/4.77", CPU_8088, 0, 4772728, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"8088/8", CPU_8088, 1, 8000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
#if 0
{"8088/7.16", CPU_8088, 1, 14318184/2, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"8088/10", CPU_8088, 2, 10000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"8088/12", CPU_8088, 3, 12000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"8088/16", CPU_8088, 4, 16000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
#endif
{"", -1, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_pcjr[] =
{
/*8088 PCjr*/
{"8088/4.77", CPU_8088, 0, 4772728, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"", -1, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_europc[] =
{
/*8088 EuroPC*/
{"8088/4.77", CPU_8088, 0, 4772728, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"8088/7.16", CPU_8088, 1, 14318184/2, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"8088/9.54", CPU_8088, 1, 4772728*2, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"", -1, 0, 0, 0, 0}
};
CPU cpus_8086[] =
{
/*8086 standard*/
{"8086/7.16", CPU_8086, 1, 14318184/2, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"8086/8", CPU_8086, 1, 8000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"8086/9.54", CPU_8086, 1, 4772728*2, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"8086/10", CPU_8086, 2, 10000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"8086/12", CPU_8086, 3, 12000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"8086/16", CPU_8086, 4, 16000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"", -1, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_pc1512[] =
{
/*8086 Amstrad*/
{"8086/8", CPU_8086, 1, 8000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"", -1, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_286[] =
{
/*286*/
{"286/6", CPU_286, 0, 6000000, 1, 0, 0, 0, 0, 0, 2,2,2,2},
{"286/8", CPU_286, 1, 8000000, 1, 0, 0, 0, 0, 0, 2,2,2,2},
{"286/10", CPU_286, 2, 10000000, 1, 0, 0, 0, 0, 0, 2,2,2,2},
{"286/12", CPU_286, 3, 12500000, 1, 0, 0, 0, 0, 0, 3,3,3,3},
{"286/16", CPU_286, 4, 16000000, 1, 0, 0, 0, 0, 0, 3,3,3,3},
{"286/20", CPU_286, 5, 20000000, 1, 0, 0, 0, 0, 0, 4,4,4,4},
{"286/25", CPU_286, 6, 25000000, 1, 0, 0, 0, 0, 0, 4,4,4,4},
{"", -1, 0, 0, 0, 0}
};
CPU cpus_ibmat[] =
{
/*286*/
{"286/6", CPU_286, 0, 6000000, 1, 0, 0, 0, 0, 0, 3,3,3,3},
{"286/8", CPU_286, 0, 8000000, 1, 0, 0, 0, 0, 0, 3,3,3,3},
{"", -1, 0, 0, 0, 0}
};
CPU cpus_ibmxt286[] =
{
/*286*/
{"286/6", CPU_286, 0, 6000000, 1, 0, 0, 0, 0, 0, 2,2,2,2},
{"", -1, 0, 0, 0, 0}
};
CPU cpus_ps1_m2011[] =
{
/*286*/
{"286/10", CPU_286, 2, 10000000, 1, 0, 0, 0, 0, 0, 2,2,2,2},
{"", -1, 0, 0, 0, 0}
};
CPU cpus_ps2_m30_286[] =
{
/*286*/
{"286/10", CPU_286, 2, 10000000, 1, 0, 0, 0, 0, 0, 2,2,2,2},
{"286/12", CPU_286, 3, 12500000, 1, 0, 0, 0, 0, 0, 3,3,3,3},
{"286/16", CPU_286, 4, 16000000, 1, 0, 0, 0, 0, 0, 3,3,3,3},
{"286/20", CPU_286, 5, 20000000, 1, 0, 0, 0, 0, 0, 4,4,4,4},
{"286/25", CPU_286, 6, 25000000, 1, 0, 0, 0, 0, 0, 4,4,4,4},
{"", -1, 0, 0, 0, 0}
};
CPU cpus_i386SX[] =
{
/*i386SX*/
{"i386SX/16", CPU_386SX, 0, 16000000, 1, 0, 0x2308, 0, 0, 0, 3,3,3,3},
{"i386SX/20", CPU_386SX, 1, 20000000, 1, 0, 0x2308, 0, 0, 0, 4,4,3,3},
{"i386SX/25", CPU_386SX, 2, 25000000, 1, 0, 0x2308, 0, 0, 0, 4,4,3,3},
{"i386SX/33", CPU_386SX, 3, 33333333, 1, 0, 0x2308, 0, 0, 0, 6,6,3,3},
{"i386SX/40", CPU_386SX, 4, 40000000, 1, 0, 0x2308, 0, 0, 0, 7,7,3,3},
{"", -1, 0, 0, 0}
};
CPU cpus_i386DX[] =
{
/*i386DX*/
{"i386DX/16", CPU_386DX, 0, 16000000, 1, 0, 0x0308, 0, 0, 0, 3,3,3,3},
{"i386DX/20", CPU_386DX, 1, 20000000, 1, 0, 0x0308, 0, 0, 0, 4,4,3,3},
{"i386DX/25", CPU_386DX, 2, 25000000, 1, 0, 0x0308, 0, 0, 0, 4,4,3,3},
{"i386DX/33", CPU_386DX, 3, 33333333, 1, 0, 0x0308, 0, 0, 0, 6,6,3,3},
{"i386DX/40", CPU_386DX, 4, 40000000, 1, 0, 0x0308, 0, 0, 0, 7,7,3,3},
{"RapidCAD/25", CPU_RAPIDCAD, 2, 25000000, 1, 0, 0x430, 0, 0, 0, 4,4,3,3},
{"RapidCAD/33", CPU_RAPIDCAD, 3, 33333333, 1, 0, 0x430, 0, 0, 0, 6,6,3,3},
{"RapidCAD/40", CPU_RAPIDCAD, 4, 40000000, 1, 0, 0x430, 0, 0, 0, 7,7,3,3},
{"", -1, 0, 0, 0}
};
CPU cpus_acer[] =
{
/*i386SX*/
{"i386SX/25", CPU_386SX, 2, 25000000, 1, 0, 0x2308, 0, 0, 0, 4,4,4,4},
{"", -1, 0, 0, 0}
};
CPU cpus_Am386SX[] =
{
/*Am386*/
{"Am386SX/16", CPU_386SX, 0, 16000000, 1, 0, 0x2308, 0, 0, 0, 3,3,3,3},
{"Am386SX/20", CPU_386SX, 1, 20000000, 1, 0, 0x2308, 0, 0, 0, 4,4,3,3},
{"Am386SX/25", CPU_386SX, 2, 25000000, 1, 0, 0x2308, 0, 0, 0, 4,4,3,3},
{"Am386SX/33", CPU_386SX, 3, 33333333, 1, 0, 0x2308, 0, 0, 0, 6,6,3,3},
{"Am386SX/40", CPU_386SX, 4, 40000000, 1, 0, 0x2308, 0, 0, 0, 7,7,3,3},
{"", -1, 0, 0, 0}
};
CPU cpus_Am386DX[] =
{
/*Am386*/
{"Am386DX/25", CPU_386DX, 2, 25000000, 1, 0, 0x0308, 0, 0, 0, 4,4,3,3},
{"Am386DX/33", CPU_386DX, 3, 33333333, 1, 0, 0x0308, 0, 0, 0, 6,6,3,3},
{"Am386DX/40", CPU_386DX, 4, 40000000, 1, 0, 0x0308, 0, 0, 0, 7,7,3,3},
{"", -1, 0, 0, 0}
};
CPU cpus_486SLC[] =
{
/*Cx486SLC*/
{"Cx486SLC/20", CPU_486SLC, 1, 20000000, 1, 0, 0x400, 0, 0x0000, 0, 4,4,3,3},
{"Cx486SLC/25", CPU_486SLC, 2, 25000000, 1, 0, 0x400, 0, 0x0000, 0, 4,4,3,3},
{"Cx486SLC/33", CPU_486SLC, 3, 33333333, 1, 0, 0x400, 0, 0x0000, 0, 6,6,3,3},
{"Cx486SRx2/32", CPU_486SLC, 3, 32000000, 2, 0, 0x406, 0, 0x0006, 0, 6,6,6,6},
{"Cx486SRx2/40", CPU_486SLC, 4, 40000000, 2, 0, 0x406, 0, 0x0006, 0, 8,8,6,6},
{"Cx486SRx2/50", CPU_486SLC, 5, 50000000, 2, 0, 0x406, 0, 0x0006, 0, 8,8,6,6},
{"", -1, 0, 0, 0}
};
CPU cpus_486DLC[] =
{
/*Cx486DLC*/
{"Cx486DLC/25", CPU_486DLC, 2, 25000000, 1, 0, 0x401, 0, 0x0001, 0, 4,4,3,3},
{"Cx486DLC/33", CPU_486DLC, 3, 33333333, 1, 0, 0x401, 0, 0x0001, 0, 6,6,3,3},
{"Cx486DLC/40", CPU_486DLC, 4, 40000000, 1, 0, 0x401, 0, 0x0001, 0, 7,7,3,3},
{"Cx486DRx2/32", CPU_486DLC, 3, 32000000, 2, 0, 0x407, 0, 0x0007, 0, 6,6,6,6},
{"Cx486DRx2/40", CPU_486DLC, 4, 40000000, 2, 0, 0x407, 0, 0x0007, 0, 8,8,6,6},
{"Cx486DRx2/50", CPU_486DLC, 5, 50000000, 2, 0, 0x407, 0, 0x0007, 0, 8,8,6,6},
{"Cx486DRx2/66", CPU_486DLC, 6, 66666666, 2, 0, 0x407, 0, 0x0007, 0, 12,12,6,6},
{"", -1, 0, 0, 0}
};
CPU cpus_i486[] =
{
/*i486*/
{"i486SX/16", CPU_i486SX, 0, 16000000, 1, 16000000, 0x42a, 0, 0, CPU_SUPPORTS_DYNAREC, 3,3,3,3},
{"i486SX/20", CPU_i486SX, 1, 20000000, 1, 20000000, 0x42a, 0, 0, CPU_SUPPORTS_DYNAREC, 4,4,3,3},
{"i486SX/25", CPU_i486SX, 2, 25000000, 1, 25000000, 0x42a, 0, 0, CPU_SUPPORTS_DYNAREC, 4,4,3,3},
{"i486SX/33", CPU_i486SX, 3, 33333333, 1, 33333333, 0x42a, 0, 0, CPU_SUPPORTS_DYNAREC, 6,6,3,3},
{"i486SX2/50", CPU_i486SX, 5, 50000000, 2, 25000000, 0x45b, 0, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6},
{"i486SX2/66 (Q0569)", CPU_i486SX, 6, 66666666, 2, 33333333, 0x45b, 0, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6},
{"i486DX/25", CPU_i486DX, 2, 25000000, 1, 25000000, 0x404, 0, 0, CPU_SUPPORTS_DYNAREC, 4,4,3,3},
{"i486DX/33", CPU_i486DX, 3, 33333333, 1, 33333333, 0x404, 0, 0, CPU_SUPPORTS_DYNAREC, 6,6,3,3},
{"i486DX/50", CPU_i486DX, 5, 50000000, 1, 25000000, 0x404, 0, 0, CPU_SUPPORTS_DYNAREC, 8,8,4,4},
{"i486DX2/40", CPU_i486DX, 4, 40000000, 2, 20000000, 0x430, 0, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6},
{"i486DX2/50", CPU_i486DX, 5, 50000000, 2, 25000000, 0x430, 0, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6},
{"i486DX2/66", CPU_i486DX, 6, 66666666, 2, 33333333, 0x430, 0, 0, CPU_SUPPORTS_DYNAREC, 12,12,6,6},
{"iDX4/75", CPU_iDX4, 7, 75000000, 3, 25000000, 0x481, 0x481, 0, CPU_SUPPORTS_DYNAREC, 12,12,9,9}, /*CPUID available on DX4, >= 75 MHz*/
{"iDX4/100", CPU_iDX4, 10, 100000000, 3, 33333333, 0x481, 0x481, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9}, /*Is on some real Intel DX2s, limit here is pretty arbitary*/
{"Pentium OverDrive/63", CPU_PENTIUM, 6, 62500000, 3, 25000000, 0x1531, 0x1531, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,7,7},
{"Pentium OverDrive/83", CPU_PENTIUM, 8, 83333333, 3, 33333333, 0x1532, 0x1532, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,8,8},
{"", -1, 0, 0, 0}
};
CPU cpus_Am486[] =
{
/*Am486/5x86*/
{"Am486SX/33", CPU_Am486SX, 3, 33333333, 1, 33333333, 0x42a, 0, 0, CPU_SUPPORTS_DYNAREC, 6,6,3,3},
{"Am486SX/40", CPU_Am486SX, 4, 40000000, 1, 20000000, 0x42a, 0, 0, CPU_SUPPORTS_DYNAREC, 7,7,3,3},
{"Am486SX2/50", CPU_Am486SX, 5, 50000000, 2, 25000000, 0x45b, 0x45b, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6}, /*CPUID available on SX2, DX2, DX4, 5x86, >= 50 MHz*/
{"Am486SX2/66", CPU_Am486SX, 6, 66666666, 2, 33333333, 0x45b, 0x45b, 0, CPU_SUPPORTS_DYNAREC, 12,12,6,6}, /*Isn't on all real AMD SX2s and DX2s, availability here is pretty arbitary (and distinguishes them from the Intel chips)*/
{"Am486DX/33", CPU_Am486DX, 3, 33333333, 1, 33333333, 0x430, 0, 0, CPU_SUPPORTS_DYNAREC, 6,6,3,3},
{"Am486DX/40", CPU_Am486DX, 4, 40000000, 1, 20000000, 0x430, 0, 0, CPU_SUPPORTS_DYNAREC, 7,7,3,3},
{"Am486DX2/50", CPU_Am486DX, 5, 50000000, 2, 25000000, 0x470, 0x470, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6},
{"Am486DX2/66", CPU_Am486DX, 6, 66666666, 2, 33333333, 0x470, 0x470, 0, CPU_SUPPORTS_DYNAREC, 12,12,6,6},
{"Am486DX2/80", CPU_Am486DX, 8, 80000000, 2, 20000000, 0x470, 0x470, 0, CPU_SUPPORTS_DYNAREC, 14,14,6,6},
{"Am486DX4/75", CPU_Am486DX, 7, 75000000, 3, 25000000, 0x482, 0x482, 0, CPU_SUPPORTS_DYNAREC, 12,12,9,9},
{"Am486DX4/90", CPU_Am486DX, 9, 90000000, 3, 30000000, 0x482, 0x482, 0, CPU_SUPPORTS_DYNAREC, 15,15,9,9},
{"Am486DX4/100", CPU_Am486DX, 10, 100000000, 3, 33333333, 0x482, 0x482, 0, CPU_SUPPORTS_DYNAREC, 15,15,9,9},
{"Am486DX4/120", CPU_Am486DX, 11, 120000000, 3, 20000000, 0x482, 0x482, 0, CPU_SUPPORTS_DYNAREC, 21,21,9,9},
{"Am5x86/P75", CPU_Am486DX, 12, 133333333, 4, 33333333, 0x4e0, 0x4e0, 0, CPU_SUPPORTS_DYNAREC, 24,24,12,12},
{"Am5x86/P75+", CPU_Am486DX, 13, 160000000, 4, 20000000, 0x4e0, 0x4e0, 0, CPU_SUPPORTS_DYNAREC, 28,28,12,12},
{"", -1, 0, 0, 0}
};
CPU cpus_Cx486[] =
{
/*Cx486/5x86*/
{"Cx486S/25", CPU_Cx486S, 2, 25000000, 1, 25000000, 0x420, 0, 0x0010, CPU_SUPPORTS_DYNAREC, 4,4,3,3},
{"Cx486S/33", CPU_Cx486S, 3, 33333333, 1, 33333333, 0x420, 0, 0x0010, CPU_SUPPORTS_DYNAREC, 6,6,3,3},
{"Cx486S/40", CPU_Cx486S, 4, 40000000, 1, 20000000, 0x420, 0, 0x0010, CPU_SUPPORTS_DYNAREC, 7,7,3,3},
{"Cx486DX/33", CPU_Cx486DX, 3, 33333333, 1, 33333333, 0x430, 0, 0x051a, CPU_SUPPORTS_DYNAREC, 6,6,3,3},
{"Cx486DX/40", CPU_Cx486DX, 4, 40000000, 1, 20000000, 0x430, 0, 0x051a, CPU_SUPPORTS_DYNAREC, 7,7,3,3},
{"Cx486DX2/50", CPU_Cx486DX, 5, 50000000, 2, 25000000, 0x430, 0, 0x081b, CPU_SUPPORTS_DYNAREC, 8,8,6,6},
{"Cx486DX2/66", CPU_Cx486DX, 6, 66666666, 2, 33333333, 0x430, 0, 0x0b1b, CPU_SUPPORTS_DYNAREC, 12,12,6,6},
{"Cx486DX2/80", CPU_Cx486DX, 8, 80000000, 2, 20000000, 0x430, 0, 0x311b, CPU_SUPPORTS_DYNAREC, 14,14,16,16},
{"Cx486DX4/75", CPU_Cx486DX, 7, 75000000, 3, 25000000, 0x480, 0, 0x361f, CPU_SUPPORTS_DYNAREC, 12,12,9,9},
{"Cx486DX4/100", CPU_Cx486DX, 10, 100000000, 3, 33333333, 0x480, 0, 0x361f, CPU_SUPPORTS_DYNAREC, 15,15,9,9},
{"Cx5x86/100", CPU_Cx5x86, 10, 100000000, 3, 33333333, 0x480, 0, 0x002f, CPU_SUPPORTS_DYNAREC, 15,15,9,9},
{"Cx5x86/120", CPU_Cx5x86, 11, 120000000, 3, 20000000, 0x480, 0, 0x002f, CPU_SUPPORTS_DYNAREC, 21,21,9,9},
{"Cx5x86/133", CPU_Cx5x86, 12, 133333333, 4, 33333333, 0x480, 0, 0x002f, CPU_SUPPORTS_DYNAREC, 24,24,12,12},
{"", -1, 0, 0, 0}
};
CPU cpus_6x86[] =
{
/*Cyrix 6x86*/
{"6x86-P90", CPU_Cx6x86, 17, 80000000, 3, 40000000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 8,8,6,6},
{"6x86-PR120+", CPU_Cx6x86, 17, 100000000, 3, 25000000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,6,6},
{"6x86-PR133+", CPU_Cx6x86, 17, 110000000, 3, 27500000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,6,6},
{"6x86-PR150+", CPU_Cx6x86, 17, 120000000, 3, 30000000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"6x86-PR166+", CPU_Cx6x86, 17, 133333333, 3, 33333333, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"6x86-PR200+", CPU_Cx6x86, 17, 150000000, 3, 37500000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
/*Cyrix 6x86L*/
{"6x86L-PR133+", CPU_Cx6x86L, 19, 110000000, 3, 27500000, 0x540, 0x540, 0x2231, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,6,6},
{"6x86L-PR150+", CPU_Cx6x86L, 19, 120000000, 3, 30000000, 0x540, 0x540, 0x2231, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"6x86L-PR166+", CPU_Cx6x86L, 19, 133333333, 3, 33333333, 0x540, 0x540, 0x2231, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"6x86L-PR200+", CPU_Cx6x86L, 19, 150000000, 3, 37500000, 0x540, 0x540, 0x2231, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
/*Cyrix 6x86MX*/
{"6x86MX-PR166", CPU_Cx6x86MX, 18, 133333333, 3, 33333333, 0x600, 0x600, 0x0451, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"6x86MX-PR200", CPU_Cx6x86MX, 18, 166666666, 3, 33333333, 0x600, 0x600, 0x0452, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"6x86MX-PR233", CPU_Cx6x86MX, 18, 188888888, 3, 37500000, 0x600, 0x600, 0x0452, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"6x86MX-PR266", CPU_Cx6x86MX, 18, 207500000, 3, 41666667, 0x600, 0x600, 0x0452, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 17,17,7,7},
{"6x86MX-PR300", CPU_Cx6x86MX, 18, 233333333, 3, 33333333, 0x600, 0x600, 0x0454, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,7,7},
{"6x86MX-PR333", CPU_Cx6x86MX, 18, 250000000, 3, 41666667, 0x600, 0x600, 0x0453, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 20,20,9,9},
{"6x86MX-PR366", CPU_Cx6x86MX, 18, 250000000, 3, 33333333, 0x600, 0x600, 0x0452, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12},
{"6x86MX-PR400", CPU_Cx6x86MX, 18, 285000000, 3, 41666667, 0x600, 0x600, 0x0453, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"", -1, 0, 0, 0}
};
CPU cpus_WinChip[] =
{
/*IDT WinChip*/
{"WinChip 75", CPU_WINCHIP, 7, 75000000, 2, 25000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 8,8,4,4},
{"WinChip 90", CPU_WINCHIP, 9, 90000000, 2, 30000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 9,9,4,4},
{"WinChip 100", CPU_WINCHIP, 10, 100000000, 2, 33333333, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 9,9,4,4},
{"WinChip 120", CPU_WINCHIP, 11, 120000000, 2, 30000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 12,12,6,6},
{"WinChip 133", CPU_WINCHIP, 12, 133333333, 2, 33333333, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 12,12,6,6},
{"WinChip 150", CPU_WINCHIP, 13, 150000000, 3, 30000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 15,15,7,7},
{"WinChip 166", CPU_WINCHIP, 15, 166666666, 3, 33333333, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 15,15,7,7},
{"WinChip 180", CPU_WINCHIP, 16, 180000000, 3, 30000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9},
{"WinChip 200", CPU_WINCHIP, 17, 200000000, 3, 33333333, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9},
{"WinChip 225", CPU_WINCHIP, 17, 225000000, 3, 37500000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9},
{"WinChip 240", CPU_WINCHIP, 17, 240000000, 6, 30000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 24,24,12,12},
{"", -1, 0, 0, 0}
};
CPU cpus_Pentium5V[] =
{
/*Intel Pentium (5V, socket 4)*/
{"Pentium 60", CPU_PENTIUM, 6, 60000000, 1, 30000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 6,6,3,3},
{"Pentium 66", CPU_PENTIUM, 6, 66666666, 1, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 6,6,3,3},
{"Pentium OverDrive 120",CPU_PENTIUM, 14, 120000000, 2, 30000000, 0x51A, 0x51A, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"Pentium OverDrive 133",CPU_PENTIUM, 16, 133333333, 2, 33333333, 0x51A, 0x51A, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"", -1, 0, 0, 0}
};
CPU cpus_Pentium5V50[] =
{
/*Intel Pentium (5V, socket 4, including 50 MHz FSB)*/
{"Pentium 50 (Q0399)",CPU_PENTIUM, 5, 50000000, 1, 25000000, 0x513, 0x513, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 4,4,3,3},
{"Pentium 60", CPU_PENTIUM, 6, 60000000, 1, 30000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 6,6,3,3},
{"Pentium 66", CPU_PENTIUM, 6, 66666666, 1, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 6,6,3,3},
{"Pentium OverDrive 100",CPU_PENTIUM, 13, 100000000, 2, 25000000, 0x51A, 0x51A, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 8,8,6,6},
{"Pentium OverDrive 120",CPU_PENTIUM, 14, 120000000, 2, 30000000, 0x51A, 0x51A, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"Pentium OverDrive 133",CPU_PENTIUM, 16, 133333333, 2, 33333333, 0x51A, 0x51A, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"", -1, 0, 0, 0}
};
CPU cpus_PentiumS5[] =
{
/*Intel Pentium (Socket 5)*/
{"Pentium 75", CPU_PENTIUM, 9, 75000000, 2, 25000000, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4},
{"Pentium OverDrive MMX 75",CPU_PENTIUMMMX,9,75000000,2,25000000,0x1542,0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4},
{"Pentium 90", CPU_PENTIUM, 12, 90000000, 2, 30000000, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
{"Pentium 100/50", CPU_PENTIUM, 13, 100000000, 2, 25000000, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,6,6},
{"Pentium 100/66", CPU_PENTIUM, 13, 100000000, 2, 33333333, 0x526, 0x526, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
{"Pentium 120", CPU_PENTIUM, 14, 120000000, 2, 30000000, 0x526, 0x526, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"Pentium OverDrive 125",CPU_PENTIUM,15, 125000000, 3, 25000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,7,7},
{"Pentium OverDrive 150",CPU_PENTIUM,17, 150000000, 3, 30000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium OverDrive 166",CPU_PENTIUM,17, 166666666, 3, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium OverDrive MMX 125", CPU_PENTIUMMMX,15,125000000, 3, 25000000, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,7,7},
{"Pentium OverDrive MMX 150/60", CPU_PENTIUMMMX,17,150000000, 3, 30000000, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium OverDrive MMX 166", CPU_PENTIUMMMX,19,166000000, 3, 33333333, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium OverDrive MMX 180", CPU_PENTIUMMMX,20,180000000, 3, 30000000, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"Pentium OverDrive MMX 200", CPU_PENTIUMMMX,21,200000000, 3, 33333333, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"", -1, 0, 0, 0}
};
CPU cpus_Pentium[] =
{
/*Intel Pentium*/
{"Pentium 75", CPU_PENTIUM, 9, 75000000, 2, 25000000, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4},
{"Pentium OverDrive MMX 75",CPU_PENTIUMMMX,9,75000000,2,25000000,0x1542,0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4},
{"Pentium 90", CPU_PENTIUM, 12, 90000000, 2, 30000000, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
{"Pentium 100/50", CPU_PENTIUM, 13, 100000000, 2, 25000000, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,6,6},
{"Pentium 100/66", CPU_PENTIUM, 13, 100000000, 2, 33333333, 0x526, 0x526, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
{"Pentium 120", CPU_PENTIUM, 14, 120000000, 2, 30000000, 0x526, 0x526, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"Pentium 133", CPU_PENTIUM, 16, 133333333, 2, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"Pentium 150", CPU_PENTIUM, 17, 150000000, 3, 30000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium 166", CPU_PENTIUM, 19, 166666666, 3, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium 200", CPU_PENTIUM, 21, 200000000, 3, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"Pentium MMX 166", CPU_PENTIUMMMX, 19, 166666666, 3, 33333333, 0x543, 0x543, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium MMX 200", CPU_PENTIUMMMX, 21, 200000000, 3, 33333333, 0x543, 0x543, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"Pentium MMX 233", CPU_PENTIUMMMX, 24, 233333333, 4, 33333333, 0x543, 0x543, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,10,10},
{"Mobile Pentium MMX 120", CPU_PENTIUMMMX, 14, 120000000, 2, 30000000, 0x543, 0x543, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"Mobile Pentium MMX 133", CPU_PENTIUMMMX, 16, 133333333, 2, 33333333, 0x543, 0x543, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"Mobile Pentium MMX 150", CPU_PENTIUMMMX, 17, 150000000, 3, 30000000, 0x544, 0x544, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Mobile Pentium MMX 166", CPU_PENTIUMMMX, 19, 166666666, 3, 33333333, 0x544, 0x544, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Mobile Pentium MMX 200", CPU_PENTIUMMMX, 21, 200000000, 3, 33333333, 0x581, 0x581, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"Mobile Pentium MMX 233", CPU_PENTIUMMMX, 24, 233333333, 4, 33333333, 0x581, 0x581, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,10,10},
{"Mobile Pentium MMX 266", CPU_PENTIUMMMX, 26, 266666666, 4, 33333333, 0x582, 0x582, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12},
{"Mobile Pentium MMX 300", CPU_PENTIUMMMX, 28, 300000000, 5, 33333333, 0x582, 0x582, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13},
{"Pentium OverDrive 125",CPU_PENTIUM,15, 125000000, 3, 25000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,7,7},
{"Pentium OverDrive 150",CPU_PENTIUM,17, 150000000, 3, 30000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium OverDrive 166",CPU_PENTIUM,17, 166666666, 3, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium OverDrive MMX 125", CPU_PENTIUMMMX,15,125000000, 3, 25000000, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,7,7},
{"Pentium OverDrive MMX 150/60", CPU_PENTIUMMMX,17,150000000, 3, 30000000, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium OverDrive MMX 166", CPU_PENTIUMMMX,19,166000000, 3, 33333333, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium OverDrive MMX 180", CPU_PENTIUMMMX,20,180000000, 3, 30000000, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"Pentium OverDrive MMX 200", CPU_PENTIUMMMX,21,200000000, 3, 33333333, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"", -1, 0, 0, 0}
};
CPU cpus_K5[] =
{
/*AMD K5 (Socket 5)*/
{"K5 (5k86) 75 (P75)", CPU_K5, 9, 75000000, 2, 25000000, 0x500, 0x500, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4},
{"K5 (SSA/5) 75 (PR75)", CPU_K5, 9, 75000000, 2, 25000000, 0x501, 0x501, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4},
{"K5 (5k86) 90 (P90)", CPU_K5, 12, 90000000, 2, 30000000, 0x500, 0x500, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
{"K5 (SSA/5) 90 (PR90)", CPU_K5, 12, 90000000, 2, 30000000, 0x501, 0x501, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
{"K5 (5k86) 100 (P100)", CPU_K5, 13, 100000000, 2, 33333333, 0x500, 0x500, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
{"K5 (SSA/5) 100 (PR100)",CPU_K5, 13, 100000000, 2, 33333333, 0x501, 0x501, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
{"K5 (5k86) 90 (PR120)", CPU_5K86, 14, 120000000, 2, 30000000, 0x511, 0x511, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"K5 (5k86) 100 (PR133)", CPU_5K86, 16, 133333333, 2, 33333333, 0x514, 0x514, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"K5 (5k86) 105 (PR150)", CPU_5K86, 17, 150000000, 3, 30000000, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"K5 (5k86) 116.5 (PR166)",CPU_5K86, 19, 166666666,3, 33333333, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"K5 (5k86) 133 (PR200)", CPU_5K86, 21, 200000000, 3, 33333333, 0x534, 0x534, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"", -1, 0, 0, 0}
};
CPU cpus_K56[] =
{
/*AMD K5 and K6 (Socket 7)*/
{"K5 (5k86) 75 (P75)", CPU_K5, 9, 75000000, 2, 25000000, 0x500, 0x500, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4},
{"K5 (SSA/5) 75 (PR75)", CPU_K5, 9, 75000000, 2, 25000000, 0x501, 0x501, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4},
{"K5 (5k86) 90 (P90)", CPU_K5, 12, 90000000, 2, 30000000, 0x500, 0x500, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
{"K5 (SSA/5) 90 (PR90)", CPU_K5, 12, 90000000, 2, 30000000, 0x501, 0x501, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
{"K5 (5k86) 100 (P100)", CPU_K5, 13, 100000000, 2, 33333333, 0x500, 0x500, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
{"K5 (SSA/5) 100 (PR100)",CPU_K5, 13, 100000000, 2, 33333333, 0x501, 0x501, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
{"K5 (5k86) 90 (PR120)", CPU_5K86, 14, 120000000, 2, 30000000, 0x511, 0x511, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"K5 (5k86) 100 (PR133)", CPU_5K86, 16, 133333333, 2, 33333333, 0x514, 0x514, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"K5 (5k86) 105 (PR150)", CPU_5K86, 17, 150000000, 3, 30000000, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"K5 (5k86) 116.5 (PR166)",CPU_5K86, 19, 166666666,3, 33333333, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"K5 (5k86) 133 (PR200)", CPU_5K86, 21, 200000000, 3, 33333333, 0x534, 0x534, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"K6 (Model 6) 166", CPU_K6, 19, 166666666, 3, 33333333, 0x562, 0x562, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"K6 (Model 6) 200", CPU_K6, 21, 200000000, 3, 33333333, 0x562, 0x562, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"K6 (Model 6) 233", CPU_K6, 24, 233333333, 4, 33333333, 0x562, 0x562, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,10,10},
{"K6 (Model 7) 200", CPU_K6, 21, 200000000, 3, 33333333, 0x570, 0x570, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"K6 (Model 7) 233", CPU_K6, 24, 233333333, 4, 33333333, 0x570, 0x570, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,10,10},
{"K6 (Model 7) 266", CPU_K6, 26, 266666666, 4, 33333333, 0x570, 0x570, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12},
{"K6 (Model 7) 300", CPU_K6, 28, 300000000, 5, 33333333, 0x570, 0x570, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13},
{"", -1, 0, 0, 0}
};
CPU cpus_PentiumPro[] =
{
/*Intel Pentium Pro and II Overdrive*/
{"Pentium Pro 50", CPU_PENTIUMPRO, 5, 50000000, 1, 25000000, 0x612, 0x612, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 4,4,3,3},
{"Pentium Pro 60" , CPU_PENTIUMPRO, 6, 60000000, 1, 30000000, 0x612, 0x612, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 6,6,3,3},
{"Pentium Pro 66" , CPU_PENTIUMPRO, 6, 66666666, 1, 33333333, 0x612, 0x612, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 6,6,3,3},
{"Pentium Pro 75", CPU_PENTIUMPRO, 9, 75000000, 2, 25000000, 0x612, 0x612, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4},
{"Pentium Pro 150", CPU_PENTIUMPRO, 17, 150000000, 3, 30000000, 0x612, 0x612, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium Pro 166", CPU_PENTIUMPRO, 19, 166666666, 3, 33333333, 0x617, 0x617, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium Pro 180", CPU_PENTIUMPRO, 20, 180000000, 3, 30000000, 0x617, 0x617, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"Pentium Pro 200", CPU_PENTIUMPRO, 21, 200000000, 3, 33333333, 0x617, 0x617, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"Pentium II Overdrive 50", CPU_PENTIUM2D, 5, 50000000, 1, 25000000, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 4,4,3,3},
{"Pentium II Overdrive 60", CPU_PENTIUM2D, 6, 60000000, 1, 30000000, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 6,6,3,3},
{"Pentium II Overdrive 66", CPU_PENTIUM2D, 6, 66666666, 1, 33333333, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 6,6,3,3},
{"Pentium II Overdrive 75", CPU_PENTIUM2D, 9, 75000000, 2, 25000000, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4},
{"Pentium II Overdrive 210", CPU_PENTIUM2D, 22, 210000000, 4, 30000000, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 17,17,7,7},
{"Pentium II Overdrive 233", CPU_PENTIUM2D, 24, 233333333, 4, 33333333, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,10,1},
{"Pentium II Overdrive 240", CPU_PENTIUM2D, 25, 240000000, 4, 30000000, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12},
{"Pentium II Overdrive 266", CPU_PENTIUM2D, 26, 266666666, 4, 33333333, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12},
{"Pentium II Overdrive 270", CPU_PENTIUM2D, 27, 270000000, 5, 30000000, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 25,25,12,12},
{"Pentium II Overdrive 300/66",CPU_PENTIUM2D, 28, 300000000, 5, 33333333, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 25,25,12,12},
{"Pentium II Overdrive 300/60",CPU_PENTIUM2D, 28, 300000000, 5, 30000000, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13},
{"Pentium II Overdrive 333", CPU_PENTIUM2D, 29, 333333333, 5, 33333333, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13},
{"", -1, 0, 0, 0}
};
void cpu_set_edx()
{

View File

@@ -8,7 +8,7 @@
*
* CPU type handler.
*
* Version: @(#)cpu.h 1.0.2 2017/10/14
* Version: @(#)cpu.h 1.0.3 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* leilei,
@@ -21,132 +21,254 @@
#ifndef EMU_CPU_H
# define EMU_CPU_H
extern int cpu, cpu_manufacturer;
/*808x class CPUs*/
#define CPU_8088 0
#define CPU_8086 1
/*286 class CPUs*/
#define CPU_286 2
/*386 class CPUs*/
#define CPU_386SX 3
#define CPU_386DX 4
#define CPU_8088 0 /* 808x class CPUs */
#define CPU_8086 1
#define CPU_286 2 /* 286 class CPUs */
#define CPU_386SX 3 /* 386 class CPUs */
#define CPU_386DX 4
#define CPU_RAPIDCAD 5
#define CPU_486SLC 6
#define CPU_486DLC 7
/*486 class CPUs*/
#define CPU_i486SX 8
#define CPU_Am486SX 9
#define CPU_Cx486S 10
#define CPU_i486DX 11
#define CPU_Am486DX 12
#define CPU_Cx486DX 13
#define CPU_iDX4 14
#define CPU_Cx5x86 15
/*586 class CPUs*/
#define CPU_WINCHIP 16
#define CPU_PENTIUM 17
#define CPU_PENTIUMMMX 18
#define CPU_486SLC 6
#define CPU_486DLC 7
#define CPU_i486SX 8 /* 486 class CPUs */
#define CPU_Am486SX 9
#define CPU_Cx486S 10
#define CPU_i486DX 11
#define CPU_Am486DX 12
#define CPU_Cx486DX 13
#define CPU_iDX4 14
#define CPU_Cx5x86 15
#define CPU_WINCHIP 16 /* 586 class CPUs */
#define CPU_PENTIUM 17
#define CPU_PENTIUMMMX 18
#define CPU_Cx6x86 19
#define CPU_Cx6x86MX 20
#define CPU_Cx6x86L 21
#define CPU_CxGX1 22
#define CPU_K5 23
#define CPU_5K86 24
#define CPU_K6 25
#define CPU_K5 23
#define CPU_5K86 24
#define CPU_K6 25
#define CPU_PENTIUMPRO 26 /* 686 class CPUs */
#if 0
# define CPU_PENTIUM2 27
# define CPU_PENTIUM2D 28
#else
# define CPU_PENTIUM2D 27
#endif
/*686 class CPUs*/
#define CPU_PENTIUMPRO 26
/*
#define CPU_PENTIUM2 27
#define CPU_PENTIUM2D 28 */
#define CPU_PENTIUM2D 27
#define MANU_INTEL 0
#define MANU_AMD 1
#define MANU_CYRIX 2
#define MANU_IDT 3
#define MANU_INTEL 0
#define MANU_AMD 1
#define MANU_CYRIX 2
#define MANU_IDT 3
extern int timing_rr;
extern int timing_mr, timing_mrl;
extern int timing_rm, timing_rml;
extern int timing_mm, timing_mml;
extern int timing_bt, timing_bnt;
extern int timing_int, timing_int_rm, timing_int_v86, timing_int_pm, timing_int_pm_outer;
extern int timing_iret_rm, timing_iret_v86, timing_iret_pm, timing_iret_pm_outer;
extern int timing_call_rm, timing_call_pm, timing_call_pm_gate, timing_call_pm_gate_inner;
extern int timing_retf_rm, timing_retf_pm, timing_retf_pm_outer;
extern int timing_jmp_rm, timing_jmp_pm, timing_jmp_pm_gate;
extern int timing_misaligned;
#define CPU_SUPPORTS_DYNAREC 1
#define CPU_REQUIRES_DYNAREC 2
typedef struct
{
char name[32];
int cpu_type;
int speed;
int rspeed;
int multi;
int pci_speed;
uint32_t edx_reset;
uint32_t cpuid_model;
uint16_t cyrix_id;
int cpu_flags;
int mem_read_cycles, mem_write_cycles;
int cache_read_cycles, cache_write_cycles;
typedef struct {
char name[32];
int cpu_type;
int speed;
int rspeed;
int multi;
int pci_speed;
uint32_t edx_reset;
uint32_t cpuid_model;
uint16_t cyrix_id;
int cpu_flags;
int mem_read_cycles, mem_write_cycles;
int cache_read_cycles, cache_write_cycles;
} CPU;
extern CPU cpus_8088[];
extern CPU cpus_8086[];
extern CPU cpus_286[];
extern CPU cpus_i386SX[];
extern CPU cpus_i386DX[];
extern CPU cpus_Am386SX[];
extern CPU cpus_Am386DX[];
extern CPU cpus_486SLC[];
extern CPU cpus_486DLC[];
extern CPU cpus_i486[];
extern CPU cpus_Am486[];
extern CPU cpus_Cx486[];
extern CPU cpus_WinChip[];
extern CPU cpus_Pentium5V[];
extern CPU cpus_Pentium5V50[];
extern CPU cpus_PentiumS5[];
extern CPU cpus_K5[];
extern CPU cpus_K56[];
extern CPU cpus_Pentium[];
extern CPU cpus_6x86[];
extern CPU cpus_PentiumPro[];
extern CPU cpus_Pentium2[];
extern CPU cpus_Pentium2D[];
extern CPU cpus_8088[];
extern CPU cpus_8086[];
extern CPU cpus_286[];
extern CPU cpus_i386SX[];
extern CPU cpus_i386DX[];
extern CPU cpus_Am386SX[];
extern CPU cpus_Am386DX[];
extern CPU cpus_486SLC[];
extern CPU cpus_486DLC[];
extern CPU cpus_i486[];
extern CPU cpus_Am486[];
extern CPU cpus_Cx486[];
extern CPU cpus_WinChip[];
extern CPU cpus_Pentium5V[];
extern CPU cpus_Pentium5V50[];
extern CPU cpus_PentiumS5[];
extern CPU cpus_K5[];
extern CPU cpus_K56[];
extern CPU cpus_Pentium[];
extern CPU cpus_6x86[];
extern CPU cpus_PentiumPro[];
extern CPU cpus_Pentium2[];
extern CPU cpus_Pentium2D[];
extern CPU cpus_pcjr[];
extern CPU cpus_europc[];
extern CPU cpus_pc1512[];
extern CPU cpus_ibmat[];
extern CPU cpus_ibmxt286[];
extern CPU cpus_ps1_m2011[];
extern CPU cpus_ps2_m30_286[];
extern CPU cpus_acer[];
extern int cpu_iscyrix;
extern int cpu_16bitbus;
extern int cpu_busspeed;
extern int cpu_multi;
/*Cyrix 5x86/6x86 only has data misalignment penalties when crossing 8-byte boundaries*/
extern int cpu_cyrix_alignment;
#define C_FLAG 0x0001
#define P_FLAG 0x0004
#define A_FLAG 0x0010
#define Z_FLAG 0x0040
#define N_FLAG 0x0080
#define T_FLAG 0x0100
#define I_FLAG 0x0200
#define D_FLAG 0x0400
#define V_FLAG 0x0800
#define NT_FLAG 0x4000
extern int cpu_hasrdtsc;
extern int cpu_hasMSR;
extern int cpu_hasMMX;
extern int cpu_hasCR4;
extern int cpu_hasVME;
#define VM_FLAG 0x0002 /* in EFLAGS */
#define VIF_FLAG 0x0008 /* in EFLAGS */
#define VIP_FLAG 0x0010 /* in EFLAGS */
#define WP_FLAG 0x10000 /* in CR0 */
#define CR4_VME (1 << 0)
#define CR4_PVI (1 << 1)
#define CR4_PSE (1 << 4)
#define CPL ((_cs.access>>5)&3)
#define IOPL ((flags>>12)&3)
#define IOPLp ((!(msw&1)) || (CPL<=IOPL))
typedef union {
uint32_t l;
uint16_t w;
struct {
uint8_t l,
h;
} b;
} x86reg;
typedef struct {
uint32_t base;
uint32_t limit;
uint8_t access;
uint16_t seg;
uint32_t limit_low,
limit_high;
int checked; /*Non-zero if selector is known to be valid*/
} x86seg;
typedef union MMX_REG {
uint64_t q;
int64_t sq;
uint32_t l[2];
int32_t sl[2];
uint16_t w[4];
int16_t sw[4];
uint8_t b[8];
int8_t sb[8];
} MMX_REG;
typedef struct {
uint32_t tr1, tr12;
uint32_t cesr;
uint32_t fcr;
uint64_t fcr2, fcr3;
} msr_t;
typedef union {
uint32_t l;
uint16_t w;
} cr0_t;
struct _cpustate_ {
x86reg regs[8];
uint8_t tag[8];
x86seg *ea_seg;
uint32_t eaaddr;
int flags_op;
uint32_t flags_res;
uint32_t flags_op1,
flags_op2;
uint32_t pc;
uint32_t oldpc;
uint32_t op32;
int TOP;
union {
struct {
int8_t rm,
mod,
reg;
} rm_mod_reg;
int32_t rm_mod_reg_data;
} rm_data;
int8_t ssegs;
int8_t ismmx;
int8_t abrt;
int _cycles;
int cpu_recomp_ins;
uint16_t npxs,
npxc;
double ST[8];
uint16_t MM_w4[8];
MMX_REG MM[8];
uint16_t old_npxc,
new_npxc;
uint32_t last_ea;
} cpu_state;
#define CPU_STATUS_USE32 (1 << 0)
#define CPU_STATUS_STACK32 (1 << 1)
#define CPU_STATUS_FLATDS (1 << 2)
#define CPU_STATUS_FLATSS (1 << 3)
#ifdef __MSC__
# define COMPILE_TIME_ASSERT(expr) /*nada*/
#else
# define COMPILE_TIME_ASSERT(expr) typedef char COMP_TIME_ASSERT[(expr) ? 1 : 0];
#endif
COMPILE_TIME_ASSERT(sizeof(cpu_state) <= 128)
#define cpu_state_offset(MEMBER) ((uint8_t)((uintptr_t)&cpu_state.MEMBER - (uintptr_t)&cpu_state - 128))
#define EAX cpu_state.regs[0].l
#define AX cpu_state.regs[0].w
#define AL cpu_state.regs[0].b.l
#define AH cpu_state.regs[0].b.h
#define ECX cpu_state.regs[1].l
#define CX cpu_state.regs[1].w
#define CL cpu_state.regs[1].b.l
#define CH cpu_state.regs[1].b.h
#define EDX cpu_state.regs[2].l
#define DX cpu_state.regs[2].w
#define DL cpu_state.regs[2].b.l
#define DH cpu_state.regs[2].b.h
#define EBX cpu_state.regs[3].l
#define BX cpu_state.regs[3].w
#define BL cpu_state.regs[3].b.l
#define BH cpu_state.regs[3].b.h
#define ESP cpu_state.regs[4].l
#define EBP cpu_state.regs[5].l
#define ESI cpu_state.regs[6].l
#define EDI cpu_state.regs[7].l
#define SP cpu_state.regs[4].w
#define BP cpu_state.regs[5].w
#define SI cpu_state.regs[6].w
#define DI cpu_state.regs[7].w
#define cycles cpu_state._cycles
#define cpu_rm cpu_state.rm_data.rm_mod_reg.rm
#define cpu_mod cpu_state.rm_data.rm_mod_reg.mod
#define cpu_reg cpu_state.rm_data.rm_mod_reg.reg
#define CR4_TSD (1 << 2)
#define CR4_DE (1 << 3)
@@ -154,49 +276,161 @@ extern int cpu_hasVME;
#define CR4_PCE (1 << 8)
#define CR4_OSFXSR (1 << 9)
extern uint64_t cpu_CR4_mask;
#define CPU_SUPPORTS_DYNAREC 1
#define CPU_REQUIRES_DYNAREC 2
/* Global variables. */
extern int cpu_iscyrix;
extern int cpu_16bitbus;
extern int cpu_busspeed;
extern int cpu_multi;
extern int cpu_cyrix_alignment; /*Cyrix 5x86/6x86 only has data misalignment
penalties when crossing 8-byte boundaries*/
extern int cpu_cycles_read, cpu_cycles_read_l, cpu_cycles_write, cpu_cycles_write_l;
extern int cpu_prefetch_cycles, cpu_prefetch_width;
extern int cpu_waitstates;
extern int cpu_cache_int_enabled, cpu_cache_ext_enabled;
extern int cpu_pci_speed;
extern int is8086, is286, is386, is486;
extern int is_rapidcad, is_pentium;
extern int hasfpu;
extern int cpu_hasrdtsc;
extern int cpu_hasMSR;
extern int cpu_hasMMX;
extern int cpu_hasCR4;
extern int cpu_hasVME;
extern uint64_t tsc;
extern uint32_t cpu_cur_status;
extern uint64_t cpu_CR4_mask;
extern uint64_t tsc;
extern msr_t msr;
extern int cpuspeed;
extern int cycles_lost;
extern uint8_t opcode;
extern int insc;
extern int fpucount;
extern float mips,flops;
extern int clockrate;
extern int cgate16;
extern int cpl_override;
extern int CPUID;
extern int xt_cpu_multi;
extern int isa_cycles;
extern uint16_t flags,eflags;
extern uint32_t oldds,oldss,olddslimit,oldsslimit,olddslimitw,oldsslimitw;
extern int ins,output;
extern int cycdiff;
extern uint32_t pccache;
extern uint8_t *pccache2;
void cyrix_write(uint16_t addr, uint8_t val, void *priv);
uint8_t cyrix_read(uint16_t addr, void *priv);
extern float isa_timing, bus_timing;
extern uint64_t pmc[2];
extern uint16_t temp_seg_data[4];
extern uint16_t cs_msr;
extern uint32_t esp_msr;
extern uint32_t eip_msr;
extern int is8086;
/* For the AMD K6. */
extern uint64_t star;
void cpu_CPUID();
#define FPU_CW_Reserved_Bits (0xe0c0)
void cpu_RDMSR();
void cpu_WRMSR();
extern cr0_t CR0;
#define cr0 CR0.l
#define msw CR0.w
extern uint32_t cr2, cr3, cr4;
extern uint32_t dr[8];
extern int cpu_use_dynarec;
extern int xt_cpu_multi;
/*Segments -
_cs,_ds,_es,_ss are the segment structures
CS,DS,ES,SS is the 16-bit data
cs,ds,es,ss are defines to the bases*/
extern x86seg gdt,ldt,idt,tr;
extern x86seg _cs,_ds,_es,_ss,_fs,_gs;
extern x86seg _oldds;
#define CS _cs.seg
#define DS _ds.seg
#define ES _es.seg
#define SS _ss.seg
#define FS _fs.seg
#define GS _gs.seg
#define cs _cs.base
#define ds _ds.base
#define es _es.base
#define ss _ss.base
#define seg_fs _fs.base
#define gs _gs.base
#define ISA_CYCLES_SHIFT 6
extern int isa_cycles;
#define ISA_CYCLES(x) ((x * isa_cycles) >> ISA_CYCLES_SHIFT)
#define ISA_CYCLES(x) ((x * isa_cycles) >> ISA_CYCLES_SHIFT)
void cpu_update_waitstates();
void cpu_set();
extern int cpu_cycles_read, cpu_cycles_read_l, cpu_cycles_write, cpu_cycles_write_l;
extern int cpu_prefetch_cycles, cpu_prefetch_width;
extern int cpu_waitstates;
extern int cpu_cache_int_enabled, cpu_cache_ext_enabled;
extern int cpu_pci_speed;
typedef struct
{
uint32_t tr1, tr12;
uint32_t cesr;
uint32_t fcr;
uint64_t fcr2, fcr3;
} msr_t;
extern int timing_rr;
extern int timing_mr, timing_mrl;
extern int timing_rm, timing_rml;
extern int timing_mm, timing_mml;
extern int timing_bt, timing_bnt;
extern int timing_int, timing_int_rm, timing_int_v86, timing_int_pm;
extern int timing_int_pm_outer, timing_iret_rm, timing_iret_v86, timing_iret_pm;
extern int timing_iret_pm_outer, timing_call_rm, timing_call_pm;
extern int timing_call_pm_gate, timing_call_pm_gate_inner;
extern int timing_retf_rm, timing_retf_pm, timing_retf_pm_outer;
extern int timing_jmp_rm, timing_jmp_pm, timing_jmp_pm_gate;
extern int timing_misaligned;
extern msr_t msr;
extern CPU cpus_pcjr[]; // FIXME: should be in machine file!
extern CPU cpus_europc[]; // FIXME: should be in machine file!
extern CPU cpus_pc1512[]; // FIXME: should be in machine file!
extern CPU cpus_ibmat[]; // FIXME: should be in machine file!
extern CPU cpus_ibmxt286[]; // FIXME: should be in machine file!
extern CPU cpus_ps1_m2011[]; // FIXME: should be in machine file!
extern CPU cpus_ps2_m30_286[]; // FIXME: should be in machine file!
extern CPU cpus_acer[]; // FIXME: should be in machine file!
/* Functions. */
extern void cyrix_write(uint16_t addr, uint8_t val, void *priv);
extern uint8_t cyrix_read(uint16_t addr, void *priv);
extern void loadseg(uint16_t seg, x86seg *s);
extern void loadcs(uint16_t seg);
extern void cpu_update_waitstates(void);
extern void cpu_set(void);
extern void cpu_CPUID(void);
extern void cpu_RDMSR(void);
extern void cpu_WRMSR(void);
extern int checkio(int port);
extern void codegen_block_end(void);
extern void codegen_reset(void);
extern void cpu_set_edx(void);
extern int divl(uint32_t val);
extern void dumpregs(int __force);
extern void execx86(int cycs);
extern void exec386(int cycs);
extern void exec386_dynarec(int cycs);
extern int idivl(int32_t val);
extern void loadcscall(uint16_t seg);
extern void loadcsjmp(uint16_t seg, uint32_t oxpc);
extern void pmodeint(int num, int soft);
extern void pmoderetf(int is32, uint16_t off);
extern void pmodeiret(int is32);
extern void resetmcr(void);
extern void resetx86(void);
extern void refreshread(void);
extern void resetreadlookup(void);
extern void softresetx86(void);
extern void x86_int_sw(int num);
extern int x86_int_sw_rm(int num);
extern void x86gpf(char *s, uint16_t error);
extern void x86np(char *s, uint16_t error);
extern void x86ss(char *s, uint16_t error);
extern void x86ts(char *s, uint16_t error);
extern void x87_dumpregs(void);
extern void x87_reset(void);
#endif /*EMU_CPU_H*/

445
src/cpu/cpu_table.c Normal file
View File

@@ -0,0 +1,445 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Define all known processor types.
*
* Available cpuspeeds:
*
* 0 = 16 MHz
* 1 = 20 MHz
* 2 = 25 MHz
* 3 = 33 MHz
* 4 = 40 MHz
* 5 = 50 MHz
* 6 = 66 MHz
* 7 = 75 MHz
* 8 = 80 MHz
* 9 = 90 MHz
* 10 = 100 MHz
* 11 = 120 MHz
* 12 = 133 MHz
* 13 = 150 MHz
* 14 = 160 MHz
* 15 = 166 MHz
* 16 = 180 MHz
* 17 = 200 MHz
*
* Version: @(#)cpu_table.c 1.0.1 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* leilei,
* Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>
*
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016-2017 leilei.
* Copyright 2016,2017 Miran Grca.
* Copyright 2017 Fred N. van Kempen.
*/
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "cpu.h"
#include "../machine/machine.h"
CPU cpus_8088[] = {
/*8088 standard*/
{"8088/4.77", CPU_8088, 0, 4772728, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"8088/8", CPU_8088, 1, 8000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
#if 0
{"8088/7.16", CPU_8088, 1, 14318184/2, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"8088/10", CPU_8088, 2, 10000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"8088/12", CPU_8088, 3, 12000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"8088/16", CPU_8088, 4, 16000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
#endif
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_pcjr[] = {
/*8088 PCjr*/
{"8088/4.77", CPU_8088, 0, 4772728, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_europc[] = {
/*8088 EuroPC*/
{"8088/4.77", CPU_8088, 0, 4772728, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"8088/7.16", CPU_8088, 1, 14318184/2, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"8088/9.54", CPU_8088, 1, 4772728*2, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_8086[] = {
/*8086 standard*/
{"8086/7.16", CPU_8086, 1, 14318184/2, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"8086/8", CPU_8086, 1, 8000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"8086/9.54", CPU_8086, 1, 4772728*2, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"8086/10", CPU_8086, 2, 10000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"8086/12", CPU_8086, 3, 12000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"8086/16", CPU_8086, 4, 16000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_pc1512[] = {
/*8086 Amstrad*/
{"8086/8", CPU_8086, 1, 8000000, 1, 0, 0, 0, 0, 0, 0,0,0,0},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_286[] = {
/*286*/
{"286/6", CPU_286, 0, 6000000, 1, 0, 0, 0, 0, 0, 2,2,2,2},
{"286/8", CPU_286, 1, 8000000, 1, 0, 0, 0, 0, 0, 2,2,2,2},
{"286/10", CPU_286, 2, 10000000, 1, 0, 0, 0, 0, 0, 2,2,2,2},
{"286/12", CPU_286, 3, 12500000, 1, 0, 0, 0, 0, 0, 3,3,3,3},
{"286/16", CPU_286, 4, 16000000, 1, 0, 0, 0, 0, 0, 3,3,3,3},
{"286/20", CPU_286, 5, 20000000, 1, 0, 0, 0, 0, 0, 4,4,4,4},
{"286/25", CPU_286, 6, 25000000, 1, 0, 0, 0, 0, 0, 4,4,4,4},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_ibmat[] = {
/*286*/
{"286/6", CPU_286, 0, 6000000, 1, 0, 0, 0, 0, 0, 3,3,3,3},
{"286/8", CPU_286, 0, 8000000, 1, 0, 0, 0, 0, 0, 3,3,3,3},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_ibmxt286[] = {
/*286*/
{"286/6", CPU_286, 0, 6000000, 1, 0, 0, 0, 0, 0, 2,2,2,2},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_ps1_m2011[] = {
/*286*/
{"286/10", CPU_286, 2, 10000000, 1, 0, 0, 0, 0, 0, 2,2,2,2},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_ps2_m30_286[] = {
/*286*/
{"286/10", CPU_286, 2, 10000000, 1, 0, 0, 0, 0, 0, 2,2,2,2},
{"286/12", CPU_286, 3, 12500000, 1, 0, 0, 0, 0, 0, 3,3,3,3},
{"286/16", CPU_286, 4, 16000000, 1, 0, 0, 0, 0, 0, 3,3,3,3},
{"286/20", CPU_286, 5, 20000000, 1, 0, 0, 0, 0, 0, 4,4,4,4},
{"286/25", CPU_286, 6, 25000000, 1, 0, 0, 0, 0, 0, 4,4,4,4},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_i386SX[] = {
/*i386SX*/
{"i386SX/16", CPU_386SX, 0, 16000000, 1, 0, 0x2308, 0, 0, 0, 3,3,3,3},
{"i386SX/20", CPU_386SX, 1, 20000000, 1, 0, 0x2308, 0, 0, 0, 4,4,3,3},
{"i386SX/25", CPU_386SX, 2, 25000000, 1, 0, 0x2308, 0, 0, 0, 4,4,3,3},
{"i386SX/33", CPU_386SX, 3, 33333333, 1, 0, 0x2308, 0, 0, 0, 6,6,3,3},
{"i386SX/40", CPU_386SX, 4, 40000000, 1, 0, 0x2308, 0, 0, 0, 7,7,3,3},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_i386DX[] = {
/*i386DX*/
{"i386DX/16", CPU_386DX, 0, 16000000, 1, 0, 0x0308, 0, 0, 0, 3,3,3,3},
{"i386DX/20", CPU_386DX, 1, 20000000, 1, 0, 0x0308, 0, 0, 0, 4,4,3,3},
{"i386DX/25", CPU_386DX, 2, 25000000, 1, 0, 0x0308, 0, 0, 0, 4,4,3,3},
{"i386DX/33", CPU_386DX, 3, 33333333, 1, 0, 0x0308, 0, 0, 0, 6,6,3,3},
{"i386DX/40", CPU_386DX, 4, 40000000, 1, 0, 0x0308, 0, 0, 0, 7,7,3,3},
{"RapidCAD/25", CPU_RAPIDCAD, 2, 25000000, 1, 0, 0x430, 0, 0, 0, 4,4,3,3},
{"RapidCAD/33", CPU_RAPIDCAD, 3, 33333333, 1, 0, 0x430, 0, 0, 0, 6,6,3,3},
{"RapidCAD/40", CPU_RAPIDCAD, 4, 40000000, 1, 0, 0x430, 0, 0, 0, 7,7,3,3},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_acer[] = {
/*i386SX*/
{"i386SX/25", CPU_386SX, 2, 25000000, 1, 0, 0x2308, 0, 0, 0, 4,4,4,4},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_Am386SX[] = {
/*Am386*/
{"Am386SX/16", CPU_386SX, 0, 16000000, 1, 0, 0x2308, 0, 0, 0, 3,3,3,3},
{"Am386SX/20", CPU_386SX, 1, 20000000, 1, 0, 0x2308, 0, 0, 0, 4,4,3,3},
{"Am386SX/25", CPU_386SX, 2, 25000000, 1, 0, 0x2308, 0, 0, 0, 4,4,3,3},
{"Am386SX/33", CPU_386SX, 3, 33333333, 1, 0, 0x2308, 0, 0, 0, 6,6,3,3},
{"Am386SX/40", CPU_386SX, 4, 40000000, 1, 0, 0x2308, 0, 0, 0, 7,7,3,3},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_Am386DX[] = {
/*Am386*/
{"Am386DX/25", CPU_386DX, 2, 25000000, 1, 0, 0x0308, 0, 0, 0, 4,4,3,3},
{"Am386DX/33", CPU_386DX, 3, 33333333, 1, 0, 0x0308, 0, 0, 0, 6,6,3,3},
{"Am386DX/40", CPU_386DX, 4, 40000000, 1, 0, 0x0308, 0, 0, 0, 7,7,3,3},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_486SLC[] = {
/*Cx486SLC*/
{"Cx486SLC/20", CPU_486SLC, 1, 20000000, 1, 0, 0x400, 0, 0x0000, 0, 4,4,3,3},
{"Cx486SLC/25", CPU_486SLC, 2, 25000000, 1, 0, 0x400, 0, 0x0000, 0, 4,4,3,3},
{"Cx486SLC/33", CPU_486SLC, 3, 33333333, 1, 0, 0x400, 0, 0x0000, 0, 6,6,3,3},
{"Cx486SRx2/32", CPU_486SLC, 3, 32000000, 2, 0, 0x406, 0, 0x0006, 0, 6,6,6,6},
{"Cx486SRx2/40", CPU_486SLC, 4, 40000000, 2, 0, 0x406, 0, 0x0006, 0, 8,8,6,6},
{"Cx486SRx2/50", CPU_486SLC, 5, 50000000, 2, 0, 0x406, 0, 0x0006, 0, 8,8,6,6},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_486DLC[] = {
/*Cx486DLC*/
{"Cx486DLC/25", CPU_486DLC, 2, 25000000, 1, 0, 0x401, 0, 0x0001, 0, 4,4,3,3},
{"Cx486DLC/33", CPU_486DLC, 3, 33333333, 1, 0, 0x401, 0, 0x0001, 0, 6,6,3,3},
{"Cx486DLC/40", CPU_486DLC, 4, 40000000, 1, 0, 0x401, 0, 0x0001, 0, 7,7,3,3},
{"Cx486DRx2/32", CPU_486DLC, 3, 32000000, 2, 0, 0x407, 0, 0x0007, 0, 6,6,6,6},
{"Cx486DRx2/40", CPU_486DLC, 4, 40000000, 2, 0, 0x407, 0, 0x0007, 0, 8,8,6,6},
{"Cx486DRx2/50", CPU_486DLC, 5, 50000000, 2, 0, 0x407, 0, 0x0007, 0, 8,8,6,6},
{"Cx486DRx2/66", CPU_486DLC, 6, 66666666, 2, 0, 0x407, 0, 0x0007, 0, 12,12,6,6},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_i486[] = {
/*i486*/
{"i486SX/16", CPU_i486SX, 0, 16000000, 1, 16000000, 0x42a, 0, 0, CPU_SUPPORTS_DYNAREC, 3,3,3,3},
{"i486SX/20", CPU_i486SX, 1, 20000000, 1, 20000000, 0x42a, 0, 0, CPU_SUPPORTS_DYNAREC, 4,4,3,3},
{"i486SX/25", CPU_i486SX, 2, 25000000, 1, 25000000, 0x42a, 0, 0, CPU_SUPPORTS_DYNAREC, 4,4,3,3},
{"i486SX/33", CPU_i486SX, 3, 33333333, 1, 33333333, 0x42a, 0, 0, CPU_SUPPORTS_DYNAREC, 6,6,3,3},
{"i486SX2/50", CPU_i486SX, 5, 50000000, 2, 25000000, 0x45b, 0, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6},
{"i486SX2/66 (Q0569)", CPU_i486SX, 6, 66666666, 2, 33333333, 0x45b, 0, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6},
{"i486DX/25", CPU_i486DX, 2, 25000000, 1, 25000000, 0x404, 0, 0, CPU_SUPPORTS_DYNAREC, 4,4,3,3},
{"i486DX/33", CPU_i486DX, 3, 33333333, 1, 33333333, 0x404, 0, 0, CPU_SUPPORTS_DYNAREC, 6,6,3,3},
{"i486DX/50", CPU_i486DX, 5, 50000000, 1, 25000000, 0x404, 0, 0, CPU_SUPPORTS_DYNAREC, 8,8,4,4},
{"i486DX2/40", CPU_i486DX, 4, 40000000, 2, 20000000, 0x430, 0, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6},
{"i486DX2/50", CPU_i486DX, 5, 50000000, 2, 25000000, 0x430, 0, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6},
{"i486DX2/66", CPU_i486DX, 6, 66666666, 2, 33333333, 0x430, 0, 0, CPU_SUPPORTS_DYNAREC, 12,12,6,6},
{"iDX4/75", CPU_iDX4, 7, 75000000, 3, 25000000, 0x481, 0x481, 0, CPU_SUPPORTS_DYNAREC, 12,12,9,9}, /*CPUID available on DX4, >= 75 MHz*/
{"iDX4/100", CPU_iDX4, 10, 100000000, 3, 33333333, 0x481, 0x481, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9}, /*Is on some real Intel DX2s, limit here is pretty arbitary*/
{"Pentium OverDrive/63", CPU_PENTIUM, 6, 62500000, 3, 25000000, 0x1531, 0x1531, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,7,7},
{"Pentium OverDrive/83", CPU_PENTIUM, 8, 83333333, 3, 33333333, 0x1532, 0x1532, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,8,8},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_Am486[] = {
/*Am486/5x86*/
{"Am486SX/33", CPU_Am486SX, 3, 33333333, 1, 33333333, 0x42a, 0, 0, CPU_SUPPORTS_DYNAREC, 6,6,3,3},
{"Am486SX/40", CPU_Am486SX, 4, 40000000, 1, 20000000, 0x42a, 0, 0, CPU_SUPPORTS_DYNAREC, 7,7,3,3},
{"Am486SX2/50", CPU_Am486SX, 5, 50000000, 2, 25000000, 0x45b, 0x45b, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6}, /*CPUID available on SX2, DX2, DX4, 5x86, >= 50 MHz*/
{"Am486SX2/66", CPU_Am486SX, 6, 66666666, 2, 33333333, 0x45b, 0x45b, 0, CPU_SUPPORTS_DYNAREC, 12,12,6,6}, /*Isn't on all real AMD SX2s and DX2s, availability here is pretty arbitary (and distinguishes them from the Intel chips)*/
{"Am486DX/33", CPU_Am486DX, 3, 33333333, 1, 33333333, 0x430, 0, 0, CPU_SUPPORTS_DYNAREC, 6,6,3,3},
{"Am486DX/40", CPU_Am486DX, 4, 40000000, 1, 20000000, 0x430, 0, 0, CPU_SUPPORTS_DYNAREC, 7,7,3,3},
{"Am486DX2/50", CPU_Am486DX, 5, 50000000, 2, 25000000, 0x470, 0x470, 0, CPU_SUPPORTS_DYNAREC, 8,8,6,6},
{"Am486DX2/66", CPU_Am486DX, 6, 66666666, 2, 33333333, 0x470, 0x470, 0, CPU_SUPPORTS_DYNAREC, 12,12,6,6},
{"Am486DX2/80", CPU_Am486DX, 8, 80000000, 2, 20000000, 0x470, 0x470, 0, CPU_SUPPORTS_DYNAREC, 14,14,6,6},
{"Am486DX4/75", CPU_Am486DX, 7, 75000000, 3, 25000000, 0x482, 0x482, 0, CPU_SUPPORTS_DYNAREC, 12,12,9,9},
{"Am486DX4/90", CPU_Am486DX, 9, 90000000, 3, 30000000, 0x482, 0x482, 0, CPU_SUPPORTS_DYNAREC, 15,15,9,9},
{"Am486DX4/100", CPU_Am486DX, 10, 100000000, 3, 33333333, 0x482, 0x482, 0, CPU_SUPPORTS_DYNAREC, 15,15,9,9},
{"Am486DX4/120", CPU_Am486DX, 11, 120000000, 3, 20000000, 0x482, 0x482, 0, CPU_SUPPORTS_DYNAREC, 21,21,9,9},
{"Am5x86/P75", CPU_Am486DX, 12, 133333333, 4, 33333333, 0x4e0, 0x4e0, 0, CPU_SUPPORTS_DYNAREC, 24,24,12,12},
{"Am5x86/P75+", CPU_Am486DX, 13, 160000000, 4, 20000000, 0x4e0, 0x4e0, 0, CPU_SUPPORTS_DYNAREC, 28,28,12,12},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_Cx486[] = {
/*Cx486/5x86*/
{"Cx486S/25", CPU_Cx486S, 2, 25000000, 1, 25000000, 0x420, 0, 0x0010, CPU_SUPPORTS_DYNAREC, 4,4,3,3},
{"Cx486S/33", CPU_Cx486S, 3, 33333333, 1, 33333333, 0x420, 0, 0x0010, CPU_SUPPORTS_DYNAREC, 6,6,3,3},
{"Cx486S/40", CPU_Cx486S, 4, 40000000, 1, 20000000, 0x420, 0, 0x0010, CPU_SUPPORTS_DYNAREC, 7,7,3,3},
{"Cx486DX/33", CPU_Cx486DX, 3, 33333333, 1, 33333333, 0x430, 0, 0x051a, CPU_SUPPORTS_DYNAREC, 6,6,3,3},
{"Cx486DX/40", CPU_Cx486DX, 4, 40000000, 1, 20000000, 0x430, 0, 0x051a, CPU_SUPPORTS_DYNAREC, 7,7,3,3},
{"Cx486DX2/50", CPU_Cx486DX, 5, 50000000, 2, 25000000, 0x430, 0, 0x081b, CPU_SUPPORTS_DYNAREC, 8,8,6,6},
{"Cx486DX2/66", CPU_Cx486DX, 6, 66666666, 2, 33333333, 0x430, 0, 0x0b1b, CPU_SUPPORTS_DYNAREC, 12,12,6,6},
{"Cx486DX2/80", CPU_Cx486DX, 8, 80000000, 2, 20000000, 0x430, 0, 0x311b, CPU_SUPPORTS_DYNAREC, 14,14,16,16},
{"Cx486DX4/75", CPU_Cx486DX, 7, 75000000, 3, 25000000, 0x480, 0, 0x361f, CPU_SUPPORTS_DYNAREC, 12,12,9,9},
{"Cx486DX4/100", CPU_Cx486DX, 10, 100000000, 3, 33333333, 0x480, 0, 0x361f, CPU_SUPPORTS_DYNAREC, 15,15,9,9},
{"Cx5x86/100", CPU_Cx5x86, 10, 100000000, 3, 33333333, 0x480, 0, 0x002f, CPU_SUPPORTS_DYNAREC, 15,15,9,9},
{"Cx5x86/120", CPU_Cx5x86, 11, 120000000, 3, 20000000, 0x480, 0, 0x002f, CPU_SUPPORTS_DYNAREC, 21,21,9,9},
{"Cx5x86/133", CPU_Cx5x86, 12, 133333333, 4, 33333333, 0x480, 0, 0x002f, CPU_SUPPORTS_DYNAREC, 24,24,12,12},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_6x86[] = {
/*Cyrix 6x86*/
{"6x86-P90", CPU_Cx6x86, 17, 80000000, 3, 40000000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 8,8,6,6},
{"6x86-PR120+", CPU_Cx6x86, 17, 100000000, 3, 25000000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,6,6},
{"6x86-PR133+", CPU_Cx6x86, 17, 110000000, 3, 27500000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,6,6},
{"6x86-PR150+", CPU_Cx6x86, 17, 120000000, 3, 30000000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"6x86-PR166+", CPU_Cx6x86, 17, 133333333, 3, 33333333, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"6x86-PR200+", CPU_Cx6x86, 17, 150000000, 3, 37500000, 0x520, 0x520, 0x1731, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
/*Cyrix 6x86L*/
{"6x86L-PR133+", CPU_Cx6x86L, 19, 110000000, 3, 27500000, 0x540, 0x540, 0x2231, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,6,6},
{"6x86L-PR150+", CPU_Cx6x86L, 19, 120000000, 3, 30000000, 0x540, 0x540, 0x2231, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"6x86L-PR166+", CPU_Cx6x86L, 19, 133333333, 3, 33333333, 0x540, 0x540, 0x2231, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"6x86L-PR200+", CPU_Cx6x86L, 19, 150000000, 3, 37500000, 0x540, 0x540, 0x2231, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
/*Cyrix 6x86MX*/
{"6x86MX-PR166", CPU_Cx6x86MX, 18, 133333333, 3, 33333333, 0x600, 0x600, 0x0451, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"6x86MX-PR200", CPU_Cx6x86MX, 18, 166666666, 3, 33333333, 0x600, 0x600, 0x0452, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"6x86MX-PR233", CPU_Cx6x86MX, 18, 188888888, 3, 37500000, 0x600, 0x600, 0x0452, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"6x86MX-PR266", CPU_Cx6x86MX, 18, 207500000, 3, 41666667, 0x600, 0x600, 0x0452, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 17,17,7,7},
{"6x86MX-PR300", CPU_Cx6x86MX, 18, 233333333, 3, 33333333, 0x600, 0x600, 0x0454, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,7,7},
{"6x86MX-PR333", CPU_Cx6x86MX, 18, 250000000, 3, 41666667, 0x600, 0x600, 0x0453, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 20,20,9,9},
{"6x86MX-PR366", CPU_Cx6x86MX, 18, 250000000, 3, 33333333, 0x600, 0x600, 0x0452, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12},
{"6x86MX-PR400", CPU_Cx6x86MX, 18, 285000000, 3, 41666667, 0x600, 0x600, 0x0453, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_WinChip[] = {
/*IDT WinChip*/
{"WinChip 75", CPU_WINCHIP, 7, 75000000, 2, 25000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 8,8,4,4},
{"WinChip 90", CPU_WINCHIP, 9, 90000000, 2, 30000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 9,9,4,4},
{"WinChip 100", CPU_WINCHIP, 10, 100000000, 2, 33333333, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 9,9,4,4},
{"WinChip 120", CPU_WINCHIP, 11, 120000000, 2, 30000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 12,12,6,6},
{"WinChip 133", CPU_WINCHIP, 12, 133333333, 2, 33333333, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 12,12,6,6},
{"WinChip 150", CPU_WINCHIP, 13, 150000000, 3, 30000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 15,15,7,7},
{"WinChip 166", CPU_WINCHIP, 15, 166666666, 3, 33333333, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 15,15,7,7},
{"WinChip 180", CPU_WINCHIP, 16, 180000000, 3, 30000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9},
{"WinChip 200", CPU_WINCHIP, 17, 200000000, 3, 33333333, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9},
{"WinChip 225", CPU_WINCHIP, 17, 225000000, 3, 37500000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 18,18,9,9},
{"WinChip 240", CPU_WINCHIP, 17, 240000000, 6, 30000000, 0x540, 0x540, 0, CPU_SUPPORTS_DYNAREC, 24,24,12,12},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_Pentium5V[] = {
/*Intel Pentium (5V, socket 4)*/
{"Pentium 60", CPU_PENTIUM, 6, 60000000, 1, 30000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 6,6,3,3},
{"Pentium 66", CPU_PENTIUM, 6, 66666666, 1, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 6,6,3,3},
{"Pentium OverDrive 120",CPU_PENTIUM, 14, 120000000, 2, 30000000, 0x51A, 0x51A, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"Pentium OverDrive 133",CPU_PENTIUM, 16, 133333333, 2, 33333333, 0x51A, 0x51A, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_Pentium5V50[] = {
/*Intel Pentium (5V, socket 4, including 50 MHz FSB)*/
{"Pentium 50 (Q0399)",CPU_PENTIUM, 5, 50000000, 1, 25000000, 0x513, 0x513, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 4,4,3,3},
{"Pentium 60", CPU_PENTIUM, 6, 60000000, 1, 30000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 6,6,3,3},
{"Pentium 66", CPU_PENTIUM, 6, 66666666, 1, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 6,6,3,3},
{"Pentium OverDrive 100",CPU_PENTIUM, 13, 100000000, 2, 25000000, 0x51A, 0x51A, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 8,8,6,6},
{"Pentium OverDrive 120",CPU_PENTIUM, 14, 120000000, 2, 30000000, 0x51A, 0x51A, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"Pentium OverDrive 133",CPU_PENTIUM, 16, 133333333, 2, 33333333, 0x51A, 0x51A, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_PentiumS5[] = {
/*Intel Pentium (Socket 5)*/
{"Pentium 75", CPU_PENTIUM, 9, 75000000, 2, 25000000, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4},
{"Pentium OverDrive MMX 75",CPU_PENTIUMMMX,9,75000000,2,25000000,0x1542,0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4},
{"Pentium 90", CPU_PENTIUM, 12, 90000000, 2, 30000000, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
{"Pentium 100/50", CPU_PENTIUM, 13, 100000000, 2, 25000000, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,6,6},
{"Pentium 100/66", CPU_PENTIUM, 13, 100000000, 2, 33333333, 0x526, 0x526, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
{"Pentium 120", CPU_PENTIUM, 14, 120000000, 2, 30000000, 0x526, 0x526, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"Pentium OverDrive 125",CPU_PENTIUM,15, 125000000, 3, 25000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,7,7},
{"Pentium OverDrive 150",CPU_PENTIUM,17, 150000000, 3, 30000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium OverDrive 166",CPU_PENTIUM,17, 166666666, 3, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium OverDrive MMX 125", CPU_PENTIUMMMX,15,125000000, 3, 25000000, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,7,7},
{"Pentium OverDrive MMX 150/60", CPU_PENTIUMMMX,17,150000000, 3, 30000000, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium OverDrive MMX 166", CPU_PENTIUMMMX,19,166000000, 3, 33333333, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium OverDrive MMX 180", CPU_PENTIUMMMX,20,180000000, 3, 30000000, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"Pentium OverDrive MMX 200", CPU_PENTIUMMMX,21,200000000, 3, 33333333, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_Pentium[] = {
/*Intel Pentium*/
{"Pentium 75", CPU_PENTIUM, 9, 75000000, 2, 25000000, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4},
{"Pentium OverDrive MMX 75",CPU_PENTIUMMMX,9,75000000,2,25000000,0x1542,0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4},
{"Pentium 90", CPU_PENTIUM, 12, 90000000, 2, 30000000, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
{"Pentium 100/50", CPU_PENTIUM, 13, 100000000, 2, 25000000, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 10,10,6,6},
{"Pentium 100/66", CPU_PENTIUM, 13, 100000000, 2, 33333333, 0x526, 0x526, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
{"Pentium 120", CPU_PENTIUM, 14, 120000000, 2, 30000000, 0x526, 0x526, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"Pentium 133", CPU_PENTIUM, 16, 133333333, 2, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"Pentium 150", CPU_PENTIUM, 17, 150000000, 3, 30000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium 166", CPU_PENTIUM, 19, 166666666, 3, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium 200", CPU_PENTIUM, 21, 200000000, 3, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"Pentium MMX 166", CPU_PENTIUMMMX, 19, 166666666, 3, 33333333, 0x543, 0x543, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium MMX 200", CPU_PENTIUMMMX, 21, 200000000, 3, 33333333, 0x543, 0x543, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"Pentium MMX 233", CPU_PENTIUMMMX, 24, 233333333, 4, 33333333, 0x543, 0x543, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,10,10},
{"Mobile Pentium MMX 120", CPU_PENTIUMMMX, 14, 120000000, 2, 30000000, 0x543, 0x543, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"Mobile Pentium MMX 133", CPU_PENTIUMMMX, 16, 133333333, 2, 33333333, 0x543, 0x543, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"Mobile Pentium MMX 150", CPU_PENTIUMMMX, 17, 150000000, 3, 30000000, 0x544, 0x544, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Mobile Pentium MMX 166", CPU_PENTIUMMMX, 19, 166666666, 3, 33333333, 0x544, 0x544, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Mobile Pentium MMX 200", CPU_PENTIUMMMX, 21, 200000000, 3, 33333333, 0x581, 0x581, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"Mobile Pentium MMX 233", CPU_PENTIUMMMX, 24, 233333333, 4, 33333333, 0x581, 0x581, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,10,10},
{"Mobile Pentium MMX 266", CPU_PENTIUMMMX, 26, 266666666, 4, 33333333, 0x582, 0x582, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12},
{"Mobile Pentium MMX 300", CPU_PENTIUMMMX, 28, 300000000, 5, 33333333, 0x582, 0x582, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13},
{"Pentium OverDrive 125",CPU_PENTIUM,15, 125000000, 3, 25000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,7,7},
{"Pentium OverDrive 150",CPU_PENTIUM,17, 150000000, 3, 30000000, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium OverDrive 166",CPU_PENTIUM,17, 166666666, 3, 33333333, 0x52c, 0x52c, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium OverDrive MMX 125", CPU_PENTIUMMMX,15,125000000, 3, 25000000, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,7,7},
{"Pentium OverDrive MMX 150/60", CPU_PENTIUMMMX,17,150000000, 3, 30000000, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium OverDrive MMX 166", CPU_PENTIUMMMX,19,166000000, 3, 33333333, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium OverDrive MMX 180", CPU_PENTIUMMMX,20,180000000, 3, 30000000, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"Pentium OverDrive MMX 200", CPU_PENTIUMMMX,21,200000000, 3, 33333333, 0x1542, 0x1542, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_K5[] = {
/*AMD K5 (Socket 5)*/
{"K5 (5k86) 75 (P75)", CPU_K5, 9, 75000000, 2, 25000000, 0x500, 0x500, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4},
{"K5 (SSA/5) 75 (PR75)", CPU_K5, 9, 75000000, 2, 25000000, 0x501, 0x501, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4},
{"K5 (5k86) 90 (P90)", CPU_K5, 12, 90000000, 2, 30000000, 0x500, 0x500, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
{"K5 (SSA/5) 90 (PR90)", CPU_K5, 12, 90000000, 2, 30000000, 0x501, 0x501, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
{"K5 (5k86) 100 (P100)", CPU_K5, 13, 100000000, 2, 33333333, 0x500, 0x500, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
{"K5 (SSA/5) 100 (PR100)",CPU_K5, 13, 100000000, 2, 33333333, 0x501, 0x501, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
{"K5 (5k86) 90 (PR120)", CPU_5K86, 14, 120000000, 2, 30000000, 0x511, 0x511, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"K5 (5k86) 100 (PR133)", CPU_5K86, 16, 133333333, 2, 33333333, 0x514, 0x514, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"K5 (5k86) 105 (PR150)", CPU_5K86, 17, 150000000, 3, 30000000, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"K5 (5k86) 116.5 (PR166)",CPU_5K86, 19, 166666666,3, 33333333, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"K5 (5k86) 133 (PR200)", CPU_5K86, 21, 200000000, 3, 33333333, 0x534, 0x534, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_K56[] = {
/*AMD K5 and K6 (Socket 7)*/
{"K5 (5k86) 75 (P75)", CPU_K5, 9, 75000000, 2, 25000000, 0x500, 0x500, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4},
{"K5 (SSA/5) 75 (PR75)", CPU_K5, 9, 75000000, 2, 25000000, 0x501, 0x501, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4},
{"K5 (5k86) 90 (P90)", CPU_K5, 12, 90000000, 2, 30000000, 0x500, 0x500, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
{"K5 (SSA/5) 90 (PR90)", CPU_K5, 12, 90000000, 2, 30000000, 0x501, 0x501, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
{"K5 (5k86) 100 (P100)", CPU_K5, 13, 100000000, 2, 33333333, 0x500, 0x500, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
{"K5 (SSA/5) 100 (PR100)",CPU_K5, 13, 100000000, 2, 33333333, 0x501, 0x501, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 9,9,4,4},
{"K5 (5k86) 90 (PR120)", CPU_5K86, 14, 120000000, 2, 30000000, 0x511, 0x511, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"K5 (5k86) 100 (PR133)", CPU_5K86, 16, 133333333, 2, 33333333, 0x514, 0x514, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 12,12,6,6},
{"K5 (5k86) 105 (PR150)", CPU_5K86, 17, 150000000, 3, 30000000, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"K5 (5k86) 116.5 (PR166)",CPU_5K86, 19, 166666666,3, 33333333, 0x524, 0x524, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"K5 (5k86) 133 (PR200)", CPU_5K86, 21, 200000000, 3, 33333333, 0x534, 0x534, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"K6 (Model 6) 166", CPU_K6, 19, 166666666, 3, 33333333, 0x562, 0x562, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"K6 (Model 6) 200", CPU_K6, 21, 200000000, 3, 33333333, 0x562, 0x562, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"K6 (Model 6) 233", CPU_K6, 24, 233333333, 4, 33333333, 0x562, 0x562, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,10,10},
{"K6 (Model 7) 200", CPU_K6, 21, 200000000, 3, 33333333, 0x570, 0x570, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"K6 (Model 7) 233", CPU_K6, 24, 233333333, 4, 33333333, 0x570, 0x570, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,10,10},
{"K6 (Model 7) 266", CPU_K6, 26, 266666666, 4, 33333333, 0x570, 0x570, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12},
{"K6 (Model 7) 300", CPU_K6, 28, 300000000, 5, 33333333, 0x570, 0x570, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};
CPU cpus_PentiumPro[] = {
/*Intel Pentium Pro and II Overdrive*/
{"Pentium Pro 50", CPU_PENTIUMPRO, 5, 50000000, 1, 25000000, 0x612, 0x612, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 4,4,3,3},
{"Pentium Pro 60" , CPU_PENTIUMPRO, 6, 60000000, 1, 30000000, 0x612, 0x612, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 6,6,3,3},
{"Pentium Pro 66" , CPU_PENTIUMPRO, 6, 66666666, 1, 33333333, 0x612, 0x612, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 6,6,3,3},
{"Pentium Pro 75", CPU_PENTIUMPRO, 9, 75000000, 2, 25000000, 0x612, 0x612, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4},
{"Pentium Pro 150", CPU_PENTIUMPRO, 17, 150000000, 3, 30000000, 0x612, 0x612, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium Pro 166", CPU_PENTIUMPRO, 19, 166666666, 3, 33333333, 0x617, 0x617, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 15,15,7,7},
{"Pentium Pro 180", CPU_PENTIUMPRO, 20, 180000000, 3, 30000000, 0x617, 0x617, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"Pentium Pro 200", CPU_PENTIUMPRO, 21, 200000000, 3, 33333333, 0x617, 0x617, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 18,18,9,9},
{"Pentium II Overdrive 50", CPU_PENTIUM2D, 5, 50000000, 1, 25000000, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 4,4,3,3},
{"Pentium II Overdrive 60", CPU_PENTIUM2D, 6, 60000000, 1, 30000000, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 6,6,3,3},
{"Pentium II Overdrive 66", CPU_PENTIUM2D, 6, 66666666, 1, 33333333, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 6,6,3,3},
{"Pentium II Overdrive 75", CPU_PENTIUM2D, 9, 75000000, 2, 25000000, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 7,7,4,4},
{"Pentium II Overdrive 210", CPU_PENTIUM2D, 22, 210000000, 4, 30000000, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 17,17,7,7},
{"Pentium II Overdrive 233", CPU_PENTIUM2D, 24, 233333333, 4, 33333333, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 21,21,10,1},
{"Pentium II Overdrive 240", CPU_PENTIUM2D, 25, 240000000, 4, 30000000, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12},
{"Pentium II Overdrive 266", CPU_PENTIUM2D, 26, 266666666, 4, 33333333, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 24,24,12,12},
{"Pentium II Overdrive 270", CPU_PENTIUM2D, 27, 270000000, 5, 30000000, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 25,25,12,12},
{"Pentium II Overdrive 300/66",CPU_PENTIUM2D, 28, 300000000, 5, 33333333, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 25,25,12,12},
{"Pentium II Overdrive 300/60",CPU_PENTIUM2D, 28, 300000000, 5, 30000000, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13},
{"Pentium II Overdrive 333", CPU_PENTIUM2D, 29, 333333333, 5, 33333333, 0x1632, 0x1632, 0, CPU_SUPPORTS_DYNAREC | CPU_REQUIRES_DYNAREC, 27,27,13,13},
{"", -1, 0, 0, 0, 0, 0, 0, 0, 0, 0,0,0,0}
};

View File

@@ -8,7 +8,7 @@
*
* x86 CPU segment emulation.
*
* Version: @(#)x86seg.c 1.0.4 2017/10/16
* Version: @(#)x86seg.c 1.0.5 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -23,13 +23,12 @@
#include <stdarg.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "cpu.h"
#include "../mem.h"
#include "../nvr.h"
#include "x86.h"
#include "386.h"
#include "386_common.h"
#include "cpu.h"
/*Controls whether the accessed bit in a descriptor is set when CS is loaded.*/

View File

@@ -5,7 +5,7 @@
#define fplog 0
#include <math.h>
#include "../86box.h"
#include "../ibm.h"
#include "cpu.h"
#include "../mem.h"
#include "../pic.h"
#include "x86.h"

View File

@@ -9,7 +9,7 @@
* Implementation of the generic device interface to handle
* all devices attached to the emulator.
*
* Version: @(#)device.c 1.0.5 2017/10/16
* Version: @(#)device.c 1.0.7 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -22,7 +22,6 @@
#include <string.h>
#include <wchar.h>
#include "86box.h"
#include "ibm.h"
#include "cpu/cpu.h"
#include "config.h"
#include "device.h"
@@ -49,13 +48,18 @@ void *
device_add(device_t *d)
{
void *priv = NULL;
int c = 0;
int c;
while (devices[c] != NULL && c < 256)
c++;
for (c=0; c<256; c++) {
if (devices[c] == d) {
fatal("device_add: device already exists!\n");
break;
}
if (devices[c] == NULL) break;
}
if (c >= DEVICE_MAX)
fatal("device_add: too many devices\n");
device_current = d;
if (d->init != NULL) {
@@ -71,6 +75,29 @@ device_add(device_t *d)
}
/* For devices that do not have an init function (internal video etc.) */
void
device_add_ex(device_t *d, void *priv)
{
int c;
for (c=0; c<256; c++) {
if (devices[c] == d) {
fatal("device_add: device already exists!\n");
break;
}
if (devices[c] == NULL) break;
}
if (c >= DEVICE_MAX)
fatal("device_add: too many devices\n");
device_current = d;
devices[c] = d;
device_priv[c] = priv;
}
void
device_close_all(void)
{
@@ -369,7 +396,7 @@ device_is_valid(device_t *device, int machine_flags)
return 0;
}
if ((device->flags & DEVICE_PS2) && !(machine_flags & MACHINE_PS2_HDD)) {
if ((device->flags & DEVICE_PS2) && !(machine_flags & MACHINE_HDC_PS2)) {
return 0;
}

View File

@@ -9,7 +9,7 @@
* Implementation of the generic device interface to handle
* all devices attached to the emulator.
*
* Version: @(#)device.h 1.0.4 2017/10/15
* Version: @(#)device.h 1.0.5 2017/11/03
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -99,6 +99,7 @@ extern "C" {
extern void device_init(void);
extern void *device_add(device_t *d);
extern void device_add_ex(device_t *d, void *priv);
extern void device_close_all(void);
extern void device_reset_all(void);
extern void *device_get_priv(device_t *d);

View File

@@ -8,7 +8,7 @@
*
* Common code to handle all sorts of disk controllers.
*
* Version: @(#)hdc.c 1.0.5 2017/11/01
* Version: @(#)hdc.c 1.0.6 2017/11/04
*
* Authors: Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>
@@ -143,7 +143,7 @@ void
hdc_reset(void)
{
pclog("HDC: reset(current=%d, internal=%d)\n",
hdc_current, (machines[machine].flags & MACHINE_HAS_HDC)?1:0);
hdc_current, (machines[machine].flags & MACHINE_HDC)?1:0);
/* If we have a valid controller, add its device. */
if (hdc_current > 1)

View File

@@ -8,7 +8,7 @@
*
* Driver for the ESDI controller (WD1007-vse1) for PC/AT.
*
* Version: @(#)hdc_esdi_at.c 1.0.6 2017/10/26
* Version: @(#)hdc_esdi_at.c 1.0.7 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -27,7 +27,6 @@
#include <stdlib.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../device.h"
#include "../io.h"
#include "../mem.h"

View File

@@ -52,7 +52,7 @@
* however, are auto-configured by the system software as
* shown above.
*
* Version: @(#)hdc_esdi_mca.c 1.0.7 2017/10/16
* Version: @(#)hdc_esdi_mca.c 1.0.8 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Fred N. van Kempen, <decwiz@yahoo.com>
@@ -66,7 +66,6 @@
#include <stdlib.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../device.h"
#include "../dma.h"
#include "../io.h"

View File

@@ -9,7 +9,7 @@
* Implementation of the IDE emulation for hard disks and ATAPI
* CD-ROM devices.
*
* Version: @(#)hdc_ide.c 1.0.18 2017/11/01
* Version: @(#)hdc_ide.c 1.0.19 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -27,7 +27,7 @@
#include <inttypes.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../cpu/cpu.h"
#include "../machine/machine.h"
#include "../io.h"
#include "../pic.h"
@@ -832,7 +832,7 @@ void writeide(int ide_board, uint16_t addr, uint8_t val)
IDE *ide = &ide_drives[cur_ide[ide_board]];
IDE *ide_other = &ide_drives[cur_ide[ide_board] ^ 1];
ide_log("WriteIDE %04X %02X from %04X(%08X):%08X %i\n", addr, val, CS, cs, cpu_state.pc, ins);
ide_log("WriteIDE %04X %02X from %04X(%08X):%08X\n", addr, val, CS, cs, cpu_state.pc);
addr|=0x90;
addr&=0xFFF7;

View File

@@ -12,7 +12,7 @@
* based design. Most cards were WD1003-WA2 or -WAH, where the
* -WA2 cards had a floppy controller as well (to save space.)
*
* Version: @(#)hdd_mfm_at.c 1.0.10 2017/10/26
* Version: @(#)hdd_mfm_at.c 1.0.11 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Fred N. van Kempen, <decwiz@yahoo.com>
@@ -29,7 +29,6 @@
#include <stdlib.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../device.h"
#include "../io.h"
#include "../pic.h"

View File

@@ -41,7 +41,7 @@
* Since all controllers (including the ones made by DTC) use
* (mostly) the same API, we keep them all in this module.
*
* Version: @(#)hdd_mfm_xt.c 1.0.11 2017/10/26
* Version: @(#)hdc_mfm_xt.c 1.0.12 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Fred N. van Kempen, <decwiz@yahoo.com>
@@ -58,7 +58,6 @@
#include <stdlib.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../device.h"
#include "../dma.h"
#include "../io.h"

View File

@@ -21,7 +21,7 @@
* already on their way out, the newer IDE standard based on the
* PC/AT controller and 16b design became the IDE we now know.
*
* Version: @(#)hdc_xtide.c 1.0.9 2017/10/16
* Version: @(#)hdc_xtide.c 1.0.10 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -37,7 +37,6 @@
#include <stdlib.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../io.h"
#include "../mem.h"
#include "../rom.h"

View File

@@ -8,7 +8,7 @@
*
* Implementation of the Intel DMA controllers.
*
* Version: @(#)dma.c 1.0.5 2017/11/01
* Version: @(#)dma.c 1.0.6 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -21,7 +21,7 @@
#include <string.h>
#include <wchar.h>
#include "86box.h"
#include "ibm.h"
#include "cpu/cpu.h"
#include "cpu/x86.h"
#include "machine/machine.h"
#include "mem.h"

View File

@@ -9,7 +9,7 @@
* Implementation of the NEC uPD-765 and compatible floppy disk
* controller.
*
* Version: @(#)fdc.c 1.0.7 2017/11/01
* Version: @(#)fdc.c 1.0.8 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -23,7 +23,7 @@
#include <stdarg.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../cpu/cpu.h"
#include "../machine/machine.h"
#include "../io.h"
#include "../mem.h"

View File

@@ -8,7 +8,7 @@
*
* Implementation of the floppy drive emulation.
*
* Version: @(#)fdd.c 1.0.4 2017/10/16
* Version: @(#)fdd.c 1.0.5 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -21,7 +21,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
//#include "../ibm.h"
#include "floppy.h"
#include "fdc.h"
#include "fdd.h"

View File

@@ -31,7 +31,6 @@
/* ELSE */
#define xmalloc malloc
#include "../86box.h"
//#include "../ibm.h"
#include "fdi2raw.h"

View File

@@ -9,7 +9,7 @@
* Generic floppy disk interface that communicates with the
* other handlers.
*
* Version: @(#)floppy.c 1.0.11 2017/11/01
* Version: @(#)floppy.c 1.0.12 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -22,7 +22,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../machine/machine.h"
#include "../mem.h"
#include "../rom.h"

View File

@@ -9,7 +9,7 @@
* Generic floppy disk interface that communicates with the
* other handlers.
*
* Version: @(#)floppy.h 1.0.5 2017/11/01
* Version: @(#)floppy.h 1.0.6 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -42,6 +42,7 @@ extern DRIVE drives[FDD_NUM];
extern wchar_t floppyfns[FDD_NUM][512];
extern int driveempty[FDD_NUM];
extern int64_t floppy_poll_time[FDD_NUM];
extern int ui_writeprot[FDD_NUM];
extern int curdrive;

View File

@@ -10,7 +10,7 @@
* data in the form of FM/MFM-encoded transitions) which also
* forms the core of the emulator's floppy disk emulation.
*
* Version: @(#)floppy_86f.c 1.0.10 2017/11/01
* Version: @(#)floppy_86f.c 1.0.11 2017/11/04
*
* Author: Miran Grca, <mgrca8@gmail.com>
* Copyright 2016,2017 Miran Grca.
@@ -24,7 +24,6 @@
#include <wchar.h>
#include "../lzf/lzf.h"
#include "../86box.h"
#include "../ibm.h"
#include "../config.h"
#include "../dma.h"
#include "../nvr.h"

View File

@@ -8,7 +8,7 @@
*
* Shared code for all the floppy modules.
*
* Version: @(#)floppy_common.c 1.0.3 2017/10/16
* Version: @(#)floppy_common.c 1.0.4 2017/11/04
*
* Author: Fred N. van Kempen, <decwiz@yahoo.com>
* Copyright 2017 Fred N. van Kempen.
@@ -19,7 +19,6 @@
#include <stdlib.h>
#include <wchar.h>
#include "../86box.h"
//#include "../ibm.h"
#include "../floppy/floppy.h"
#include "floppy_common.h"

View File

@@ -9,7 +9,7 @@
* Implementation of the FDI floppy stream image format
* interface to the FDI2RAW module.
*
* Version: @(#)floppy_fdi.c 1.0.4 2017/10/16
* Version: @(#)floppy_fdi.c 1.0.5 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -22,7 +22,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
//#include "../ibm.h"
#include "../plat.h"
#include "floppy.h"
#include "floppy_86f.h"

View File

@@ -8,7 +8,7 @@
*
* Implementation of the IMD floppy image format.
*
* Version: @(#)floppy_imd.c 1.0.4 2017/10/16
* Version: @(#)floppy_imd.c 1.0.5 2017/11/04
*
* Author: Miran Grca, <mgrca8@gmail.com>
* Copyright 2016,2017 Miran Grca.
@@ -19,7 +19,6 @@
#include <stdlib.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../plat.h"
#include "floppy.h"
#include "floppy_imd.h"

View File

@@ -9,7 +9,7 @@
* Implementation of the raw sector-based floppy image format,
* as well as the Japanese FDI, CopyQM, and FDF formats.
*
* Version: @(#)floppy_img.c 1.0.6 2017/11/01
* Version: @(#)floppy_img.c 1.0.7 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -23,7 +23,6 @@
#include <stdlib.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../config.h"
#include "../plat.h"
#include "floppy.h"

View File

@@ -8,7 +8,7 @@
*
* Implementation of the PCjs JSON floppy image format.
*
* Version: @(#)floppy_json.c 1.0.8 2017/10/16
* Version: @(#)floppy_json.c 1.0.9 2017/11/04
*
* Author: Fred N. van Kempen, <decwiz@yahoo.com>
*
@@ -20,7 +20,6 @@
#include <stdlib.h>
#include <wchar.h>
#include "../86box.h"
//#include "../ibm.h"
#include "../plat.h"
#include "floppy.h"
#include "fdc.h"

View File

@@ -8,7 +8,7 @@
*
* Implementation of the Teledisk floppy image format.
*
* Version: @(#)floppy_td0.c 1.0.5 2017/10/16
* Version: @(#)floppy_td0.c 1.0.6 2017/11/04
*
* Authors: Milodrag Milanovic,
* Haruhiko OKUMURA,
@@ -43,7 +43,6 @@
#include <stdlib.h>
#include <wchar.h>
#include "../86box.h"
//#include "../ibm.h"
#include "../plat.h"
#include "floppy.h"
#include "floppy_td0.h"

View File

@@ -7,7 +7,6 @@
#include <stdlib.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../machine/machine.h"
#include "../cpu/cpu.h"
#include "../device.h"

View File

@@ -4,7 +4,6 @@
#include <stdlib.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../device.h"
#include "../timer.h"
#include "../plat_joystick.h"

View File

@@ -4,7 +4,6 @@
#include <stdlib.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../device.h"
#include "../timer.h"
#include "../plat_joystick.h"

View File

@@ -25,7 +25,6 @@
#include <stdlib.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../device.h"
#include "../timer.h"
#include "../plat_joystick.h"

View File

@@ -4,7 +4,6 @@
#include <stdlib.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../device.h"
#include "../timer.h"
#include "../plat_joystick.h"

View File

@@ -4,7 +4,6 @@
#include <stdint.h>
#include <string.h>
#include <wchar.h>
#include "ibm.h"
#include "io.h"
#include "mem.h"

434
src/ibm.h
View File

@@ -1,434 +0,0 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* General include file.
*
* !!!NOTE!!! The goal is to GET RID of this file. Do NOT add stuff !!
*
* Version: @(#)ibm.h 1.0.12 2017/11/01
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016,2017 Miran Grca.
*/
#ifndef EMU_IBM_H
# define EMU_IBM_H
/*Processor*/
typedef union {
uint32_t l;
uint16_t w;
struct {
uint8_t l,
h;
} b;
} x86reg;
typedef struct {
uint32_t base;
uint32_t limit;
uint8_t access;
uint16_t seg;
uint32_t limit_low,
limit_high;
int checked; /*Non-zero if selector is known to be valid*/
} x86seg;
typedef union MMX_REG {
uint64_t q;
int64_t sq;
uint32_t l[2];
int32_t sl[2];
uint16_t w[4];
int16_t sw[4];
uint8_t b[8];
int8_t sb[8];
} MMX_REG;
struct _cpustate_ {
x86reg regs[8];
uint8_t tag[8];
x86seg *ea_seg;
uint32_t eaaddr;
int flags_op;
uint32_t flags_res;
uint32_t flags_op1,
flags_op2;
uint32_t pc;
uint32_t oldpc;
uint32_t op32;
int TOP;
union {
struct {
int8_t rm,
mod,
reg;
} rm_mod_reg;
int32_t rm_mod_reg_data;
} rm_data;
int8_t ssegs;
int8_t ismmx;
int8_t abrt;
int _cycles;
int cpu_recomp_ins;
uint16_t npxs,
npxc;
double ST[8];
uint16_t MM_w4[8];
MMX_REG MM[8];
uint16_t old_npxc,
new_npxc;
uint32_t last_ea;
} cpu_state;
#define EAX cpu_state.regs[0].l
#define AX cpu_state.regs[0].w
#define AL cpu_state.regs[0].b.l
#define AH cpu_state.regs[0].b.h
#define ECX cpu_state.regs[1].l
#define CX cpu_state.regs[1].w
#define CL cpu_state.regs[1].b.l
#define CH cpu_state.regs[1].b.h
#define EDX cpu_state.regs[2].l
#define DX cpu_state.regs[2].w
#define DL cpu_state.regs[2].b.l
#define DH cpu_state.regs[2].b.h
#define EBX cpu_state.regs[3].l
#define BX cpu_state.regs[3].w
#define BL cpu_state.regs[3].b.l
#define BH cpu_state.regs[3].b.h
#define ESP cpu_state.regs[4].l
#define EBP cpu_state.regs[5].l
#define ESI cpu_state.regs[6].l
#define EDI cpu_state.regs[7].l
#define SP cpu_state.regs[4].w
#define BP cpu_state.regs[5].w
#define SI cpu_state.regs[6].w
#define DI cpu_state.regs[7].w
#define cycles cpu_state._cycles
#define cpu_rm cpu_state.rm_data.rm_mod_reg.rm
#define cpu_mod cpu_state.rm_data.rm_mod_reg.mod
#define cpu_reg cpu_state.rm_data.rm_mod_reg.reg
extern uint32_t cpu_cur_status;
#define CPU_STATUS_USE32 (1 << 0)
#define CPU_STATUS_STACK32 (1 << 1)
#define CPU_STATUS_FLATDS (1 << 2)
#define CPU_STATUS_FLATSS (1 << 3)
#ifdef __MSC__
# define COMPILE_TIME_ASSERT(expr) /*nada*/
#else
# define COMPILE_TIME_ASSERT(expr) typedef char COMP_TIME_ASSERT[(expr) ? 1 : 0];
#endif
COMPILE_TIME_ASSERT(sizeof(cpu_state) <= 128)
#define cpu_state_offset(MEMBER) ((uint8_t)((uintptr_t)&cpu_state.MEMBER - (uintptr_t)&cpu_state - 128))
/*x86reg regs[8];*/
extern uint16_t flags,eflags;
extern uint32_t oldds,oldss,olddslimit,oldsslimit,olddslimitw,oldsslimitw;
extern int ins,output;
extern int cycdiff;
extern x86seg gdt,ldt,idt,tr;
extern x86seg _cs,_ds,_es,_ss,_fs,_gs;
extern x86seg _oldds;
extern uint32_t pccache;
extern uint8_t *pccache2;
/*Segments -
_cs,_ds,_es,_ss are the segment structures
CS,DS,ES,SS is the 16-bit data
cs,ds,es,ss are defines to the bases*/
#define CS _cs.seg
#define DS _ds.seg
#define ES _es.seg
#define SS _ss.seg
#define FS _fs.seg
#define GS _gs.seg
#define cs _cs.base
#define ds _ds.base
#define es _es.base
#define ss _ss.base
#define seg_fs _fs.base
#define gs _gs.base
#define CPL ((_cs.access>>5)&3)
void loadseg(uint16_t seg, x86seg *s);
void loadcs(uint16_t seg);
union _cr0_
{
uint32_t l;
uint16_t w;
} CR0;
#define cr0 CR0.l
#define msw CR0.w
extern uint32_t cr2, cr3, cr4;
extern uint32_t dr[8];
#define C_FLAG 0x0001
#define P_FLAG 0x0004
#define A_FLAG 0x0010
#define Z_FLAG 0x0040
#define N_FLAG 0x0080
#define T_FLAG 0x0100
#define I_FLAG 0x0200
#define D_FLAG 0x0400
#define V_FLAG 0x0800
#define NT_FLAG 0x4000
#define VM_FLAG 0x0002 /*In EFLAGS*/
#define VIF_FLAG 0x0008 /*In EFLAGS*/
#define VIP_FLAG 0x0010 /*In EFLAGS*/
#define WP_FLAG 0x10000 /*In CR0*/
#define CR4_VME (1 << 0)
#define CR4_PVI (1 << 1)
#define CR4_PSE (1 << 4)
#define IOPL ((flags>>12)&3)
#define IOPLp ((!(msw&1)) || (CPL<=IOPL))
extern int cycles_lost;
extern uint8_t opcode;
extern int insc;
extern int fpucount;
extern float mips,flops;
extern int clockrate;
extern int cgate16;
extern int CPUID;
extern int cpl_override;
extern int is286, is386, is486;
extern int is_rapidcad, is_pentium;
extern int hasfpu;
extern int cpuspeed;
#define MDA ((gfxcard==GFX_MDA || gfxcard==GFX_HERCULES || gfxcard==GFX_HERCULESPLUS || gfxcard==GFX_INCOLOR || gfxcard==GFX_GENIUS) && (romset<ROM_TANDY || romset>=ROM_IBMAT))
#define VGA ((gfxcard>=GFX_TVGA) && gfxcard!=GFX_COLORPLUS && gfxcard!=GFX_INCOLOR && gfxcard!=GFX_WY700 && gfxcard!=GFX_GENIUS && gfxcard!=GFX_COMPAQ_EGA && gfxcard!=GFX_SUPER_EGA && gfxcard!=GFX_HERCULESPLUS && romset!=ROM_PC1640 && romset!=ROM_PC1512 && romset!=ROM_TANDY && romset!=ROM_PC200)
enum
{
GFX_CGA = 0,
GFX_MDA,
GFX_HERCULES,
GFX_EGA, /*Using IBM EGA BIOS*/
GFX_TVGA, /*Using Trident TVGA8900D BIOS*/
GFX_ET4000, /*Tseng ET4000*/
GFX_ET4000W32_VLB, /*Tseng ET4000/W32p (Diamond Stealth 32) VLB*/
GFX_ET4000W32_PCI, /*Tseng ET4000/W32p (Diamond Stealth 32) PCI*/
GFX_BAHAMAS64_VLB, /*S3 Vision864 (Paradise Bahamas 64) VLB*/
GFX_BAHAMAS64_PCI, /*S3 Vision864 (Paradise Bahamas 64) PCI*/
GFX_N9_9FX_VLB, /*S3 764/Trio64 (Number Nine 9FX) VLB*/
GFX_N9_9FX_PCI, /*S3 764/Trio64 (Number Nine 9FX) PCI*/
GFX_VIRGE_VLB, /*S3 Virge VLB*/
GFX_VIRGE_PCI, /*S3 Virge PCI*/
GFX_TGUI9440_VLB, /*Trident TGUI9440 VLB*/
GFX_TGUI9440_PCI, /*Trident TGUI9440 PCI*/
GFX_VGA, /*IBM VGA*/
GFX_VGAEDGE16, /*ATI VGA Edge-16 (18800-1)*/
GFX_VGACHARGER, /*ATI VGA Charger (28800-5)*/
GFX_OTI067, /*Oak OTI-067*/
GFX_MACH64GX_VLB, /*ATI Graphics Pro Turbo (Mach64) VLB*/
GFX_MACH64GX_PCI, /*ATI Graphics Pro Turbo (Mach64) PCI*/
GFX_CL_GD5429, /*Cirrus Logic CL-GD5429*/
GFX_VIRGEDX_VLB, /*S3 Virge/DX VLB*/
GFX_VIRGEDX_PCI, /*S3 Virge/DX PCI*/
GFX_PHOENIX_TRIO32_VLB, /*S3 732/Trio32 (Phoenix) VLB*/
GFX_PHOENIX_TRIO32_PCI, /*S3 732/Trio32 (Phoenix) PCI*/
GFX_PHOENIX_TRIO64_VLB, /*S3 764/Trio64 (Phoenix) VLB*/
GFX_PHOENIX_TRIO64_PCI, /*S3 764/Trio64 (Phoenix) PCI*/
GFX_INCOLOR, /*Hercules InColor*/
GFX_COLORPLUS, /*Plantronics ColorPlus*/
GFX_WY700, /*Wyse 700*/
GFX_GENIUS, /*MDSI Genius*/
GFX_MACH64VT2, /*ATI Mach64 VT2*/
GFX_COMPAQ_EGA, /*Compaq EGA*/
GFX_SUPER_EGA, /*Using Chips & Technologies SuperEGA BIOS*/
GFX_COMPAQ_VGA, /*Compaq/Paradise VGA*/
GFX_CL_GD5446, /*Cirrus Logic CL-GD5446*/
GFX_VGAWONDERXL, /*Compaq ATI VGA Wonder XL (28800-5)*/
GFX_WD90C11, /*Paradise WD90C11 Standalone*/
GFX_OTI077, /*Oak OTI-077*/
GFX_VGAWONDERXL24, /*Compaq ATI VGA Wonder XL24 (28800-6)*/
GFX_STEALTH64_VLB, /*S3 Vision864 (Diamond Stealth 64) VLB*/
GFX_STEALTH64_PCI, /*S3 Vision864 (Diamond Stealth 64) PCI*/
GFX_PHOENIX_VISION864_VLB, /*S3 Vision864 (Phoenix) VLB*/
GFX_PHOENIX_VISION864_PCI, /*S3 Vision864 (Phoenix) PCI*/
GFX_RIVATNT, /*nVidia Riva TNT*/
GFX_RIVATNT2, /*nVidia Riva TNT2*/
GFX_RIVA128, /*nVidia Riva 128*/
GFX_HERCULESPLUS,
GFX_VIRGEVX_VLB, /*S3 Virge/VX VLB*/
GFX_VIRGEVX_PCI, /*S3 Virge/VX PCI*/
GFX_VIRGEDX4_VLB, /*S3 Virge/DX (VBE 2.0) VLB*/
GFX_VIRGEDX4_PCI, /*S3 Virge/DX (VBE 2.0) PCI*/
GFX_OTI037, /*Oak OTI-037*/
GFX_TRIGEM_UNK, /*Unknown TriGem graphics card with Hangeul ROM*/
GFX_MIRO_VISION964, /*S3 Vision964 (Miro Crystal)*/
GFX_CL_GD5422, /*Cirrus Logic CL-GD5422*/
GFX_CL_GD5430, /*Cirrus Logic CL-GD5430*/
GFX_CL_GD5434, /*Cirrus Logic CL-GD5434*/
GFX_CL_GD5436, /*Cirrus Logic CL-GD5436*/
GFX_CL_GD5440, /*Cirrus Logic CL-GD5440*/
GFX_MAX
};
extern int gfx_present[GFX_MAX];
/*Video*/
extern int egareads,egawrites;
extern int changeframecount;
/*Sound*/
#define SOUNDBUFLEN (48000/50)
extern int ppispeakon;
extern int gated,speakval,speakon;
/*Sound Blaster*/
#define SADLIB 1 /*No DSP*/
#define SB1 2 /*DSP v1.05*/
#define SB15 3 /*DSP v2.00*/
#define SB2 4 /*DSP v2.01 - needed for high-speed DMA*/
#define SBPRO 5 /*DSP v3.00*/
#define SBPRO2 6 /*DSP v3.02 + OPL3*/
#define SB16 7 /*DSP v4.05 + OPL3*/
#define SADGOLD 8 /*AdLib Gold*/
#define SND_WSS 9 /*Windows Sound System*/
#define SND_PAS16 10 /*Pro Audio Spectrum 16*/
/*CD-ROM*/
extern int64_t idecallback[5];
extern uint32_t SCSIGetCDVolume(int channel);
extern uint32_t SCSIGetCDChannel(int channel);
#define MIN(a, b) ((a) < (b) ? (a) : (b))
#define ELEMENTS(Array) (sizeof(Array) / sizeof((Array)[0]))
extern int ui_writeprot[4];
extern int nmi;
extern int nmi_auto_clear;
extern float isa_timing, bus_timing;
extern uint64_t pmc[2];
extern uint16_t temp_seg_data[4];
extern uint16_t cs_msr;
extern uint32_t esp_msr;
extern uint32_t eip_msr;
/* For the AMD K6. */
extern uint64_t star;
#define FPU_CW_Reserved_Bits (0xe0c0)
extern int mem_a20_state;
typedef struct PCI_RESET
{
void (*pci_master_reset)(void);
void (*pci_set_reset)(void);
void (*super_io_reset)(void);
} PCI_RESET;
extern PCI_RESET pci_reset_handler;
extern void trc_init(void);
uint32_t svga_color_transform(uint32_t color);
/* Function prototypes. */
#ifdef __cplusplus
extern "C" {
#endif
extern int checkio(int port);
extern void codegen_block_end(void);
extern void codegen_reset(void);
extern void cpu_set_edx(void);
extern int divl(uint32_t val);
extern void dumpregs(int __force);
extern void exec386(int cycs);
extern void exec386_dynarec(int cycs);
extern void execx86(int cycs);
extern void flushmmucache(void);
extern void flushmmucache_cr3(void);
extern int idivl(int32_t val);
extern void loadcscall(uint16_t seg);
extern void loadcsjmp(uint16_t seg, uint32_t oxpc);
extern void mmu_invalidate(uint32_t addr);
extern void pmodeint(int num, int soft);
extern void pmoderetf(int is32, uint16_t off);
extern void pmodeiret(int is32);
extern void port_92_clear_reset(void);
extern uint8_t readdacfifo(void);
extern void refreshread(void);
extern void resetmcr(void);
extern void resetreadlookup(void);
extern void resetx86(void);
extern void softresetx86(void);
extern void x86_int_sw(int num);
extern int x86_int_sw_rm(int num);
extern void x86gpf(char *s, uint16_t error);
extern void x86np(char *s, uint16_t error);
extern void x86ss(char *s, uint16_t error);
extern void x86ts(char *s, uint16_t error);
extern void x87_dumpregs(void);
extern void x87_reset(void);
#ifdef __cplusplus
}
#endif
#endif /*EMU_IBM_H*/

View File

@@ -5,7 +5,6 @@
#include <stdint.h>
#include <string.h>
#include <wchar.h>
#include "ibm.h"
#include "cpu/cpu.h"
#include "machine/machine.h"
#include "io.h"

View File

@@ -8,7 +8,7 @@
*
* Implementation of the Intel 2 Mbit 8-bit flash devices.
*
* Version: @(#)intel_flash.c 1.0.10 2017/10/25
* Version: @(#)intel_flash.c 1.0.11 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -22,7 +22,6 @@
#include <stdlib.h>
#include <wchar.h>
#include "86box.h"
#include "ibm.h"
#include "cpu/cpu.h"
#include "device.h"
#include "mem.h"

View File

@@ -6,10 +6,11 @@
*
* Emulation of Intel System I/O PCI chip.
*
* Version: @(#)intel_sio.c 1.0.6 2017/09/24
* Version: @(#)intel_sio.c 1.0.7 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016,2017 Miran Grca.
*/
@@ -17,7 +18,7 @@
#include <stdint.h>
#include <string.h>
#include <wchar.h>
#include "ibm.h"
#include "cpu/cpu.h"
#include "io.h"
#include "dma.h"
#include "mem.h"

View File

@@ -6,15 +6,17 @@
*
* This file is part of the 86Box distribution.
*
* Host to guest keyboard interface and keyboard scan code sets.
* General keyboard driver interface.
*
* Version: @(#)keyboard.c 1.0.8 2017/11/01
* Version: @(#)keyboard.c 1.0.9 2017/11/03
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>
*
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016,2017 Miran Grca.
* Copyright 2017 Fred N. van Kempen.
*/
#include <stdio.h>
#include <stdint.h>
@@ -25,422 +27,58 @@
#include "keyboard.h"
#if 0
int keybsendcallback = 0;
#endif
int64_t keybsenddelay;
/* bit 0 = repeat, bit 1 = makes break code? */
uint8_t keyboard_set3_flags[272];
uint8_t keyboard_set3_all_repeat;
uint8_t keyboard_set3_all_break;
void (*keyboard_send)(uint8_t val);
void (*keyboard_poll)(void);
int keyboard_scan;
int64_t keyboard_delay;
int keyboard_scan;
void (*keyboard_send)(uint8_t val);
static int recv_key[272]; /* keyboard input buffer */
static int recv_key[272]; /* keyboard input buffer */
static int oldkey[272];
static int keydelay[272];
static scancode *scan_table; /* scancode table for keyboard */
typedef struct {
int scancodes_make[9];
int scancodes_break[9];
} scancode;
/*272 = 256 + 16 fake interim scancodes for disambiguation purposes.*/
static scancode scancode_set1[272] =
{
{ {-1}, {-1} }, { {0x01, -1}, {0x81, -1} }, { {0x02, -1}, {0x82, -1} }, { {0x03, -1}, {0x83, -1} },
{ {0x04, -1}, {0x84, -1} }, { {0x05, -1}, {0x85, -1} }, { {0x06, -1}, {0x86, -1} }, { {0x07, -1}, {0x87, -1} },
{ {0x08, -1}, {0x88, -1} }, { {0x09, -1}, {0x89, -1} }, { {0x0a, -1}, {0x8a, -1} }, { {0x0b, -1}, {0x8b, -1} },
{ {0x0c, -1}, {0x8c, -1} }, { {0x0d, -1}, {0x8d, -1} }, { {0x0e, -1}, {0x8e, -1} }, { {0x0f, -1}, {0x8f, -1} },
{ {0x10, -1}, {0x90, -1} }, { {0x11, -1}, {0x91, -1} }, { {0x12, -1}, {0x92, -1} }, { {0x13, -1}, {0x93, -1} },
{ {0x14, -1}, {0x94, -1} }, { {0x15, -1}, {0x95, -1} }, { {0x16, -1}, {0x96, -1} }, { {0x17, -1}, {0x97, -1} },
{ {0x18, -1}, {0x98, -1} }, { {0x19, -1}, {0x99, -1} }, { {0x1a, -1}, {0x9a, -1} }, { {0x1b, -1}, {0x9b, -1} },
{ {0x1c, -1}, {0x9c, -1} }, { {0x1d, -1}, {0x9d, -1} }, { {0x1e, -1}, {0x9e, -1} }, { {0x1f, -1}, {0x9f, -1} },
{ {0x20, -1}, {0xa0, -1} }, { {0x21, -1}, {0xa1, -1} }, { {0x22, -1}, {0xa2, -1} }, { {0x23, -1}, {0xa3, -1} },
{ {0x24, -1}, {0xa4, -1} }, { {0x25, -1}, {0xa5, -1} }, { {0x26, -1}, {0xa6, -1} }, { {0x27, -1}, {0xa7, -1} },
{ {0x28, -1}, {0xa8, -1} }, { {0x29, -1}, {0xa9, -1} }, { {0x2a, -1}, {0xaa, -1} }, { {0x2b, -1}, {0xab, -1} },
{ {0x2c, -1}, {0xac, -1} }, { {0x2d, -1}, {0xad, -1} }, { {0x2e, -1}, {0xae, -1} }, { {0x2f, -1}, {0xaf, -1} },
{ {0x30, -1}, {0xb0, -1} }, { {0x31, -1}, {0xb1, -1} }, { {0x32, -1}, {0xb2, -1} }, { {0x33, -1}, {0xb3, -1} },
{ {0x34, -1}, {0xb4, -1} }, { {0x35, -1}, {0xb5, -1} }, { {0x36, -1}, {0xb6, -1} }, { {0x37, -1}, {0xb7, -1} },
{ {0x38, -1}, {0xb8, -1} }, { {0x39, -1}, {0xb9, -1} }, { {0x3a, -1}, {0xba, -1} }, { {0x3b, -1}, {0xbb, -1} },
{ {0x3c, -1}, {0xbc, -1} }, { {0x3d, -1}, {0xbd, -1} }, { {0x3e, -1}, {0xbe, -1} }, { {0x3f, -1}, {0xbf, -1} },
{ {0x40, -1}, {0xc0, -1} }, { {0x41, -1}, {0xc1, -1} }, { {0x42, -1}, {0xc2, -1} }, { {0x43, -1}, {0xc3, -1} },
{ {0x44, -1}, {0xc4, -1} }, { {0x45, -1}, {0xc5, -1} }, { {0x46, -1}, {0xc6, -1} }, { {0x47, -1}, {0xc7, -1} },
{ {0x48, -1}, {0xc8, -1} }, { {0x49, -1}, {0xc9, -1} }, { {0x4a, -1}, {0xca, -1} }, { {0x4b, -1}, {0xcb, -1} },
{ {0x4c, -1}, {0xcc, -1} }, { {0x4d, -1}, {0xcd, -1} }, { {0x4e, -1}, {0xce, -1} }, { {0x4f, -1}, {0xcf, -1} },
{ {0x50, -1}, {0xd0, -1} }, { {0x51, -1}, {0xd1, -1} }, { {0x52, -1}, {0xd2, -1} }, { {0x53, -1}, {0xd3, -1} },
{ {0x54, -1}, {0xd4, -1} }, { {0x55, -1}, {0xd5, -1} }, { {0x56, -1}, {0xd6, -1} }, { {0x57, -1}, {0xd7, -1} },
{ {0x58, -1}, {0xd8, -1} }, { {0x59, -1}, {0xd9, -1} }, { {0x5a, -1}, {0xda, -1} }, { {0x5b, -1}, {0xdb, -1} },
{ {0x5c, -1}, {0xdc, -1} }, { {0x5d, -1}, {0xdd, -1} }, { {0x5e, -1}, {0xde, -1} }, { {0x5f, -1}, {0xdf, -1} },
{ {0x60, -1}, {0xe0, -1} }, { {0x61, -1}, {0xe1, -1} }, { {0x62, -1}, {0xe2, -1} }, { {0x63, -1}, {0xe3, -1} },
{ {0x64, -1}, {0xe4, -1} }, { {0x65, -1}, {0xe5, -1} }, { {0x66, -1}, {0xe6, -1} }, { {0x67, -1}, {0xe7, -1} },
{ {0x68, -1}, {0xe8, -1} }, { {0x69, -1}, {0xe9, -1} }, { {0x6a, -1}, {0xea, -1} }, { {0x6b, -1}, {0xeb, -1} },
{ {0x6c, -1}, {0xec, -1} }, { {0x6d, -1}, {0xed, -1} }, { {0x6e, -1}, {0xee, -1} }, { {0x6f, -1}, {0xef, -1} },
{ {0x70, -1}, {0xf0, -1} }, { {0x71, -1}, {0xf1, -1} }, { {0x72, -1}, {0xf2, -1} }, { {0x73, -1}, {0xf3, -1} },
{ {0x74, -1}, {0xf4, -1} }, { {0x75, -1}, {0xf5, -1} }, { {0x76, -1}, {0xf6, -1} }, { {0x77, -1}, {0xf7, -1} },
{ {0x78, -1}, {0xf8, -1} }, { {0x79, -1}, {0xf9, -1} }, { {0x7a, -1}, {0xfa, -1} }, { {0x7b, -1}, {0xfb, -1} },
{ {0x7c, -1}, {0xfc, -1} }, { {0x7d, -1}, {0xfd, -1} }, { {0x7e, -1}, {0xfe, -1} }, { {0x7f, -1}, {0xff, -1} },
{ {0x80, -1}, {-1} }, { {0x81, -1}, {-1} }, { {0x82, -1}, {-1} }, { {0xe0, 0x03, -1}, {0xe0, 0x83, -1} }, /*80*/
{ {0xe0, 0x04, -1}, {0xe0, 0x84, -1} }, { {0x85, -1}, {-1} }, { {0x86, -1}, {-1} }, { {0x87, -1}, {-1} }, /*84*/
{ {0xe0, 0x08, -1}, {0xe0, 0x88, -1} }, { {0xe0, 0x09, -1}, {0xe0, 0x89, -1} }, { {0xe0, 0x0a, -1}, {0xe0, 0x8a, -1} }, { {0xe0, 0x0b, -1}, {0xe0, 0x8b, -1} }, /*88*/
{ {0xe0, 0x0c, -1}, {0xe0, 0x8c, -1} }, { {-1}, {-1} }, { {0xe0, 0x0e, -1}, {0xe0, 0x8e, -1} }, { {0xe0, 0x0f, -1}, {0xe0, 0x8f, -1} }, /*8c*/
{ {0xe0, 0x10, -1}, {0xe0, 0x90, -1} }, { {0xe0, 0x11, -1}, {0xe0, 0x91, -1} }, { {0xe0, 0x12, -1}, {0xe0, 0x92, -1} }, { {0xe0, 0x13, -1}, {0xe0, 0x93, -1} }, /*90*/
{ {0xe0, 0x14, -1}, {0xe0, 0x94, -1} }, { {0xe0, 0x15, -1}, {0xe0, 0x95, -1} }, { {0xe0, 0x16, -1}, {0xe0, 0x96, -1} }, { {0xe0, 0x17, -1}, {0xe0, 0x97, -1} }, /*94*/
{ {0xe0, 0x18, -1}, {0xe0, 0x98, -1} }, { {0xe0, 0x19, -1}, {0xe0, 0x99, -1} }, { {0xe0, 0x1a, -1}, {0xe0, 0x9a, -1} }, { {0xe0, 0x1b, -1}, {0xe0, 0x9b, -1} }, /*98*/
{ {0xe0, 0x1c, -1}, {0xe0, 0x9c, -1} }, { {0xe0, 0x1d, -1}, {0xe0, 0x9d, -1} }, { {0xe0, 0x1e, -1}, {0xe0, 0x9e, -1} }, { {0xe0, 0x1f, -1}, {0xe0, 0x9f, -1} }, /*9c*/
{ {0xe0, 0x20, -1}, {0xe0, 0xa0, -1} }, { {0xe0, 0x21, -1}, {0xe0, 0xa1, -1} }, { {0xe0, 0x22, -1}, {0xe0, 0xa2, -1} }, { {0xe0, 0x23, -1}, {0xe0, 0xa3, -1} }, /*a0*/
{ {0xe0, 0x24, -1}, {0xe0, 0xa4, -1} }, { {0xe0, 0x25, -1}, {0xe0, 0xa5, -1} }, { {0xe0, 0x26, -1}, {0xe0, 0xa6, -1} }, { {-1}, {-1} }, /*a4*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*a8*/
{ {0xe0, 0x2c, -1}, {0xe0, 0xac, -1} }, { {0xe0, 0x2d, -1}, {0xe0, 0xad, -1} }, { {0xe0, 0x2e, -1}, {0xe0, 0xae, -1} }, { {0xe0, 0x2f, -1}, {0xe0, 0xaf, -1} }, /*ac*/
{ {0xe0, 0x30, -1}, {0xe0, 0xb0, -1} }, { {0xe0, 0x31, -1}, {0xe0, 0xb1, -1} }, { {0xe0, 0x32, -1}, {0xe0, 0xb2, -1} }, { {-1}, {-1} }, /*b0*/
{ {0xe0, 0x34, -1}, {0xe0, 0xb4, -1} }, { {0xe0, 0x35, -1}, {0xe0, 0xb5, -1} }, { {-1}, {-1} }, { {0xe0, 0x37, -1}, {0xe0, 0xb7, -1} }, /*b4*/
{ {0xe0, 0x38, -1}, {0xe0, 0xb8, -1} }, { {-1}, {-1} }, { {0xe0, 0x3a, -1}, {0xe0, 0xba, -1} }, { {0xe0, 0x3b, -1}, {0xe0, 0xbb, -1} }, /*b8*/
{ {0xe0, 0x3c, -1}, {0xe0, 0xbc, -1} }, { {0xe0, 0x3d, -1}, {0xe0, 0xbd, -1} }, { {0xe0, 0x3e, -1}, {0xe0, 0xbe, -1} }, { {0xe0, 0x3f, -1}, {0xe0, 0xbf, -1} }, /*bc*/
{ {0xe0, 0x40, -1}, {0xe0, 0xc0, -1} }, { {0xe0, 0x41, -1}, {0xe0, 0xc1, -1} }, { {0xe0, 0x42, -1}, {0xe0, 0xc2, -1} }, { {0xe0, 0x43, -1}, {0xe0, 0xc3, -1} }, /*c0*/
{ {0xe0, 0x44, -1}, {0xe0, 0xc4, -1} }, { {-1}, {-1} }, { {0xe0, 0x46, -1}, {0xe0, 0xc6, -1} }, { {0xe0, 0xaa, 0xe0, 0x47, -1}, {0xe0, 0xc7, 0xe0, 0x2a, -1} }, /*c4*/
{ {0xe0, 0xaa, 0xe0, 0x48, -1}, {0xe0, 0xc8, 0xe0, 0x2a, -1} }, { {0xe0, 0xaa, 0xe0, 0x49, -1}, {0xe0, 0xc9, 0xe0, 0x2a, -1} }, { {-1}, {-1} }, { {0xe0, 0xaa, 0xe0, 0x4b, -1}, {0xe0, 0xcb, 0xe0, 0x2a, -1} }, /*c8*/
{ {0xe0, 0x4c, -1}, {0xe0, 0xcc, -1} }, { {0xe0, 0xaa, 0xe0, 0x4d, -1}, {0xe0, 0xcd, 0xe0, 0x2a, -1} }, { {0xe0, 0x4e, -1}, {0xe0, 0xce, -1} }, { {0xe0, 0xaa, 0xe0, 0x4f, -1}, {0xe0, 0xcf, 0xe0, 0x2a, -1} }, /*cc*/
{ {0xe0, 0xaa, 0xe0, 0x50, -1}, {0xe0, 0xd0, 0xe0, 0x2a, -1} }, { {0xe0, 0xaa, 0xe0, 0x51, -1}, {0xe0, 0xd1, 0xe0, 0x2a, -1} }, { {0xe0, 0xaa, 0xe0, 0x52, -1}, {0xe0, 0xd2, 0xe0, 0x2a, -1} }, { {0xe0, 0xaa, 0xe0, 0x53, -1}, {0xe0, 0xd3, 0xe0, 0x2a, -1} }, /*d0*/
{ {0xd4, -1}, {-1} }, { {0xe0, 0x55, -1}, {0xe0, 0xd5, -1} }, { {-1}, {-1} }, { {0xe0, 0x57, -1}, {0xe0, 0xd7, -1} }, /*d4*/
{ {0xe0, 0x58, -1}, {0xe0, 0xd8, -1} }, { {0xe0, 0x59, -1}, {0xe0, 0xd9, -1} }, { {0xe0, 0x5a, -1}, {0xe0, 0xaa, -1} }, { {0xe0, 0x5b, -1}, {0xe0, 0xdb, -1} }, /*d8*/
{ {0xe0, 0x5c, -1}, {0xe0, 0xdc, -1} }, { {0xe0, 0x5d, -1}, {0xe0, 0xdd, -1} }, { {0xe0, 0x5e, -1}, {0xe0, 0xee, -1} }, { {0xe0, 0x5f, -1}, {0xe0, 0xdf, -1} }, /*dc*/
{ {-1}, {-1} }, { {0xe0, 0x61, -1}, {0xe0, 0xe1, -1} }, { {0xe0, 0x62, -1}, {0xe0, 0xe2, -1} }, { {0xe0, 0x63, -1}, {0xe0, 0xe3, -1} }, /*e0*/
{ {0xe0, 0x64, -1}, {0xe0, 0xe4, -1} }, { {0xe0, 0x65, -1}, {0xe0, 0xe5, -1} }, { {0xe0, 0x66, -1}, {0xe0, 0xe6, -1} }, { {0xe0, 0x67, -1}, {0xe0, 0xe7, -1} }, /*e4*/
{ {0xe0, 0x68, -1}, {0xe0, 0xe8, -1} }, { {0xe0, 0x69, -1}, {0xe0, 0xe9, -1} }, { {0xe0, 0x6a, -1}, {0xe0, 0xea, -1} }, { {0xe0, 0x6b, -1}, {0xe0, 0xeb, -1} }, /*e8*/
{ {0xe0, 0x6c, -1}, {0xe0, 0xec, -1} }, { {0xe0, 0x6d, -1}, {0xe0, 0xed, -1} }, { {0xe0, 0x6e, -1}, {0xe0, 0xee, -1} }, { {-1}, {-1} }, /*ec*/
{ {0xe0, 0x70, -1}, {0xe0, 0xf0, -1} }, { {0xf1, -1}, {-1} }, { {0xf2, -1}, {-1} }, { {0xe0, 0x73, -1}, {0xe0, 0xf3, -1} }, /*f0*/
{ {0xe0, 0x74, -1}, {0xe0, 0xf4, -1} }, { {0xe0, 0x75, -1}, {0xe0, 0xf5, -1} }, { {-1}, {-1} }, { {0xe0, 0x77, -1}, {0xe0, 0xf7, -1} }, /*f4*/
{ {0xe0, 0x78, -1}, {0xe0, 0xf8, -1} }, { {0xe0, 0x79, -1}, {0xe0, 0xf9, -1} }, { {0xe0, 0x7a, -1}, {0xe0, 0xfa, -1} }, { {0xe0, 0x7b, -1}, {0xe0, 0xfb, -1} }, /*f8*/
{ {0xe0, 0x7c, -1}, {0xe0, 0xfc, -1} }, { {0xe0, 0x7d, -1}, {0xe0, 0xfd, -1} }, { {0xe0, 0x7e, -1}, {0xe0, 0xfe, -1} }, { {0xe1, 0x1d, -1}, {0xe1, 0x9d, -1} }, /*fc*/
{ {-1}, {-1} }, { {0xe0, 0x01, -1}, {0xe0, 0x81, -1} }, { {0xe0, 0x02, -1}, {0xe0, 0x82, -1} }, { {0xe0, 0xaa, -1}, {0xe0, 0x2a, -1} }, /*100*/
{ {-1}, {-1} }, { {0xe0, 0x05, -1}, {0xe0, 0x85, -1} }, { {0xe0, 0x06, -1}, {0xe0, 0x86, -1} }, { {0xe0, 0x07, -1}, {0xe0, 0x87, -1} }, /*104*/
{ {0xe0, 0x71, -1}, {0xe0, 0xf1, -1} }, { {0xe0, 0x72, -1}, {0xe0, 0xf2, -1} }, { {0xe0, 0x7f, -1}, {0xe0, 0xff, -1} }, { {0xe0, 0xe1, -1}, {-1} }, /*108*/
{ {0xe0, 0xee, -1}, {-1} }, { {0xe0, 0xf1, -1}, {-1} }, { {0xe0, 0xfe, -1}, {-1} }, { {0xe0, 0xff, -1}, {-1} } /*10c*/
/*
* This array acts an intermediary so scan codes are processed in
* the correct order (ALT-CTRL-SHIFT-RSHIFT first, then all others).
*/
static int scorder[272] = {
0x38, 0xB8, 0x1D, 0x9D, 0xFF, 0x2A, 0x36, 0x103,
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1E, 0x1F, 0x20,
0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28,
0x29, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F, 0x30, 0x31,
0x32, 0x33, 0x34, 0x35, 0x37, 0x39, 0x3A, 0x3B,
0x3C, 0x3D, 0x3E, 0x3F, 0x40, 0x41, 0x42, 0x43,
0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B,
0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53,
0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B,
0x5C, 0x5D, 0x5E, 0x5F, 0x60, 0x61, 0x62, 0x63,
0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B,
0x6C, 0x6D, 0x6E, 0x6F, 0x70, 0x71, 0x72, 0x73,
0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B,
0x7C, 0x7D, 0x7E, 0x7F, 0x80, 0x81, 0x82, 0x83,
0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B,
0x8C, 0x8D, 0x8E, 0x8F, 0x90, 0x91, 0x92, 0x93,
0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B,
0x9C, 0x9E, 0x9F, 0xA0, 0xA1, 0xA2, 0xA3, 0xA4,
0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC,
0xAD, 0xAE, 0xAF, 0xB0, 0xB1, 0xB2, 0xB3, 0xB4,
0xB5, 0xB6, 0xB7, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD,
0xBE, 0xBF, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5,
0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD,
0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5,
0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD,
0xDE, 0xDF, 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5,
0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED,
0xEE, 0xEF, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5,
0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD,
0xFE, 0x100, 0x101, 0x102, 0x104, 0x105, 0x106, 0x107,
0x108, 0x109, 0x10A, 0x10B, 0x10C, 0x10D, 0x10E, 0x10F
};
static scancode scancode_set2[272] =
{
{ {-1}, {-1} }, { {0x76, -1}, {0xF0, 0x76, -1} }, { {0x16, -1}, {0xF0, 0x16, -1} }, { {0x1E, -1}, {0xF0, 0x1E, -1} },
{ {0x26, -1}, {0xF0, 0x26, -1} }, { {0x25, -1}, {0xF0, 0x25, -1} }, { {0x2E, -1}, {0xF0, 0x2E, -1} }, { {0x36, -1}, {0xF0, 0x36, -1} },
{ {0x3D, -1}, {0xF0, 0x3D, -1} }, { {0x3E, -1}, {0xF0, 0x3E, -1} }, { {0x46, -1}, {0xF0, 0x46, -1} }, { {0x45, -1}, {0xF0, 0x45, -1} },
{ {0x4E, -1}, {0xF0, 0x4E, -1} }, { {0x55, -1}, {0xF0, 0x55, -1} }, { {0x66, -1}, {0xF0, 0x66, -1} }, { {0x0D, -1}, {0xF0, 0x0D, -1} },
{ {0x15, -1}, {0xF0, 0x15, -1} }, { {0x1D, -1}, {0xF0, 0x1D, -1} }, { {0x24, -1}, {0xF0, 0x24, -1} }, { {0x2D, -1}, {0xF0, 0x2D, -1} },
{ {0x2C, -1}, {0xF0, 0x2C, -1} }, { {0x35, -1}, {0xF0, 0x35, -1} }, { {0x3C, -1}, {0xF0, 0x3C, -1} }, { {0x43, -1}, {0xF0, 0x43, -1} },
{ {0x44, -1}, {0xF0, 0x44, -1} }, { {0x4D, -1}, {0xF0, 0x4D, -1} }, { {0x54, -1}, {0xF0, 0x54, -1} }, { {0x5B, -1}, {0xF0, 0x5B, -1} },
{ {0x5A, -1}, {0xF0, 0x5A, -1} }, { {0x14, -1}, {0xF0, 0x14, -1} }, { {0x1C, -1}, {0xF0, 0x1C, -1} }, { {0x1B, -1}, {0xF0, 0x1B, -1} },
{ {0x23, -1}, {0xF0, 0x23, -1} }, { {0x2B, -1}, {0xF0, 0x2B, -1} }, { {0x34, -1}, {0xF0, 0x34, -1} }, { {0x33, -1}, {0xF0, 0x33, -1} },
{ {0x3B, -1}, {0xF0, 0x3B, -1} }, { {0x42, -1}, {0xF0, 0x42, -1} }, { {0x4B, -1}, {0xF0, 0x4B, -1} }, { {0x4C, -1}, {0xF0, 0x4C, -1} },
{ {0x52, -1}, {0xF0, 0x52, -1} }, { {0x0E, -1}, {0xF0, 0x0E, -1} }, { {0x12, -1}, {0xF0, 0x12, -1} }, { {0x5D, -1}, {0xF0, 0x5D, -1} },
{ {0x1A, -1}, {0xF0, 0x1A, -1} }, { {0x22, -1}, {0xF0, 0x22, -1} }, { {0x21, -1}, {0xF0, 0x21, -1} }, { {0x2A, -1}, {0xF0, 0x2A, -1} },
{ {0x32, -1}, {0xF0, 0x32, -1} }, { {0x31, -1}, {0xF0, 0x31, -1} }, { {0x3A, -1}, {0xF0, 0x3A, -1} }, { {0x41, -1}, {0xF0, 0x41, -1} },
{ {0x49, -1}, {0xF0, 0x49, -1} }, { {0x4A, -1}, {0xF0, 0x4A, -1} }, { {0x59, -1}, {0xF0, 0x59, -1} }, { {0x7C, -1}, {0xF0, 0x7C, -1} },
{ {0x11, -1}, {0xF0, 0x11, -1} }, { {0x29, -1}, {0xF0, 0x29, -1} }, { {0x58, -1}, {0xF0, 0x58, -1} }, { {0x05, -1}, {0xF0, 0x05, -1} },
{ {0x06, -1}, {0xF0, 0x06, -1} }, { {0x04, -1}, {0xF0, 0x04, -1} }, { {0x0C, -1}, {0xF0, 0x0C, -1} }, { {0x03, -1}, {0xF0, 0x03, -1} },
{ {0x0B, -1}, {0xF0, 0x0B, -1} }, { {0x83, -1}, {0xF0, 0x83, -1} }, { {0x0A, -1}, {0xF0, 0x0A, -1} }, { {0x01, -1}, {0xF0, 0x01, -1} },
{ {0x09, -1}, {0xF0, 0x09, -1} }, { {0x77, -1}, {0xF0, 0x77, -1} }, { {0x7E, -1}, {0xF0, 0x7E, -1} }, { {0x6C, -1}, {0xF0, 0x6C, -1} },
{ {0x75, -1}, {0xF0, 0x75, -1} }, { {0x7D, -1}, {0xF0, 0x7D, -1} }, { {0x7B, -1}, {0xF0, 0x7B, -1} }, { {0x6B, -1}, {0xF0, 0x6B, -1} },
{ {0x73, -1}, {0xF0, 0x73, -1} }, { {0x74, -1}, {0xF0, 0x74, -1} }, { {0x79, -1}, {0xF0, 0x79, -1} }, { {0x69, -1}, {0xF0, 0x69, -1} },
{ {0x72, -1}, {0xF0, 0x72, -1} }, { {0x7A, -1}, {0xF0, 0x7A, -1} }, { {0x70, -1}, {0xF0, 0x70, -1} }, { {0x71, -1}, {0xF0, 0x71, -1} },
{ {0x84, -1}, {0xF0, 0x84, -1} }, { {0x60, -1}, {0xF0, 0x60, -1} }, { {0x61, -1}, {0xF0, 0x61, -1} }, { {0x78, -1}, {0xF0, 0x78, -1} }, /*54*/
{ {0x07, -1}, {0xF0, 0x07, -1} }, { {0x0F, -1}, {0xF0, 0x0F, -1} }, { {0x17, -1}, {0xF0, 0x17, -1} }, { {0x1F, -1}, {0xF0, 0x1F, -1} }, /*58*/
{ {0x27, -1}, {0xF0, 0x27, -1} }, { {0x2F, -1}, {0xF0, 0x2F, -1} }, { {0x37, -1}, {0xF0, 0x37, -1} }, { {0x3F, -1}, {0xF0, 0x3F, -1} }, /*5c*/
{ {0x47, -1}, {0xF0, 0x47, -1} }, { {0x4F, -1}, {0xF0, 0x4F, -1} }, { {0x56, -1}, {0xF0, 0x56, -1} }, { {0x5E, -1}, {0xF0, 0x5E, -1} }, /*60*/
{ {0x08, -1}, {0xF0, 0x08, -1} }, { {0x10, -1}, {0xF0, 0x10, -1} }, { {0x18, -1}, {0xF0, 0x18, -1} }, { {0x20, -1}, {0xF0, 0x20, -1} }, /*64*/
{ {0x28, -1}, {0xF0, 0x28, -1} }, { {0x30, -1}, {0xF0, 0x30, -1} }, { {0x38, -1}, {0xF0, 0x38, -1} }, { {0x40, -1}, {0xF0, 0x40, -1} }, /*68*/
{ {0x48, -1}, {0xF0, 0x48, -1} }, { {0x50, -1}, {0xF0, 0x50, -1} }, { {0x57, -1}, {0xF0, 0x57, -1} }, { {0x6F, -1}, {0xF0, 0x6F, -1} }, /*6c*/
{ {0x13, -1}, {0xF0, 0x13, -1} }, { {0x19, -1}, {0xF0, 0x19, -1} }, { {0x39, -1}, {0xF0, 0x39, -1} }, { {0x51, -1}, {0xF0, 0x51, -1} }, /*70*/
{ {0x53, -1}, {0xF0, 0x53, -1} }, { {0x5C, -1}, {0xF0, 0x5C, -1} }, { {0x5F, -1}, {0xF0, 0x5F, -1} }, { {0x62, -1}, {0xF0, 0x62, -1} }, /*74*/
{ {0x63, -1}, {0xF0, 0x63, -1} }, { {0x64, -1}, {0xF0, 0x64, -1} }, { {0x65, -1}, {0xF0, 0x65, -1} }, { {0x67, -1}, {0xF0, 0x67, -1} }, /*78*/
{ {0x68, -1}, {0xF0, 0x68, -1} }, { {0x6A, -1}, {0xF0, 0x6A, -1} }, { {0x6D, -1}, {0xF0, 0x6D, -1} }, { {0x6E, -1}, {0xF0, 0x6E, -1} }, /*7c*/
{ {0x80, -1}, {0xF0, 0x80, -1} }, { {0x81, -1}, {0xF0, 0x81, -1} }, { {0x82, -1}, {0xF0, 0x82, -1} }, { {0xe0, 0x1E, -1}, {0xe0, 0xF0, 0x1E, -1} }, /*80*/
{ {0xe0, 0x26, -1}, {0xe0, 0xF0, 0x26, -1} }, { {0x85, -1}, {0xF0, 0x85, -1} }, { {0x86, -1}, {0xF0, 0x86, -1} }, { {0x87, -1}, {0xF0, 0x87, -1} }, /*84*/
{ {0xe0, 0x3D, -1}, {0xe0, 0xF0, 0x3D, -1} }, { {0xe0, 0x3E, -1}, {0xe0, 0xF0, 0x3E, -1} }, { {0xe0, 0x46, -1}, {0xe0, 0xF0, 0x46, -1} }, { {0xe0, 0x45, -1}, {0xe0, 0xF0, 0x45, -1} }, /*88*/
{ {0xe0, 0x4E, -1}, {0xe0, 0xF0, 0x4E, -1} }, { {-1}, {-1} }, { {0xe0, 0x66, -1}, {0xe0, 0xF0, 0x66, -1} }, { {0xe0, 0x0D, -1}, {0xe0, 0xF0, 0x0D, -1} }, /*8c*/
{ {0xe0, 0x15, -1}, {0xe0, 0xF0, 0x15, -1} }, { {0xe0, 0x1D, -1}, {0xe0, 0xF0, 0x1D, -1} }, { {0xe0, 0x24, -1}, {0xe0, 0xF0, 0x24, -1} }, { {0xe0, 0x2D, -1}, {0xe0, 0xF0, 0x2D, -1} }, /*90*/
{ {0xe0, 0x2C, -1}, {0xe0, 0xF0, 0x2C, -1} }, { {0xe0, 0x35, -1}, {0xe0, 0xF0, 0x35, -1} }, { {0xe0, 0x3C, -1}, {0xe0, 0xF0, 0x3C, -1} }, { {0xe0, 0x43, -1}, {0xe0, 0xF0, 0x43, -1} }, /*94*/
{ {0xe0, 0x44, -1}, {0xe0, 0xF0, 0x44, -1} }, { {0xe0, 0x4D, -1}, {0xe0, 0xF0, 0x4D, -1} }, { {0xe0, 0x54, -1}, {0xe0, 0xF0, 0x54, -1} }, { {0xe0, 0x5B, -1}, {0xe0, 0xF0, 0x5B, -1} }, /*98*/
{ {0xe0, 0x5A, -1}, {0xe0, 0xF0, 0x5A, -1} }, { {0xe0, 0x14, -1}, {0xe0, 0xF0, 0x14, -1} }, { {0xe0, 0x1C, -1}, {0xe0, 0xF0, 0x1C, -1} }, { {0xe0, 0x1B, -1}, {0xe0, 0xF0, 0x1B, -1} }, /*9c*/
{ {0xe0, 0x23, -1}, {0xe0, 0xF0, 0x23, -1} }, { {0xe0, 0x2B, -1}, {0xe0, 0xF0, 0x2B, -1} }, { {0xe0, 0x34, -1}, {0xe0, 0xF0, 0x34, -1} }, { {0xe0, 0x33, -1}, {0xe0, 0xF0, 0x33, -1} }, /*a0*/
{ {0xe0, 0x3B, -1}, {0xe0, 0xF0, 0x3B, -1} }, { {0xe0, 0x42, -1}, {0xe0, 0xF0, 0x42, -1} }, { {0xe0, 0x4B, -1}, {0xe0, 0xF0, 0x4B, -1} }, { {-1}, {-1} }, /*a4*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*a8*/
{ {0xe0, 0x1A, -1}, {0xe0, 0xF0, 0x1A, -1} }, { {0xe0, 0x22, -1}, {0xe0, 0xF0, 0x22, -1} }, { {0xe0, 0x21, -1}, {0xe0, 0xF0, 0x21, -1} }, { {0xe0, 0x2A, -1}, {0xe0, 0xF0, 0x2A, -1} }, /*ac*/
{ {0xe0, 0x32, -1}, {0xe0, 0xF0, 0x32, -1} }, { {0xe0, 0x31, -1}, {0xe0, 0xF0, 0x31, -1} }, { {0xe0, 0x3A, -1}, {0xe0, 0xF0, 0x3A, -1} }, { {-1}, {-1} }, /*b0*/
{ {0xe0, 0x49, -1}, {0xe0, 0xF0, 0x49, -1} }, { {0xe0, 0x4A, -1}, {0xe0, 0xF0, 0x4A, -1} }, { {-1}, {-1} }, { {0xe0, 0x7C, -1}, {0xe0, 0xF0, 0x7C, -1} }, /*b4*/
{ {0xe0, 0x11, -1}, {0xe0, 0xF0, 0x11, -1} }, { {-1}, {-1} }, { {0xe0, 0x58, -1}, {0xe0, 0xF0, 0x58, -1} }, { {0xe0, 0x05, -1}, {0xe0, 0xF0, 0x05, -1} }, /*b8*/
{ {0xe0, 0x06, -1}, {0xe0, 0xF0, 0x06, -1} }, { {0xe0, 0x04, -1}, {0xe0, 0xF0, 0x04, -1} }, { {0xe0, 0x0C, -1}, {0xe0, 0xF0, 0x0C, -1} }, { {0xe0, 0x03, -1}, {0xe0, 0xF0, 0x03, -1} }, /*bc*/
{ {0xe0, 0x0B, -1}, {0xe0, 0xF0, 0x0B, -1} }, { {0xe0, 0x02, -1}, {0xe0, 0xF0, 0x02, -1} }, { {0xe0, 0x0A, -1}, {0xe0, 0xF0, 0x0A, -1} }, { {0xe0, 0x01, -1}, {0xe0, 0xF0, 0x01, -1} }, /*c0*/
{ {0xe0, 0x09, -1}, {0xe0, 0xF0, 0x09, -1} }, { {-1}, {-1} }, { {0xe0, 0x7E, -1}, {0xe0, 0xF0, 0x7E, -1} }, { {0xe0, 0xf0, 0x12, 0xe0, 0x6C, -1}, {0xe0, 0xF0, 0x6C, 0xe0, 0x12, -1} }, /*c4*/
{ {0xe0, 0xf0, 0x12, 0xe0, 0x75, -1}, {0xe0, 0xF0, 0x75, 0xe0, 0x12, -1} }, { {0xe0, 0xf0, 0x12, 0xe0, 0x7D, -1}, {0xe0, 0xF0, 0x7D, 0xe0, 0x12, -1} }, { {-1}, {-1} }, { {0xe0, 0xf0, 0x12, 0xe0, 0x6B, -1}, {0xe0, 0xF0, 0x6B, 0xe0, 0x12, -1} }, /*c8*/
{ {0xe0, 0x73, -1}, {0xe0, 0xF0, 0x73, -1} }, { {0xe0, 0xf0, 0x12, 0xe0, 0x74, -1}, {0xe0, 0xF0, 0x74, 0xe0, 0x12, -1} }, { {0xe0, 0x79, -1}, {0xe0, 0xF0, 0x79, -1} }, { {0xe0, 0xf0, 0x12, 0xe0, 0x69, -1}, {0xe0, 0xF0, 0x69, 0xe0, 0x12, -1} }, /*cc*/
{ {0xe0, 0xf0, 0x12, 0xe0, 0x72, -1}, {0xe0, 0xF0, 0x72, 0xe0, 0x12, -1} }, { {0xe0, 0xf0, 0x12, 0xe0, 0x7A, -1}, {0xe0, 0xF0, 0x7A, 0xe0, 0x12, -1} }, { {0xe0, 0xf0, 0x12, 0xe0, 0x70, -1}, {0xe0, 0xF0, 0x70, 0xe0, 0x12, -1} }, { {0xe0, 0xf0, 0x12, 0xe0, 0x71, -1}, {0xe0, 0xF0, 0x71, 0xe0, 0x12, -1} }, /*d0*/
{ {0xd4, -1}, {0xF0, 0xD4, -1} }, { {0xe0, 0x60, -1}, {0xe0, 0xF0, 0x60, -1} }, { {-1}, {-1} }, { {0xe0, 0x78, -1}, {0xe0, 0xF0, 0x78, -1} }, /*d4*/
{ {0xe0, 0x07, -1}, {0xe0, 0xF0, 0x07, -1} }, { {0xe0, 0x0F, -1}, {0xe0, 0xF0, 0x0F, -1} }, { {0xe0, 0x17, -1}, {0xe0, 0xF0, 0x17, -1} }, { {0xe0, 0x1F, -1}, {0xe0, 0xF0, 0x1F, -1} }, /*d8*/
{ {0xe0, 0x27, -1}, {0xe0, 0xF0, 0x27, -1} }, { {0xe0, 0x2F, -1}, {0xe0, 0xF0, 0x2F, -1} }, { {0xe0, 0x37, -1}, {0xe0, 0xF0, 0x37, -1} }, { {0xe0, 0x3F, -1}, {0xe0, 0xF0, 0x3F, -1} }, /*dc*/
{ {-1}, {-1} }, { {0xe0, 0x4F, -1}, {0xe0, 0xF0, 0x4F, -1} }, { {0xe0, 0x56, -1}, {0xe0, 0xF0, 0x56, -1} }, { {0xe0, 0x5E, -1}, {0xe0, 0xF0, 0x5E, -1} }, /*e0*/
{ {0xe0, 0x08, -1}, {0xe0, 0xF0, 0x08, -1} }, { {0xe0, 0x10, -1}, {0xe0, 0xF0, 0x10, -1} }, { {0xe0, 0x18, -1}, {0xe0, 0xF0, 0x18, -1} }, { {0xe0, 0x20, -1}, {0xe0, 0xF0, 0x20, -1} }, /*e4*/
{ {0xe0, 0x28, -1}, {0xe0, 0xF0, 0x28, -1} }, { {0xe0, 0x30, -1}, {0xe0, 0xF0, 0x30, -1} }, { {0xe0, 0x38, -1}, {0xe0, 0xF0, 0x38, -1} }, { {0xe0, 0x40, -1}, {0xe0, 0xF0, 0x40, -1} }, /*e8*/
{ {0xe0, 0x48, -1}, {0xe0, 0xF0, 0x48, -1} }, { {0xe0, 0x50, -1}, {0xe0, 0xF0, 0x50, -1} }, { {0xe0, 0x57, -1}, {0xe0, 0xF0, 0x57, -1} }, { {-1}, {-1} }, /*ec*/
{ {0xe0, 0x13, -1}, {0xe0, 0xF0, 0x13, -1} }, { {0xf1, -1}, {0xF0, 0xF1, -1} }, { {0xf2, -1}, {0xF0, 0xF2, -1} }, { {0xe0, 0x51, -1}, {0xe0, 0xF0, 0x51, -1} }, /*f0*/
{ {0xe0, 0x53, -1}, {0xe0, 0xF0, 0x53, -1} }, { {0xe0, 0x5C, -1}, {0xe0, 0xF0, 0x5C, -1} }, { {-1}, {-1} }, { {0xe0, 0x62, -1}, {0xe0, 0xF0, 0x62, -1} }, /*f4*/
{ {0xe0, 0x63, -1}, {0xe0, 0xF0, 0x63, -1} }, { {0xe0, 0x64, -1}, {0xe0, 0xF0, 0x64, -1} }, { {0xe0, 0x65, -1}, {0xe0, 0xF0, 0x65, -1} }, { {0xe0, 0x67, -1}, {0xe0, 0xF0, 0x67, -1} }, /*f8*/
{ {0xe0, 0x68, -1}, {0xe0, 0xF0, 0x68, -1} }, { {0xe0, 0x6A, -1}, {0xe0, 0xF0, 0x6A, -1} }, { {0xe0, 0x6D, -1}, {0xe0, 0xF0, 0x6D, -1} }, { {0xe1, 0x14, -1}, {0xe1, 0xf0, 0x14, -1} }, /*fc*/
{ {-1}, {-1} }, { {0xe0, 0x76, -1}, {0xe0, 0xF0, 0x76, -1} }, { {0xe0, 0x16, -1}, {0xe0, 0xF0, 0x16, -1} }, { {0xe0, 0xf0, 0x12, -1}, {0xe0, 0x12, -1} }, /*100*/
{ {-1}, {-1} }, { {0xe0, 0x25, -1}, {0xe0, 0xF0, 0x25, -1} }, { {0xe0, 0x2E, -1}, {0xe0, 0xF0, 0x2E, -1} }, { {0xe0, 0x36, -1}, {0xe0, 0xF0, 0x36, -1} }, /*104*/
{ {0xe0, 0x19, -1}, {0xe0, 0xF0, 0x19, -1} }, { {0xe0, 0x39, -1}, {0xe0, 0xF0, 0x39, -1} }, { {0xe0, 0x6E, -1}, {0xe0, 0xF0, 0x6E, -1} }, { {0xe0, 0xe1, -1}, {0xe0, 0xF0, 0xE1, -1} }, /*108*/
{ {0xe0, 0xee, -1}, {0xe0, 0xF0, 0xEE, -1} }, { {0xe0, 0xf1, -1}, {0xe0, 0xF0, 0xF1, -1} }, { {0xe0, 0xfe, -1}, {0xe0, 0xF0, 0xFE, -1} }, { {0xe0, 0xff, -1}, {0xe0, 0xF0, 0xFF, -1} } /*10c*/
};
static scancode scancode_set3[272] =
{
{ {-1}, {-1} }, { {0x08, -1}, {0xF0, 0x08, -1} }, { {0x16, -1}, {0xF0, 0x16, -1} }, { {0x1E, -1}, {0xF0, 0x1E, -1} },
{ {0x26, -1}, {0xF0, 0x26, -1} }, { {0x25, -1}, {0xF0, 0x25, -1} }, { {0x2E, -1}, {0xF0, 0x2E, -1} }, { {0x36, -1}, {0xF0, 0x36, -1} },
{ {0x3D, -1}, {0xF0, 0x3D, -1} }, { {0x3E, -1}, {0xF0, 0x3E, -1} }, { {0x46, -1}, {0xF0, 0x46, -1} }, { {0x45, -1}, {0xF0, 0x45, -1} },
{ {0x4E, -1}, {0xF0, 0x4E, -1} }, { {0x55, -1}, {0xF0, 0x55, -1} }, { {0x66, -1}, {0xF0, 0x66, -1} }, { {0x0D, -1}, {0xF0, 0x0D, -1} },
{ {0x15, -1}, {0xF0, 0x15, -1} }, { {0x1D, -1}, {0xF0, 0x1D, -1} }, { {0x24, -1}, {0xF0, 0x24, -1} }, { {0x2D, -1}, {0xF0, 0x2D, -1} },
{ {0x2C, -1}, {0xF0, 0x2C, -1} }, { {0x35, -1}, {0xF0, 0x35, -1} }, { {0x3C, -1}, {0xF0, 0x3C, -1} }, { {0x43, -1}, {0xF0, 0x43, -1} },
{ {0x44, -1}, {0xF0, 0x44, -1} }, { {0x4D, -1}, {0xF0, 0x4D, -1} }, { {0x54, -1}, {0xF0, 0x54, -1} }, { {0x5B, -1}, {0xF0, 0x5B, -1} },
{ {0x5A, -1}, {0xF0, 0x5A, -1} }, { {0x11, -1}, {0xF0, 0x11, -1} }, { {0x1C, -1}, {0xF0, 0x1C, -1} }, { {0x1B, -1}, {0xF0, 0x1B, -1} },
{ {0x23, -1}, {0xF0, 0x23, -1} }, { {0x2B, -1}, {0xF0, 0x2B, -1} }, { {0x34, -1}, {0xF0, 0x34, -1} }, { {0x33, -1}, {0xF0, 0x33, -1} },
{ {0x3B, -1}, {0xF0, 0x3B, -1} }, { {0x42, -1}, {0xF0, 0x42, -1} }, { {0x4B, -1}, {0xF0, 0x4B, -1} }, { {0x4C, -1}, {0xF0, 0x4C, -1} },
{ {0x52, -1}, {0xF0, 0x52, -1} }, { {0x0E, -1}, {0xF0, 0x0E, -1} }, { {0x12, -1}, {0xF0, 0x12, -1} }, { {0x5C, -1}, {0xF0, 0x5C, -1} },
{ {0x1A, -1}, {0xF0, 0x1A, -1} }, { {0x22, -1}, {0xF0, 0x22, -1} }, { {0x21, -1}, {0xF0, 0x21, -1} }, { {0x2A, -1}, {0xF0, 0x2A, -1} },
{ {0x32, -1}, {0xF0, 0x32, -1} }, { {0x31, -1}, {0xF0, 0x31, -1} }, { {0x3A, -1}, {0xF0, 0x3A, -1} }, { {0x41, -1}, {0xF0, 0x41, -1} },
{ {0x49, -1}, {0xF0, 0x49, -1} }, { {0x4A, -1}, {0xF0, 0x4A, -1} }, { {0x59, -1}, {0xF0, 0x59, -1} }, { {0x7E, -1}, {0xF0, 0x7E, -1} },
{ {0x19, -1}, {0xF0, 0x19, -1} }, { {0x29, -1}, {0xF0, 0x29, -1} }, { {0x14, -1}, {0xF0, 0x14, -1} }, { {0x07, -1}, {0xF0, 0x07, -1} },
{ {0x0F, -1}, {0xF0, 0x0F, -1} }, { {0x17, -1}, {0xF0, 0x17, -1} }, { {0x1F, -1}, {0xF0, 0x1F, -1} }, { {0x27, -1}, {0xF0, 0x27, -1} },
{ {0x2F, -1}, {0xF0, 0x2F, -1} }, { {0x37, -1}, {0xF0, 0x37, -1} }, { {0x3F, -1}, {0xF0, 0x3F, -1} }, { {0x47, -1}, {0xF0, 0x47, -1} },
{ {0x4F, -1}, {0xF0, 0x4F, -1} }, { {0x76, -1}, {0xF0, 0x76, -1} }, { {0x5F, -1}, {0xF0, 0x5F, -1} }, { {0x6C, -1}, {0xF0, 0x6C, -1} },
{ {0x75, -1}, {0xF0, 0x75, -1} }, { {0x7D, -1}, {0xF0, 0x7D, -1} }, { {0x84, -1}, {0xF0, 0x84, -1} }, { {0x6B, -1}, {0xF0, 0x6B, -1} },
{ {0x73, -1}, {0xF0, 0x73, -1} }, { {0x74, -1}, {0xF0, 0x74, -1} }, { {0x7C, -1}, {0xF0, 0x7C, -1} }, { {0x69, -1}, {0xF0, 0x69, -1} },
{ {0x72, -1}, {0xF0, 0x72, -1} }, { {0x7A, -1}, {0xF0, 0x7A, -1} }, { {0x70, -1}, {0xF0, 0x70, -1} }, { {0x71, -1}, {0xF0, 0x71, -1} },
{ {0x57, -1}, {0xF0, 0x57, -1} }, { {0x60, -1}, {0xF0, 0x60, -1} }, { {-1}, {-1} }, { {0x56, -1}, {0xF0, 0x56, -1} },
{ {0x5E, -1}, {0xF0, 0x5E, -1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {0x10, -1}, {0xF0, 0x10, -1} }, { {0x18, -1}, {0xF0, 0x18, -1} }, { {0x20, -1}, {0xF0, 0x20, -1} },
{ {0x28, -1}, {0xF0, 0x28, -1} }, { {0x30, -1}, {0xF0, 0x30, -1} }, { {0x38, -1}, {0xF0, 0x38, -1} }, { {0x40, -1}, {0xF0, 0x40, -1} },
{ {0x48, -1}, {0xF0, 0x48, -1} }, { {0x50, -1}, {0xF0, 0x50, -1} }, { {-1}, {-1} }, { {-1}, {-1} },
{ {0x87, -1}, {0xF0, 0x87, -1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {0x51, -1}, {0xF0, 0x51, -1} },
{ {0x53, -1}, {0xF0, 0x53, -1} }, { {0x5C, -1}, {0xF0, 0x5C, -1} }, { {-1}, {-1} }, { {0x62, -1}, {0xF0, 0x62, -1} },
{ {0x63, -1}, {0xF0, 0x63, -1} }, { {0x86, -1}, {0xF0, 0x86, -1} }, { {-1}, {-1} }, { {0x85, -1}, {0xF0, 0x85, -1} },
{ {0x68, -1}, {0xF0, 0x68, -1} }, { {0x13, -1}, {0xF0, 0x13, -1} }, { {-1}, {-1} }, { {-1}, {-1} },
{ {0x80, -1}, {0xF0, 0x80, -1} }, { {0x81, -1}, {0xF0, 0x81, -1} }, { {0x82, -1}, {0xF0, 0x82, -1} }, { {0xe0, 0x1E, -1}, {0xe0, 0xF0, 0x1E, -1} }, /*80*/
{ {0xe0, 0x26, -1}, {0xe0, 0xF0, 0x26, -1} }, { {0x85, -1}, {0xF0, 0x85, -1} }, { {0x86, -1}, {0xF0, 0x86, -1} }, { {0x87, -1}, {0xF0, 0x87, -1} }, /*84*/
{ {0xe0, 0x3D, -1}, {0xe0, 0xF0, 0x3D, -1} }, { {0xe0, 0x3E, -1}, {0xe0, 0xF0, 0x3E, -1} }, { {0xe0, 0x46, -1}, {0xe0, 0xF0, 0x46, -1} }, { {0xe0, 0x45, -1}, {0xe0, 0xF0, 0x45, -1} }, /*88*/
{ {0xe0, 0x4E, -1}, {0xe0, 0xF0, 0x4E, -1} }, { {-1}, {-1} }, { {0xe0, 0x66, -1}, {0xe0, 0xF0, 0x66, -1} }, { {0xe0, 0x0D, -1}, {0xe0, 0xF0, 0x0D, -1} }, /*8c*/
{ {0xe0, 0x15, -1}, {0xe0, 0xF0, 0x15, -1} }, { {0xe0, 0x1D, -1}, {0xe0, 0xF0, 0x1D, -1} }, { {0xe0, 0x24, -1}, {0xe0, 0xF0, 0x24, -1} }, { {0xe0, 0x2D, -1}, {0xe0, 0xF0, 0x2D, -1} }, /*90*/
{ {0xe0, 0x2C, -1}, {0xe0, 0xF0, 0x2C, -1} }, { {0xe0, 0x35, -1}, {0xe0, 0xF0, 0x35, -1} }, { {0xe0, 0x3C, -1}, {0xe0, 0xF0, 0x3C, -1} }, { {0xe0, 0x43, -1}, {0xe0, 0xF0, 0x43, -1} }, /*94*/
{ {0xe0, 0x44, -1}, {0xe0, 0xF0, 0x44, -1} }, { {0xe0, 0x4D, -1}, {0xe0, 0xF0, 0x4D, -1} }, { {0xe0, 0x54, -1}, {0xe0, 0xF0, 0x54, -1} }, { {0xe0, 0x5B, -1}, {0xe0, 0xF0, 0x5B, -1} }, /*98*/
{ {0x79, -1}, {0xF0, 0x79, -1} }, { {0x58, -1}, {0xF0, 0x58, -1} }, { {0xe0, 0x1C, -1}, {0xe0, 0xF0, 0x1C, -1} }, { {0xe0, 0x1B, -1}, {0xe0, 0xF0, 0x1B, -1} }, /*9c*/
{ {0xe0, 0x23, -1}, {0xe0, 0xF0, 0x23, -1} }, { {0xe0, 0x2B, -1}, {0xe0, 0xF0, 0x2B, -1} }, { {0xe0, 0x34, -1}, {0xe0, 0xF0, 0x34, -1} }, { {0xe0, 0x33, -1}, {0xe0, 0xF0, 0x33, -1} }, /*a0*/
{ {0xe0, 0x3B, -1}, {0xe0, 0xF0, 0x3B, -1} }, { {0xe0, 0x42, -1}, {0xe0, 0xF0, 0x42, -1} }, { {0xe0, 0x4B, -1}, {0xe0, 0xF0, 0x4B, -1} }, { {-1}, {-1} }, /*a4*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*a8*/
{ {0xe0, 0x1A, -1}, {0xe0, 0xF0, 0x1A, -1} }, { {0xe0, 0x22, -1}, {0xe0, 0xF0, 0x22, -1} }, { {0xe0, 0x21, -1}, {0xe0, 0xF0, 0x21, -1} }, { {0xe0, 0x2A, -1}, {0xe0, 0xF0, 0x2A, -1} }, /*ac*/
{ {0xe0, 0x32, -1}, {0xe0, 0xF0, 0x32, -1} }, { {0xe0, 0x31, -1}, {0xe0, 0xF0, 0x31, -1} }, { {0xe0, 0x3A, -1}, {0xe0, 0xF0, 0x3A, -1} }, { {-1}, {-1} }, /*b0*/
{ {0xe0, 0x49, -1}, {0xe0, 0xF0, 0x49, -1} }, { {0x77, -1}, {0xF0, 0x77, -1} }, { {-1}, {-1} }, { {0x57, -1}, {0xF0, 0x57, -1} }, /*b4*/
{ {0x39, -1}, {0xF0, 0x39, -1} }, { {-1}, {-1} }, { {0xe0, 0x58, -1}, {0xe0, 0xF0, 0x58, -1} }, { {0xe0, 0x05, -1}, {0xe0, 0xF0, 0x05, -1} }, /*b8*/
{ {0xe0, 0x06, -1}, {0xe0, 0xF0, 0x06, -1} }, { {0xe0, 0x04, -1}, {0xe0, 0xF0, 0x04, -1} }, { {0xe0, 0x0C, -1}, {0xe0, 0xF0, 0x0C, -1} }, { {0xe0, 0x03, -1}, {0xe0, 0xF0, 0x03, -1} }, /*bc*/
{ {0xe0, 0x0B, -1}, {0xe0, 0xF0, 0x0B, -1} }, { {0xe0, 0x02, -1}, {0xe0, 0xF0, 0x02, -1} }, { {0xe0, 0x0A, -1}, {0xe0, 0xF0, 0x0A, -1} }, { {0xe0, 0x01, -1}, {0xe0, 0xF0, 0x01, -1} }, /*c0*/
{ {0xe0, 0x09, -1}, {0xe0, 0xF0, 0x09, -1} }, { {-1}, {-1} }, { {0xe0, 0x7E, -1}, {0xe0, 0xF0, 0x7E, -1} }, { {0x6E, -1}, {0xF0, 0x6E, -1} }, /*c4*/
{ {0x63, -1}, {0xF0, 0x63, -1} }, { {0x6F, -1}, {0xF0, 0x6F, -1} }, { {-1}, {-1} }, { {0x61, -1}, {0xF0, 0x61, -1} }, /*c8*/
{ {0xe0, 0x73, -1}, {0xe0, 0xF0, 0x73, -1} }, { {0x6A, -1}, {0xF0, 0x6A, -1} }, { {0xe0, 0x79, -1}, {0xe0, 0xF0, 0x79, -1} }, { {0x65, -1}, {0xF0, 0x65, -1} }, /*cc*/
{ {0x60, -1}, {0xF0, 0x60, -1} }, { {0x6D, -1}, {0xF0, 0x6D, -1} }, { {0x67, -1}, {0xF0, 0x67, -1} }, { {0x64, -1}, {0xF0, 0x64, -1} }, /*d0*/
{ {0xd4, -1}, {0xF0, 0xD4, -1} }, { {0xe0, 0x60, -1}, {0xe0, 0xF0, 0x60, -1} }, { {-1}, {-1} }, { {0xe0, 0x78, -1}, {0xe0, 0xF0, 0x78, -1} }, /*d4*/
{ {0xe0, 0x07, -1}, {0xe0, 0xF0, 0x07, -1} }, { {0xe0, 0x0F, -1}, {0xe0, 0xF0, 0x0F, -1} }, { {0xe0, 0x17, -1}, {0xe0, 0xF0, 0x17, -1} }, { {0x8B, -1}, {0xF0, 0x8B, -1} }, /*d8*/
{ {0x8C, -1}, {0xF0, 0x8C, -1} }, { {0x8D, -1}, {0xF0, 0x8D, -1} }, { {-1}, {-1} }, { {0x7F, -1}, {0xF0, 0x7F, -1} }, /*dc*/
{ {-1}, {-1} }, { {0xe0, 0x4F, -1}, {0xe0, 0xF0, 0x4F, -1} }, { {0xe0, 0x56, -1}, {0xe0, 0xF0, 0x56, -1} }, { {-1}, {-1} }, /*e0*/
{ {0xe0, 0x08, -1}, {0xe0, 0xF0, 0x08, -1} }, { {0xe0, 0x10, -1}, {0xe0, 0xF0, 0x10, -1} }, { {0xe0, 0x18, -1}, {0xe0, 0xF0, 0x18, -1} }, { {0xe0, 0x20, -1}, {0xe0, 0xF0, 0x20, -1} }, /*e4*/
{ {0xe0, 0x28, -1}, {0xe0, 0xF0, 0x28, -1} }, { {0xe0, 0x30, -1}, {0xe0, 0xF0, 0x30, -1} }, { {0xe0, 0x38, -1}, {0xe0, 0xF0, 0x38, -1} }, { {0xe0, 0x40, -1}, {0xe0, 0xF0, 0x40, -1} }, /*e8*/
{ {0xe0, 0x48, -1}, {0xe0, 0xF0, 0x48, -1} }, { {0xe0, 0x50, -1}, {0xe0, 0xF0, 0x50, -1} }, { {0xe0, 0x57, -1}, {0xe0, 0xF0, 0x57, -1} }, { {-1}, {-1} }, /*ec*/
{ {0xe0, 0x13, -1}, {0xe0, 0xF0, 0x13, -1} }, { {0xf1, -1}, {0xF0, 0xF1, -1} }, { {0xf2, -1}, {0xF0, 0xF2, -1} }, { {0xe0, 0x51, -1}, {0xe0, 0xF0, 0x51, -1} }, /*f0*/
{ {0xe0, 0x53, -1}, {0xe0, 0xF0, 0x53, -1} }, { {0xe0, 0x5C, -1}, {0xe0, 0xF0, 0x5C, -1} }, { {-1}, {-1} }, { {0xe0, 0x62, -1}, {0xe0, 0xF0, 0x62, -1} }, /*f4*/
{ {0xe0, 0x63, -1}, {0xe0, 0xF0, 0x63, -1} }, { {0xe0, 0x64, -1}, {0xe0, 0xF0, 0x64, -1} }, { {0xe0, 0x65, -1}, {0xe0, 0xF0, 0x65, -1} }, { {0xe0, 0x67, -1}, {0xe0, 0xF0, 0x67, -1} }, /*f8*/
{ {0xe0, 0x68, -1}, {0xe0, 0xF0, 0x68, -1} }, { {0xe0, 0x6A, -1}, {0xe0, 0xF0, 0x6A, -1} }, { {0xe0, 0x6D, -1}, {0xe0, 0xF0, 0x6D, -1} }, { {0x62, -1}, {0xF0, 0x62, -1} }, /*fc*/
{ {-1}, {-1} }, { {0xe0, 0x76, -1}, {0xe0, 0xF0, 0x76, -1} }, { {0xe0, 0x16, -1}, {0xe0, 0xF0, 0x16, -1} }, { {-1}, {-1} }, /*100*/
{ {-1}, {-1} }, { {0xe0, 0x25, -1}, {0xe0, 0xF0, 0x25, -1} }, { {0xe0, 0x2E, -1}, {0xe0, 0xF0, 0x2E, -1} }, { {0xe0, 0x36, -1}, {0xe0, 0xF0, 0x36, -1} }, /*104*/
{ {0xe0, 0x19, -1}, {0xe0, 0xF0, 0x19, -1} }, { {0xe0, 0x39, -1}, {0xe0, 0xF0, 0x39, -1} }, { {0xe0, 0x6E, -1}, {0xe0, 0xF0, 0x6E, -1} }, { {0xe0, 0xe1, -1}, {0xe0, 0xF0, 0xE1, -1} }, /*108*/
{ {0xe0, 0xee, -1}, {0xe0, 0xF0, 0xEE, -1} }, { {0xe0, 0xf1, -1}, {0xe0, 0xF0, 0xF1, -1} }, { {0xe0, 0xfe, -1}, {0xe0, 0xF0, 0xFE, -1} }, { {0xe0, 0xff, -1}, {0xe0, 0xF0, 0xFF, -1} } /*10c*/
};
/*XT keyboard has no escape scancodes, and no scancodes beyond 53*/
static scancode scancode_xt[272] =
{
{ {-1}, {-1} }, { {0x01, -1}, {0x81, -1} }, { {0x02, -1}, {0x82, -1} }, { {0x03, -1}, {0x83, -1} },
{ {0x04, -1}, {0x84, -1} }, { {0x05, -1}, {0x85, -1} }, { {0x06, -1}, {0x86, -1} }, { {0x07, -1}, {0x87, -1} },
{ {0x08, -1}, {0x88, -1} }, { {0x09, -1}, {0x89, -1} }, { {0x0a, -1}, {0x8a, -1} }, { {0x0b, -1}, {0x8b, -1} },
{ {0x0c, -1}, {0x8c, -1} }, { {0x0d, -1}, {0x8d, -1} }, { {0x0e, -1}, {0x8e, -1} }, { {0x0f, -1}, {0x8f, -1} },
{ {0x10, -1}, {0x90, -1} }, { {0x11, -1}, {0x91, -1} }, { {0x12, -1}, {0x92, -1} }, { {0x13, -1}, {0x93, -1} },
{ {0x14, -1}, {0x94, -1} }, { {0x15, -1}, {0x95, -1} }, { {0x16, -1}, {0x96, -1} }, { {0x17, -1}, {0x97, -1} },
{ {0x18, -1}, {0x98, -1} }, { {0x19, -1}, {0x99, -1} }, { {0x1a, -1}, {0x9a, -1} }, { {0x1b, -1}, {0x9b, -1} },
{ {0x1c, -1}, {0x9c, -1} }, { {0x1d, -1}, {0x9d, -1} }, { {0x1e, -1}, {0x9e, -1} }, { {0x1f, -1}, {0x9f, -1} },
{ {0x20, -1}, {0xa0, -1} }, { {0x21, -1}, {0xa1, -1} }, { {0x22, -1}, {0xa2, -1} }, { {0x23, -1}, {0xa3, -1} },
{ {0x24, -1}, {0xa4, -1} }, { {0x25, -1}, {0xa5, -1} }, { {0x26, -1}, {0xa6, -1} }, { {0x27, -1}, {0xa7, -1} },
{ {0x28, -1}, {0xa8, -1} }, { {0x29, -1}, {0xa9, -1} }, { {0x2a, -1}, {0xaa, -1} }, { {0x2b, -1}, {0xab, -1} },
{ {0x2c, -1}, {0xac, -1} }, { {0x2d, -1}, {0xad, -1} }, { {0x2e, -1}, {0xae, -1} }, { {0x2f, -1}, {0xaf, -1} },
{ {0x30, -1}, {0xb0, -1} }, { {0x31, -1}, {0xb1, -1} }, { {0x32, -1}, {0xb2, -1} }, { {0x33, -1}, {0xb3, -1} },
{ {0x34, -1}, {0xb4, -1} }, { {0x35, -1}, {0xb5, -1} }, { {0x36, -1}, {0xb6, -1} }, { {0x37, -1}, {0xb7, -1} },
{ {0x38, -1}, {0xb8, -1} }, { {0x39, -1}, {0xb9, -1} }, { {0x3a, -1}, {0xba, -1} }, { {0x3b, -1}, {0xbb, -1} },
{ {0x3c, -1}, {0xbc, -1} }, { {0x3d, -1}, {0xbd, -1} }, { {0x3e, -1}, {0xbe, -1} }, { {0x3f, -1}, {0xbf, -1} },
{ {0x40, -1}, {0xc0, -1} }, { {0x41, -1}, {0xc1, -1} }, { {0x42, -1}, {0xc2, -1} }, { {0x43, -1}, {0xc3, -1} },
{ {0x44, -1}, {0xc4, -1} }, { {0x45, -1}, {0xc5, -1} }, { {0x46, -1}, {0xc6, -1} }, { {0x47, -1}, {0xc7, -1} },
{ {0x48, -1}, {0xc8, -1} }, { {0x49, -1}, {0xc9, -1} }, { {0x4a, -1}, {0xca, -1} }, { {0x4b, -1}, {0xcb, -1} },
{ {0x4c, -1}, {0xcc, -1} }, { {0x4d, -1}, {0xcd, -1} }, { {0x4e, -1}, {0xce, -1} }, { {0x4f, -1}, {0xcf, -1} },
{ {0x50, -1}, {0xd0, -1} }, { {0x51, -1}, {0xd1, -1} }, { {0x52, -1}, {0xd2, -1} }, { {0x53, -1}, {0xd3, -1} },
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*54*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*58*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*5c*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*60*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*64*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*68*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*6c*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*70*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*74*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*78*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*7c*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*80*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*84*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*88*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*8c*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*90*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*94*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*98*/
{ {0x1c, -1}, {0x9c, -1} }, { {0x1d, -1}, {0x9d, -1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*9c*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*a0*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*a4*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {0xaa, -1}, {0x2a, -1} }, { {-1}, {-1} }, /*a8*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*ac*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*b0*/
{ {-1}, {-1} }, { {0x35, -1}, {0xb5, -1} }, { {0xb6, -1}, {0x36, -1} }, { {0x37, -1}, {0xb7, -1} }, /*b4*/
{ {0x38, -1}, {0xb8, -1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*b8*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*bc*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*c0*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {0x46, -1}, {0xc6, -1} }, { {0x47, -1}, {0xc7, -1} }, /*c4*/
{ {0x48, -1}, {0xc8, -1} }, { {0x49, -1}, {0xc9, -1} }, { {-1}, {-1} }, { {0x4b, -1}, {0xcb, -1} }, /*c8*/
{ {-1}, {-1} }, { {0x4d, -1}, {0xcd, -1} }, { {-1}, {-1} }, { {0x4f, -1}, {0xcf, -1} }, /*cc*/
{ {0x50, -1}, {0xd0, -1} }, { {0x51, -1}, {0xd1, -1} }, { {0x52, -1}, {0xd2, -1} }, { {0x53, -1}, {0xd3, -1} }, /*d0*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*d4*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*d8*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*dc*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*e0*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*e4*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*e8*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*ec*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*f0*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*f4*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*f8*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*fc*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*100*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*104*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*108*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*10c*/
};
/*Tandy keyboard has slightly different scancodes to XT*/
static scancode scancode_tandy[272] =
{
{ {-1}, {-1} }, { {0x01, -1}, {0x81, -1} }, { {0x02, -1}, {0x82, -1} }, { {0x03, -1}, {0x83, -1} },
{ {0x04, -1}, {0x84, -1} }, { {0x05, -1}, {0x85, -1} }, { {0x06, -1}, {0x86, -1} }, { {0x07, -1}, {0x87, -1} },
{ {0x08, -1}, {0x88, -1} }, { {0x09, -1}, {0x89, -1} }, { {0x0a, -1}, {0x8a, -1} }, { {0x0b, -1}, {0x8b, -1} },
{ {0x0c, -1}, {0x8c, -1} }, { {0x0d, -1}, {0x8d, -1} }, { {0x0e, -1}, {0x8e, -1} }, { {0x0f, -1}, {0x8f, -1} },
{ {0x10, -1}, {0x90, -1} }, { {0x11, -1}, {0x91, -1} }, { {0x12, -1}, {0x92, -1} }, { {0x13, -1}, {0x93, -1} },
{ {0x14, -1}, {0x94, -1} }, { {0x15, -1}, {0x95, -1} }, { {0x16, -1}, {0x96, -1} }, { {0x17, -1}, {0x97, -1} },
{ {0x18, -1}, {0x98, -1} }, { {0x19, -1}, {0x99, -1} }, { {0x1a, -1}, {0x9a, -1} }, { {0x1b, -1}, {0x9b, -1} },
{ {0x1c, -1}, {0x9c, -1} }, { {0x1d, -1}, {0x9d, -1} }, { {0x1e, -1}, {0x9e, -1} }, { {0x1f, -1}, {0x9f, -1} },
{ {0x20, -1}, {0xa0, -1} }, { {0x21, -1}, {0xa1, -1} }, { {0x22, -1}, {0xa2, -1} }, { {0x23, -1}, {0xa3, -1} },
{ {0x24, -1}, {0xa4, -1} }, { {0x25, -1}, {0xa5, -1} }, { {0x26, -1}, {0xa6, -1} }, { {0x27, -1}, {0xa7, -1} },
{ {0x28, -1}, {0xa8, -1} }, { {0x29, -1}, {0xa9, -1} }, { {0x2a, -1}, {0xaa, -1} }, { {0x47, -1}, {0xc7, -1} },
{ {0x2c, -1}, {0xac, -1} }, { {0x2d, -1}, {0xad, -1} }, { {0x2e, -1}, {0xae, -1} }, { {0x2f, -1}, {0xaf, -1} },
{ {0x30, -1}, {0xb0, -1} }, { {0x31, -1}, {0xb1, -1} }, { {0x32, -1}, {0xb2, -1} }, { {0x33, -1}, {0xb3, -1} },
{ {0x34, -1}, {0xb4, -1} }, { {0x35, -1}, {0xb5, -1} }, { {0x36, -1}, {0xb6, -1} }, { {0x37, -1}, {0xb7, -1} },
{ {0x38, -1}, {0xb8, -1} }, { {0x39, -1}, {0xb9, -1} }, { {0x3a, -1}, {0xba, -1} }, { {0x3b, -1}, {0xbb, -1} },
{ {0x3c, -1}, {0xbc, -1} }, { {0x3d, -1}, {0xbd, -1} }, { {0x3e, -1}, {0xbe, -1} }, { {0x3f, -1}, {0xbf, -1} },
{ {0x40, -1}, {0xc0, -1} }, { {0x41, -1}, {0xc1, -1} }, { {0x42, -1}, {0xc2, -1} }, { {0x43, -1}, {0xc3, -1} },
{ {0x44, -1}, {0xc4, -1} }, { {0x45, -1}, {0xc5, -1} }, { {0x46, -1}, {0xc6, -1} }, { {0x47, -1}, {0xc7, -1} },
{ {0x48, -1}, {0xc8, -1} }, { {0x49, -1}, {0xc9, -1} }, { {0x4a, -1}, {0xca, -1} }, { {0x4b, -1}, {0xcb, -1} },
{ {0x4c, -1}, {0xcc, -1} }, { {0x4d, -1}, {0xcd, -1} }, { {0x4e, -1}, {0xce, -1} }, { {0x4f, -1}, {0xcf, -1} },
{ {0x50, -1}, {0xd0, -1} }, { {0x51, -1}, {0xd1, -1} }, { {0x52, -1}, {0xd2, -1} }, { {0x56, -1}, {0xd6, -1} },
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*54*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*58*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*5c*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*60*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*64*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*68*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*6c*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*70*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*74*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*78*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*7c*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*80*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*84*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*88*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*8c*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*90*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*94*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*98*/
{ {0x57, -1}, {0xd7, -1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*9c*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*a0*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*a4*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {0xaa, -1}, {0x2a, -1} }, { {-1}, {-1} }, /*a8*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*ac*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*b0*/
{ {-1}, {-1} }, { {0x35, -1}, {0xb5, -1} }, { {0xb6, -1}, {0x36, -1} }, { {0x37, -1}, {0xb7, -1} }, /*b4*/
{ {0x38, -1}, {0xb8, -1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*b8*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*bc*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*c0*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {0x46, -1}, {0xc6, -1} }, { {0x47, -1}, {0xc7, -1} }, /*c4*/
{ {0x29, -1}, {0xa9, -1} }, { {0x49, -1}, {0xc9, -1} }, { {-1}, {-1} }, { {0x2b, -1}, {0xab, -1} }, /*c8*/
{ {-1}, {-1} }, { {0x4e, -1}, {0xce, -1} }, { {-1}, {-1} }, { {0x4f, -1}, {0xcf, -1} }, /*cc*/
{ {0x4a, -1}, {0xca, -1} }, { {0x51, -1}, {0xd1, -1} }, { {0x52, -1}, {0xd2, -1} }, { {0x53, -1}, {0xd3, -1} }, /*d0*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*d4*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*d8*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*dc*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*e0*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*e4*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*e8*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*ec*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*f0*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*f4*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*f8*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*fc*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*100*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*104*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*108*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*10c*/
};
static int oldkey[272];
static int keydelay[272];
/* This array acts an intermediary so scan codes are processed in the correct order (ALT-CTRL-SHIFT-RSHIFT first, then all others). */
static int scorder[272] = {0x38, 0xB8, 0x1D, 0x9D, 0xFF, 0x2A, 0x36,0x103, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1E, 0x1F, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28,
0x29, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x37, 0x39, 0x3A, 0x3B,
0x3C, 0x3D, 0x3E, 0x3F, 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B,
0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B,
0x5C, 0x5D, 0x5E, 0x5F, 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B,
0x6C, 0x6D, 0x6E, 0x6F, 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, 0x78, 0x79, 0x7A, 0x7B,
0x7C, 0x7D, 0x7E, 0x7F, 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87, 0x88, 0x89, 0x8A, 0x8B,
0x8C, 0x8D, 0x8E, 0x8F, 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97, 0x98, 0x99, 0x9A, 0x9B,
0x9C, 0x9E, 0x9F, 0xA0, 0xA1, 0xA2, 0xA3, 0xA4, 0xA5, 0xA6, 0xA7, 0xA8, 0xA9, 0xAA, 0xAB, 0xAC,
0xAD, 0xAE, 0xAF, 0xB0, 0xB1, 0xB2, 0xB3, 0xB4, 0xB5, 0xB6, 0xB7, 0xB9, 0xBA, 0xBB, 0xBC, 0xBD,
0xBE, 0xBF, 0xC0, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7, 0xC8, 0xC9, 0xCA, 0xCB, 0xCC, 0xCD,
0xCE, 0xCF, 0xD0, 0xD1, 0xD2, 0xD3, 0xD4, 0xD5, 0xD6, 0xD7, 0xD8, 0xD9, 0xDA, 0xDB, 0xDC, 0xDD,
0xDE, 0xDF, 0xE0, 0xE1, 0xE2, 0xE3, 0xE4, 0xE5, 0xE6, 0xE7, 0xE8, 0xE9, 0xEA, 0xEB, 0xEC, 0xED,
0xEE, 0xEF, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7, 0xF8, 0xF9, 0xFA, 0xFB, 0xFC, 0xFD,
0xFE,0x100,0x101,0x102,0x104,0x105,0x106,0x107,0x108,0x109,0x10A,0x10B,0x10C,0x10D,0x10E,0x10F};
void
keyboard_init(void)
@@ -448,6 +86,8 @@ keyboard_init(void)
memset(recv_key, 0x00, sizeof(recv_key));
keyboard_scan = 1;
keyboard_delay = 0;
scan_table = NULL;
memset(keyboard_set3_flags, 0x00, sizeof(keyboard_set3_flags));
keyboard_set3_all_repeat = 0;
@@ -455,33 +95,21 @@ keyboard_init(void)
}
void
keyboard_set_table(scancode *ptr)
{
scan_table = ptr;
}
void
keyboard_process(void)
{
scancode *scancodes;
scancode *codes = scan_table;
int c, d;
if (AT) {
switch (keyboard_mode & 3) {
case 1:
default:
scancodes = scancode_set1;
break;
case 2:
scancodes = scancode_set2;
break;
case 3:
scancodes = scancode_set3;
break;
}
if (keyboard_mode & 0x20) scancodes = scancode_set1;
} else {
scancodes = scancode_xt;
}
if (! keyboard_scan) return;
if (!keyboard_scan) return;
if (TANDY) scancodes = scancode_tandy;
for (c = 0; c < 272; c++) {
if (recv_key[scorder[c]])
keydelay[scorder[c]]++;
@@ -493,44 +121,44 @@ keyboard_process(void)
if (recv_key[scorder[c]] != oldkey[scorder[c]]) {
oldkey[scorder[c]] = recv_key[scorder[c]];
if (recv_key[scorder[c]] &&
scancodes[scorder[c]].scancodes_make[0] == -1) continue;
codes[scorder[c]].mk[0] == -1) continue;
if (!recv_key[scorder[c]] &&
scancodes[scorder[c]].scancodes_break[0] == -1) continue;
codes[scorder[c]].brk[0] == -1) continue;
if (AT && ((keyboard_mode & 3) == 3)) {
if (!keyboard_set3_all_break &&
!recv_key[scorder[c]] &&
!(keyboard_set3_flags[scancodes[scorder[c]].scancodes_make[0]] & 2)) continue;
!(keyboard_set3_flags[codes[scorder[c]].mk[0]] & 2)) continue;
}
d = 0;
if (recv_key[scorder[c]]) {
while (scancodes[scorder[c]].scancodes_make[d] != -1)
keyboard_send(scancodes[scorder[c]].scancodes_make[d++]);
while (codes[scorder[c]].mk[d] != -1)
keyboard_send(codes[scorder[c]].mk[d++]);
} else {
while (scancodes[scorder[c]].scancodes_break[d] != -1)
keyboard_send(scancodes[scorder[c]].scancodes_break[d++]);
while (codes[scorder[c]].brk[d] != -1)
keyboard_send(codes[scorder[c]].brk[d++]);
}
}
}
for (c = 0; c < 272; c++) {
if (AT && ((keyboard_mode & 3) == 3)) {
if (scancodes[scorder[c]].scancodes_make[0] == -1) continue;
if (codes[scorder[c]].mk[0] == -1) continue;
if (!keyboard_set3_all_repeat &&
!recv_key[scorder[c]] &&
!(keyboard_set3_flags[scancodes[scorder[c]].scancodes_make[0]] & 1)) continue;
!(keyboard_set3_flags[codes[scorder[c]].mk[0]] & 1)) continue;
}
if (keydelay[scorder[c]] >= 30) {
keydelay[scorder[c]] -= 10;
if (scancodes[scorder[c]].scancodes_make[0] == -1) continue;
if (codes[scorder[c]].mk[0] == -1) continue;
d = 0;
while (scancodes[scorder[c]].scancodes_make[d] != -1)
keyboard_send(scancodes[scorder[c]].scancodes_make[d++]);
while (codes[scorder[c]].mk[d] != -1)
keyboard_send(codes[scorder[c]].mk[d++]);
}
}
}

View File

@@ -6,37 +6,54 @@
*
* This file is part of the 86Box distribution.
*
* Host to guest keyboard interface and keyboard scan code sets.
* Definitions for the keyboard interface.
*
* Version: @(#)keyboard.h 1.0.4 2017/11/01
* Version: @(#)keyboard.h 1.0.5 2017/11/03
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>
*
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016,2017 Miran Grca.
* Copyright 2017 Fred N. van Kempen.
*/
#ifndef EMU_KEYBOARD_H
# define EMU_KEYBOARD_H
typedef struct {
int mk[9];
int brk[9];
} scancode;
#ifdef __cplusplus
extern "C" {
#endif
extern uint8_t keyboard_mode;
extern int keyboard_scan;
extern int64_t keybsenddelay;
extern int64_t keyboard_delay;
extern void (*keyboard_send)(uint8_t val);
extern uint8_t keyboard_set3_flags[272];
extern uint8_t keyboard_set3_all_repeat;
extern uint8_t keyboard_set3_all_break;
extern int mouse_queue_start, mouse_queue_end;
extern int mouse_scan;
extern void (*keyboard_send)(uint8_t val);
extern void (*keyboard_poll)(void);
#ifdef EMU_DEVICE_H
extern device_t keyboard_xt_device;
extern device_t keyboard_tandy_device;
extern device_t keyboard_at_device;
extern device_t keyboard_ps2_device;
#endif
extern void keyboard_init(void);
extern void keyboard_close(void);
extern void keyboard_set_table(scancode *ptr);
extern void keyboard_poll_host(void);
extern void keyboard_process(void);
extern uint16_t keyboard_convert(int ch);
@@ -44,6 +61,13 @@ extern void keyboard_input(int down, uint16_t scan);
extern int keyboard_isfsexit(void);
extern int keyboard_ismsexit(void);
extern void keyboard_at_reset(void);
extern void keyboard_at_adddata_keyboard_raw(uint8_t val);
extern void keyboard_at_adddata_mouse(uint8_t val);
extern void keyboard_at_set_mouse(void (*mouse_write)(uint8_t val,void *), void *);
extern uint8_t keyboard_at_get_mouse_scan(void);
extern void keyboard_at_set_mouse_scan(uint8_t val);
#ifdef __cplusplus
}
#endif

View File

@@ -1,193 +0,0 @@
/* Copyright holders: Sarah Walker
see COPYING for more details
*/
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <wchar.h>
#include "86box.h"
#include "ibm.h"
#include "io.h"
#include "pic.h"
#include "pit.h"
#include "ppi.h"
#include "timer.h"
#include "sound/sound.h"
#include "sound/snd_speaker.h"
#include "keyboard.h"
#include "keyboard_amstrad.h"
#define STAT_PARITY 0x80
#define STAT_RTIMEOUT 0x40
#define STAT_TTIMEOUT 0x20
#define STAT_LOCK 0x10
#define STAT_CD 0x08
#define STAT_SYSFLAG 0x04
#define STAT_IFULL 0x02
#define STAT_OFULL 0x01
struct
{
int wantirq;
uint8_t key_waiting;
uint8_t pa;
uint8_t pb;
} keyboard_amstrad;
static uint8_t key_queue[16];
static int key_queue_start = 0, key_queue_end = 0;
static uint8_t amstrad_systemstat_1, amstrad_systemstat_2;
void keyboard_amstrad_poll(void)
{
keybsenddelay += (1000 * TIMER_USEC);
if (keyboard_amstrad.wantirq)
{
keyboard_amstrad.wantirq = 0;
keyboard_amstrad.pa = keyboard_amstrad.key_waiting;
picint(2);
#if ENABLE_KEYBOARD_LOG
pclog("keyboard_amstrad : take IRQ\n");
#endif
}
if (key_queue_start != key_queue_end && !keyboard_amstrad.pa)
{
keyboard_amstrad.key_waiting = key_queue[key_queue_start];
#if ENABLE_KEYBOARD_LOG
pclog("Reading %02X from the key queue at %i\n", keyboard_amstrad.key_waiting, key_queue_start);
#endif
key_queue_start = (key_queue_start + 1) & 0xf;
keyboard_amstrad.wantirq = 1;
}
}
void keyboard_amstrad_adddata(uint8_t val)
{
key_queue[key_queue_end] = val;
#if ENABLE_KEYBOARD_LOG
pclog("keyboard_amstrad : %02X added to key queue at %i\n", val, key_queue_end);
#endif
key_queue_end = (key_queue_end + 1) & 0xf;
return;
}
void keyboard_amstrad_write(uint16_t port, uint8_t val, void *priv)
{
#if ENABLE_KEYBOARD_LOG
pclog("keyboard_amstrad : write %04X %02X %02X\n", port, val, keyboard_amstrad.pb);
#endif
switch (port)
{
case 0x61:
#if ENABLE_KEYBOARD_LOG
pclog("keyboard_amstrad : pb write %02X %02X %i %02X %i\n", val, keyboard_amstrad.pb, !(keyboard_amstrad.pb & 0x40), keyboard_amstrad.pb & 0x40, (val & 0x40));
#endif
if (!(keyboard_amstrad.pb & 0x40) && (val & 0x40)) /*Reset keyboard*/
{
#if ENABLE_KEYBOARD_LOG
pclog("keyboard_amstrad : reset keyboard\n");
#endif
keyboard_amstrad_adddata(0xaa);
}
keyboard_amstrad.pb = val;
ppi.pb = val;
timer_process();
timer_update_outstanding();
speaker_update();
speaker_gated = val & 1;
speaker_enable = val & 2;
if (speaker_enable)
was_speaker_enable = 1;
pit_set_gate(&pit, 2, val & 1);
if (val & 0x80)
keyboard_amstrad.pa = 0;
break;
case 0x63:
break;
case 0x64:
amstrad_systemstat_1 = val;
break;
case 0x65:
amstrad_systemstat_2 = val;
break;
default:
pclog("\nBad XT keyboard write %04X %02X\n", port, val);
}
}
uint8_t keyboard_amstrad_read(uint16_t port, void *priv)
{
uint8_t temp = 0xff;
switch (port)
{
case 0x60:
if (keyboard_amstrad.pb & 0x80)
{
temp = (amstrad_systemstat_1 | 0xd) & 0x7f;
}
else
{
temp = keyboard_amstrad.pa;
if (key_queue_start == key_queue_end)
{
keyboard_amstrad.wantirq = 0;
}
else
{
keyboard_amstrad.key_waiting = key_queue[key_queue_start];
key_queue_start = (key_queue_start + 1) & 0xf;
keyboard_amstrad.wantirq = 1;
}
}
break;
case 0x61:
temp = keyboard_amstrad.pb;
break;
case 0x62:
if (keyboard_amstrad.pb & 0x04)
temp = amstrad_systemstat_2 & 0xf;
else
temp = amstrad_systemstat_2 >> 4;
temp |= (ppispeakon ? 0x20 : 0);
if (nmi)
temp |= 0x40;
break;
default:
pclog("\nBad XT keyboard read %04X\n", port);
}
return temp;
}
void keyboard_amstrad_reset(void)
{
keyboard_amstrad.wantirq = 0;
keyboard_scan = 1;
}
void keyboard_amstrad_init(void)
{
#if ENABLE_KEYBOARD_LOG
pclog("keyboard_amstrad_init\n");
#endif
io_sethandler(0x0060, 0x0006, keyboard_amstrad_read, NULL, NULL, keyboard_amstrad_write, NULL, NULL, NULL);
keyboard_amstrad_reset();
keyboard_send = keyboard_amstrad_adddata;
keyboard_poll = keyboard_amstrad_poll;
timer_add((void (*)(void *))keyboard_amstrad_poll, &keybsenddelay, TIMER_ALWAYS_ENABLED, NULL);
}

View File

@@ -1,6 +0,0 @@
/* Copyright holders: Sarah Walker
see COPYING for more details
*/
extern void keyboard_amstrad_init(void);
extern void keyboard_amstrad_reset(void);
extern void keyboard_amstrad_poll(void);

File diff suppressed because it is too large Load Diff

View File

@@ -1,31 +0,0 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Intel 8042 (AT keyboard controller) emulation.
*
* Version: @(#)keyboard_at.h 1.0.1 2017/08/23
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016,2017 Miran Grca.
*/
extern int mouse_queue_start, mouse_queue_end;
extern int mouse_scan;
extern void keyboard_at_init(void);
extern void keyboard_at_init_ps2(void);
extern void keyboard_at_reset(void);
extern void keyboard_at_adddata_keyboard_raw(uint8_t val);
extern void keyboard_at_adddata_mouse(uint8_t val);
extern void keyboard_at_set_mouse(void (*mouse_write)(uint8_t val, void *p), void *p);
uint8_t keyboard_at_get_mouse_scan(void);
void keyboard_at_set_mouse_scan(uint8_t val);

View File

@@ -1,361 +0,0 @@
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#include "86box.h"
#include "io.h"
#include "pic.h"
#include "pit.h"
#include "ppi.h"
#include "timer.h"
#include "mouse.h"
#include "sound/sound.h"
#include "sound/snd_speaker.h"
#include "keyboard.h"
#include "keyboard_olim24.h"
#define STAT_PARITY 0x80
#define STAT_RTIMEOUT 0x40
#define STAT_TTIMEOUT 0x20
#define STAT_LOCK 0x10
#define STAT_CD 0x08
#define STAT_SYSFLAG 0x04
#define STAT_IFULL 0x02
#define STAT_OFULL 0x01
struct
{
int wantirq;
uint8_t command;
uint8_t status;
uint8_t out;
uint8_t output_port;
int param, param_total;
uint8_t params[16];
int mouse_mode;
} keyboard_olim24;
static uint8_t key_queue[16];
static int key_queue_start = 0, key_queue_end = 0;
static uint8_t mouse_scancodes[7];
static void keyboard_olim24_poll(void)
{
keybsenddelay += (1000LL * TIMER_USEC);
if (keyboard_olim24.wantirq)
{
keyboard_olim24.wantirq = 0;
picint(2);
#if ENABLE_KEYBOARD_LOG
pclog("keyboard_olim24 : take IRQ\n");
#endif
}
if (!(keyboard_olim24.status & STAT_OFULL) && key_queue_start != key_queue_end)
{
#if ENABLE_KEYBOARD_LOG
pclog("Reading %02X from the key queue at %i\n", keyboard_olim24.out, key_queue_start);
#endif
keyboard_olim24.out = key_queue[key_queue_start];
key_queue_start = (key_queue_start + 1) & 0xf;
keyboard_olim24.status |= STAT_OFULL;
keyboard_olim24.status &= ~STAT_IFULL;
keyboard_olim24.wantirq = 1;
}
}
void keyboard_olim24_adddata(uint8_t val)
{
key_queue[key_queue_end] = val;
key_queue_end = (key_queue_end + 1) & 0xf;
#if ENABLE_KEYBOARD_LOG
pclog("keyboard_olim24 : %02X added to key queue %02X\n", val, keyboard_olim24.status);
#endif
return;
}
static void keyboard_olim24_write(uint16_t port, uint8_t val, void *priv)
{
#if ENABLE_KEYBOARD_LOG
pclog("keyboard_olim24 : write %04X %02X\n", port, val);
#endif
/* if (ram[8] == 0xc3)
{
output = 3;
}*/
switch (port)
{
case 0x60:
if (keyboard_olim24.param != keyboard_olim24.param_total)
{
keyboard_olim24.params[keyboard_olim24.param++] = val;
if (keyboard_olim24.param == keyboard_olim24.param_total)
{
switch (keyboard_olim24.command)
{
case 0x11:
keyboard_olim24.mouse_mode = 0;
mouse_scancodes[0] = keyboard_olim24.params[0];
mouse_scancodes[1] = keyboard_olim24.params[1];
mouse_scancodes[2] = keyboard_olim24.params[2];
mouse_scancodes[3] = keyboard_olim24.params[3];
mouse_scancodes[4] = keyboard_olim24.params[4];
mouse_scancodes[5] = keyboard_olim24.params[5];
mouse_scancodes[6] = keyboard_olim24.params[6];
break;
case 0x12:
keyboard_olim24.mouse_mode = 1;
mouse_scancodes[0] = keyboard_olim24.params[0];
mouse_scancodes[1] = keyboard_olim24.params[1];
mouse_scancodes[2] = keyboard_olim24.params[2];
break;
default:
pclog("Bad keyboard command complete %02X\n", keyboard_olim24.command);
}
}
}
else
{
keyboard_olim24.command = val;
switch (val)
{
case 0x01: /*Self-test*/
break;
case 0x05: /*Read ID*/
keyboard_olim24_adddata(0x00);
break;
case 0x11:
keyboard_olim24.param = 0;
keyboard_olim24.param_total = 9;
break;
case 0x12:
keyboard_olim24.param = 0;
keyboard_olim24.param_total = 4;
break;
default:
pclog("Bad keyboard command %02X\n", val);
}
}
break;
case 0x61:
ppi.pb = val;
timer_process();
timer_update_outstanding();
speaker_update();
speaker_gated = val & 1;
speaker_enable = val & 2;
if (speaker_enable)
was_speaker_enable = 1;
pit_set_gate(&pit, 2, val & 1);
break;
}
}
static uint8_t keyboard_olim24_read(uint16_t port, void *priv)
{
uint8_t temp = 0xff;
switch (port)
{
case 0x60:
temp = keyboard_olim24.out;
if (key_queue_start == key_queue_end)
{
keyboard_olim24.status &= ~STAT_OFULL;
keyboard_olim24.wantirq = 0;
}
else
{
keyboard_olim24.out = key_queue[key_queue_start];
key_queue_start = (key_queue_start + 1) & 0xf;
keyboard_olim24.status |= STAT_OFULL;
keyboard_olim24.status &= ~STAT_IFULL;
keyboard_olim24.wantirq = 1;
}
break;
case 0x61:
return ppi.pb;
case 0x64:
temp = keyboard_olim24.status;
keyboard_olim24.status &= ~(STAT_RTIMEOUT | STAT_TTIMEOUT);
break;
default:
pclog("\nBad olim24 keyboard read %04X\n", port);
}
return temp;
}
void keyboard_olim24_reset(void)
{
keyboard_olim24.status = STAT_LOCK | STAT_CD;
keyboard_olim24.wantirq = 0;
keyboard_scan = 1;
keyboard_olim24.param = keyboard_olim24.param_total = 0;
keyboard_olim24.mouse_mode = 0;
mouse_scancodes[0] = 0x1c;
mouse_scancodes[1] = 0x53;
mouse_scancodes[2] = 0x01;
mouse_scancodes[3] = 0x4b;
mouse_scancodes[4] = 0x4d;
mouse_scancodes[5] = 0x48;
mouse_scancodes[6] = 0x50;
}
typedef struct mouse_olim24_t
{
int x, y, b;
} mouse_olim24_t;
uint8_t mouse_olim24_poll(int x, int y, int z, int b, void *p)
{
mouse_olim24_t *mouse = (mouse_olim24_t *)p;
mouse->x += x;
mouse->y += y;
if (((key_queue_end - key_queue_start) & 0xf) > 14)
return(0xff);
if ((b & 1) && !(mouse->b & 1))
keyboard_olim24_adddata(mouse_scancodes[0]);
if (!(b & 1) && (mouse->b & 1))
keyboard_olim24_adddata(mouse_scancodes[0] | 0x80);
mouse->b = (mouse->b & ~1) | (b & 1);
if (((key_queue_end - key_queue_start) & 0xf) > 14)
return(0xff);
if ((b & 2) && !(mouse->b & 2))
keyboard_olim24_adddata(mouse_scancodes[2]);
if (!(b & 2) && (mouse->b & 2))
keyboard_olim24_adddata(mouse_scancodes[2] | 0x80);
mouse->b = (mouse->b & ~2) | (b & 2);
if (((key_queue_end - key_queue_start) & 0xf) > 14)
return(0xff);
if ((b & 4) && !(mouse->b & 4))
keyboard_olim24_adddata(mouse_scancodes[1]);
if (!(b & 4) && (mouse->b & 4))
keyboard_olim24_adddata(mouse_scancodes[1] | 0x80);
mouse->b = (mouse->b & ~4) | (b & 4);
if (keyboard_olim24.mouse_mode)
{
if (((key_queue_end - key_queue_start) & 0xf) > 12)
return(0xff);
if (!mouse->x && !mouse->y)
return(0xff);
mouse->y = -mouse->y;
if (mouse->x < -127) mouse->x = -127;
if (mouse->x > 127) mouse->x = 127;
if (mouse->x < -127) mouse->x = 0x80 | ((-mouse->x) & 0x7f);
if (mouse->y < -127) mouse->y = -127;
if (mouse->y > 127) mouse->y = 127;
if (mouse->y < -127) mouse->y = 0x80 | ((-mouse->y) & 0x7f);
keyboard_olim24_adddata(0xfe);
keyboard_olim24_adddata(mouse->x);
keyboard_olim24_adddata(mouse->y);
mouse->x = mouse->y = 0;
}
else
{
while (mouse->x < -4)
{
if (((key_queue_end - key_queue_start) & 0xf) > 14)
return(0xff);
mouse->x += 4;
keyboard_olim24_adddata(mouse_scancodes[3]);
}
while (mouse->x > 4)
{
if (((key_queue_end - key_queue_start) & 0xf) > 14)
return(0xff);
mouse->x -= 4;
keyboard_olim24_adddata(mouse_scancodes[4]);
}
while (mouse->y < -4)
{
if (((key_queue_end - key_queue_start) & 0xf) > 14)
return(0xff);
mouse->y += 4;
keyboard_olim24_adddata(mouse_scancodes[5]);
}
while (mouse->y > 4)
{
if (((key_queue_end - key_queue_start) & 0xf) > 14)
return(0xff);
mouse->y -= 4;
keyboard_olim24_adddata(mouse_scancodes[6]);
}
}
return(0);
}
static void *mouse_olim24_init(mouse_t *info)
{
mouse_olim24_t *mouse = (mouse_olim24_t *)malloc(sizeof(mouse_olim24_t));
memset(mouse, 0, sizeof(mouse_olim24_t));
return mouse;
}
static void mouse_olim24_close(void *p)
{
mouse_olim24_t *mouse = (mouse_olim24_t *)p;
free(mouse);
}
mouse_t mouse_olim24 =
{
"Olivetti M24 mouse",
"olim24",
MOUSE_TYPE_OLIM24,
mouse_olim24_init,
mouse_olim24_close,
mouse_olim24_poll
};
void keyboard_olim24_init(void)
{
io_sethandler(0x0060, 0x0002, keyboard_olim24_read, NULL, NULL, keyboard_olim24_write, NULL, NULL, NULL);
io_sethandler(0x0064, 0x0001, keyboard_olim24_read, NULL, NULL, keyboard_olim24_write, NULL, NULL, NULL);
keyboard_olim24_reset();
keyboard_send = keyboard_olim24_adddata;
keyboard_poll = keyboard_olim24_poll;
timer_add((void(*)(void *))keyboard_olim24_poll, &keybsenddelay, TIMER_ALWAYS_ENABLED, NULL);
}

View File

@@ -1,2 +0,0 @@
extern void keyboard_olim24_init(void);
extern void keyboard_olim24_reset(void);

View File

@@ -1,205 +0,0 @@
/* Copyright holders: Sarah Walker
see COPYING for more details
*/
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <wchar.h>
#include "86box.h"
#include "ibm.h"
#include "io.h"
#include "mem.h"
#include "nmi.h"
#include "pic.h"
#include "pit.h"
#include "timer.h"
#include "device.h"
#include "sound/sound.h"
#include "sound/snd_speaker.h"
#include "sound/snd_sn76489.h"
#include "keyboard.h"
#include "keyboard_pcjr.h"
#define STAT_PARITY 0x80
#define STAT_RTIMEOUT 0x40
#define STAT_TTIMEOUT 0x20
#define STAT_LOCK 0x10
#define STAT_CD 0x08
#define STAT_SYSFLAG 0x04
#define STAT_IFULL 0x02
#define STAT_OFULL 0x01
struct
{
int latched;
int data;
int serial_data[44];
int serial_pos;
uint8_t pa;
uint8_t pb;
} keyboard_pcjr;
static uint8_t key_queue[16];
static int key_queue_start = 0, key_queue_end = 0;
void keyboard_pcjr_poll()
{
keybsenddelay += (220LL * TIMER_USEC);
if (key_queue_start != key_queue_end && !keyboard_pcjr.serial_pos && !keyboard_pcjr.latched)
{
int c;
int p = 0;
uint8_t key = key_queue[key_queue_start];
key_queue_start = (key_queue_start + 1) & 0xf;
keyboard_pcjr.latched = 1;
keyboard_pcjr.serial_data[0] = 1; /*Start bit*/
keyboard_pcjr.serial_data[1] = 0;
for (c = 0; c < 8; c++)
{
if (key & (1 << c))
{
keyboard_pcjr.serial_data[(c + 1) * 2] = 1;
keyboard_pcjr.serial_data[(c + 1) * 2 + 1] = 0;
p++;
}
else
{
keyboard_pcjr.serial_data[(c + 1) * 2] = 0;
keyboard_pcjr.serial_data[(c + 1) * 2 + 1] = 1;
}
}
if (p & 1) /*Parity*/
{
keyboard_pcjr.serial_data[9 * 2] = 1;
keyboard_pcjr.serial_data[9 * 2 + 1] = 0;
}
else
{
keyboard_pcjr.serial_data[9 * 2] = 0;
keyboard_pcjr.serial_data[9 * 2 + 1] = 1;
}
for (c = 0; c < 11; c++) /*11 stop bits*/
{
keyboard_pcjr.serial_data[(c + 10) * 2] = 0;
keyboard_pcjr.serial_data[(c + 10) * 2 + 1] = 0;
}
keyboard_pcjr.serial_pos++;
}
if (keyboard_pcjr.serial_pos)
{
keyboard_pcjr.data = keyboard_pcjr.serial_data[keyboard_pcjr.serial_pos - 1];
nmi = keyboard_pcjr.data;
keyboard_pcjr.serial_pos++;
if (keyboard_pcjr.serial_pos == 42+1)
keyboard_pcjr.serial_pos = 0;
}
}
void keyboard_pcjr_adddata(uint8_t val)
{
key_queue[key_queue_end] = val;
key_queue_end = (key_queue_end + 1) & 0xf;
return;
}
void keyboard_pcjr_write(uint16_t port, uint8_t val, void *priv)
{
switch (port)
{
case 0x60:
keyboard_pcjr.pa = val;
break;
case 0x61:
keyboard_pcjr.pb = val;
timer_process();
timer_update_outstanding();
speaker_update();
speaker_gated = val & 1;
speaker_enable = val & 2;
if (speaker_enable)
was_speaker_enable = 1;
pit_set_gate(&pit, 2, val & 1);
sn76489_mute = speaker_mute = 1;
switch (val & 0x60)
{
case 0x00:
speaker_mute = 0;
break;
case 0x60:
sn76489_mute = 0;
break;
}
break;
case 0xa0:
nmi_mask = val & 0x80;
pit_set_using_timer(&pit, 1, !(val & 0x20));
break;
}
}
uint8_t keyboard_pcjr_read(uint16_t port, void *priv)
{
uint8_t temp;
switch (port)
{
case 0x60:
temp = keyboard_pcjr.pa;
break;
case 0x61:
temp = keyboard_pcjr.pb;
break;
case 0x62:
temp = (keyboard_pcjr.latched ? 1 : 0);
temp |= 0x02; /*Modem card not installed*/
temp |= (ppispeakon ? 0x10 : 0);
temp |= (ppispeakon ? 0x20 : 0);
temp |= (keyboard_pcjr.data ? 0x40: 0);
if (keyboard_pcjr.data)
temp |= 0x40;
break;
case 0xa0:
keyboard_pcjr.latched = 0;
temp = 0;
break;
default:
pclog("\nBad XT keyboard read %04X\n", port);
temp = 0xff;
}
return temp;
}
void keyboard_pcjr_reset()
{
}
void keyboard_pcjr_init()
{
io_sethandler(0x0060, 0x0004, keyboard_pcjr_read, NULL, NULL, keyboard_pcjr_write, NULL, NULL, NULL);
io_sethandler(0x00a0, 0x0008, keyboard_pcjr_read, NULL, NULL, keyboard_pcjr_write, NULL, NULL, NULL);
keyboard_pcjr_reset();
keyboard_send = keyboard_pcjr_adddata;
keyboard_poll = keyboard_pcjr_poll;
timer_add((void (*)(void *))keyboard_pcjr_poll, &keybsenddelay, TIMER_ALWAYS_ENABLED, NULL);
}

View File

@@ -1,6 +0,0 @@
/* Copyright holders: Sarah Walker
see COPYING for more details
*/
extern void keyboard_pcjr_init(void);
extern void keyboard_pcjr_reset(void);
extern void keyboard_pcjr_poll(void);

View File

@@ -1,26 +1,43 @@
/* Copyright holders: Sarah Walker
see COPYING for more details
*/
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of the XT-style keyboard.
*
* Version: @(#)keyboard_xt.c 1.0.2 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>
*
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016,2017 Miran Grca.
* Copyright 2017 Fred N. van kempen.
*/
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#include "86box.h"
#include "ibm.h"
#include "machine/machine.h"
#include "io.h"
#include "mem.h"
#include "rom.h"
#include "pic.h"
#include "pit.h"
#include "ppi.h"
#include "mem.h"
#include "rom.h"
#include "timer.h"
#include "device.h"
#include "tandy_eeprom.h"
#include "sound/sound.h"
#include "sound/snd_speaker.h"
#include "video/video.h"
#include "keyboard.h"
#include "keyboard_xt.h"
#define STAT_PARITY 0x80
@@ -33,163 +50,359 @@
#define STAT_OFULL 0x01
struct
typedef struct {
int blocked;
uint8_t pa;
uint8_t pb;
int tandy;
} xtkbd_t;
/*XT keyboard has no escape scancodes, and no scancodes beyond 53*/
static scancode scancode_xt[272] = {
{ {-1}, {-1} }, { {0x01, -1}, {0x81, -1} },
{ {0x02, -1}, {0x82, -1} }, { {0x03, -1}, {0x83, -1} },
{ {0x04, -1}, {0x84, -1} }, { {0x05, -1}, {0x85, -1} },
{ {0x06, -1}, {0x86, -1} }, { {0x07, -1}, {0x87, -1} },
{ {0x08, -1}, {0x88, -1} }, { {0x09, -1}, {0x89, -1} },
{ {0x0a, -1}, {0x8a, -1} }, { {0x0b, -1}, {0x8b, -1} },
{ {0x0c, -1}, {0x8c, -1} }, { {0x0d, -1}, {0x8d, -1} },
{ {0x0e, -1}, {0x8e, -1} }, { {0x0f, -1}, {0x8f, -1} },
{ {0x10, -1}, {0x90, -1} }, { {0x11, -1}, {0x91, -1} },
{ {0x12, -1}, {0x92, -1} }, { {0x13, -1}, {0x93, -1} },
{ {0x14, -1}, {0x94, -1} }, { {0x15, -1}, {0x95, -1} },
{ {0x16, -1}, {0x96, -1} }, { {0x17, -1}, {0x97, -1} },
{ {0x18, -1}, {0x98, -1} }, { {0x19, -1}, {0x99, -1} },
{ {0x1a, -1}, {0x9a, -1} }, { {0x1b, -1}, {0x9b, -1} },
{ {0x1c, -1}, {0x9c, -1} }, { {0x1d, -1}, {0x9d, -1} },
{ {0x1e, -1}, {0x9e, -1} }, { {0x1f, -1}, {0x9f, -1} },
{ {0x20, -1}, {0xa0, -1} }, { {0x21, -1}, {0xa1, -1} },
{ {0x22, -1}, {0xa2, -1} }, { {0x23, -1}, {0xa3, -1} },
{ {0x24, -1}, {0xa4, -1} }, { {0x25, -1}, {0xa5, -1} },
{ {0x26, -1}, {0xa6, -1} }, { {0x27, -1}, {0xa7, -1} },
{ {0x28, -1}, {0xa8, -1} }, { {0x29, -1}, {0xa9, -1} },
{ {0x2a, -1}, {0xaa, -1} }, { {0x2b, -1}, {0xab, -1} },
{ {0x2c, -1}, {0xac, -1} }, { {0x2d, -1}, {0xad, -1} },
{ {0x2e, -1}, {0xae, -1} }, { {0x2f, -1}, {0xaf, -1} },
{ {0x30, -1}, {0xb0, -1} }, { {0x31, -1}, {0xb1, -1} },
{ {0x32, -1}, {0xb2, -1} }, { {0x33, -1}, {0xb3, -1} },
{ {0x34, -1}, {0xb4, -1} }, { {0x35, -1}, {0xb5, -1} },
{ {0x36, -1}, {0xb6, -1} }, { {0x37, -1}, {0xb7, -1} },
{ {0x38, -1}, {0xb8, -1} }, { {0x39, -1}, {0xb9, -1} },
{ {0x3a, -1}, {0xba, -1} }, { {0x3b, -1}, {0xbb, -1} },
{ {0x3c, -1}, {0xbc, -1} }, { {0x3d, -1}, {0xbd, -1} },
{ {0x3e, -1}, {0xbe, -1} }, { {0x3f, -1}, {0xbf, -1} },
{ {0x40, -1}, {0xc0, -1} }, { {0x41, -1}, {0xc1, -1} },
{ {0x42, -1}, {0xc2, -1} }, { {0x43, -1}, {0xc3, -1} },
{ {0x44, -1}, {0xc4, -1} }, { {0x45, -1}, {0xc5, -1} },
{ {0x46, -1}, {0xc6, -1} }, { {0x47, -1}, {0xc7, -1} },
{ {0x48, -1}, {0xc8, -1} }, { {0x49, -1}, {0xc9, -1} },
{ {0x4a, -1}, {0xca, -1} }, { {0x4b, -1}, {0xcb, -1} },
{ {0x4c, -1}, {0xcc, -1} }, { {0x4d, -1}, {0xcd, -1} },
{ {0x4e, -1}, {0xce, -1} }, { {0x4f, -1}, {0xcf, -1} },
{ {0x50, -1}, {0xd0, -1} }, { {0x51, -1}, {0xd1, -1} },
{ {0x52, -1}, {0xd2, -1} }, { {0x53, -1}, {0xd3, -1} },
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*54*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*58*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*5c*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*60*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*64*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*68*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*6c*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*70*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*74*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*78*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*7c*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*80*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*84*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*88*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*8c*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*90*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*94*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*98*/
{ {0x1c, -1}, {0x9c, -1} }, { {0x1d, -1}, {0x9d, -1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*9c*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*a0*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*a4*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {0xaa, -1}, {0x2a, -1} }, { {-1}, {-1} }, /*a8*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*ac*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*b0*/
{ {-1}, {-1} }, { {0x35, -1}, {0xb5, -1} },
{ {0xb6, -1}, {0x36, -1} }, { {0x37, -1}, {0xb7, -1} }, /*b4*/
{ {0x38, -1}, {0xb8, -1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*b8*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*bc*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*c0*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {0x46, -1}, {0xc6, -1} }, { {0x47, -1}, {0xc7, -1} }, /*c4*/
{ {0x48, -1}, {0xc8, -1} }, { {0x49, -1}, {0xc9, -1} },
{ {-1}, {-1} }, { {0x4b, -1}, {0xcb, -1} }, /*c8*/
{ {-1}, {-1} }, { {0x4d, -1}, {0xcd, -1} },
{ {-1}, {-1} }, { {0x4f, -1}, {0xcf, -1} }, /*cc*/
{ {0x50, -1}, {0xd0, -1} }, { {0x51, -1}, {0xd1, -1} },
{ {0x52, -1}, {0xd2, -1} }, { {0x53, -1}, {0xd3, -1} }, /*d0*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*d4*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*d8*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*dc*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*e0*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*e4*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*e8*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*ec*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*f0*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*f4*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*f8*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*fc*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*100*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*104*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*108*/
{ {-1}, {-1} }, { {-1}, {-1} },
{ {-1}, {-1} }, { {-1}, {-1} }, /*10c*/
};
static uint8_t key_queue[16];
static int key_queue_start,
key_queue_end;
static void
kbd_poll(void *priv)
{
int blocked;
uint8_t pa;
uint8_t pb;
int tandy;
} keyboard_xt;
xtkbd_t *kbd = (xtkbd_t *)priv;
static uint8_t key_queue[16];
static int key_queue_start = 0, key_queue_end = 0;
keyboard_delay += (1000LL * TIMER_USEC);
static void keyboard_xt_poll(void)
{
keybsenddelay += (1000LL * TIMER_USEC);
if (key_queue_start != key_queue_end && !keyboard_xt.blocked)
{
keyboard_xt.pa = key_queue[key_queue_start];
picint(2);
if (key_queue_start != key_queue_end && !kbd->blocked) {
kbd->pa = key_queue[key_queue_start];
picint(2);
#if ENABLE_KEYBOARD_LOG
pclog("Reading %02X from the key queue at %i\n", keyboard_xt.pa, key_queue_start);
pclog("Reading %02X from the key queue at %i\n",
kbd->pa, key_queue_start);
#endif
key_queue_start = (key_queue_start + 1) & 0xf;
keyboard_xt.blocked = 1;
}
key_queue_start = (key_queue_start + 1) & 0xf;
kbd->blocked = 1;
}
}
void keyboard_xt_adddata(uint8_t val)
static void
kbd_adddata(uint8_t val)
{
key_queue[key_queue_end] = val;
key_queue[key_queue_end] = val;
#if ENABLE_KEYBOARD_LOG
pclog("keyboard_xt : %02X added to key queue at %i\n", val, key_queue_end);
pclog("XTkbd: %02X added to key queue at %i\n",
val, key_queue_end);
#endif
key_queue_end = (key_queue_end + 1) & 0xf;
return;
key_queue_end = (key_queue_end + 1) & 0xf;
}
static void keyboard_xt_write(uint16_t port, uint8_t val, void *priv)
{
switch (port)
{
case 0x61:
if (!(keyboard_xt.pb & 0x40) && (val & 0x40)) /*Reset keyboard*/
{
#if ENABLE_KEYBOARD_LOG
pclog("keyboard_xt : reset keyboard\n");
#endif
key_queue_end = key_queue_start;
keyboard_xt_adddata(0xaa);
}
if ((keyboard_xt.pb & 0x80)==0 && (val & 0x80)!=0)
{
keyboard_xt.pa = 0;
keyboard_xt.blocked = 0;
picintc(2);
}
keyboard_xt.pb = val;
ppi.pb = val;
timer_process();
timer_update_outstanding();
speaker_update();
speaker_gated = val & 1;
speaker_enable = val & 2;
if (speaker_enable)
was_speaker_enable = 1;
pit_set_gate(&pit, 2, val & 1);
break;
}
static void
kbd_write(uint16_t port, uint8_t val, void *priv)
{
xtkbd_t *kbd = (xtkbd_t *)priv;
if (port != 0x61) return;
if (!(kbd->pb & 0x40) && (val & 0x40)) { /*Reset keyboard*/
#if ENABLE_KEYBOARD_LOG
pclog("XTkbd: reset keyboard\n");
#endif
key_queue_end = key_queue_start;
kbd_adddata(0xaa);
}
if ((kbd->pb & 0x80)==0 && (val & 0x80)!=0) {
kbd->pa = 0;
kbd->blocked = 0;
picintc(2);
}
kbd->pb = val;
ppi.pb = val;
timer_process();
timer_update_outstanding();
speaker_update();
speaker_gated = val & 1;
speaker_enable = val & 2;
if (speaker_enable)
was_speaker_enable = 1;
pit_set_gate(&pit, 2, val & 1);
}
static uint8_t keyboard_xt_read(uint16_t port, void *priv)
static uint8_t
kbd_read(uint16_t port, void *priv)
{
uint8_t temp;
switch (port)
{
case 0x60:
if ((romset == ROM_IBMPC) && (keyboard_xt.pb & 0x80))
{
xtkbd_t *kbd = (xtkbd_t *)priv;
uint8_t ret = 0xff;
switch (port) {
case 0x60:
if ((romset == ROM_IBMPC) && (kbd->pb & 0x80)) {
if (VGA || gfxcard == GFX_EGA)
temp = 0x4D;
else if (MDA)
temp = 0x7D;
ret = 0x4D;
else if (MDA)
ret = 0x7D;
else
ret = 0x6D;
} else
ret = kbd->pa;
break;
case 0x61:
ret = kbd->pb;
break;
case 0x62:
if (romset == ROM_IBMPC) {
if (kbd->pb & 0x04)
ret = ((mem_size-64) / 32) & 0xf;
else
temp = 0x6D;
ret = ((mem_size-64) / 32) >> 4;
} else {
if (kbd->pb & 0x08) {
if (VGA || gfxcard == GFX_EGA)
ret = 4;
else if (MDA)
ret = 7;
else
ret = 6;
} else
ret = 0x0D;
}
else
temp = keyboard_xt.pa;
break;
case 0x61:
temp = keyboard_xt.pb;
break;
case 0x62:
if (romset == ROM_IBMPC)
{
if (keyboard_xt.pb & 0x04)
temp = ((mem_size-64) / 32) & 0xf;
else
temp = ((mem_size-64) / 32) >> 4;
}
else
{
if (keyboard_xt.pb & 0x08)
{
if (VGA || gfxcard == GFX_EGA)
temp = 4;
else if (MDA)
temp = 7;
else
temp = 6;
}
else
temp = 0xD;
}
temp |= (ppispeakon ? 0x20 : 0);
if (keyboard_xt.tandy)
temp |= (tandy_eeprom_read() ? 0x10 : 0);
break;
default:
pclog("\nBad XT keyboard read %04X\n", port);
temp = 0xff;
}
return temp;
ret |= (ppispeakon ? 0x20 : 0);
if (kbd->tandy)
ret |= (tandy_eeprom_read() ? 0x10 : 0);
break;
default:
pclog("\nXTkbd: bad read %04X\n", port);
ret = 0xff;
}
return(ret);
}
void keyboard_xt_reset(void)
static void
kbd_reset(void *priv)
{
keyboard_xt.blocked = 0;
keyboard_scan = 1;
xtkbd_t *kbd = (xtkbd_t *)priv;
kbd->blocked = 0;
kbd->pa = 0x00;
kbd->pb = 0x00;
key_queue_start = 0,
key_queue_end = 0;
}
void keyboard_xt_init(void)
static void *
kbd_init(device_t *info)
{
io_sethandler(0x0060, 0x0004, keyboard_xt_read, NULL, NULL, keyboard_xt_write, NULL, NULL, NULL);
keyboard_xt_reset();
keyboard_send = keyboard_xt_adddata;
keyboard_poll = keyboard_xt_poll;
keyboard_xt.tandy = 0;
xtkbd_t *kbd;
timer_add((void (*)(void *))keyboard_xt_poll, &keybsenddelay, TIMER_ALWAYS_ENABLED, NULL);
kbd = (xtkbd_t *)malloc(sizeof(xtkbd_t));
memset(kbd, 0x00, sizeof(xtkbd_t));
keyboard_set_table(scancode_xt);
if (info->local == 1) {
kbd->tandy = 1;
}
keyboard_scan = 1;
io_sethandler(0x0060, 4,
kbd_read, NULL, NULL, kbd_write, NULL, NULL, kbd);
keyboard_send = kbd_adddata;
timer_add(kbd_poll, &keyboard_delay, TIMER_ALWAYS_ENABLED, kbd);
return(kbd);
}
void keyboard_tandy_init(void)
static void
kbd_close(void *priv)
{
io_sethandler(0x0060, 0x0004, keyboard_xt_read, NULL, NULL, keyboard_xt_write, NULL, NULL, NULL);
keyboard_xt_reset();
keyboard_send = keyboard_xt_adddata;
keyboard_poll = keyboard_xt_poll;
keyboard_xt.tandy = (romset != ROM_TANDY) ? 1 : 0;
timer_add((void (*)(void *))keyboard_xt_poll, &keybsenddelay, TIMER_ALWAYS_ENABLED, NULL);
xtkbd_t *kbd = (xtkbd_t *)priv;
/* Stop the timer. */
keyboard_delay = 0;
/* Disable scanning. */
keyboard_scan = 0;
keyboard_send = NULL;
io_removehandler(0x0060, 4,
kbd_read, NULL, NULL, kbd_write, NULL, NULL, kbd);
free(kbd);
}
device_t keyboard_xt_device = {
"PC/XT Keyboard",
0,
0,
kbd_init,
kbd_close,
kbd_reset,
NULL, NULL, NULL, NULL
};
device_t keyboard_tandy_device = {
"Tandy 1000 Keyboard",
0,
1,
kbd_init,
kbd_close,
kbd_reset,
NULL, NULL, NULL, NULL
};

View File

@@ -1,6 +0,0 @@
/* Copyright holders: Sarah Walker
see COPYING for more details
*/
extern void keyboard_xt_init(void);
extern void keyboard_tandy_init(void);
extern void keyboard_xt_reset(void);

349
src/machine/m_amstrad.c Normal file
View File

@@ -0,0 +1,349 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Emulation of the Amstrad series PC's.
*
* Version: @(#)m_amstrad.c 1.0.2 2017/11/03
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>
*
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016,2017 Miran Grca.
* Copyright 2017 Fred N. van Kempen.
*/
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#include "../86box.h"
#include "../io.h"
#include "../nmi.h"
#include "../pic.h"
#include "../pit.h"
#include "../ppi.h"
#include "../mem.h"
#include "../rom.h"
#include "../timer.h"
#include "../device.h"
#include "../nvr.h"
#include "../keyboard.h"
#include "../mouse.h"
#include "../game/gameport.h"
#include "../lpt.h"
#include "../sound/sound.h"
#include "../sound/snd_speaker.h"
#include "../floppy/floppy.h"
#include "../floppy/fdd.h"
#include "../floppy/fdc.h"
#include "machine.h"
#define STAT_PARITY 0x80
#define STAT_RTIMEOUT 0x40
#define STAT_TTIMEOUT 0x20
#define STAT_LOCK 0x10
#define STAT_CD 0x08
#define STAT_SYSFLAG 0x04
#define STAT_IFULL 0x02
#define STAT_OFULL 0x01
typedef struct {
/* Machine stuff. */
uint8_t dead;
uint8_t systemstat_1,
systemstat_2;
/* Keyboard stuff. */
int8_t wantirq;
uint8_t key_waiting;
uint8_t pa;
uint8_t pb;
/* Mouse stuff. */
uint8_t mousex,
mousey;
int oldb;
} amstrad_t;
static uint8_t key_queue[16];
static int key_queue_start = 0,
key_queue_end = 0;
static void
ms_write(uint16_t addr, uint8_t val, void *priv)
{
amstrad_t *ams = (amstrad_t *)priv;
if (addr == 0x78)
ams->mousex = 0;
else
ams->mousey = 0;
}
static uint8_t
ms_read(uint16_t addr, void *priv)
{
amstrad_t *ams = (amstrad_t *)priv;
if (addr == 0x78)
return(ams->mousex);
return(ams->mousey);
}
static uint8_t
ms_poll(int x, int y, int z, int b, void *priv)
{
amstrad_t *ams = (amstrad_t *)priv;
ams->mousex += x;
ams->mousey -= y;
if ((b & 1) && !(ams->oldb & 1))
keyboard_send(0x7e);
if ((b & 2) && !(ams->oldb & 2))
keyboard_send(0x7d);
if (!(b & 1) && (ams->oldb & 1))
keyboard_send(0xfe);
if (!(b & 2) && (ams->oldb & 2))
keyboard_send(0xfd);
ams->oldb = b;
return(0);
}
static void
kbd_adddata(uint8_t val)
{
key_queue[key_queue_end] = val;
#if ENABLE_KEYBOARD_LOG
pclog("keyboard_amstrad : %02X added to key queue at %i\n",
val, key_queue_end);
#endif
key_queue_end = (key_queue_end + 1) & 0xf;
}
static void
kbd_write(uint16_t port, uint8_t val, void *priv)
{
amstrad_t *ams = (amstrad_t *)priv;
#if ENABLE_KEYBOARD_LOG
pclog("keyboard_amstrad : write %04X %02X %02X\n", port, val, ams->pb);
#endif
switch (port) {
case 0x61:
#if ENABLE_KEYBOARD_LOG
pclog("keyboard_amstrad : pb write %02X %02X %i %02X %i\n",
val, ams->pb, !(ams->pb&0x40), ams->pb&0x40, (val&0x40));
#endif
if (!(ams->pb & 0x40) && (val & 0x40)) { /*Reset keyboard*/
#if ENABLE_KEYBOARD_LOG
pclog("keyboard_amstrad : reset keyboard\n");
#endif
kbd_adddata(0xaa);
}
ams->pb = val;
ppi.pb = val;
timer_process();
timer_update_outstanding();
speaker_update();
speaker_gated = val & 1;
speaker_enable = val & 2;
if (speaker_enable)
was_speaker_enable = 1;
pit_set_gate(&pit, 2, val & 1);
if (val & 0x80)
ams->pa = 0;
break;
case 0x63:
break;
case 0x64:
ams->systemstat_1 = val;
break;
case 0x65:
ams->systemstat_2 = val;
break;
default:
pclog("\nBad Amstrad keyboard write %04X %02X\n", port, val);
}
}
static uint8_t
kbd_read(uint16_t port, void *priv)
{
amstrad_t *ams = (amstrad_t *)priv;
uint8_t ret = 0xff;
switch (port) {
case 0x60:
if (ams->pb & 0x80) {
ret = (ams->systemstat_1 | 0xd) & 0x7f;
} else {
ret = ams->pa;
if (key_queue_start == key_queue_end) {
ams->wantirq = 0;
} else {
ams->key_waiting = key_queue[key_queue_start];
key_queue_start = (key_queue_start + 1) & 0xf;
ams->wantirq = 1;
}
}
break;
case 0x61:
ret = ams->pb;
break;
case 0x62:
if (ams->pb & 0x04)
ret = ams->systemstat_2 & 0xf;
else
ret = ams->systemstat_2 >> 4;
ret |= (ppispeakon ? 0x20 : 0);
if (nmi)
ret |= 0x40;
break;
default:
pclog("\nBad Amstrad keyboard read %04X\n", port);
}
return(ret);
}
static void
kbd_poll(void *priv)
{
amstrad_t *ams = (amstrad_t *)priv;
keyboard_delay += (1000 * TIMER_USEC);
if (ams->wantirq)
{
ams->wantirq = 0;
ams->pa = ams->key_waiting;
picint(2);
#if ENABLE_KEYBOARD_LOG
pclog("keyboard_amstrad : take IRQ\n");
#endif
}
if (key_queue_start != key_queue_end && !ams->pa) {
ams->key_waiting = key_queue[key_queue_start];
#if ENABLE_KEYBOARD_LOG
pclog("Reading %02X from the key queue at %i\n",
ams->key_waiting, key_queue_start);
#endif
key_queue_start = (key_queue_start + 1) & 0xf;
ams->wantirq = 1;
}
}
static uint8_t
amstrad_read(uint16_t port, void *priv)
{
amstrad_t *ams = (amstrad_t *)priv;
pclog("amstrad_read: %04X\n", port);
switch (port) {
case 0x379:
return(7);
case 0x37a:
if (romset == ROM_PC1512) return(0x20);
if (romset == ROM_PC200) return(0x80);
return(0);
case 0xdead:
return(ams->dead);
}
return(0xff);
}
static void
amstrad_write(uint16_t port, uint8_t val, void *priv)
{
amstrad_t *ams = (amstrad_t *)priv;
switch (port) {
case 0xdead:
ams->dead = val;
break;
}
}
void
machine_amstrad_init(machine_t *model)
{
amstrad_t *ams;
ams = (amstrad_t *)malloc(sizeof(amstrad_t));
memset(ams, 0x00, sizeof(amstrad_t));
machine_common_init(model);
lpt2_remove_ams();
io_sethandler(0x0379, 2,
amstrad_read, NULL, NULL, NULL, NULL, NULL, ams);
io_sethandler(0xdead, 1,
amstrad_read, NULL, NULL, amstrad_write, NULL, NULL, ams);
io_sethandler(0x0078, 1,
ms_read, NULL, NULL, ms_write, NULL, NULL, ams);
io_sethandler(0x007a, 1,
ms_read, NULL, NULL, ms_write, NULL, NULL, ams);
ams->wantirq = 0;
io_sethandler(0x0060, 6,
kbd_read, NULL, NULL, kbd_write, NULL, NULL, ams);
timer_add(kbd_poll, &keyboard_delay, TIMER_ALWAYS_ENABLED, ams);
keyboard_send = kbd_adddata;
keyboard_scan = 1;
/* Tell mouse driver about our internal mouse. */
mouse_setpoll(ms_poll, ams);
if (joystick_type != 7)
device_add(&gameport_device);
/* FIXME: make sure this is correct? */
nvr_at_init(1);
nmi_init();
fdc_set_dskchg_activelow();

View File

@@ -3,7 +3,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../pic.h"
#include "../pit.h"
#include "../dma.h"
@@ -11,7 +10,7 @@
#include "../device.h"
#include "../nvr.h"
#include "../game/gameport.h"
#include "../keyboard_at.h"
#include "../keyboard.h"
#include "../lpt.h"
#include "../disk/hdc.h"
#include "../disk/hdc_ide.h"
@@ -32,7 +31,7 @@ machine_at_init(machine_t *model)
nvr_at_init(8);
keyboard_at_init();
device_add(&keyboard_at_device);
if (joystick_type != 7)
device_add(&gameport_device);

View File

@@ -8,7 +8,7 @@
*
* Implementation of the Intel 430FX PCISet chip.
*
* Version: @(#)machine_at_430fx.c 1.0.7 2017/10/16
* Version: @(#)m_at_430fx.c 1.0.8 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -21,7 +21,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../mem.h"
#include "../memregs.h"
#include "../rom.h"

View File

@@ -8,7 +8,7 @@
*
* Implementation of the Intel 430HX PCISet chip.
*
* Version: @(#)machine_at_430hx.c 1.0.7 2017/10/16
* Version: @(#)m_at_430hx.c 1.0.8 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -21,7 +21,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../io.h"
#include "../mem.h"
#include "../memregs.h"

View File

@@ -8,7 +8,7 @@
*
* Implementation of the Intel 430LX and 430NX PCISet chips.
*
* Version: @(#)machine_at_430lx_nx.c 1.0.7 2017/10/16
* Version: @(#)m_at_430lx_nx.c 1.0.8 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -21,7 +21,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../mem.h"
#include "../memregs.h"
#include "../rom.h"

View File

@@ -8,7 +8,7 @@
*
* Implementation of the Intel 430VX PCISet chip.
*
* Version: @(#)machine_at_430vx.c 1.0.8 2017/10/16
* Version: @(#)m_at_430vx.c 1.0.9 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -21,7 +21,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../io.h"
#include "../pci.h"
#include "../mem.h"

View File

@@ -8,7 +8,7 @@
*
* Implementation of the Intel 440FX PCISet chip.
*
* Version: @(#)machine_at_440fx.c 1.0.7 2017/10/16
* Version: @(#)m_at_440fx.c 1.0.8 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -21,7 +21,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../io.h"
#include "../pci.h"
#include "../mem.h"

View File

@@ -6,7 +6,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../cpu/cpu.h"
#include "../io.h"
#include "../mem.h"

View File

@@ -3,7 +3,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../io.h"
#include "../lpt.h"
#include "../serial.h"

View File

@@ -6,7 +6,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../cpu/cpu.h"
#include "../mem.h"
#include "machine.h"

View File

@@ -6,7 +6,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../cpu/cpu.h"
#include "../io.h"
#include "../mem.h"

View File

@@ -7,7 +7,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../io.h"
#include "machine.h"

View File

@@ -256,7 +256,6 @@ SeeAlso: #P0178,#P0187
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../cpu/cpu.h"
#include "../io.h"
#include "../mem.h"

View File

@@ -10,7 +10,7 @@
*
* Re-worked version based on the 82C235 datasheet and errata.
*
* Version: @(#)at_scat.c 1.0.4 2017/10/18
* Version: @(#)m_at_scat.c 1.0.5 2017/11/04
*
* Authors: Original by GreatPsycho for PCem.
* Fred N. van Kempen, <decwiz@yahoo.com>
@@ -22,7 +22,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../cpu/cpu.h"
#include "../cpu/x86.h"
#include "../io.h"

View File

@@ -9,7 +9,7 @@
* SiS sis85c471 Super I/O Chip
* Used by DTK PKM-0038S E-2
*
* Version: @(#)sis85c471.c 1.0.7 2017/10/16
* Version: @(#)m_at_sis85c471.c 1.0.8 2017/11/04
*
* Author: Miran Grca, <mgrca8@gmail.com>
*
@@ -20,7 +20,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../io.h"
#include "../memregs.h"
#include "../device.h"

View File

@@ -7,7 +7,6 @@
#include <stdlib.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../cpu/cpu.h"
#include "../io.h"
#include "../pci.h"

View File

@@ -6,7 +6,7 @@
*
* Emulation of the SiS 50x PCI chips.
*
* Version: @(#)machine_at_sis_85c50x.c 1.0.4 2017/10/16
* Version: @(#)m_at_sis_85c50x.c 1.0.5 2017/11/04
*
* Author: Miran Grca, <mgrca8@gmail.com>
*
@@ -18,7 +18,6 @@
#include <stdlib.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../io.h"
#include "../pci.h"
#include "../mem.h"

View File

@@ -6,7 +6,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../io.h"
#include "../mem.h"
#include "../serial.h"

View File

@@ -3,7 +3,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../dma.h"
#include "../pic.h"
#include "../pit.h"

View File

@@ -6,16 +6,16 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../io.h"
#include "../nmi.h"
#include "../mem.h"
#include "../rom.h"
#include "../device.h"
#include "../nvr.h"
#include "../game/gameport.h"
#include "../keyboard_xt.h"
#include "../keyboard.h"
#include "../lpt.h"
#include "../game/gameport.h"
#include "../video/video.h"
#include "machine.h"
@@ -138,7 +138,7 @@ machine_europc_init(machine_t *model)
lpt3_init(0x3bc);
jim_init();
keyboard_xt_init();
device_add(&keyboard_xt_device);
nmi_init();
if (joystick_type != 7)
device_add(&gameport_device);

View File

@@ -0,0 +1,793 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Emulation of the Olivetti M24.
*
* Version: @(#)m_olivetti_m24.c 1.0.2 2017/11/03
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>
*
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016,2017 Miran Grca.
* Copyright 2017 Fred N. van Kempen.
*/
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#include "../86box.h"
#include "../io.h"
#include "../pic.h"
#include "../pit.h"
#include "../ppi.h"
#include "../nmi.h"
#include "../mem.h"
#include "../timer.h"
#include "../device.h"
#include "../nvr.h"
#include "../keyboard.h"
#include "../mouse.h"
#include "../game/gameport.h"
#include "../sound/sound.h"
#include "../sound/snd_speaker.h"
#include "../video/video.h"
#include "machine.h"
#define STAT_PARITY 0x80
#define STAT_RTIMEOUT 0x40
#define STAT_TTIMEOUT 0x20
#define STAT_LOCK 0x10
#define STAT_CD 0x08
#define STAT_SYSFLAG 0x04
#define STAT_IFULL 0x02
#define STAT_OFULL 0x01
typedef struct {
/* Video stuff. */
mem_mapping_t mapping;
uint8_t crtc[32];
int crtcreg;
uint8_t *vram;
uint8_t charbuffer[256];
uint8_t ctrl;
uint32_t base;
uint8_t cgamode, cgacol;
uint8_t stat;
int linepos, displine;
int sc, vc;
int con, coff, cursoron, blink;
int64_t vsynctime;
int vadj;
int lineff;
uint16_t ma, maback;
int dispon;
int64_t dispontime, dispofftime;
int64_t vidtime;
int firstline, lastline;
/* Keyboard stuff. */
int wantirq;
uint8_t command;
uint8_t status;
uint8_t out;
uint8_t output_port;
int param,
param_total;
uint8_t params[16];
uint8_t scan[7];
/* Mouse stuff. */
int mouse_mode;
int x, y, b;
} olim24_t;
static uint8_t crtcmask[32] = {
0xff, 0xff, 0xff, 0xff, 0x7f, 0x1f, 0x7f, 0x7f,
0xf3, 0x1f, 0x7f, 0x1f, 0x3f, 0xff, 0x3f, 0xff,
0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
};
static uint8_t key_queue[16];
static int key_queue_start = 0,
key_queue_end = 0;
static void
recalc_timings(olim24_t *m24)
{
double _dispontime, _dispofftime, disptime;
if (m24->cgamode & 1) {
disptime = m24->crtc[0] + 1;
_dispontime = m24->crtc[1];
} else {
disptime = (m24->crtc[0] + 1) << 1;
_dispontime = m24->crtc[1] << 1;
}
_dispofftime = disptime - _dispontime;
_dispontime *= CGACONST / 2;
_dispofftime *= CGACONST / 2;
m24->dispontime = (int64_t)(_dispontime * (1 << TIMER_SHIFT));
m24->dispofftime = (int64_t)(_dispofftime * (1 << TIMER_SHIFT));
}
static void
vid_out(uint16_t addr, uint8_t val, void *priv)
{
olim24_t *m24 = (olim24_t *)priv;
uint8_t old;
switch (addr) {
case 0x3d4:
m24->crtcreg = val & 31;
break;
case 0x3d5:
old = m24->crtc[m24->crtcreg];
m24->crtc[m24->crtcreg] = val & crtcmask[m24->crtcreg];
if (old != val) {
if (m24->crtcreg < 0xe || m24->crtcreg > 0x10) {
fullchange = changeframecount;
recalc_timings(m24);
}
}
break;
case 0x3d8:
m24->cgamode = val;
break;
case 0x3d9:
m24->cgacol = val;
break;
case 0x3de:
m24->ctrl = val;
m24->base = (val & 0x08) ? 0x4000 : 0;
break;
}
}
static uint8_t
vid_in(uint16_t addr, void *priv)
{
olim24_t *m24 = (olim24_t *)priv;
uint8_t ret = 0xff;
switch (addr) {
case 0x3d4:
ret = m24->crtcreg;
break;
case 0x3d5:
ret = m24->crtc[m24->crtcreg];
break;
case 0x3da:
ret = m24->stat;
break;
}
return(ret);
}
static void
vid_write(uint32_t addr, uint8_t val, void *priv)
{
olim24_t *m24 = (olim24_t *)priv;
m24->vram[addr & 0x7FFF]=val;
m24->charbuffer[ ((int)(((m24->dispontime - m24->vidtime) * 2) / (CGACONST / 2))) & 0xfc] = val;
m24->charbuffer[(((int)(((m24->dispontime - m24->vidtime) * 2) / (CGACONST / 2))) & 0xfc) | 1] = val;
}
static uint8_t
vid_read(uint32_t addr, void *priv)
{
olim24_t *m24 = (olim24_t *)priv;
return(m24->vram[addr & 0x7FFF]);
}
static void
vid_poll(void *priv)
{
olim24_t *m24 = (olim24_t *)priv;
uint16_t ca = (m24->crtc[15] | (m24->crtc[14] << 8)) & 0x3fff;
int drawcursor;
int x, c;
int oldvc;
uint8_t chr, attr;
uint16_t dat, dat2;
int cols[4];
int col;
int oldsc;
if (!m24->linepos) {
m24->vidtime += m24->dispofftime;
m24->stat |= 1;
m24->linepos = 1;
oldsc = m24->sc;
if ((m24->crtc[8] & 3) == 3)
m24->sc = (m24->sc << 1) & 7;
if (m24->dispon) {
if (m24->displine < m24->firstline) {
m24->firstline = m24->displine;
}
m24->lastline = m24->displine;
for (c = 0; c < 8; c++) {
if ((m24->cgamode & 0x12) == 0x12) {
buffer->line[m24->displine][c] = 0;
if (m24->cgamode & 1)
buffer->line[m24->displine][c + (m24->crtc[1] << 3) + 8] = 0;
else
buffer->line[m24->displine][c + (m24->crtc[1] << 4) + 8] = 0;
} else {
buffer->line[m24->displine][c] = (m24->cgacol & 15) + 16;
if (m24->cgamode & 1)
buffer->line[m24->displine][c + (m24->crtc[1] << 3) + 8] = (m24->cgacol & 15) + 16;
else
buffer->line[m24->displine][c + (m24->crtc[1] << 4) + 8] = (m24->cgacol & 15) + 16;
}
}
if (m24->cgamode & 1) {
for (x = 0; x < m24->crtc[1]; x++) {
chr = m24->charbuffer[ x << 1];
attr = m24->charbuffer[(x << 1) + 1];
drawcursor = ((m24->ma == ca) && m24->con && m24->cursoron);
if (m24->cgamode & 0x20) {
cols[1] = (attr & 15) + 16;
cols[0] = ((attr >> 4) & 7) + 16;
if ((m24->blink & 16) && (attr & 0x80) && !drawcursor)
cols[1] = cols[0];
} else {
cols[1] = (attr & 15) + 16;
cols[0] = (attr >> 4) + 16;
}
if (drawcursor) {
for (c = 0; c < 8; c++)
buffer->line[m24->displine][(x << 3) + c + 8] = cols[(fontdatm[chr][((m24->sc & 7) << 1) | m24->lineff] & (1 << (c ^ 7))) ? 1 : 0] ^ 15;
} else {
for (c = 0; c < 8; c++)
buffer->line[m24->displine][(x << 3) + c + 8] = cols[(fontdatm[chr][((m24->sc & 7) << 1) | m24->lineff] & (1 << (c ^ 7))) ? 1 : 0];
}
m24->ma++;
}
} else if (!(m24->cgamode & 2)) {
for (x = 0; x < m24->crtc[1]; x++) {
chr = m24->vram[((m24->ma << 1) & 0x3fff) + m24->base];
attr = m24->vram[(((m24->ma << 1) + 1) & 0x3fff) + m24->base];
drawcursor = ((m24->ma == ca) && m24->con && m24->cursoron);
if (m24->cgamode & 0x20) {
cols[1] = (attr & 15) + 16;
cols[0] = ((attr >> 4) & 7) + 16;
if ((m24->blink & 16) && (attr & 0x80))
cols[1] = cols[0];
} else {
cols[1] = (attr & 15) + 16;
cols[0] = (attr >> 4) + 16;
}
m24->ma++;
if (drawcursor) {
for (c = 0; c < 8; c++)
buffer->line[m24->displine][(x << 4) + (c << 1) + 8] =
buffer->line[m24->displine][(x << 4) + (c << 1) + 1 + 8] = cols[(fontdatm[chr][((m24->sc & 7) << 1) | m24->lineff] & (1 << (c ^ 7))) ? 1 : 0] ^ 15;
} else {
for (c = 0; c < 8; c++)
buffer->line[m24->displine][(x << 4) + (c << 1) + 8] =
buffer->line[m24->displine][(x << 4) + (c << 1) + 1 + 8] = cols[(fontdatm[chr][((m24->sc & 7) << 1) | m24->lineff] & (1 << (c ^ 7))) ? 1 : 0];
}
}
} else if (!(m24->cgamode & 16)) {
cols[0] = (m24->cgacol & 15) | 16;
col = (m24->cgacol & 16) ? 24 : 16;
if (m24->cgamode & 4) {
cols[1] = col | 3;
cols[2] = col | 4;
cols[3] = col | 7;
} else if (m24->cgacol & 32) {
cols[1] = col | 3;
cols[2] = col | 5;
cols[3] = col | 7;
} else {
cols[1] = col | 2;
cols[2] = col | 4;
cols[3] = col | 6;
}
for (x = 0; x < m24->crtc[1]; x++) {
dat = (m24->vram[((m24->ma << 1) & 0x1fff) + ((m24->sc & 1) * 0x2000) + m24->base] << 8) |
m24->vram[((m24->ma << 1) & 0x1fff) + ((m24->sc & 1) * 0x2000) + 1 + m24->base];
m24->ma++;
for (c = 0; c < 8; c++) {
buffer->line[m24->displine][(x << 4) + (c << 1) + 8] =
buffer->line[m24->displine][(x << 4) + (c << 1) + 1 + 8] = cols[dat >> 14];
dat <<= 2;
}
}
} else {
if (m24->ctrl & 1) {
dat2 = ((m24->sc & 1) * 0x4000) | (m24->lineff * 0x2000);
cols[0] = 0; cols[1] = /*(m24->cgacol & 15)*/15 + 16;
} else {
dat2 = (m24->sc & 1) * 0x2000;
cols[0] = 0; cols[1] = (m24->cgacol & 15) + 16;
}
for (x = 0; x < m24->crtc[1]; x++) {
dat = (m24->vram[((m24->ma << 1) & 0x1fff) + dat2] << 8) | m24->vram[((m24->ma << 1) & 0x1fff) + dat2 + 1];
m24->ma++;
for (c = 0; c < 16; c++) {
buffer->line[m24->displine][(x << 4) + c + 8] = cols[dat >> 15];
dat <<= 1;
}
}
}
} else {
cols[0] = ((m24->cgamode & 0x12) == 0x12) ? 0 : (m24->cgacol & 15) + 16;
if (m24->cgamode & 1) hline(buffer, 0, m24->displine, (m24->crtc[1] << 3) + 16, cols[0]);
else hline(buffer, 0, m24->displine, (m24->crtc[1] << 4) + 16, cols[0]);
}
if (m24->cgamode & 1)
x = (m24->crtc[1] << 3) + 16;
else
x = (m24->crtc[1] << 4) + 16;
m24->sc = oldsc;
if (m24->vc == m24->crtc[7] && !m24->sc)
m24->stat |= 8;
m24->displine++;
if (m24->displine >= 720) m24->displine = 0;
} else {
m24->vidtime += m24->dispontime;
if (m24->dispon) m24->stat &= ~1;
m24->linepos = 0;
m24->lineff ^= 1;
if (m24->lineff) {
m24->ma = m24->maback;
} else {
if (m24->vsynctime) {
m24->vsynctime--;
if (!m24->vsynctime)
m24->stat &= ~8;
}
if (m24->sc == (m24->crtc[11] & 31) || ((m24->crtc[8] & 3) == 3 && m24->sc == ((m24->crtc[11] & 31) >> 1))) {
m24->con = 0;
m24->coff = 1;
}
if (m24->vadj) {
m24->sc++;
m24->sc &= 31;
m24->ma = m24->maback;
m24->vadj--;
if (!m24->vadj) {
m24->dispon = 1;
m24->ma = m24->maback = (m24->crtc[13] | (m24->crtc[12] << 8)) & 0x3fff;
m24->sc = 0;
}
} else if (m24->sc == m24->crtc[9] || ((m24->crtc[8] & 3) == 3 && m24->sc == (m24->crtc[9] >> 1))) {
m24->maback = m24->ma;
m24->sc = 0;
oldvc = m24->vc;
m24->vc++;
m24->vc &= 127;
if (m24->vc == m24->crtc[6])
m24->dispon=0;
if (oldvc == m24->crtc[4]) {
m24->vc = 0;
m24->vadj = m24->crtc[5];
if (!m24->vadj) m24->dispon = 1;
if (!m24->vadj) m24->ma = m24->maback = (m24->crtc[13] | (m24->crtc[12] << 8)) & 0x3fff;
if ((m24->crtc[10] & 0x60) == 0x20)
m24->cursoron = 0;
else
m24->cursoron = m24->blink & 16;
}
if (m24->vc == m24->crtc[7]) {
m24->dispon = 0;
m24->displine = 0;
m24->vsynctime = (m24->crtc[3] >> 4) + 1;
if (m24->crtc[7]) {
if (m24->cgamode & 1)
x = (m24->crtc[1] << 3) + 16;
else
x = (m24->crtc[1] << 4) + 16;
m24->lastline++;
if ((x != xsize) || ((m24->lastline - m24->firstline) != ysize) || video_force_resize_get()) {
xsize = x;
ysize = m24->lastline - m24->firstline;
if (xsize < 64) xsize = 656;
if (ysize < 32) ysize = 200;
set_screen_size(xsize, ysize + 16);
if (video_force_resize_get())
video_force_resize_set(0);
}
video_blit_memtoscreen_8(0, m24->firstline - 8, 0, (m24->lastline - m24->firstline) + 16, xsize, (m24->lastline - m24->firstline) + 16);
frames++;
video_res_x = xsize - 16;
video_res_y = ysize;
if (m24->cgamode & 1) {
video_res_x /= 8;
video_res_y /= (m24->crtc[9] + 1) * 2;
video_bpp = 0;
} else if (!(m24->cgamode & 2)) {
video_res_x /= 16;
video_res_y /= (m24->crtc[9] + 1) * 2;
video_bpp = 0;
} else if (!(m24->cgamode & 16)) {
video_res_x /= 2;
video_res_y /= 2;
video_bpp = 2;
} else if (!(m24->ctrl & 1)) {
video_res_y /= 2;
video_bpp = 1;
}
}
m24->firstline = 1000;
m24->lastline = 0;
m24->blink++;
}
} else {
m24->sc++;
m24->sc &= 31;
m24->ma = m24->maback;
}
if ((m24->sc == (m24->crtc[10] & 31) || ((m24->crtc[8] & 3) == 3 && m24->sc == ((m24->crtc[10] & 31) >> 1))))
m24->con = 1;
}
if (m24->dispon && (m24->cgamode & 1)) {
for (x = 0; x < (m24->crtc[1] << 1); x++)
m24->charbuffer[x] = m24->vram[(((m24->ma << 1) + x) & 0x3fff) + m24->base];
}
}
}
static void
speed_changed(void *priv)
{
olim24_t *m24 = (olim24_t *)priv;
recalc_timings(m24);
}
static void
kbd_poll(void *priv)
{
olim24_t *m24 = (olim24_t *)priv;
keyboard_delay += (1000LL * TIMER_USEC);
if (m24->wantirq) {
m24->wantirq = 0;
picint(2);
#if ENABLE_KEYBOARD_LOG
pclog("M24: take IRQ\n");
#endif
}
if (!(m24->status & STAT_OFULL) && key_queue_start != key_queue_end) {
#if ENABLE_KEYBOARD_LOG
pclog("Reading %02X from the key queue at %i\n",
m24->out, key_queue_start);
#endif
m24->out = key_queue[key_queue_start];
key_queue_start = (key_queue_start + 1) & 0xf;
m24->status |= STAT_OFULL;
m24->status &= ~STAT_IFULL;
m24->wantirq = 1;
}
}
static void
kbd_adddata(uint8_t val)
{
key_queue[key_queue_end] = val;
key_queue_end = (key_queue_end + 1) & 0xf;
}
static void
kbd_write(uint16_t port, uint8_t val, void *priv)
{
olim24_t *m24 = (olim24_t *)priv;
#if ENABLE_KEYBOARD_LOG
pclog("M24: write %04X %02X\n", port, val);
#endif
#if 0
if (ram[8] == 0xc3) {
output = 3;
}
#endif
switch (port) {
case 0x60:
if (m24->param != m24->param_total) {
m24->params[m24->param++] = val;
if (m24->param == m24->param_total) {
switch (m24->command) {
case 0x11:
m24->mouse_mode = 0;
m24->scan[0] = m24->params[0];
m24->scan[1] = m24->params[1];
m24->scan[2] = m24->params[2];
m24->scan[3] = m24->params[3];
m24->scan[4] = m24->params[4];
m24->scan[5] = m24->params[5];
m24->scan[6] = m24->params[6];
break;
case 0x12:
m24->mouse_mode = 1;
m24->scan[0] = m24->params[0];
m24->scan[1] = m24->params[1];
m24->scan[2] = m24->params[2];
break;
default:
pclog("M24: bad keyboard command complete %02X\n", m24->command);
}
}
} else {
m24->command = val;
switch (val) {
case 0x01: /*Self-test*/
break;
case 0x05: /*Read ID*/
kbd_adddata(0x00);
break;
case 0x11:
m24->param = 0;
m24->param_total = 9;
break;
case 0x12:
m24->param = 0;
m24->param_total = 4;
break;
default:
pclog("M24: bad keyboard command %02X\n", val);
}
}
break;
case 0x61:
ppi.pb = val;
timer_process();
timer_update_outstanding();
speaker_update();
speaker_gated = val & 1;
speaker_enable = val & 2;
if (speaker_enable)
was_speaker_enable = 1;
pit_set_gate(&pit, 2, val & 1);
break;
}
}
static uint8_t
kbd_read(uint16_t port, void *priv)
{
olim24_t *m24 = (olim24_t *)priv;
uint8_t ret = 0xff;
switch (port) {
case 0x60:
ret = m24->out;
if (key_queue_start == key_queue_end) {
m24->status &= ~STAT_OFULL;
m24->wantirq = 0;
} else {
m24->out = key_queue[key_queue_start];
key_queue_start = (key_queue_start + 1) & 0xf;
m24->status |= STAT_OFULL;
m24->status &= ~STAT_IFULL;
m24->wantirq = 1;
}
break;
case 0x61:
ret = ppi.pb;
break;
case 0x64:
ret = m24->status;
m24->status &= ~(STAT_RTIMEOUT | STAT_TTIMEOUT);
break;
default:
pclog("\nBad M24 keyboard read %04X\n", port);
}
return(ret);
}
static uint8_t
ms_poll(int x, int y, int z, int b, void *priv)
{
olim24_t *m24 = (olim24_t *)priv;
m24->x += x;
m24->y += y;
if (((key_queue_end - key_queue_start) & 0xf) > 14) return(0xff);
if ((b & 1) && !(m24->b & 1))
kbd_adddata(m24->scan[0]);
if (!(b & 1) && (m24->b & 1))
kbd_adddata(m24->scan[0] | 0x80);
m24->b = (m24->b & ~1) | (b & 1);
if (((key_queue_end - key_queue_start) & 0xf) > 14) return(0xff);
if ((b & 2) && !(m24->b & 2))
kbd_adddata(m24->scan[2]);
if (!(b & 2) && (m24->b & 2))
kbd_adddata(m24->scan[2] | 0x80);
m24->b = (m24->b & ~2) | (b & 2);
if (((key_queue_end - key_queue_start) & 0xf) > 14) return(0xff);
if ((b & 4) && !(m24->b & 4))
kbd_adddata(m24->scan[1]);
if (!(b & 4) && (m24->b & 4))
kbd_adddata(m24->scan[1] | 0x80);
m24->b = (m24->b & ~4) | (b & 4);
if (m24->mouse_mode) {
if (((key_queue_end - key_queue_start) & 0xf) > 12) return(0xff);
if (!m24->x && !m24->y) return(0xff);
m24->y = -m24->y;
if (m24->x < -127) m24->x = -127;
if (m24->x > 127) m24->x = 127;
if (m24->x < -127) m24->x = 0x80 | ((-m24->x) & 0x7f);
if (m24->y < -127) m24->y = -127;
if (m24->y > 127) m24->y = 127;
if (m24->y < -127) m24->y = 0x80 | ((-m24->y) & 0x7f);
kbd_adddata(0xfe);
kbd_adddata(m24->x);
kbd_adddata(m24->y);
m24->x = m24->y = 0;
} else {
while (m24->x < -4) {
if (((key_queue_end - key_queue_start) & 0xf) > 14)
return(0xff);
m24->x += 4;
kbd_adddata(m24->scan[3]);
}
while (m24->x > 4) {
if (((key_queue_end - key_queue_start) & 0xf) > 14)
return(0xff);
m24->x -= 4;
kbd_adddata(m24->scan[4]);
}
while (m24->y < -4) {
if (((key_queue_end - key_queue_start) & 0xf) > 14)
return(0xff);
m24->y += 4;
kbd_adddata(m24->scan[5]);
}
while (m24->y > 4) {
if (((key_queue_end - key_queue_start) & 0xf) > 14)
return(0xff);
m24->y -= 4;
kbd_adddata(m24->scan[6]);
}
}
return(0);
}
static uint8_t
m24_read(uint16_t port, void *priv)
{
switch (port) {
case 0x66:
return 0x00;
case 0x67:
return 0x20 | 0x40 | 0x0C;
}
return(0xff);
}
device_t m24_device = {
"Olivetti M24",
0, 0,
NULL, NULL, NULL,
NULL,
speed_changed,
NULL, NULL,
NULL
};
void
machine_olim24_init(machine_t *model)
{
olim24_t *m24;
m24 = (olim24_t *)malloc(sizeof(olim24_t));
memset(m24, 0x00, sizeof(olim24_t));
machine_common_init(model);
io_sethandler(0x0066, 2, m24_read, NULL, NULL, NULL, NULL, NULL, m24);
/* Initialize the video adapter. */
m24->vram = malloc(0x8000);
overscan_x = overscan_y = 16;
mem_mapping_add(&m24->mapping, 0xb8000, 0x08000,
vid_read, NULL, NULL,
vid_write, NULL, NULL, NULL, 0, m24);
io_sethandler(0x03d0, 16, vid_in, NULL, NULL, vid_out, NULL, NULL, m24);
timer_add(vid_poll, &m24->vidtime, TIMER_ALWAYS_ENABLED, m24);
device_add(&m24_device);
/* Initialize the keyboard. */
m24->status = STAT_LOCK | STAT_CD;
m24->scan[0] = 0x1c;
m24->scan[1] = 0x53;
m24->scan[2] = 0x01;
m24->scan[3] = 0x4b;
m24->scan[4] = 0x4d;
m24->scan[5] = 0x48;
m24->scan[6] = 0x50;
io_sethandler(0x0060, 2,
kbd_read, NULL, NULL, kbd_write, NULL, NULL, m24);
io_sethandler(0x0064, 1,
kbd_read, NULL, NULL, kbd_write, NULL, NULL, m24);
keyboard_send = kbd_adddata;
keyboard_scan = 1;
timer_add(kbd_poll, &keyboard_delay, TIMER_ALWAYS_ENABLED, m24);
/* Tell mouse driver about our internal mouse. */
mouse_setpoll(ms_poll, m24);
if (joystick_type != 7)
device_add(&gameport_device);
/* FIXME: make sure this is correct?? */
nvr_at_init(8);
nmi_init();
}

763
src/machine/m_pcjr.c Normal file
View File

@@ -0,0 +1,763 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Emulation of the IBM PCjr.
*
* Version: @(#)m_pcjr.c 1.0.2 2017/11/03
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>
*
* Copyright 2008-2017 Sarah Walker.
* Copyright 2016,2017 Miran Grca.
* Copyright 2017 Fred N. van Kempen.
*/
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <math.h>
#include <wchar.h>
#include "../86box.h"
#include "../io.h"
#include "../nmi.h"
#include "../pic.h"
#include "../pit.h"
#include "../mem.h"
#include "../timer.h"
#include "../device.h"
#include "../serial.h"
#include "../keyboard.h"
#include "../floppy/floppy.h"
#include "../floppy/fdc.h"
#include "../floppy/fdd.h"
#include "../sound/sound.h"
#include "../sound/snd_speaker.h"
#include "../sound/snd_sn76489.h"
#include "../video/video.h"
#include "../video/vid_cga_comp.h"
#include "machine.h"
#define PCJR_RGB 0
#define PCJR_COMPOSITE 1
#define STAT_PARITY 0x80
#define STAT_RTIMEOUT 0x40
#define STAT_TTIMEOUT 0x20
#define STAT_LOCK 0x10
#define STAT_CD 0x08
#define STAT_SYSFLAG 0x04
#define STAT_IFULL 0x02
#define STAT_OFULL 0x01
typedef struct {
/* Video Controller stuff. */
mem_mapping_t mapping;
uint8_t crtc[32];
int crtcreg;
int array_index;
uint8_t array[32];
int array_ff;
int memctrl;
uint8_t stat;
int addr_mode;
uint8_t *vram,
*b8000;
int linepos, displine;
int sc, vc;
int dispon;
int con, coff, cursoron, blink;
int64_t vsynctime;
int vadj;
uint16_t ma, maback;
int64_t dispontime, dispofftime, vidtime;
int firstline, lastline;
int composite;
/* Keyboard Controller stuff. */
int latched;
int data;
int serial_data[44];
int serial_pos;
uint8_t pa;
uint8_t pb;
} pcjr_t;
static uint8_t crtcmask[32] = {
0xff, 0xff, 0xff, 0xff, 0x7f, 0x1f, 0x7f, 0x7f,
0xf3, 0x1f, 0x7f, 0x1f, 0x3f, 0xff, 0x3f, 0xff,
0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
};
static uint8_t key_queue[16];
static int key_queue_start = 0,
key_queue_end = 0;
static void
recalc_address(pcjr_t *pcjr)
{
if ((pcjr->memctrl & 0xc0) == 0xc0) {
pcjr->vram = &ram[(pcjr->memctrl & 0x06) << 14];
pcjr->b8000 = &ram[(pcjr->memctrl & 0x30) << 11];
} else {
pcjr->vram = &ram[(pcjr->memctrl & 0x07) << 14];
pcjr->b8000 = &ram[(pcjr->memctrl & 0x38) << 11];
}
}
static void
recalc_timings(pcjr_t *pcjr)
{
double _dispontime, _dispofftime, disptime;
if (pcjr->array[0] & 1) {
disptime = pcjr->crtc[0] + 1;
_dispontime = pcjr->crtc[1];
} else {
disptime = (pcjr->crtc[0] + 1) << 1;
_dispontime = pcjr->crtc[1] << 1;
}
_dispofftime = disptime - _dispontime;
_dispontime *= CGACONST;
_dispofftime *= CGACONST;
pcjr->dispontime = (int64_t)(_dispontime * (1 << TIMER_SHIFT));
pcjr->dispofftime = (int64_t)(_dispofftime * (1 << TIMER_SHIFT));
}
static void
vid_out(uint16_t addr, uint8_t val, void *p)
{
pcjr_t *pcjr = (pcjr_t *)p;
uint8_t old;
switch (addr) {
case 0x3d4:
pcjr->crtcreg = val & 0x1f;
return;
case 0x3d5:
old = pcjr->crtc[pcjr->crtcreg];
pcjr->crtc[pcjr->crtcreg] = val & crtcmask[pcjr->crtcreg];
if (old != val) {
if (pcjr->crtcreg < 0xe || pcjr->crtcreg > 0x10) {
fullchange = changeframecount;
recalc_timings(pcjr);
}
}
return;
case 0x3da:
if (!pcjr->array_ff)
pcjr->array_index = val & 0x1f;
else {
if (pcjr->array_index & 0x10)
val &= 0x0f;
pcjr->array[pcjr->array_index & 0x1f] = val;
if (!(pcjr->array_index & 0x1f))
update_cga16_color(val);
}
pcjr->array_ff = !pcjr->array_ff;
break;
case 0x3df:
pcjr->memctrl = val;
pcjr->addr_mode = val >> 6;
recalc_address(pcjr);
break;
}
}
static uint8_t
vid_in(uint16_t addr, void *p)
{
pcjr_t *pcjr = (pcjr_t *)p;
uint8_t ret = 0xff;
switch (addr) {
case 0x3d4:
ret = pcjr->crtcreg;
break;
case 0x3d5:
ret = pcjr->crtc[pcjr->crtcreg];
break;
case 0x3da:
pcjr->array_ff = 0;
pcjr->stat ^= 0x10;
ret = pcjr->stat;
break;
}
return(ret);
}
static void
vid_write(uint32_t addr, uint8_t val, void *p)
{
pcjr_t *pcjr = (pcjr_t *)p;
if (pcjr->memctrl == -1) return;
egawrites++;
pcjr->b8000[addr & 0x3fff] = val;
}
static uint8_t
vid_read(uint32_t addr, void *p)
{
pcjr_t *pcjr = (pcjr_t *)p;
if (pcjr->memctrl == -1) return(0xff);
egareads++;
return(pcjr->b8000[addr & 0x3fff]);
}
static void
vid_poll(void *p)
{
pcjr_t *pcjr = (pcjr_t *)p;
uint16_t ca = (pcjr->crtc[15] | (pcjr->crtc[14] << 8)) & 0x3fff;
int drawcursor;
int x, c;
int oldvc;
uint8_t chr, attr;
uint16_t dat;
int cols[4];
int oldsc;
if (! pcjr->linepos) {
pcjr->vidtime += pcjr->dispofftime;
pcjr->stat &= ~1;
pcjr->linepos = 1;
oldsc = pcjr->sc;
if ((pcjr->crtc[8] & 3) == 3)
pcjr->sc = (pcjr->sc << 1) & 7;
if (pcjr->dispon) {
uint16_t offset = 0;
uint16_t mask = 0x1fff;
if (pcjr->displine < pcjr->firstline) {
pcjr->firstline = pcjr->displine;
video_wait_for_buffer();
}
pcjr->lastline = pcjr->displine;
cols[0] = (pcjr->array[2] & 0xf) + 16;
for (c = 0; c < 8; c++) {
buffer->line[pcjr->displine][c] = cols[0];
if (pcjr->array[0] & 1)
buffer->line[pcjr->displine][c + (pcjr->crtc[1] << 3) + 8] = cols[0];
else
buffer->line[pcjr->displine][c + (pcjr->crtc[1] << 4) + 8] = cols[0];
}
switch (pcjr->addr_mode) {
case 0: /*Alpha*/
offset = 0;
mask = 0x3fff;
break;
case 1: /*Low resolution graphics*/
offset = (pcjr->sc & 1) * 0x2000;
break;
case 3: /*High resolution graphics*/
offset = (pcjr->sc & 3) * 0x2000;
break;
}
switch ((pcjr->array[0] & 0x13) | ((pcjr->array[3] & 0x08) << 5)) {
case 0x13: /*320x200x16*/
for (x = 0; x < pcjr->crtc[1]; x++) {
dat = (pcjr->vram[((pcjr->ma << 1) & mask) + offset] << 8) |
pcjr->vram[((pcjr->ma << 1) & mask) + offset + 1];
pcjr->ma++;
buffer->line[pcjr->displine][(x << 3) + 8] =
buffer->line[pcjr->displine][(x << 3) + 9] = pcjr->array[((dat >> 12) & pcjr->array[1]) + 16] + 16;
buffer->line[pcjr->displine][(x << 3) + 10] =
buffer->line[pcjr->displine][(x << 3) + 11] = pcjr->array[((dat >> 8) & pcjr->array[1]) + 16] + 16;
buffer->line[pcjr->displine][(x << 3) + 12] =
buffer->line[pcjr->displine][(x << 3) + 13] = pcjr->array[((dat >> 4) & pcjr->array[1]) + 16] + 16;
buffer->line[pcjr->displine][(x << 3) + 14] =
buffer->line[pcjr->displine][(x << 3) + 15] = pcjr->array[(dat & pcjr->array[1]) + 16] + 16;
}
break;
case 0x12: /*160x200x16*/
for (x = 0; x < pcjr->crtc[1]; x++) {
dat = (pcjr->vram[((pcjr->ma << 1) & mask) + offset] << 8) |
pcjr->vram[((pcjr->ma << 1) & mask) + offset + 1];
pcjr->ma++;
buffer->line[pcjr->displine][(x << 4) + 8] =
buffer->line[pcjr->displine][(x << 4) + 9] =
buffer->line[pcjr->displine][(x << 4) + 10] =
buffer->line[pcjr->displine][(x << 4) + 11] = pcjr->array[((dat >> 12) & pcjr->array[1]) + 16] + 16;
buffer->line[pcjr->displine][(x << 4) + 12] =
buffer->line[pcjr->displine][(x << 4) + 13] =
buffer->line[pcjr->displine][(x << 4) + 14] =
buffer->line[pcjr->displine][(x << 4) + 15] = pcjr->array[((dat >> 8) & pcjr->array[1]) + 16] + 16;
buffer->line[pcjr->displine][(x << 4) + 16] =
buffer->line[pcjr->displine][(x << 4) + 17] =
buffer->line[pcjr->displine][(x << 4) + 18] =
buffer->line[pcjr->displine][(x << 4) + 19] = pcjr->array[((dat >> 4) & pcjr->array[1]) + 16] + 16;
buffer->line[pcjr->displine][(x << 4) + 20] =
buffer->line[pcjr->displine][(x << 4) + 21] =
buffer->line[pcjr->displine][(x << 4) + 22] =
buffer->line[pcjr->displine][(x << 4) + 23] = pcjr->array[(dat & pcjr->array[1]) + 16] + 16;
}
break;
case 0x03: /*640x200x4*/
for (x = 0; x < pcjr->crtc[1]; x++) {
dat = (pcjr->vram[((pcjr->ma << 1) & mask) + offset] << 8) |
pcjr->vram[((pcjr->ma << 1) & mask) + offset + 1];
pcjr->ma++;
for (c = 0; c < 8; c++) {
chr = (dat >> 7) & 1;
chr |= ((dat >> 14) & 2);
buffer->line[pcjr->displine][(x << 3) + 8 + c] = pcjr->array[(chr & pcjr->array[1]) + 16] + 16;
dat <<= 1;
}
}
break;
case 0x01: /*80 column text*/
for (x = 0; x < pcjr->crtc[1]; x++) {
chr = pcjr->vram[((pcjr->ma << 1) & mask) + offset];
attr = pcjr->vram[((pcjr->ma << 1) & mask) + offset + 1];
drawcursor = ((pcjr->ma == ca) && pcjr->con && pcjr->cursoron);
if (pcjr->array[3] & 4) {
cols[1] = pcjr->array[ ((attr & 15) & pcjr->array[1]) + 16] + 16;
cols[0] = pcjr->array[(((attr >> 4) & 7) & pcjr->array[1]) + 16] + 16;
if ((pcjr->blink & 16) && (attr & 0x80) && !drawcursor)
cols[1] = cols[0];
} else {
cols[1] = pcjr->array[((attr & 15) & pcjr->array[1]) + 16] + 16;
cols[0] = pcjr->array[((attr >> 4) & pcjr->array[1]) + 16] + 16;
}
if (pcjr->sc & 8) {
for (c = 0; c < 8; c++)
buffer->line[pcjr->displine][(x << 3) + c + 8] = cols[0];
} else {
for (c = 0; c < 8; c++)
buffer->line[pcjr->displine][(x << 3) + c + 8] = cols[(fontdat[chr][pcjr->sc & 7] & (1 << (c ^ 7))) ? 1 : 0];
}
if (drawcursor) {
for (c = 0; c < 8; c++)
buffer->line[pcjr->displine][(x << 3) + c + 8] ^= 15;
}
pcjr->ma++;
}
break;
case 0x00: /*40 column text*/
for (x = 0; x < pcjr->crtc[1]; x++) {
chr = pcjr->vram[((pcjr->ma << 1) & mask) + offset];
attr = pcjr->vram[((pcjr->ma << 1) & mask) + offset + 1];
drawcursor = ((pcjr->ma == ca) && pcjr->con && pcjr->cursoron);
if (pcjr->array[3] & 4) {
cols[1] = pcjr->array[ ((attr & 15) & pcjr->array[1]) + 16] + 16;
cols[0] = pcjr->array[(((attr >> 4) & 7) & pcjr->array[1]) + 16] + 16;
if ((pcjr->blink & 16) && (attr & 0x80) && !drawcursor)
cols[1] = cols[0];
} else {
cols[1] = pcjr->array[((attr & 15) & pcjr->array[1]) + 16] + 16;
cols[0] = pcjr->array[((attr >> 4) & pcjr->array[1]) + 16] + 16;
}
pcjr->ma++;
if (pcjr->sc & 8) {
for (c = 0; c < 8; c++)
buffer->line[pcjr->displine][(x << 4) + (c << 1) + 8] =
buffer->line[pcjr->displine][(x << 4) + (c << 1) + 1 + 8] = cols[0];
} else {
for (c = 0; c < 8; c++)
buffer->line[pcjr->displine][(x << 4) + (c << 1) + 8] =
buffer->line[pcjr->displine][(x << 4) + (c << 1) + 1 + 8] = cols[(fontdat[chr][pcjr->sc & 7] & (1 << (c ^ 7))) ? 1 : 0];
}
if (drawcursor) {
for (c = 0; c < 16; c++)
buffer->line[pcjr->displine][(x << 4) + c + 8] ^= 15;
}
}
break;
case 0x02: /*320x200x4*/
cols[0] = pcjr->array[0 + 16] + 16;
cols[1] = pcjr->array[1 + 16] + 16;
cols[2] = pcjr->array[2 + 16] + 16;
cols[3] = pcjr->array[3 + 16] + 16;
for (x = 0; x < pcjr->crtc[1]; x++) {
dat = (pcjr->vram[((pcjr->ma << 1) & mask) + offset] << 8) |
pcjr->vram[((pcjr->ma << 1) & mask) + offset + 1];
pcjr->ma++;
for (c = 0; c < 8; c++) {
buffer->line[pcjr->displine][(x << 4) + (c << 1) + 8] =
buffer->line[pcjr->displine][(x << 4) + (c << 1) + 1 + 8] = cols[dat >> 14];
dat <<= 2;
}
}
break;
case 0x102: /*640x200x2*/
cols[0] = pcjr->array[0 + 16] + 16;
cols[1] = pcjr->array[1 + 16] + 16;
for (x = 0; x < pcjr->crtc[1]; x++) {
dat = (pcjr->vram[((pcjr->ma << 1) & mask) + offset] << 8) |
pcjr->vram[((pcjr->ma << 1) & mask) + offset + 1];
pcjr->ma++;
for (c = 0; c < 16; c++) {
buffer->line[pcjr->displine][(x << 4) + c + 8] = cols[dat >> 15];
dat <<= 1;
}
}
break;
}
} else {
if (pcjr->array[3] & 4) {
if (pcjr->array[0] & 1) hline(buffer, 0, pcjr->displine, (pcjr->crtc[1] << 3) + 16, (pcjr->array[2] & 0xf) + 16);
else hline(buffer, 0, pcjr->displine, (pcjr->crtc[1] << 4) + 16, (pcjr->array[2] & 0xf) + 16);
} else {
cols[0] = pcjr->array[0 + 16] + 16;
if (pcjr->array[0] & 1) hline(buffer, 0, pcjr->displine, (pcjr->crtc[1] << 3) + 16, cols[0]);
else hline(buffer, 0, pcjr->displine, (pcjr->crtc[1] << 4) + 16, cols[0]);
}
}
if (pcjr->array[0] & 1) x = (pcjr->crtc[1] << 3) + 16;
else x = (pcjr->crtc[1] << 4) + 16;
if (pcjr->composite) {
for (c = 0; c < x; c++)
buffer32->line[pcjr->displine][c] = buffer->line[pcjr->displine][c] & 0xf;
Composite_Process(pcjr->array[0], 0, x >> 2, buffer32->line[pcjr->displine]);
}
pcjr->sc = oldsc;
if (pcjr->vc == pcjr->crtc[7] && !pcjr->sc) {
pcjr->stat |= 8;
}
pcjr->displine++;
if (pcjr->displine >= 360)
pcjr->displine = 0;
} else {
pcjr->vidtime += pcjr->dispontime;
if (pcjr->dispon)
pcjr->stat |= 1;
pcjr->linepos = 0;
if (pcjr->vsynctime) {
pcjr->vsynctime--;
if (!pcjr->vsynctime) {
pcjr->stat &= ~8;
}
}
if (pcjr->sc == (pcjr->crtc[11] & 31) || ((pcjr->crtc[8] & 3) == 3 && pcjr->sc == ((pcjr->crtc[11] & 31) >> 1))) {
pcjr->con = 0;
pcjr->coff = 1;
}
if (pcjr->vadj) {
pcjr->sc++;
pcjr->sc &= 31;
pcjr->ma = pcjr->maback;
pcjr->vadj--;
if (!pcjr->vadj) {
pcjr->dispon = 1;
pcjr->ma = pcjr->maback = (pcjr->crtc[13] | (pcjr->crtc[12] << 8)) & 0x3fff;
pcjr->sc = 0;
}
} else if (pcjr->sc == pcjr->crtc[9] || ((pcjr->crtc[8] & 3) == 3 && pcjr->sc == (pcjr->crtc[9] >> 1))) {
pcjr->maback = pcjr->ma;
pcjr->sc = 0;
oldvc = pcjr->vc;
pcjr->vc++;
pcjr->vc &= 127;
if (pcjr->vc == pcjr->crtc[6])
pcjr->dispon = 0;
if (oldvc == pcjr->crtc[4]) {
pcjr->vc = 0;
pcjr->vadj = pcjr->crtc[5];
if (!pcjr->vadj)
pcjr->dispon = 1;
if (!pcjr->vadj)
pcjr->ma = pcjr->maback = (pcjr->crtc[13] | (pcjr->crtc[12] << 8)) & 0x3fff;
if ((pcjr->crtc[10] & 0x60) == 0x20) pcjr->cursoron = 0;
else pcjr->cursoron = pcjr->blink & 16;
}
if (pcjr->vc == pcjr->crtc[7]) {
pcjr->dispon = 0;
pcjr->displine = 0;
pcjr->vsynctime = 16;
picint(1 << 5);
if (pcjr->crtc[7]) {
if (pcjr->array[0] & 1) x = (pcjr->crtc[1] << 3) + 16;
else x = (pcjr->crtc[1] << 4) + 16;
pcjr->lastline++;
if ((x != xsize) || ((pcjr->lastline - pcjr->firstline) != ysize) || video_force_resize_get()) {
xsize = x;
ysize = pcjr->lastline - pcjr->firstline;
if (xsize < 64) xsize = 656;
if (ysize < 32) ysize = 200;
set_screen_size(xsize, (ysize << 1) + 16);
if (video_force_resize_get())
video_force_resize_set(0);
}
if (pcjr->composite)
video_blit_memtoscreen(0, pcjr->firstline-4, 0, (pcjr->lastline - pcjr->firstline) + 8, xsize, (pcjr->lastline - pcjr->firstline) + 8);
else
video_blit_memtoscreen_8(0, pcjr->firstline-4, 0, (pcjr->lastline - pcjr->firstline) + 8, xsize, (pcjr->lastline - pcjr->firstline) + 8);
frames++;
video_res_x = xsize - 16;
video_res_y = ysize;
}
pcjr->firstline = 1000;
pcjr->lastline = 0;
pcjr->blink++;
}
} else {
pcjr->sc++;
pcjr->sc &= 31;
pcjr->ma = pcjr->maback;
}
if ((pcjr->sc == (pcjr->crtc[10] & 31) || ((pcjr->crtc[8] & 3) == 3 && pcjr->sc == ((pcjr->crtc[10] & 31) >> 1))))
pcjr->con = 1;
}
}
static void
kbd_write(uint16_t port, uint8_t val, void *priv)
{
pcjr_t *pcjr = (pcjr_t *)priv;
switch (port) {
case 0x60:
pcjr->pa = val;
break;
case 0x61:
pcjr->pb = val;
timer_process();
timer_update_outstanding();
speaker_update();
speaker_gated = val & 1;
speaker_enable = val & 2;
if (speaker_enable)
was_speaker_enable = 1;
pit_set_gate(&pit, 2, val & 1);
sn76489_mute = speaker_mute = 1;
switch (val & 0x60) {
case 0x00:
speaker_mute = 0;
break;
case 0x60:
sn76489_mute = 0;
break;
}
break;
case 0xa0:
nmi_mask = val & 0x80;
pit_set_using_timer(&pit, 1, !(val & 0x20));
break;
}
}
static uint8_t
kbd_read(uint16_t port, void *priv)
{
pcjr_t *pcjr = (pcjr_t *)priv;
uint8_t ret = 0xff;
switch (port) {
case 0x60:
ret = pcjr->pa;
break;
case 0x61:
ret = pcjr->pb;
break;
case 0x62:
ret = (pcjr->latched ? 1 : 0);
ret |= 0x02; /*Modem card not installed*/
ret |= (ppispeakon ? 0x10 : 0);
ret |= (ppispeakon ? 0x20 : 0);
ret |= (pcjr->data ? 0x40: 0);
if (pcjr->data)
ret |= 0x40;
break;
case 0xa0:
pcjr->latched = 0;
ret = 0;
break;
default:
pclog("\nBad PCjr keyboard read %04X\n", port);
}
return(ret);
}
static void
kbd_poll(void *priv)
{
pcjr_t *pcjr = (pcjr_t *)priv;
int c, p = 0, key;
keyboard_delay += (220LL * TIMER_USEC);
if (key_queue_start != key_queue_end &&
!pcjr->serial_pos && !pcjr->latched) {
key = key_queue[key_queue_start];
key_queue_start = (key_queue_start + 1) & 0xf;
pcjr->latched = 1;
pcjr->serial_data[0] = 1; /*Start bit*/
pcjr->serial_data[1] = 0;
for (c = 0; c < 8; c++) {
if (key & (1 << c)) {
pcjr->serial_data[(c + 1) * 2] = 1;
pcjr->serial_data[(c + 1) * 2 + 1] = 0;
p++;
} else {
pcjr->serial_data[(c + 1) * 2] = 0;
pcjr->serial_data[(c + 1) * 2 + 1] = 1;
}
}
if (p & 1) { /*Parity*/
pcjr->serial_data[9 * 2] = 1;
pcjr->serial_data[9 * 2 + 1] = 0;
} else {
pcjr->serial_data[9 * 2] = 0;
pcjr->serial_data[9 * 2 + 1] = 1;
}
for (c = 0; c < 11; c++) { /*11 stop bits*/
pcjr->serial_data[(c + 10) * 2] = 0;
pcjr->serial_data[(c + 10) * 2 + 1] = 0;
}
pcjr->serial_pos++;
}
if (pcjr->serial_pos) {
pcjr->data = pcjr->serial_data[pcjr->serial_pos - 1];
nmi = pcjr->data;
pcjr->serial_pos++;
if (pcjr->serial_pos == 42+1)
pcjr->serial_pos = 0;
}
}
static void
kbd_adddata(uint8_t val)
{
key_queue[key_queue_end] = val;
key_queue_end = (key_queue_end + 1) & 0xf;
}
static void
speed_changed(void *priv)
{
pcjr_t *pcjr = (pcjr_t *)priv;
recalc_timings(pcjr);
}
static device_config_t pcjr_config[] = {
{
"display_type", "Display type", CONFIG_SELECTION, "", PCJR_RGB,
{
{
"RGB", PCJR_RGB
},
{
"Composite", PCJR_COMPOSITE
},
{
""
}
}
},
{
"", "", -1
}
};
static device_t pcjr_device = {
"IBM PCjr",
0, 0,
NULL, NULL, NULL,
NULL,
speed_changed,
NULL,
NULL,
pcjr_config
};
void
machine_pcjr_init(machine_t *model)
{
int display_type;
pcjr_t *pcjr;
pcjr = malloc(sizeof(pcjr_t));
memset(pcjr, 0x00, sizeof(pcjr_t));
pcjr->memctrl = -1;
display_type = machine_get_config_int("display_type");
pcjr->composite = (display_type != PCJR_RGB);
pic_init();
pit_init();
pit_set_out_func(&pit, 0, pit_irq0_timer_pcjr);
if (serial_enabled[0])
serial_setup(1, 0x2f8, 3);
/* Initialize the video controller. */
mem_mapping_add(&pcjr->mapping, 0xb8000, 0x08000,
vid_read, NULL, NULL,
vid_write, NULL, NULL, NULL, 0, pcjr);
io_sethandler(0x03d0, 16,
vid_in, NULL, NULL, vid_out, NULL, NULL, pcjr);
timer_add(vid_poll, &pcjr->vidtime, TIMER_ALWAYS_ENABLED, pcjr);
device_add_ex(&pcjr_device, pcjr);
/* Initialize the keyboard. */
key_queue_start = key_queue_end = 0;
io_sethandler(0x0060, 4,
kbd_read, NULL, NULL, kbd_write, NULL, NULL, pcjr);
io_sethandler(0x00a0, 8,
kbd_read, NULL, NULL, kbd_write, NULL, NULL, pcjr);
timer_add(kbd_poll, &keyboard_delay, TIMER_ALWAYS_ENABLED, pcjr);
keyboard_send = kbd_adddata;
fdc_add_pcjr();
device_add(&sn76489_device);
nmi_mask = 0x80;
}

View File

@@ -6,7 +6,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../cpu/cpu.h"
#include "../io.h"
#include "../dma.h"
@@ -19,7 +18,7 @@
#include "../game/gameport.h"
#include "../lpt.h"
#include "../serial.h"
#include "../keyboard_at.h"
#include "../keyboard.h"
#include "../disk/hdc.h"
#include "../disk/hdc_ide.h"
#include "../floppy/floppy.h"
@@ -347,7 +346,7 @@ machine_ps1_common_init(machine_t *model)
{
ide_init();
}
keyboard_at_init();
device_add(&keyboard_at_device);
nvr_at_init(8);
pic2_init();
if (romset != ROM_IBMPS1_2133)

View File

@@ -3,7 +3,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../cpu/cpu.h"
#include "../io.h"
#include "../dma.h"
@@ -14,7 +13,6 @@
#include "../device.h"
#include "../nvr.h"
#include "../keyboard.h"
#include "../keyboard_at.h"
#include "../lpt.h"
#include "../serial.h"
#include "../floppy/floppy.h"
@@ -161,7 +159,7 @@ machine_ps2_m30_286_init(machine_t *model)
pit_set_out_func(&pit, 1, pit_refresh_timer_at);
dma16_init();
keyboard_at_init();
device_add(&keyboard_at_device);
nvr_at_init(8);
pic2_init();
ps2board_init();

View File

@@ -3,7 +3,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../cpu/cpu.h"
#include "../cpu/x86.h"
#include "../io.h"
@@ -16,7 +15,7 @@
#include "../device.h"
#include "../nvr.h"
#include "../nvr_ps2.h"
#include "../keyboard_at.h"
#include "../keyboard.h"
#include "../lpt.h"
#include "../mouse.h"
#include "../serial.h"
@@ -810,8 +809,7 @@ machine_ps2_common_init(machine_t *model)
dma16_init();
ps2_dma_init();
keyboard_at_init();
keyboard_at_init_ps2();
device_add(&keyboard_ps2_device);
mouse_ps2_init(NULL);
nvr_at_init(8);
pic2_init();

125
src/machine/m_tandy.c Normal file
View File

@@ -0,0 +1,125 @@
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../nmi.h"
#include "../mem.h"
#include "../rom.h"
#include "../device.h"
#include "../game/gameport.h"
#include "../keyboard.h"
#include "../tandy_eeprom.h"
#include "../tandy_rom.h"
#include "../sound/sound.h"
#include "../sound/snd_pssj.h"
#include "../sound/snd_sn76489.h"
#include "machine.h"
static scancode scancode_tandy[272] = {
{ {-1}, {-1} }, { {0x01, -1}, {0x81, -1} }, { {0x02, -1}, {0x82, -1} }, { {0x03, -1}, {0x83, -1} },
{ {0x04, -1}, {0x84, -1} }, { {0x05, -1}, {0x85, -1} }, { {0x06, -1}, {0x86, -1} }, { {0x07, -1}, {0x87, -1} },
{ {0x08, -1}, {0x88, -1} }, { {0x09, -1}, {0x89, -1} }, { {0x0a, -1}, {0x8a, -1} }, { {0x0b, -1}, {0x8b, -1} },
{ {0x0c, -1}, {0x8c, -1} }, { {0x0d, -1}, {0x8d, -1} }, { {0x0e, -1}, {0x8e, -1} }, { {0x0f, -1}, {0x8f, -1} },
{ {0x10, -1}, {0x90, -1} }, { {0x11, -1}, {0x91, -1} }, { {0x12, -1}, {0x92, -1} }, { {0x13, -1}, {0x93, -1} },
{ {0x14, -1}, {0x94, -1} }, { {0x15, -1}, {0x95, -1} }, { {0x16, -1}, {0x96, -1} }, { {0x17, -1}, {0x97, -1} },
{ {0x18, -1}, {0x98, -1} }, { {0x19, -1}, {0x99, -1} }, { {0x1a, -1}, {0x9a, -1} }, { {0x1b, -1}, {0x9b, -1} },
{ {0x1c, -1}, {0x9c, -1} }, { {0x1d, -1}, {0x9d, -1} }, { {0x1e, -1}, {0x9e, -1} }, { {0x1f, -1}, {0x9f, -1} },
{ {0x20, -1}, {0xa0, -1} }, { {0x21, -1}, {0xa1, -1} }, { {0x22, -1}, {0xa2, -1} }, { {0x23, -1}, {0xa3, -1} },
{ {0x24, -1}, {0xa4, -1} }, { {0x25, -1}, {0xa5, -1} }, { {0x26, -1}, {0xa6, -1} }, { {0x27, -1}, {0xa7, -1} },
{ {0x28, -1}, {0xa8, -1} }, { {0x29, -1}, {0xa9, -1} }, { {0x2a, -1}, {0xaa, -1} }, { {0x47, -1}, {0xc7, -1} },
{ {0x2c, -1}, {0xac, -1} }, { {0x2d, -1}, {0xad, -1} }, { {0x2e, -1}, {0xae, -1} }, { {0x2f, -1}, {0xaf, -1} },
{ {0x30, -1}, {0xb0, -1} }, { {0x31, -1}, {0xb1, -1} }, { {0x32, -1}, {0xb2, -1} }, { {0x33, -1}, {0xb3, -1} },
{ {0x34, -1}, {0xb4, -1} }, { {0x35, -1}, {0xb5, -1} }, { {0x36, -1}, {0xb6, -1} }, { {0x37, -1}, {0xb7, -1} },
{ {0x38, -1}, {0xb8, -1} }, { {0x39, -1}, {0xb9, -1} }, { {0x3a, -1}, {0xba, -1} }, { {0x3b, -1}, {0xbb, -1} },
{ {0x3c, -1}, {0xbc, -1} }, { {0x3d, -1}, {0xbd, -1} }, { {0x3e, -1}, {0xbe, -1} }, { {0x3f, -1}, {0xbf, -1} },
{ {0x40, -1}, {0xc0, -1} }, { {0x41, -1}, {0xc1, -1} }, { {0x42, -1}, {0xc2, -1} }, { {0x43, -1}, {0xc3, -1} },
{ {0x44, -1}, {0xc4, -1} }, { {0x45, -1}, {0xc5, -1} }, { {0x46, -1}, {0xc6, -1} }, { {0x47, -1}, {0xc7, -1} },
{ {0x48, -1}, {0xc8, -1} }, { {0x49, -1}, {0xc9, -1} }, { {0x4a, -1}, {0xca, -1} }, { {0x4b, -1}, {0xcb, -1} },
{ {0x4c, -1}, {0xcc, -1} }, { {0x4d, -1}, {0xcd, -1} }, { {0x4e, -1}, {0xce, -1} }, { {0x4f, -1}, {0xcf, -1} },
{ {0x50, -1}, {0xd0, -1} }, { {0x51, -1}, {0xd1, -1} }, { {0x52, -1}, {0xd2, -1} }, { {0x56, -1}, {0xd6, -1} },
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*54*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*58*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*5c*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*60*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*64*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*68*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*6c*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*70*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*74*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*78*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*7c*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*80*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*84*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*88*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*8c*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*90*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*94*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*98*/
{ {0x57, -1}, {0xd7, -1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*9c*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*a0*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*a4*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {0xaa, -1}, {0x2a, -1} }, { {-1}, {-1} }, /*a8*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*ac*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*b0*/
{ {-1}, {-1} }, { {0x35, -1}, {0xb5, -1} }, { {0xb6, -1}, {0x36, -1} }, { {0x37, -1}, {0xb7, -1} }, /*b4*/
{ {0x38, -1}, {0xb8, -1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*b8*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*bc*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*c0*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {0x46, -1}, {0xc6, -1} }, { {0x47, -1}, {0xc7, -1} }, /*c4*/
{ {0x29, -1}, {0xa9, -1} }, { {0x49, -1}, {0xc9, -1} }, { {-1}, {-1} }, { {0x2b, -1}, {0xab, -1} }, /*c8*/
{ {-1}, {-1} }, { {0x4e, -1}, {0xce, -1} }, { {-1}, {-1} }, { {0x4f, -1}, {0xcf, -1} }, /*cc*/
{ {0x4a, -1}, {0xca, -1} }, { {0x51, -1}, {0xd1, -1} }, { {0x52, -1}, {0xd2, -1} }, { {0x53, -1}, {0xd3, -1} }, /*d0*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*d4*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*d8*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*dc*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*e0*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*e4*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*e8*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*ec*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*f0*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*f4*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*f8*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*fc*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*100*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*104*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*108*/
{ {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, { {-1}, {-1} }, /*10c*/
};
void
machine_tandy1k_init(machine_t *model)
{
machine_common_init(model);
device_add(&keyboard_tandy_device);
keyboard_set_table(scancode_tandy);
if (romset == ROM_TANDY)
device_add(&sn76489_device);
else
device_add(&ncr8496_device);
nmi_init();
if (romset != ROM_TANDY)
device_add(&tandy_eeprom_device);
if (joystick_type != 7)
device_add(&gameport_device);
}
void
machine_tandy1ksl2_init(machine_t *model)
{
machine_common_init(model);
device_add(&keyboard_tandy_device);
keyboard_set_table(scancode_tandy);
device_add(&pssj_device);
nmi_init();
device_add(&tandy_rom_device);
device_add(&tandy_eeprom_device);
if (joystick_type != 7) device_add(&gameport_device);
}

View File

@@ -3,13 +3,12 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../nmi.h"
#include "../pit.h"
#include "../mem.h"
#include "../device.h"
#include "../game/gameport.h"
#include "../keyboard_xt.h"
#include "../keyboard.h"
#include "machine.h"
@@ -20,7 +19,7 @@ machine_xt_init(machine_t *model)
pit_set_out_func(&pit, 1, pit_refresh_timer_xt);
keyboard_xt_init();
device_add(&keyboard_xt_device);
nmi_init();
if (joystick_type != 7)
device_add(&gameport_device);

View File

@@ -4,7 +4,6 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../cpu/cpu.h"
#include "../io.h"
#include "../mem.h"

View File

@@ -8,7 +8,7 @@
*
* Handling of the emulated machines.
*
* Version: @(#)machine.c 1.0.23 2017/11/01
* Version: @(#)machine.c 1.0.25 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -23,23 +23,19 @@
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../cpu/cpu.h"
#include "../mem.h"
#include "../rom.h"
#include "../device.h"
#include "../video/video.h"
#include "../floppy/floppy.h"
#include "../floppy/fdc.h"
#include "../floppy/fdd.h"
#include "machine.h"
#include "../video/vid_pcjr.h"
#include "../video/vid_tandy.h"
#include "../video/vid_tandysl.h"
int machine;
int AMSTRAD, AT, PCI, TANDY;
int AT, PCI;
int romset;
@@ -49,23 +45,23 @@ machine_t machines[] =
{"[8088] Compaq Portable", ROM_PORTABLE, "portable", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 128, 640, 128, 0, machine_xt_init, NULL },
{"[8088] DTK XT clone", ROM_DTKXT, "dtk", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL },
{"[8088] IBM PC", ROM_IBMPC, "ibmpc", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 32, 0, machine_xt_init, NULL },
{"[8088] IBM PCjr", ROM_IBMPCJR, "ibmpcjr", {{"", cpus_pcjr}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 128, 640, 128, 0, machine_pcjr_init, pcjr_get_device },
{"[8088] IBM PCjr", ROM_IBMPCJR, "ibmpcjr", {{"", cpus_pcjr}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO, 128, 640, 128, 0, machine_pcjr_init, NULL },
{"[8088] IBM XT", ROM_IBMXT, "ibmxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL },
{"[8088] Generic XT clone", ROM_GENXT, "genxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL },
{"[8088] Juko XT clone", ROM_JUKOPC, "jukopc", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL },
{"[8088] Phoenix XT clone", ROM_PXXT, "pxxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 640, 64, 0, machine_xt_init, NULL },
{"[8088] Schneider EuroPC", ROM_EUROPC, "europc", {{"Siemens",cpus_europc}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_HAS_HDC, 512, 640, 128, 0, machine_europc_init, NULL },
{"[8088] Tandy 1000", ROM_TANDY, "tandy", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 128, 640, 128, 0, machine_tandy1k_init, tandy1000_get_device },
{"[8088] Tandy 1000 HX", ROM_TANDY1000HX, "tandy1000hx", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 256, 640, 128, 0, machine_tandy1k_init, tandy1000hx_get_device },
{"[8088] Schneider EuroPC", ROM_EUROPC, "europc", {{"Siemens",cpus_europc}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_HDC | MACHINE_VIDEO | MACHINE_MOUSE, 512, 640, 128, 0, machine_europc_init, NULL },
{"[8088] Tandy 1000", ROM_TANDY, "tandy", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 128, 640, 128, 0, machine_tandy1k_init, NULL },
{"[8088] Tandy 1000 HX", ROM_TANDY1000HX, "tandy1000hx", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 256, 640, 128, 0, machine_tandy1k_init, NULL },
{"[8088] VTech Laser Turbo XT", ROM_LTXT, "ltxt", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 1152, 64, 0, machine_xt_laserxt_init, NULL },
{"[8088] VTech Laser XT3", ROM_LXT3, "lxt3", {{"", cpus_8088}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA, 64, 1152, 64, 0, machine_xt_laserxt_init, NULL },
{"[8086] Amstrad PC1512", ROM_PC1512, "pc1512", {{"", cpus_pc1512}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AMSTRAD, 512, 640, 128, 63, machine_amstrad_init, NULL },
{"[8086] Amstrad PC1640", ROM_PC1640, "pc1640", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AMSTRAD, 640, 640, 0, 63, machine_amstrad_init, NULL },
{"[8086] Amstrad PC2086", ROM_PC2086, "pc2086", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AMSTRAD, 640, 640, 0, 63, machine_amstrad_init, NULL },
{"[8086] Amstrad PC3086", ROM_PC3086, "pc3086", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AMSTRAD, 640, 640, 0, 63, machine_amstrad_init, NULL },
{"[8086] Olivetti M24", ROM_OLIM24, "olivetti_m24", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_OLIM24, 128, 640, 128, 0, machine_olim24_init, NULL },
{"[8086] Sinclair PC200", ROM_PC200, "pc200", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AMSTRAD, 512, 640, 128, 63, machine_amstrad_init, NULL },
{"[8086] Amstrad PC1512", ROM_PC1512, "pc1512", {{"", cpus_pc1512}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 512, 640, 128, 63, machine_amstrad_init, NULL },
{"[8086] Amstrad PC1640", ROM_PC1640, "pc1640", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 640, 640, 0, 63, machine_amstrad_init, NULL },
{"[8086] Amstrad PC2086", ROM_PC2086, "pc2086", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 640, 640, 0, 63, machine_amstrad_init, NULL },
{"[8086] Amstrad PC3086", ROM_PC3086, "pc3086", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 640, 640, 0, 63, machine_amstrad_init, NULL },
{"[8086] Olivetti M24", ROM_OLIM24, "olivetti_m24", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 128, 640, 128, 0, machine_olim24_init, NULL },
{"[8086] Sinclair PC200", ROM_PC200, "pc200", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_VIDEO | MACHINE_MOUSE, 512, 640, 128, 63, machine_amstrad_init, NULL },
{"[8086] Tandy 1000 SL/2", ROM_TANDY1000SL2, "tandy1000sl2", {{"", cpus_8086}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA, 512, 768, 128, 0, machine_tandy1ksl2_init, NULL },
{"[286 ISA] AMI 286 clone", ROM_AMI286, "ami286", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT, 512,16384, 128, 127, machine_at_neat_init, NULL },
@@ -73,67 +69,67 @@ machine_t machines[] =
{"[286 ISA] Commodore PC 30 III", ROM_CMDPC30, "cmdpc30", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT, 640,16384, 128, 127, machine_at_cmdpc_init, NULL },
{"[286 ISA] Hyundai Super-286TR", ROM_SUPER286TR, "super286tr", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT, 512,16384, 128, 127, machine_at_scat_init, NULL },
{"[286 ISA] IBM AT", ROM_IBMAT, "ibmat", {{"", cpus_ibmat}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT, 256,15872, 128, 63, machine_at_top_remap_init, NULL },
{"[286 ISA] IBM PS/1 model 2011", ROM_IBMPS1_2011, "ibmps1es", {{"", cpus_ps1_m2011}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_PS2_HDD, 512,16384, 512, 127, machine_ps1_m2011_init, NULL },
{"[286 ISA] IBM PS/2 model 30-286", ROM_IBMPS2_M30_286, "ibmps2_m30_286", {{"", cpus_ps2_m30_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_PS2_HDD, 1, 16, 1, 127, machine_ps2_m30_286_init, NULL },
{"[286 ISA] IBM PS/1 model 2011", ROM_IBMPS1_2011, "ibmps1es", {{"", cpus_ps1_m2011}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC_PS2, 512,16384, 512, 127, machine_ps1_m2011_init, NULL },
{"[286 ISA] IBM PS/2 model 30-286", ROM_IBMPS2_M30_286, "ibmps2_m30_286", {{"", cpus_ps2_m30_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC_PS2, 1, 16, 1, 127, machine_ps2_m30_286_init, NULL },
{"[286 ISA] IBM XT Model 286", ROM_IBMXT286, "ibmxt286", {{"", cpus_ibmxt286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT, 256,15872, 128, 0, machine_at_top_remap_init, NULL },
{"[286 ISA] Samsung SPC-4200P", ROM_SPC4200P, "spc4200p", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_PS2, 512, 2048, 128, 127, machine_at_scat_init, NULL },
#ifdef WALTJE
{"[286 ISA] OpenAT 286", ROM_OPENAT, "open_at", {{"", cpus_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT, 512, 4096, 128, 127, machine_at_init, NULL },
#endif
{"[286 MCA] IBM PS/2 model 50", ROM_IBMPS2_M50, "ibmps2_m50", {{"", cpus_ps2_m30_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_PS2_HDD, 1, 16, 1, 63, machine_ps2_model_50_init, NULL },
{"[286 MCA] IBM PS/2 model 50", ROM_IBMPS2_M50, "ibmps2_m50", {{"", cpus_ps2_m30_286}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 1, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC_PS2, 1, 16, 1, 63, machine_ps2_model_50_init, NULL },
{"[386SX ISA] AMI 386SX clone", ROM_AMI386SX, "ami386", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_HAS_HDC, 512,16384, 128, 127, machine_at_headland_init, NULL },
{"[386SX ISA] Amstrad MegaPC", ROM_MEGAPC, "megapc", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 1, 16, 1, 127, machine_at_wd76c10_init, NULL },
{"[386SX ISA] Award 386SX clone", ROM_AWARD386SX_OPTI495, "award386sx", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_HAS_HDC, 1, 64, 1, 127, machine_at_opti495_init, NULL },
{"[386SX ISA] DTK 386SX clone", ROM_DTK386, "dtk386", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_HAS_HDC, 512,16384, 128, 127, machine_at_neat_init, NULL },
{"[386SX ISA] IBM PS/1 model 2121", ROM_IBMPS1_2121, "ibmps1_2121", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 1, 16, 1, 127, machine_ps1_m2121_init, NULL },
{"[386SX ISA] IBM PS/1 m.2121+ISA", ROM_IBMPS1_2121_ISA, "ibmps1_2121_isa", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 1, 16, 1, 127, machine_ps1_m2121_init, NULL },
{"[386SX ISA] AMI 386SX clone", ROM_AMI386SX, "ami386", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512,16384, 128, 127, machine_at_headland_init, NULL },
{"[386SX ISA] Amstrad MegaPC", ROM_MEGAPC, "megapc", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 1, 16, 1, 127, machine_at_wd76c10_init, NULL },
{"[386SX ISA] Award 386SX clone", ROM_AWARD386SX_OPTI495, "award386sx", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_opti495_init, NULL },
{"[386SX ISA] DTK 386SX clone", ROM_DTK386, "dtk386", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 512,16384, 128, 127, machine_at_neat_init, NULL },
{"[386SX ISA] IBM PS/1 model 2121", ROM_IBMPS1_2121, "ibmps1_2121", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 1, 16, 1, 127, machine_ps1_m2121_init, NULL },
{"[386SX ISA] IBM PS/1 m.2121+ISA", ROM_IBMPS1_2121_ISA, "ibmps1_2121_isa", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 1, 16, 1, 127, machine_ps1_m2121_init, NULL },
{"[386SX MCA] IBM PS/2 model 55SX", ROM_IBMPS2_M55SX, "ibmps2_m55sx", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_PS2_HDD, 1, 8, 1, 63, machine_ps2_model_55sx_init, NULL },
{"[386SX MCA] IBM PS/2 model 55SX", ROM_IBMPS2_M55SX, "ibmps2_m55sx", {{"Intel", cpus_i386SX}, {"AMD", cpus_Am386SX}, {"Cyrix", cpus_486SLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC_PS2, 1, 8, 1, 63, machine_ps2_model_55sx_init, NULL },
{"[386DX ISA] AMI 386DX clone", ROM_AMI386DX_OPTI495, "ami386dx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_HAS_HDC, 1, 64, 1, 127, machine_at_opti495_init, NULL },
{"[386DX ISA] Amstrad MegaPC 386DX", ROM_MEGAPCDX, "megapcdx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 1, 16, 1, 127, machine_at_wd76c10_init, NULL },
{"[386DX ISA] Award 386DX clone", ROM_AWARD386DX_OPTI495, "award386dx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_HAS_HDC, 1, 64, 1, 127, machine_at_opti495_init, NULL },
{"[386DX ISA] MR 386DX clone", ROM_MR386DX_OPTI495, "mr386dx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_HAS_HDC, 1, 64, 1, 127, machine_at_opti495_init, NULL },
{"[386DX ISA] AMI 386DX clone", ROM_AMI386DX_OPTI495, "ami386dx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_opti495_init, NULL },
{"[386DX ISA] Amstrad MegaPC 386DX", ROM_MEGAPCDX, "megapcdx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 1, 16, 1, 127, machine_at_wd76c10_init, NULL },
{"[386DX ISA] Award 386DX clone", ROM_AWARD386DX_OPTI495, "award386dx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_opti495_init, NULL },
{"[386DX ISA] MR 386DX clone", ROM_MR386DX_OPTI495, "mr386dx", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_opti495_init, NULL },
{"[386DX MCA] IBM PS/2 model 80", ROM_IBMPS2_M80, "ibmps2_m80", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_PS2_HDD, 1, 12, 1, 63, machine_ps2_model_80_init, NULL },
{"[386DX MCA] IBM PS/2 model 80", ROM_IBMPS2_M80, "ibmps2_m80", {{"Intel", cpus_i386DX}, {"AMD", cpus_Am386DX}, {"Cyrix", cpus_486DLC}, {"", NULL}, {"", NULL}}, 1, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC_PS2, 1, 12, 1, 63, machine_ps2_model_80_init, NULL },
{"[486 ISA] AMI 486 clone", ROM_AMI486, "ami486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HAS_HDC, 1, 64, 1, 127, machine_at_ali1429_init, NULL },
{"[486 ISA] AMI WinBIOS 486", ROM_WIN486, "win486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HAS_HDC, 1, 64, 1, 127, machine_at_ali1429_init, NULL },
{"[486 ISA] Award 486 clone", ROM_AWARD486_OPTI495, "award486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HAS_HDC, 1, 64, 1, 127, machine_at_opti495_init, NULL },
{"[486 ISA] DTK PKM-0038S E-2", ROM_DTK486, "dtk486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HAS_HDC, 1, 128, 1, 127, machine_at_dtk486_init, NULL },
{"[486 ISA] IBM PS/1 machine 2133", ROM_IBMPS1_2133, "ibmps1_2133", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 1, 64, 1, 127, machine_ps1_m2133_init, NULL },
{"[486 ISA] AMI 486 clone", ROM_AMI486, "ami486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_ali1429_init, NULL },
{"[486 ISA] AMI WinBIOS 486", ROM_WIN486, "win486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_ali1429_init, NULL },
{"[486 ISA] Award 486 clone", ROM_AWARD486_OPTI495, "award486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 64, 1, 127, machine_at_opti495_init, NULL },
{"[486 ISA] DTK PKM-0038S E-2", ROM_DTK486, "dtk486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 128, 1, 127, machine_at_dtk486_init, NULL },
{"[486 ISA] IBM PS/1 machine 2133", ROM_IBMPS1_2133, "ibmps1_2133", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 1, 64, 1, 127, machine_ps1_m2133_init, NULL },
{"[486 MCA] IBM PS/2 model 80-486", ROM_IBMPS2_M80_486, "ibmps2_m80-486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 1, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_PS2_HDD, 1, 32, 1, 63, machine_ps2_model_80_486_init, NULL },
{"[486 MCA] IBM PS/2 model 80-486", ROM_IBMPS2_M80_486, "ibmps2_m80-486", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 1, MACHINE_MCA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC_PS2, 1, 32, 1, 63, machine_ps2_model_80_486_init, NULL },
{"[486 PCI] Rise Computer R418", ROM_R418, "r418", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_VLB | MACHINE_AT | MACHINE_HAS_HDC, 1, 255, 1, 127, machine_at_r418_init, NULL },
{"[486 PCI] Rise Computer R418", ROM_R418, "r418", {{"Intel", cpus_i486}, {"AMD", cpus_Am486}, {"Cyrix", cpus_Cx486}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 1, 255, 1, 127, machine_at_r418_init, NULL },
{"[Socket 4 LX] Intel Premiere/PCI", ROM_REVENGE, "revenge", {{"Intel", cpus_Pentium5V}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 2, 128, 2, 127, machine_at_batman_init, NULL },
{"[Socket 4 LX] Intel Premiere/PCI", ROM_REVENGE, "revenge", {{"Intel", cpus_Pentium5V}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 2, 128, 2, 127, machine_at_batman_init, NULL },
{"[Socket 5 NX] Intel Premiere/PCI II", ROM_PLATO, "plato", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 2, 128, 2, 127, machine_at_plato_init, NULL },
{"[Socket 5 NX] Intel Premiere/PCI II", ROM_PLATO, "plato", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 2, 128, 2, 127, machine_at_plato_init, NULL },
{"[Socket 5 FX] ASUS P/I-P54TP4XE", ROM_P54TP4XE, "p54tp4xe", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HAS_HDC, 8, 128, 8, 127, machine_at_p54tp4xe_init, NULL },
{"[Socket 5 FX] Intel Advanced/EV", ROM_ENDEAVOR, "endeavor", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 8, 128, 8, 127, machine_at_endeavor_init, NULL },
{"[Socket 5 FX] Intel Advanced/ZP", ROM_ZAPPA, "zappa", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 8, 128, 8, 127, machine_at_zappa_init, NULL },
{"[Socket 5 FX] PC Partner MB500N", ROM_MB500N, "mb500n", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HAS_HDC, 8, 128, 8, 127, machine_at_mb500n_init, NULL },
{"[Socket 5 FX] President Award 430FX PCI",ROM_PRESIDENT, "president", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HAS_HDC, 8, 128, 8, 127, machine_at_president_init, NULL },
{"[Socket 5 FX] ASUS P/I-P54TP4XE", ROM_P54TP4XE, "p54tp4xe", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 8, 128, 8, 127, machine_at_p54tp4xe_init, NULL },
{"[Socket 5 FX] Intel Advanced/EV", ROM_ENDEAVOR, "endeavor", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 128, 8, 127, machine_at_endeavor_init, NULL },
{"[Socket 5 FX] Intel Advanced/ZP", ROM_ZAPPA, "zappa", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 128, 8, 127, machine_at_zappa_init, NULL },
{"[Socket 5 FX] PC Partner MB500N", ROM_MB500N, "mb500n", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 8, 128, 8, 127, machine_at_mb500n_init, NULL },
{"[Socket 5 FX] President Award 430FX PCI",ROM_PRESIDENT, "president", {{ "Intel", cpus_PentiumS5}, {"IDT", cpus_WinChip}, {"AMD", cpus_K5}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_HDC, 8, 128, 8, 127, machine_at_president_init, NULL },
{"[Socket 7 FX] Intel Advanced/ATX", ROM_THOR, "thor", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 8, 128, 8, 127, machine_at_thor_init, NULL },
{"[Socket 7 FX] MR Intel Advanced/ATX", ROM_MRTHOR, "mrthor", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 8, 128, 8, 127, machine_at_thor_init, NULL },
{"[Socket 7 FX] Intel Advanced/ATX", ROM_THOR, "thor", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 128, 8, 127, machine_at_thor_init, NULL },
{"[Socket 7 FX] MR Intel Advanced/ATX", ROM_MRTHOR, "mrthor", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 128, 8, 127, machine_at_thor_init, NULL },
{"[Socket 7 HX] Acer M3a", ROM_ACERM3A, "acerm3a", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 8, 192, 8, 127, machine_at_acerm3a_init, NULL },
{"[Socket 7 HX] Acer V35n", ROM_ACERV35N, "acerv35n", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 8, 192, 8, 127, machine_at_acerv35n_init, NULL },
{"[Socket 7 HX] AOpen AP53", ROM_AP53, "ap53", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 8, 512, 8, 127, machine_at_ap53_init, NULL },
{"[Socket 7 HX] ASUS P/I-P55T2P4", ROM_P55T2P4, "p55t2p4", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 8, 512, 8, 127, machine_at_p55t2p4_init, NULL },
{"[Socket 7 HX] SuperMicro Super P55T2S",ROM_P55T2S, "p55t2s", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 8, 768, 8, 127, machine_at_p55t2s_init, NULL },
{"[Socket 7 HX] Acer M3a", ROM_ACERM3A, "acerm3a", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 192, 8, 127, machine_at_acerm3a_init, NULL },
{"[Socket 7 HX] Acer V35n", ROM_ACERV35N, "acerv35n", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 192, 8, 127, machine_at_acerv35n_init, NULL },
{"[Socket 7 HX] AOpen AP53", ROM_AP53, "ap53", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 512, 8, 127, machine_at_ap53_init, NULL },
{"[Socket 7 HX] ASUS P/I-P55T2P4", ROM_P55T2P4, "p55t2p4", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 512, 8, 127, machine_at_p55t2p4_init, NULL },
{"[Socket 7 HX] SuperMicro Super P55T2S",ROM_P55T2S, "p55t2s", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 768, 8, 127, machine_at_p55t2s_init, NULL },
{"[Socket 7 VX] ASUS P/I-P55TVP4", ROM_P55TVP4, "p55tvp4", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 8, 128, 8, 127, machine_at_p55tvp4_init, NULL },
{"[Socket 7 VX] Award 430VX PCI", ROM_430VX, "430vx", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 8, 128, 8, 127, machine_at_i430vx_init, NULL },
{"[Socket 7 VX] Epox P55-VA", ROM_P55VA, "p55va", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 8, 128, 8, 127, machine_at_p55va_init, NULL },
{"[Socket 7 VX] ASUS P/I-P55TVP4", ROM_P55TVP4, "p55tvp4", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 128, 8, 127, machine_at_p55tvp4_init, NULL },
{"[Socket 7 VX] Award 430VX PCI", ROM_430VX, "430vx", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 128, 8, 127, machine_at_i430vx_init, NULL },
{"[Socket 7 VX] Epox P55-VA", ROM_P55VA, "p55va", {{"Intel", cpus_Pentium}, {"IDT", cpus_WinChip}, {"AMD", cpus_K56}, {"Cyrix", cpus_6x86},{"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_VLB | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 128, 8, 127, machine_at_p55va_init, NULL },
{"[Socket 8 FX] Tyan Titan-Pro AT", ROM_440FX, "440fx", {{"Intel", cpus_PentiumPro}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 8, 1024, 8, 127, machine_at_i440fx_init, NULL },
{"[Socket 8 FX] Tyan Titan-Pro ATX", ROM_S1668, "tpatx", {{"Intel", cpus_PentiumPro}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HAS_HDC, 8, 1024, 8, 127, machine_at_s1668_init, NULL },
{"[Socket 8 FX] Tyan Titan-Pro AT", ROM_440FX, "440fx", {{"Intel", cpus_PentiumPro}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 1024, 8, 127, machine_at_i440fx_init, NULL },
{"[Socket 8 FX] Tyan Titan-Pro ATX", ROM_S1668, "tpatx", {{"Intel", cpus_PentiumPro}, {"", NULL}, {"", NULL}, {"", NULL}, {"", NULL}}, 0, MACHINE_PCI | MACHINE_ISA | MACHINE_AT | MACHINE_PS2 | MACHINE_HDC, 8, 1024, 8, 127, machine_at_s1668_init, NULL },
{"", -1, "", {{"", 0}, {"", 0}, {"", 0}}, 0,0,0,0, 0 }
};
@@ -146,16 +142,16 @@ machine_init(void)
/* Set up the architecture flags. */
AT = IS_ARCH(machine, MACHINE_AT);
PCI = IS_ARCH(machine, MACHINE_PCI);
AMSTRAD = IS_ARCH(machine, MACHINE_AMSTRAD);
TANDY = 0;
/* Load the machine's ROM BIOS. */
rom_load_bios(romset);
mem_add_bios();
if (machines[machine].get_device)
device_add(machines[machine].get_device());
/* Add video card unless its their internal one. */
if (! machines[machine].fixed_gfxcard)
video_reset_card(gfxcard);
/* All good, boot the machine! */
machines[machine].init(&machines[machine]);
}

View File

@@ -8,7 +8,7 @@
*
* Handling of the emulated machines.
*
* Version: @(#)machine.h 1.0.8 2017/11/01
* Version: @(#)machine.h 1.0.9 2017/11/04
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -26,20 +26,17 @@
#define MACHINE_PC 0x000000 /* PC architecture */
#define MACHINE_AT 0x000001 /* PC/AT architecture */
#define MACHINE_PS2 0x000002 /* PS/2 architecture */
#define MACHINE_ISA 0x000010 /* machine has ISA bus */
#define MACHINE_CBUS 0x000020 /* machine has C-BUS bus */
#define MACHINE_EISA 0x000040 /* machine has EISA bus */
#define MACHINE_VLB 0x000080 /* machine has VL bus */
#define MACHINE_MCA 0x000100 /* machine has MCA bus */
#define MACHINE_PCI 0x000200 /* machine has PCI */
#define MACHINE_AGP 0x000400 /* machine has AGP */
#define MACHINE_HAS_HDC 0x001000 /* machine has internal HDC */
#define MACHINE_PS2_HDD 0x002000 // can now remove? --FvK
#define MACHINE_NEC 0x010000
#define MACHINE_FUJITSU 0x020000
#define MACHINE_AMSTRAD 0x040000
#define MACHINE_OLIM24 0x080000
#define MACHINE_RM 0x100000
#define MACHINE_ISA 0x000010 /* sys has ISA bus */
#define MACHINE_CBUS 0x000020 /* sys has C-BUS bus */
#define MACHINE_EISA 0x000040 /* sys has EISA bus */
#define MACHINE_VLB 0x000080 /* sys has VL bus */
#define MACHINE_MCA 0x000100 /* sys has MCA bus */
#define MACHINE_PCI 0x000200 /* sys has PCI bus */
#define MACHINE_AGP 0x000400 /* sys has AGP bus */
#define MACHINE_HDC 0x001000 /* sys has int HDC */
#define MACHINE_HDC_PS2 0x002000 /* sys has int PS/2 HDC */
#define MACHINE_MOUSE 0x004000 /* sys has int mouse */
#define MACHINE_VIDEO 0x008000 /* sys has int video */
#define IS_ARCH(m, a) (machines[(m)].flags & (a)) ? 1 : 0;
@@ -74,7 +71,7 @@ typedef struct _machine_ {
extern machine_t machines[];
extern int machine;
extern int romset;
extern int AMSTRAD, TANDY, AT, PCI;
extern int AT, PCI;
/* Core functions. */
@@ -93,13 +90,6 @@ extern char *machine_get_internal_name_ex(int m);
extern int machine_get_nvrmask(int m);
/* Global variables for boards and systems. */
#ifdef EMU_MOUSE_H
extern mouse_t mouse_amstrad;
extern mouse_t mouse_olim24;
#endif
/* Initialization functions for boards and systems. */
extern void machine_common_init(machine_t *);

View File

@@ -1,178 +0,0 @@
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../io.h"
#include "../nmi.h"
#include "../mem.h"
#include "../rom.h"
#include "../device.h"
#include "../nvr.h"
#include "../game/gameport.h"
#include "../keyboard.h"
#include "../keyboard_amstrad.h"
#include "../mouse.h"
#include "../lpt.h"
#include "../floppy/floppy.h"
#include "../floppy/fdd.h"
#include "../floppy/fdc.h"
#include "machine.h"
typedef struct {
int oldb;
} mouse_amstrad_t;
static uint8_t amstrad_dead;
static uint8_t mousex, mousey;
static uint8_t
amstrad_read(uint16_t port, void *priv)
{
pclog("amstrad_read: %04X\n", port);
switch (port) {
case 0x379:
return(7);
case 0x37a:
if (romset == ROM_PC1512) return(0x20);
if (romset == ROM_PC200) return(0x80);
return(0);
case 0xdead:
return(amstrad_dead);
}
return(0xff);
}
static void
amstrad_write(uint16_t port, uint8_t val, void *priv)
{
switch (port) {
case 0xdead:
amstrad_dead = val;
break;
}
}
static void
amstrad_mouse_write(uint16_t addr, uint8_t val, void *priv)
{
if (addr == 0x78)
mousex = 0;
else
mousey = 0;
}
static uint8_t
amstrad_mouse_read(uint16_t addr, void *priv)
{
if (addr == 0x78)
return(mousex);
return(mousey);
}
static uint8_t
amstrad_mouse_poll(int x, int y, int z, int b, void *priv)
{
mouse_amstrad_t *ms = (mouse_amstrad_t *)priv;
mousex += x;
mousey -= y;
if ((b & 1) && !(ms->oldb & 1))
keyboard_send(0x7e);
if ((b & 2) && !(ms->oldb & 2))
keyboard_send(0x7d);
if (!(b & 1) && (ms->oldb & 1))
keyboard_send(0xfe);
if (!(b & 2) && (ms->oldb & 2))
keyboard_send(0xfd);
ms->oldb = b;
return(0);
}
static void *
amstrad_mouse_init(mouse_t *info)
{
mouse_amstrad_t *ms = (mouse_amstrad_t *)malloc(sizeof(mouse_amstrad_t));
memset(ms, 0x00, sizeof(mouse_amstrad_t));
return(ms);
}
static void
amstrad_mouse_close(void *priv)
{
mouse_amstrad_t *ms = (mouse_amstrad_t *)priv;
free(ms);
}
mouse_t mouse_amstrad = {
"Amstrad mouse",
"amstrad",
MOUSE_TYPE_AMSTRAD,
amstrad_mouse_init,
amstrad_mouse_close,
amstrad_mouse_poll
};
static void
amstrad_init(void)
{
lpt2_remove_ams();
io_sethandler(0x0078, 1,
amstrad_mouse_read, NULL, NULL,
amstrad_mouse_write, NULL, NULL, NULL);
io_sethandler(0x007a, 1,
amstrad_mouse_read, NULL, NULL,
amstrad_mouse_write, NULL, NULL, NULL);
io_sethandler(0x0379, 2,
amstrad_read, NULL, NULL,
NULL, NULL, NULL, NULL);
io_sethandler(0xdead, 1,
amstrad_read, NULL, NULL,
amstrad_write, NULL, NULL, NULL);
}
void
machine_amstrad_init(machine_t *model)
{
machine_common_init(model);
amstrad_init();
keyboard_amstrad_init();
/* FIXME: make sure this is correct? */
nvr_at_init(1);
nmi_init();
fdc_set_dskchg_activelow();
if (joystick_type != 7)
device_add(&gameport_device);
}

View File

@@ -1,52 +0,0 @@
/* Copyright holders: Sarah Walker
see COPYING for more details
*/
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../io.h"
#include "../nmi.h"
#include "../mem.h"
#include "../device.h"
#include "../nvr.h"
#include "../game/gameport.h"
#include "../keyboard_olim24.h"
#include "machine.h"
static uint8_t olivetti_m24_read(uint16_t port, void *priv)
{
switch (port)
{
case 0x66:
return 0x00;
case 0x67:
return 0x20 | 0x40 | 0x0C;
}
return 0xff;
}
static void olivetti_m24_init(void)
{
io_sethandler(0x0066, 0x0002, olivetti_m24_read, NULL, NULL, NULL, NULL, NULL, NULL);
}
void
machine_olim24_init(machine_t *model)
{
machine_common_init(model);
keyboard_olim24_init();
/* FIXME: make sure this is correct?? */
nvr_at_init(8);
olivetti_m24_init();
nmi_init();
if (joystick_type != 7) device_add(&gameport_device);
}

View File

@@ -1,33 +0,0 @@
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../nmi.h"
#include "../pic.h"
#include "../pit.h"
#include "../mem.h"
#include "../device.h"
#include "../serial.h"
#include "../keyboard_pcjr.h"
#include "../floppy/floppy.h"
#include "../floppy/fdc.h"
#include "../floppy/fdd.h"
#include "../sound/snd_sn76489.h"
#include "machine.h"
void
machine_pcjr_init(machine_t *model)
{
fdc_add_pcjr();
pic_init();
pit_init();
pit_set_out_func(&pit, 0, pit_irq0_timer_pcjr);
if (serial_enabled[0])
serial_setup(1, 0x2f8, 3);
keyboard_pcjr_init();
device_add(&sn76489_device);
nmi_mask = 0x80;
}

View File

@@ -1,51 +0,0 @@
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <wchar.h>
#include "../86box.h"
#include "../ibm.h"
#include "../nmi.h"
#include "../mem.h"
#include "../rom.h"
#include "../device.h"
#include "../game/gameport.h"
#include "../keyboard_xt.h"
#include "../tandy_eeprom.h"
#include "../tandy_rom.h"
#include "../sound/snd_pssj.h"
#include "../sound/snd_sn76489.h"
#include "machine.h"
void
machine_tandy1k_init(machine_t *model)
{
TANDY = 1;
machine_common_init(model);
keyboard_tandy_init();
if (romset == ROM_TANDY)
device_add(&sn76489_device);
else
device_add(&ncr8496_device);
nmi_init();
if (romset != ROM_TANDY)
device_add(&tandy_eeprom_device);
if (joystick_type != 7)
device_add(&gameport_device);
}
void
machine_tandy1ksl2_init(machine_t *model)
{
machine_common_init(model);
keyboard_tandy_init();
device_add(&pssj_device);
nmi_init();
device_add(&tandy_rom_device);
device_add(&tandy_eeprom_device);
if (joystick_type != 7) device_add(&gameport_device);
}

Some files were not shown because too many files have changed in this diff Show More