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Merge remote-tracking branch 'origin/master' into feature/cdrom-ioctl

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This commit is contained in:
OBattler
2024-05-19 21:24:19 +02:00
parent 641da43f15 0c9887b0ec
commit 7d7201f1e7
12 changed files with 478 additions and 206 deletions
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6
.github/workflows/cmake_windows_msys2.yml vendored
View File

@@ -67,9 +67,9 @@ jobs:
environment:
# - msystem: MSYS
# toolchain: ./cmake/flags-gcc-x86_64.cmake
- msystem: MINGW32
prefix: mingw-w64-i686
toolchain: ./cmake/flags-gcc-i686.cmake
# - msystem: MINGW32
# prefix: mingw-w64-i686
# toolchain: ./cmake/flags-gcc-i686.cmake
- msystem: MINGW64
prefix: mingw-w64-x86_64
toolchain: ./cmake/flags-gcc-x86_64.cmake

4
src/device/kbc_at.c
View File

@@ -406,7 +406,9 @@ kbc_send_to_ob(atkbc_t *dev, uint8_t val, uint8_t channel, uint8_t stat_hi)
} else if (dev->mem[0x20] & 0x01)
picintlevel(1 << 1, &dev->irq_state); /* AT KBC: IRQ 1 is level-triggered because it is tied to OBF. */
if (dev->is_asic || (kbc_ven == KBC_VEN_IBM_PS1) || (kbc_ven == KBC_VEN_IBM))
#ifdef WRONG_CONDITION
if ((dev->channel > 0) || dev->is_asic || (kbc_ven == KBC_VEN_IBM_PS1) || (kbc_ven == KBC_VEN_IBM))
#endif
kbc_do_irq(dev);
dev->ob = temp;

55
src/dma.c
View File

@@ -458,8 +458,8 @@ static uint8_t
dma_read(uint16_t addr, UNUSED(void *priv))
{
int channel = (addr >> 1) & 3;
uint8_t temp;
int count;
int count;
uint8_t ret = (dmaregs[0][addr & 0xf]);
switch (addr & 0xf) {
case 0:
@@ -468,8 +468,10 @@ dma_read(uint16_t addr, UNUSED(void *priv))
case 6: /*Address registers*/
dma_wp[0] ^= 1;
if (dma_wp[0])
return (dma[channel].ac & 0xff);
return ((dma[channel].ac >> 8) & 0xff);
ret = (dma[channel].ac & 0xff);
else
ret = ((dma[channel].ac >> 8) & 0xff);
break;
case 1:
case 3:
@@ -477,29 +479,30 @@ dma_read(uint16_t addr, UNUSED(void *priv))
case 7: /*Count registers*/
dma_wp[0] ^= 1;
count = dma[channel].cc/* + 1*/;
// if (count > dma[channel].cb)
// count = 0x0000;
if (dma_wp[0])
temp = count & 0xff;
ret = count & 0xff;
else
temp = count >> 8;
return temp;
ret = count >> 8;
break;
case 8: /*Status register*/
temp = dma_stat_rq_pc & 0xf;
temp <<= 4;
temp |= dma_stat & 0xf;
ret = dma_stat_rq_pc & 0xf;
ret <<= 4;
ret |= dma_stat & 0xf;
dma_stat &= ~0xf;
return temp;
break;
case 0xd: /*Temporary register*/
return 0;
ret = 0x00;
break;
default:
break;
}
return (dmaregs[0][addr & 0xf]);
dma_log("DMA: [R] %04X = %02X\n", addr, ret);
return ret;
}
static void
@@ -507,6 +510,8 @@ dma_write(uint16_t addr, uint8_t val, UNUSED(void *priv))
{
int channel = (addr >> 1) & 3;
dma_log("DMA: [W] %04X = %02X\n", addr, val);
dmaregs[0][addr & 0xf] = val;
switch (addr & 0xf) {
case 0:
@@ -537,7 +542,7 @@ dma_write(uint16_t addr, uint8_t val, UNUSED(void *priv))
dma_command[0] = val;
#ifdef ENABLE_DMA_LOG
if (val & 0x01)
pclog("[%08X:%04X] Memory-to-memory enable\n", CS, cpu_state.pc);
dma_log("[%08X:%04X] Memory-to-memory enable\n", CS, cpu_state.pc);
#endif
return;
@@ -546,9 +551,7 @@ dma_write(uint16_t addr, uint8_t val, UNUSED(void *priv))
if (val & 4) {
dma_stat_rq_pc |= (1 << channel);
if ((channel == 0) && (dma_command[0] & 0x01)) {
#ifdef ENABLE_DMA_LOG
pclog("Memory to memory transfer start\n");
#endif
dma_log("Memory to memory transfer start\n");
dma_mem_to_mem_transfer();
} else
dma_block_transfer(channel);
@@ -828,9 +831,7 @@ dma16_read(uint16_t addr, UNUSED(void *priv))
break;
}
#ifdef ENABLE_DMA_LOG
pclog("dma16_read(%08X) = %02X\n", port, ret);
#endif
dma_log("dma16_read(%08X) = %02X\n", port, ret);
return ret;
}
@@ -839,9 +840,9 @@ static void
dma16_write(uint16_t addr, uint8_t val, UNUSED(void *priv))
{
int channel = ((addr >> 2) & 3) + 4;
#ifdef ENABLE_DMA_LOG
pclog("dma16_write(%08X, %02X)\n", addr, val);
#endif
dma_log("dma16_write(%08X, %02X)\n", addr, val);
addr >>= 1;
dmaregs[1][addr & 0xf] = val;
@@ -944,6 +945,8 @@ dma_page_write(uint16_t addr, uint8_t val, UNUSED(void *priv))
{
uint8_t convert[8] = CHANNELS;
dma_log("DMA: [W] %04X = %02X\n", addr, val);
#ifdef USE_DYNAREC
if ((addr == 0x84) && cpu_use_dynarec)
update_tsc();
@@ -1020,6 +1023,8 @@ dma_page_read(uint16_t addr, UNUSED(void *priv))
ret = dma[addr].page_l;
}
dma_log("DMA: [R] %04X = %02X\n", addr, ret);
return ret;
}

4
src/include/86box/plat.h
View File

@@ -138,7 +138,9 @@ extern int plat_getcwd(char *bufp, int max);
extern int plat_chdir(char *path);
extern void plat_tempfile(char *bufp, char *prefix, char *suffix);
extern void plat_get_exe_name(char *s, int size);
extern void plat_get_global_config_dir(char* strptr);
extern void plat_get_global_config_dir(char *outbuf, uint8_t len);
extern void plat_get_global_data_dir(char *outbuf, uint8_t len);
extern void plat_get_temp_dir(char *outbuf, uint8_t len);
extern void plat_init_rom_paths(void);
extern int plat_dir_check(char *path);
extern int plat_dir_create(char *path);

9
src/include/86box/vid_8514a.h
View File

@@ -32,6 +32,13 @@ typedef struct hwcursor8514_t {
uint32_t pitch;
} hwcursor8514_t;
typedef union {
uint64_t q;
uint32_t d[2];
uint16_t w[4];
uint8_t b[8];
} latch8514_t;
typedef struct ibm8514_t {
rom_t bios_rom;
rom_t bios_rom2;
@@ -217,6 +224,8 @@ typedef struct ibm8514_t {
int ext_pitch;
int ext_crt_pitch;
int extensions;
latch8514_t latch;
} ibm8514_t;
#endif /*VIDEO_8514A_H*/

2
src/machine/machine_table.c
View File

@@ -13865,7 +13865,7 @@ const machine_t machines[] = {
.min_multi = 1.5,
.max_multi = 8.0
},
.bus_flags = MACHINE_PS2_AGP,
.bus_flags = MACHINE_PS2_PCI,
.flags = MACHINE_IDE_DUAL | MACHINE_APM | MACHINE_ACPI | MACHINE_USB,
.ram = {
.min = 8192,

36
src/qt/qt_platform.cpp
View File

@@ -637,15 +637,34 @@ plat_chdir(char *path)
}
void
plat_get_global_config_dir(char* strptr)
plat_get_global_config_dir(char *outbuf, const uint8_t len)
{
#ifdef __APPLE__
auto dir = QDir(QStandardPaths::standardLocations(QStandardPaths::GenericConfigLocation)[0] + "/net.86Box.86Box/");
#else
auto dir = QDir(QStandardPaths::standardLocations(QStandardPaths::GenericConfigLocation)[0] + "/86Box/");
#endif
if (!dir.exists()) dir.mkpath(".");
strncpy(strptr, dir.canonicalPath().toUtf8().constData(), 1024);
const auto dir = QDir(QStandardPaths::standardLocations(QStandardPaths::AppConfigLocation)[0]);
if (!dir.exists()) {
if (!dir.mkpath(".")) {
qWarning("Failed to create global configuration directory %s", dir.absolutePath().toUtf8().constData());
}
}
strncpy(outbuf, dir.canonicalPath().toUtf8().constData(), len);
}
void
plat_get_global_data_dir(char *outbuf, const uint8_t len)
{
const auto dir = QDir(QStandardPaths::standardLocations(QStandardPaths::AppDataLocation)[0]);
if (!dir.exists()) {
if (!dir.mkpath(".")) {
qWarning("Failed to create global data directory %s", dir.absolutePath().toUtf8().constData());
}
}
strncpy(outbuf, dir.canonicalPath().toUtf8().constData(), len);
}
void
plat_get_temp_dir(char *outbuf, const uint8_t len)
{
const auto dir = QDir(QStandardPaths::standardLocations(QStandardPaths::TempLocation)[0]);
strncpy(outbuf, dir.canonicalPath().toUtf8().constData(), len);
}
void
@@ -665,6 +684,7 @@ plat_init_rom_paths(void)
for (auto &path : paths) {
#ifdef __APPLE__
rom_add_path(QDir(path).filePath("net.86Box.86Box/roms").toUtf8().constData());
rom_add_path(QDir(path).filePath("86Box/roms").toUtf8().constData());
#else
rom_add_path(QDir(path).filePath("86Box/roms").toUtf8().constData());
#endif

172
src/sound/snd_sb_dsp.c
View File

@@ -543,9 +543,41 @@ sb_ess_get_dma_len(const sb_dsp_t *dsp)
return 0x10000U - sb_ess_get_dma_counter(dsp);
}
static void
sb_resume_dma(const sb_dsp_t *dsp, const int is_8)
{
if IS_ESS(dsp)
{
dma_set_drq(dsp->sb_8_dmanum, 1);
dma_set_drq(dsp->sb_16_8_dmanum, 1);
} else if (is_8)
dma_set_drq(dsp->sb_8_dmanum, 1);
else {
if (dsp->sb_16_dmanum != 0xff)
dma_set_drq(dsp->sb_16_dmanum, 1);
if (dsp->sb_16_8_dmanum != 0xff)
dma_set_drq(dsp->sb_16_8_dmanum, 1);
}
}
static void
sb_stop_dma(const sb_dsp_t *dsp)
{
dma_set_drq(dsp->sb_8_dmanum, 0);
if (dsp->sb_16_dmanum != 0xff)
dma_set_drq(dsp->sb_16_dmanum, 0);
if (dsp->sb_16_8_dmanum != 0xff)
dma_set_drq(dsp->sb_16_8_dmanum, 0);
}
void
sb_start_dma(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int len)
{
sb_stop_dma(dsp);
dsp->sb_pausetime = -1;
if (dma8) {
@@ -590,6 +622,8 @@ sb_start_dma(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int len)
void
sb_start_dma_i(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int len)
{
sb_stop_dma(dsp);
if (dma8) {
dsp->sb_8_length = dsp->sb_8_origlength = len;
dsp->sb_8_format = format;
@@ -1549,35 +1583,43 @@ sb_exec_command(sb_dsp_t *dsp)
break;
case 0xD0: /* Pause 8-bit DMA */
dsp->sb_8_pause = 1;
sb_stop_dma(dsp);
break;
case 0xD1: /* Speaker on */
if (IS_NOT_ESS(dsp)) {
if (dsp->sb_type < SB15)
if (dsp->sb_type < SB15) {
dsp->sb_8_pause = 1;
else if (dsp->sb_type < SB16)
sb_stop_dma(dsp);
} else if (dsp->sb_type < SB16)
dsp->muted = 0;
}
dsp->sb_speaker = 1;
break;
case 0xD3: /* Speaker off */
if (IS_NOT_ESS(dsp)) {
if (dsp->sb_type < SB15)
if (dsp->sb_type < SB15) {
dsp->sb_8_pause = 1;
else if (dsp->sb_type < SB16)
sb_stop_dma(dsp);
} else if (dsp->sb_type < SB16)
dsp->muted = 1;
}
dsp->sb_speaker = 0;
break;
case 0xD4: /* Continue 8-bit DMA */
dsp->sb_8_pause = 0;
sb_resume_dma(dsp, 1);
break;
case 0xD5: /* Pause 16-bit DMA */
if (dsp->sb_type >= SB16)
if (dsp->sb_type >= SB16) {
dsp->sb_16_pause = 1;
sb_stop_dma(dsp);
}
break;
case 0xD6: /* Continue 16-bit DMA */
if (dsp->sb_type >= SB16)
if (dsp->sb_type >= SB16) {
dsp->sb_16_pause = 0;
sb_resume_dma(dsp, 1);
}
break;
case 0xD8: /* Get speaker status */
sb_add_data(dsp, dsp->sb_speaker ? 0xff : 0);
@@ -2002,7 +2044,12 @@ sb_dsp_init(sb_dsp_t *dsp, int type, int subtype, void *parent)
/* Default values. Use sb_dsp_setxxx() methods to change. */
dsp->sb_irqnum = 7;
dsp->sb_8_dmanum = 1;
dsp->sb_16_dmanum = 5;
if (type >= SB16)
dsp->sb_16_dmanum = 5;
else
dsp->sb_16_dmanum = 0xff;
if ((type >= SB16) || IS_ESS(dsp))
dsp->sb_16_8_dmanum = 0x1;
dsp->mpu = NULL;
dsp->sbleftright_default = 0;
@@ -2111,13 +2158,14 @@ sb_dsp_dma_attach(sb_dsp_t *dsp,
dsp->dma_priv = priv;
}
void
sb_ess_finish_dma(sb_dsp_t *dsp)
static void
sb_finish_dma(sb_dsp_t *dsp)
{
if (!dsp->ess_playback_mode)
return;
ESSreg(0xB8) &= ~0x01;
dma_set_drq(dsp->sb_8_dmanum, 0);
if (dsp->ess_playback_mode) {
ESSreg(0xB8) &= ~0x01;
dma_set_drq(dsp->sb_8_dmanum, 0);
} else
sb_stop_dma(dsp);
}
void
@@ -2347,34 +2395,29 @@ pollsb(void *priv)
break;
case ESPCM_4:
if (dsp->espcm_sample_idx >= 19) {
if (dsp->espcm_sample_idx >= 19)
dsp->espcm_sample_idx = 0;
}
if (dsp->espcm_sample_idx == 0) {
sb_espcm_fifoctl_run(dsp);
if (fifo_get_empty(dsp->espcm_fifo)) {
if (fifo_get_empty(dsp->espcm_fifo))
break;
}
dsp->espcm_byte_buffer[0] = fifo_read(dsp->espcm_fifo);
dsp->espcm_range = dsp->espcm_byte_buffer[0] & 0x0F;
tempi = dsp->espcm_byte_buffer[0] >> 4;
} else if (dsp->espcm_sample_idx & 1) {
sb_espcm_fifoctl_run(dsp);
if (fifo_get_empty(dsp->espcm_fifo)) {
if (fifo_get_empty(dsp->espcm_fifo))
break;
}
dsp->espcm_byte_buffer[0] = fifo_read(dsp->espcm_fifo);
dsp->sb_8_length--;
tempi = dsp->espcm_byte_buffer[0] & 0x0F;
} else {
} else
tempi = dsp->espcm_byte_buffer[0] >> 4;
}
if (dsp->espcm_sample_idx == 18) {
if (dsp->espcm_sample_idx == 18)
dsp->sb_8_length--;
}
dsp->espcm_sample_idx++;
@@ -2389,20 +2432,17 @@ pollsb(void *priv)
else
dsp->sbdatr = dsp->sbdat;
dsp->sbleftright = !dsp->sbleftright;
} else {
} else
dsp->sbdatl = dsp->sbdatr = dsp->sbdat;
}
break;
case ESPCM_3:
if (dsp->espcm_sample_idx >= 19) {
if (dsp->espcm_sample_idx >= 19)
dsp->espcm_sample_idx = 0;
}
if (dsp->espcm_sample_idx == 0) {
sb_espcm_fifoctl_run(dsp);
if (fifo_get_empty(dsp->espcm_fifo)) {
if (fifo_get_empty(dsp->espcm_fifo))
break;
}
dsp->espcm_byte_buffer[0] = fifo_read(dsp->espcm_fifo);
dsp->espcm_range = dsp->espcm_byte_buffer[0] & 0x0F;
@@ -2411,15 +2451,13 @@ pollsb(void *priv)
} else if (dsp->espcm_sample_idx == 1) {
for (tempi = 0; tempi < 4; tempi++) {
sb_espcm_fifoctl_run(dsp);
if (fifo_get_empty(dsp->espcm_fifo)) {
if (fifo_get_empty(dsp->espcm_fifo))
break;
}
dsp->espcm_byte_buffer[tempi] = fifo_read(dsp->espcm_fifo);
dsp->sb_8_length--;
}
if (tempi < 4) {
if (tempi < 4)
break;
}
dsp->espcm_table_index = dsp->espcm_byte_buffer[0] & 0x03;
@@ -2440,15 +2478,13 @@ pollsb(void *priv)
} else if (dsp->espcm_sample_idx == 11) {
for (tempi = 1; tempi < 4; tempi++) {
sb_espcm_fifoctl_run(dsp);
if (fifo_get_empty(dsp->espcm_fifo)) {
if (fifo_get_empty(dsp->espcm_fifo))
break;
}
dsp->espcm_byte_buffer[tempi] = fifo_read(dsp->espcm_fifo);
dsp->sb_8_length--;
}
if (tempi < 4) {
if (tempi < 4)
break;
}
dsp->espcm_code_buffer[0] = (dsp->espcm_byte_buffer[1]) & 0x07;
dsp->espcm_code_buffer[1] = (dsp->espcm_byte_buffer[1] >> 3) & 0x07;
@@ -2485,20 +2521,19 @@ pollsb(void *priv)
else
dsp->sbdatr = dsp->sbdat;
dsp->sbleftright = !dsp->sbleftright;
} else {
} else
dsp->sbdatl = dsp->sbdatr = dsp->sbdat;
}
break;
case ESPCM_1:
if (dsp->espcm_sample_idx >= 19) {
if (dsp->espcm_sample_idx >= 19)
dsp->espcm_sample_idx = 0;
}
if (dsp->espcm_sample_idx == 0) {
sb_espcm_fifoctl_run(dsp);
if (fifo_get_empty(dsp->espcm_fifo)) {
if (fifo_get_empty(dsp->espcm_fifo))
break;
}
dsp->espcm_byte_buffer[0] = fifo_read(dsp->espcm_fifo);
dsp->espcm_range = dsp->espcm_byte_buffer[0] & 0x0F;
@@ -2520,13 +2555,12 @@ pollsb(void *priv)
dsp->espcm_byte_buffer[0] >>= 1;
}
if (dsp->espcm_sample_idx == 18) {
if (dsp->espcm_sample_idx == 18)
dsp->sb_8_length--;
}
dsp->espcm_sample_idx++;
tempi |= (dsp->espcm_range << 4);
tempi |= (dsp->espcm_range << 4);
data[0] = (int) espcm_range_map[tempi];
dsp->sbdat = (int16_t) (data[0] << 8);
if (dsp->stereo) {
@@ -2537,9 +2571,8 @@ pollsb(void *priv)
else
dsp->sbdatr = dsp->sbdat;
dsp->sbleftright = !dsp->sbleftright;
} else {
} else
dsp->sbdatl = dsp->sbdatr = dsp->sbdat;
}
break;
default:
@@ -2552,7 +2585,7 @@ pollsb(void *priv)
else {
dsp->sb_8_enable = 0;
timer_disable(&dsp->output_timer);
sb_ess_finish_dma(dsp);
sb_finish_dma(dsp);
}
sb_irq(dsp, 1);
dsp->ess_irq_generic = true;
@@ -2562,16 +2595,16 @@ pollsb(void *priv)
if (!dsp->sb_8_autoinit) {
dsp->sb_8_enable = 0;
timer_disable(&dsp->output_timer);
sb_ess_finish_dma(dsp);
sb_finish_dma(dsp);
}
if (ESSreg(0xB1) & 0x40) {
sb_irq(dsp, 1);
dsp->ess_irq_dmactr = true;
}
}
uint32_t temp = dsp->ess_dma_counter & 0xffff;
dsp->ess_dma_counter = sb_ess_get_dma_counter(dsp);
dsp->ess_dma_counter += temp;
const uint32_t temp = dsp->ess_dma_counter & 0xffff;
dsp->ess_dma_counter = sb_ess_get_dma_counter(dsp);
dsp->ess_dma_counter += temp;
}
}
if (dsp->sb_16_enable && !dsp->sb_16_pause && (dsp->sb_pausetime < 0LL) && dsp->sb_16_output) {
@@ -2626,7 +2659,7 @@ pollsb(void *priv)
else {
dsp->sb_16_enable = 0;
timer_disable(&dsp->output_timer);
sb_ess_finish_dma(dsp);
sb_finish_dma(dsp);
}
sb_irq(dsp, 0);
dsp->ess_irq_generic = true;
@@ -2636,16 +2669,16 @@ pollsb(void *priv)
if (!dsp->sb_16_autoinit) {
dsp->sb_16_enable = 0;
timer_disable(&dsp->output_timer);
sb_ess_finish_dma(dsp);
sb_finish_dma(dsp);
}
if (ESSreg(0xB1) & 0x40) {
sb_irq(dsp, 0);
dsp->ess_irq_dmactr = true;
}
}
uint32_t temp = dsp->ess_dma_counter & 0xffff;
dsp->ess_dma_counter = sb_ess_get_dma_counter(dsp);
dsp->ess_dma_counter += temp;
const uint32_t temp = dsp->ess_dma_counter & 0xffff;
dsp->ess_dma_counter = sb_ess_get_dma_counter(dsp);
dsp->ess_dma_counter += temp;
}
}
if (dsp->sb_pausetime > -1) {
@@ -2715,12 +2748,10 @@ sb_poll_i(void *priv)
for (i = 0; i < 19; i++) {
s = dsp->espcm_sample_buffer[i];
if (s < min_sample) {
if (s < min_sample)
min_sample = s;
}
if (s > max_sample) {
if (s > max_sample)
max_sample = s;
}
}
if (min_sample < 0) {
if (min_sample == -128)
@@ -2738,9 +2769,8 @@ sb_poll_i(void *priv)
max_sample = min_sample;
for (table_addr = 15; table_addr < 256; table_addr += 16) {
if (max_sample <= espcm_range_map[table_addr]) {
if (max_sample <= espcm_range_map[table_addr])
break;
}
}
dsp->espcm_range = table_addr >> 4;
@@ -2750,12 +2780,10 @@ sb_poll_i(void *priv)
s = dsp->espcm_sample_buffer[i];
for (; (table_addr >> 4) == dsp->espcm_range; table_addr++) {
int sigma = espcm_range_map[table_addr] - s;
if (sigma < 0) {
if (sigma < 0)
sigma = -sigma;
}
if (sigma > last_sigma) {
if (sigma > last_sigma)
break;
}
last_sigma = sigma;
}
table_addr--;
@@ -2787,7 +2815,7 @@ sb_poll_i(void *priv)
else {
dsp->sb_8_enable = 0;
timer_disable(&dsp->input_timer);
sb_ess_finish_dma(dsp);
sb_finish_dma(dsp);
}
sb_irq(dsp, 1);
dsp->ess_irq_generic = true;
@@ -2797,7 +2825,7 @@ sb_poll_i(void *priv)
if (!dsp->sb_8_autoinit) {
dsp->sb_8_enable = 0;
timer_disable(&dsp->input_timer);
sb_ess_finish_dma(dsp);
sb_finish_dma(dsp);
}
if (ESSreg(0xB1) & 0x40) {
sb_irq(dsp, 1);
@@ -2857,7 +2885,7 @@ sb_poll_i(void *priv)
else {
dsp->sb_16_enable = 0;
timer_disable(&dsp->input_timer);
sb_ess_finish_dma(dsp);
sb_finish_dma(dsp);
}
sb_irq(dsp, 0);
dsp->ess_irq_generic = true;
@@ -2867,7 +2895,7 @@ sb_poll_i(void *priv)
if (!dsp->sb_16_autoinit) {
dsp->sb_16_enable = 0;
timer_disable(&dsp->input_timer);
sb_ess_finish_dma(dsp);
sb_finish_dma(dsp);
}
if (ESSreg(0xB1) & 0x40) {
sb_irq(dsp, 0);

31
src/unix/unix.c
View File

@@ -826,15 +826,32 @@ plat_init_rom_paths(void)
}
void
plat_get_global_config_dir(char *strptr)
plat_get_global_config_dir(char *outbuf, const uint8_t len)
{
#ifdef __APPLE__
char *prefPath = SDL_GetPrefPath(NULL, "net.86Box.86Box");
#else
char *prefPath = SDL_GetPrefPath(NULL, "86Box");
#endif
strncpy(strptr, prefPath, 1024);
path_slash(strptr);
strncpy(outbuf, prefPath, len);
path_slash(outbuf);
SDL_free(prefPath);
}
void
plat_get_global_data_dir(char *outbuf, const uint8_t len)
{
char *prefPath = SDL_GetPrefPath(NULL, "86Box");
strncpy(outbuf, prefPath, len);
path_slash(outbuf);
SDL_free(prefPath);
}
void
plat_get_temp_dir(char *outbuf, uint8_t len)
{
const char *tmpdir = getenv("TMPDIR");
if (tmpdir == NULL) {
tmpdir = "/tmp";
}
strncpy(outbuf, tmpdir, len);
path_slash(outbuf);
}
bool

204
src/video/vid_ati_mach64.c
View File

@@ -621,11 +621,11 @@ mach64_updatemapping(mach64_t *mach64)
break;
}
mach64_log("Mach64 linear aperture = %08x.\n", mach64->linear_base);
if (mach64->linear_base) {
if (mach64->type == MACH64_GX) {
if ((mach64->config_cntl & 3) == 2) {
/*8 MB aperture*/
mach64_log("Mach64 linear aperture=%08x, cfgcntl=%x, mapping=%x, VGAAP=%x.\n", mach64->linear_base + ((8 << 20) - 0x4000), mach64->config_cntl & 3, svga->gdcreg[6] & 0xc, mach64->config_cntl & 4);
mem_mapping_set_addr(&mach64->linear_mapping, mach64->linear_base, (8 << 20) - 0x4000);
mem_mapping_set_addr(&mach64->mmio_linear_mapping, mach64->linear_base + ((8 << 20) - 0x4000), 0x4000);
} else {
@@ -2344,7 +2344,7 @@ mach64_ext_readb(uint32_t addr, void *priv)
ret = 0xff;
break;
}
} else
} else {
switch (addr & 0x3ff) {
case 0x00:
case 0x01:
@@ -2872,6 +2872,7 @@ mach64_ext_readb(uint32_t addr, void *priv)
ret = 0;
break;
}
}
if ((addr & 0x3fc) != 0x018)
mach64_log("mach64_ext_readb : addr %08X ret %02X\n", addr, ret);
return ret;
@@ -3050,7 +3051,7 @@ mach64_ext_writeb(uint32_t addr, uint8_t val, void *priv)
mach64_log("nmach64_ext_writeb: addr=%04x val=%02x\n", addr, val);
} else if (addr & 0x300) {
mach64_accel_write_fifo(mach64, addr & 0x3ff, val);
} else
} else {
switch (addr & 0x3ff) {
case 0x00:
case 0x01:
@@ -3232,17 +3233,20 @@ mach64_ext_writeb(uint32_t addr, uint8_t val, void *priv)
case 0xc2:
case 0xc3:
if (mach64->type == MACH64_GX)
ati68860_ramdac_out((addr & 3) | ((mach64->dac_cntl & 3) << 2), val, mach64->svga.ramdac, &mach64->svga);
ati68860_ramdac_out((addr & 3) | ((mach64->dac_cntl & 3) << 2), val, svga->ramdac, svga);
else
ati68860_ramdac_out(addr & 3, val, mach64->svga.ramdac, &mach64->svga);
ati68860_ramdac_out(addr & 3, val, svga->ramdac, svga);
break;
case 0xc4:
case 0xc5:
case 0xc6:
case 0xc7:
WRITE8(addr, mach64->dac_cntl, val);
svga_set_ramdac_type(svga, (mach64->dac_cntl & 0x100) ? RAMDAC_8BIT : RAMDAC_6BIT);
ati68860_set_ramdac_type(mach64->svga.ramdac, (mach64->dac_cntl & 0x100) ? RAMDAC_8BIT : RAMDAC_6BIT);
mach64_log("Ext RAMDAC TYPE write=%x, bit set=%03x.\n", addr & 0x3ff, mach64->dac_cntl & 0x100);
if ((addr & 3) >= 1) {
svga_set_ramdac_type(svga, !!(mach64->dac_cntl & 0x100));
ati68860_set_ramdac_type(svga->ramdac, !!(mach64->dac_cntl & 0x100));
}
i2c_gpio_set(mach64->i2c, !(mach64->dac_cntl & 0x20000000) || (mach64->dac_cntl & 0x04000000), !(mach64->dac_cntl & 0x10000000) || (mach64->dac_cntl & 0x02000000));
break;
@@ -3275,7 +3279,9 @@ mach64_ext_writeb(uint32_t addr, uint8_t val, void *priv)
default:
break;
}
}
}
void
mach64_ext_writew(uint32_t addr, uint16_t val, void *priv)
{
@@ -3555,6 +3561,7 @@ void
mach64_ext_outb(uint16_t port, uint8_t val, void *priv)
{
mach64_t *mach64 = (mach64_t *) priv;
svga_t *svga = &mach64->svga;
mach64_log("mach64_ext_outb : port %04X val %02X\n", port, val);
switch (port) {
@@ -3695,9 +3702,9 @@ mach64_ext_outb(uint16_t port, uint8_t val, void *priv)
case 0x5eee:
case 0x5eef:
if (mach64->type == MACH64_GX)
ati68860_ramdac_out((port & 3) | ((mach64->dac_cntl & 3) << 2), val, mach64->svga.ramdac, &mach64->svga);
ati68860_ramdac_out((port & 3) | ((mach64->dac_cntl & 3) << 2), val, svga->ramdac, svga);
else
ati68860_ramdac_out(port & 3, val, mach64->svga.ramdac, &mach64->svga);
ati68860_ramdac_out(port & 3, val, svga->ramdac, svga);
break;
case 0x62ec:
@@ -3818,8 +3825,7 @@ mach64_writew(uint32_t addr, uint16_t val, void *priv)
{
mach64_t *mach64 = (mach64_t *) priv;
svga_t *svga = &mach64->svga;
addr = (addr & 0x7fff) + mach64->bank_w[(addr >> 15) & 1];
addr = (addr & 0x7fff) + mach64->bank_w[(addr >> 15) & 1];
svga_writew_linear(addr, val, svga);
}
void
@@ -3827,8 +3833,7 @@ mach64_writel(uint32_t addr, uint32_t val, void *priv)
{
mach64_t *mach64 = (mach64_t *) priv;
svga_t *svga = &mach64->svga;
addr = (addr & 0x7fff) + mach64->bank_w[(addr >> 15) & 1];
addr = (addr & 0x7fff) + mach64->bank_w[(addr >> 15) & 1];
svga_writel_linear(addr, val, svga);
}
@@ -3847,18 +3852,20 @@ mach64_readw(uint32_t addr, void *priv)
{
mach64_t *mach64 = (mach64_t *) priv;
svga_t *svga = &mach64->svga;
uint16_t ret;
addr = (addr & 0x7fff) + mach64->bank_r[(addr >> 15) & 1];
return svga_readw_linear(addr, svga);
ret = svga_readw_linear(addr, svga);
return ret;
}
uint32_t
mach64_readl(uint32_t addr, void *priv)
{
mach64_t *mach64 = (mach64_t *) priv;
svga_t *svga = &mach64->svga;
uint32_t ret;
addr = (addr & 0x7fff) + mach64->bank_r[(addr >> 15) & 1];
return svga_readl_linear(addr, svga);
ret = svga_readl_linear(addr, svga);
return ret;
}
#define CLAMP(x) \
@@ -4202,16 +4209,34 @@ mach64_io_remove(mach64_t *mach64)
static void
mach64_io_set(mach64_t *mach64)
{
uint16_t io_base = 0x02ec;
mach64_io_remove(mach64);
switch (mach64->io_base) {
default:
case 0:
io_base = 0x02ec;
break;
case 1:
io_base = 0x01cc;
break;
case 2:
io_base = 0x01c8;
break;
case 3:
fatal("Attempting to use the reserved value for I/O Base\n");
return;
}
io_sethandler(0x03c0, 0x0020, mach64_in, NULL, NULL, mach64_out, NULL, NULL, mach64);
if (!mach64->use_block_decoded_io) {
for (uint8_t c = 0; c < 8; c++) {
io_sethandler((c * 0x1000) + 0x2ec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
io_sethandler((c * 0x1000) + 0x6ec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
io_sethandler((c * 0x1000) + 0xaec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
io_sethandler((c * 0x1000) + 0xeec, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
io_sethandler((c * 0x1000) + 0x0000 + io_base, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
io_sethandler((c * 0x1000) + 0x0400 + io_base, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
io_sethandler((c * 0x1000) + 0x0800 + io_base, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
io_sethandler((c * 0x1000) + 0x0c00 + io_base, 0x0004, mach64_ext_inb, mach64_ext_inw, mach64_ext_inl, mach64_ext_outb, mach64_ext_outw, mach64_ext_outl, mach64);
}
}
@@ -4221,6 +4246,107 @@ mach64_io_set(mach64_t *mach64)
io_sethandler(mach64->block_decoded_io, 0x0400, mach64_block_inb, mach64_block_inw, mach64_block_inl, mach64_block_outb, mach64_block_outw, mach64_block_outl, mach64);
}
static uint8_t
mach64_read_linear(uint32_t addr, void *priv)
{
const svga_t *svga = (svga_t *) priv;
cycles -= svga->monitor->mon_video_timing_read_b;
if (!svga->fast) {
if (svga->chain2_read) {
addr &= ~1;
addr <<= 2;
}
}
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
return 0xff;
return svga->vram[addr & svga->vram_mask];
}
static uint16_t
mach64_readw_linear(uint32_t addr, void *priv)
{
svga_t *svga = (svga_t *) priv;
cycles -= svga->monitor->mon_video_timing_read_w;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
return 0xffff;
return *(uint16_t *) &svga->vram[addr & svga->vram_mask];
}
static uint32_t
mach64_readl_linear(uint32_t addr, void *priv)
{
svga_t *svga = (svga_t *) priv;
cycles -= svga->monitor->mon_video_timing_read_l;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
return 0xffffffff;
return *(uint32_t *) &svga->vram[addr & svga->vram_mask];
}
static void
mach64_write_linear(uint32_t addr, uint8_t val, void *priv)
{
svga_t *svga = (svga_t *) priv;
cycles -= svga->monitor->mon_video_timing_write_b;
if (!svga->fast) {
if (svga->chain2_write) {
addr &= ~1;
addr <<= 2;
}
}
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
return;
addr &= svga->vram_mask;
svga->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
svga->vram[addr] = val;
}
static void
mach64_writew_linear(uint32_t addr, uint16_t val, void *priv)
{
svga_t *svga = (svga_t *) priv;
cycles -= svga->monitor->mon_video_timing_write_w;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
return;
addr &= svga->vram_mask;
svga->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
*(uint16_t *) &svga->vram[addr] = val;
}
static void
mach64_writel_linear(uint32_t addr, uint32_t val, void *priv)
{
svga_t *svga = (svga_t *) priv;
cycles -= svga->monitor->mon_video_timing_write_l;
addr &= svga->decode_mask;
if (addr >= svga->vram_max)
return;
addr &= svga->vram_mask;
svga->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
*(uint32_t *) &svga->vram[addr] = val;
}
uint8_t
mach64_pci_read(UNUSED(int func), int addr, void *priv)
{
@@ -4364,9 +4490,9 @@ mach64_pci_write(UNUSED(int func), int addr, uint8_t val, void *priv)
case 0x33:
mach64->pci_regs[addr] = val;
if (mach64->pci_regs[0x30] & 0x01) {
uint32_t addr = (mach64->pci_regs[0x32] << 16) | (mach64->pci_regs[0x33] << 24);
mach64_log("Mach64 bios_rom enabled at %08x\n", addr);
mem_mapping_set_addr(&mach64->bios_rom.mapping, addr, 0x8000);
uint32_t biosaddr = (mach64->pci_regs[0x32] << 16) | (mach64->pci_regs[0x33] << 24);
mach64_log("Mach64 bios_rom enabled at %08x\n", biosaddr);
mem_mapping_set_addr(&mach64->bios_rom.mapping, biosaddr, 0x8000);
} else {
mach64_log("Mach64 bios_rom disabled\n");
mem_mapping_disable(&mach64->bios_rom.mapping);
@@ -4411,7 +4537,7 @@ mach64_common_init(const device_t *info)
mach64_overlay_draw);
svga->dac_hwcursor.cur_ysize = 64;
mem_mapping_add(&mach64->linear_mapping, 0, 0, svga_read_linear, svga_readw_linear, svga_readl_linear, svga_write_linear, svga_writew_linear, svga_writel_linear, NULL, MEM_MAPPING_EXTERNAL, svga);
mem_mapping_add(&mach64->linear_mapping, 0, 0, mach64_read_linear, mach64_readw_linear, mach64_readl_linear, mach64_write_linear, mach64_writew_linear, mach64_writel_linear, NULL, MEM_MAPPING_EXTERNAL, svga);
mem_mapping_add(&mach64->mmio_linear_mapping, 0, 0, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64);
mem_mapping_add(&mach64->mmio_linear_mapping_2, 0, 0, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64);
mem_mapping_add(&mach64->mmio_mapping, 0xbc000, 0x04000, mach64_ext_readb, mach64_ext_readw, mach64_ext_readl, mach64_ext_writeb, mach64_ext_writew, mach64_ext_writel, NULL, MEM_MAPPING_EXTERNAL, mach64);
@@ -4458,24 +4584,20 @@ mach64gx_init(const device_t *info)
mach64->config_chip_id = 0x000000d7;
mach64->dac_cntl = 5 << 16; /*ATI 68860 RAMDAC*/
mach64->config_stat0 = (5 << 9) | (3 << 3); /*ATI-68860, 256Kx16 DRAM*/
if (info->flags & DEVICE_PCI)
mach64->config_stat0 |= 0; /*PCI, 256Kx16 DRAM*/
else if (info->flags & DEVICE_VLB)
mach64->config_stat0 |= 1; /*VLB, 256Kx16 DRAM*/
else if (info->flags & DEVICE_ISA)
mach64->config_stat0 |= 7; /*ISA 16-bit, 256k16 DRAM*/
ati_eeprom_load(&mach64->eeprom, "mach64.nvr", 1);
if (info->flags & DEVICE_PCI)
if (info->flags & DEVICE_PCI) {
mach64->config_stat0 |= 7; /*PCI, 256Kx16 DRAM*/
ati_eeprom_load(&mach64->eeprom, "mach64_pci.nvr", 1);
rom_init(&mach64->bios_rom, BIOS_ROM_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
else if (info->flags & DEVICE_VLB)
rom_init(&mach64->bios_rom, BIOS_VLB_ROM_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
else if (info->flags & DEVICE_ISA)
rom_init(&mach64->bios_rom, BIOS_ISA_ROM_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
if (info->flags & DEVICE_PCI)
mem_mapping_disable(&mach64->bios_rom.mapping);
} else if (info->flags & DEVICE_VLB) {
mach64->config_stat0 |= 6; /*VLB, 256Kx16 DRAM*/
ati_eeprom_load(&mach64->eeprom, "mach64_vlb.nvr", 1);
rom_init(&mach64->bios_rom, BIOS_VLB_ROM_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
} else if (info->flags & DEVICE_ISA) {
mach64->config_stat0 |= 0; /*ISA 16-bit, 256k16 DRAM*/
ati_eeprom_load(&mach64->eeprom, "mach64.nvr", 1);
rom_init(&mach64->bios_rom, BIOS_ISA_ROM_PATH, 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
}
return mach64;
}

135
src/video/vid_ati_mach8.c
View File

@@ -332,8 +332,9 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
}
if ((dev->accel_bpp == 8) || (dev->accel_bpp == 15) || (dev->accel_bpp == 16) || (dev->accel_bpp == 24)) {
if (cpu_input && (cmd_type == 2))
if ((cmd_type == 2) && cpu_input) {
mach_log("RdMask=%04x, DPCONFIG=%04x, Clipping: l=%d, r=%d, t=%d, b=%d, LineDrawOpt=%04x, BPP=%d, CMDType = %d, offs=%08x, cnt = %d, input = %d, mono_src = %d, frgdsel = %d, d(%d,%d), dstxend = %d, pitch = %d, extcrt = %d, rw = %x, monpattern = %x.\n", rd_mask, mach->accel.dp_config, clip_l, clip_r, clip_t, clip_b, mach->accel.linedraw_opt, dev->accel_bpp, cmd_type, mach->accel.ge_offset, count, cpu_input, mono_src, frgd_sel, dev->accel.cur_x, dev->accel.cur_y, mach->accel.dest_x_end, dev->ext_pitch, dev->ext_crt_pitch, mach->accel.dp_config & 1, mach->accel.mono_pattern_enable);
}
}
switch (cmd_type) {
@@ -816,7 +817,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
if (dev->accel.cur_y >= 0x600)
dev->accel.dy |= ~0x5ff;
if (mach->accel.dp_config == 0x5211) {
if ((mach->accel.dp_config == 0x5211) || (mach->accel.dp_config == 0x3251)) {
if (mach->accel.dest_x_end == 1024) {
goto skip_dx;
}
@@ -2602,7 +2603,7 @@ mach_recalctimings(svga_t *svga)
dev->rowcount = !!(dev->disp_cntl & 0x08);
mach_log("HDISP=%d, VDISP=%d, shadowset=%x, 8514/A mode=%x.\n", dev->hdisp, dev->vdisp, mach->shadow_set & 0x03, dev->accel.advfunc_cntl & 0x04);
if ((dev->hdisp == 640) || (dev->hdisp == 800) || (dev->hdisp == 1280) || dev->bpp) {
if ((dev->hdisp != 1024) || dev->bpp) {
/*For VESA/ATI modes in 8514/A mode.*/
dev->h_disp = dev->hdisp;
dev->dispend = dev->vdisp;
@@ -4865,14 +4866,22 @@ mach32_write_common(uint32_t addr, uint8_t val, int linear, mach_t *mach)
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
int writemask2 = svga->writemask;
int reset_wm = 0;
latch_t vall;
latch8514_t vall;
uint8_t wm = svga->writemask;
uint8_t count;
uint8_t i;
cycles -= svga->monitor->mon_video_timing_write_b;
if (!linear) {
if (linear) {
addr &= svga->decode_mask;
if (addr >= dev->vram_size)
return;
addr &= dev->vram_mask;
dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
dev->vram[addr] = val;
return;
} else {
addr = mach32_decode_addr(svga, addr, 1);
if (addr == 0xffffffff)
return;
@@ -4881,15 +4890,12 @@ mach32_write_common(uint32_t addr, uint8_t val, int linear, mach_t *mach)
if (!(svga->gdcreg[6] & 1))
svga->fullchange = 2;
mach_log("WriteCommon chain4 = %x.\n", svga->chain4);
if (((svga->chain4 && (svga->packed_chain4 || svga->force_old_addr)) || svga->fb_only) && (svga->writemode < 4)) {
writemask2 = 1 << (addr & 3);
addr &= ~3;
} else if (svga->chain4 && (svga->writemode < 4)) {
writemask2 = 1 << (addr & 3);
if (!linear)
addr &= ~3;
addr &= ~3;
addr = ((addr & 0xfffc) << 2) | ((addr & 0x30000) >> 14) | (addr & ~0x3ffff);
} else if (svga->chain2_write) {
writemask2 &= ~0xa;
@@ -4934,7 +4940,7 @@ mach32_write_common(uint32_t addr, uint8_t val, int linear, mach_t *mach)
case 1:
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
dev->vram[addr | i] = svga->latch.b[i];
dev->vram[addr | i] = dev->latch.b[i];
}
return;
case 2:
@@ -4944,7 +4950,7 @@ mach32_write_common(uint32_t addr, uint8_t val, int linear, mach_t *mach)
if (!(svga->gdcreg[3] & 0x18) && (!svga->gdcreg[1] || svga->set_reset_disabled)) {
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
dev->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]);
dev->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (dev->latch.b[i] & ~svga->gdcreg[8]);
}
return;
}
@@ -4967,25 +4973,25 @@ mach32_write_common(uint32_t addr, uint8_t val, int linear, mach_t *mach)
case 0x00: /* Set */
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
dev->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (svga->latch.b[i] & ~svga->gdcreg[8]);
dev->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | (dev->latch.b[i] & ~svga->gdcreg[8]);
}
break;
case 0x08: /* AND */
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
dev->vram[addr | i] = (vall.b[i] | ~svga->gdcreg[8]) & svga->latch.b[i];
dev->vram[addr | i] = (vall.b[i] | ~svga->gdcreg[8]) & dev->latch.b[i];
}
break;
case 0x10: /* OR */
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
dev->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | svga->latch.b[i];
dev->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) | dev->latch.b[i];
}
break;
case 0x18: /* XOR */
for (i = 0; i < count; i++) {
if (writemask2 & (1 << i))
dev->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) ^ svga->latch.b[i];
dev->vram[addr | i] = (vall.b[i] & svga->gdcreg[8]) ^ dev->latch.b[i];
}
break;
@@ -5022,11 +5028,43 @@ mach32_writel(uint32_t addr, uint32_t val, void *priv)
mach32_write_common(addr + 3, val >> 24, 0, mach);
}
static __inline void
mach32_writew_linear(uint32_t addr, uint16_t val, mach_t *mach)
{
svga_t *svga = &mach->svga;
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
cycles -= svga->monitor->mon_video_timing_write_w;
addr &= svga->decode_mask;
if (addr >= dev->vram_size)
return;
addr &= dev->vram_mask;
dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
*(uint16_t *) &dev->vram[addr] = val;
}
static __inline void
mach32_writel_linear(uint32_t addr, uint32_t val, mach_t *mach)
{
svga_t *svga = &mach->svga;
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
cycles -= svga->monitor->mon_video_timing_write_l;
addr &= svga->decode_mask;
if (addr >= dev->vram_size)
return;
addr &= dev->vram_mask;
dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
*(uint32_t *) &dev->vram[addr] = val;
}
static __inline uint8_t
mach32_read_common(uint32_t addr, int linear, mach_t *mach)
{
svga_t *svga = &mach->svga;
const ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
uint32_t latch_addr = 0;
int readplane = svga->readplane;
uint8_t count;
@@ -5035,7 +5073,13 @@ mach32_read_common(uint32_t addr, int linear, mach_t *mach)
cycles -= svga->monitor->mon_video_timing_read_b;
if (!linear) {
if (linear) {
addr &= svga->decode_mask;
if (addr >= dev->vram_size)
return 0xff;
return dev->vram[addr & dev->vram_mask];
} else {
addr = mach32_decode_addr(svga, addr, 0);
if (addr == 0xffffffff)
return 0xff;
@@ -5046,14 +5090,13 @@ mach32_read_common(uint32_t addr, int linear, mach_t *mach)
latch_addr = (addr << count) & svga->decode_mask;
count = (1 << count);
mach_log("ReadCommon chain4 = %x.\n", svga->chain4);
if ((svga->chain4 && (svga->packed_chain4 || svga->force_old_addr)) || svga->fb_only) {
addr &= svga->decode_mask;
if (addr >= dev->vram_size)
return 0xff;
latch_addr = (addr & dev->vram_mask) & ~3;
for (uint8_t i = 0; i < count; i++)
svga->latch.b[i] = dev->vram[latch_addr | i];
dev->latch.b[i] = dev->vram[latch_addr | i];
return dev->vram[addr & dev->vram_mask];
} else if (svga->chain4 && !svga->force_old_addr) {
readplane = addr & 3;
@@ -5068,7 +5111,7 @@ mach32_read_common(uint32_t addr, int linear, mach_t *mach)
return 0xff;
latch_addr = (addr & dev->vram_mask) & ~3;
for (uint8_t i = 0; i < count; i++)
svga->latch.b[i] = dev->vram[latch_addr | i];
dev->latch.b[i] = dev->vram[latch_addr | i];
return dev->vram[addr & dev->vram_mask];
}
@@ -5077,12 +5120,12 @@ mach32_read_common(uint32_t addr, int linear, mach_t *mach)
/* standard VGA latched access */
if (latch_addr >= dev->vram_size) {
for (uint8_t i = 0; i < count; i++)
svga->latch.b[i] = 0xff;
dev->latch.b[i] = 0xff;
} else {
latch_addr &= dev->vram_mask;
for (uint8_t i = 0; i < count; i++)
svga->latch.b[i] = dev->vram[latch_addr | i];
dev->latch.b[i] = dev->vram[latch_addr | i];
}
if (addr >= dev->vram_size)
@@ -5097,7 +5140,7 @@ mach32_read_common(uint32_t addr, int linear, mach_t *mach)
for (uint8_t plane = 0; plane < count; plane++) {
if (svga->colournocare & (1 << plane)) {
/* If we care about a plane, and the pixel has a mismatch on it, clear its bit. */
if (((svga->latch.b[plane] >> pixel) & 1) != ((svga->colourcompare >> plane) & 1))
if (((dev->latch.b[plane] >> pixel) & 1) != ((svga->colourcompare >> plane) & 1))
temp &= ~(1 << pixel);
}
}
@@ -5144,6 +5187,36 @@ mach32_readl(uint32_t addr, void *priv)
return ret;
}
static __inline uint16_t
mach32_readw_linear(uint32_t addr, mach_t *mach)
{
svga_t *svga = &mach->svga;
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
cycles -= svga->monitor->mon_video_timing_read_w;
addr &= svga->decode_mask;
if (addr >= dev->vram_size)
return 0xffff;
return *(uint16_t *) &dev->vram[addr & dev->vram_mask];
}
static __inline uint32_t
mach32_readl_linear(uint32_t addr, mach_t *mach)
{
svga_t *svga = &mach->svga;
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
cycles -= svga->monitor->mon_video_timing_read_l;
addr &= svga->decode_mask;
if (addr >= dev->vram_size)
return 0xffffffff;
return *(uint32_t *) &dev->vram[addr & dev->vram_mask];
}
static void
mach32_ap_writeb(uint32_t addr, uint8_t val, void *priv)
{
@@ -5190,8 +5263,7 @@ mach32_ap_writew(uint32_t addr, uint16_t val, void *priv)
} else {
mach_log("Linear WORDW Write=%08x, val=%04x.\n", addr, val);
if (dev->on[0] || dev->on[1]) {
mach32_write_common(addr, val & 0xff, 1, mach);
mach32_write_common(addr + 1, val >> 8, 1, mach);
mach32_writew_linear(addr, val, mach);
} else
svga_writew_linear(addr, val, svga);
}
@@ -5219,10 +5291,7 @@ mach32_ap_writel(uint32_t addr, uint32_t val, void *priv)
} else {
mach_log("Linear WORDL Write=%08x, val=%08x.\n", addr, val);
if (dev->on[0] || dev->on[1]) {
mach32_write_common(addr, val & 0xff, 1, mach);
mach32_write_common(addr + 1, val >> 8, 1, mach);
mach32_write_common(addr + 2, val >> 16, 1, mach);
mach32_write_common(addr + 3, val >> 24, 1, mach);
mach32_writel_linear(addr, val, mach);
} else
svga_writel_linear(addr, val, svga);
}
@@ -5272,8 +5341,7 @@ mach32_ap_readw(uint32_t addr, void *priv)
temp = mach_accel_inw(0x02e8 + (port_dword << 8), mach);
} else {
if (dev->on[0] || dev->on[1]) {
temp = mach32_read_common(addr, 1, mach);
temp |= (mach32_read_common(addr + 1, 1, mach) << 8);
temp = mach32_readw_linear(addr, mach);
} else
temp = svga_readw_linear(addr, svga);
@@ -5303,10 +5371,7 @@ mach32_ap_readl(uint32_t addr, void *priv)
}
} else {
if (dev->on[0] || dev->on[1]) {
temp = mach32_read_common(addr, 1, mach);
temp |= (mach32_read_common(addr + 1, 1, mach) << 8);
temp |= (mach32_read_common(addr + 2, 1, mach) << 16);
temp |= (mach32_read_common(addr + 3, 1, mach) << 24);
temp = mach32_readl_linear(addr, mach);
} else
temp = svga_readl_linear(addr, svga);

26
src/video/vid_xga.c
View File

@@ -1396,8 +1396,11 @@ xga_line_draw_write(svga_t *svga)
}
}
if (!y)
if (!y) {
xga->accel.dst_map_x = dx;
xga->accel.dst_map_y = dy;
break;
}
if (xga->accel.octant & 0x01) {
if (xga->accel.octant & 0x02)
@@ -1511,6 +1514,7 @@ xga_bitblt(svga_t *svga)
xga->accel.dst_map, xga->accel.py, xga->accel.sy, dy,
xga->accel.px_map_width[0], xga->accel.px_map_width[1],
xga->accel.px_map_width[2], xga->accel.px_map_width[3]);
xga_log("PAT8: Pattern Enabled?=%d, xdir=%d, ydir=%d.\n", xga->accel.pattern, xdir, ydir);
while (xga->accel.y >= 0) {
if (xga->accel.command & 0xc0) {
@@ -1569,9 +1573,12 @@ xga_bitblt(svga_t *svga)
}
}
} else if (xga->accel.pat_src >= 1) {
if (patheight == 7)
xga->accel.pattern = 1;
else {
if (patheight == 7) {
if (xga->accel.src_map != 1)
xga->accel.pattern = 1;
else if ((xga->accel.src_map == 1) && (patwidth == 7))
xga->accel.pattern = 1;
} else {
if (dstwidth == (xga->h_disp - 1)) {
if (srcwidth == (xga->h_disp - 1)) {
if ((xga->accel.src_map == 1) && (xga->accel.dst_map == 1) && (xga->accel.pat_src == 2)) {
@@ -1607,6 +1614,7 @@ xga_bitblt(svga_t *svga)
xga->accel.src_map, xga->accel.dst_map, xga->accel.py, xga->accel.sy, xga->accel.dy,
xga->accel.px_map_width[0], xga->accel.px_map_width[1],
xga->accel.px_map_width[2], xga->accel.px_map_width[3], bkgdcol);
xga_log("Pattern Enabled?=%d, patwidth=%d, patheight=%d, P(%d,%d).\n", xga->accel.pattern, patwidth, patheight, xga->accel.px, xga->accel.py);
if ((((xga->accel.command >> 24) & 0x0f) == 0x0a) && ((xga->accel.bkgd_mix & 0x1f) == 5)) {
while (xga->accel.y >= 0) {
@@ -2297,12 +2305,6 @@ xga_mem_read(uint32_t addr, xga_t *xga, UNUSED(svga_t *svga))
temp = xga->vga_bios_rom.rom[addr];
} else {
switch (addr & 0x7f) {
case 0x0c:
temp = xga->regs[0x0c];
break;
case 0x0d:
temp = xga->regs[0x0d];
break;
case 0x11:
temp = xga->accel.control;
if (xga->accel.control & 0x08)
@@ -2932,12 +2934,12 @@ xga_poll(void *priv, svga_t *svga)
if (!xga->linepos) {
if (xga->displine == xga->hwcursor_latch.y && xga->hwcursor_latch.ena) {
xga->hwcursor_on = xga->hwcursor_latch.cur_ysize;
xga->hwcursor_on = xga->hwcursor_latch.cur_ysize - ((xga->hwcursor_latch.yoff & 0x20) ? 32 : 0);
xga->hwcursor_oddeven = 0;
}
if (xga->displine == (xga->hwcursor_latch.y + 1) && xga->hwcursor_latch.ena && xga->interlace) {
xga->hwcursor_on = xga->hwcursor_latch.cur_ysize - 1;
xga->hwcursor_on = xga->hwcursor_latch.cur_ysize - ((xga->hwcursor_latch.yoff & 0x20) ? 33 : 1);
xga->hwcursor_oddeven = 1;
}