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Merge branch 'master' of https://github.com/86Box/86Box into 86Box-master

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This commit is contained in:
Akamaki
2025-02-15 09:02:14 +09:00
parent bfac770b4e 1d87a200e1
commit 8ceec325ef
934 changed files with 79465 additions and 37303 deletions
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1
.ci/AppImageBuilder.yml
View File

@@ -72,6 +72,7 @@ AppDir:
- libxkbcommon-x11-0 # if QT:BOOL=ON
- qtwayland5 # if QT:BOOL=ON
- zlib1g
- libserialport0
files:
exclude:
- etc

7
.ci/Jenkinsfile vendored
View File

@@ -20,11 +20,12 @@ def repository = ['https://github.com/86Box/86Box.git', scm.userRemoteConfigs[0]
def commitBrowser = ['https://github.com/86Box/86Box/commit/%s', null]
def branch = ['master', scm.branches[0].name]
def buildType = ['beta', 'alpha']
def tarballFlags = ['', '-s']
def buildBranch = env.JOB_BASE_NAME.contains('-') ? 1 : 0
def osArchs = [
'Windows': ['32', '64'],
'Linux': ['x86', 'x86_64', 'arm32', 'arm64'],
'Windows': ['64'],
'Linux': ['x86_64', 'arm64'],
'macOS': ['x86_64+x86_64h+arm64']
]
@@ -238,7 +239,7 @@ pipeline {
dir("${env.WORKSPACE_TMP}/output") {
/* Run source tarball creation process. */
def packageName = "${env.JOB_BASE_NAME}-Source$buildSuffix"
if (runBuild("-s \"$packageName\"") == 0) {
if (runBuild("-s \"$packageName\" ${tarballFlags[buildBranch]}") == 0) {
/* Archive resulting artifacts. */
archiveArtifacts artifacts: "$packageName*"
} else {

29
.ci/build.sh
View File

@@ -208,7 +208,7 @@ cmake_flags_extra=
if [ -z "$package_name" -a -z "$tarball_name" ] || [ -n "$package_name" -a -z "$arch" ]
then
echo '[!] Usage: build.sh -b {package_name} {architecture} [-t] [cmake_flags...]'
echo ' build.sh -s {source_tarball_name}'
echo ' build.sh -s {source_tarball_name} [-t]'
echo 'Dep. tree: build.sh -p [archive_tmp/path/to/binary]'
exit 100
fi
@@ -228,7 +228,10 @@ then
[ ! -d "$cwd" ] && mkdir -p "$cwd"
# Save current HEAD commit to VERSION.
git log --stat -1 > VERSION || rm -f VERSION
if [ $strip -eq 0 ]
then
git log --stat -1 > VERSION || rm -f VERSION
fi
# Archive source.
make_tar "$cwd/$tarball_name.tar"
@@ -522,6 +525,9 @@ then
cmake_flags_extra="$cmake_flags_extra -D MOLTENVK=ON -D \"MOLTENVK_INCLUDE_DIR=$macports\""
fi
# Enable Libserialport
cmake_flags_extra="$cmake_flags_extra -D \"LIBSERIALPORT_ROOT=$macports\""
# Install dependencies only if we're in a new build and/or MacPorts prefix.
if check_buildtag "$(basename "$macports")"
then
@@ -535,6 +541,21 @@ then
sudo sed -i -e 's/-no-feature-vulkan/-feature-vulkan/g' "$qt5_portfile"
sudo sed -i -e 's/configure.env-append MAKE=/configure.env-append VULKAN_SDK=${prefix} MAKE=/g' "$qt5_portfile"
fi
# Patch openal-soft to use 1.23.1 on all targets instead of 1.24.2 on >=10.13 only,
# to prevent a symlink mismatch from having different versions on x86_64 and arm64.
# See: https://github.com/macports/macports-ports/commit/9b4903fc9c76769d476079e404c9a3b8a225f8aa
# https://github.com/macports/macports-ports/commit/788deb64dc0695e8d04afb32ed904947f2a7591b
openal_portfile="$macports/var/macports/sources/rsync.macports.org/macports/release/tarballs/ports/audio/openal-soft/Portfile"
sudo sed -i -e 's/if {${os.platform} ne "darwin" ||/if {0 \&\&/g' "$openal_portfile"
# Patch wget to remove libproxy support, as it depends on shared-mime-info which
# fails to build for a 10.13 target, which we have to do despite wget only being
# a host dependency. MacPorts issue 69406 strongly implies this will not be fixed.
wget_portfile="$macports/var/macports/sources/rsync.macports.org/macports/release/tarballs/ports/net/wget/Portfile"
sudo sed -i -e 's/--enable-libproxy/--disable-libproxy/g' "$wget_portfile"
sudo sed -i -e 's/port:libproxy//g' "$wget_portfile"
while :
do
# Attempt to install dependencies.
@@ -582,7 +603,7 @@ else
grep -q " bullseye " /etc/apt/sources.list || echo [!] WARNING: System not running the expected Debian version
# Establish general dependencies.
pkgs="cmake ninja-build pkg-config git wget p7zip-full extra-cmake-modules wayland-protocols tar gzip file appstream"
pkgs="cmake ninja-build pkg-config git wget p7zip-full extra-cmake-modules wayland-protocols tar gzip file appstream qttranslations5-l10n"
if [ "$(dpkg --print-architecture)" = "$arch_deb" ]
then
pkgs="$pkgs build-essential"
@@ -605,7 +626,7 @@ else
# ...and the ones we do want listed. Non-dev packages fill missing spots on the list.
libpkgs=""
longest_libpkg=0
for pkg in libc6-dev libstdc++6 libopenal-dev libfreetype6-dev libx11-dev libsdl2-dev libpng-dev librtmidi-dev qtdeclarative5-dev libwayland-dev libevdev-dev libxkbcommon-x11-dev libglib2.0-dev libslirp-dev libfaudio-dev libaudio-dev libjack-jackd2-dev libpipewire-0.3-dev libsamplerate0-dev libsndio-dev libvdeplug-dev libfluidsynth-dev libsndfile1-dev
for pkg in libc6-dev libstdc++6 libopenal-dev libfreetype6-dev libx11-dev libsdl2-dev libpng-dev librtmidi-dev qtdeclarative5-dev libwayland-dev libevdev-dev libxkbcommon-x11-dev libglib2.0-dev libslirp-dev libfaudio-dev libaudio-dev libjack-jackd2-dev libpipewire-0.3-dev libsamplerate0-dev libsndio-dev libvdeplug-dev libfluidsynth-dev libsndfile1-dev libserialport-dev
do
libpkgs="$libpkgs $pkg:$arch_deb"
length=$(echo -n $pkg | sed 's/-dev$//' | sed "s/qtdeclarative/qt/" | wc -c)

1
.ci/dependencies_macports.txt
View File

@@ -16,3 +16,4 @@ ghostscript
libslirp
vde2
libsndfile
libserialport

1
.ci/dependencies_msys.txt
View File

@@ -14,3 +14,4 @@ qt5-static
qt5-translations
vulkan-headers
libsndfile
libserialport

44
.github/ISSUE_TEMPLATE/bug_report.yml vendored
View File

@@ -6,7 +6,15 @@ body:
- type: markdown
attributes:
value: |
Thanks for taking the time to fill out this bug report!
## Thanks for taking the time to fill out this bug report!
- type: checkboxes
attributes:
label: Checklist
options:
- label: I **have searched** the issue tracker and **was unable** to find an [open](../issues?q=is%3Aissue+is%3Aopen) or [closed](../issues?q=is%3Aissue+is%3Aclosed) issue matching what I'm seeing.
required: true
- label: I **have verified** that the issue is happening in the **[latest nightly build](https://ci.86box.net/job/86Box/lastSuccessfulBuild/artifact/)**, or the latest commit, if building from source.
required: true
- type: textarea
attributes:
label: What happened?
@@ -25,20 +33,13 @@ body:
attributes:
label: Operating system
description: What is your host operating system?
placeholder: e.g. Windows 10
validations:
required: true
- type: input
attributes:
label: CPU
description: What is your host CPU?
placeholder: e.g. AMD Ryzen 5 5600G
placeholder: e.g. Windows 11 24H2
validations:
required: true
- type: input
attributes:
label: 86Box version
description: What version of 86Box are you running? (Saying "Latest from Jenkins" is not helpful.)
description: What version of 86Box are you running? (Please ensure you have updated to the [latest build](https://ci.86box.net/job/86Box/lastSuccessfulBuild/artifact/) before reporting. Merely saying "Latest from Jenkins" is not helpful.)
placeholder: e.g. v4.0 build 5000
validations:
required: true
@@ -47,13 +48,13 @@ body:
label: Build architecture
description: 86Box for what architecture are you using?
options:
- Linux - ARM (32-bit)
- Linux - ARM (64-bit)
- Linux - x64 (64-bit)
- Linux - x86 (32-bit)
- macOS - Universal (Intel and Apple Silicon)
- Windows - x64 (64-bit)
- macOS - Universal (Intel and Apple Silicon)
- Linux - x64 (64-bit)
- Linux - ARM (64-bit)
- Windows - x86 (32-bit)
- Linux - ARM (32-bit)
- Linux - x86 (32-bit)
validations:
required: true
- type: checkboxes
@@ -63,18 +64,7 @@ body:
options:
- label: New recompiler
- label: Debug build
- type: dropdown
attributes:
label: Download source
description: Where did you download 86Box from?
options:
- Official website (Jenkins, GitHub)
- Manager auto-update
- I built 86Box myself (please tell us more about your build configuration)
- I got 86Box from a third party repository (please tell us where)
validations:
required: true
- type: textarea
attributes:
label: Additional context
description: Is there anything else you want to tell us?
description: Is there anything else you want to tell us? If you build 86Box from source, please post your build configuration here.

4
.github/ISSUE_TEMPLATE/config.yml vendored
View File

@@ -1,8 +1,8 @@
blank_issues_enabled: false
contact_links:
- name: Machine Request
url: https://github.com/86Box/86Box/issues/3577#issue-comment-box
about: Please submit machine addition requests under this tracking issue.
url: https://github.com/86Box/86Box/discussions/4823#issue-comment-box
about: Please submit machine addition requests in this discussion thread.
- name: Feature Request or Question
url: https://github.com/86Box/86Box/discussions
about: Please submit feature requests and ask questions here.

7
.github/workflows/cmake_linux.yml vendored
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@@ -63,6 +63,7 @@ jobs:
qtbase5-dev
qtbase5-private-dev
qttools5-dev
qttranslations5-l10n
libevdev-dev
libxkbcommon-x11-dev
@@ -80,6 +81,8 @@ jobs:
libopenal-dev
libslirp-dev
libfluidsynth-dev
libvdeplug-dev
libserialport-dev
${{ matrix.ui.packages }}
- name: Checkout repository
@@ -88,7 +91,7 @@ jobs:
fetch-depth: 0 # Shallow clones should be disabled for a better relevancy of analysis
- name: Install sonar-scanner and build-wrapper
uses: SonarSource/sonarcloud-github-c-cpp@5c3c39143e381909307f6903f13774b275ed956d
uses: SonarSource/sonarcloud-github-c-cpp@v3
- name: Configure CMake
run: >-
@@ -103,7 +106,7 @@ jobs:
build-wrapper-linux-x86-64 --out-dir ${{ env.BUILD_WRAPPER_OUT_DIR }} cmake --build build
- name: Run sonar-scanner
# if: 0
if: 0
env:
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
SONAR_TOKEN: ${{ secrets.SONAR_TOKEN }}

14
.github/workflows/cmake_macos.yml vendored
View File

@@ -25,10 +25,10 @@ on:
jobs:
macos12:
macos13-x86_64:
name: "${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, x86_64"
runs-on: macos-12
runs-on: macos-13
env:
BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory # Directory where build-wrapper output will be placed
@@ -80,6 +80,9 @@ jobs:
rtmidi
openal-soft
fluidsynth
libslirp
vde
libserialport
${{ matrix.ui.packages }}
- name: Checkout repository
@@ -88,7 +91,7 @@ jobs:
fetch-depth: 0 # Shallow clones should be disabled for a better relevancy of analysis
- name: Install sonar-scanner and build-wrapper
uses: SonarSource/sonarcloud-github-c-cpp@5c3c39143e381909307f6903f13774b275ed956d
uses: SonarSource/sonarcloud-github-c-cpp@v3
- name: Configure CMake
run: >-
@@ -100,6 +103,7 @@ jobs:
-D Qt5_ROOT=$(brew --prefix qt@5)
-D Qt5LinguistTools_ROOT=$(brew --prefix qt@5)
-D OpenAL_ROOT=$(brew --prefix openal-soft)
-D LIBSERIALPORT_ROOT=$(brew --prefix libserialport)
- name: Build
run: |
@@ -179,6 +183,7 @@ jobs:
openal-soft
fluidsynth
libslirp
libserialport
${{ matrix.ui.packages }}
- name: Checkout repository
@@ -187,7 +192,7 @@ jobs:
fetch-depth: 0 # Shallow clones should be disabled for a better relevancy of analysis
# - name: Install sonar-scanner and build-wrapper
# uses: SonarSource/sonarcloud-github-c-cpp@5c3c39143e381909307f6903f13774b275ed956d
# uses: SonarSource/sonarcloud-github-c-cpp@v3
- name: Configure CMake
run: >-
@@ -199,6 +204,7 @@ jobs:
-D Qt5_ROOT=$(brew --prefix qt@5)
-D Qt5LinguistTools_ROOT=$(brew --prefix qt@5)
-D OpenAL_ROOT=$(brew --prefix openal-soft)
-D LIBSERIALPORT_ROOT=$(brew --prefix libserialport)
- name: Build
run: |

9
.github/workflows/cmake_windows_msys2.yml vendored
View File

@@ -67,15 +67,9 @@ jobs:
environment:
# - msystem: MSYS
# toolchain: ./cmake/flags-gcc-x86_64.cmake
# - msystem: MINGW32
# prefix: mingw-w64-i686
# toolchain: ./cmake/flags-gcc-i686.cmake
- msystem: MINGW64
prefix: mingw-w64-x86_64
toolchain: ./cmake/flags-gcc-x86_64.cmake
# - msystem: CLANG32
# prefix: mingw-w64-clang-i686
# toolchain: ./cmake/llvm-win32-i686.cmake
# - msystem: CLANG64
# prefix: mingw-w64-clang-x86_64
# toolchain: ./cmake/llvm-win32-x86_64.cmake
@@ -103,6 +97,7 @@ jobs:
rtmidi:p
libslirp:p
fluidsynth:p
libserialport:p
${{ matrix.ui.packages }}
- name: Checkout repository
@@ -111,7 +106,7 @@ jobs:
fetch-depth: 0 # Shallow clones should be disabled for a better relevancy of analysis
- name: Install sonar-scanner and build-wrapper
uses: SonarSource/sonarcloud-github-c-cpp@5c3c39143e381909307f6903f13774b275ed956d
uses: SonarSource/sonarcloud-github-c-cpp@v3
- name: Configure CMake
run: >-

3
.github/workflows/codeql_linux.yml vendored
View File

@@ -66,6 +66,7 @@ jobs:
qtbase5-dev
qtbase5-private-dev
qttools5-dev
qttranslations5-l10n
libevdev-dev
libxkbcommon-x11-dev
@@ -83,6 +84,8 @@ jobs:
libopenal-dev
libslirp-dev
libfluidsynth-dev
libvdeplug-dev
libserialport-dev
${{ matrix.ui.packages }}
- name: Checkout repository

8
.github/workflows/codeql_macos.yml vendored
View File

@@ -25,11 +25,11 @@ on:
jobs:
analyze-macos12:
analyze-macos13-x86_64:
name: "${{ matrix.ui.name }}, ${{ matrix.build.name }}, ${{ matrix.dynarec.name }}, x86_64"
runs-on: macos-12
runs-on: macos-13
permissions:
actions: read
@@ -74,6 +74,9 @@ jobs:
rtmidi
openal-soft
fluidsynth
libslirp
vde
libserialport
${{ matrix.ui.packages }}
- name: Checkout repository
@@ -95,6 +98,7 @@ jobs:
-D Qt5_ROOT=$(brew --prefix qt@5)
-D Qt5LinguistTools_ROOT=$(brew --prefix qt@5)
-D OpenAL_ROOT=$(brew --prefix openal-soft)
-D LIBSERIALPORT_ROOT=$(brew --prefix libserialport)
- name: Build
run: cmake --build build

7
.github/workflows/codeql_windows_msys2.yml vendored
View File

@@ -72,15 +72,9 @@ jobs:
environment:
# - msystem: MSYS
# toolchain: ./cmake/flags-gcc-x86_64.cmake
- msystem: MINGW32
prefix: mingw-w64-i686
toolchain: ./cmake/flags-gcc-i686.cmake
- msystem: MINGW64
prefix: mingw-w64-x86_64
toolchain: ./cmake/flags-gcc-x86_64.cmake
# - msystem: CLANG32
# prefix: mingw-w64-clang-i686
# toolchain: ./cmake/llvm-win32-i686.cmake
# - msystem: CLANG64
# prefix: mingw-w64-clang-x86_64
# toolchain: ./cmake/llvm-win32-x86_64.cmake
@@ -108,6 +102,7 @@ jobs:
rtmidi:p
libslirp:p
fluidsynth:p
libserialport:p
${{ matrix.ui.packages }}
- name: Checkout repository

3
.gitignore vendored
View File

@@ -62,3 +62,6 @@ CMakeLists.txt.user
# clangd
.cache
# Jetbrains CLion
.idea

92
CMakeLists.txt
View File

@@ -1,16 +1,17 @@
#
# 86Box A hypervisor and IBM PC system emulator that specializes in
# running old operating systems and software designed for IBM
# PC systems and compatibles from 1981 through fairly recent
# system designs based on the PCI bus.
# 86Box A hypervisor and IBM PC system emulator that specializes in
# running old operating systems and software designed for IBM
# PC systems and compatibles from 1981 through fairly recent
# system designs based on the PCI bus.
#
# This file is part of the 86Box distribution.
# This file is part of the 86Box distribution.
#
# CMake build script.
# CMake build script.
#
# Authors: David Hrdlička, <hrdlickadavid@outlook.com>
# Authors: David Hrdlička, <hrdlickadavid@outlook.com>
#
# Copyright 2020-2021 David Hrdlička.
# Copyright 2020-2021 David Hrdlička.
# Copyright 2021-2025 Jasmine Iwanek.
#
cmake_minimum_required(VERSION 3.16)
@@ -35,7 +36,7 @@ if(MUNT_EXTERNAL)
endif()
project(86Box
VERSION 4.2.1
VERSION 4.3
DESCRIPTION "Emulator of x86-based systems"
HOMEPAGE_URL "https://86box.net"
LANGUAGES C CXX)
@@ -122,48 +123,55 @@ set(CMAKE_FIND_PACKAGE_PREFER_CONFIG ON)
# Optional features
#
# Option Description Def.
# ------ ----------- ----
option(RELEASE "Release build" OFF)
option(DYNAREC "Dynamic recompiler" ON)
option(OPENAL "OpenAL" ON)
option(RTMIDI "RtMidi" ON)
option(FLUIDSYNTH "FluidSynth" ON)
option(MUNT "MUNT" ON)
option(VNC "VNC renderer" OFF)
option(CPPTHREADS "C++11 threads" ON)
option(NEW_DYNAREC "Use the PCem v15 (\"new\") dynamic recompiler" OFF)
option(MINITRACE "Enable Chrome tracing using the modified minitrace library" OFF)
option(GDBSTUB "Enable GDB stub server for debugging" OFF)
option(DEV_BRANCH "Development branch" OFF)
option(DISCORD "Discord Rich Presence support" ON)
option(DEBUGREGS486 "Enable debug register opeartion on 486+ CPUs" OFF)
# Option Description Def.
# ------ ----------- ----
option(RELEASE "Release build" OFF)
option(DYNAREC "Dynamic recompiler" ON)
option(OPENAL "OpenAL" ON)
option(RTMIDI "RtMidi" ON)
option(FLUIDSYNTH "FluidSynth" ON)
option(MUNT "MUNT" ON)
option(VNC "VNC renderer" OFF)
option(NEW_DYNAREC "Use the PCem v15 (\"new\") dynamic recompiler" OFF)
option(MINITRACE "Enable Chrome tracing using the modified minitrace library" OFF)
option(GDBSTUB "Enable GDB stub server for debugging" OFF)
option(DEV_BRANCH "Development branch" OFF)
option(DISCORD "Discord Rich Presence support" ON)
option(DEBUGREGS486 "Enable debug register opeartion on 486+ CPUs" OFF)
if(WIN32)
set(QT ON)
option(CPPTHREADS "C++11 threads" OFF)
else()
option(QT "Qt GUI" ON)
option(CPPTHREADS "C++11 threads" ON)
endif()
if(CMAKE_SYSTEM_NAME STREQUAL "OpenBSD")
SET(CMAKE_EXE_LINKER_FLAGS "-Wl,-z,wxneeded")
endif()
# Development branch features
#
# Option Description Def. Condition Otherwise
# ------ ----------- ---- --------- ---------
cmake_dependent_option(AMD_K5 "AMD K5" ON "DEV_BRANCH" OFF)
cmake_dependent_option(AN430TX "Intel AN430TX" ON "DEV_BRANCH" OFF)
cmake_dependent_option(CYRIX_6X86 "Cyrix 6x86" ON "DEV_BRANCH" OFF)
cmake_dependent_option(G100 "Matrox Productiva G100" ON "DEV_BRANCH" OFF)
cmake_dependent_option(GUSMAX "Gravis UltraSound MAX" ON "DEV_BRANCH" OFF)
cmake_dependent_option(ISAMEM_RAMPAGE "AST Rampage" ON "DEV_BRANCH" OFF)
cmake_dependent_option(ISAMEM_IAB "Intel Above Board" ON "DEV_BRANCH" OFF)
cmake_dependent_option(ISAMEM_BRAT "BocaRAM/AT" ON "DEV_BRANCH" OFF)
cmake_dependent_option(LASERXT "VTech Laser XT" ON "DEV_BRANCH" OFF)
cmake_dependent_option(OLIVETTI "Olivetti M290" ON "DEV_BRANCH" OFF)
cmake_dependent_option(OPEN_AT "OpenAT" ON "DEV_BRANCH" OFF)
cmake_dependent_option(OPL4ML "OPL4-ML daughterboard" ON "DEV_BRANCH" OFF)
cmake_dependent_option(PCL "Generic PCL5e Printer" ON "DEV_BRANCH" OFF)
cmake_dependent_option(SIO_DETECT "Super I/O Detection Helper" ON "DEV_BRANCH" OFF)
cmake_dependent_option(XL24 "ATI VGA Wonder XL24 (ATI-28800-6)" ON "DEV_BRANCH" OFF)
# Option Description Def. Condition Otherwise
# ------ ----------- ---- ------------ ---------
cmake_dependent_option(AMD_K5 "AMD K5" ON "DEV_BRANCH" OFF)
cmake_dependent_option(AN430TX "Intel AN430TX" ON "DEV_BRANCH" OFF)
cmake_dependent_option(CDROM_MITSUMI "Mitsumi CDROM" ON "DEV_BRANCH" OFF)
cmake_dependent_option(CYRIX_6X86 "Cyrix 6x86" ON "DEV_BRANCH" OFF)
cmake_dependent_option(G100 "Matrox Productiva G100" ON "DEV_BRANCH" OFF)
cmake_dependent_option(GUSMAX "Gravis UltraSound MAX" ON "DEV_BRANCH" OFF)
cmake_dependent_option(ISAMEM_RAMPAGE "AST Rampage" ON "DEV_BRANCH" OFF)
cmake_dependent_option(ISAMEM_IAB "Intel Above Board" ON "DEV_BRANCH" OFF)
cmake_dependent_option(ISAMEM_BRAT "BocaRAM/AT" ON "DEV_BRANCH" OFF)
cmake_dependent_option(LASERXT "VTech Laser XT" ON "DEV_BRANCH" OFF)
cmake_dependent_option(OLIVETTI "Olivetti M290" ON "DEV_BRANCH" OFF)
cmake_dependent_option(OPEN_AT "OpenAT" ON "DEV_BRANCH" OFF)
cmake_dependent_option(OPL4ML "OPL4-ML daughterboard" ON "DEV_BRANCH" OFF)
cmake_dependent_option(PCL "Generic PCL5e Printer" ON "DEV_BRANCH" OFF)
cmake_dependent_option(SIO_DETECT "Super I/O Detection Helper" ON "DEV_BRANCH" OFF)
cmake_dependent_option(WACOM "Wacom Input Devices" ON "DEV_BRANCH" OFF)
cmake_dependent_option(XL24 "ATI VGA Wonder XL24 (ATI-28800-6)" ON "DEV_BRANCH" OFF)
# Ditto but for Qt
if(QT)

12
CMakePresets.json
View File

@@ -55,6 +55,14 @@
},
"inherits": "base"
},
{
"name": "ultra_debug",
"cacheVariables": {
"CMAKE_BUILD_TYPE": "UltraDebug",
"DEV_BRANCH": "ON"
},
"inherits": "base"
},
{
"name": "llvm-macos-aarch64.cmake",
"displayName": "MacOS clang regular",
@@ -68,7 +76,8 @@
"Qt5_DIR": "/opt/homebrew/opt/qt@5/lib/cmake/Qt5",
"MOLTENVK_DIR": "/opt/homebrew/opt/molten-vk",
"Qt5LinguistTools_DIR": "/opt/homebrew/opt/qt@5/lib/cmake/Qt5LinguistTools",
"OpenAL_ROOT": "/opt/homebrew/opt/openal-soft"
"OpenAL_ROOT": "/opt/homebrew/opt/openal-soft",
"LIBSERIALPORT_ROOT": "/opt/homebrew/opt/libserialport"
},
"inherits": "regular"
},
@@ -86,6 +95,7 @@
"MOLTENVK_DIR": "/opt/homebrew/opt/molten-vk",
"Qt5LinguistTools_DIR": "/opt/homebrew/opt/qt@5/lib/cmake/Qt5LinguistTools",
"OpenAL_ROOT": "/opt/homebrew/opt/openal-soft",
"LIBSERIALPORT_ROOT": "/opt/homebrew/opt/libserialport",
"CMAKE_CXX_FLAGS_DEBUG": "-g -O0 -DENABLE_VDE_LOG",
"CMAKE_C_FLAGS_DEBUG": "-g -O0 -DENABLE_VDE_LOG"
},

7
README.md
View File

@@ -32,6 +32,7 @@ It is also recommended to use a manager application with 86Box for easier handli
* [86Box Manager](https://github.com/86Box/86BoxManager) by [Overdoze](https://github.com/daviunic) (Windows only)
* [86Box Manager X](https://github.com/RetBox/86BoxManagerX) by [xafero](https://github.com/xafero) (Cross platform Port of 86Box Manager using Avalonia)
* [Avalonia 86](https://github.com/notBald/Avalonia86) by [notBald](https://github.com/notBald) (Windows and Linux)
* [sl86](https://github.com/DDXofficial/sl86) by [DDX](https://github.com/DDXofficial) (Command-line 86Box machine manager written in Python)
* [Linbox-qt5](https://github.com/Dungeonseeker/linbox-qt5) by [Dungeonseeker](https://github.com/Dungeonseeker/) (Linux focused, should work on Windows though untested)
* [MacBox for 86Box](https://github.com/Moonif/MacBox) by [Moonif](https://github.com/Moonif) (MacOS only)
@@ -53,10 +54,14 @@ We operate an IRC channel and a Discord server for discussing 86Box, its develop
[![Visit our Discord server](https://discordapp.com/api/guilds/262614059009048590/embed.png)](https://discord.gg/QXK9XTv)
Contributions
---------
-------------
We welcome all contributions to the project, as long as the [contribution guidelines](CONTRIBUTING.md) are followed.
Building
---------
For instructions on how to build 86Box from source, see the [build guide](https://86box.readthedocs.io/en/latest/dev/buildguide.html).
Licensing
---------

4
cmake/flags-gcc.cmake
View File

@@ -20,6 +20,8 @@ string(APPEND CMAKE_C_FLAGS_RELEASE_INIT " -g0 -O3")
string(APPEND CMAKE_CXX_FLAGS_RELEASE_INIT " -g0 -O3")
string(APPEND CMAKE_C_FLAGS_DEBUG_INIT " -ggdb -Og")
string(APPEND CMAKE_CXX_FLAGS_DEBUG_INIT " -ggdb -Og")
string(APPEND CMAKE_C_FLAGS_ULTRADEBUG_INIT " -O0 -ggdb -g3")
string(APPEND CMAKE_CXX_FLAGS_ULTRADEBUG_INIT " -O0 -ggdb -g3")
string(APPEND CMAKE_C_FLAGS_OPTIMIZED_INIT " -march=native -mtune=native -O3 -ffp-contract=fast -flto")
string(APPEND CMAKE_CXX_FLAGS_OPTIMIZED_INIT " -march=native -mtune=native -O3 -ffp-contract=fast -flto")
@@ -28,7 +30,7 @@ foreach(LANG C;CXX)
set(CMAKE_${LANG}_FLAGS "$ENV{${LANG}FLAGS} ${CMAKE_${LANG}_FLAGS_INIT}" CACHE STRING "Flags used by the ${LANG} compiler during all build types.")
mark_as_advanced(CMAKE_${LANG}_FLAGS)
foreach(CONFIG RELEASE;DEBUG;OPTIMIZED)
foreach(CONFIG RELEASE;DEBUG;ULTRADEBUG;OPTIMIZED)
set(CMAKE_${LANG}_FLAGS_${CONFIG} "${CMAKE_${LANG}_FLAGS_${CONFIG}_INIT}" CACHE STRING "Flags used by the ${LANG} compiler during ${CONFIG} builds.")
mark_as_advanced(CMAKE_${LANG}_FLAGS_${CONFIG})
endforeach()

4
debian/changelog vendored
View File

@@ -1,5 +1,5 @@
86box (4.2.1) UNRELEASED; urgency=medium
86box (4.3) UNRELEASED; urgency=medium
* Bump release.
-- Jasmine Iwanek <jriwanek@gmail.com> Fri, 26 Jul 2024 21:09:16 +0200
-- Jasmine Iwanek <jriwanek@gmail.com> Wed, 13 Nov 2024 06:31:46 +0100

3
debian/control vendored
View File

@@ -16,7 +16,8 @@ Build-Depends: cmake (>= 3.21),
libsndfile-dev,
ninja-build,
qttools5-dev,
qtbase5-private-dev
qtbase5-private-dev,
libserialport-dev
Standards-Version: 4.6.0
Homepage: https://86box.net/
#Vcs-Browser: https://salsa.debian.org/debian/86box

73
scripts/86Box-install-roms.sh
View File

@@ -1,73 +0,0 @@
#!/bin/sh
URL="https://github.com/86Box/roms/archive/refs/tags/v4.2.zip"
TMP_FILE="/tmp/86Box-ROMS.zip"
EXTRACT_DIR="/tmp/86Box-ROMS-extracted"
DEFAULT_TARGET_DIR="$HOME/.local/share/86Box/roms/"
TARGET_DIR=${TARGET_DIR:-$DEFAULT_TARGET_DIR}
install_roms() {
if [ -d "$TARGET_DIR" ] && [ "$(ls -A $TARGET_DIR)" ]; then
echo "ROMS already installed in $TARGET_DIR"
echo "To (re)install, please first remove ROMS with -r parameter"
exit 1
fi
fetch -o "$TMP_FILE" "$URL"
if [ $? -ne 0 ]; then
echo "Failed to download the file from $URL"
exit 1
fi
mkdir -p "$EXTRACT_DIR"
unzip "$TMP_FILE" -d "$EXTRACT_DIR"
if [ $? -ne 0 ]; then
echo "Failed to decompress the file"
rm "$TMP_FILE"
exit 1
fi
mkdir -p "$TARGET_DIR"
cd "$EXTRACT_DIR"
TOP_LEVEL_DIR=$(find . -mindepth 1 -maxdepth 1 -type d)
if [ -d "$TOP_LEVEL_DIR" ]; then
mv "$TOP_LEVEL_DIR"/* "$TARGET_DIR"
fi
rm -rf "$TMP_FILE" "$EXTRACT_DIR"
echo "ROMS installed successfully in $TARGET_DIR"
}
remove_roms() {
if [ -d "$TARGET_DIR" ]; then
rm -rf "$TARGET_DIR"
echo "ROMS removed successfully from $TARGET_DIR"
else
echo "No ROMS directory found in $TARGET_DIR"
fi
}
help() {
echo ""
echo "$0 [-h|-i|-r]"
echo " -h : this help"
echo " -i : install (this parameter can be omitted)"
echo " -r : remove the ROMS"
echo ""
}
case "$1" in
-h)
help
;;
-r)
remove_roms
;;
-i|*)
install_roms
;;
esac
exit 0

93
src/86box.c
View File

@@ -11,6 +11,7 @@
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Fred N. van Kempen, <decwiz@yahoo.com>
* Jasmine Iwanek, <jriwanek@gmail.com>
*
* Copyright 2008-2020 Sarah Walker.
* Copyright 2016-2020 Miran Grca.
@@ -18,7 +19,7 @@
* Copyright 2021 Laci bá'
* Copyright 2021 dob205
* Copyright 2021 Andreas J. Reichel.
* Copyright 2021-2022 Jasmine Iwanek.
* Copyright 2021-2025 Jasmine Iwanek.
*/
#include <inttypes.h>
#include <stdarg.h>
@@ -103,6 +104,7 @@
#include <86box/machine_status.h>
#include <86box/apm.h>
#include <86box/acpi.h>
#include <86box/nv/vid_nv_rivatimer.h>
// Disable c99-designator to avoid the warnings about int ng
#ifdef __clang__
@@ -177,6 +179,7 @@ int bugger_enabled = 0; /* (C) enable
int novell_keycard_enabled = 0; /* (C) enable Novell NetWare 2.x key card emulation. */
int postcard_enabled = 0; /* (C) enable POST card */
int unittester_enabled = 0; /* (C) enable unit tester device */
int gameport_type[GAMEPORT_MAX] = { 0, 0 }; /* (C) enable gameports */
int isamem_type[ISAMEM_MAX] = { 0, 0, 0, 0 }; /* (C) enable ISA mem cards */
int isartc_type = 0; /* (C) enable ISA RTC card */
int gfxcard[GFXCARD_MAX] = { 0, 0 }; /* (C) graphics/video card */
@@ -207,6 +210,8 @@ int video_fullscreen_scale_maximized = 0; /* (C) Whether
also apply when maximized. */
int do_auto_pause = 0; /* (C) Auto-pause the emulator on focus
loss */
int hook_enabled = 1; /* (C) Keyboard hook is enabled */
int test_mode = 0; /* (C) Test mode */
char uuid[MAX_UUID_LEN] = { '\0' }; /* (C) UUID or machine identifier */
int other_ide_present = 0; /* IDE controllers from non-IDE cards are
@@ -252,12 +257,36 @@ static volatile atomic_int do_pause_ack = 0;
static volatile atomic_int pause_ack = 0;
#ifndef RELEASE_BUILD
static char buff[1024];
static int seen = 0;
#define LOG_SIZE_BUFFER 1024 /* Log size buffer */
static char buff[LOG_SIZE_BUFFER];
static int seen = 0;
static int suppr_seen = 1;
// Functions only used in this translation unit
void pclog_ensure_stdlog_open(void);
#endif
/*
Ensures STDLOG is open for pclog_ex and pclog_ex_cyclic
*/
void pclog_ensure_stdlog_open(void)
{
#ifndef RELEASE_BUILD
if (stdlog == NULL) {
if (log_path[0] != '\0') {
stdlog = plat_fopen(log_path, "w");
if (stdlog == NULL)
stdlog = stdout;
} else
stdlog = stdout;
}
#endif
}
/*
* Log something to the logfile or stdout.
*
@@ -266,22 +295,15 @@ static int suppr_seen = 1;
* being logged, and catch repeating entries.
*/
void
pclog_ex(const char *fmt, va_list ap)
pclog_ex(UNUSED(const char *fmt), UNUSED(va_list ap))
{
#ifndef RELEASE_BUILD
char temp[1024];
char temp[LOG_SIZE_BUFFER];
if (strcmp(fmt, "") == 0)
return;
if (stdlog == NULL) {
if (log_path[0] != '\0') {
stdlog = plat_fopen(log_path, "w");
if (stdlog == NULL)
stdlog = stdout;
} else
stdlog = stdout;
}
pclog_ensure_stdlog_open();
vsprintf(temp, fmt, ap);
if (suppr_seen && !strcmp(buff, temp))
@@ -298,6 +320,8 @@ pclog_ex(const char *fmt, va_list ap)
#endif
}
void
pclog_toggle_suppr(void)
{
@@ -308,7 +332,7 @@ pclog_toggle_suppr(void)
/* Log something. We only do this in non-release builds. */
void
pclog(const char *fmt, ...)
pclog(UNUSED(const char *fmt), ...)
{
#ifndef RELEASE_BUILD
va_list ap;
@@ -435,7 +459,7 @@ delete_nvr_file(uint8_t flash)
int c;
/* Set up the NVR file's name. */
c = strlen(machine_get_internal_name()) + 5;
c = strlen(machine_get_nvr_name()) + 5;
fn = (char *) malloc(c + 1);
if (fn == NULL)
@@ -443,9 +467,9 @@ delete_nvr_file(uint8_t flash)
flash ? "BIOS flash" : "CMOS");
if (flash)
sprintf(fn, "%s.bin", machine_get_internal_name());
sprintf(fn, "%s.bin", machine_get_nvr_name());
else
sprintf(fn, "%s.nvr", machine_get_internal_name());
sprintf(fn, "%s.nvr", machine_get_nvr_name());
remove(nvr_path(fn));
@@ -453,6 +477,8 @@ delete_nvr_file(uint8_t flash)
fn = NULL;
}
extern void device_find_all_descs(void);
/*
* Perform initial startup of the PC.
*
@@ -561,7 +587,9 @@ usage:
#ifndef USE_SDL_UI
printf("-S or --settings - show only the settings dialog\n");
#endif
printf("-T or --testmode - test mode: execute the test mode entry point on init/hard reset\n");
printf("-V or --vmname name - overrides the name of the running VM\n");
printf("-W or --nohook - disables keyboard hook (compatibility-only outside Windows)\n");
printf("-X or --clear what - clears the 'what' (cmos/flash/both)\n");
printf("-Y or --donothing - do not show any UI or run the emulation\n");
printf("-Z or --lastvmpath - the last parameter is VM path rather than config\n");
@@ -631,12 +659,16 @@ usage:
} else if (!strcasecmp(argv[c], "--settings") || !strcasecmp(argv[c], "-S")) {
settings_only = 1;
#endif
} else if (!strcasecmp(argv[c], "--testmode") || !strcasecmp(argv[c], "-T")) {
test_mode = 1;
} else if (!strcasecmp(argv[c], "--noconfirm") || !strcasecmp(argv[c], "-N")) {
confirm_exit_cmdl = 0;
} else if (!strcasecmp(argv[c], "--missing") || !strcasecmp(argv[c], "-M")) {
dump_missing = 1;
} else if (!strcasecmp(argv[c], "--donothing") || !strcasecmp(argv[c], "-Y")) {
do_nothing = 1;
} else if (!strcasecmp(argv[c], "--nohook") || !strcasecmp(argv[c], "-W")) {
hook_enabled = 0;
} else if (!strcasecmp(argv[c], "--keycodes") || !strcasecmp(argv[c], "-K")) {
if ((c + 1) == argc)
goto usage;
@@ -1086,6 +1118,27 @@ pc_send_cae(void)
pc_send_ca(1);
}
/*
Currently available API:
extern void resetx86(void);
extern void softresetx86(void);
extern void hardresetx86(void);
extern void prefetch_queue_set_pos(int pos);
extern void prefetch_queue_set_ip(uint16_t ip);
extern void prefetch_queue_set_prefetching(int p);
extern int prefetch_queue_get_pos(void);
extern uint16_t prefetch_queue_get_ip(void);
extern int prefetch_queue_get_prefetching(void);
extern int prefetch_queue_get_size(void);
*/
static void
pc_test_mode_entry_point(void)
{
pclog("Test mode entry point\n=====================\n");
}
void
pc_reset_hard_close(void)
{
@@ -1287,6 +1340,9 @@ pc_reset_hard_init(void)
update_mouse_msg();
if (test_mode)
pc_test_mode_entry_point();
ui_hard_reset_completed();
}
@@ -1423,6 +1479,9 @@ pc_run(void)
pc_reset_hard_init();
}
/* Update the guest-CPU independent timer for devices with independent clock speed */
rivatimer_update_all();
/* Run a block of code. */
startblit();
cpu_exec((int32_t) cpu_s->rspeed / 100);

58
src/CMakeLists.txt
View File

@@ -12,25 +12,50 @@
# dob205
#
# Copyright 2020-2022 David Hrdlička.
# Copyright 2021 dob205.
# Copyright 2021 dob205.
# Copyright 2024 Jasmine Iwanek.
#
if(APPLE)
set(CMAKE_INSTALL_RPATH_USE_LINK_PATH TRUE)
endif()
add_executable(86Box 86box.c config.c log.c random.c timer.c io.c acpi.c apm.c
dma.c ddma.c nmi.c pic.c pit.c pit_fast.c port_6x.c port_92.c ppi.c pci.c
mca.c usb.c fifo.c fifo8.c device.c nvr.c nvr_at.c nvr_ps2.c
machine_status.c ini.c cJSON.c)
add_executable(86Box
86box.c
config.c
log.c
random.c
timer.c
io.c
acpi.c
apm.c
dma.c
ddma.c
nmi.c
pic.c
pit.c
pit_fast.c
port_6x.c
port_92.c
ppi.c
pci.c
mca.c
usb.c
fifo.c
fifo8.c
device.c
nvr.c
nvr_at.c
nvr_ps2.c
machine_status.c
ini.c
cJSON.c
)
if(CMAKE_SYSTEM_NAME MATCHES "Linux")
add_compile_definitions(_FILE_OFFSET_BITS=64 _LARGEFILE_SOURCE=1 _LARGEFILE64_SOURCE=1)
endif()
if(PCL)
target_compile_definitions(86Box PRIVATE USE_PCL)
endif()
if(CPPTHREADS)
target_sources(86Box PRIVATE thread.cpp)
endif()
@@ -52,10 +77,6 @@ if(DYNAREC)
add_compile_definitions(USE_DYNAREC)
endif()
if(DEV_BRANCH)
add_compile_definitions(DEV_BRANCH)
endif()
if(DISCORD)
add_compile_definitions(DISCORD)
target_sources(86Box PRIVATE discord.c)
@@ -69,7 +90,10 @@ if(VNC)
find_package(LibVNCServer)
if(LibVNCServer_FOUND)
add_compile_definitions(USE_VNC)
add_library(vnc OBJECT vnc.c vnc_keymap.c)
add_library(vnc OBJECT
vnc.c
vnc_keymap.c
)
target_link_libraries(86Box vnc LibVNCServer::vncserver)
if(WIN32)
target_link_libraries(86Box ws2_32)
@@ -147,8 +171,10 @@ include_directories(${CMAKE_CURRENT_BINARY_DIR}/include)
include_directories(include)
if(NEW_DYNAREC)
include_directories(cpu codegen_new)
else()
elseif(DYNAREC)
include_directories(cpu codegen)
else()
include_directories(cpu)
endif()
add_subdirectory(cdrom)
@@ -157,7 +183,7 @@ add_subdirectory(chipset)
add_subdirectory(cpu)
if(NEW_DYNAREC)
add_subdirectory(codegen_new)
else()
elseif(DYNAREC)
add_subdirectory(codegen)
endif()

21
src/acpi.c
View File

@@ -89,7 +89,7 @@ acpi_timer_get(acpi_t *dev)
}
static uint8_t
acpi_gp_timer_get(acpi_t *dev)
acpi_gp_timer_get(UNUSED(acpi_t *dev))
{
uint64_t clock = acpi_clock_get();
clock -= acpi_last_clock;
@@ -2473,10 +2473,9 @@ acpi_init(const device_t *info)
{
acpi_t *dev;
dev = (acpi_t *) malloc(sizeof(acpi_t));
dev = (acpi_t *) calloc(1, sizeof(acpi_t));
if (dev == NULL)
return NULL;
memset(dev, 0x00, sizeof(acpi_t));
cpu_to_acpi = ACPI_TIMER_FREQ / cpuclock;
dev->vendor = info->local;
@@ -2576,7 +2575,7 @@ const device_t acpi_ali_device = {
.init = acpi_init,
.close = acpi_close,
.reset = acpi_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = acpi_speed_changed,
.force_redraw = NULL,
.config = NULL
@@ -2590,7 +2589,7 @@ const device_t acpi_intel_device = {
.init = acpi_init,
.close = acpi_close,
.reset = acpi_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = acpi_speed_changed,
.force_redraw = NULL,
.config = NULL
@@ -2604,7 +2603,7 @@ const device_t acpi_via_device = {
.init = acpi_init,
.close = acpi_close,
.reset = acpi_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = acpi_speed_changed,
.force_redraw = NULL,
.config = NULL
@@ -2618,7 +2617,7 @@ const device_t acpi_via_596b_device = {
.init = acpi_init,
.close = acpi_close,
.reset = acpi_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = acpi_speed_changed,
.force_redraw = NULL,
.config = NULL
@@ -2632,7 +2631,7 @@ const device_t acpi_smc_device = {
.init = acpi_init,
.close = acpi_close,
.reset = acpi_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = acpi_speed_changed,
.force_redraw = NULL,
.config = NULL
@@ -2646,7 +2645,7 @@ const device_t acpi_sis_5582_device = {
.init = acpi_init,
.close = acpi_close,
.reset = acpi_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = acpi_speed_changed,
.force_redraw = NULL,
.config = NULL
@@ -2660,7 +2659,7 @@ const device_t acpi_sis_5595_1997_device = {
.init = acpi_init,
.close = acpi_close,
.reset = acpi_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = acpi_speed_changed,
.force_redraw = NULL,
.config = NULL
@@ -2674,7 +2673,7 @@ const device_t acpi_sis_5595_device = {
.init = acpi_init,
.close = acpi_close,
.reset = acpi_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = acpi_speed_changed,
.force_redraw = NULL,
.config = NULL

6
src/apm.c
View File

@@ -122,7 +122,7 @@ const device_t apm_device = {
.init = apm_init,
.close = apm_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -136,7 +136,7 @@ const device_t apm_pci_device = {
.init = apm_init,
.close = apm_close,
.reset = apm_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -150,7 +150,7 @@ const device_t apm_pci_acpi_device = {
.init = apm_init,
.close = apm_close,
.reset = apm_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

14
src/cdrom/CMakeLists.txt
View File

@@ -9,16 +9,28 @@
# CMake build script.
#
# Authors: David Hrdlička, <hrdlickadavid@outlook.com>
# Jasmine Iwanek, <jriwanek@gmail.com>
#
# Copyright 2020-2021 David Hrdlička.
# Copyright 2024 Jasmine Iwanek.
#
find_package(PkgConfig REQUIRED)
pkg_check_modules(SNDFILE REQUIRED IMPORTED_TARGET sndfile)
add_library(cdrom OBJECT cdrom.c cdrom_image_backend.c cdrom_image_viso.c cdrom_image.c cdrom_ioctl.c cdrom_mitsumi.c)
add_library(cdrom OBJECT
cdrom.c
cdrom_image.c
cdrom_image_viso.c
)
target_link_libraries(86Box PkgConfig::SNDFILE)
if(CDROM_MITSUMI)
target_compile_definitions(cdrom PRIVATE USE_CDROM_MITSUMI)
target_sources(cdrom PRIVATE cdrom_mitsumi.c)
endif()
if (WIN32)
# MSYS2
target_link_libraries(86Box -static ${SNDFILE_STATIC_LIBRARIES})

3808
src/cdrom/cdrom.c
View File

File diff suppressed because it is too large Load Diff

2191
src/cdrom/cdrom_image.c
View File

File diff suppressed because it is too large Load Diff

1233
src/cdrom/cdrom_image_backend.c
View File

File diff suppressed because it is too large Load Diff

151
src/cdrom/cdrom_image_viso.c
View File

@@ -8,9 +8,7 @@
*
* Virtual ISO CD-ROM image back-end.
*
*
*
* Authors: RichardG <richardg867@gmail.com>
* Authors: RichardG, <richardg867@gmail.com>
*
* Copyright 2022 RichardG.
*/
@@ -23,7 +21,9 @@
#define __STDC_FORMAT_MACROS
#include <ctype.h>
#include <inttypes.h>
#ifdef IMAGE_VISO_LOG
#include <stdarg.h>
#endif
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
@@ -31,15 +31,16 @@
#include <sys/stat.h>
#include <time.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/bswap.h>
#include <86box/cdrom_image_backend.h>
#include <86box/cdrom.h>
#include <86box/cdrom_image.h>
#include <86box/cdrom_image_viso.h>
#include <86box/log.h>
#include <86box/path.h>
#include <86box/plat.h>
#include <86box/bswap.h>
#include <86box/plat_dir.h>
#include <86box/version.h>
#include <86box/timer.h>
#include <86box/nvr.h>
#ifndef S_ISDIR
@@ -138,29 +139,30 @@ static const char rr_eid[] = "RRIP_1991A"; /* identifiers used in ER field for
static const char rr_edesc[] = "THE ROCK RIDGE INTERCHANGE PROTOCOL PROVIDES SUPPORT FOR POSIX FILE SYSTEM SEMANTICS.";
static int8_t tz_offset = 0;
#ifdef ENABLE_CDROM_IMAGE_VISO_LOG
int cdrom_image_viso_do_log = ENABLE_CDROM_IMAGE_VISO_LOG;
#ifdef IMAGE_VISO_LOG
int image_viso_do_log = IMAGE_VISO_LOG;
void
cdrom_image_viso_log(const char *fmt, ...)
image_viso_log(void *priv, const char *fmt, ...)
{
va_list ap;
if (cdrom_image_viso_do_log) {
if (image_viso_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
log_out(priv, fmt, ap);
va_end(ap);
}
}
#else
# define cdrom_image_viso_log(fmt, ...)
# define image_viso_log(priv, fmt, ...)
#endif
static size_t
viso_pread(void *ptr, uint64_t offset, size_t size, size_t count, FILE *fp)
viso_pread(void *ptr, const uint64_t offset, const size_t size,
const size_t count, FILE *fp)
{
uint64_t cur_pos = ftello64(fp);
size_t ret = 0;
const uint64_t cur_pos = ftello64(fp);
size_t ret = 0;
if (fseeko64(fp, offset, SEEK_SET) != -1)
ret = fread(ptr, size, count, fp);
fseeko64(fp, cur_pos, SEEK_SET);
@@ -168,10 +170,11 @@ viso_pread(void *ptr, uint64_t offset, size_t size, size_t count, FILE *fp)
}
static size_t
viso_pwrite(const void *ptr, uint64_t offset, size_t size, size_t count, FILE *fp)
viso_pwrite(const void *ptr, const uint64_t offset, const size_t size,
const size_t count, FILE *fp)
{
uint64_t cur_pos = ftello64(fp);
size_t ret = 0;
const uint64_t cur_pos = ftello64(fp);
size_t ret = 0;
if (fseeko64(fp, offset, SEEK_SET) != -1)
ret = fwrite(ptr, size, count, fp);
fseeko64(fp, cur_pos, SEEK_SET);
@@ -693,22 +696,22 @@ viso_read(void *priv, uint8_t *buffer, uint64_t seek, size_t count)
/* Close any existing FIFO entry's file. */
viso_entry_t *other_entry = viso->file_fifo[viso->file_fifo_pos];
if (other_entry && other_entry->file) {
cdrom_image_viso_log("VISO: Closing [%s]", other_entry->path);
image_viso_log(viso->tf.log, "Closing [%s]...\n", other_entry->path);
fclose(other_entry->file);
other_entry->file = NULL;
cdrom_image_viso_log("\n");
image_viso_log(viso->tf.log, "Done\n");
}
/* Open file. */
cdrom_image_viso_log("VISO: Opening [%s]", entry->path);
image_viso_log(viso->tf.log, "Opening [%s]...\n", entry->path);
if ((entry->file = fopen(entry->path, "rb"))) {
cdrom_image_viso_log("\n");
image_viso_log(viso->tf.log, "Done\n");
/* Add this entry to the FIFO. */
viso->file_fifo[viso->file_fifo_pos++] = entry;
viso->file_fifo_pos &= (sizeof(viso->file_fifo) / sizeof(viso->file_fifo[0])) - 1;
} else {
cdrom_image_viso_log(" => failed\n");
image_viso_log(viso->tf.log, "Failed\n");
/* Clear any existing FIFO entry. */
viso->file_fifo[viso->file_fifo_pos] = NULL;
@@ -716,8 +719,11 @@ viso_read(void *priv, uint8_t *buffer, uint64_t seek, size_t count)
}
/* Read data. */
if (entry->file && (fseeko64(entry->file, seek - entry->data_offset, SEEK_SET) != -1))
read = fread(buffer, 1, sector_remain, entry->file);
if (!entry->file || (fseeko64(entry->file, seek - entry->data_offset, SEEK_SET) == -1))
return -1;
read = fread(buffer, 1, sector_remain, entry->file);
if (sector_remain && !read)
return -1;
}
/* Fill remainder with 00 bytes if needed. */
@@ -752,12 +758,12 @@ viso_close(void *priv)
if (viso == NULL)
return;
cdrom_image_viso_log("VISO: close()\n");
image_viso_log(viso->tf.log, "close()\n");
/* De-allocate everything. */
if (tf->fp)
fclose(tf->fp);
#ifndef ENABLE_CDROM_IMAGE_VISO_LOG
#ifndef ENABLE_IMAGE_VISO_LOG
remove(nvr_path(viso->tf.fn));
#endif
@@ -776,21 +782,32 @@ viso_close(void *priv)
if (viso->entry_map)
free(viso->entry_map);
if (tf->log != NULL) {
}
free(viso);
}
track_file_t *
viso_init(const char *dirname, int *error)
viso_init(const uint8_t id, const char *dirname, int *error)
{
cdrom_image_viso_log("VISO: init()\n");
/* Initialize our data structure. */
viso_t *viso = (viso_t *) calloc(1, sizeof(viso_t));
uint8_t *data = NULL;
uint8_t *p;
*error = 1;
if (viso == NULL)
goto end;
char n[1024] = { 0 };
sprintf(n, "CD-ROM %i VISO ", id + 1);
viso->tf.log = log_open(n);
image_viso_log(viso->tf.log, "init()\n");
viso->sector_size = VISO_SECTOR_SIZE;
viso->format = VISO_FORMAT_ISO | VISO_FORMAT_JOLIET | VISO_FORMAT_RR;
viso->use_version_suffix = (viso->format & VISO_FORMAT_ISO); /* cleared later if required */
@@ -801,7 +818,7 @@ viso_init(const char *dirname, int *error)
goto end;
/* Open temporary file. */
#ifdef ENABLE_CDROM_IMAGE_VISO_LOG
#ifdef ENABLE_IMAGE_VISO_LOG
strcpy(viso->tf.fn, "viso-debug.iso");
#else
plat_tempfile(viso->tf.fn, "viso", ".tmp");
@@ -811,7 +828,7 @@ viso_init(const char *dirname, int *error)
goto end;
/* Set up directory traversal. */
cdrom_image_viso_log("VISO: Traversing directories:\n");
image_viso_log(viso->tf.log, "Traversing directories:\n");
viso_entry_t *entry;
viso_entry_t *last_entry;
viso_entry_t *dir;
@@ -838,7 +855,7 @@ viso_init(const char *dirname, int *error)
if (!S_ISDIR(dir->stats.st_mode)) /* root is not a directory */
goto end;
dir->parent = dir; /* for the root's path table and .. entries */
cdrom_image_viso_log("[%08X] %s => [root]\n", dir, dir->path);
image_viso_log(viso->tf.log, "[%08X] %s => [root]\n", dir, dir->path);
/* Traverse directories, starting with the root. */
viso_entry_t **dir_entries = NULL;
@@ -888,7 +905,8 @@ viso_init(const char *dirname, int *error)
/* Set basename. */
strcpy(entry->name_short, children_count ? ".." : ".");
cdrom_image_viso_log("[%08X] %s => %s\n", entry, dir->path, entry->name_short);
image_viso_log(viso->tf.log, "[%08X] %s => %s\n", entry,
dir->path, entry->name_short);
}
/* Iterate through this directory's children again, making the entries. */
@@ -896,12 +914,16 @@ viso_init(const char *dirname, int *error)
rewinddir(dirp);
while ((readdir_entry = readdir(dirp))) {
/* Ignore . and .. pseudo-directories. */
if ((readdir_entry->d_name[0] == '.') && ((readdir_entry->d_name[1] == '\0') || (*((uint16_t *) &readdir_entry->d_name[1]) == '.')))
if ((readdir_entry->d_name[0] == '.') &&
((readdir_entry->d_name[1] == '\0') ||
(*((uint16_t *) &readdir_entry->d_name[1]) == '.')))
continue;
/* Add and fill entry. */
entry = dir_entries[children_count++] = (viso_entry_t *) calloc(1, sizeof(viso_entry_t) + dir_path_len + strlen(readdir_entry->d_name) + 2);
if (!entry)
entry = dir_entries[children_count++] =
(viso_entry_t *) calloc(1, sizeof(viso_entry_t) +
dir_path_len + strlen(readdir_entry->d_name) + 2);
if (entry == NULL)
break;
entry->parent = dir;
strcpy(entry->path, dir->path);
@@ -971,10 +993,12 @@ have_eltorito_entry:
continue;
}
cdrom_image_viso_log("[%08X] %s => [%-12s] %s\n", entry, dir->path, entry->name_short, entry->basename);
image_viso_log(viso->tf.log, "[%08X] %s => [%-12s] %s\n", entry,
dir->path, entry->name_short, entry->basename);
}
} else {
cdrom_image_viso_log("VISO: Failed to enumerate [%s], will be empty\n", dir->path);
image_viso_log(viso->tf.log, "Failed to enumerate [%s], will be empty\n",
dir->path);
}
/* Add terminator. */
@@ -1128,13 +1152,17 @@ next_dir:
/* Write El Torito boot descriptor. This is an awkward spot for
that, but the spec requires it to be the second descriptor. */
if (!i && eltorito_entry) {
cdrom_image_viso_log("VISO: Writing El Torito boot descriptor for entry [%08X]\n", eltorito_entry);
image_viso_log(viso->tf.log, "Writing El Torito boot descriptor for "
"entry [%08X]\n", eltorito_entry);
p = data;
if (!(viso->format & VISO_FORMAT_ISO))
VISO_LBE_32(p, ftello64(viso->tf.fp) / viso->sector_size); /* sector offset (HSF only) */
*p++ = 0; /* type */
memcpy(p, (viso->format & VISO_FORMAT_ISO) ? "CD001" : "CDROM", 5); /* standard ID */
/* Sector offset (HSF only). */
VISO_LBE_32(p, ftello64(viso->tf.fp) / viso->sector_size);
/* Type. */
*p++ = 0;
/* Standard ID. */
memcpy(p, (viso->format & VISO_FORMAT_ISO) ? "CD001" : "CDROM", 5);
p += 5;
*p++ = 1; /* version */
@@ -1235,7 +1263,7 @@ next_dir:
/* Write each path table. */
for (int i = 0; i <= ((max_vd << 1) | 1); i++) {
cdrom_image_viso_log("VISO: Generating path table #%d:\n", i);
image_viso_log(viso->tf.log, "Generating path table #%d:\n", i);
/* Save this path table's start offset. */
uint64_t pt_start = ftello64(viso->tf.fp);
@@ -1256,7 +1284,9 @@ next_dir:
continue;
}
cdrom_image_viso_log("[%08X] %s => %s\n", dir, dir->path, ((i & 2) || (dir == viso->root_dir)) ? dir->basename : dir->name_short);
image_viso_log(viso->tf.log, "[%08X] %s => %s\n", dir,
dir->path, ((i & 2) || (dir == viso->root_dir)) ? dir->basename :
dir->name_short);
/* Save this directory's path table index and offset. */
dir->pt_idx = pt_idx;
@@ -1324,7 +1354,7 @@ next_dir:
/* Write directory records for each type. */
int dir_type = VISO_DIR_CURRENT_ROOT;
for (int i = 0; i <= max_vd; i++) {
cdrom_image_viso_log("VISO: Generating directory record set #%d:\n", i);
image_viso_log(viso->tf.log, "Generating directory record set #%d:\n", i);
/* Go through directories. */
dir = viso->root_dir;
@@ -1367,8 +1397,10 @@ next_dir:
if ((entry == eltorito_entry) || (entry == eltorito_dir))
goto next_entry;
cdrom_image_viso_log("[%08X] %s => %s\n", entry, dir->path,
((dir_type == VISO_DIR_PARENT) ? ".." : ((dir_type < VISO_DIR_PARENT) ? "." : (i ? entry->basename : entry->name_short))));
image_viso_log(viso->tf.log, "[%08X] %s => %s\n", entry, dir->path,
((dir_type == VISO_DIR_PARENT) ? ".." :
((dir_type < VISO_DIR_PARENT) ? "." :
(i ? entry->basename : entry->name_short))));
/* Fill directory record. */
viso_fill_dir_record(data, entry, viso, dir_type);
@@ -1435,7 +1467,8 @@ next_entry:
/* Allocate entry map for sector->file lookups. */
size_t orig_sector_size = viso->sector_size;
while (1) {
cdrom_image_viso_log("VISO: Allocating entry map for %zu %zu-byte sectors\n", viso->entry_map_size, viso->sector_size);
image_viso_log(viso->tf.log, "Allocating entry map for %zu %zu-byte sectors\n",
viso->entry_map_size, viso->sector_size);
viso->entry_map = (viso_entry_t **) calloc(viso->entry_map_size, sizeof(viso_entry_t *));
if (viso->entry_map) {
/* Successfully allocated. */
@@ -1476,7 +1509,7 @@ next_entry:
viso->all_sectors = viso->metadata_sectors;
/* Go through files, assigning sectors to them. */
cdrom_image_viso_log("VISO: Assigning sectors to files:\n");
image_viso_log(viso->tf.log, "Assigning sectors to files:\n");
size_t base_factor = viso->sector_size / orig_sector_size;
viso_entry_t *prev_entry = viso->root_dir;
viso_entry_t **entry_map_p = viso->entry_map;
@@ -1521,7 +1554,8 @@ next_entry:
size_t size = entry->stats.st_size / viso->sector_size;
if (entry->stats.st_size % viso->sector_size)
size++; /* round up to the next sector */
cdrom_image_viso_log("[%08X] %s => %zu + %zu sectors\n", entry, entry->path, viso->all_sectors, size);
image_viso_log(viso->tf.log, "[%08X] %s => %zu + %zu sectors\n", entry,
entry->path, viso->all_sectors, size);
/* Allocate sectors to this file. */
viso->all_sectors += size;
@@ -1540,9 +1574,10 @@ next_entry:
viso_pwrite(data, viso->vol_size_offsets[i], 8, 1, viso->tf.fp);
/* Metadata processing is finished, read it back to memory. */
cdrom_image_viso_log("VISO: Reading back %zu %zu-byte sectors of metadata\n", viso->metadata_sectors, viso->sector_size);
image_viso_log(viso->tf.log, "Reading back %zu %zu-byte sectors of metadata\n",
viso->metadata_sectors, viso->sector_size);
viso->metadata = (uint8_t *) calloc(viso->metadata_sectors, viso->sector_size);
if (!viso->metadata)
if (viso->metadata == NULL)
goto end;
fseeko64(viso->tf.fp, 0, SEEK_SET);
size_t metadata_size = viso->metadata_sectors * viso->sector_size;
@@ -1553,7 +1588,7 @@ next_entry:
/* We no longer need the temporary file; close and delete it. */
fclose(viso->tf.fp);
viso->tf.fp = NULL;
#ifndef ENABLE_CDROM_IMAGE_VISO_LOG
#ifndef ENABLE_IMAGE_VISO_LOG
remove(nvr_path(viso->tf.fn));
#endif
@@ -1564,13 +1599,15 @@ end:
/* Set the function pointers. */
viso->tf.priv = viso;
if (!*error) {
cdrom_image_viso_log("VISO: Initialized\n");
image_viso_log(viso->tf.log, "Initialized\n");
viso->tf.read = viso_read;
viso->tf.get_length = viso_get_length;
viso->tf.close = viso_close;
return &viso->tf;
} else {
cdrom_image_viso_log("VISO: Initialization failed\n");
image_viso_log(viso->tf.log, "Initialization failed\n");
if (data)
free(data);
viso_close(&viso->tf);

277
src/cdrom/cdrom_ioctl.c
View File

@@ -1,277 +0,0 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* CD-ROM passthrough support.
*
*
*
* Authors: TheCollector1995, <mariogplayer@gmail.com>,
* Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2023 TheCollector1995.
* Copyright 2023 Miran Grca.
*/
#include <inttypes.h>
#include <stdarg.h>
#include <stdio.h>
#include <stdint.h>
#include <string.h>
#include <stdlib.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/config.h>
#include <86box/path.h>
#include <86box/plat.h>
#include <86box/plat_cdrom.h>
#include <86box/scsi_device.h>
#include <86box/cdrom.h>
#ifdef ENABLE_CDROM_IOCTL_LOG
int cdrom_ioctl_do_log = ENABLE_CDROM_IOCTL_LOG;
void
cdrom_ioctl_log(const char *fmt, ...)
{
va_list ap;
if (cdrom_ioctl_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
# define cdrom_ioctl_log(fmt, ...)
#endif
/* The addresses sent from the guest are absolute, ie. a LBA of 0 corresponds to a MSF of 00:00:00. Otherwise, the counter displayed by the guest is wrong:
there is a seeming 2 seconds in which audio plays but counter does not move, while a data track before audio jumps to 2 seconds before the actual start
of the audio while audio still plays. With an absolute conversion, the counter is fine. */
#define MSFtoLBA(m, s, f) ((((m * 60) + s) * 75) + f)
static void
ioctl_get_tracks(UNUSED(cdrom_t *dev), int *first, int *last)
{
TMSF tmsf;
plat_cdrom_get_audio_tracks(first, last, &tmsf);
}
static void
ioctl_get_track_info(UNUSED(cdrom_t *dev), uint32_t track, int end, track_info_t *ti)
{
TMSF tmsf;
plat_cdrom_get_audio_track_info(end, track, &ti->number, &tmsf, &ti->attr);
ti->m = tmsf.min;
ti->s = tmsf.sec;
ti->f = tmsf.fr;
}
static void
ioctl_get_subchannel(UNUSED(cdrom_t *dev), uint32_t lba, subchannel_t *subc)
{
TMSF rel_pos;
TMSF abs_pos;
if ((dev->cd_status == CD_STATUS_PLAYING) || (dev->cd_status == CD_STATUS_PAUSED)) {
const uint32_t trk = plat_cdrom_get_track_start(lba, &subc->attr, &subc->track);
FRAMES_TO_MSF(lba + 150, &abs_pos.min, &abs_pos.sec, &abs_pos.fr);
/* Absolute position should be adjusted by 150, not the relative ones. */
FRAMES_TO_MSF(lba - trk, &rel_pos.min, &rel_pos.sec, &rel_pos.fr);
subc->index = 1;
} else
plat_cdrom_get_audio_sub(lba, &subc->attr, &subc->track, &subc->index,
&rel_pos, &abs_pos);
subc->abs_m = abs_pos.min;
subc->abs_s = abs_pos.sec;
subc->abs_f = abs_pos.fr;
subc->rel_m = rel_pos.min;
subc->rel_s = rel_pos.sec;
subc->rel_f = rel_pos.fr;
cdrom_ioctl_log("ioctl_get_subchannel(): %02X, %02X, %02i, %02i:%02i:%02i, %02i:%02i:%02i\n",
subc->attr, subc->track, subc->index, subc->abs_m, subc->abs_s, subc->abs_f, subc->rel_m, subc->rel_s, subc->rel_f);
}
static int
ioctl_get_capacity(UNUSED(cdrom_t *dev))
{
int ret;
ret = plat_cdrom_get_last_block();
cdrom_ioctl_log("GetCapacity=%x.\n", ret);
return ret;
}
static int
ioctl_is_track_audio(cdrom_t *dev, uint32_t pos, int ismsf)
{
int m;
int s;
int f;
if (dev->cd_status == CD_STATUS_DATA_ONLY)
return 0;
if (ismsf) {
m = (pos >> 16) & 0xff;
s = (pos >> 8) & 0xff;
f = pos & 0xff;
pos = MSFtoLBA(m, s, f) - 150;
}
/* GetTrack requires LBA. */
return plat_cdrom_is_track_audio(pos);
}
static int
ioctl_is_track_pre(UNUSED(cdrom_t *dev), uint32_t lba)
{
return plat_cdrom_is_track_pre(lba);
}
static int
ioctl_sector_size(UNUSED(cdrom_t *dev), uint32_t lba)
{
cdrom_ioctl_log("LBA=%x.\n", lba);
return plat_cdrom_get_sector_size(lba);
}
static int
ioctl_read_sector(UNUSED(cdrom_t *dev), int type, uint8_t *b, uint32_t lba)
{
switch (type) {
case CD_READ_DATA:
cdrom_ioctl_log("cdrom_ioctl_read_sector(): Data.\n");
return plat_cdrom_read_sector(b, 0, lba);
case CD_READ_AUDIO:
cdrom_ioctl_log("cdrom_ioctl_read_sector(): Audio.\n");
return plat_cdrom_read_sector(b, 1, lba);
case CD_READ_RAW:
cdrom_ioctl_log("cdrom_ioctl_read_sector(): Raw.\n");
return plat_cdrom_read_sector(b, 1, lba);
default:
cdrom_ioctl_log("cdrom_ioctl_read_sector(): Unknown CD read type.\n");
break;
}
return 0;
}
static int
ioctl_track_type(cdrom_t *dev, uint32_t lba)
{
int ret = 0;
if (ioctl_is_track_audio(dev, lba, 0))
ret = CD_TRACK_AUDIO;
cdrom_ioctl_log("cdrom_ioctl_track_type(): %i\n", ret);
return ret;
}
static int
ioctl_ext_medium_changed(cdrom_t *dev)
{
int ret;
if ((dev->cd_status == CD_STATUS_PLAYING) || (dev->cd_status == CD_STATUS_PAUSED))
ret = 0;
else
ret = plat_cdrom_ext_medium_changed();
if (ret == 1) {
dev->cd_status = CD_STATUS_STOPPED;
dev->cdrom_capacity = ioctl_get_capacity(dev);
} else if (ret == -1)
dev->cd_status = CD_STATUS_EMPTY;
return ret;
}
static void
ioctl_exit(cdrom_t *dev)
{
cdrom_ioctl_log("CDROM: ioctl_exit(%s)\n", dev->image_path);
dev->cd_status = CD_STATUS_EMPTY;
plat_cdrom_close();
dev->ops = NULL;
}
static const cdrom_ops_t cdrom_ioctl_ops = {
ioctl_get_tracks,
ioctl_get_track_info,
ioctl_get_subchannel,
ioctl_is_track_pre,
ioctl_sector_size,
ioctl_read_sector,
ioctl_track_type,
ioctl_ext_medium_changed,
ioctl_exit
};
static int
cdrom_ioctl_open_abort(cdrom_t *dev)
{
cdrom_ioctl_close(dev);
dev->ops = NULL;
dev->image_path[0] = 0;
return 1;
}
int
cdrom_ioctl_open(cdrom_t *dev, const char *drv)
{
const char *actual_drv = &(drv[8]);
/* Make sure to not STRCPY if the two are pointing
at the same place. */
if (drv != dev->image_path)
strcpy(dev->image_path, drv);
/* Open the image. */
if (strstr(drv, "ioctl://") != drv)
return cdrom_ioctl_open_abort(dev);
cdrom_ioctl_log("actual_drv = %s\n", actual_drv);
int i = plat_cdrom_set_drive(actual_drv);
if (!i)
return cdrom_ioctl_open_abort(dev);
/* All good, reset state. */
dev->cd_status = CD_STATUS_STOPPED;
dev->seek_pos = 0;
dev->cd_buflen = 0;
dev->cdrom_capacity = ioctl_get_capacity(dev);
cdrom_ioctl_log("CD-ROM capacity: %i sectors (%" PRIi64 " bytes)\n",
dev->cdrom_capacity, ((uint64_t) dev->cdrom_capacity) << 11ULL);
/* Attach this handler to the drive. */
dev->ops = &cdrom_ioctl_ops;
return 0;
}
void
cdrom_ioctl_close(cdrom_t *dev)
{
cdrom_ioctl_log("CDROM: ioctl_close(%s)\n", dev->image_path);
if (dev && dev->ops && dev->ops->exit)
dev->ops->exit(dev);
}

63
src/cdrom/cdrom_mitsumi.c
View File

@@ -118,14 +118,6 @@ typedef struct mcd_t {
int newstat;
} mcd_t;
/* The addresses sent from the guest are absolute, ie. a LBA of 0 corresponds to a MSF of 00:00:00. Otherwise, the counter displayed by the guest is wrong:
there is a seeming 2 seconds in which audio plays but counter does not move, while a data track before audio jumps to 2 seconds before the actual start
of the audio while audio still plays. With an absolute conversion, the counter is fine. */
#ifdef MSFtoLBA
#undef MSFtoLBA
#endif
#define MSFtoLBA(m, s, f) ((((m * 60) + s) * 75) + f)
#define CD_BCD(x) (((x) % 10) | (((x) / 10) << 4))
#define CD_DCB(x) ((((x) &0xf0) >> 4) * 10 + ((x) &0x0f))
@@ -156,9 +148,9 @@ mitsumi_cdrom_is_ready(const cdrom_t *dev)
static void
mitsumi_cdrom_reset(mcd_t *dev)
{
cdrom_t cdrom;
dev->stat = mitsumi_cdrom_is_ready(&cdrom) ? (STAT_READY | STAT_CHANGE) : 0;
cdrom_t *cdrom = calloc(1, sizeof(cdrom_t));
dev->stat = mitsumi_cdrom_is_ready(cdrom) ? (STAT_READY | STAT_CHANGE) : 0;
dev->cmdrd_count = 0;
dev->cmdbuf_count = 0;
dev->buf_count = 0;
@@ -176,12 +168,12 @@ mitsumi_cdrom_reset(mcd_t *dev)
static int
mitsumi_cdrom_read_sector(mcd_t *dev, int first)
{
cdrom_t cdrom;
cdrom_t *cdrom = calloc(1, sizeof(cdrom_t));
uint8_t status;
int ret;
int ret = 0;
if (dev->drvmode == DRV_MODE_CDDA) {
status = cdrom_mitsumi_audio_play(&cdrom, dev->readmsf, dev->readcount);
status = cdrom_mitsumi_audio_play(cdrom, dev->readmsf, dev->readcount);
if (status == 1)
return status;
else
@@ -195,15 +187,15 @@ mitsumi_cdrom_read_sector(mcd_t *dev, int first)
dev->data = 0;
return 0;
}
cdrom_stop(&cdrom);
ret = cdrom_readsector_raw(&cdrom, dev->buf, cdrom.seek_pos, 0, 2, 0x10, (int *) &dev->readcount, 0);
if (!ret)
cdrom_stop(cdrom);
ret = cdrom_readsector_raw(cdrom, dev->buf, cdrom->seek_pos, 0, 2, 0x10, (int *) &dev->readcount, 0);
if (ret <= 0)
return 0;
if (dev->mode & 0x40) {
dev->buf[12] = CD_BCD((dev->readmsf >> 16) & 0xff);
dev->buf[13] = CD_BCD((dev->readmsf >> 8) & 0xff);
}
dev->readmsf = cdrom_lba_to_msf_accurate(cdrom.seek_pos + 1);
dev->readmsf = cdrom_lba_to_msf_accurate(cdrom->seek_pos + 1);
dev->buf_count = dev->dmalen + 1;
dev->buf_idx = 0;
dev->data = 1;
@@ -224,7 +216,7 @@ static uint8_t
mitsumi_cdrom_in(uint16_t port, void *priv)
{
mcd_t *dev = (mcd_t *) priv;
uint8_t ret;
uint8_t ret = 0xff;
pclog("Mitsumi CD-ROM IN=%03x\n", port);
switch (port & 1) {
@@ -259,14 +251,14 @@ mitsumi_cdrom_in(uint16_t port, void *priv)
break;
}
return 0xff;
return ret;
}
static void
mitsumi_cdrom_out(uint16_t port, uint8_t val, void *priv)
{
mcd_t *dev = (mcd_t *) priv;
cdrom_t cdrom;
cdrom_t *cdrom = calloc(1, sizeof(cdrom_t));
pclog("Mitsumi CD-ROM OUT=%03x, val=%02x\n", port, val);
switch (port & 1) {
@@ -348,19 +340,19 @@ mitsumi_cdrom_out(uint16_t port, uint8_t val, void *priv)
break;
}
if (!dev->cmdrd_count)
dev->stat = mitsumi_cdrom_is_ready(&cdrom) ? (STAT_READY | (dev->change ? STAT_CHANGE : 0)) : 0;
dev->stat = mitsumi_cdrom_is_ready(cdrom) ? (STAT_READY | (dev->change ? STAT_CHANGE : 0)) : 0;
return;
}
dev->cmd = val;
dev->cmdbuf_idx = 0;
dev->cmdrd_count = 0;
dev->cmdbuf_count = 1;
dev->cmdbuf[0] = mitsumi_cdrom_is_ready(&cdrom) ? (STAT_READY | (dev->change ? STAT_CHANGE : 0)) : 0;
dev->cmdbuf[0] = mitsumi_cdrom_is_ready(cdrom) ? (STAT_READY | (dev->change ? STAT_CHANGE : 0)) : 0;
dev->data = 0;
switch (val) {
case CMD_GET_INFO:
if (mitsumi_cdrom_is_ready(&cdrom)) {
cdrom_get_track_buffer(&cdrom, &(dev->cmdbuf[1]));
if (mitsumi_cdrom_is_ready(cdrom)) {
cdrom_get_track_buffer(cdrom, &(dev->cmdbuf[1]));
dev->cmdbuf_count = 10;
dev->readcount = 0;
} else {
@@ -369,8 +361,8 @@ mitsumi_cdrom_out(uint16_t port, uint8_t val, void *priv)
}
break;
case CMD_GET_Q:
if (mitsumi_cdrom_is_ready(&cdrom)) {
cdrom_get_q(&cdrom, &(dev->cmdbuf[1]), &dev->cur_toc_track, dev->mode & MODE_GET_TOC);
if (mitsumi_cdrom_is_ready(cdrom)) {
cdrom_get_q(cdrom, &(dev->cmdbuf[1]), &dev->cur_toc_track, dev->mode & MODE_GET_TOC);
dev->cmdbuf_count = 11;
dev->readcount = 0;
} else {
@@ -386,7 +378,7 @@ mitsumi_cdrom_out(uint16_t port, uint8_t val, void *priv)
break;
case CMD_STOPCDDA:
case CMD_STOP:
cdrom_stop(&cdrom);
cdrom_stop(cdrom);
dev->drvmode = DRV_MODE_STOP;
dev->cur_toc_track = 0;
break;
@@ -395,7 +387,7 @@ mitsumi_cdrom_out(uint16_t port, uint8_t val, void *priv)
break;
case CMD_READ1X:
case CMD_READ2X:
if (mitsumi_cdrom_is_ready(&cdrom)) {
if (mitsumi_cdrom_is_ready(cdrom)) {
dev->readcount = 0;
dev->drvmode = (val == CMD_READ1X) ? DRV_MODE_CDDA : DRV_MODE_READ;
dev->cmdrd_count = 6;
@@ -411,7 +403,7 @@ mitsumi_cdrom_out(uint16_t port, uint8_t val, void *priv)
dev->cmdbuf_count = 3;
break;
case CMD_EJECT:
cdrom_stop(&cdrom);
cdrom_stop(cdrom);
cdrom_eject(0);
dev->readcount = 0;
break;
@@ -440,10 +432,7 @@ mitsumi_cdrom_out(uint16_t port, uint8_t val, void *priv)
static void *
mitsumi_cdrom_init(UNUSED(const device_t *info))
{
mcd_t *dev;
dev = malloc(sizeof(mcd_t));
memset(dev, 0x00, sizeof(mcd_t));
mcd_t *dev = calloc(1, sizeof(mcd_t));
dev->irq = MCD_DEFAULT_IRQ;
dev->dma = MCD_DEFAULT_DMA;
@@ -470,12 +459,12 @@ mitsumi_cdrom_close(void *priv)
const device_t mitsumi_cdrom_device = {
.name = "Mitsumi CD-ROM interface",
.internal_name = "mcd",
.flags = DEVICE_ISA | DEVICE_AT,
.local = 1,
.flags = DEVICE_ISA16,
.local = 0,
.init = mitsumi_cdrom_init,
.close = mitsumi_cdrom_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

5
src/chipset/82c100.c
View File

@@ -358,8 +358,7 @@ ct_82c100_init(UNUSED(const device_t *info))
{
ct_82c100_t *dev;
dev = (ct_82c100_t *) malloc(sizeof(ct_82c100_t));
memset(dev, 0x00, sizeof(ct_82c100_t));
dev = (ct_82c100_t *) calloc(1, sizeof(ct_82c100_t));
ct_82c100_reset(dev);
@@ -393,7 +392,7 @@ const device_t ct_82c100_device = {
.init = ct_82c100_init,
.close = ct_82c100_close,
.reset = ct_82c100_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

80
src/chipset/CMakeLists.txt
View File

@@ -9,20 +9,80 @@
# CMake build script.
#
# Authors: David Hrdlička, <hrdlickadavid@outlook.com>
# Jasmine Iwanek, <jriwanek@gmail.com>
#
# Copyright 2020-2021 David Hrdlička.
# Copyright 2024 Jasmine Iwanek.
#
add_library(chipset OBJECT 82c100.c acc2168.c cs8230.c ali1429.c ali1435.c ali1489.c
ali1531.c ali1541.c ali1543.c ali1621.c ali6117.c ali1409.c headland.c ims8848.c intel_82335.c
compaq_386.c contaq_82c59x.c cs4031.c intel_420ex.c intel_4x0.c intel_i450kx.c
intel_sio.c intel_piix.c ../ioapic.c neat.c opti283.c opti291.c opti391.c opti495.c
opti499.c opti602.c opti822.c opti895.c opti5x7.c scamp.c scat.c sis_85c310.c sis_85c4xx.c
sis_85c496.c sis_85c50x.c sis_5511.c sis_5571.c sis_5581.c sis_5591.c sis_5600.c
sis_5511_h2p.c sis_5571_h2p.c sis_5581_h2p.c sis_5591_h2p.c sis_5600_h2p.c
sis_5513_p2i.c sis_5513_ide.c sis_5572_usb.c sis_5595_pmu.c sis_55xx.c via_vt82c49x.c
via_vt82c505.c sis_85c310.c sis_85c4xx.c sis_85c496.c sis_85c50x.c gc100.c stpc.c
umc_8886.c umc_hb4.c umc_8890.c via_apollo.c via_pipc.c vl82c480.c wd76c10.c)
add_library(chipset OBJECT
82c100.c
acc2168.c
cs8230.c
ali1429.c
ali1435.c
ali1489.c
ali1531.c
ali1541.c
ali1543.c
ali1621.c
ali6117.c
ali1409.c
headland.c
ims8848.c
intel_82335.c
compaq_386.c
contaq_82c59x.c
cs4031.c
intel_420ex.c
intel_4x0.c
intel_i450kx.c
intel_sio.c
intel_piix.c
../ioapic.c
neat.c
opti283.c
opti291.c
opti391.c
opti495.c
opti499.c
opti602.c
opti822.c
opti895.c
opti5x7.c
scamp.c
scat.c
sis_85c310.c
sis_85c4xx.c
sis_85c496.c
sis_85c50x.c
sis_5511.c
sis_5571.c
sis_5581.c
sis_5591.c
sis_5600.c
sis_5511_h2p.c
sis_5571_h2p.c
sis_5581_h2p.c
sis_5591_h2p.c
sis_5600_h2p.c
sis_5513_p2i.c
sis_5513_ide.c
sis_5572_usb.c
sis_5595_pmu.c
sis_55xx.c
via_vt82c49x.c
via_vt82c505.c
gc100.c
stpc.c
umc_8886.c
umc_hb4.c
umc_8890.c
via_apollo.c
via_pipc.c
vl82c480.c
wd76c10.c
)
if(OLIVETTI)
target_sources(chipset PRIVATE olivetti_eva.c)

5
src/chipset/acc2168.c
View File

@@ -184,8 +184,7 @@ acc2168_close(void *priv)
static void *
acc2168_init(UNUSED(const device_t *info))
{
acc2168_t *dev = (acc2168_t *) malloc(sizeof(acc2168_t));
memset(dev, 0, sizeof(acc2168_t));
acc2168_t *dev = (acc2168_t *) calloc(1, sizeof(acc2168_t));
device_add(&port_92_device);
io_sethandler(0x00f2, 0x0002, acc2168_read, NULL, NULL, acc2168_write, NULL, NULL, dev);
@@ -201,7 +200,7 @@ const device_t acc2168_device = {
.init = acc2168_init,
.close = acc2168_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

12
src/chipset/ali1409.c
View File

@@ -40,9 +40,8 @@
#include <86box/fdc.h>
#include <86box/smram.h>
#include <86box/chipset.h>
#include <86box/plat_unused.h>
#ifdef ENABLE_ALI1409_LOG
int ali1409_do_log = ENABLE_ALI1409_LOG;
@@ -161,10 +160,9 @@ ali1409_close(void *priv)
}
static void *
ali1409_init(const device_t *info)
ali1409_init(UNUSED(const device_t *info))
{
ali1409_t *dev = (ali1409_t *) malloc(sizeof(ali1409_t));
memset(dev, 0, sizeof(ali1409_t));
ali1409_t *dev = (ali1409_t *) calloc(1, sizeof(ali1409_t));
dev->cfg_locked = 1;
@@ -173,7 +171,7 @@ ali1409_init(const device_t *info)
23h Data Port
*/
ali1409_log ("Bus speed: %i",cpu_busspeed);
ali1409_log ("Bus speed: %i", cpu_busspeed);
io_sethandler(0x0022, 0x0002, ali1409_read, NULL, NULL, ali1409_write, NULL, NULL, dev);
@@ -191,7 +189,7 @@ const device_t ali1409_device = {
.init = ali1409_init,
.close = ali1409_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

7
src/chipset/ali1429.c
View File

@@ -331,8 +331,7 @@ ali1429_defaults(ali1429_t *dev)
static void *
ali1429_init(const device_t *info)
{
ali1429_t *dev = (ali1429_t *) malloc(sizeof(ali1429_t));
memset(dev, 0, sizeof(ali1429_t));
ali1429_t *dev = (ali1429_t *) calloc(1, sizeof(ali1429_t));
dev->cfg_locked = 1;
GREEN = info->local;
@@ -358,7 +357,7 @@ const device_t ali1429_device = {
.init = ali1429_init,
.close = ali1429_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -372,7 +371,7 @@ const device_t ali1429g_device = {
.init = ali1429_init,
.close = ali1429_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

5
src/chipset/ali1435.c
View File

@@ -282,8 +282,7 @@ ali1435_close(void *priv)
static void *
ali1435_init(UNUSED(const device_t *info))
{
ali1435_t *dev = (ali1435_t *) malloc(sizeof(ali1435_t));
memset(dev, 0, sizeof(ali1435_t));
ali1435_t *dev = (ali1435_t *) calloc(1, sizeof(ali1435_t));
dev->cfg_locked = 1;
@@ -308,7 +307,7 @@ const device_t ali1435_device = {
.init = ali1435_init,
.close = ali1435_close,
.reset = ali1435_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

5
src/chipset/ali1489.c
View File

@@ -470,8 +470,7 @@ ali1489_close(void *priv)
static void *
ali1489_init(UNUSED(const device_t *info))
{
ali1489_t *dev = (ali1489_t *) malloc(sizeof(ali1489_t));
memset(dev, 0, sizeof(ali1489_t));
ali1489_t *dev = (ali1489_t *) calloc(1, sizeof(ali1489_t));
/* M1487/M1489
22h Index Port
@@ -499,7 +498,7 @@ const device_t ali1489_device = {
.init = ali1489_init,
.close = ali1489_close,
.reset = ali1489_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

22
src/chipset/ali1531.c
View File

@@ -225,12 +225,8 @@ ali1531_write(UNUSED(int func), int addr, uint8_t val, void *priv)
ali1531_shadow_recalc(val, dev);
break;
case 0x50:
case 0x51:
case 0x52:
case 0x54:
case 0x55:
case 0x56:
case 0x50 ... 0x52:
case 0x54 ... 0x56:
dev->pci_conf[addr] = val;
break;
@@ -247,8 +243,7 @@ ali1531_write(UNUSED(int func), int addr, uint8_t val, void *priv)
dev->pci_conf[addr] = val & 0x86;
break;
case 0x59:
case 0x5a:
case 0x59 ... 0x5a:
case 0x5c:
dev->pci_conf[addr] = val;
break;
@@ -270,8 +265,7 @@ ali1531_write(UNUSED(int func), int addr, uint8_t val, void *priv)
spd_write_drbs_interleaved(dev->pci_conf, 0x60, 0x6f, 1);
break;
case 0x70:
case 0x71:
case 0x70 ... 0x71:
dev->pci_conf[addr] = val;
break;
@@ -283,8 +277,7 @@ ali1531_write(UNUSED(int func), int addr, uint8_t val, void *priv)
dev->pci_conf[addr] = val & 0x2b;
break;
case 0x76:
case 0x77:
case 0x76 ... 0x77:
dev->pci_conf[addr] = val;
break;
@@ -376,8 +369,7 @@ ali1531_close(void *priv)
static void *
ali1531_init(UNUSED(const device_t *info))
{
ali1531_t *dev = (ali1531_t *) malloc(sizeof(ali1531_t));
memset(dev, 0, sizeof(ali1531_t));
ali1531_t *dev = (ali1531_t *) calloc(1, sizeof(ali1531_t));
pci_add_card(PCI_ADD_NORTHBRIDGE, ali1531_read, ali1531_write, dev, &dev->pci_slot);
@@ -396,7 +388,7 @@ const device_t ali1531_device = {
.init = ali1531_init,
.close = ali1531_close,
.reset = ali1531_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

5
src/chipset/ali1541.c
View File

@@ -643,8 +643,7 @@ ali1541_close(void *priv)
static void *
ali1541_init(UNUSED(const device_t *info))
{
ali1541_t *dev = (ali1541_t *) malloc(sizeof(ali1541_t));
memset(dev, 0, sizeof(ali1541_t));
ali1541_t *dev = (ali1541_t *) calloc(1, sizeof(ali1541_t));
pci_add_card(PCI_ADD_NORTHBRIDGE, ali1541_read, ali1541_write, dev, &dev->pci_slot);
@@ -665,7 +664,7 @@ const device_t ali1541_device = {
.init = ali1541_init,
.close = ali1541_close,
.reset = ali1541_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

7
src/chipset/ali1543.c
View File

@@ -1599,8 +1599,7 @@ ali1543_close(void *priv)
static void *
ali1543_init(const device_t *info)
{
ali1543_t *dev = (ali1543_t *) malloc(sizeof(ali1543_t));
memset(dev, 0, sizeof(ali1543_t));
ali1543_t *dev = (ali1543_t *) calloc(1, sizeof(ali1543_t));
/* Device 02: M1533 Southbridge */
pci_add_card(PCI_ADD_SOUTHBRIDGE, ali1533_read, ali1533_write, dev, &dev->pci_slot);
@@ -1673,7 +1672,7 @@ const device_t ali1543_device = {
.init = ali1543_init,
.close = ali1543_close,
.reset = ali1543_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -1687,7 +1686,7 @@ const device_t ali1543c_device = {
.init = ali1543_init,
.close = ali1543_close,
.reset = ali1543_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

5
src/chipset/ali1621.c
View File

@@ -669,8 +669,7 @@ ali1621_close(void *priv)
static void *
ali1621_init(UNUSED(const device_t *info))
{
ali1621_t *dev = (ali1621_t *) malloc(sizeof(ali1621_t));
memset(dev, 0, sizeof(ali1621_t));
ali1621_t *dev = (ali1621_t *) calloc(1, sizeof(ali1621_t));
pci_add_card(PCI_ADD_NORTHBRIDGE, ali1621_read, ali1621_write, dev, &dev->pci_slot);
@@ -692,7 +691,7 @@ const device_t ali1621_device = {
.init = ali1621_init,
.close = ali1621_close,
.reset = ali1621_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

11
src/chipset/ali6117.c
View File

@@ -466,8 +466,7 @@ ali6117_init(const device_t *info)
ali6117_log("ALI6117: init()\n");
ali6117_t *dev = (ali6117_t *) malloc(sizeof(ali6117_t));
memset(dev, 0, sizeof(ali6117_t));
ali6117_t *dev = (ali6117_t *) calloc(1, sizeof(ali6117_t));
dev->local = info->local;
@@ -494,12 +493,12 @@ ali6117_init(const device_t *info)
const device_t ali1217_device = {
.name = "ALi M1217",
.internal_name = "ali1217",
.flags = DEVICE_AT,
.flags = DEVICE_ISA16,
.local = 0x8,
.init = ali6117_init,
.close = ali6117_close,
.reset = ali6117_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -508,12 +507,12 @@ const device_t ali1217_device = {
const device_t ali6117d_device = {
.name = "ALi M6117D",
.internal_name = "ali6117d",
.flags = DEVICE_AT,
.flags = DEVICE_ISA16,
.local = 0x2,
.init = ali6117_init,
.close = ali6117_close,
.reset = ali6117_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

4
src/chipset/compaq_386.c
View File

@@ -772,7 +772,7 @@ const device_t compaq_386_device = {
.init = compaq_386_init,
.close = compaq_386_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -786,7 +786,7 @@ const device_t compaq_genoa_device = {
.init = compaq_genoa_init,
.close = NULL,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

7
src/chipset/contaq_82c59x.c
View File

@@ -322,8 +322,7 @@ contaq_82c59x_close(void *priv)
static void *
contaq_82c59x_init(const device_t *info)
{
contaq_82c59x_t *dev = (contaq_82c59x_t *) malloc(sizeof(contaq_82c59x_t));
memset(dev, 0x00, sizeof(contaq_82c59x_t));
contaq_82c59x_t *dev = (contaq_82c59x_t *) calloc(1, sizeof(contaq_82c59x_t));
dev->green = info->local;
@@ -359,7 +358,7 @@ const device_t contaq_82c596a_device = {
.init = contaq_82c59x_init,
.close = contaq_82c59x_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -373,7 +372,7 @@ const device_t contaq_82c597_device = {
.init = contaq_82c59x_init,
.close = contaq_82c59x_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

5
src/chipset/cs4031.c
View File

@@ -164,8 +164,7 @@ cs4031_close(void *priv)
static void *
cs4031_init(UNUSED(const device_t *info))
{
cs4031_t *dev = (cs4031_t *) malloc(sizeof(cs4031_t));
memset(dev, 0, sizeof(cs4031_t));
cs4031_t *dev = (cs4031_t *) calloc(1, sizeof(cs4031_t));
dev->port_92 = device_add(&port_92_device);
@@ -185,7 +184,7 @@ const device_t cs4031_device = {
.init = cs4031_init,
.close = cs4031_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

5
src/chipset/cs8230.c
View File

@@ -157,8 +157,7 @@ cs8230_close(void *priv)
static void *
cs8230_init(UNUSED(const device_t *info))
{
cs8230_t *cs8230 = (cs8230_t *) malloc(sizeof(cs8230_t));
memset(cs8230, 0, sizeof(cs8230_t));
cs8230_t *cs8230 = (cs8230_t *) calloc(1, sizeof(cs8230_t));
io_sethandler(0x0022, 0x0002, cs8230_read, NULL, NULL, cs8230_write, NULL, NULL, cs8230);
@@ -178,7 +177,7 @@ const device_t cs8230_device = {
.init = cs8230_init,
.close = cs8230_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

5
src/chipset/et6000.c
View File

@@ -137,8 +137,7 @@ et6000_close(void *priv)
static void *
et6000_init(UNUSED(const device_t *info))
{
et6000_t *dev = (et6000_t *) malloc(sizeof(et6000_t));
memset(dev, 0, sizeof(et6000_t));
et6000_t *dev = (et6000_t *) calloc(1, sizeof(et6000_t));
/* Port 92h */
device_add(&port_92_device);
@@ -162,7 +161,7 @@ const device_t et6000_device = {
.init = et6000_init,
.close = et6000_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

7
src/chipset/gc100.c
View File

@@ -208,8 +208,7 @@ gc100_close(void *priv)
static void *
gc100_init(const device_t *info)
{
gc100_t *dev = (gc100_t *) malloc(sizeof(gc100_t));
memset(dev, 0, sizeof(gc100_t));
gc100_t *dev = (gc100_t *) calloc(1, sizeof(gc100_t));
dev->reg[0x2] = 0xff;
dev->reg[0x3] = 0x0;
@@ -238,7 +237,7 @@ const device_t gc100_device = {
.init = gc100_init,
.close = gc100_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -252,7 +251,7 @@ const device_t gc100a_device = {
.init = gc100_init,
.close = gc100_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

17
src/chipset/headland.c
View File

@@ -594,8 +594,7 @@ headland_init(const device_t *info)
headland_t *dev;
int ht386 = 0;
dev = (headland_t *) malloc(sizeof(headland_t));
memset(dev, 0x00, sizeof(headland_t));
dev = (headland_t *) calloc(1, sizeof(headland_t));
dev->has_cri = (info->local & HEADLAND_HAS_CRI);
dev->has_sleep = (info->local & HEADLAND_HAS_SLEEP);
@@ -699,7 +698,7 @@ const device_t headland_gc10x_device = {
.init = headland_init,
.close = headland_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -713,7 +712,7 @@ const device_t headland_gc113_device = {
.init = headland_init,
.close = headland_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -727,7 +726,7 @@ const device_t headland_ht18a_device = {
.init = headland_init,
.close = headland_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -741,7 +740,7 @@ const device_t headland_ht18b_device = {
.init = headland_init,
.close = headland_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -755,7 +754,7 @@ const device_t headland_ht18c_device = {
.init = headland_init,
.close = headland_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -769,7 +768,7 @@ const device_t headland_ht21c_d_device = {
.init = headland_init,
.close = headland_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -783,7 +782,7 @@ const device_t headland_ht21e_device = {
.init = headland_init,
.close = headland_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

5
src/chipset/ims8848.c
View File

@@ -381,8 +381,7 @@ ims8848_close(void *priv)
static void *
ims8848_init(UNUSED(const device_t *info))
{
ims8848_t *dev = (ims8848_t *) malloc(sizeof(ims8848_t));
memset(dev, 0, sizeof(ims8848_t));
ims8848_t *dev = (ims8848_t *) calloc(1, sizeof(ims8848_t));
device_add(&port_92_device);
@@ -416,7 +415,7 @@ const device_t ims8848_device = {
.init = ims8848_init,
.close = ims8848_close,
.reset = ims8848_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

7
src/chipset/intel_420ex.c
View File

@@ -533,8 +533,7 @@ i420ex_speed_changed(void *priv)
static void *
i420ex_init(const device_t *info)
{
i420ex_t *dev = (i420ex_t *) malloc(sizeof(i420ex_t));
memset(dev, 0, sizeof(i420ex_t));
i420ex_t *dev = (i420ex_t *) calloc(1, sizeof(i420ex_t));
dev->smram = smram_add();
@@ -579,7 +578,7 @@ const device_t i420ex_device = {
.init = i420ex_init,
.close = i420ex_close,
.reset = i420ex_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = i420ex_speed_changed,
.force_redraw = NULL,
.config = NULL
@@ -593,7 +592,7 @@ const device_t i420ex_ide_device = {
.init = i420ex_init,
.close = i420ex_close,
.reset = i420ex_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = i420ex_speed_changed,
.force_redraw = NULL,
.config = NULL

36
src/chipset/intel_4x0.c
View File

@@ -1608,11 +1608,9 @@ i4x0_close(void *priv)
static void *
i4x0_init(const device_t *info)
{
i4x0_t *dev = (i4x0_t *) malloc(sizeof(i4x0_t));
i4x0_t *dev = (i4x0_t *) calloc(1, sizeof(i4x0_t));
uint8_t *regs;
memset(dev, 0, sizeof(i4x0_t));
dev->smram_low = smram_add();
dev->smram_high = smram_add();
@@ -1967,7 +1965,7 @@ const device_t i420tx_device = {
.init = i4x0_init,
.close = i4x0_close,
.reset = i4x0_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -1981,7 +1979,7 @@ const device_t i420zx_device = {
.init = i4x0_init,
.close = i4x0_close,
.reset = i4x0_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -1995,7 +1993,7 @@ const device_t i430lx_device = {
.init = i4x0_init,
.close = i4x0_close,
.reset = i4x0_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -2009,7 +2007,7 @@ const device_t i430nx_device = {
.init = i4x0_init,
.close = i4x0_close,
.reset = i4x0_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -2023,7 +2021,7 @@ const device_t i430fx_device = {
.init = i4x0_init,
.close = i4x0_close,
.reset = i4x0_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -2037,7 +2035,7 @@ const device_t i430fx_rev02_device = {
.init = i4x0_init,
.close = i4x0_close,
.reset = i4x0_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -2051,7 +2049,7 @@ const device_t i430hx_device = {
.init = i4x0_init,
.close = i4x0_close,
.reset = i4x0_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -2065,7 +2063,7 @@ const device_t i430vx_device = {
.init = i4x0_init,
.close = i4x0_close,
.reset = i4x0_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -2079,7 +2077,7 @@ const device_t i430tx_device = {
.init = i4x0_init,
.close = i4x0_close,
.reset = i4x0_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -2093,7 +2091,7 @@ const device_t i440fx_device = {
.init = i4x0_init,
.close = i4x0_close,
.reset = i4x0_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -2107,7 +2105,7 @@ const device_t i440lx_device = {
.init = i4x0_init,
.close = i4x0_close,
.reset = i4x0_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -2121,7 +2119,7 @@ const device_t i440ex_device = {
.init = i4x0_init,
.close = i4x0_close,
.reset = i4x0_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -2135,7 +2133,7 @@ const device_t i440bx_device = {
.init = i4x0_init,
.close = i4x0_close,
.reset = i4x0_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -2149,7 +2147,7 @@ const device_t i440bx_no_agp_device = {
.init = i4x0_init,
.close = i4x0_close,
.reset = i4x0_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -2163,7 +2161,7 @@ const device_t i440gx_device = {
.init = i4x0_init,
.close = i4x0_close,
.reset = i4x0_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -2177,7 +2175,7 @@ const device_t i440zx_device = {
.init = i4x0_init,
.close = i4x0_close,
.reset = i4x0_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

5
src/chipset/intel_82335.c
View File

@@ -171,8 +171,7 @@ intel_82335_close(void *priv)
static void *
intel_82335_init(UNUSED(const device_t *info))
{
intel_82335_t *dev = (intel_82335_t *) malloc(sizeof(intel_82335_t));
memset(dev, 0, sizeof(intel_82335_t));
intel_82335_t *dev = (intel_82335_t *) calloc(1, sizeof(intel_82335_t));
memset(dev->regs, 0, sizeof(dev->regs));
@@ -209,7 +208,7 @@ const device_t intel_82335_device = {
.init = intel_82335_init,
.close = intel_82335_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

6
src/chipset/intel_i450kx.c
View File

@@ -799,8 +799,8 @@ i450kx_close(void *priv)
static void *
i450kx_init(UNUSED(const device_t *info))
{
i450kx_t *dev = (i450kx_t *) malloc(sizeof(i450kx_t));
memset(dev, 0, sizeof(i450kx_t));
i450kx_t *dev = (i450kx_t *) calloc(1, sizeof(i450kx_t));
pci_add_card(PCI_ADD_NORTHBRIDGE, pb_read, pb_write, dev, &dev->pb_slot); /* Device 19h: Intel 450KX PCI Bridge PB */
pci_add_card(PCI_ADD_NORTHBRIDGE_SEC, mc_read, mc_write, dev, &dev->mc_slot); /* Device 14h: Intel 450KX Memory Controller MC */
@@ -824,7 +824,7 @@ const device_t i450kx_device = {
.init = i450kx_init,
.close = i450kx_close,
.reset = i450kx_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

23
src/chipset/intel_piix.c
View File

@@ -599,9 +599,9 @@ piix_write(int func, int addr, uint8_t val, void *priv)
pci_set_mirq_routing(PCI_MIRQ0 + (addr & 0x01), val & 0xf);
if (dev->type == 3) {
if (val & 0x20)
sff_set_irq_mode(dev->bm[1], IRQ_MODE_MIRQ_0);
else
sff_set_irq_mode(dev->bm[1], IRQ_MODE_LEGACY);
else
sff_set_irq_mode(dev->bm[1], IRQ_MODE_MIRQ_0);
}
piix_log("MIRQ%i is %s\n", addr & 0x01, (val & 0x20) ? "disabled" : "enabled");
}
@@ -1538,8 +1538,7 @@ piix_speed_changed(void *priv)
static void *
piix_init(const device_t *info)
{
piix_t *dev = (piix_t *) malloc(sizeof(piix_t));
memset(dev, 0, sizeof(piix_t));
piix_t *dev = (piix_t *) calloc(1, sizeof(piix_t));
dev->type = info->local & 0x0f;
/* If (dev->type == 4) and (dev->rev & 0x08), then this is PIIX4E. */
@@ -1674,7 +1673,7 @@ const device_t piix_device = {
.init = piix_init,
.close = piix_close,
.reset = piix_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = piix_speed_changed,
.force_redraw = NULL,
.config = NULL
@@ -1688,7 +1687,7 @@ const device_t piix_no_mirq_device = {
.init = piix_init,
.close = piix_close,
.reset = piix_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = piix_speed_changed,
.force_redraw = NULL,
.config = NULL
@@ -1702,7 +1701,7 @@ const device_t piix_rev02_device = {
.init = piix_init,
.close = piix_close,
.reset = piix_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = piix_speed_changed,
.force_redraw = NULL,
.config = NULL
@@ -1716,7 +1715,7 @@ const device_t piix3_device = {
.init = piix_init,
.close = piix_close,
.reset = piix_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = piix_speed_changed,
.force_redraw = NULL,
.config = NULL
@@ -1730,7 +1729,7 @@ const device_t piix3_ioapic_device = {
.init = piix_init,
.close = piix_close,
.reset = piix_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = piix_speed_changed,
.force_redraw = NULL,
.config = NULL
@@ -1744,7 +1743,7 @@ const device_t piix4_device = {
.init = piix_init,
.close = piix_close,
.reset = piix_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = piix_speed_changed,
.force_redraw = NULL,
.config = NULL
@@ -1758,7 +1757,7 @@ const device_t piix4e_device = {
.init = piix_init,
.close = piix_close,
.reset = piix_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = piix_speed_changed,
.force_redraw = NULL,
.config = NULL
@@ -1772,7 +1771,7 @@ const device_t slc90e66_device = {
.init = piix_init,
.close = piix_close,
.reset = piix_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = piix_speed_changed,
.force_redraw = NULL,
.config = NULL

7
src/chipset/intel_sio.c
View File

@@ -508,8 +508,7 @@ sio_speed_changed(void *priv)
static void *
sio_init(const device_t *info)
{
sio_t *dev = (sio_t *) malloc(sizeof(sio_t));
memset(dev, 0, sizeof(sio_t));
sio_t *dev = (sio_t *) calloc(1, sizeof(sio_t));
pci_add_card(PCI_ADD_SOUTHBRIDGE, sio_read, sio_write, dev, &dev->pci_slot);
@@ -568,7 +567,7 @@ const device_t sio_device = {
.init = sio_init,
.close = sio_close,
.reset = sio_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = sio_speed_changed,
.force_redraw = NULL,
.config = NULL
@@ -582,7 +581,7 @@ const device_t sio_zb_device = {
.init = sio_init,
.close = sio_close,
.reset = sio_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = sio_speed_changed,
.force_redraw = NULL,
.config = NULL

572
src/chipset/neat.c
View File

@@ -37,6 +37,9 @@
#define EMS_MAXPAGE 4
#define EMS_PGSIZE 16384
#define EMS_PGMASK 16383
#define REG_MASK 0x0f
/* CS8221 82C211 controller registers. */
#define REG_RA0 0x60 /* PROCCLK selector */
@@ -194,37 +197,54 @@
#define RB10_P0EXT 0xc0 /* page 0 extension */
#define RB10_P0EXT_SH 6
#define REG_RB11 0x6f /* Miscellaneous */
#define RB11_MASK 0xe6 /* 111R R11R */
#define RB11_GA20 0x02 /* gate for A20 */
#define RB11_RASTMO 0x04 /* enable RAS timeout counter */
#define RB11_EMSLEN 0xe0 /* EMS memory chunk size */
#define RB11_EMSLEN_SH 5
#define REG_RB12 0x6f /* Miscellaneous */
#define RB12_MASK 0xe6 /* 111R R11R */
#define RB12_GA20 0x02 /* gate for A20 */
#define RB12_RASTMO 0x04 /* enable RAS timeout counter */
#define RB12_EMSLEN 0xe0 /* EMS memory chunk size */
#define RB12_EMSLEN_SH 5
typedef struct emspage_t {
int8_t enabled; /* 1=ENABLED */
#define MEM_FLAG_REMAP 0x10
#define MEM_FLAG_EMS 0x08
#define MEM_FLAG_ROMCS 0x04
#define MEM_FLAG_READ 0x02
#define MEM_FLAG_WRITE 0x01
#define MEM_FMASK_REMAP 0x10
#define MEM_FMASK_EMS 0x08
#define MEM_FMASK_SHADOW 0x07
typedef struct ram_page_t {
int8_t enabled; /* 1=ENABLED */
char pad;
uint16_t page; /* selected page in EMS block */
uint32_t start; /* start of EMS in RAM */
uint8_t *addr; /* start addr in EMS RAM */
mem_mapping_t mapping; /* mapping entry for page */
} emspage_t;
uint32_t phys_base;
uint32_t virt_base;
mem_mapping_t mapping; /* mapping entry for page */
} ram_page_t;
typedef struct neat_t {
uint8_t regs[128]; /* all the CS8221 registers */
uint8_t indx; /* programmed index into registers */
uint8_t mem_flags[32];
uint8_t regs[128]; /* all the CS8221 registers */
uint8_t indx; /* programmed index into registers */
char pad;
char pad;
uint16_t ems_base; /* configured base address */
uint16_t ems_oldbase;
uint32_t ems_frame; /* configured frame address */
uint32_t ems_oldframe;
uint16_t ems_size; /* EMS size in KB */
uint16_t ems_pages; /* EMS size in pages */
emspage_t ems[EMS_MAXPAGE]; /* EMS page registers */
uint16_t ems_base; /* configured base address */
uint32_t ems_frame; /* configured frame address */
uint16_t ems_size; /* EMS size in KB */
uint16_t ems_pages; /* EMS size in pages */
uint32_t remap_base;
ram_page_t ems[EMS_MAXPAGE]; /* EMS page registers */
ram_page_t shadow[32]; /* Shadow RAM pages */
} neat_t;
static uint8_t defaults[16] = { 0x0a, 0x45, 0xfc, 0x00, 0x00, 0xfe, 0x00, 0x00,
0x00, 0x00, 0xa0, 0x63, 0x10, 0x00, 0x00, 0x12 };
static uint8_t masks[4] = { RB10_P0EXT, RB10_P1EXT, RB10_P2EXT, RB10_P3EXT };
static uint8_t shifts[4] = { RB10_P0EXT_SH, RB10_P1EXT_SH, RB10_P2EXT_SH, RB10_P3EXT_SH };
#ifdef ENABLE_NEAT_LOG
int neat_do_log = ENABLE_NEAT_LOG;
@@ -247,12 +267,19 @@ neat_log(const char *fmt, ...)
static uint8_t
ems_readb(uint32_t addr, void *priv)
{
neat_t *dev = (neat_t *) priv;
uint8_t ret = 0xff;
ram_page_t *dev = (ram_page_t *) priv;
uint8_t ret = 0xff;
#ifdef ENABLE_NEAT_LOG
uint32_t old = addr;
#endif
/* Grab the data. */
ret = *(uint8_t *) (dev->ems[(addr & 0xffff) >> 14].addr + (addr & 0x3fff));
addr = addr - dev->virt_base + dev->phys_base;
if (addr < (mem_size << 10))
ret = *(uint8_t *) &(ram[addr]);
neat_log("[R08] %08X -> %08X (%08X): ret = %02X\n", old, addr, (mem_size << 10), ret);
return ret;
}
@@ -260,12 +287,19 @@ ems_readb(uint32_t addr, void *priv)
static uint16_t
ems_readw(uint32_t addr, void *priv)
{
neat_t *dev = (neat_t *) priv;
uint16_t ret = 0xffff;
ram_page_t *dev = (ram_page_t *) priv;
uint16_t ret = 0xffff;
#ifdef ENABLE_NEAT_LOG
uint32_t old = addr;
#endif
/* Grab the data. */
ret = *(uint16_t *) (dev->ems[(addr & 0xffff) >> 14].addr + (addr & 0x3fff));
addr = addr - dev->virt_base + dev->phys_base;
if (addr < (mem_size << 10))
ret = *(uint16_t *) &(ram[addr]);
neat_log("[R16] %08X -> %08X (%08X): ret = %04X\n", old, addr, (mem_size << 10), ret);
return ret;
}
@@ -273,40 +307,144 @@ ems_readw(uint32_t addr, void *priv)
static void
ems_writeb(uint32_t addr, uint8_t val, void *priv)
{
neat_t *dev = (neat_t *) priv;
ram_page_t *dev = (ram_page_t *) priv;
#ifdef ENABLE_NEAT_LOG
uint32_t old = addr;
#endif
/* Write the data. */
*(uint8_t *) (dev->ems[(addr & 0xffff) >> 14].addr + (addr & 0x3fff)) = val;
addr = addr - dev->virt_base + dev->phys_base;
neat_log("[W08] %08X -> %08X (%08X): val = %02X\n", old, addr, (mem_size << 10), val);
if (addr < (mem_size << 10))
*(uint8_t *) &(ram[addr]) = val;
}
/* Write one word to paged RAM. */
static void
ems_writew(uint32_t addr, uint16_t val, void *priv)
{
neat_t *dev = (neat_t *) priv;
ram_page_t *dev = (ram_page_t *) priv;
#ifdef ENABLE_NEAT_LOG
uint32_t old = addr;
#endif
/* Write the data. */
*(uint16_t *) (dev->ems[(addr & 0xffff) >> 14].addr + (addr & 0x3fff)) = val;
addr = addr - dev->virt_base + dev->phys_base;
neat_log("[W16] %08X -> %08X (%08X): val = %04X\n", old, addr, (mem_size << 10), val);
if (addr < (mem_size << 10))
*(uint16_t *) &(ram[addr]) = val;
}
static void
neat_mem_update_state(neat_t *dev, uint32_t addr, uint32_t size, uint8_t new_flags, uint8_t mask)
{
if ((addr >= 0x00080000) && (addr < 0x00100000) &&
((new_flags ^ dev->mem_flags[(addr - 0x00080000) / EMS_PGSIZE]) & mask)) {
dev->mem_flags[(addr - 0x00080000) / EMS_PGSIZE] &= ~mask;
dev->mem_flags[(addr - 0x00080000) / EMS_PGSIZE] |= new_flags;
new_flags = dev->mem_flags[(addr - 0x00080000) / EMS_PGSIZE];
if (new_flags & MEM_FLAG_ROMCS) {
neat_log("neat_mem_update_state(): %08X-%08X: %02X (ROMCS)\n", addr, addr + size - 1, new_flags);
mem_set_mem_state(addr, size, MEM_READ_ROMCS | MEM_WRITE_ROMCS);
} else if (new_flags & MEM_FLAG_REMAP) {
neat_log("neat_mem_update_state(): %08X-%08X: %02X (REMAP)\n", addr, addr + size - 1, new_flags);
mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
} else if (new_flags & MEM_FLAG_EMS) {
neat_log("neat_mem_update_state(): %08X-%08X: %02X (EMS)\n", addr, addr + size - 1, new_flags);
mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
} else switch (new_flags & (MEM_FLAG_READ | MEM_FLAG_WRITE)) {
case 0:
neat_log("neat_mem_update_state(): %08X-%08X: %02X (RE | WE)\n", addr, addr + size - 1, new_flags);
mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
break;
case 1:
neat_log("neat_mem_update_state(): %08X-%08X: %02X (RE | WI)\n", addr, addr + size - 1, new_flags);
mem_set_mem_state(addr, size, MEM_READ_EXTERNAL | MEM_WRITE_INTERNAL);
break;
case 2:
neat_log("neat_mem_update_state(): %08X-%08X: %02X (RI | WE)\n", addr, addr + size - 1, new_flags);
mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_EXTERNAL);
break;
case 3:
neat_log("neat_mem_update_state(): %08X-%08X: %02X (RI | WI)\n", addr, addr + size - 1, new_flags);
mem_set_mem_state(addr, size, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
break;
default:
break;
}
}
flushmmucache_nopc();
}
static void
shadow_recalc(neat_t *dev)
{
for (uint8_t i = 8; i < 32; i++) {
int romcs = 0;
int write = 1;
int shadow_reg = REG_RB3 + ((i - 8) >> 3);
int shadow_bit = i & 7;
int mem_flags;
int read;
if (i >= 16) {
int rb1_romcs_bit = 7 - (i >> 2);
int rb1_write_bit = rb1_romcs_bit + 4;
romcs = !(dev->regs[REG_RB1] & (1 << rb1_romcs_bit));
write = !(dev->regs[REG_RB1] & (1 << rb1_write_bit));
neat_log("Shadow %08X-%08X: [%02X, %02X] %02X:%02X, %02X, %02X\n",
dev->shadow[i].virt_base, dev->shadow[i].virt_base + EMS_PGSIZE - 1,
dev->regs[REG_RB1], dev->regs[shadow_reg],
shadow_reg, shadow_bit,
rb1_romcs_bit, rb1_write_bit);
} else {
shadow_bit ^= 4;
neat_log("Shadow %08X-%08X: [--, %02X] %02X:%02X, shadow bit ^= 4\n",
dev->shadow[i].virt_base, dev->shadow[i].virt_base + EMS_PGSIZE - 1,
dev->regs[shadow_reg],
shadow_reg, shadow_bit);
}
read = dev->regs[shadow_reg] & (1 << shadow_bit);
write = write && read;
mem_flags = romcs ? MEM_FLAG_ROMCS : 0x00;
mem_flags |= read ? MEM_FLAG_READ : 0x00;
mem_flags |= write ? MEM_FLAG_WRITE : 0x00;
if ((mem_flags > 0x00) && !(mem_flags & MEM_FLAG_ROMCS))
mem_mapping_set_addr(&(dev->shadow[i].mapping), dev->shadow[i].virt_base, EMS_PGSIZE);
else
mem_mapping_disable(&(dev->shadow[i].mapping));
neat_mem_update_state(dev, dev->shadow[i].virt_base, EMS_PGSIZE, mem_flags, MEM_FMASK_SHADOW);
}
}
/* Re-calculate the active-page physical address. */
static void
ems_recalc(neat_t *dev, emspage_t *ems)
ems_recalc(neat_t *dev, ram_page_t *ems)
{
if (ems->page >= dev->ems_pages) {
/* That page does not exist. */
ems->enabled = 0;
}
uint32_t page = ems->phys_base / EMS_PGSIZE;
/* Pre-calculate the page address in EMS RAM. */
ems->addr = ram + ems->start + (ems->page * EMS_PGSIZE);
neat_log("ems_recalc(): %08X, %04X, %04X\n", ems->virt_base, page, dev->ems_pages);
if ((dev->regs[REG_RB7] & RB7_EMSEN) && ems->enabled && (page < dev->ems_pages)) {
neat_log("ems_recalc(): %08X-%08X -> %08X-%08X\n",
ems->virt_base, ems->virt_base + EMS_PGSIZE - 1,
ems->phys_base, ems->phys_base + EMS_PGSIZE - 1);
mem_mapping_set_addr(&ems->mapping, ems->virt_base, EMS_PGSIZE);
if (ems->enabled) {
/* Update the EMS RAM address for this page. */
mem_mapping_set_exec(&ems->mapping, ems->addr);
mem_mapping_set_exec(&ems->mapping, ram + ems->phys_base);
/* Enable this page. */
mem_mapping_enable(&ems->mapping);
neat_mem_update_state(dev, ems->virt_base, EMS_PGSIZE, MEM_FLAG_EMS, MEM_FMASK_EMS);
#if NEAT_DEBUG > 1
neat_log("NEAT EMS: page %d set to %08lx, %sabled)\n",
@@ -315,15 +453,21 @@ ems_recalc(neat_t *dev, emspage_t *ems)
} else {
/* Disable this page. */
mem_mapping_disable(&ems->mapping);
neat_mem_update_state(dev, ems->virt_base, EMS_PGSIZE, 0x00, MEM_FMASK_EMS);
}
}
static void
ems_write(uint16_t port, uint8_t val, void *priv)
{
neat_t *dev = (neat_t *) priv;
emspage_t *ems;
int vpage;
neat_t *dev = (neat_t *) priv;
ram_page_t *ems;
int vpage;
int8_t old_enabled;
uint32_t old_phys_base;
int8_t new_enabled;
uint32_t new_phys_base;
#if NEAT_DEBUG > 1
neat_log("NEAT: ems_write(%04x, %02x)\n", port, val);
@@ -333,13 +477,29 @@ ems_write(uint16_t port, uint8_t val, void *priv)
vpage = (port / EMS_PGSIZE);
ems = &dev->ems[vpage];
neat_log("Port: %04X, val: %02X\n", port, val);
switch (port & 0x000f) {
case 0x0008:
case 0x0009:
ems->enabled = !!(val & 0x80);
ems->page &= 0x0180; /* clear lower bits */
ems->page |= (val & 0x7f); /* add new bits */
ems_recalc(dev, ems);
old_enabled = ems->enabled;
old_phys_base = ems->phys_base;
new_enabled = !!(val & 0x80);
new_phys_base = (ems->phys_base & 0xffe00000) | ((val & 0x7f) * EMS_PGSIZE);
if ((old_enabled != new_enabled) || (old_phys_base != new_phys_base)) {
if (old_enabled && (old_enabled == new_enabled)) {
ems->enabled = 0;
ems_recalc(dev, ems);
}
ems->enabled = !!(val & 0x80);
if (old_phys_base != new_phys_base)
ems->phys_base = (ems->phys_base & 0xffe00000) | ((val & 0x7f) * EMS_PGSIZE);
ems_recalc(dev, ems);
}
break;
default:
break;
@@ -358,7 +518,7 @@ ems_read(uint16_t port, void *priv)
switch (port & 0x000f) {
case 0x0008: /* page number register */
ret = dev->ems[vpage].page & 0x7f;
ret = (dev->ems[vpage].phys_base / EMS_PGSIZE) & 0x7f;
if (dev->ems[vpage].enabled)
ret |= 0x80;
break;
@@ -366,6 +526,8 @@ ems_read(uint16_t port, void *priv)
break;
}
neat_log("Port: %04X, ret: %02X\n", port, ret);
#if NEAT_DEBUG > 1
neat_log("NEAT: ems_read(%04x) = %02x\n", port, ret);
#endif
@@ -373,68 +535,85 @@ ems_read(uint16_t port, void *priv)
return ret;
}
/* Initialize the EMS module. */
static void
ems_init(neat_t *dev, int en)
ems_recalc_all(neat_t *dev)
{
uint8_t j;
for (uint8_t i = 0; i < EMS_MAXPAGE; i++)
ems_recalc(dev, &(dev->ems[i]));
}
/* Remove if needed. */
if (!en) {
if (dev->ems_base > 0)
for (uint8_t i = 0; i < EMS_MAXPAGE; i++) {
/* Disable for now. */
mem_mapping_disable(&dev->ems[i].mapping);
static void
ems_update_virt_base(neat_t *dev)
{
for (uint8_t i = 0; i < EMS_MAXPAGE; i++)
dev->ems[i].virt_base = dev->ems_frame + (i * EMS_PGSIZE);
}
/* Remove I/O handler. */
io_removehandler(dev->ems_base + (i * EMS_PGSIZE), 2,
ems_read, NULL, NULL, ems_write, NULL, NULL, dev);
}
#ifdef ENABLE_NEAT_LOG
neat_log("NEAT: EMS disabled\n");
#endif
return;
}
/* Get configured I/O address. */
j = (dev->regs[REG_RB9] & RB9_BASE) >> RB9_BASE_SH;
dev->ems_base = 0x0208 + (0x10 * j);
/* Get configured frame address. */
j = (dev->regs[REG_RB9] & RB9_FRAME) >> RB9_FRAME_SH;
dev->ems_frame = 0xC0000 + (EMS_PGSIZE * j);
/*
* For each supported page (we can have a maximum of 4),
* create, initialize and disable the mappings, and set
* up the I/O control handler.
*/
static void
ems_remove_handlers(neat_t *dev)
{
for (uint8_t i = 0; i < EMS_MAXPAGE; i++) {
/* Create and initialize a page mapping. */
mem_mapping_add(&dev->ems[i].mapping,
dev->ems_frame + (EMS_PGSIZE * i), EMS_PGSIZE,
ems_readb, ems_readw, NULL,
ems_writeb, ems_writew, NULL,
ram, MEM_MAPPING_EXTERNAL,
dev);
/* Disable for now. */
mem_mapping_disable(&dev->ems[i].mapping);
neat_log("Removing I/O handler at %04X-%04X\n",
dev->ems_base + (i * EMS_PGSIZE), dev->ems_base + (i * EMS_PGSIZE) + 1);
/* Clean up any previous I/O port handler. */
io_removehandler(dev->ems_base + (i * EMS_PGSIZE), 2,
ems_read, NULL, NULL, ems_write, NULL, NULL, dev);
}
}
static void
ems_set_handlers(neat_t *dev)
{
for (uint8_t i = 0; i < EMS_MAXPAGE; i++) {
neat_log("Setting up I/O handler at %04X-%04X\n",
dev->ems_base + (i * EMS_PGSIZE), dev->ems_base + (i * EMS_PGSIZE) + 1);
/* Set up an I/O port handler. */
io_sethandler(dev->ems_base + (i * EMS_PGSIZE), 2,
ems_read, NULL, NULL, ems_write, NULL, NULL, dev);
/*
* TODO: update the 'high_mem' mapping to reflect that we now
* have NN MB less extended memory available..
*/
}
neat_log("NEAT: EMS enabled, I/O=%04xH, Frame=%05XH\n",
dev->ems_base, dev->ems_frame);
ems_recalc_all(dev);
}
static void
remap_update_states(neat_t *dev, uint8_t flag)
{
for (uint8_t i = 0; i < 24; i++)
neat_mem_update_state(dev, 0x000a0000 + (i * EMS_PGSIZE), EMS_PGSIZE, flag, MEM_FMASK_REMAP);
}
static void
remap_update(neat_t *dev, uint8_t val)
{
if (dev->regs[REG_RB7] & RB7_UMAREL) {
mem_remap_top_ex_nomid(0, (dev->remap_base >= 1024) ? dev->remap_base : 1024);
remap_update_states(dev, 0x00);
neat_log("0 kB at %08X\n", ((dev->remap_base >= 1024) ? dev->remap_base : 1024) << 10);
}
if (val & RB7_EMSEN)
dev->remap_base = mem_size - dev->ems_size;
else
dev->remap_base = mem_size;
neat_log("Total contiguous memory now: %i kB\n", dev->remap_base);
if (dev->remap_base >= 640)
mem_mapping_set_addr(&ram_low_mapping, 0x00000000, 0x000a0000);
else
mem_mapping_set_addr(&ram_low_mapping, 0x00000000, dev->remap_base << 10);
if (dev->remap_base > 1024)
mem_mapping_set_addr(&ram_high_mapping, 0x00100000, (dev->remap_base << 10) - 0x00100000);
else
mem_mapping_disable(&ram_high_mapping);
if (val & RB7_UMAREL) {
mem_remap_top_ex_nomid(384, (dev->remap_base >= 1024) ? dev->remap_base : 1024);
remap_update_states(dev, MEM_FLAG_REMAP);
neat_log("384 kB at %08X\n", ((dev->remap_base >= 1024) ? dev->remap_base : 1024) << 10);
}
}
static void
@@ -442,6 +621,7 @@ neat_write(uint16_t port, uint8_t val, void *priv)
{
neat_t *dev = (neat_t *) priv;
uint8_t xval;
uint8_t j;
uint8_t *reg;
int i;
@@ -461,6 +641,8 @@ neat_write(uint16_t port, uint8_t val, void *priv)
case REG_RA0:
val &= RA0_MASK;
*reg = (*reg & ~RA0_MASK) | val | (RA0_REV_ID << RA0_REV_SH);
if ((xval & 0x20) && (val & 0x20))
outb(0x64, 0xfe);
#if NEAT_DEBUG > 1
neat_log("NEAT: RA0=%02x(%02x)\n", val, *reg);
#endif
@@ -493,6 +675,7 @@ neat_write(uint16_t port, uint8_t val, void *priv)
case REG_RB1:
val &= RB1_MASK;
*reg = (*reg & ~RB1_MASK) | val;
shadow_recalc(dev);
#if NEAT_DEBUG > 1
neat_log("NEAT: RB1=%02x(%02x)\n", val, *reg);
#endif
@@ -501,6 +684,10 @@ neat_write(uint16_t port, uint8_t val, void *priv)
case REG_RB2:
val &= RB2_MASK;
*reg = (*reg & ~RB2_MASK) | val;
if (val & RB2_TOP128)
neat_mem_update_state(dev, 0x00080000, 0x00020000, MEM_FLAG_READ | MEM_FLAG_WRITE, MEM_FMASK_SHADOW);
else
neat_mem_update_state(dev, 0x00080000, 0x00020000, 0x00, MEM_FMASK_SHADOW);
#if NEAT_DEBUG > 1
neat_log("NEAT: RB2=%02x(%02x)\n", val, *reg);
#endif
@@ -509,6 +696,7 @@ neat_write(uint16_t port, uint8_t val, void *priv)
case REG_RB3:
val &= RB3_MASK;
*reg = (*reg & ~RB3_MASK) | val;
shadow_recalc(dev);
#if NEAT_DEBUG > 1
neat_log("NEAT: RB3=%02x(%02x)\n", val, *reg);
#endif
@@ -517,6 +705,7 @@ neat_write(uint16_t port, uint8_t val, void *priv)
case REG_RB4:
val &= RB4_MASK;
*reg = (*reg & ~RB4_MASK) | val;
shadow_recalc(dev);
#if NEAT_DEBUG > 1
neat_log("NEAT: RB4=%02x(%02x)\n", val, *reg);
#endif
@@ -525,6 +714,7 @@ neat_write(uint16_t port, uint8_t val, void *priv)
case REG_RB5:
val &= RB5_MASK;
*reg = (*reg & ~RB5_MASK) | val;
shadow_recalc(dev);
#if NEAT_DEBUG > 1
neat_log("NEAT: RB5=%02x(%02x)\n", val, *reg);
#endif
@@ -540,21 +730,21 @@ neat_write(uint16_t port, uint8_t val, void *priv)
case REG_RB7:
val &= RB7_MASK;
*reg = val;
if (xval & (RB7_EMSEN | RB7_UMAREL))
remap_update(dev, val);
dev->regs[REG_RB7] = val;
if (xval & RB7_EMSEN)
ems_remove_handlers(dev);
if ((xval & RB7_EMSEN) && (val & RB7_EMSEN))
ems_set_handlers(dev);
#if NEAT_DEBUG > 1
neat_log("NEAT: RB7=%02x(%02x)\n", val, *reg);
#endif
if (val & RB7_EMSEN)
ems_init(dev, 1);
else if (xval & RB7_EMSEN)
ems_init(dev, 0);
if (xval & RB7_UMAREL) {
if (val & RB7_UMAREL)
mem_remap_top(384);
else
mem_remap_top(0);
}
break;
case REG_RB8:
@@ -571,10 +761,21 @@ neat_write(uint16_t port, uint8_t val, void *priv)
#if NEAT_DEBUG > 1
neat_log("NEAT: RB9=%02x(%02x)\n", val, *reg);
#endif
if (dev->regs[REG_RB7] & RB7_EMSEN) {
ems_init(dev, 0);
ems_init(dev, 1);
}
ems_remove_handlers(dev);
/* Get configured I/O address. */
j = (dev->regs[REG_RB9] & RB9_BASE) >> RB9_BASE_SH;
dev->ems_base = 0x0208 + (0x10 * j);
/* Get configured frame address. */
j = (dev->regs[REG_RB9] & RB9_FRAME) >> RB9_FRAME_SH;
dev->ems_frame = 0xc0000 + (EMS_PGSIZE * j);
ems_update_virt_base(dev);
if (dev->regs[REG_RB7] & RB7_EMSEN)
ems_set_handlers(dev);
break;
case REG_RB10:
@@ -584,23 +785,43 @@ neat_write(uint16_t port, uint8_t val, void *priv)
neat_log("NEAT: RB10=%02x(%02x)\n", val, *reg);
#endif
dev->ems[3].start = ((val & RB10_P3EXT) >> RB10_P3EXT_SH) << 21;
dev->ems[2].start = ((val & RB10_P2EXT) >> RB10_P2EXT_SH) << 21;
dev->ems[1].start = ((val & RB10_P1EXT) >> RB10_P1EXT_SH) << 21;
dev->ems[0].start = ((val & RB10_P0EXT) >> RB10_P0EXT_SH) << 21;
for (i = 0; i < EMS_MAXPAGE; i++)
ems_recalc(dev, &dev->ems[i]);
for (uint8_t i = 0; i < EMS_MAXPAGE; i++) {
ram_page_t *ems = &(dev->ems[i]);
uint32_t old_phys_base = ems->phys_base & 0xffe00000;
uint32_t new_phys_base = (((val & masks[i]) >> shifts[i]) << 21);
if (new_phys_base != old_phys_base) {
int8_t old_enabled = ems->enabled;
if ((dev->regs[REG_RB7] & RB7_EMSEN) && old_enabled) {
ems->enabled = 0;
ems_recalc(dev, &(dev->ems[i]));
}
ems->phys_base = ems->phys_base - old_phys_base + new_phys_base;
if ((dev->regs[REG_RB7] & RB7_EMSEN) && old_enabled) {
ems->enabled = old_enabled;
ems_recalc(dev, &(dev->ems[i]));
}
}
}
neat_log("%08X, %08X, %08X, %08X\n",
dev->ems[0].phys_base, dev->ems[1].phys_base,
dev->ems[2].phys_base, dev->ems[3].phys_base);
break;
case REG_RB11:
val &= RB11_MASK;
*reg = (*reg & ~RB11_MASK) | val;
case REG_RB12:
val &= RB12_MASK;
*reg = (*reg & ~RB12_MASK) | val;
#if NEAT_DEBUG > 1
neat_log("NEAT: RB11=%02x(%02x)\n", val, *reg);
neat_log("NEAT: RB12=%02x(%02x)\n", val, *reg);
#endif
i = (val & RB11_EMSLEN) >> RB11_EMSLEN_SH;
i = (val & RB12_EMSLEN) >> RB12_EMSLEN_SH;
switch (i) {
case 0: /* "less than 2MB" */
case 0: /* "less than 1MB" */
dev->ems_size = 512;
break;
@@ -616,11 +837,16 @@ neat_write(uint16_t port, uint8_t val, void *priv)
default:
break;
}
dev->ems_pages = (dev->ems_size << 10) / EMS_PGSIZE;
if (dev->regs[REG_RB7] & RB7_EMSEN) {
neat_log("NEAT: EMS %iKB (%i pages)\n",
dev->ems_size, dev->ems_pages);
remap_update(dev, dev->regs[REG_RB7]);
neat_log("NEAT: EMS %iKB\n",
dev->ems_size);
}
mem_a20_key = val & RB12_GA20;
mem_a20_recalc();
break;
default:
@@ -629,6 +855,7 @@ neat_write(uint16_t port, uint8_t val, void *priv)
break;
}
break;
default:
break;
}
@@ -646,8 +873,10 @@ neat_read(uint16_t port, void *priv)
break;
case 0x23:
if ((dev->indx >= 0x60) && (dev->indx <= 0x6f))
if ((dev->indx >= 0x60) && (dev->indx <= 0x6e))
ret = dev->regs[dev->indx];
else if (dev->indx == 0x6f)
ret = (dev->regs[dev->indx] & 0xfd) | (mem_a20_key & 2);
break;
default:
@@ -674,16 +903,75 @@ neat_init(UNUSED(const device_t *info))
{
neat_t *dev;
uint8_t dram_mode = 0;
uint8_t i;
uint8_t j;
/* Create an instance. */
dev = (neat_t *) malloc(sizeof(neat_t));
memset(dev, 0x00, sizeof(neat_t));
dev = (neat_t *) calloc(1, sizeof(neat_t));
/* Get configured I/O address. */
j = (dev->regs[REG_RB9] & RB9_BASE) >> RB9_BASE_SH;
dev->ems_base = 0x0208 + (0x10 * j);
/* Get configured frame address. */
j = (dev->regs[REG_RB9] & RB9_FRAME) >> RB9_FRAME_SH;
dev->ems_frame = 0xc0000 + (EMS_PGSIZE * j);
ems_update_virt_base(dev);
dev->ems_pages = (mem_size << 10) / EMS_PGSIZE;
dev->remap_base = mem_size;
mem_mapping_disable(&ram_mid_mapping);
for (int i = 0; i < 24; i++) {
if (i >= 20)
neat_mem_update_state(dev, 0x000a0000 + (i * EMS_PGSIZE), EMS_PGSIZE, MEM_FLAG_ROMCS, MEM_FMASK_SHADOW);
else {
/* This is needed to actually trigger an update. */
dev->mem_flags[i + 8] = MEM_FLAG_ROMCS;
neat_mem_update_state(dev, 0x000a0000 + (i * EMS_PGSIZE), EMS_PGSIZE, 0x00, MEM_FMASK_SHADOW);
}
}
/*
* For each supported page (we can have a maximum of 4),
* create, initialize and disable the mappings, and set
* up the I/O control handler.
*/
for (uint8_t i = 0; i < EMS_MAXPAGE; i++) {
/* Create and initialize a page mapping. */
mem_mapping_add(&dev->ems[i].mapping,
0x00000000, 0x00000000,
ems_readb, ems_readw, NULL,
ems_writeb, ems_writew, NULL,
ram + dev->ems[i].virt_base, MEM_MAPPING_INTERNAL,
&(dev->ems[i]));
/* Disable for now. */
mem_mapping_disable(&dev->ems[i].mapping);
}
for (uint8_t i = 0; i < 32; i++) {
dev->shadow[i].virt_base = dev->shadow[i].phys_base =
(i * EMS_PGSIZE) + 0x00080000;
dev->shadow[i].enabled = 1;
/* Create and initialize a page mapping. */
mem_mapping_add(&dev->shadow[i].mapping,
dev->shadow[i].virt_base, EMS_PGSIZE,
ems_readb, ems_readw, NULL,
ems_writeb, ems_writew, NULL,
ram + dev->shadow[i].virt_base, MEM_MAPPING_INTERNAL,
&(dev->shadow[i]));
/* Disable for now. */
mem_mapping_disable(&dev->shadow[i].mapping);
}
/* Initialize some of the registers to specific defaults. */
for (i = REG_RA0; i <= REG_RB11; i++) {
for (uint8_t i = REG_RA0; i <= REG_RB12; i++) {
dev->indx = i;
neat_write(0x0023, 0x00, dev);
neat_write(0x0023, defaults[i & REG_MASK], dev);
}
/*
@@ -817,7 +1105,7 @@ neat_init(UNUSED(const device_t *info))
neat_log("NEAT: **INVALID DRAM SIZE %iKB !**\n", mem_size);
}
if (dram_mode > 0) {
neat_log("NEAT: using DRAM mode #%i (mem=%iKB)\n", i, mem_size);
neat_log("NEAT: using DRAM mode #%i (mem=%iKB)\n", dram_mode, mem_size);
}
/* Set up an I/O handler for the chipset. */
@@ -835,7 +1123,7 @@ const device_t neat_device = {
.init = neat_init,
.close = neat_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

5
src/chipset/olivetti_eva.c
View File

@@ -134,8 +134,7 @@ olivetti_eva_close(void *priv)
static void *
olivetti_eva_init(UNUSED(const device_t *info))
{
olivetti_eva_t *dev = (olivetti_eva_t *) malloc(sizeof(olivetti_eva_t));
memset(dev, 0, sizeof(olivetti_eva_t));
olivetti_eva_t *dev = (olivetti_eva_t *) calloc(1, sizeof(olivetti_eva_t));
/* GA98 registers */
dev->reg_065 = 0x00;
@@ -171,7 +170,7 @@ const device_t olivetti_eva_device = {
.init = olivetti_eva_init,
.close = olivetti_eva_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

5
src/chipset/opti283.c
View File

@@ -284,8 +284,7 @@ opti283_close(void *priv)
static void *
opti283_init(UNUSED(const device_t *info))
{
opti283_t *dev = (opti283_t *) malloc(sizeof(opti283_t));
memset(dev, 0x00, sizeof(opti283_t));
opti283_t *dev = (opti283_t *) calloc(1, sizeof(opti283_t));
io_sethandler(0x0022, 0x0001, opti283_read, NULL, NULL, opti283_write, NULL, NULL, dev);
io_sethandler(0x0023, 0x0001, opti283_read, NULL, NULL, opti283_write, NULL, NULL, dev);
@@ -324,7 +323,7 @@ const device_t opti283_device = {
.init = opti283_init,
.close = opti283_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

5
src/chipset/opti291.c
View File

@@ -138,8 +138,7 @@ opti291_close(void *priv)
static void *
opti291_init(UNUSED(const device_t *info))
{
opti291_t *dev = (opti291_t *) malloc(sizeof(opti291_t));
memset(dev, 0, sizeof(opti291_t));
opti291_t *dev = (opti291_t *) calloc(1, sizeof(opti291_t));
io_sethandler(0x022, 0x0001, opti291_read, NULL, NULL, opti291_write, NULL, NULL, dev);
io_sethandler(0x024, 0x0001, opti291_read, NULL, NULL, opti291_write, NULL, NULL, dev);
@@ -161,7 +160,7 @@ const device_t opti291_device = {
.init = opti291_init,
.close = opti291_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

6
src/chipset/opti391.c
View File

@@ -374,7 +374,7 @@ const device_t opti381_device = {
.init = opti391_init,
.close = opti391_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -388,7 +388,7 @@ const device_t opti481_device = {
.init = opti391_init,
.close = opti391_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -402,7 +402,7 @@ const device_t opti391_device = {
.init = opti391_init,
.close = opti391_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

7
src/chipset/opti495.c
View File

@@ -219,8 +219,7 @@ opti495_close(void *priv)
static void *
opti495_init(const device_t *info)
{
opti495_t *dev = (opti495_t *) malloc(sizeof(opti495_t));
memset(dev, 0, sizeof(opti495_t));
opti495_t *dev = (opti495_t *) calloc(1, sizeof(opti495_t));
device_add(&port_92_device);
@@ -271,7 +270,7 @@ const device_t opti493_device = {
.init = opti495_init,
.close = opti495_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -285,7 +284,7 @@ const device_t opti495_device = {
.init = opti495_init,
.close = opti495_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

5
src/chipset/opti499.c
View File

@@ -242,8 +242,7 @@ opti499_close(void *priv)
static void *
opti499_init(UNUSED(const device_t *info))
{
opti499_t *dev = (opti499_t *) malloc(sizeof(opti499_t));
memset(dev, 0, sizeof(opti499_t));
opti499_t *dev = (opti499_t *) calloc(1, sizeof(opti499_t));
device_add(&port_92_device);
@@ -265,7 +264,7 @@ const device_t opti499_device = {
.init = opti499_init,
.close = opti499_close,
.reset = opti499_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

11
src/chipset/opti5x7.c
View File

@@ -35,7 +35,7 @@
typedef struct opti5x7_t {
uint8_t idx;
uint8_t is_pci;
uint8_t regs[16];
uint8_t regs[18];
} opti5x7_t;
#ifdef ENABLE_OPTI5X7_LOG
@@ -158,7 +158,7 @@ opti5x7_read(uint16_t addr, void *priv)
{
const opti5x7_t *dev = (opti5x7_t *) priv;
return (addr == 0x24) ? dev->regs[dev->idx] : 0xff;
return ((addr == 0x24) && (dev->idx < sizeof(dev->regs))) ? dev->regs[dev->idx] : 0xff;
}
static void
@@ -172,8 +172,7 @@ opti5x7_close(void *priv)
static void *
opti5x7_init(const device_t *info)
{
opti5x7_t *dev = (opti5x7_t *) malloc(sizeof(opti5x7_t));
memset(dev, 0, sizeof(opti5x7_t));
opti5x7_t *dev = (opti5x7_t *) calloc(1, sizeof(opti5x7_t));
dev->is_pci = info->local;
@@ -193,7 +192,7 @@ const device_t opti5x7_device = {
.init = opti5x7_init,
.close = opti5x7_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -207,7 +206,7 @@ const device_t opti5x7_pci_device = {
.init = opti5x7_init,
.close = opti5x7_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

4
src/chipset/opti602.c
View File

@@ -218,7 +218,7 @@ const device_t opti601_device = {
.init = opti602_init,
.close = opti602_close,
.reset = opti602_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -232,7 +232,7 @@ const device_t opti602_device = {
.init = opti602_init,
.close = opti602_close,
.reset = opti602_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

5
src/chipset/opti822.c
View File

@@ -394,8 +394,7 @@ opti822_close(void *priv)
static void *
opti822_init(UNUSED(const device_t *info))
{
opti822_t *dev = (opti822_t *) malloc(sizeof(opti822_t));
memset(dev, 0, sizeof(opti822_t));
opti822_t *dev = (opti822_t *) calloc(1, sizeof(opti822_t));
pci_add_card(PCI_ADD_NORTHBRIDGE, opti822_pci_read, opti822_pci_write, dev, &dev->pci_slot);
@@ -412,7 +411,7 @@ const device_t opti822_device = {
.init = opti822_init,
.close = opti822_close,
.reset = opti822_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

9
src/chipset/opti895.c
View File

@@ -259,8 +259,7 @@ opti895_close(void *priv)
static void *
opti895_init(const device_t *info)
{
opti895_t *dev = (opti895_t *) malloc(sizeof(opti895_t));
memset(dev, 0, sizeof(opti895_t));
opti895_t *dev = (opti895_t *) calloc(1, sizeof(opti895_t));
device_add(&port_92_device);
@@ -306,7 +305,7 @@ const device_t opti802g_device = {
.init = opti895_init,
.close = opti895_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -320,7 +319,7 @@ const device_t opti802g_pci_device = {
.init = opti895_init,
.close = opti895_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -334,7 +333,7 @@ const device_t opti895_device = {
.init = opti895_init,
.close = opti895_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

909
src/chipset/scamp.c
View File

File diff suppressed because it is too large Load Diff

28
src/chipset/scat.c
View File

@@ -1140,14 +1140,21 @@ scat_out(uint16_t port, uint8_t val, void *priv)
if (indx >= 24)
base_addr += 0x30000;
if ((base_addr >= 0x000a0000) && (base_addr < 0x00100000))
mem_set_mem_state(base_addr, 0x00004000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
if ((dev->regs[SCAT_EMS_CONTROL] & 0x80) && (dev->page[indx].regs_2x9 & 0x80)) {
virt_addr = get_addr(dev, base_addr, &dev->page[indx]);
if (virt_addr < ((uint32_t) mem_size << 10))
mem_mapping_set_exec(&dev->ems_mapping[indx], ram + virt_addr);
else
mem_mapping_set_exec(&dev->ems_mapping[indx], NULL);
flushmmucache();
if ((base_addr >= 0x000a0000) && (base_addr < 0x00100000))
mem_set_mem_state(base_addr, 0x00004000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
}
flushmmucache();
}
break;
@@ -1163,6 +1170,9 @@ scat_out(uint16_t port, uint8_t val, void *priv)
if (indx >= 24)
base_addr += 0x30000;
if ((base_addr >= 0x000a0000) && (base_addr < 0x00100000))
mem_set_mem_state(base_addr, 0x00004000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
if (dev->regs[SCAT_EMS_CONTROL] & 0x80) {
if (val & 0x80) {
virt_addr = get_addr(dev, base_addr, &dev->page[indx]);
@@ -1175,6 +1185,9 @@ scat_out(uint16_t port, uint8_t val, void *priv)
else
mem_mapping_set_exec(&dev->ems_mapping[indx], NULL);
mem_mapping_enable(&dev->ems_mapping[indx]);
if ((base_addr >= 0x000a0000) && (base_addr < 0x00100000))
mem_set_mem_state(base_addr, 0x00004000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
} else {
mem_mapping_set_exec(&dev->ems_mapping[indx], ram + base_addr);
mem_mapping_disable(&dev->ems_mapping[indx]);
@@ -1390,8 +1403,7 @@ scat_init(const device_t *info)
uint32_t k;
int sx;
dev = (scat_t *) malloc(sizeof(scat_t));
memset(dev, 0x00, sizeof(scat_t));
dev = (scat_t *) calloc(1, sizeof(scat_t));
dev->type = info->local;
sx = (dev->type == 32) ? 1 : 0;
@@ -1495,7 +1507,7 @@ scat_init(const device_t *info)
mem_mapping_add(&dev->ems_mapping[i], (i + 28) << 14, 0x04000,
mem_read_scatb, mem_read_scatw, mem_read_scatl,
mem_write_scatb, mem_write_scatw, mem_write_scatl,
ram + ((i + 28) << 14), 0, &dev->page[i]);
ram + ((i + 28) << 14), MEM_MAPPING_INTERNAL, &dev->page[i]);
mem_mapping_disable(&dev->ems_mapping[i]);
}
} else {
@@ -1508,7 +1520,7 @@ scat_init(const device_t *info)
mem_read_scatb, mem_read_scatw, mem_read_scatl,
mem_write_scatb, mem_write_scatw, mem_write_scatl,
ram + ((i + (i >= 24 ? 28 : 16)) << 14),
0, &dev->page[i]);
MEM_MAPPING_INTERNAL, &dev->page[i]);
}
}
@@ -1546,7 +1558,7 @@ const device_t scat_device = {
.init = scat_init,
.close = scat_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -1560,7 +1572,7 @@ const device_t scat_4_device = {
.init = scat_init,
.close = scat_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -1574,7 +1586,7 @@ const device_t scat_sx_device = {
.init = scat_init,
.close = scat_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

2
src/chipset/sis_5511.c
View File

@@ -165,7 +165,7 @@ const device_t sis_5511_device = {
.init = sis_5511_init,
.close = sis_5511_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

2
src/chipset/sis_5511_h2p.c
View File

@@ -454,7 +454,7 @@ const device_t sis_5511_h2p_device = {
.init = sis_5511_host_to_pci_init,
.close = sis_5511_host_to_pci_close,
.reset = sis_5511_host_to_pci_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

8
src/chipset/sis_5513_ide.c
View File

@@ -456,7 +456,7 @@ const device_t sis_5513_ide_device = {
.init = sis_5513_ide_init,
.close = sis_5513_ide_close,
.reset = sis_5513_ide_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -470,7 +470,7 @@ const device_t sis_5572_ide_device = {
.init = sis_5513_ide_init,
.close = sis_5513_ide_close,
.reset = sis_5513_ide_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -484,7 +484,7 @@ const device_t sis_5582_ide_device = {
.init = sis_5513_ide_init,
.close = sis_5513_ide_close,
.reset = sis_5513_ide_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -498,7 +498,7 @@ const device_t sis_5591_5600_ide_device = {
.init = sis_5513_ide_init,
.close = sis_5513_ide_close,
.reset = sis_5513_ide_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

20
src/chipset/sis_5513_p2i.c
View File

@@ -106,7 +106,7 @@ sis_5513_apc_reset(sis_5513_pci_to_isa_t *dev)
{
memset(dev->apc_regs, 0x00, sizeof(dev->apc_regs));
if (dev->rev == 0b0) {
if (dev->rev == 0xb0) {
dev->apc_regs[0x03] = 0x80;
dev->apc_regs[0x04] = 0x38;
dev->apc_regs[0x07] = 0x01;
@@ -115,7 +115,7 @@ sis_5513_apc_reset(sis_5513_pci_to_isa_t *dev)
}
static void
sis_5513_apc_write(uint16_t addr, uint8_t val, void *priv)
sis_5513_apc_write(UNUSED(uint16_t addr), uint8_t val, void *priv)
{
sis_5513_pci_to_isa_t *dev = (sis_5513_pci_to_isa_t *) priv;
uint8_t nvr_index = nvr_get_index(dev->nvr, 0);
@@ -135,7 +135,7 @@ sis_5513_apc_write(uint16_t addr, uint8_t val, void *priv)
}
static uint8_t
sis_5513_apc_read(uint16_t addr, void *priv)
sis_5513_apc_read(UNUSED(uint16_t addr), void *priv)
{
sis_5513_pci_to_isa_t *dev = (sis_5513_pci_to_isa_t *) priv;
uint8_t nvr_index = nvr_get_index(dev->nvr, 0);
@@ -1287,9 +1287,9 @@ sis_5513_pci_to_isa_init(UNUSED(const device_t *info))
acpi_set_nvr(dev->sis->acpi, dev->nvr);
/* Set up the NVR file's name. */
c = strlen(machine_get_internal_name()) + 9;
c = strlen(machine_get_nvr_name()) + 9;
dev->fn = (char *) malloc(c + 1);
sprintf(dev->fn, "%s_apc.nvr", machine_get_internal_name());
sprintf(dev->fn, "%s_apc.nvr", machine_get_nvr_name());
fp = nvr_fopen(dev->fn, "rb");
@@ -1318,7 +1318,7 @@ const device_t sis_5513_p2i_device = {
.init = sis_5513_pci_to_isa_init,
.close = sis_5513_pci_to_isa_close,
.reset = sis_5513_pci_to_isa_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -1332,7 +1332,7 @@ const device_t sis_5572_p2i_device = {
.init = sis_5513_pci_to_isa_init,
.close = sis_5513_pci_to_isa_close,
.reset = sis_5513_pci_to_isa_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -1347,7 +1347,7 @@ const device_t sis_5582_p2i_device = {
.init = sis_5513_pci_to_isa_init,
.close = sis_5513_pci_to_isa_close,
.reset = sis_5513_pci_to_isa_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -1362,7 +1362,7 @@ const device_t sis_5595_1997_p2i_device = {
.init = sis_5513_pci_to_isa_init,
.close = sis_5513_pci_to_isa_close,
.reset = sis_5513_pci_to_isa_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -1376,7 +1376,7 @@ const device_t sis_5595_p2i_device = {
.init = sis_5513_pci_to_isa_init,
.close = sis_5513_pci_to_isa_close,
.reset = sis_5513_pci_to_isa_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

2
src/chipset/sis_5571.c
View File

@@ -177,7 +177,7 @@ const device_t sis_5571_device = {
.init = sis_5571_init,
.close = sis_5571_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

2
src/chipset/sis_5571_h2p.c
View File

@@ -451,7 +451,7 @@ const device_t sis_5571_h2p_device = {
.init = sis_5571_host_to_pci_init,
.close = sis_5571_host_to_pci_close,
.reset = sis_5571_host_to_pci_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

5
src/chipset/sis_5571_old.c
View File

@@ -732,8 +732,7 @@ sis_5571_close(void *priv)
static void *
sis_5571_init(UNUSED(const device_t *info))
{
sis_5571_t *dev = (sis_5571_t *) malloc(sizeof(sis_5571_t));
memset(dev, 0x00, sizeof(sis_5571_t));
sis_5571_t *dev = (sis_5571_t *) calloc(1, sizeof(sis_5571_t));
pci_add_card(PCI_ADD_NORTHBRIDGE, memory_pci_bridge_read, memory_pci_bridge_write, dev, &dev->nb_slot);
pci_add_card(PCI_ADD_SOUTHBRIDGE, pci_isa_bridge_read, pci_isa_bridge_write, dev, &dev->sb_slot);
@@ -765,7 +764,7 @@ const device_t sis_5571_device = {
.init = sis_5571_init,
.close = sis_5571_close,
.reset = sis_5571_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

6
src/chipset/sis_5572_usb.c
View File

@@ -288,7 +288,7 @@ const device_t sis_5572_usb_device = {
.init = sis_5572_usb_init,
.close = sis_5572_usb_close,
.reset = sis_5572_usb_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -302,7 +302,7 @@ const device_t sis_5582_usb_device = {
.init = sis_5572_usb_init,
.close = sis_5572_usb_close,
.reset = sis_5572_usb_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -316,7 +316,7 @@ const device_t sis_5595_usb_device = {
.init = sis_5572_usb_init,
.close = sis_5572_usb_close,
.reset = sis_5572_usb_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

2
src/chipset/sis_5581.c
View File

@@ -177,7 +177,7 @@ const device_t sis_5581_device = {
.init = sis_5581_init,
.close = sis_5581_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

2
src/chipset/sis_5581_h2p.c
View File

@@ -545,7 +545,7 @@ const device_t sis_5581_h2p_device = {
.init = sis_5581_host_to_pci_init,
.close = sis_5581_host_to_pci_close,
.reset = sis_5581_host_to_pci_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

4
src/chipset/sis_5591.c
View File

@@ -189,7 +189,7 @@ const device_t sis_5591_1997_device = {
.init = sis_5591_init,
.close = sis_5591_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -203,7 +203,7 @@ const device_t sis_5591_device = {
.init = sis_5591_init,
.close = sis_5591_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

2
src/chipset/sis_5591_h2p.c
View File

@@ -486,7 +486,7 @@ const device_t sis_5591_h2p_device = {
.init = sis_5591_host_to_pci_init,
.close = sis_5591_host_to_pci_close,
.reset = sis_5591_host_to_pci_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

6
src/chipset/sis_5595_pmu.c
View File

@@ -119,7 +119,7 @@ sis_5595_pmu_trap_io_mask(int size, uint16_t addr, uint8_t write, uint8_t val, v
}
static void
sis_5595_pmu_trap_io_ide_bm(int size, uint16_t addr, uint8_t write, uint8_t val, void *priv)
sis_5595_pmu_trap_io_ide_bm(UNUSED(int size), UNUSED(uint16_t addr), UNUSED(uint8_t write), UNUSED(uint8_t val), void *priv)
{
sis_5595_pmu_io_trap_t *trap = (sis_5595_pmu_io_trap_t *) priv;
sis_5595_pmu_t *dev = (sis_5595_pmu_t *) trap->priv;
@@ -433,7 +433,7 @@ const device_t sis_5595_1997_pmu_device = {
.init = sis_5595_pmu_init,
.close = sis_5595_pmu_close,
.reset = sis_5595_pmu_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -447,7 +447,7 @@ const device_t sis_5595_pmu_device = {
.init = sis_5595_pmu_init,
.close = sis_5595_pmu_close,
.reset = sis_5595_pmu_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

2
src/chipset/sis_55xx.c
View File

@@ -89,7 +89,7 @@ const device_t sis_55xx_common_device = {
.init = sis_55xx_common_init,
.close = sis_55xx_common_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

4
src/chipset/sis_5600.c
View File

@@ -189,7 +189,7 @@ const device_t sis_5600_1997_device = {
.init = sis_5600_init,
.close = sis_5600_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -203,7 +203,7 @@ const device_t sis_5600_device = {
.init = sis_5600_init,
.close = sis_5600_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

2
src/chipset/sis_5600_h2p.c
View File

@@ -427,7 +427,7 @@ const device_t sis_5600_h2p_device = {
.init = sis_5600_host_to_pci_init,
.close = sis_5600_host_to_pci_close,
.reset = sis_5600_host_to_pci_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

5
src/chipset/sis_85c310.c
View File

@@ -130,8 +130,7 @@ rabbit_close(void *priv)
static void *
rabbit_init(UNUSED(const device_t *info))
{
rabbit_t *dev = (rabbit_t *) malloc(sizeof(rabbit_t));
memset(dev, 0, sizeof(rabbit_t));
rabbit_t *dev = (rabbit_t *) calloc(1, sizeof(rabbit_t));
io_sethandler(0x0022, 0x0002, rabbit_read, NULL, NULL, rabbit_write, NULL, NULL, dev);
@@ -146,7 +145,7 @@ const device_t rabbit_device = {
.init = rabbit_init,
.close = rabbit_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

7
src/chipset/sis_85c496.c
View File

@@ -637,8 +637,7 @@ static void
*
sis_85c496_init(const device_t *info)
{
sis_85c496_t *dev = malloc(sizeof(sis_85c496_t));
memset(dev, 0x00, sizeof(sis_85c496_t));
sis_85c496_t *dev = calloc(1, sizeof(sis_85c496_t));
dev->smram = smram_add();
@@ -702,7 +701,7 @@ const device_t sis_85c496_device = {
.init = sis_85c496_init,
.close = sis_85c496_close,
.reset = sis_85c496_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -716,7 +715,7 @@ const device_t sis_85c496_ls486e_device = {
.init = sis_85c496_init,
.close = sis_85c496_close,
.reset = sis_85c496_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

11
src/chipset/sis_85c4xx.c
View File

@@ -368,8 +368,7 @@ sis_85c4xx_close(void *priv)
static void *
sis_85c4xx_init(const device_t *info)
{
sis_85c4xx_t *dev = (sis_85c4xx_t *) malloc(sizeof(sis_85c4xx_t));
memset(dev, 0, sizeof(sis_85c4xx_t));
sis_85c4xx_t *dev = (sis_85c4xx_t *) calloc(1, sizeof(sis_85c4xx_t));
dev->is_471 = (info->local >> 8) & 0xff;
@@ -403,7 +402,7 @@ const device_t sis_85c401_device = {
.init = sis_85c4xx_init,
.close = sis_85c4xx_close,
.reset = sis_85c4xx_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -417,7 +416,7 @@ const device_t sis_85c460_device = {
.init = sis_85c4xx_init,
.close = sis_85c4xx_close,
.reset = sis_85c4xx_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -432,7 +431,7 @@ const device_t sis_85c461_device = {
.init = sis_85c4xx_init,
.close = sis_85c4xx_close,
.reset = sis_85c4xx_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -446,7 +445,7 @@ const device_t sis_85c471_device = {
.init = sis_85c4xx_init,
.close = sis_85c4xx_close,
.reset = sis_85c4xx_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

8
src/chipset/sis_85c50x.c
View File

@@ -684,7 +684,7 @@ const device_t sis_85c50x_device = {
.init = sis_85c50x_init,
.close = sis_85c50x_close,
.reset = sis_85c50x_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -698,7 +698,7 @@ const device_t sis_550x_85c503_device = {
.init = sis_85c50x_init,
.close = sis_85c50x_close,
.reset = sis_85c50x_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -712,7 +712,7 @@ const device_t sis_85c50x_5503_device = {
.init = sis_85c50x_init,
.close = sis_85c50x_close,
.reset = sis_85c50x_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -726,7 +726,7 @@ const device_t sis_550x_device = {
.init = sis_85c50x_init,
.close = sis_85c50x_close,
.reset = sis_85c50x_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

54
src/chipset/stpc.c
View File

@@ -912,8 +912,7 @@ stpc_init(const device_t *info)
{
stpc_log("STPC: init()\n");
stpc_t *dev = (stpc_t *) malloc(sizeof(stpc_t));
memset(dev, 0, sizeof(stpc_t));
stpc_t *dev = (stpc_t *) calloc(1, sizeof(stpc_t));
dev->local = info->local;
@@ -963,8 +962,7 @@ stpc_serial_init(UNUSED(const device_t *info))
{
stpc_log("STPC: serial_init()\n");
stpc_serial_t *dev = (stpc_serial_t *) malloc(sizeof(stpc_serial_t));
memset(dev, 0, sizeof(stpc_serial_t));
stpc_serial_t *dev = (stpc_serial_t *) calloc(1, sizeof(stpc_serial_t));
dev->uart[0] = device_add_inst(&ns16550_device, 1);
dev->uart[1] = device_add_inst(&ns16550_device, 2);
@@ -977,39 +975,24 @@ stpc_serial_init(UNUSED(const device_t *info))
static void
stpc_lpt_handlers(stpc_lpt_t *dev, uint8_t val)
{
uint8_t old_addr = (dev->reg1 & 0x03);
uint8_t new_addr = (val & 0x03);
const uint8_t new_addr = (val & 0x03);
switch (old_addr) {
case 0x1:
lpt3_remove();
break;
case 0x2:
lpt1_remove();
break;
case 0x3:
lpt2_remove();
break;
default:
break;
}
lpt1_remove();
switch (new_addr) {
case 0x1:
stpc_log("STPC: Remapping parallel port to LPT3\n");
lpt3_init(0x3bc);
lpt1_setup(LPT_MDA_ADDR);
break;
case 0x2:
stpc_log("STPC: Remapping parallel port to LPT1\n");
lpt1_init(0x378);
lpt1_setup(LPT1_ADDR);
break;
case 0x3:
stpc_log("STPC: Remapping parallel port to LPT2\n");
lpt2_init(0x278);
lpt1_setup(LPT2_ADDR);
break;
default:
@@ -1017,9 +1000,11 @@ stpc_lpt_handlers(stpc_lpt_t *dev, uint8_t val)
break;
}
dev->reg1 = (val & 0x08);
dev->reg1 |= new_addr;
dev->reg1 |= 0x84; /* reserved bits that default to 1; hardwired? */
if (dev != NULL) {
dev->reg1 = (val & 0x08);
dev->reg1 |= new_addr;
dev->reg1 |= 0x84; /* reserved bits that default to 1; hardwired? */
}
}
static void
@@ -1076,8 +1061,7 @@ stpc_lpt_init(UNUSED(const device_t *info))
{
stpc_log("STPC: lpt_init()\n");
stpc_lpt_t *dev = (stpc_lpt_t *) malloc(sizeof(stpc_lpt_t));
memset(dev, 0, sizeof(stpc_lpt_t));
stpc_lpt_t *dev = (stpc_lpt_t *) calloc(1, sizeof(stpc_lpt_t));
stpc_lpt_reset(dev);
@@ -1096,7 +1080,7 @@ const device_t stpc_client_device = {
.init = stpc_init,
.close = stpc_close,
.reset = stpc_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -1110,7 +1094,7 @@ const device_t stpc_consumer2_device = {
.init = stpc_init,
.close = stpc_close,
.reset = stpc_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -1124,7 +1108,7 @@ const device_t stpc_elite_device = {
.init = stpc_init,
.close = stpc_close,
.reset = stpc_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -1138,7 +1122,7 @@ const device_t stpc_atlas_device = {
.init = stpc_init,
.close = stpc_close,
.reset = stpc_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -1153,7 +1137,7 @@ const device_t stpc_serial_device = {
.init = stpc_serial_init,
.close = stpc_serial_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -1167,7 +1151,7 @@ const device_t stpc_lpt_device = {
.init = stpc_lpt_init,
.close = stpc_lpt_close,
.reset = stpc_lpt_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

100
src/chipset/umc_8886.c
View File

@@ -82,6 +82,8 @@
#include <86box/hdd.h>
#include <86box/hdc.h>
#include <86box/hdc_ide.h>
#include <86box/keyboard.h>
#include <86box/machine.h>
#include <86box/pic.h>
#include <86box/pci.h>
#include <86box/port_92.h>
@@ -126,10 +128,10 @@ umc_8886_ide_handler(umc_8886_t *dev)
ide_sec_disable();
if (dev->pci_conf_sb[1][0x04] & 0x01) {
if (dev->pci_conf_sb[1][0x40] & 0x80)
if (dev->pci_conf_sb[1][0x41] & 0x80)
ide_pri_enable();
if (dev->pci_conf_sb[1][0x40] & 0x40)
if (dev->pci_conf_sb[1][0x41] & 0x40)
ide_sec_enable();
}
}
@@ -164,11 +166,32 @@ umc_8886_bus_recalc(umc_8886_t *dev)
}
}
static void
umc_8886_irq_recalc(umc_8886_t *dev)
{
int irq_routing;
uint8_t *conf = dev->pci_conf_sb[0];
irq_routing = (conf[0x46] & 0x01) ? (conf[0x43] >> 4) : PCI_IRQ_DISABLED;
pci_set_irq_routing(PCI_INTA, irq_routing);
irq_routing = (conf[0x46] & 0x02) ? (conf[0x43] & 0x0f) : PCI_IRQ_DISABLED;
pci_set_irq_routing(PCI_INTB, irq_routing);
irq_routing = (conf[0x46] & 0x04) ? (conf[0x44] >> 4) : PCI_IRQ_DISABLED;
pci_set_irq_routing(PCI_INTC, irq_routing);
irq_routing = (conf[0x46] & 0x08) ? (conf[0x44] & 0x0f) : PCI_IRQ_DISABLED;
pci_set_irq_routing(PCI_INTD, irq_routing);
pci_set_irq_level(PCI_INTA, (conf[0x47] & 0x01));
pci_set_irq_level(PCI_INTB, (conf[0x47] & 0x02));
pci_set_irq_level(PCI_INTC, (conf[0x47] & 0x04));
pci_set_irq_level(PCI_INTD, (conf[0x47] & 0x08));
}
static void
umc_8886_write(int func, int addr, uint8_t val, void *priv)
{
umc_8886_t *dev = (umc_8886_t *) priv;
int irq_routing;
if (func <= dev->max_func)
switch (func) {
@@ -183,7 +206,7 @@ umc_8886_write(int func, int addr, uint8_t val, void *priv)
case 0x50 ... 0x55:
case 0x57:
case 0x70 ... 0x76:
case 0x80 ... 0x82:
case 0x80 ... 0x83:
case 0x90 ... 0x92:
case 0xa0 ... 0xa1:
case 0xa5 ... 0xa8:
@@ -195,28 +218,12 @@ umc_8886_write(int func, int addr, uint8_t val, void *priv)
break;
case 0x43:
dev->pci_conf_sb[func][addr] = val;
irq_routing = (dev->pci_conf_sb[func][0x46] & 0x01) ? (val >> 8) :
PCI_IRQ_DISABLED;
pci_set_irq_routing(PCI_INTA, irq_routing);
irq_routing = (dev->pci_conf_sb[func][0x46] & 0x02) ? (val & 0x0f) :
PCI_IRQ_DISABLED;
pci_set_irq_routing(PCI_INTB, irq_routing);
break;
case 0x44:
dev->pci_conf_sb[func][addr] = val;
irq_routing = (dev->pci_conf_sb[func][0x46] & 0x04) ? (val >> 8) :
PCI_IRQ_DISABLED;
pci_set_irq_routing(PCI_INTC, irq_routing);
irq_routing = (dev->pci_conf_sb[func][0x46] & 0x08) ? (val & 0x0f) :
PCI_IRQ_DISABLED;
pci_set_irq_routing(PCI_INTD, irq_routing);
break;
case 0x46: /* Bits 3-0 = 0 = IRQ disabled, 1 = IRQ enabled. */
case 0x47: /* Bits 3-0 = 0 = IRQ edge-triggered, 1 = IRQ level-triggered. */
/* Bit 6 seems to be the IRQ/SMI# toggle, 1 = IRQ, 0 = SMI#. */
dev->pci_conf_sb[func][addr] = val;
umc_8886_irq_recalc(dev);
break;
case 0x56:
@@ -265,13 +272,13 @@ umc_8886_write(int func, int addr, uint8_t val, void *priv)
break;
case 0x3c:
case 0x41 ... 0x4b:
case 0x54 ... 0x59:
case 0x40:
case 0x42 ... 0x59:
if (dev->ide_id == 0x673a)
dev->pci_conf_sb[func][addr] = val;
break;
case 0x40:
case 0x41:
if (dev->ide_id == 0x673a) {
dev->pci_conf_sb[func][addr] = val;
umc_8886_ide_handler(dev);
@@ -317,25 +324,17 @@ umc_8886_reset(void *priv)
dev->pci_conf_sb[0][0x09] = 0x00;
dev->pci_conf_sb[0][0x0a] = 0x01;
dev->pci_conf_sb[0][0x0b] = 0x06;
dev->pci_conf_sb[0][0x40] = 0x01;
dev->pci_conf_sb[0][0x41] = 0x06;
dev->pci_conf_sb[0][0x41] = 0x04;
dev->pci_conf_sb[0][0x42] = 0x08;
dev->pci_conf_sb[0][0x43] = 0x00;
dev->pci_conf_sb[0][0x44] = 0x00;
dev->pci_conf_sb[0][0x45] = 0x04;
dev->pci_conf_sb[0][0x46] = 0x00;
dev->pci_conf_sb[0][0x47] = 0x40;
dev->pci_conf_sb[0][0x50] = 0x01;
dev->pci_conf_sb[0][0x51] = 0x03;
dev->pci_conf_sb[0][0x56] = dev->pci_conf_sb[0][0x57] = 0x00;
dev->pci_conf_sb[0][0x70] = dev->pci_conf_sb[0][0x71] = 0x00;
dev->pci_conf_sb[0][0x72] = dev->pci_conf_sb[0][0x73] = 0x00;
dev->pci_conf_sb[0][0x74] = dev->pci_conf_sb[0][0x76] = 0x00;
dev->pci_conf_sb[0][0x82] = 0x00;
dev->pci_conf_sb[0][0x90] = dev->pci_conf_sb[0][0x91] = 0x00;
dev->pci_conf_sb[0][0xa0] = dev->pci_conf_sb[0][0xa2] = 0x00;
dev->pci_conf_sb[0][0xa4] = 0x00;
dev->pci_conf_sb[0][0xa8] = 0x20;
dev->pci_conf_sb[0][0x43] = 0x9a;
dev->pci_conf_sb[0][0x44] = 0xbc;
dev->pci_conf_sb[0][0x45] = 0x00;
dev->pci_conf_sb[0][0x46] = 0x10;
dev->pci_conf_sb[0][0x47] = 0x30;
dev->pci_conf_sb[0][0x51] = 0x02;
if (dev->has_ide) {
dev->pci_conf_sb[1][0x00] = 0x60; /* UMC */
@@ -358,13 +357,15 @@ umc_8886_reset(void *priv)
dev->pci_conf_sb[1][0x21] = 0x10;
if (dev->ide_id == 0x673a) {
dev->pci_conf_sb[1][0x40] = 0xc0;
dev->pci_conf_sb[1][0x41] = 0x00;
dev->pci_conf_sb[1][0x40] = 0x00;
dev->pci_conf_sb[1][0x41] = 0xc0;
dev->pci_conf_sb[1][0x42] = dev->pci_conf_sb[1][0x43] = 0x00;
dev->pci_conf_sb[1][0x44] = dev->pci_conf_sb[1][0x45] = 0x00;
dev->pci_conf_sb[1][0x46] = dev->pci_conf_sb[1][0x47] = 0x00;
dev->pci_conf_sb[1][0x48] = dev->pci_conf_sb[1][0x49] = 0x00;
dev->pci_conf_sb[1][0x4a] = dev->pci_conf_sb[1][0x4b] = 0x00;
dev->pci_conf_sb[1][0x48] = dev->pci_conf_sb[1][0x49] = 0x55;
dev->pci_conf_sb[1][0x4a] = dev->pci_conf_sb[1][0x4b] = 0x55;
dev->pci_conf_sb[1][0x4c] = dev->pci_conf_sb[1][0x4d] = 0x88;
dev->pci_conf_sb[1][0x4e] = dev->pci_conf_sb[1][0x4f] = 0xaa;
dev->pci_conf_sb[1][0x54] = dev->pci_conf_sb[1][0x55] = 0x00;
dev->pci_conf_sb[1][0x56] = dev->pci_conf_sb[1][0x57] = 0x00;
dev->pci_conf_sb[1][0x58] = dev->pci_conf_sb[1][0x59] = 0x00;
@@ -393,8 +394,7 @@ umc_8886_close(void *priv)
static void *
umc_8886_init(const device_t *info)
{
umc_8886_t *dev = (umc_8886_t *) malloc(sizeof(umc_8886_t));
memset(dev, 0, sizeof(umc_8886_t));
umc_8886_t *dev = (umc_8886_t *) calloc(1, sizeof(umc_8886_t));
/* Device 12: UMC 8886xx */
pci_add_card(PCI_ADD_SOUTHBRIDGE, umc_8886_read, umc_8886_write, dev, &dev->pci_slot);
@@ -432,7 +432,7 @@ const device_t umc_8886f_device = {
.init = umc_8886_init,
.close = umc_8886_close,
.reset = umc_8886_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -446,7 +446,7 @@ const device_t umc_8886af_device = {
.init = umc_8886_init,
.close = umc_8886_close,
.reset = umc_8886_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -460,7 +460,7 @@ const device_t umc_8886bf_device = {
.init = umc_8886_init,
.close = umc_8886_close,
.reset = umc_8886_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

5
src/chipset/umc_8890.c
View File

@@ -38,6 +38,7 @@
#include <86box/smram.h>
#include <86box/chipset.h>
#include <86box/plat_unused.h>
#ifdef ENABLE_UMC_8890_LOG
int umc_8890_do_log = ENABLE_UMC_8890_LOG;
@@ -209,7 +210,7 @@ umc_8890_close(void *priv)
static void *
umc_8890_init(const device_t *info)
umc_8890_init(UNUSED(const device_t *info))
{
umc_8890_t *dev = (umc_8890_t *) calloc(1, sizeof(umc_8890_t));
@@ -234,7 +235,7 @@ const device_t umc_8890_device = {
.init = umc_8890_init,
.close = umc_8890_close,
.reset = umc_8890_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

97
src/chipset/umc_hb4.c
View File

@@ -136,6 +136,9 @@ hb4_log(const char *fmt, ...)
#endif
typedef struct hb4_t {
uint8_t idx;
uint8_t access_data;
uint8_t pci_slot;
uint8_t pci_conf[256]; /* PCI Registers */
@@ -176,7 +179,9 @@ hb4_shadow_bios_low(hb4_t *dev)
int state;
/* Erratum in Vogons' datasheet: Register 55h bit 7 in fact controls E0000-FFFFF. */
state = shadow_bios[dev->pci_conf[0x55] >> 6];
state = (dev->pci_conf[0x55] & 0x80) ? shadow_read[dev->pci_conf[0x54] & 0x01] :
MEM_READ_EXTANY;
state |= shadow_write[(dev->pci_conf[0x55] >> 6) & 0x01];
if (state != dev->mem_state[7]) {
mem_set_mem_state_both(0xe0000, 0x10000, state);
@@ -194,8 +199,9 @@ hb4_shadow_main(hb4_t *dev)
int n = 0;
for (uint8_t i = 0; i < 6; i++) {
state = shadow_read[(dev->pci_conf[0x54] >> (i + 2)) & 0x01] |
shadow_write[(dev->pci_conf[0x55] >> 6) & 0x01];
state = (dev->pci_conf[0x55] & 0x80) ? shadow_read[(dev->pci_conf[0x54] >> (i + 2)) & 0x01] :
MEM_READ_EXTANY;
state |= shadow_write[(dev->pci_conf[0x55] >> 6) & 0x01];
if (state != dev->mem_state[i + 1]) {
n++;
@@ -212,8 +218,9 @@ hb4_shadow_video(hb4_t *dev)
{
int state;
state = shadow_read[(dev->pci_conf[0x54] >> 1) & 0x01] |
shadow_write[(dev->pci_conf[0x55] >> 6) & 0x01];
state = (dev->pci_conf[0x55] & 0x80) ? shadow_read[(dev->pci_conf[0x54] >> 1) & 0x01] :
MEM_READ_EXTANY;
state |= shadow_write[(dev->pci_conf[0x55] >> 6) & 0x01];
if (state != dev->mem_state[0]) {
mem_set_mem_state_both(0xc0000, 0x8000, state);
@@ -302,7 +309,7 @@ hb4_write(UNUSED(int func), int addr, uint8_t val, void *priv)
hb4_shadow(dev);
break;
case 0x56 ... 0x5b:
case 0x56 ... 0x5a:
case 0x5e ... 0x5f:
dev->pci_conf[addr] = val;
break;
@@ -313,10 +320,14 @@ hb4_write(UNUSED(int func), int addr, uint8_t val, void *priv)
hb4_smram(dev);
break;
case 0x61 ... 0x62:
case 0x61:
dev->pci_conf[addr] = val;
break;
case 0x62:
dev->pci_conf[addr] = val & 0x03;
break;
default:
break;
}
@@ -354,14 +365,16 @@ hb4_reset(void *priv)
dev->pci_conf[0x52] = 0x01;
dev->pci_conf[0x53] = 0x00;
dev->pci_conf[0x54] = 0x00;
dev->pci_conf[0x55] = 0x00;
dev->pci_conf[0x56] = 0x00;
dev->pci_conf[0x57] = 0x00;
dev->pci_conf[0x58] = 0x00;
dev->pci_conf[0x59] = 0x00;
dev->pci_conf[0x5a] = 0x04;
dev->pci_conf[0x55] = 0x40;
dev->pci_conf[0x56] = 0xff;
dev->pci_conf[0x57] = 0x0f;
dev->pci_conf[0x58] = 0xff;
dev->pci_conf[0x59] = 0x0f;
dev->pci_conf[0x5a] = 0x00;
dev->pci_conf[0x5b] = 0x2c;
dev->pci_conf[0x5c] = 0x00;
dev->pci_conf[0x5d] = 0x20;
dev->pci_conf[0x5d] = 0x0f;
dev->pci_conf[0x5e] = 0x00;
dev->pci_conf[0x5f] = 0xff;
dev->pci_conf[0x60] = 0x00;
dev->pci_conf[0x61] = 0x00;
@@ -385,11 +398,59 @@ hb4_close(void *priv)
free(dev);
}
static void
ims8848_write(uint16_t addr, uint8_t val, void *priv)
{
hb4_t *dev = (hb4_t *) priv;
switch (addr) {
case 0x22:
dev->idx = val;
break;
case 0x23:
if (((val & 0x0f) == ((dev->idx >> 4) & 0x0f)) && ((val & 0xf0) == ((dev->idx << 4) & 0xf0)))
dev->access_data = 1;
break;
case 0x24:
if (dev->access_data)
dev->access_data = 0;
break;
default:
break;
}
}
static uint8_t
ims8848_read(uint16_t addr, void *priv)
{
uint8_t ret = 0xff;
hb4_t *dev = (hb4_t *) priv;
switch (addr) {
case 0x22:
ret = dev->idx;
break;
case 0x23:
ret = (dev->idx >> 4) | (dev->idx << 4);
break;
case 0x24:
if (dev->access_data) {
ret = dev->pci_conf[dev->idx];
dev->access_data = 0;
}
break;
default:
break;
}
return ret;
}
static void *
hb4_init(UNUSED(const device_t *info))
{
hb4_t *dev = (hb4_t *) malloc(sizeof(hb4_t));
memset(dev, 0, sizeof(hb4_t));
hb4_t *dev = (hb4_t *) calloc(1, sizeof(hb4_t));
pci_add_card(PCI_ADD_NORTHBRIDGE, hb4_read, hb4_write, dev, &dev->pci_slot); /* Device 10: UMC 8881x */
@@ -402,6 +463,8 @@ hb4_init(UNUSED(const device_t *info))
dev->smram_base = 0x000a0000;
hb4_reset(dev);
io_sethandler(0x0022, 0x0003, ims8848_read, NULL, NULL, ims8848_write, NULL, NULL, dev);
return dev;
}
@@ -413,7 +476,7 @@ const device_t umc_hb4_device = {
.init = hb4_init,
.close = hb4_close,
.reset = hb4_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

19
src/chipset/via_apollo.c
View File

@@ -725,8 +725,7 @@ via_apollo_reset(void *priv)
static void *
via_apollo_init(const device_t *info)
{
via_apollo_t *dev = (via_apollo_t *) malloc(sizeof(via_apollo_t));
memset(dev, 0, sizeof(via_apollo_t));
via_apollo_t *dev = (via_apollo_t *) calloc(1, sizeof(via_apollo_t));
dev->smram = smram_add();
if (dev->id != VIA_8601)
@@ -793,7 +792,7 @@ const device_t via_vpx_device = {
.init = via_apollo_init,
.close = via_apollo_close,
.reset = via_apollo_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -807,7 +806,7 @@ const device_t amd640_device = {
.init = via_apollo_init,
.close = via_apollo_close,
.reset = via_apollo_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -821,7 +820,7 @@ const device_t via_vp3_device = {
.init = via_apollo_init,
.close = via_apollo_close,
.reset = via_apollo_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -835,7 +834,7 @@ const device_t via_mvp3_device = {
.init = via_apollo_init,
.close = via_apollo_close,
.reset = via_apollo_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -849,7 +848,7 @@ const device_t via_apro_device = {
.init = via_apollo_init,
.close = via_apollo_close,
.reset = via_apollo_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -863,7 +862,7 @@ const device_t via_apro133_device = {
.init = via_apollo_init,
.close = via_apollo_close,
.reset = via_apollo_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -877,7 +876,7 @@ const device_t via_apro133a_device = {
.init = via_apollo_init,
.close = via_apollo_close,
.reset = via_apollo_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -891,7 +890,7 @@ const device_t via_vt8601_device = {
.init = via_apollo_init,
.close = via_apollo_close,
.reset = via_apollo_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

15
src/chipset/via_pipc.c
View File

@@ -1627,8 +1627,7 @@ pipc_reset(void *priv)
static void *
pipc_init(const device_t *info)
{
pipc_t *dev = (pipc_t *) malloc(sizeof(pipc_t));
memset(dev, 0, sizeof(pipc_t));
pipc_t *dev = (pipc_t *) calloc(1, sizeof(pipc_t));
pipc_log("PIPC: init()\n");
@@ -1721,7 +1720,7 @@ const device_t via_vt82c586b_device = {
.init = pipc_init,
.close = pipc_close,
.reset = pipc_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -1735,7 +1734,7 @@ const device_t via_vt82c596a_device = {
.init = pipc_init,
.close = pipc_close,
.reset = pipc_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -1749,7 +1748,7 @@ const device_t via_vt82c596b_device = {
.init = pipc_init,
.close = pipc_close,
.reset = pipc_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -1763,7 +1762,7 @@ const device_t via_vt82c686a_device = {
.init = pipc_init,
.close = pipc_close,
.reset = pipc_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -1777,7 +1776,7 @@ const device_t via_vt82c686b_device = {
.init = pipc_init,
.close = pipc_close,
.reset = pipc_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -1791,7 +1790,7 @@ const device_t via_vt8231_device = {
.init = pipc_init,
.close = pipc_close,
.reset = pipc_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

11
src/chipset/via_vt82c49x.c
View File

@@ -342,8 +342,7 @@ vt82c49x_close(void *priv)
static void *
vt82c49x_init(const device_t *info)
{
vt82c49x_t *dev = (vt82c49x_t *) malloc(sizeof(vt82c49x_t));
memset(dev, 0x00, sizeof(vt82c49x_t));
vt82c49x_t *dev = (vt82c49x_t *) calloc(1, sizeof(vt82c49x_t));
dev->smram_smm = smram_add();
dev->smram_low = smram_add();
@@ -375,7 +374,7 @@ const device_t via_vt82c49x_device = {
.init = vt82c49x_init,
.close = vt82c49x_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -389,7 +388,7 @@ const device_t via_vt82c49x_pci_device = {
.init = vt82c49x_init,
.close = vt82c49x_close,
.reset = vt82c49x_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -403,7 +402,7 @@ const device_t via_vt82c49x_ide_device = {
.init = vt82c49x_init,
.close = vt82c49x_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -417,7 +416,7 @@ const device_t via_vt82c49x_pci_ide_device = {
.init = vt82c49x_init,
.close = vt82c49x_close,
.reset = vt82c49x_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

7
src/chipset/via_vt82c505.c
View File

@@ -167,7 +167,7 @@ vt82c505_in(uint16_t addr, void *priv)
static void
vt82c505_reset(void *priv)
{
vt82c505_t *dev = (vt82c505_t *) malloc(sizeof(vt82c505_t));
vt82c505_t *dev = (vt82c505_t *) calloc(1, sizeof(vt82c505_t));
dev->pci_conf[0x04] = 0x07;
dev->pci_conf[0x07] = 0x00;
@@ -204,8 +204,7 @@ vt82c505_close(void *priv)
static void *
vt82c505_init(UNUSED(const device_t *info))
{
vt82c505_t *dev = (vt82c505_t *) malloc(sizeof(vt82c505_t));
memset(dev, 0, sizeof(vt82c505_t));
vt82c505_t *dev = (vt82c505_t *) calloc(1, sizeof(vt82c505_t));
pci_add_card(PCI_ADD_NORTHBRIDGE, vt82c505_read, vt82c505_write, dev, &dev->pci_slot);
@@ -232,7 +231,7 @@ const device_t via_vt82c505_device = {
.init = vt82c505_init,
.close = vt82c505_close,
.reset = vt82c505_reset,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

7
src/chipset/vl82c480.c
View File

@@ -180,8 +180,7 @@ vl82c480_close(void *priv)
static void *
vl82c480_init(const device_t *info)
{
vl82c480_t *dev = (vl82c480_t *) malloc(sizeof(vl82c480_t));
memset(dev, 0, sizeof(vl82c480_t));
vl82c480_t *dev = (vl82c480_t *) calloc(1, sizeof(vl82c480_t));
dev->regs[0x00] = info->local;
dev->regs[0x01] = 0xff;
@@ -207,7 +206,7 @@ const device_t vl82c480_device = {
.init = vl82c480_init,
.close = vl82c480_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
@@ -221,7 +220,7 @@ const device_t vl82c486_device = {
.init = vl82c480_init,
.close = vl82c480_close,
.reset = NULL,
{ .available = NULL },
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL

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