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Merge remote-tracking branch 'upstream/master' into feature/mtrr

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This commit is contained in:
Jasmine Iwanek
2022-11-17 23:48:28 -05:00
parent 178d021662 18e1cae503
commit 9d98dc0ade
117 changed files with 1650 additions and 1462 deletions
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1
.github/workflows/c-cpp.yml vendored
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@@ -60,6 +60,7 @@ jobs:
make
${{ matrix.environment.prefix }}-gcc
${{ matrix.environment.prefix }}-pkg-config
${{ matrix.environment.prefix }}-openal
${{ matrix.environment.prefix }}-freetype
${{ matrix.environment.prefix }}-SDL2
${{ matrix.environment.prefix }}-zlib

4
cmake/flags-gcc.cmake
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@@ -14,7 +14,7 @@
#
# Define our flags
string(APPEND CMAKE_C_FLAGS_INIT " -fomit-frame-pointer -Wall -fno-strict-aliasing")
string(APPEND CMAKE_C_FLAGS_INIT " -fomit-frame-pointer -Wall -fno-strict-aliasing -Werror=implicit-int -Werror=implicit-function-declaration -Werror=int-conversion -Werror=strict-prototypes -Werror=old-style-definition")
string(APPEND CMAKE_CXX_FLAGS_INIT " -fomit-frame-pointer -Wall -fno-strict-aliasing")
string(APPEND CMAKE_C_FLAGS_RELEASE_INIT " -g0 -O3")
string(APPEND CMAKE_CXX_FLAGS_RELEASE_INIT " -g0 -O3")
@@ -32,4 +32,4 @@ foreach(LANG C;CXX)
set(CMAKE_${LANG}_FLAGS_${CONFIG} "${CMAKE_${LANG}_FLAGS_${CONFIG}_INIT}" CACHE STRING "Flags used by the ${LANG} compiler during ${CONFIG} builds.")
mark_as_advanced(CMAKE_${LANG}_FLAGS_${CONFIG})
endforeach()
endforeach()
endforeach()

2
src/86box.c
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@@ -1121,7 +1121,7 @@ pc_reset_hard_init(void)
}
void
update_mouse_msg()
update_mouse_msg(void)
{
wchar_t wcpufamily[2048], wcpu[2048], wmachine[2048], *wcp;

2
src/acpi.c
View File

@@ -63,7 +63,7 @@ acpi_log(const char *fmt, ...)
#endif
static uint64_t
acpi_clock_get()
acpi_clock_get(void)
{
return tsc * cpu_to_acpi;
}

8
src/codegen/codegen.c
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@@ -9,12 +9,12 @@
#include "x86_ops.h"
#include "codegen.h"
void (*codegen_timing_start)();
void (*codegen_timing_start)(void);
void (*codegen_timing_prefix)(uint8_t prefix, uint32_t fetchdat);
void (*codegen_timing_opcode)(uint8_t opcode, uint32_t fetchdat, int op_32, uint32_t op_pc);
void (*codegen_timing_block_start)();
void (*codegen_timing_block_end)();
int (*codegen_timing_jump_cycles)();
void (*codegen_timing_block_start)(void);
void (*codegen_timing_block_end)(void);
int (*codegen_timing_jump_cycles)(void);
void codegen_timing_set(codegen_timing_t *timing)
{

40
src/codegen/codegen.h
View File

@@ -292,39 +292,39 @@ extern codeblock_t *codeblock;
extern codeblock_t **codeblock_hash;
void codegen_init();
void codegen_reset();
void codegen_block_init(uint32_t phys_addr);
void codegen_block_remove();
void codegen_block_start_recompile(codeblock_t *block);
void codegen_block_end_recompile(codeblock_t *block);
void codegen_block_end();
void codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_pc, uint32_t old_pc);
void codegen_generate_seg_restore();
void codegen_set_op32();
void codegen_flush();
void codegen_check_flush(page_t *page, uint64_t mask, uint32_t phys_addr);
extern void codegen_init(void);
extern void codegen_reset(void);
extern void codegen_block_init(uint32_t phys_addr);
extern void codegen_block_remove(void);
extern void codegen_block_start_recompile(codeblock_t *block);
extern void codegen_block_end_recompile(codeblock_t *block);
extern void codegen_block_end(void);
extern void codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_pc, uint32_t old_pc);
extern void codegen_generate_seg_restore(void);
extern void codegen_set_op32(void);
extern void codegen_flush(void);
extern void codegen_check_flush(page_t *page, uint64_t mask, uint32_t phys_addr);
extern int cpu_block_end;
extern uint32_t codegen_endpc;
extern int codegen_block_cycles;
extern void (*codegen_timing_start)();
extern void (*codegen_timing_start)(void);
extern void (*codegen_timing_prefix)(uint8_t prefix, uint32_t fetchdat);
extern void (*codegen_timing_opcode)(uint8_t opcode, uint32_t fetchdat, int op_32, uint32_t op_pc);
extern void (*codegen_timing_block_start)();
extern void (*codegen_timing_block_end)();
extern int (*codegen_timing_jump_cycles)();
extern void (*codegen_timing_block_start)(void);
extern void (*codegen_timing_block_end)(void);
extern int (*codegen_timing_jump_cycles)(void);
typedef struct codegen_timing_t
{
void (*start)();
void (*start)(void);
void (*prefix)(uint8_t prefix, uint32_t fetchdat);
void (*opcode)(uint8_t opcode, uint32_t fetchdat, int op_32, uint32_t op_pc);
void (*block_start)();
void (*block_end)();
int (*jump_cycles)();
void (*block_start)(void);
void (*block_end)(void);
int (*jump_cycles)(void);
} codegen_timing_t;
extern codegen_timing_t codegen_timing_pentium;

2
src/codegen/codegen_accumulate.h
View File

@@ -9,4 +9,4 @@ struct ir_data_t;
void codegen_accumulate(int acc_reg, int delta);
void codegen_accumulate_flush(void);
void codegen_accumulate_reset();
void codegen_accumulate_reset(void);

2
src/codegen/codegen_accumulate_x86-64.c
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@@ -61,7 +61,7 @@ void codegen_accumulate_flush(void)
acc_regs[0].count = 0;
}
void codegen_accumulate_reset()
void codegen_accumulate_reset(void)
{
acc_regs[0].count = 0;
}

2
src/codegen/codegen_accumulate_x86.c
View File

@@ -58,7 +58,7 @@ void codegen_accumulate_flush(void)
acc_regs[0].count = 0;
}
void codegen_accumulate_reset()
void codegen_accumulate_reset(void)
{
acc_regs[0].count = 0;
}

388
src/codegen/codegen_ops_x86-64.h
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File diff suppressed because it is too large Load Diff

352
src/codegen/codegen_ops_x86.h
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File diff suppressed because it is too large Load Diff

16
src/codegen/codegen_x86-64.c
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@@ -60,7 +60,7 @@ static uint32_t last_op32;
static x86seg *last_ea_seg;
static int last_ssegs;
void codegen_init()
void codegen_init(void)
{
int c;
@@ -80,7 +80,7 @@ void codegen_init()
codeblock[c].valid = 0;
}
void codegen_reset()
void codegen_reset(void)
{
int c;
@@ -92,7 +92,7 @@ void codegen_reset()
codeblock[c].valid = 0;
}
void dump_block()
void dump_block(void)
{
}
@@ -381,7 +381,7 @@ void codegen_block_start_recompile(codeblock_t *block)
codegen_flat_ss = !(cpu_cur_status & CPU_STATUS_NOTFLATSS);
}
void codegen_block_remove()
void codegen_block_remove(void)
{
codeblock_t *block = &codeblock[block_current];
@@ -390,7 +390,7 @@ void codegen_block_remove()
recomp_page = -1;
}
void codegen_block_generate_end_mask()
void codegen_block_generate_end_mask(void)
{
codeblock_t *block = &codeblock[block_current];
uint32_t start_pc;
@@ -448,7 +448,7 @@ void codegen_block_generate_end_mask()
recomp_page = -1;
}
void codegen_block_end()
void codegen_block_end(void)
{
codeblock_t *block = &codeblock[block_current];
@@ -491,7 +491,7 @@ void codegen_block_end_recompile(codeblock_t *block)
add_to_block_list(block);
}
void codegen_flush()
void codegen_flush(void)
{
return;
}
@@ -541,7 +541,7 @@ int opcode_0f_modrm[256] =
0, 1, 1, 1, 0, 1, 0, 0, 1, 1, 1, 0, 1, 1, 1, 0 /*f0*/
};
void codegen_debug()
void codegen_debug(void)
{
}

50
src/codegen/codegen_x86.c
View File

@@ -120,7 +120,7 @@ uint32_t mem_check_write;
uint32_t mem_check_write_w;
uint32_t mem_check_write_l;
static uint32_t gen_MEM_LOAD_ADDR_EA_B()
static uint32_t gen_MEM_LOAD_ADDR_EA_B(void)
{
uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
@@ -171,7 +171,7 @@ static uint32_t gen_MEM_LOAD_ADDR_EA_B()
return addr;
}
static uint32_t gen_MEM_LOAD_ADDR_EA_W()
static uint32_t gen_MEM_LOAD_ADDR_EA_W(void)
{
uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
@@ -227,7 +227,7 @@ static uint32_t gen_MEM_LOAD_ADDR_EA_W()
return addr;
}
static uint32_t gen_MEM_LOAD_ADDR_EA_L()
static uint32_t gen_MEM_LOAD_ADDR_EA_L(void)
{
uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
@@ -279,7 +279,7 @@ static uint32_t gen_MEM_LOAD_ADDR_EA_L()
return addr;
}
static uint32_t gen_MEM_LOAD_ADDR_EA_Q()
static uint32_t gen_MEM_LOAD_ADDR_EA_Q(void)
{
uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
@@ -335,7 +335,7 @@ static uint32_t gen_MEM_LOAD_ADDR_EA_Q()
return addr;
}
static uint32_t gen_MEM_STORE_ADDR_EA_B()
static uint32_t gen_MEM_STORE_ADDR_EA_B(void)
{
uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
@@ -384,7 +384,7 @@ static uint32_t gen_MEM_STORE_ADDR_EA_B()
return addr;
}
static uint32_t gen_MEM_STORE_ADDR_EA_W()
static uint32_t gen_MEM_STORE_ADDR_EA_W(void)
{
uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
@@ -439,7 +439,7 @@ static uint32_t gen_MEM_STORE_ADDR_EA_W()
return addr;
}
static uint32_t gen_MEM_STORE_ADDR_EA_L()
static uint32_t gen_MEM_STORE_ADDR_EA_L(void)
{
uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
@@ -493,7 +493,7 @@ static uint32_t gen_MEM_STORE_ADDR_EA_L()
return addr;
}
static uint32_t gen_MEM_STORE_ADDR_EA_Q()
static uint32_t gen_MEM_STORE_ADDR_EA_Q(void)
{
uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
@@ -555,7 +555,7 @@ static uint32_t gen_MEM_STORE_ADDR_EA_Q()
#ifndef RELEASE_BUILD
static char gen_MEM_LOAD_ADDR_EA_B_NO_ABRT_err[] = "gen_MEM_LOAD_ADDR_EA_B_NO_ABRT aborted\n";
#endif
static uint32_t gen_MEM_LOAD_ADDR_EA_B_NO_ABRT()
static uint32_t gen_MEM_LOAD_ADDR_EA_B_NO_ABRT(void)
{
uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
@@ -620,7 +620,7 @@ static uint32_t gen_MEM_LOAD_ADDR_EA_B_NO_ABRT()
#ifndef RELEASE_BUILD
static char gen_MEM_LOAD_ADDR_EA_W_NO_ABRT_err[] = "gen_MEM_LOAD_ADDR_EA_W_NO_ABRT aborted\n";
#endif
static uint32_t gen_MEM_LOAD_ADDR_EA_W_NO_ABRT()
static uint32_t gen_MEM_LOAD_ADDR_EA_W_NO_ABRT(void)
{
uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
@@ -690,7 +690,7 @@ static uint32_t gen_MEM_LOAD_ADDR_EA_W_NO_ABRT()
#ifndef RELEASE_BUILD
static char gen_MEM_LOAD_ADDR_EA_L_NO_ABRT_err[] = "gen_MEM_LOAD_ADDR_EA_L_NO_ABRT aborted\n";
#endif
static uint32_t gen_MEM_LOAD_ADDR_EA_L_NO_ABRT()
static uint32_t gen_MEM_LOAD_ADDR_EA_L_NO_ABRT(void)
{
uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
@@ -759,7 +759,7 @@ static uint32_t gen_MEM_LOAD_ADDR_EA_L_NO_ABRT()
#ifndef RELEASE_BUILD
static char gen_MEM_STORE_ADDR_EA_B_NO_ABRT_err[] = "gen_MEM_STORE_ADDR_EA_B_NO_ABRT aborted\n";
#endif
static uint32_t gen_MEM_STORE_ADDR_EA_B_NO_ABRT()
static uint32_t gen_MEM_STORE_ADDR_EA_B_NO_ABRT(void)
{
uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
@@ -820,7 +820,7 @@ static uint32_t gen_MEM_STORE_ADDR_EA_B_NO_ABRT()
#ifndef RELEASE_BUILD
static char gen_MEM_STORE_ADDR_EA_W_NO_ABRT_err[] = "gen_MEM_STORE_ADDR_EA_W_NO_ABRT aborted\n";
#endif
static uint32_t gen_MEM_STORE_ADDR_EA_W_NO_ABRT()
static uint32_t gen_MEM_STORE_ADDR_EA_W_NO_ABRT(void)
{
uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
@@ -887,7 +887,7 @@ static uint32_t gen_MEM_STORE_ADDR_EA_W_NO_ABRT()
#ifndef RELEASE_BUILD
static char gen_MEM_STORE_ADDR_EA_L_NO_ABRT_err[] = "gen_MEM_STORE_ADDR_EA_L_NO_ABRT aborted\n";
#endif
static uint32_t gen_MEM_STORE_ADDR_EA_L_NO_ABRT()
static uint32_t gen_MEM_STORE_ADDR_EA_L_NO_ABRT(void)
{
uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
@@ -950,7 +950,7 @@ static uint32_t gen_MEM_STORE_ADDR_EA_L_NO_ABRT()
return addr;
}
static uint32_t gen_MEM_CHECK_WRITE()
static uint32_t gen_MEM_CHECK_WRITE(void)
{
uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
@@ -1007,7 +1007,7 @@ static uint32_t gen_MEM_CHECK_WRITE()
return addr;
}
static uint32_t gen_MEM_CHECK_WRITE_W()
static uint32_t gen_MEM_CHECK_WRITE_W(void)
{
uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
@@ -1089,7 +1089,7 @@ static uint32_t gen_MEM_CHECK_WRITE_W()
return addr;
}
static uint32_t gen_MEM_CHECK_WRITE_L()
static uint32_t gen_MEM_CHECK_WRITE_L(void)
{
uint32_t addr = (uint32_t)&codeblock[block_current].data[block_pos];
@@ -1171,7 +1171,7 @@ static uint32_t gen_MEM_CHECK_WRITE_L()
return addr;
}
void codegen_init()
void codegen_init(void)
{
#ifdef _WIN32
codeblock = VirtualAlloc(NULL, (BLOCK_SIZE+1) * sizeof(codeblock_t), MEM_COMMIT, PAGE_EXECUTE_READWRITE);
@@ -1244,14 +1244,14 @@ void codegen_init()
#endif
}
void codegen_reset()
void codegen_reset(void)
{
memset(codeblock, 0, BLOCK_SIZE * sizeof(codeblock_t));
memset(codeblock_hash, 0, HASH_SIZE * sizeof(codeblock_t *));
mem_reset_page_blocks();
}
void dump_block()
void dump_block(void)
{
}
@@ -1512,7 +1512,7 @@ void codegen_block_start_recompile(codeblock_t *block)
codegen_accumulate_reset();
}
void codegen_block_remove()
void codegen_block_remove(void)
{
codeblock_t *block = &codeblock[block_current];
@@ -1521,7 +1521,7 @@ void codegen_block_remove()
recomp_page = -1;
}
void codegen_block_generate_end_mask()
void codegen_block_generate_end_mask(void)
{
codeblock_t *block = &codeblock[block_current];
uint32_t start_pc;
@@ -1581,7 +1581,7 @@ void codegen_block_generate_end_mask()
recomp_page = -1;
}
void codegen_block_end()
void codegen_block_end(void)
{
codeblock_t *block = &codeblock[block_current];
@@ -1618,7 +1618,7 @@ void codegen_block_end_recompile(codeblock_t *block)
block->flags &= ~CODEBLOCK_STATIC_TOP;
}
void codegen_flush()
void codegen_flush(void)
{
return;
}
@@ -1668,7 +1668,7 @@ int opcode_0f_modrm[256] =
0, 1, 1, 1, 0, 1, 0, 0, 1, 1, 1, 0, 1, 1, 1, 0 /*f0*/
};
void codegen_debug()
void codegen_debug(void)
{
}

10
src/codegen_new/codegen.c
View File

@@ -58,12 +58,12 @@ int has_ea;
codeblock_t *codeblock;
uint16_t *codeblock_hash;
void (*codegen_timing_start)();
void (*codegen_timing_start)(void);
void (*codegen_timing_prefix)(uint8_t prefix, uint32_t fetchdat);
void (*codegen_timing_opcode)(uint8_t opcode, uint32_t fetchdat, int op_32, uint32_t op_pc);
void (*codegen_timing_block_start)();
void (*codegen_timing_block_end)();
int (*codegen_timing_jump_cycles)();
void (*codegen_timing_block_start)(void);
void (*codegen_timing_block_end)(void);
int (*codegen_timing_jump_cycles)(void);
void codegen_timing_set(codegen_timing_t *timing)
{
@@ -81,7 +81,7 @@ static int last_op_ssegs;
static x86seg *last_op_ea_seg;
static uint32_t last_op_32;
void codegen_generate_reset()
void codegen_generate_reset(void)
{
last_op_ssegs = -1;
last_op_ea_seg = NULL;

54
src/codegen_new/codegen.h
View File

@@ -314,29 +314,29 @@ static inline void codegen_mark_code_present(codeblock_t *block, uint32_t start_
codegen_mark_code_present_multibyte(block, start_pc, len);
}
void codegen_init();
void codegen_close();
void codegen_reset();
void codegen_block_init(uint32_t phys_addr);
void codegen_block_remove();
void codegen_block_start_recompile(codeblock_t *block);
void codegen_block_end_recompile(codeblock_t *block);
void codegen_block_end();
void codegen_delete_block(codeblock_t *block);
void codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_pc, uint32_t old_pc);
void codegen_generate_seg_restore();
void codegen_set_op32();
void codegen_flush();
void codegen_check_flush(struct page_t *page, uint64_t mask, uint32_t phys_addr);
extern void codegen_init(void);
extern void codegen_close(void);
extern void codegen_reset(void);
extern void codegen_block_init(uint32_t phys_addr);
extern void codegen_block_remove(void);
extern void codegen_block_start_recompile(codeblock_t *block);
extern void codegen_block_end_recompile(codeblock_t *block);
extern void codegen_block_end(void);
extern void codegen_delete_block(codeblock_t *block);
extern void codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_pc, uint32_t old_pc);
extern void codegen_generate_seg_restore(void);
extern void codegen_set_op32(void);
extern void codegen_flush(void);
extern void codegen_check_flush(struct page_t *page, uint64_t mask, uint32_t phys_addr);
struct ir_data_t;
x86seg *codegen_generate_ea(struct ir_data_t *ir, x86seg *op_ea_seg, uint32_t fetchdat, int op_ssegs, uint32_t *op_pc, uint32_t op_32, int stack_offset);
void codegen_check_seg_read(codeblock_t *block, struct ir_data_t *ir, x86seg *seg);
void codegen_check_seg_write(codeblock_t *block, struct ir_data_t *ir, x86seg *seg);
extern void codegen_check_seg_read(codeblock_t *block, struct ir_data_t *ir, x86seg *seg);
extern void codegen_check_seg_write(codeblock_t *block, struct ir_data_t *ir, x86seg *seg);
int codegen_purge_purgable_list();
extern int codegen_purge_purgable_list(void);
/*Delete a random code block to free memory. This is obviously quite expensive, and
will only be called when the allocator is out of memory*/
void codegen_delete_random_block(int required_mem_block);
extern void codegen_delete_random_block(int required_mem_block);
extern int cpu_block_end;
extern uint32_t codegen_endpc;
@@ -346,21 +346,21 @@ extern int cpu_notreps;
extern int codegen_block_cycles;
extern void (*codegen_timing_start)();
extern void (*codegen_timing_start)(void);
extern void (*codegen_timing_prefix)(uint8_t prefix, uint32_t fetchdat);
extern void (*codegen_timing_opcode)(uint8_t opcode, uint32_t fetchdat, int op_32, uint32_t op_pc);
extern void (*codegen_timing_block_start)();
extern void (*codegen_timing_block_end)();
extern int (*codegen_timing_jump_cycles)();
extern void (*codegen_timing_block_start)(void);
extern void (*codegen_timing_block_end)(void);
extern int (*codegen_timing_jump_cycles)(void);
typedef struct codegen_timing_t
{
void (*start)();
void (*start)(void);
void (*prefix)(uint8_t prefix, uint32_t fetchdat);
void (*opcode)(uint8_t opcode, uint32_t fetchdat, int op_32, uint32_t op_pc);
void (*block_start)();
void (*block_end)();
int (*jump_cycles)();
void (*block_start)(void);
void (*block_end)(void);
int (*jump_cycles)(void);
} codegen_timing_t;
extern codegen_timing_t codegen_timing_pentium;
@@ -398,7 +398,7 @@ extern int codegen_reg_loaded[8];
extern int codegen_in_recompile;
void codegen_generate_reset();
void codegen_generate_reset(void);
int codegen_get_instruction_uop(codeblock_t *block, uint32_t pc, int *first_instruction, int *TOP);
void codegen_set_loop_start(struct ir_data_t *ir, int first_instruction);

2
src/codegen_new/codegen_accumulate.c
View File

@@ -36,7 +36,7 @@ void codegen_accumulate_flush(ir_data_t *ir)
acc_regs[0].count = 0;
}
void codegen_accumulate_reset()
void codegen_accumulate_reset(void)
{
acc_regs[0].count = 0;
}

2
src/codegen_new/codegen_accumulate.h
View File

@@ -9,4 +9,4 @@ struct ir_data_t;
void codegen_accumulate(struct ir_data_t *ir, int acc_reg, int delta);
void codegen_accumulate_flush(struct ir_data_t *ir);
void codegen_accumulate_reset();
void codegen_accumulate_reset(void);

2
src/codegen_new/codegen_allocator.c
View File

@@ -30,7 +30,7 @@ static uint8_t *mem_block_alloc = NULL;
int codegen_allocator_usage = 0;
void codegen_allocator_init()
void codegen_allocator_init(void)
{
int c;

2
src/codegen_new/codegen_allocator.h
View File

@@ -22,7 +22,7 @@
#define MEM_BLOCK_MASK (MEM_BLOCK_NR-1)
#define MEM_BLOCK_SIZE 0x3c0
void codegen_allocator_init();
void codegen_allocator_init(void);
/*Allocate a mem_block_t, and the associated backing memory.
If parent is non-NULL, then the new block will be added to the list in
parent->next*/

4
src/codegen_new/codegen_backend.h
View File

@@ -13,14 +13,14 @@
#error Dynamic recompiler not implemented on your platform
#endif
void codegen_backend_init();
void codegen_backend_init(void);
void codegen_backend_prologue(codeblock_t *block);
void codegen_backend_epilogue(codeblock_t *block);
struct ir_data_t;
struct uop_t;
struct ir_data_t *codegen_get_ir_data();
struct ir_data_t *codegen_get_ir_data(void);
typedef int (*uOpFn)(codeblock_t *codeblock, struct uop_t *uop);

2
src/codegen_new/codegen_backend_arm.c
View File

@@ -290,7 +290,7 @@ static void build_fp_round_routine(codeblock_t *block)
host_arm_MOV_REG(block, REG_PC, REG_LR);
}
void codegen_backend_init()
void codegen_backend_init(void)
{
codeblock_t *block;
int c;

2
src/codegen_new/codegen_backend_arm64.c
View File

@@ -277,7 +277,7 @@ static void build_fp_round_routine(codeblock_t *block, int is_quad)
host_arm64_RET(block, REG_X30);
}
void codegen_backend_init()
void codegen_backend_init(void)
{
codeblock_t *block;
int c;

2
src/codegen_new/codegen_backend_x86-64.c
View File

@@ -290,7 +290,7 @@ static void build_loadstore_routines(codeblock_t *block)
build_store_routine(block, 8, 1);
}
void codegen_backend_init()
void codegen_backend_init(void)
{
codeblock_t *block;
int c;

2
src/codegen_new/codegen_backend_x86.c
View File

@@ -264,7 +264,7 @@ static void build_loadstore_routines(codeblock_t *block)
build_store_routine(block, 8, 1);
}
void codegen_backend_init()
void codegen_backend_init(void)
{
codeblock_t *block;
int c;

24
src/codegen_new/codegen_block.c
View File

@@ -154,7 +154,7 @@ static void block_dirty_list_remove(codeblock_t *block)
block->flags &= ~CODEBLOCK_IN_DIRTY_LIST;
}
int codegen_purge_purgable_list()
int codegen_purge_purgable_list(void)
{
if (purgable_page_list_head)
{
@@ -171,7 +171,7 @@ int codegen_purge_purgable_list()
return 0;
}
static codeblock_t *block_free_list_get()
static codeblock_t *block_free_list_get(void)
{
codeblock_t *block = NULL;
@@ -210,7 +210,7 @@ static codeblock_t *block_free_list_get()
return block;
}
void codegen_init()
void codegen_init(void)
{
int c;
@@ -227,7 +227,7 @@ void codegen_init()
#endif
}
void codegen_close()
void codegen_close(void)
{
#ifdef DEBUG_EXTRA
pclog("Instruction counts :\n");
@@ -256,7 +256,7 @@ void codegen_close()
#endif
}
void codegen_reset()
void codegen_reset(void)
{
int c;
@@ -284,7 +284,7 @@ void codegen_reset()
}
}
void dump_block()
void dump_block(void)
{
/* codeblock_t *block = pages[0x119000 >> 12].block;
@@ -574,7 +574,7 @@ void codegen_block_init(uint32_t phys_addr)
static ir_data_t *ir_data;
ir_data_t *codegen_get_ir_data()
ir_data_t *codegen_get_ir_data(void)
{
return ir_data;
}
@@ -645,7 +645,7 @@ void codegen_block_start_recompile(codeblock_t *block)
}
void codegen_block_remove()
void codegen_block_remove(void)
{
codeblock_t *block = &codeblock[block_current];
@@ -654,7 +654,7 @@ void codegen_block_remove()
recomp_page = -1;
}
void codegen_block_generate_end_mask_recompile()
void codegen_block_generate_end_mask_recompile(void)
{
codeblock_t *block = &codeblock[block_current];
page_t *p;
@@ -721,7 +721,7 @@ void codegen_block_generate_end_mask_recompile()
recomp_page = -1;
}
void codegen_block_generate_end_mask_mark()
void codegen_block_generate_end_mask_mark(void)
{
codeblock_t *block = &codeblock[block_current];
uint32_t start_pc;
@@ -799,7 +799,7 @@ void codegen_block_generate_end_mask_mark()
recomp_page = -1;
}
void codegen_block_end()
void codegen_block_end(void)
{
codeblock_t *block = &codeblock[block_current];
@@ -828,7 +828,7 @@ void codegen_block_end_recompile(codeblock_t *block)
codegen_ir_compile(ir_data, block);
}
void codegen_flush()
void codegen_flush(void)
{
return;
}

2
src/codegen_new/codegen_ir.c
View File

@@ -15,7 +15,7 @@ static ir_data_t ir_block;
static int codegen_unroll_start, codegen_unroll_count;
static int codegen_unroll_first_instruction;
ir_data_t *codegen_ir_init()
ir_data_t *codegen_ir_init(void)
{
ir_block.wr_pos = 0;

2
src/codegen_new/codegen_ir.h
View File

@@ -1,6 +1,6 @@
#include "codegen_ir_defs.h"
ir_data_t *codegen_ir_init();
ir_data_t *codegen_ir_init(void);
void codegen_ir_set_unroll(int count, int start, int first_instruction);
void codegen_ir_compile(ir_data_t *ir, codeblock_t *block);

4
src/codegen_new/codegen_ops_branch.c
View File

@@ -13,11 +13,11 @@
#include "codegen_ops_helpers.h"
#include "codegen_ops_mov.h"
static int NF_SET_01()
static int NF_SET_01(void)
{
return NF_SET() ? 1 : 0;
}
static int VF_SET_01()
static int VF_SET_01(void)
{
return VF_SET() ? 1 : 0;
}

4
src/codegen_new/codegen_reg.c
View File

@@ -184,7 +184,7 @@ struct
[IREG_temp1d] = {REG_DOUBLE, (void *)48, REG_FP, REG_VOLATILE},
};
void codegen_reg_mark_as_required()
void codegen_reg_mark_as_required(void)
{
int reg;
@@ -224,7 +224,7 @@ int reg_is_native_size(ir_reg_t ir_reg)
return 0;
}
void codegen_reg_reset()
void codegen_reg_reset(void)
{
int c;

4
src/codegen_new/codegen_reg.h
View File

@@ -395,7 +395,7 @@ static inline int ir_reg_is_invalid(ir_reg_t ir_reg)
struct ir_data_t;
void codegen_reg_reset();
void codegen_reg_reset(void);
/*Write back all dirty registers*/
void codegen_reg_flush(struct ir_data_t *ir, codeblock_t *block);
/*Write back and evict all registers*/
@@ -414,6 +414,6 @@ ir_host_reg_t codegen_reg_alloc_write_reg(codeblock_t *block, ir_reg_t ir_reg);
void codegen_reg_rename(codeblock_t *block, ir_reg_t src, ir_reg_t dst);
void codegen_reg_mark_as_required();
void codegen_reg_mark_as_required(void);
void codegen_reg_process_dead_list(struct ir_data_t *ir);
#endif

6
src/cpu/386_common.c
View File

@@ -1452,7 +1452,7 @@ x86_int_sw_rm(int num)
void
x86illegal()
x86illegal(void)
{
x86_int(6);
}
@@ -1550,14 +1550,14 @@ idivl(int32_t val)
void
cpu_386_flags_extract()
cpu_386_flags_extract(void)
{
flags_extract();
}
void
cpu_386_flags_rebuild()
cpu_386_flags_rebuild(void)
{
flags_rebuild();
}

22
src/cpu/386_common.h
View File

@@ -225,25 +225,25 @@ static __inline void *get_ram_ptr(uint32_t a)
}
}
static __inline uint8_t getbyte()
static __inline uint8_t getbyte(void)
{
cpu_state.pc++;
return fastreadb(cs + (cpu_state.pc - 1));
}
static __inline uint16_t getword()
static __inline uint16_t getword(void)
{
cpu_state.pc+=2;
return fastreadw(cs+(cpu_state.pc-2));
}
static __inline uint32_t getlong()
static __inline uint32_t getlong(void)
{
cpu_state.pc+=4;
return fastreadl(cs+(cpu_state.pc-4));
}
static __inline uint64_t getquad()
static __inline uint64_t getquad(void)
{
cpu_state.pc+=8;
return fastreadl(cs+(cpu_state.pc-8)) | ((uint64_t)fastreadl(cs+(cpu_state.pc-4)) << 32);
@@ -251,7 +251,7 @@ static __inline uint64_t getquad()
static __inline uint8_t geteab()
static __inline uint8_t geteab(void)
{
if (cpu_mod == 3)
return (cpu_rm & 4) ? cpu_state.regs[cpu_rm & 3].b.h : cpu_state.regs[cpu_rm&3].b.l;
@@ -260,7 +260,7 @@ static __inline uint8_t geteab()
return readmemb(easeg, cpu_state.eaaddr);
}
static __inline uint16_t geteaw()
static __inline uint16_t geteaw(void)
{
if (cpu_mod == 3)
return cpu_state.regs[cpu_rm].w;
@@ -269,7 +269,7 @@ static __inline uint16_t geteaw()
return readmemw(easeg, cpu_state.eaaddr);
}
static __inline uint32_t geteal()
static __inline uint32_t geteal(void)
{
if (cpu_mod == 3)
return cpu_state.regs[cpu_rm].l;
@@ -278,22 +278,22 @@ static __inline uint32_t geteal()
return readmeml(easeg, cpu_state.eaaddr);
}
static __inline uint64_t geteaq()
static __inline uint64_t geteaq(void)
{
return readmemq(easeg, cpu_state.eaaddr);
}
static __inline uint8_t geteab_mem()
static __inline uint8_t geteab_mem(void)
{
if (eal_r) return *(uint8_t *)eal_r;
return readmemb(easeg,cpu_state.eaaddr);
}
static __inline uint16_t geteaw_mem()
static __inline uint16_t geteaw_mem(void)
{
if (eal_r) return *(uint16_t *)eal_r;
return readmemw(easeg,cpu_state.eaaddr);
}
static __inline uint32_t geteal_mem()
static __inline uint32_t geteal_mem(void)
{
if (eal_r) return *eal_r;
return readmeml(easeg,cpu_state.eaaddr);

4
src/cpu/386_dynarec.c
View File

@@ -260,7 +260,7 @@ static void prefetch_run(int instr_cycles, int bytes, int modrm, int reads, int
prefetch_bytes = 16;
}
static void prefetch_flush()
static void prefetch_flush(void)
{
prefetch_bytes = 0;
}
@@ -541,7 +541,7 @@ exec386_dynarec_dyn(void)
if (valid_block && block->was_recompiled)
#endif
{
void (*code)() = (void *)&block->data[BLOCK_START];
void (*code)(void) = (void *)&block->data[BLOCK_START];
#ifndef USE_NEW_DYNAREC
codeblock_hash[hash] = block;

4
src/cpu/386_ops.h
View File

@@ -80,7 +80,7 @@ static __inline void PUSH_L(uint32_t val)
}
}
static __inline uint16_t POP_W()
static __inline uint16_t POP_W(void)
{
uint16_t ret;
if (stack32)
@@ -96,7 +96,7 @@ static __inline uint16_t POP_W()
return ret;
}
static __inline uint32_t POP_L()
static __inline uint32_t POP_L(void)
{
uint32_t ret;
if (stack32)

4
src/cpu/808x.c
View File

@@ -494,7 +494,7 @@ pfq_fetchw(void)
}
static uint16_t
pfq_fetch()
pfq_fetch(void)
{
if (opcode & 1)
return pfq_fetchw();
@@ -520,7 +520,7 @@ pfq_add(int c, int add)
/* Clear the prefetch queue - called on reset and on anything that affects either CS or IP. */
static void
pfq_clear()
pfq_clear(void)
{
pfq_pos = 0;
prefetching = 0;

6
src/cpu/codegen_public.h
View File

@@ -50,11 +50,11 @@
#endif
extern void codegen_init();
extern void codegen_init(void);
#ifdef USE_NEW_DYNAREC
extern void codegen_close();
extern void codegen_close(void);
#endif
extern void codegen_flush();
extern void codegen_flush(void);
/*Current physical page of block being recompiled. -1 if no recompilation taking place */

6
src/cpu/codegen_timing_486.c
View File

@@ -283,12 +283,12 @@ static inline int COUNT(int *c, int op_32)
return *c;
}
void codegen_timing_486_block_start()
void codegen_timing_486_block_start(void)
{
regmask_modified = 0;
}
void codegen_timing_486_start()
void codegen_timing_486_start(void)
{
timing_count = 0;
last_prefix = 0;
@@ -406,7 +406,7 @@ void codegen_timing_486_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, uin
regmask_modified = get_dstdep_mask(deps[opcode], fetchdat, bit8);
}
void codegen_timing_486_block_end()
void codegen_timing_486_block_end(void)
{
}

6
src/cpu/codegen_timing_686.c
View File

@@ -774,13 +774,13 @@ static inline int COUNT(uint32_t c, int op_32)
return c & CYCLES_MASK;
}
void codegen_timing_686_block_start()
void codegen_timing_686_block_start(void)
{
prev_full = decode_delay = 0;
regmask_modified = last_regmask_modified = 0;
}
void codegen_timing_686_start()
void codegen_timing_686_start(void)
{
decode_delay = 0;
last_prefix = 0;
@@ -1036,7 +1036,7 @@ void codegen_timing_686_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, uin
}
}
void codegen_timing_686_block_end()
void codegen_timing_686_block_end(void)
{
if (prev_full)
{

10
src/cpu/codegen_timing_k6.c
View File

@@ -1858,7 +1858,7 @@ static int fpu_st_timestamp[8];
dependent uop chains*/
static int last_uop_timestamp = 0;
void decode_flush()
void decode_flush(void)
{
int c;
int uop_timestamp = 0;
@@ -2112,7 +2112,7 @@ static void decode_instruction(const risc86_instruction_t *ins, uint64_t deps, u
}
}
void codegen_timing_k6_block_start()
void codegen_timing_k6_block_start(void)
{
int c;
@@ -2136,7 +2136,7 @@ void codegen_timing_k6_block_start()
fpu_st_timestamp[c] = 0;
}
void codegen_timing_k6_start()
void codegen_timing_k6_start(void)
{
if (cpu_s->cpu_type == CPU_K6)
{
@@ -2324,7 +2324,7 @@ void codegen_timing_k6_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, uint
codegen_block_cycles += (last_complete_timestamp - old_last_complete_timestamp);
}
void codegen_timing_k6_block_end()
void codegen_timing_k6_block_end(void)
{
if (decode_buffer.nr_uops)
{
@@ -2334,7 +2334,7 @@ void codegen_timing_k6_block_end()
}
}
int codegen_timing_k6_jump_cycles()
int codegen_timing_k6_jump_cycles(void)
{
if (decode_buffer.nr_uops)
return 1;

10
src/cpu/codegen_timing_p6.c
View File

@@ -1691,7 +1691,7 @@ static int fpu_st_timestamp[8];
dependent uop chains*/
static int last_uop_timestamp = 0;
void decode_flush_p6()
void decode_flush_p6(void)
{
int c;
int start_timestamp, uop_timestamp = 0;
@@ -1926,7 +1926,7 @@ static void decode_instruction(const macro_op_t *ins, uint64_t deps, uint32_t fe
}
}
void codegen_timing_p6_block_start()
void codegen_timing_p6_block_start(void)
{
int c;
@@ -1946,7 +1946,7 @@ void codegen_timing_p6_block_start()
fpu_st_timestamp[c] = 0;
}
void codegen_timing_p6_start()
void codegen_timing_p6_start(void)
{
if (cpu_s->cpu_type == CPU_PENTIUMPRO)
{
@@ -2083,7 +2083,7 @@ void codegen_timing_p6_opcode(uint8_t opcode, uint32_t fetchdat, int op_32, uint
codegen_block_cycles += (last_complete_timestamp - old_last_complete_timestamp);
}
void codegen_timing_p6_block_end()
void codegen_timing_p6_block_end(void)
{
if (decode_buffer.nr_uops)
{
@@ -2093,7 +2093,7 @@ void codegen_timing_p6_block_end()
}
}
int codegen_timing_p6_jump_cycles()
int codegen_timing_p6_jump_cycles(void)
{
if (decode_buffer.nr_uops)
return 1;

6
src/cpu/codegen_timing_pentium.c
View File

@@ -931,12 +931,12 @@ static inline int codegen_timing_instr_length(uint64_t timing, uint32_t fetchdat
return len;
}
void codegen_timing_pentium_block_start()
void codegen_timing_pentium_block_start(void)
{
u_pipe_full = decode_delay = decode_delay_offset = 0;
}
void codegen_timing_pentium_start()
void codegen_timing_pentium_start(void)
{
last_prefix = 0;
prefixes = 0;
@@ -1296,7 +1296,7 @@ nopair:
addr_regmask = 0;
}
void codegen_timing_pentium_block_end()
void codegen_timing_pentium_block_end(void)
{
if (u_pipe_full)
{

6
src/cpu/codegen_timing_winchip.c
View File

@@ -283,12 +283,12 @@ static inline int COUNT(int *c, int op_32)
return *c;
}
void codegen_timing_winchip_block_start()
void codegen_timing_winchip_block_start(void)
{
regmask_modified = 0;
}
void codegen_timing_winchip_start()
void codegen_timing_winchip_start(void)
{
timing_count = 0;
last_prefix = 0;
@@ -406,7 +406,7 @@ void codegen_timing_winchip_opcode(uint8_t opcode, uint32_t fetchdat, int op_32,
regmask_modified = get_dstdep_mask(deps[opcode], fetchdat, bit8);
}
void codegen_timing_winchip_block_end()
void codegen_timing_winchip_block_end(void)
{
}

6
src/cpu/codegen_timing_winchip2.c
View File

@@ -541,14 +541,14 @@ static void codegen_instruction(uint32_t *timings, uint64_t *deps, uint8_t opcod
}
}
static void codegen_timing_winchip2_block_start()
static void codegen_timing_winchip2_block_start(void)
{
regmask_modified = 0;
decode_delay = decode_delay_offset = 0;
u_pipe_full = 0;
}
static void codegen_timing_winchip2_start()
static void codegen_timing_winchip2_start(void)
{
timing_count = 0;
last_prefix = 0;
@@ -719,7 +719,7 @@ static void codegen_timing_winchip2_opcode(uint8_t opcode, uint32_t fetchdat, in
regmask_modified = get_dstdep_mask(deps[opcode], fetchdat, bit8);
}
static void codegen_timing_winchip2_block_end()
static void codegen_timing_winchip2_block_end(void)
{
if (u_pipe_full)
{

4
src/cpu/cpu.h
View File

@@ -741,7 +741,7 @@ extern void cpu_fast_off_advance(void);
extern void cpu_fast_off_period_set(uint16_t vla, double period);
extern void cpu_fast_off_reset(void);
extern void smi_raise();
extern void nmi_raise();
extern void smi_raise(void);
extern void nmi_raise(void);
#endif /*EMU_CPU_H*/

4
src/cpu/x86.h
View File

@@ -77,7 +77,7 @@ enum
extern void x86_doabrt(int x86_abrt);
extern void x86illegal();
extern void x86seg_reset();
extern void x86illegal(void);
extern void x86seg_reset(void);
extern void x86gpf(char *s, uint16_t error);
extern void x86gpf_expected(char *s, uint16_t error);

24
src/cpu/x86_flags.h
View File

@@ -58,7 +58,7 @@ enum
#endif
};
static __inline int ZF_SET()
static __inline int ZF_SET(void)
{
switch (cpu_state.flags_op)
{
@@ -117,7 +117,7 @@ static __inline int ZF_SET()
#endif
}
static __inline int NF_SET()
static __inline int NF_SET(void)
{
switch (cpu_state.flags_op)
{
@@ -184,7 +184,7 @@ static __inline int NF_SET()
#endif
}
static __inline int PF_SET()
static __inline int PF_SET(void)
{
switch (cpu_state.flags_op)
{
@@ -243,7 +243,7 @@ static __inline int PF_SET()
#endif
}
static __inline int VF_SET()
static __inline int VF_SET(void)
{
switch (cpu_state.flags_op)
{
@@ -336,7 +336,7 @@ static __inline int VF_SET()
#endif
}
static __inline int AF_SET()
static __inline int AF_SET(void)
{
switch (cpu_state.flags_op)
{
@@ -409,7 +409,7 @@ static __inline int AF_SET()
#endif
}
static __inline int CF_SET()
static __inline int CF_SET(void)
{
switch (cpu_state.flags_op)
{
@@ -502,7 +502,7 @@ static __inline int CF_SET()
#endif
}
static __inline void flags_rebuild()
static __inline void flags_rebuild(void)
{
if (cpu_state.flags_op != FLAGS_UNKNOWN)
{
@@ -518,12 +518,12 @@ static __inline void flags_rebuild()
}
}
static __inline void flags_extract()
static __inline void flags_extract(void)
{
cpu_state.flags_op = FLAGS_UNKNOWN;
}
static __inline void flags_rebuild_c()
static __inline void flags_rebuild_c(void)
{
if (cpu_state.flags_op != FLAGS_UNKNOWN)
{
@@ -535,7 +535,7 @@ static __inline void flags_rebuild_c()
}
#ifdef USE_NEW_DYNAREC
static __inline int flags_res_valid()
static __inline int flags_res_valid(void)
{
if (cpu_state.flags_op == FLAGS_UNKNOWN ||
(cpu_state.flags_op >= FLAGS_ROL8 && cpu_state.flags_op <= FLAGS_ROR32))
@@ -779,5 +779,5 @@ static __inline void setsbc32(uint32_t a, uint32_t b)
}
#endif
extern void cpu_386_flags_extract();
extern void cpu_386_flags_rebuild();
extern void cpu_386_flags_extract(void);
extern void cpu_386_flags_rebuild(void);

6
src/cpu/x86seg.c
View File

@@ -94,7 +94,7 @@ seg_reset(x86seg *s)
void
x86seg_reset()
x86seg_reset(void)
{
seg_reset(&cpu_state.seg_cs);
seg_reset(&cpu_state.seg_ds);
@@ -838,7 +838,7 @@ PUSHL(uint32_t v)
uint16_t
POPW()
POPW(void)
{
uint16_t tempw;
if (stack32) {
@@ -857,7 +857,7 @@ POPW()
uint32_t
POPL()
POPL(void)
{
uint32_t templ;

6
src/cpu/x87.c
View File

@@ -47,7 +47,7 @@ fpu_log(const char *fmt, ...)
#define X87_TAG_EMPTY 3
#ifdef USE_NEW_DYNAREC
uint16_t x87_gettag()
uint16_t x87_gettag(void)
{
uint16_t ret = 0;
int c;
@@ -84,7 +84,7 @@ void x87_settag(uint16_t new_tag)
}
}
#else
uint16_t x87_gettag()
uint16_t x87_gettag(void)
{
uint16_t ret = 0;
int c;
@@ -115,7 +115,7 @@ void x87_settag(uint16_t new_tag)
#ifdef ENABLE_808X_LOG
void x87_dumpregs()
void x87_dumpregs(void)
{
if (cpu_state.ismmx)
{

6
src/cpu/x87.h
View File

@@ -6,7 +6,7 @@
extern uint32_t x87_pc_off,x87_op_off;
extern uint16_t x87_pc_seg,x87_op_seg;
static __inline void x87_set_mmx()
static __inline void x87_set_mmx(void)
{
uint64_t *p;
cpu_state.TOP = 0;
@@ -15,7 +15,7 @@ static __inline void x87_set_mmx()
cpu_state.ismmx = 1;
}
static __inline void x87_emms()
static __inline void x87_emms(void)
{
uint64_t *p;
p = (uint64_t *)cpu_state.tag;
@@ -24,7 +24,7 @@ static __inline void x87_emms()
}
uint16_t x87_gettag();
uint16_t x87_gettag(void);
void x87_settag(uint16_t new_tag);
#define TAG_EMPTY 0

6
src/cpu/x87_ops.h
View File

@@ -97,7 +97,7 @@ static int rounding_modes[4] = {FE_TONEAREST, FE_DOWNWARD, FE_UPWARD, FE_TOWARDZ
} while (0)
#endif
static __inline void x87_checkexceptions()
static __inline void x87_checkexceptions(void)
{
}
@@ -139,7 +139,7 @@ static __inline void x87_push_u64(uint64_t i)
#endif
}
static __inline double x87_pop()
static __inline double x87_pop(void)
{
double t = cpu_state.ST[cpu_state.TOP&7];
cpu_state.tag[cpu_state.TOP&7] = TAG_EMPTY;
@@ -242,7 +242,7 @@ static __inline int64_t x87_fround(double b)
#include "x87_ops_conv.h"
static __inline double x87_ld80()
static __inline double x87_ld80(void)
{
x87_conv_t test;
test.eind.ll = readmeml(easeg,cpu_state.eaaddr);

8
src/cpu/x87_ops_misc.h
View File

@@ -119,7 +119,7 @@ static int opFSTP(uint32_t fetchdat)
static int FSTOR()
static int FSTOR(void)
{
uint64_t *p;
FP_ENTER();
@@ -191,7 +191,7 @@ static int opFSTOR_a32(uint32_t fetchdat)
}
#endif
static int FSAVE()
static int FSAVE(void)
{
uint64_t *p;
@@ -751,7 +751,7 @@ static int opFCOS(uint32_t fetchdat)
#endif
static int FLDENV()
static int FLDENV(void)
{
FP_ENTER();
switch ((cr0 & 1) | (cpu_state.op32 & 0x100))
@@ -828,7 +828,7 @@ static int opFLDCW_a32(uint32_t fetchdat)
}
#endif
static int FSTENV()
static int FSTENV(void)
{
FP_ENTER();
cpu_state.npxs = (cpu_state.npxs & ~(7 << 11)) | ((cpu_state.TOP & 7) << 11);

2
src/device/hwm.c
View File

@@ -31,7 +31,7 @@
hwm_values_t hwm_values;
uint16_t
hwm_get_vcore()
hwm_get_vcore(void)
{
/* Determine Vcore for the active CPU. */
return cpu_s->voltage;

4
src/device/keyboard_xt.c
View File

@@ -367,7 +367,7 @@ kbd_log(const char *fmt, ...)
#endif
static uint8_t
get_fdd_switch_settings()
get_fdd_switch_settings(void)
{
int i, fdd_count = 0;
@@ -384,7 +384,7 @@ get_fdd_switch_settings()
}
static uint8_t
get_videomode_switch_settings()
get_videomode_switch_settings(void)
{
if (video_is_mda())

2
src/device/mouse.c
View File

@@ -87,7 +87,7 @@ static mouse_t mouse_devices[] = {
static const device_t *mouse_curr;
static void *mouse_priv;
static int mouse_nbut;
static int (*mouse_dev_poll)();
static int (*mouse_dev_poll)(int x, int y, int z, int b, void *priv);
#ifdef ENABLE_MOUSE_LOG
int mouse_do_log = ENABLE_MOUSE_LOG;

8
src/discord.c
View File

@@ -132,7 +132,7 @@ discord_update_activity(int paused)
}
int
discord_load()
discord_load(void)
{
if (discord_handle != NULL)
return (1);
@@ -152,7 +152,7 @@ discord_load()
}
void
discord_init()
discord_init(void)
{
enum EDiscordResult result;
struct DiscordCreateParams params;
@@ -177,7 +177,7 @@ discord_init()
}
void
discord_close()
discord_close(void)
{
if (discord_core != NULL)
discord_core->destroy(discord_core);
@@ -187,7 +187,7 @@ discord_close()
}
void
discord_run_callbacks()
discord_run_callbacks(void)
{
if (discord_core == NULL)
return;

2
src/disk/hdd.c
View File

@@ -437,7 +437,7 @@ static hdd_preset_t hdd_speed_presets[] = {
};
int
hdd_preset_get_num()
hdd_preset_get_num(void)
{
return sizeof(hdd_speed_presets) / sizeof(hdd_preset_t);
}

2
src/include/86box/86box.h
View File

@@ -162,7 +162,7 @@ extern void set_screen_size_monitor(int x, int y, int monitor_index);
extern void reset_screen_size(void);
extern void reset_screen_size_monitor(int monitor_index);
extern void set_screen_size_natural(void);
extern void update_mouse_msg();
extern void update_mouse_msg(void);
#if 0
extern void pc_reload(wchar_t *fn);
#endif

21
src/include/86box/bswap.h
View File

@@ -73,6 +73,7 @@
)
#endif /*HAVE_BYTESWAP_H*/
#if __GNUC__ >= 10
#if defined __has_builtin && __has_builtin(__builtin_bswap16)
#define bswap16(x) __builtin_bswap16(x)
#else
@@ -81,7 +82,14 @@ static __inline uint16_t bswap16(uint16_t x)
return bswap_16(x);
}
#endif
#else
static __inline uint16_t bswap16(uint16_t x)
{
return bswap_16(x);
}
#endif
#if __GNUC__ >= 10
#if defined __has_builtin && __has_builtin(__builtin_bswap32)
#define bswap32(x) __builtin_bswap32(x)
#else
@@ -90,7 +98,14 @@ static __inline uint32_t bswap32(uint32_t x)
return bswap_32(x);
}
#endif
#else
static __inline uint32_t bswap32(uint32_t x)
{
return bswap_32(x);
}
#endif
#if __GNUC__ >= 10
#if defined __has_builtin && __has_builtin(__builtin_bswap64)
#define bswap64(x) __builtin_bswap64(x)
#else
@@ -99,6 +114,12 @@ static __inline uint64_t bswap64(uint64_t x)
return bswap_64(x);
}
#endif
#else
static __inline uint64_t bswap64(uint64_t x)
{
return bswap_64(x);
}
#endif
static __inline void bswap16s(uint16_t *s)
{

8
src/include/86box/discord.h
View File

@@ -23,11 +23,11 @@ extern "C" {
extern int discord_loaded;
extern int discord_load();
extern void discord_init();
extern void discord_close();
extern int discord_load(void);
extern void discord_init(void);
extern void discord_close(void);
extern void discord_update_activity(int paused);
extern void discord_run_callbacks();
extern void discord_run_callbacks(void);
#ifdef __cplusplus
}

2
src/include/86box/hdd.h
View File

@@ -213,7 +213,7 @@ extern int image_is_vhd(const char *s, int check_signature);
extern double hdd_timing_write(hard_disk_t *hdd, uint32_t addr, uint32_t len);
extern double hdd_timing_read(hard_disk_t *hdd, uint32_t addr, uint32_t len);
extern double hdd_seek_get_time(hard_disk_t *hdd, uint32_t dst_addr, uint8_t operation, uint8_t continuous, double max_seek_time);
int hdd_preset_get_num();
int hdd_preset_get_num(void);
const char *hdd_preset_getname(int preset);
extern const char *hdd_preset_get_internal_name(int preset);
extern int hdd_preset_get_from_internal_name(char *s);

2
src/include/86box/hwm.h
View File

@@ -38,7 +38,7 @@ typedef struct {
} lm75_t;
/* hwm.c */
extern uint16_t hwm_get_vcore();
extern uint16_t hwm_get_vcore(void);
/* hwm_lm75.c */
extern void lm75_remap(lm75_t *dev, uint8_t addr);

2
src/include/86box/i2c.h
View File

@@ -62,6 +62,6 @@ extern void i2c_gpio_close(void *dev_handle);
extern void i2c_gpio_set(void *dev_handle, uint8_t scl, uint8_t sda);
extern uint8_t i2c_gpio_get_scl(void *dev_handle);
extern uint8_t i2c_gpio_get_sda(void *dev_handle);
extern void *i2c_gpio_get_bus();
extern void *i2c_gpio_get_bus(void *dev_handle);
#endif /*EMU_I2C_H*/

8
src/include/86box/i8080.h
View File

@@ -43,10 +43,10 @@ typedef struct i8080
uint16_t* cpu_flags;
void (*writemembyte)(uint32_t, uint8_t);
uint8_t (*readmembyte)(uint32_t);
void (*startclock)();
void (*endclock)();
void (*checkinterrupts)();
uint8_t (*fetchinstruction)();
void (*startclock)(void);
void (*endclock)(void);
void (*checkinterrupts)(void);
uint8_t (*fetchinstruction)(void *);
} i8080;
#define C_FLAG_I8080 (1 << 0)

4
src/include/86box/m_xt_xi8088.h
View File

@@ -5,9 +5,9 @@
extern const device_t xi8088_device;
uint8_t xi8088_turbo_get();
uint8_t xi8088_turbo_get(void);
void xi8088_turbo_set(uint8_t value);
void xi8088_bios_128kb_set(int val);
int xi8088_bios_128kb();
int xi8088_bios_128kb(void);
#endif /*MACHINE_XI80888_H*/

2
src/include/86box/machine_status.h
View File

@@ -27,6 +27,6 @@ typedef struct {
extern machine_status_t machine_status;
extern void machine_status_init();
extern void machine_status_init(void);
#endif /*EMU_MACHINE_STATUS_H*/

10
src/include/86box/midi.h
View File

@@ -25,13 +25,13 @@ extern char *midi_out_device_get_internal_name(int card);
extern char *midi_in_device_get_internal_name(int card);
extern int midi_out_device_get_from_internal_name(char *s);
extern int midi_in_device_get_from_internal_name(char *s);
extern void midi_out_device_init();
extern void midi_in_device_init();
extern void midi_out_device_init(void);
extern void midi_in_device_init(void);
typedef struct midi_device_t {
void (*play_sysex)(uint8_t *sysex, unsigned int len);
void (*play_msg)(uint8_t *msg);
void (*poll)();
void (*poll)(void);
int (*write)(uint8_t val);
} midi_device_t;
@@ -60,13 +60,13 @@ extern midi_t *midi_out, *midi_in;
extern void midi_out_init(midi_device_t *device);
extern void midi_in_init(midi_device_t *device, midi_t **mididev);
extern void midi_out_close();
extern void midi_out_close(void);
extern void midi_in_close(void);
extern void midi_raw_out_rt_byte(uint8_t val);
extern void midi_raw_out_thru_rt_byte(uint8_t val);
extern void midi_raw_out_byte(uint8_t val);
extern void midi_clear_buffer(void);
extern void midi_poll();
extern void midi_poll(void);
extern void midi_in_handler(int set, void (*msg)(void *p, uint8_t *msg, uint32_t len), int (*sysex)(void *p, uint8_t *buffer, uint32_t len, int abort), void *p);
extern void midi_in_handlers_clear(void);

2
src/include/86box/mo.h
View File

@@ -168,7 +168,7 @@ extern void mo_hard_reset(void);
extern void mo_reset(scsi_common_t *sc);
extern int mo_load(mo_t *dev, char *fn);
extern void mo_close();
extern void mo_close(void);
#ifdef __cplusplus
}

2
src/include/86box/nvr.h
View File

@@ -111,7 +111,7 @@ extern int nvr_save(void);
extern int nvr_is_leap(int year);
extern int nvr_get_days(int month, int year);
extern void nvr_time_sync();
extern void nvr_time_sync(void);
extern void nvr_time_get(struct tm *);
extern void nvr_time_set(struct tm *);

2
src/include/86box/pci.h
View File

@@ -113,7 +113,7 @@ extern uint8_t pci_get_int(uint8_t card, uint8_t pci_int);
extern void pci_reset(void);
extern void pci_init(int type);
extern uint8_t pci_register_bus();
extern uint8_t pci_register_bus(void);
extern void pci_set_pmc(uint8_t pmc);
extern void pci_remap_bus(uint8_t bus_index, uint8_t bus_number);
extern void pci_relocate_slot(int type, int new_slot);

2
src/include/86box/plat.h
View File

@@ -106,7 +106,7 @@ extern int plat_getcwd(char *bufp, int max);
extern int plat_chdir(char *path);
extern void plat_tempfile(char *bufp, char *prefix, char *suffix);
extern void plat_get_exe_name(char *s, int size);
extern void plat_init_rom_paths();
extern void plat_init_rom_paths(void);
extern int plat_dir_check(char *path);
extern int plat_dir_create(char *path);
extern void *plat_mmap(size_t size, uint8_t executable);

2
src/include/86box/snd_resid.h
View File

@@ -4,7 +4,7 @@
#ifdef __cplusplus
extern "C" {
#endif
void *sid_init();
void *sid_init(void);
void sid_close(void *p);
void sid_reset(void *p);
uint8_t sid_read(uint16_t addr, void *p);

2
src/include/86box/snd_speaker.h
View File

@@ -25,7 +25,7 @@ extern int speaker_mute;
extern int speaker_gated;
extern int speaker_enable, was_speaker_enable;
extern void speaker_init();
extern void speaker_init(void);
extern void speaker_set_count(uint8_t new_m, int new_count);
extern void speaker_update(void);

2
src/include/86box/vid_nga.h
View File

@@ -42,7 +42,7 @@ void nga_write(uint32_t addr, uint8_t val, void *priv);
uint8_t nga_read(uint32_t addr, void *priv);
void nga_poll(void *priv);
void nga_close(void *priv);
void nga_mdaattr_rebuild();
void nga_mdaattr_rebuild(void);
#ifdef EMU_DEVICE_H
extern const device_config_t nga_config[];

2
src/include/86box/vid_ogc.h
View File

@@ -42,7 +42,7 @@ void ogc_write(uint32_t addr, uint8_t val, void *priv);
uint8_t ogc_read(uint32_t addr, void *priv);
void ogc_poll(void *priv);
void ogc_close(void *priv);
void ogc_mdaattr_rebuild();
void ogc_mdaattr_rebuild(void);
#ifdef EMU_DEVICE_H
extern const device_config_t ogc_config[];

2
src/include/86box/vid_svga.h
View File

@@ -211,7 +211,7 @@ extern uint8_t svga_rotate[8][256];
void svga_out(uint16_t addr, uint8_t val, void *p);
uint8_t svga_in(uint16_t addr, void *p);
svga_t *svga_get_pri();
svga_t *svga_get_pri(void);
void svga_set_override(svga_t *svga, int val);
void svga_set_ramdac_type(svga_t *svga, int type);

14
src/include/86box/win.h
View File

@@ -148,9 +148,9 @@ extern int win_get_system_metrics(int i, int dpi);
extern LPARAM win_get_string(int id);
extern void win_clear_icon_set();
extern void win_system_icon_set();
extern void win_load_icon_set();
extern void win_clear_icon_set(void);
extern void win_system_icon_set(void);
extern void win_load_icon_set(void);
extern void win_get_icons_path(char *path_root);
extern intptr_t fdd_type_to_icon(int type);
@@ -209,7 +209,7 @@ extern int MediaMenuHandler(HWND hwnd, UINT message, WPARAM wParam, LPARAM lPar
/* Functions in win_toolbar.c */
extern HWND hwndRebar;
extern void ToolBarCreate(HWND hwndParent, HINSTANCE hInst);
extern void ToolBarLoadIcons();
extern void ToolBarLoadIcons(void);
extern void ToolBarUpdatePause(int paused);
/* Functions in win_dialog.c: */
@@ -223,8 +223,8 @@ extern int file_dlg_st(HWND hwnd, int i, char *fn, char *title, int save);
extern wchar_t *BrowseFolder(wchar_t *saved_path, wchar_t *title);
/* Functions in win_media_menu.c */
extern void media_menu_init();
extern void media_menu_reset();
extern void media_menu_init(void);
extern void media_menu_reset(void);
extern int media_menu_proc(HWND hwnd, UINT message, WPARAM wParam, LPARAM lParam);
extern HMENU media_menu_get_cassette(void);
extern HMENU media_menu_get_cartridge(int id);
@@ -241,7 +241,7 @@ extern void media_menu_update_mo(int id);
/* Functions in win_ui.c */
extern HMENU menuMain;
extern void ResetAllMenus();
extern void ResetAllMenus(void);
#ifdef __cplusplus
}

2
src/include/86box/win_opengl_glslp.h
View File

@@ -19,6 +19,6 @@
#include <glad/glad.h>
GLuint load_custom_shaders(const char *path);
GLuint load_default_shaders();
GLuint load_default_shaders(void);
#endif /*!WIN_OPENGL_GLSLP_H*/

2
src/include/86box/zip.h
View File

@@ -113,7 +113,7 @@ extern void zip_hard_reset(void);
extern void zip_reset(scsi_common_t *sc);
extern int zip_load(zip_t *dev, char *fn);
extern void zip_close();
extern void zip_close(void);
#ifdef __cplusplus
}

2
src/ini.c
View File

@@ -492,7 +492,7 @@ ini_write(ini_t ini, char *fn)
}
ini_t
ini_new()
ini_new(void)
{
ini_t ini = malloc(sizeof(list_t));
memset(ini, 0, sizeof(list_t));

2
src/machine/m_at_commodore.c
View File

@@ -84,7 +84,7 @@ cbm_io_write(uint16_t port, uint8_t val, void *p)
}
static void
cbm_io_init()
cbm_io_init(void)
{
io_sethandler(0x0230, 0x0001, NULL, NULL, NULL, cbm_io_write, NULL, NULL, NULL);
}

4
src/machine/m_at_t3100e.c
View File

@@ -169,7 +169,7 @@
extern uint8_t *ram; /* Physical RAM */
void at_init();
void at_init(void);
/* The T3100e motherboard can (and does) dynamically reassign RAM between
* conventional, XMS and EMS. This translates to monkeying with the mappings.
@@ -336,7 +336,7 @@ port_to_page(uint16_t addr)
}
/* Used to dump the memory mapping table, for debugging
void dump_mappings()
void dump_mappings(void)
{
mem_mapping_t *mm = base_mapping.next;

2
src/machine/m_at_t3100e_vid.c
View File

@@ -102,7 +102,7 @@ t3100e_display_set(uint8_t internal)
}
uint8_t
t3100e_display_get()
t3100e_display_get(void)
{
return st_display_internal;
}

2
src/machine/m_ps2_mca.c
View File

@@ -806,7 +806,7 @@ ps2_mca_write(uint16_t port, uint8_t val, void *p)
}
static void
ps2_mca_board_common_init()
ps2_mca_board_common_init(void)
{
io_sethandler(0x0091, 0x0001, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL);
io_sethandler(0x0094, 0x0001, ps2_mca_read, NULL, NULL, ps2_mca_write, NULL, NULL, NULL);

2
src/machine/m_xt_olivetti.c
View File

@@ -201,7 +201,7 @@ mm58174_time_get(uint8_t *regs, struct tm *tm)
/* One more second has passed, update the internal clock. */
static void
mm58x74_recalc()
mm58x74_recalc(void)
{
/* Ping the internal clock. */
if (++intclk.tm_sec == 60) {

2
src/machine/m_xt_t1000_vid.c
View File

@@ -94,7 +94,7 @@ t1000_display_set(uint8_t internal)
}
uint8_t
t1000_display_get()
t1000_display_get(void)
{
return (uint8_t) st_display_internal;
}

2
src/machine/m_xt_xi8088.c
View File

@@ -37,7 +37,7 @@ typedef struct xi8088_t {
static xi8088_t xi8088;
uint8_t
xi8088_turbo_get()
xi8088_turbo_get(void)
{
return xi8088.turbo;
}

2
src/machine_status.c
View File

@@ -26,7 +26,7 @@
machine_status_t machine_status;
void
machine_status_init()
machine_status_init(void)
{
for (size_t i = 0; i < FDD_NUM; ++i) {
machine_status.fdd[i].empty = (strlen(floppyfns[i]) == 0);

2
src/pci.c
View File

@@ -1044,7 +1044,7 @@ pci_init(int type)
}
uint8_t
pci_register_bus()
pci_register_bus(void)
{
return last_pci_bus++;
}

4
src/pic.c
View File

@@ -249,7 +249,7 @@ pic_callback(void *priv)
}
void
pic_reset()
pic_reset(void)
{
int is_at = IS_AT(machine);
is_at = is_at || !strcmp(machine_get_internal_name(), "xi8088");
@@ -709,7 +709,7 @@ pic_irq_ack(void)
}
int
picinterrupt()
picinterrupt(void)
{
int i, ret = -1;

4
src/qt/win_joystick_rawinput.c
View File

@@ -229,7 +229,7 @@ void joystick_get_device_name(raw_joystick_t* rawjoy, plat_joystick_t* joy, PRID
info->hid.dwProductId);
}
void joystick_init()
void joystick_init(void)
{
UINT size = 0;
atexit(joystick_close);
@@ -295,7 +295,7 @@ void joystick_init()
fatal("plat_joystick_init: RegisterRawInputDevices failed\n");
}
void joystick_close()
void joystick_close(void)
{
RAWINPUTDEVICE ridev[2];
ridev[0].dwFlags = RIDEV_REMOVE;

3
src/sound/CMakeLists.txt
View File

@@ -17,7 +17,8 @@ add_library(snd OBJECT sound.c snd_opl.c snd_opl_nuked.c snd_opl_ymfm.cpp snd_re
midi.c snd_speaker.c snd_pssj.c snd_lpt_dac.c snd_ac97_codec.c snd_ac97_via.c
snd_lpt_dss.c snd_ps1.c snd_adlib.c snd_adlibgold.c snd_ad1848.c snd_audiopci.c
snd_azt2316a.c snd_cms.c snd_cmi8x38.c snd_cs423x.c snd_gus.c snd_sb.c snd_sb_dsp.c
snd_emu8k.c snd_mpu401.c snd_sn76489.c snd_ssi2001.c snd_wss.c snd_ym7128.c)
snd_emu8k.c snd_mpu401.c snd_sn76489.c snd_ssi2001.c snd_wss.c snd_ym7128.c
snd_optimc.c)
if(OPENAL)
if(VCPKG_TOOLCHAIN)

4
src/sound/midi.c
View File

@@ -172,7 +172,7 @@ midi_out_device_get_from_internal_name(char *s)
}
void
midi_out_device_init()
midi_out_device_init(void)
{
if (devices[midi_output_device_current].device)
device_add(devices[midi_output_device_current].device);
@@ -290,7 +290,7 @@ midi_in_device_get_from_internal_name(char *s)
}
void
midi_in_device_init()
midi_in_device_init(void)
{
if (midi_in_devices[midi_input_device_current].device)
device_add(midi_in_devices[midi_input_device_current].device);

10
src/sound/midi_mt32.c
View File

@@ -119,7 +119,7 @@ mt32_check(const char *func, mt32emu_return_code ret, mt32emu_return_code expect
}
int
mt32_old_available()
mt32_old_available(void)
{
if (roms_present[0] < 0)
roms_present[0] = (rom_present(MT32_OLD_CTRL_ROM) && rom_present(MT32_OLD_PCM_ROM));
@@ -127,7 +127,7 @@ mt32_old_available()
}
int
mt32_new_available()
mt32_new_available(void)
{
if (roms_present[0] < 0)
roms_present[0] = (rom_present(MT32_NEW_CTRL_ROM) && rom_present(MT32_NEW_PCM_ROM));
@@ -135,7 +135,7 @@ mt32_new_available()
}
int
cm32l_available()
cm32l_available(void)
{
if (roms_present[1] < 0)
roms_present[1] = (rom_present(CM32L_CTRL_ROM) && rom_present(CM32L_PCM_ROM));
@@ -143,7 +143,7 @@ cm32l_available()
}
int
cm32ln_available()
cm32ln_available(void)
{
if (roms_present[1] < 0)
roms_present[1] = (rom_present(CM32LN_CTRL_ROM) && rom_present(CM32LN_PCM_ROM));
@@ -199,7 +199,7 @@ mt32_stream_int16(int16_t *stream, int len)
}
void
mt32_poll()
mt32_poll(void)
{
midi_pos++;
if (midi_pos == 48000 / RENDER_RATE) {

2
src/sound/snd_adlibgold.c
View File

@@ -131,7 +131,7 @@ static int treble_cut[6] = {
(int) (0.354 * 16384) /*-3 dB - filter output is at +6 dB*/
};
void adgold_timer_poll();
void adgold_timer_poll(void *p);
void adgold_update(adgold_t *adgold);
void

569
src/sound/snd_azt2316a.c
View File

@@ -147,7 +147,6 @@
#include <86box/nvr.h>
#include <86box/pic.h>
#include <86box/sound.h>
#include <86box/gameport.h>
#include <86box/snd_ad1848.h>
#include <86box/snd_azt2316a.h>
#include <86box/snd_sb.h>
@@ -171,15 +170,14 @@ typedef struct azt2316a_t {
int type;
int wss_interrupt_after_config;
uint8_t wss_config, opti, opti_reg_enabled;
uint8_t wss_config;
uint16_t cur_addr, cur_wss_addr, cur_mpu401_addr;
int cur_irq, cur_dma;
int cur_wss_enabled, cur_wss_irq, cur_wss_dma;
int cur_mpu401_irq;
int cur_mpu401_enabled;
void *gameport;
int cur_irq, cur_dma;
int cur_wss_enabled, cur_wss_irq, cur_wss_dma;
int cur_mpu401_irq;
int cur_mpu401_enabled;
uint32_t config_word;
uint32_t config_word_unlocked;
@@ -189,8 +187,7 @@ typedef struct azt2316a_t {
ad1848_t ad1848;
mpu_t *mpu;
sb_t *sb;
uint8_t opti_regs[6];
sb_t *sb;
} azt2316a_t;
static uint8_t
@@ -202,7 +199,7 @@ azt2316a_wss_read(uint16_t addr, void *p)
/* TODO: when windows is initializing, writing 0x48, 0x58 and 0x60 to
0x530 makes reading from 0x533 return 0x44, but writing 0x50
makes this return 0x04. Why? */
if ((addr & 1) || (azt2316a->opti))
if (addr & 1)
temp = 4 | (azt2316a->wss_config & 0x40);
else
temp = 4 | (azt2316a->wss_config & 0xC0);
@@ -871,9 +868,6 @@ azt2316a_get_buffer(int32_t *buffer, int len, void *p)
azt2316a_t *azt2316a = (azt2316a_t *) p;
int c;
if (azt2316a->opti && azt2316a->opti_regs[3] & 0x4)
return;
/* wss part */
ad1848_update(&azt2316a->ad1848);
for (c = 0; c < len * 2; c++)
@@ -885,219 +879,6 @@ azt2316a_get_buffer(int32_t *buffer, int len, void *p)
sb_get_buffer_sbpro(buffer, len, azt2316a->sb);
}
static void
optimc_remove_opl(azt2316a_t *azt2316a)
{
io_removehandler(azt2316a->cur_addr + 0, 0x0004, azt2316a->sb->opl.read, NULL, NULL, azt2316a->sb->opl.write, NULL, NULL, azt2316a->sb->opl.priv);
io_removehandler(azt2316a->cur_addr + 8, 0x0002, azt2316a->sb->opl.read, NULL, NULL, azt2316a->sb->opl.write, NULL, NULL, azt2316a->sb->opl.priv);
io_removehandler(0x0388, 0x0004, azt2316a->sb->opl.read, NULL, NULL, azt2316a->sb->opl.write, NULL, NULL, azt2316a->sb->opl.priv);
}
static void
optimc_add_opl(azt2316a_t *azt2316a)
{
if (!(azt2316a->opti_regs[3] & 0x8) && (azt2316a->opti_regs[1] & 0x20)) {
fm_driver_get(FM_YMF289B, &azt2316a->sb->opl);
} else {
fm_driver_get((azt2316a->opti_regs[3] & 0x8) ? FM_YM3812 : FM_YMF262, &azt2316a->sb->opl);
}
/* DSP I/O handler is activated in sb_dsp_setaddr */
io_sethandler(azt2316a->cur_addr + 0, 0x0004, azt2316a->sb->opl.read, NULL, NULL, azt2316a->sb->opl.write, NULL, NULL, azt2316a->sb->opl.priv);
io_sethandler(azt2316a->cur_addr + 8, 0x0002, azt2316a->sb->opl.read, NULL, NULL, azt2316a->sb->opl.write, NULL, NULL, azt2316a->sb->opl.priv);
io_sethandler(0x0388, 0x0004, azt2316a->sb->opl.read, NULL, NULL, azt2316a->sb->opl.write, NULL, NULL, azt2316a->sb->opl.priv);
}
static void
optimc_reload_opl(azt2316a_t *azt2316a)
{
optimc_remove_opl(azt2316a);
optimc_add_opl(azt2316a);
}
static void
optimc_reg_write(uint16_t addr, uint8_t val, void *p)
{
azt2316a_t *azt2316a = (azt2316a_t *) p;
uint16_t idx = addr - 0xF8D;
uint8_t old = azt2316a->opti_regs[idx];
static uint8_t reg_enable_phase = 0;
if (azt2316a->opti_reg_enabled) {
switch (idx) {
case 0: /* MC1 */
{
azt2316a->opti_regs[0] = val;
if (val != old) {
azt2316a->cur_mode = azt2316a->cur_wss_enabled = !!(val & 0x80);
io_removehandler(azt2316a->cur_wss_addr, 0x0004, azt2316a_wss_read, NULL, NULL, azt2316a_wss_write, NULL, NULL, azt2316a);
io_removehandler(azt2316a->cur_wss_addr + 0x0004, 0x0004, ad1848_read, NULL, NULL, ad1848_write, NULL, NULL, &azt2316a->ad1848);
switch ((val >> 4) & 0x3) {
case 0: /* WSBase = 0x530 */
{
azt2316a->cur_wss_addr = 0x530;
break;
}
case 1: /* WSBase = 0xE80 */
{
azt2316a->cur_wss_addr = 0xE80;
break;
}
case 2: /* WSBase = 0xF40 */
{
azt2316a->cur_wss_addr = 0xF40;
break;
}
case 3: /* WSBase = 0x604 */
{
azt2316a->cur_wss_addr = 0x604;
break;
}
}
io_sethandler(azt2316a->cur_wss_addr, 0x0004, azt2316a_wss_read, NULL, NULL, azt2316a_wss_write, NULL, NULL, azt2316a);
io_sethandler(azt2316a->cur_wss_addr + 0x0004, 0x0004, ad1848_read, NULL, NULL, ad1848_write, NULL, NULL, &azt2316a->ad1848);
gameport_remap(azt2316a->gameport, (azt2316a->opti_regs[0] & 0x1) ? 0x00 : 0x200);
}
break;
}
case 1: /* MC2 */
azt2316a->opti_regs[1] = val;
if (old != val)
optimc_reload_opl(azt2316a);
break;
case 2: /* MC3 */
if (val == 0xE3) {
reg_enable_phase = 1;
break;
}
azt2316a->opti_regs[2] = val;
if (old != val) {
optimc_remove_opl(azt2316a);
azt2316a->cur_addr = (val & 0x4) ? 0x240 : 0x220;
switch ((val >> 4) & 0x3) {
case 0:
azt2316a->cur_dma = 1;
break;
case 1:
azt2316a->cur_dma = 0;
break;
case 2:
default:
azt2316a->cur_dma = 3;
break;
}
switch ((val >> 6) & 0x3) {
case 0:
azt2316a->cur_irq = 7;
break;
case 1:
azt2316a->cur_irq = 10;
break;
case 2:
default:
azt2316a->cur_irq = 5;
break;
}
sb_dsp_setaddr(&azt2316a->sb->dsp, azt2316a->cur_addr);
sb_dsp_setirq(&azt2316a->sb->dsp, azt2316a->cur_irq);
sb_dsp_setdma8(&azt2316a->sb->dsp, azt2316a->cur_dma);
optimc_add_opl(azt2316a);
}
break;
case 3: /* MC4 */
azt2316a->opti_regs[3] = val;
if ((old & 0x8) != (val & 0x8))
optimc_reload_opl(azt2316a);
break;
case 4: /* MC5 */
azt2316a->opti_regs[4] = val;
break;
case 5: /* MC6 */
azt2316a->opti_regs[5] = val;
if (old != val) {
switch ((val >> 3) & 0x3) {
case 0:
azt2316a->cur_mpu401_irq = 9;
break;
case 1:
azt2316a->cur_mpu401_irq = 10;
break;
case 2:
azt2316a->cur_mpu401_irq = 5;
break;
case 3:
azt2316a->cur_mpu401_irq = 7;
break;
}
switch ((val >> 5) & 0x3) {
case 0:
azt2316a->cur_mpu401_addr = 0x330;
break;
case 1:
azt2316a->cur_mpu401_addr = 0x320;
break;
case 2:
azt2316a->cur_mpu401_addr = 0x310;
break;
case 3:
azt2316a->cur_mpu401_addr = 0x300;
break;
}
mpu401_change_addr(azt2316a->mpu, azt2316a->cur_mpu401_addr);
mpu401_setirq(azt2316a->mpu, azt2316a->cur_mpu401_irq);
}
break;
}
}
if (addr == 0xF8F && (val == 0xE3 || val == 0x00)) {
if (reg_enable_phase) {
switch (reg_enable_phase) {
case 1:
if (val == 0xE3) {
reg_enable_phase++;
}
break;
case 2:
if (val == 0x00) {
reg_enable_phase++;
}
break;
case 3:
if (val == 0xE3) {
azt2316a->opti_reg_enabled = 1;
azt2316a->opti_regs[2] = 0x2;
break;
}
break;
}
} else
reg_enable_phase = 1;
return;
}
}
static uint8_t
optimc_reg_read(uint16_t addr, void *p)
{
azt2316a_t *azt2316a = (azt2316a_t *) p;
if (azt2316a->opti_reg_enabled) {
switch (addr - 0xF8D) {
case 0: /* MC1 */
case 1: /* MC2 */
case 3: /* MC4 */
case 4: /* MC5 */
return azt2316a->opti_regs[addr - 0xF8D];
case 5: /* MC6 (not readable) */
return 0xFF;
case 2: /* MC3 */
return (azt2316a->opti_regs[2] & ~0x3) | 0x2;
}
}
return 0xFF;
}
static void *
azt_init(const device_t *info)
{
@@ -1110,38 +891,32 @@ azt_init(const device_t *info)
azt2316a_t *azt2316a = malloc(sizeof(azt2316a_t));
memset(azt2316a, 0, sizeof(azt2316a_t));
azt2316a->type = info->local & 0x7fffffff;
azt2316a->opti = !!(info->local & 0x80000000);
azt2316a->type = info->local;
if (azt2316a->type == SB_SUBTYPE_CLONE_AZT1605_0X0C) {
fn = "azt1605.nvr";
} else if (azt2316a->type == SB_SUBTYPE_CLONE_AZT2316A_0X11) {
if (info->local & 0x80000000)
fn = "acermagic_s20.nvr";
else
fn = "azt2316a.nvr";
fn = "azt2316a.nvr";
}
/* config (not saved for AcerMagic S20). */
if (!azt2316a->opti) {
f = nvr_fopen(fn, "rb");
if (f) {
uint8_t checksum = 0x7f;
uint8_t saved_checksum;
size_t res;
/* config */
f = nvr_fopen(fn, "rb");
if (f) {
uint8_t checksum = 0x7f;
uint8_t saved_checksum;
size_t res;
res = fread(read_eeprom, AZTECH_EEPROM_SIZE, 1, f);
for (i = 0; i < AZTECH_EEPROM_SIZE; i++)
checksum += read_eeprom[i];
res = fread(read_eeprom, AZTECH_EEPROM_SIZE, 1, f);
for (i = 0; i < AZTECH_EEPROM_SIZE; i++)
checksum += read_eeprom[i];
res = fread(&saved_checksum, sizeof(saved_checksum), 1, f);
(void) res;
res = fread(&saved_checksum, sizeof(saved_checksum), 1, f);
(void) res;
fclose(f);
fclose(f);
if (checksum == saved_checksum)
loaded_from_eeprom = 1;
}
if (checksum == saved_checksum)
loaded_from_eeprom = 1;
}
if (!loaded_from_eeprom) {
@@ -1183,117 +958,91 @@ azt_init(const device_t *info)
}
if (azt2316a->type == SB_SUBTYPE_CLONE_AZT2316A_0X11) {
if (azt2316a->opti) {
/* OPTi 82C929 has no EEPROM interface. */
azt2316a->cur_wss_addr = 0x530;
azt2316a->cur_mode = 0;
azt2316a->cur_addr = 0x220;
azt2316a->cur_irq = 7;
azt2316a->cur_wss_enabled = 0;
azt2316a->cur_dma = 1;
azt2316a->cur_mpu401_irq = 9;
azt2316a->cur_mpu401_addr = 0x330;
azt2316a->cur_mpu401_enabled = 1;
azt2316a->config_word = read_eeprom[11] | (read_eeprom[12] << 8) | (read_eeprom[13] << 16) | (read_eeprom[14] << 24);
azt2316a->opti_regs[0] = ((device_get_config_int("gameport")) ? 0x01 : 0x00);
azt2316a->opti_regs[1] = 0x03;
azt2316a->opti_regs[2] = 0x00;
azt2316a->opti_regs[3] = 0x00;
azt2316a->opti_regs[4] = 0x2F;
azt2316a->opti_regs[5] = 0x83;
azt2316a->gameport = gameport_add(&gameport_device);
gameport_remap(azt2316a->gameport, (azt2316a->opti_regs[0] & 0x1) ? 0x00 : 0x200);
} else {
azt2316a->config_word = read_eeprom[11] | (read_eeprom[12] << 8) | (read_eeprom[13] << 16) | (read_eeprom[14] << 24);
switch (azt2316a->config_word & (3 << 0)) {
case 0:
azt2316a->cur_addr = 0x220;
break;
case 1:
azt2316a->cur_addr = 0x240;
break;
default:
fatal("AZT2316A: invalid sb addr in config word %08X\n", azt2316a->config_word);
}
if (azt2316a->config_word & (1 << 2))
azt2316a->cur_irq = 9;
else if (azt2316a->config_word & (1 << 3))
azt2316a->cur_irq = 5;
else if (azt2316a->config_word & (1 << 4))
azt2316a->cur_irq = 7;
else if (azt2316a->config_word & (1 << 5))
azt2316a->cur_irq = 10;
else
fatal("AZT2316A: invalid sb irq in config word %08X\n", azt2316a->config_word);
if (info->local & 0x80000000)
azt2316a->cur_dma = 1;
else
switch (azt2316a->config_word & (3 << 6)) {
case 1 << 6:
azt2316a->cur_dma = 0;
break;
case 2 << 6:
azt2316a->cur_dma = 1;
break;
case 3 << 6:
azt2316a->cur_dma = 3;
break;
default:
fatal("AZT2316A: invalid sb dma in config word %08X\n", azt2316a->config_word);
}
switch (azt2316a->config_word & (3 << 8)) {
case 0:
azt2316a->cur_wss_addr = 0x530;
break;
case 1 << 8:
azt2316a->cur_wss_addr = 0x604;
break;
case 2 << 8:
azt2316a->cur_wss_addr = 0xE80;
break;
case 3 << 8:
azt2316a->cur_wss_addr = 0xF40;
break;
default:
fatal("AZT2316A: invalid wss addr in config word %08X\n", azt2316a->config_word);
}
if (azt2316a->config_word & (1 << 10))
azt2316a->cur_wss_enabled = 1;
else
azt2316a->cur_wss_enabled = 0;
if (azt2316a->config_word & (1 << 12))
azt2316a->cur_mpu401_addr = 0x330;
else
azt2316a->cur_mpu401_addr = 0x300;
if (azt2316a->config_word & (1 << 13))
azt2316a->cur_mpu401_enabled = 1;
else
azt2316a->cur_mpu401_enabled = 0;
if (azt2316a->config_word & (1 << 24))
azt2316a->cur_mpu401_irq = 9;
else if (azt2316a->config_word & (1 << 25))
azt2316a->cur_mpu401_irq = 5;
else if (azt2316a->config_word & (1 << 26))
azt2316a->cur_mpu401_irq = 7;
else if (azt2316a->config_word & (1 << 27))
azt2316a->cur_mpu401_irq = 10;
else
fatal("AZT2316A: invalid mpu401 irq in config word %08X\n", azt2316a->config_word);
/* these are not present on the EEPROM */
azt2316a->cur_wss_irq = device_get_config_int("wss_irq");
azt2316a->cur_wss_dma = device_get_config_int("wss_dma");
azt2316a->cur_mode = 0;
switch (azt2316a->config_word & (3 << 0)) {
case 0:
azt2316a->cur_addr = 0x220;
break;
case 1:
azt2316a->cur_addr = 0x240;
break;
default:
fatal("AZT2316A: invalid sb addr in config word %08X\n", azt2316a->config_word);
}
if (azt2316a->config_word & (1 << 2))
azt2316a->cur_irq = 9;
else if (azt2316a->config_word & (1 << 3))
azt2316a->cur_irq = 5;
else if (azt2316a->config_word & (1 << 4))
azt2316a->cur_irq = 7;
else if (azt2316a->config_word & (1 << 5))
azt2316a->cur_irq = 10;
else
fatal("AZT2316A: invalid sb irq in config word %08X\n", azt2316a->config_word);
switch (azt2316a->config_word & (3 << 6)) {
case 1 << 6:
azt2316a->cur_dma = 0;
break;
case 2 << 6:
azt2316a->cur_dma = 1;
break;
case 3 << 6:
azt2316a->cur_dma = 3;
break;
default:
fatal("AZT2316A: invalid sb dma in config word %08X\n", azt2316a->config_word);
}
switch (azt2316a->config_word & (3 << 8)) {
case 0:
azt2316a->cur_wss_addr = 0x530;
break;
case 1 << 8:
azt2316a->cur_wss_addr = 0x604;
break;
case 2 << 8:
azt2316a->cur_wss_addr = 0xE80;
break;
case 3 << 8:
azt2316a->cur_wss_addr = 0xF40;
break;
default:
fatal("AZT2316A: invalid wss addr in config word %08X\n", azt2316a->config_word);
}
if (azt2316a->config_word & (1 << 10))
azt2316a->cur_wss_enabled = 1;
else
azt2316a->cur_wss_enabled = 0;
if (azt2316a->config_word & (1 << 12))
azt2316a->cur_mpu401_addr = 0x330;
else
azt2316a->cur_mpu401_addr = 0x300;
if (azt2316a->config_word & (1 << 13))
azt2316a->cur_mpu401_enabled = 1;
else
azt2316a->cur_mpu401_enabled = 0;
if (azt2316a->config_word & (1 << 24))
azt2316a->cur_mpu401_irq = 9;
else if (azt2316a->config_word & (1 << 25))
azt2316a->cur_mpu401_irq = 5;
else if (azt2316a->config_word & (1 << 26))
azt2316a->cur_mpu401_irq = 7;
else if (azt2316a->config_word & (1 << 27))
azt2316a->cur_mpu401_irq = 10;
else
fatal("AZT2316A: invalid mpu401 irq in config word %08X\n", azt2316a->config_word);
/* these are not present on the EEPROM */
azt2316a->cur_wss_irq = device_get_config_int("wss_irq");
azt2316a->cur_wss_dma = device_get_config_int("wss_dma");
azt2316a->cur_mode = 0;
} else if (azt2316a->type == SB_SUBTYPE_CLONE_AZT1605_0X0C) {
azt2316a->config_word = read_eeprom[12] + (read_eeprom[13] << 8) + (read_eeprom[14] << 16);
@@ -1363,35 +1112,25 @@ azt_init(const device_t *info)
azt2316a->cur_wss_enabled = 0;
// these are not present on the EEPROM
if (info->local & 0x80000000)
azt2316a->cur_dma = 1;
else
azt2316a->cur_dma = device_get_config_int("sb_dma8"); // TODO: investigate TSR to make this work with it - there is no software configurable DMA8?
azt2316a->cur_dma = device_get_config_int("sb_dma8"); // TODO: investigate TSR to make this work with it - there is no software configurable DMA8?
azt2316a->cur_wss_irq = device_get_config_int("wss_irq");
azt2316a->cur_wss_dma = device_get_config_int("wss_dma");
azt2316a->cur_mode = 0;
}
addr_setting = (azt2316a->opti) ? 0 : device_get_config_hex16("addr");
addr_setting = device_get_config_hex16("addr");
if (addr_setting)
azt2316a->cur_addr = addr_setting;
azt2316a->wss_interrupt_after_config = (!!(azt2316a->opti)) ? 0 : device_get_config_int("wss_interrupt_after_config");
azt2316a->wss_interrupt_after_config = device_get_config_int("wss_interrupt_after_config");
/* wss part */
if (info->local & 0x80000000)
ad1848_init(&azt2316a->ad1848, AD1848_TYPE_CS4231);
else
ad1848_init(&azt2316a->ad1848, device_get_config_int("codec"));
ad1848_init(&azt2316a->ad1848, device_get_config_int("codec"));
ad1848_setirq(&azt2316a->ad1848, azt2316a->cur_wss_irq);
ad1848_setdma(&azt2316a->ad1848, azt2316a->cur_wss_dma);
if (!azt2316a->opti) {
io_sethandler(azt2316a->cur_addr + 0x0400, 0x0040, azt2316a_config_read, NULL, NULL, azt2316a_config_write, NULL, NULL, azt2316a);
} else {
io_sethandler(0xF8D, 6, optimc_reg_read, NULL, NULL, optimc_reg_write, NULL, NULL, azt2316a);
}
io_sethandler(azt2316a->cur_addr + 0x0400, 0x0040, azt2316a_config_read, NULL, NULL, azt2316a_config_write, NULL, NULL, azt2316a);
io_sethandler(azt2316a->cur_wss_addr, 0x0004, azt2316a_wss_read, NULL, NULL, azt2316a_wss_write, NULL, NULL, azt2316a);
io_sethandler(azt2316a->cur_wss_addr + 0x0004, 0x0004, ad1848_read, NULL, NULL, ad1848_write, NULL, NULL, &azt2316a->ad1848);
@@ -1404,20 +1143,19 @@ azt_init(const device_t *info)
azt2316a->sb = malloc(sizeof(sb_t));
memset(azt2316a->sb, 0, sizeof(sb_t));
azt2316a->sb->opl_enabled = (azt2316a->opti) ? 1 : device_get_config_int("opl");
azt2316a->sb->opl_enabled = device_get_config_int("opl");
for (i = 0; i < AZTECH_EEPROM_SIZE; i++)
azt2316a->sb->dsp.azt_eeprom[i] = read_eeprom[i];
if (azt2316a->sb->opl_enabled)
fm_driver_get(FM_YMF262, &azt2316a->sb->opl);
sb_dsp_init(&azt2316a->sb->dsp, SBPRO2, azt2316a->type, azt2316a);
sb_dsp_setaddr(&azt2316a->sb->dsp, azt2316a->cur_addr);
sb_dsp_setirq(&azt2316a->sb->dsp, azt2316a->cur_irq);
sb_dsp_setdma8(&azt2316a->sb->dsp, azt2316a->cur_dma);
sb_ct1345_mixer_reset(azt2316a->sb);
if (azt2316a->sb->opl_enabled)
fm_driver_get(FM_YMF262, &azt2316a->sb->opl);
/* DSP I/O handler is activated in sb_dsp_setaddr */
if (azt2316a->sb->opl_enabled) {
io_sethandler(azt2316a->cur_addr + 0, 0x0004, azt2316a->sb->opl.read, NULL, NULL, azt2316a->sb->opl.write, NULL, NULL, azt2316a->sb->opl.priv);
@@ -1453,31 +1191,30 @@ azt_close(void *p)
uint8_t checksum = 0x7f;
int i;
if (!azt2316a->opti) {
if (azt2316a->type == SB_SUBTYPE_CLONE_AZT1605_0X0C) {
fn = "azt1605.nvr";
} else if (azt2316a->type == SB_SUBTYPE_CLONE_AZT2316A_0X11) {
fn = "azt2316a.nvr";
}
if (azt2316a->type == SB_SUBTYPE_CLONE_AZT1605_0X0C) {
fn = "azt1605.nvr";
} else if (azt2316a->type == SB_SUBTYPE_CLONE_AZT2316A_0X11) {
fn = "azt2316a.nvr";
}
/* always save to eeprom (recover from bad values) */
f = nvr_fopen(fn, "wb");
if (f) {
for (i = 0; i < AZTECH_EEPROM_SIZE; i++)
checksum += azt2316a->sb->dsp.azt_eeprom[i];
fwrite(azt2316a->sb->dsp.azt_eeprom, AZTECH_EEPROM_SIZE, 1, f);
/* always save to eeprom (recover from bad values) */
f = nvr_fopen(fn, "wb");
if (f) {
for (i = 0; i < AZTECH_EEPROM_SIZE; i++)
checksum += azt2316a->sb->dsp.azt_eeprom[i];
fwrite(azt2316a->sb->dsp.azt_eeprom, AZTECH_EEPROM_SIZE, 1, f);
// TODO: confirm any models saving mixer settings to EEPROM and implement reading back
// TODO: should remember to save wss duplex setting if 86Box has voice recording implemented in the future? Also, default azt2316a->wss_config
// TODO: azt2316a->cur_mode is not saved to EEPROM?
fwrite(&checksum, sizeof(checksum), 1, f);
// TODO: confirm any models saving mixer settings to EEPROM and implement reading back
// TODO: should remember to save wss duplex setting if 86Box has voice recording implemented in the future? Also, default azt2316a->wss_config
// TODO: azt2316a->cur_mode is not saved to EEPROM?
fwrite(&checksum, sizeof(checksum), 1, f);
fclose(f);
}
fclose(f);
}
sb_close(azt2316a->sb);
free(azt2316a->mpu);
free(azt2316a);
}
@@ -1635,7 +1372,7 @@ static const device_config_t azt1605_config[] = {
};
static const device_config_t azt2316a_config[] = {
// clang-format off
// clang-format off
{
.name = "codec",
.description = "CODEC",
@@ -1755,32 +1492,6 @@ static const device_config_t azt2316a_config[] = {
// clang-format on
};
static const device_config_t acermagic_s20_config[] = {
// clang-format off
{
.name = "gameport",
.description = "Gameport",
.type = CONFIG_BINARY,
.default_int = 0
},
{
.name = "receive_input",
.description = "Receive input (SB MIDI)",
.type = CONFIG_BINARY,
.default_string = "",
.default_int = 1
},
{
.name = "receive_input401",
.description = "Receive input (MPU-401)",
.type = CONFIG_BINARY,
.default_string = "",
.default_int = 0
},
{ .name = "", .description = "", .type = CONFIG_END }
// clang-format on
};
const device_t azt2316a_device = {
.name = "Aztech Sound Galaxy Pro 16 AB (Washington)",
.internal_name = "azt2316a",
@@ -1795,20 +1506,6 @@ const device_t azt2316a_device = {
.config = azt2316a_config
};
const device_t acermagic_s20_device = {
.name = "AcerMagic S20",
.internal_name = "acermagic_s20",
.flags = DEVICE_ISA | DEVICE_AT,
.local = SB_SUBTYPE_CLONE_AZT2316A_0X11 | 0x80000000,
.init = azt_init,
.close = azt_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = azt_speed_changed,
.force_redraw = NULL,
.config = acermagic_s20_config
};
const device_t azt1605_device = {
.name = "Aztech Sound Galaxy Nova 16 Extra (Clinton)",
.internal_name = "azt1605",

457
src/sound/snd_optimc.c Normal file
View File

@@ -0,0 +1,457 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* OPTi MediaCHIPS 82C929 audio controller emulation.
*
*
*
* Authors: Cacodemon345
* Eluan Costa Miranda <eluancm@gmail.com>
*
* Copyright 2022 Cacodemon345.
* Copyright 2020 Eluan Costa Miranda.
*/
#include <math.h>
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/device.h>
#include <86box/io.h>
#include <86box/midi.h>
#include <86box/timer.h>
#include <86box/nvr.h>
#include <86box/pic.h>
#include <86box/sound.h>
#include <86box/gameport.h>
#include <86box/snd_ad1848.h>
#include <86box/snd_sb.h>
static int optimc_wss_dma[4] = { 0, 0, 1, 3 };
static int optimc_wss_irq[8] = { 5, 7, 9, 10, 11, 12, 14, 15 }; /* W95 only uses 7-10, others may be wrong */
enum optimc_local_flags {
OPTIMC_CS4231 = 0x100,
OPTIMC_OPL4 = 0x200, /* Unused */
};
typedef struct optimc_t {
uint8_t type, fm_type;
uint8_t wss_config, reg_enabled;
uint16_t cur_addr, cur_wss_addr, cur_mpu401_addr;
int cur_irq, cur_dma;
int cur_wss_enabled, cur_wss_irq, cur_wss_dma;
int cur_mpu401_irq;
int cur_mpu401_enabled;
void *gameport;
uint8_t cur_mode;
ad1848_t ad1848;
mpu_t *mpu;
sb_t *sb;
uint8_t regs[6];
} optimc_t, opti_82c929_t;
static uint8_t
optimc_wss_read(uint16_t addr, void *priv)
{
optimc_t *optimc = (optimc_t *) priv;
if (!(optimc->regs[4] & 0x10) && optimc->cur_mode == 0)
return 0xFF;
return 4 | (optimc->wss_config & 0x40);
}
static void
optimc_wss_write(uint16_t addr, uint8_t val, void *priv)
{
optimc_t *optimc = (optimc_t *) priv;
if (!(optimc->regs[4] & 0x10) && optimc->cur_mode == 0) return;
optimc->wss_config = val;
ad1848_setdma(&optimc->ad1848, optimc_wss_dma[val & 3]);
ad1848_setirq(&optimc->ad1848, optimc_wss_irq[(val >> 3) & 7]);
}
static void
optimc_get_buffer(int32_t *buffer, int len, void *p)
{
optimc_t *optimc = (optimc_t *) p;
int c;
if (optimc->regs[3] & 0x4)
return;
/* wss part */
ad1848_update(&optimc->ad1848);
for (c = 0; c < len * 2; c++)
buffer[c] += (optimc->ad1848.buffer[c] / 2);
optimc->ad1848.pos = 0;
/* sbprov2 part */
sb_get_buffer_sbpro(buffer, len, optimc->sb);
}
static void
optimc_remove_opl(optimc_t *optimc)
{
io_removehandler(optimc->cur_addr + 0, 0x0004, optimc->sb->opl.read, NULL, NULL, optimc->sb->opl.write, NULL, NULL, optimc->sb->opl.priv);
io_removehandler(optimc->cur_addr + 8, 0x0002, optimc->sb->opl.read, NULL, NULL, optimc->sb->opl.write, NULL, NULL, optimc->sb->opl.priv);
io_removehandler(0x0388, 0x0004, optimc->sb->opl.read, NULL, NULL, optimc->sb->opl.write, NULL, NULL, optimc->sb->opl.priv);
}
static void
optimc_add_opl(optimc_t *optimc)
{
fm_driver_get(FM_YMF262, &optimc->sb->opl);
/* DSP I/O handler is activated in sb_dsp_setaddr */
io_sethandler(optimc->cur_addr + 0, 0x0004, optimc->sb->opl.read, NULL, NULL, optimc->sb->opl.write, NULL, NULL, optimc->sb->opl.priv);
io_sethandler(optimc->cur_addr + 8, 0x0002, optimc->sb->opl.read, NULL, NULL, optimc->sb->opl.write, NULL, NULL, optimc->sb->opl.priv);
io_sethandler(0x0388, 0x0004, optimc->sb->opl.read, NULL, NULL, optimc->sb->opl.write, NULL, NULL, optimc->sb->opl.priv);
}
static void
optimc_reload_opl(optimc_t *optimc)
{
optimc_remove_opl(optimc);
optimc_add_opl(optimc);
}
static void
optimc_reg_write(uint16_t addr, uint8_t val, void *p)
{
optimc_t *optimc = (optimc_t *) p;
uint16_t idx = addr - 0xF8D;
uint8_t old = optimc->regs[idx];
static uint8_t reg_enable_phase = 0;
if (optimc->reg_enabled) {
switch (idx) {
case 0: /* MC1 */
{
optimc->regs[0] = val;
if (val != old) {
optimc->cur_mode = optimc->cur_wss_enabled = !!(val & 0x80);
io_removehandler(optimc->cur_wss_addr, 0x0004, optimc_wss_read, NULL, NULL, optimc_wss_write, NULL, NULL, optimc);
io_removehandler(optimc->cur_wss_addr + 0x0004, 0x0004, ad1848_read, NULL, NULL, ad1848_write, NULL, NULL, &optimc->ad1848);
switch ((val >> 4) & 0x3) {
case 0: /* WSBase = 0x530 */
{
optimc->cur_wss_addr = 0x530;
break;
}
case 1: /* WSBase = 0xE80 */
{
optimc->cur_wss_addr = 0xE80;
break;
}
case 2: /* WSBase = 0xF40 */
{
optimc->cur_wss_addr = 0xF40;
break;
}
case 3: /* WSBase = 0x604 */
{
optimc->cur_wss_addr = 0x604;
break;
}
}
io_sethandler(optimc->cur_wss_addr, 0x0004, optimc_wss_read, NULL, NULL, optimc_wss_write, NULL, NULL, optimc);
io_sethandler(optimc->cur_wss_addr + 0x0004, 0x0004, ad1848_read, NULL, NULL, ad1848_write, NULL, NULL, &optimc->ad1848);
gameport_remap(optimc->gameport, (optimc->regs[0] & 0x1) ? 0x00 : 0x200);
}
break;
}
case 1: /* MC2 */
optimc->regs[1] = val;
if (old != val)
optimc_reload_opl(optimc);
break;
case 2: /* MC3 */
if (val == optimc->type)
break;
optimc->regs[2] = val;
if (old != val) {
io_removehandler(optimc->cur_addr + 4, 0x0002, sb_ct1345_mixer_read, NULL, NULL, sb_ct1345_mixer_write, NULL, NULL, optimc->sb);
optimc_remove_opl(optimc);
optimc->cur_addr = (val & 0x4) ? 0x240 : 0x220;
switch ((val >> 4) & 0x3) {
case 0:
optimc->cur_dma = 1;
break;
case 1:
optimc->cur_dma = 0;
break;
case 2:
default:
optimc->cur_dma = 3;
break;
}
switch ((val >> 6) & 0x3) {
case 0:
optimc->cur_irq = 7;
break;
case 1:
optimc->cur_irq = 10;
break;
case 2:
default:
optimc->cur_irq = 5;
break;
}
sb_dsp_setaddr(&optimc->sb->dsp, optimc->cur_addr);
sb_dsp_setirq(&optimc->sb->dsp, optimc->cur_irq);
sb_dsp_setdma8(&optimc->sb->dsp, optimc->cur_dma);
optimc_add_opl(optimc);
io_sethandler(optimc->cur_addr + 4, 0x0002, sb_ct1345_mixer_read, NULL, NULL, sb_ct1345_mixer_write, NULL, NULL, optimc->sb);
}
break;
case 3: /* MC4 */
optimc->regs[3] = val;
if ((old & 0x8) != (val & 0x8))
optimc_reload_opl(optimc);
break;
case 4: /* MC5 */
optimc->regs[4] = val;
break;
case 5: /* MC6 */
optimc->regs[5] = val;
if (old != val) {
switch ((val >> 3) & 0x3) {
case 0:
optimc->cur_mpu401_irq = 9;
break;
case 1:
optimc->cur_mpu401_irq = 10;
break;
case 2:
optimc->cur_mpu401_irq = 5;
break;
case 3:
optimc->cur_mpu401_irq = 7;
break;
}
switch ((val >> 5) & 0x3) {
case 0:
optimc->cur_mpu401_addr = 0x330;
break;
case 1:
optimc->cur_mpu401_addr = 0x320;
break;
case 2:
optimc->cur_mpu401_addr = 0x310;
break;
case 3:
optimc->cur_mpu401_addr = 0x300;
break;
}
mpu401_change_addr(optimc->mpu, optimc->cur_mpu401_addr);
mpu401_setirq(optimc->mpu, optimc->cur_mpu401_irq);
}
break;
}
}
if (optimc->reg_enabled)
optimc->reg_enabled = 0;
if (addr == 0xF8F && (val == optimc->type || val == 0x00)) {
if (addr == 0xF8F && val == optimc->type && !optimc->reg_enabled) {
optimc->reg_enabled = 1;
}
if (reg_enable_phase) {
switch (reg_enable_phase) {
case 1:
if (val == optimc->type) {
reg_enable_phase++;
}
break;
case 2:
if (val == 0x00) {
reg_enable_phase++;
}
break;
case 3:
if (val == optimc->type) {
optimc->regs[2] = 0x2;
reg_enable_phase = 1;
}
break;
}
} else
reg_enable_phase = 1;
return;
}
}
static uint8_t
optimc_reg_read(uint16_t addr, void *p)
{
optimc_t *optimc = (optimc_t *) p;
uint8_t temp = 0xFF;
if (optimc->reg_enabled) {
switch (addr - 0xF8D) {
case 0: /* MC1 */
case 1: /* MC2 */
case 3: /* MC4 */
case 4: /* MC5 */
temp = optimc->regs[addr - 0xF8D];
case 5: /* MC6 (not readable) */
break;
case 2: /* MC3 */
temp = (optimc->regs[2] & ~0x3) | 0x2;
break;
}
optimc->reg_enabled = 0;
}
return temp;
}
static void *
optimc_init(const device_t *info)
{
optimc_t *optimc = calloc(1, sizeof(optimc_t));
optimc->type = info->local & 0xFF;
optimc->cur_wss_addr = 0x530;
optimc->cur_mode = 0;
optimc->cur_addr = 0x220;
optimc->cur_irq = 7;
optimc->cur_wss_enabled = 0;
optimc->cur_dma = 1;
optimc->cur_mpu401_irq = 9;
optimc->cur_mpu401_addr = 0x330;
optimc->cur_mpu401_enabled = 1;
optimc->regs[0] = ((device_get_config_int("gameport")) ? 0x01 : 0x00);
optimc->regs[1] = 0x03;
optimc->regs[2] = 0x00;
optimc->regs[3] = 0x00;
optimc->regs[4] = 0x2F;
optimc->regs[5] = 0x83;
optimc->gameport = gameport_add(&gameport_device);
gameport_remap(optimc->gameport, (optimc->regs[0] & 0x1) ? 0x00 : 0x200);
if (info->local & 0x100)
ad1848_init(&optimc->ad1848, AD1848_TYPE_CS4231);
else
ad1848_init(&optimc->ad1848, AD1848_TYPE_DEFAULT);
ad1848_setirq(&optimc->ad1848, optimc->cur_wss_irq);
ad1848_setdma(&optimc->ad1848, optimc->cur_wss_dma);
io_sethandler(0xF8D, 6, optimc_reg_read, NULL, NULL, optimc_reg_write, NULL, NULL, optimc);
io_sethandler(optimc->cur_wss_addr, 0x0004, optimc_wss_read, NULL, NULL, optimc_wss_write, NULL, NULL, optimc);
io_sethandler(optimc->cur_wss_addr + 0x0004, 0x0004, ad1848_read, NULL, NULL, ad1848_write, NULL, NULL, &optimc->ad1848);
optimc->sb = calloc(1, sizeof(sb_t));
optimc->sb->opl_enabled = 1;
sb_dsp_init(&optimc->sb->dsp, SBPRO2, SB_SUBTYPE_DEFAULT, optimc);
sb_dsp_setaddr(&optimc->sb->dsp, optimc->cur_addr);
sb_dsp_setirq(&optimc->sb->dsp, optimc->cur_irq);
sb_dsp_setdma8(&optimc->sb->dsp, optimc->cur_dma);
sb_ct1345_mixer_reset(optimc->sb);
optimc->fm_type = (info->local & OPTIMC_OPL4) ? FM_YMF289B : FM_YMF262;
fm_driver_get(optimc->fm_type, &optimc->sb->opl);
io_sethandler(optimc->cur_addr + 0, 0x0004, optimc->sb->opl.read, NULL, NULL, optimc->sb->opl.write, NULL, NULL, optimc->sb->opl.priv);
io_sethandler(optimc->cur_addr + 8, 0x0002, optimc->sb->opl.read, NULL, NULL, optimc->sb->opl.write, NULL, NULL, optimc->sb->opl.priv);
io_sethandler(0x0388, 0x0004, optimc->sb->opl.read, NULL, NULL, optimc->sb->opl.write, NULL, NULL, optimc->sb->opl.priv);
io_sethandler(optimc->cur_addr + 4, 0x0002, sb_ct1345_mixer_read, NULL, NULL, sb_ct1345_mixer_write, NULL, NULL, optimc->sb);
sound_add_handler(optimc_get_buffer, optimc);
sound_set_cd_audio_filter(sbpro_filter_cd_audio, optimc->sb);
optimc->mpu = (mpu_t *) malloc(sizeof(mpu_t));
memset(optimc->mpu, 0, sizeof(mpu_t));
mpu401_init(optimc->mpu, optimc->cur_mpu401_addr, optimc->cur_mpu401_irq, M_UART, device_get_config_int("receive_input401"));
if (device_get_config_int("receive_input"))
midi_in_handler(1, sb_dsp_input_msg, sb_dsp_input_sysex, &optimc->sb->dsp);
return optimc;
}
static void
optimc_close(void *p)
{
optimc_t* optimc = (optimc_t*)p;
sb_close(optimc->sb);
free(optimc->mpu);
free(p);
}
static void
optimc_speed_changed(void *p)
{
optimc_t *optimc = (optimc_t *) p;
ad1848_speed_changed(&optimc->ad1848);
sb_speed_changed(optimc->sb);
}
static const device_config_t acermagic_s20_config[] = {
// clang-format off
{
.name = "gameport",
.description = "Gameport",
.type = CONFIG_BINARY,
.default_int = 0
},
{
.name = "receive_input",
.description = "Receive input (SB MIDI)",
.type = CONFIG_BINARY,
.default_string = "",
.default_int = 1
},
{
.name = "receive_input401",
.description = "Receive input (MPU-401)",
.type = CONFIG_BINARY,
.default_string = "",
.default_int = 0
},
{ .name = "", .description = "", .type = CONFIG_END }
// clang-format on
};
const device_t acermagic_s20_device = {
.name = "AcerMagic S20",
.internal_name = "acermagic_s20",
.flags = DEVICE_ISA | DEVICE_AT,
.local = 0xE3 | 0x100,
.init = optimc_init,
.close = optimc_close,
.reset = NULL,
{ .available = NULL },
.speed_changed = optimc_speed_changed,
.force_redraw = NULL,
.config = acermagic_s20_config
};

12
src/sound/snd_sb.c
View File

@@ -2035,37 +2035,37 @@ sb_16_compat_init(const device_t *info)
}
static int
sb_awe32_available()
sb_awe32_available(void)
{
return rom_present("roms/sound/awe32.raw");
}
static int
sb_32_pnp_available()
sb_32_pnp_available(void)
{
return sb_awe32_available() && rom_present("roms/sound/CT3600 PnP.BIN");
}
static int
sb_awe32_pnp_available()
sb_awe32_pnp_available(void)
{
return sb_awe32_available() && rom_present("roms/sound/CT3980 PnP.BIN");
}
static int
sb_awe64_value_available()
sb_awe64_value_available(void)
{
return sb_awe32_available() && rom_present("roms/sound/CT4520 PnP.BIN");
}
static int
sb_awe64_available()
sb_awe64_available(void)
{
return sb_awe32_available() && rom_present("roms/sound/CT4520 PnP.BIN");
}
static int
sb_awe64_gold_available()
sb_awe64_gold_available(void)
{
return sb_awe32_available() && rom_present("roms/sound/CT4540 PnP.BIN");
}

4
src/sound/xaudio2.c
View File

@@ -107,7 +107,7 @@ static IXAudio2VoiceCallback callbacks = { &callbacksVtbl };
#endif
void
inital()
inital(void)
{
#if defined(_WIN32) && !defined(USE_FAUDIO)
if (xaudio2_handle == NULL) {
@@ -182,7 +182,7 @@ inital()
}
void
closeal()
closeal(void)
{
if (!initialized)
return;

2
src/video/vid_f82c425.c
View File

@@ -96,7 +96,7 @@ f82c425_display_set(uint8_t internal)
}
uint8_t
f82c425_display_get()
f82c425_display_get(void)
{
return (uint8_t) st_display_internal;
}

2
src/video/vid_genius.c
View File

@@ -783,7 +783,7 @@ genius_close(void *p)
}
static int
genius_available()
genius_available(void)
{
return rom_present(BIOS_ROM_PATH);
}

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