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Merge branch 'master' into pc98x1

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This commit is contained in:
TC1995
2024-10-01 20:25:39 +02:00
parent b099ed7e39 8899b1411b
commit a019c94996
35 changed files with 1633 additions and 769 deletions
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6
CMakeLists.txt
View File

@@ -36,7 +36,7 @@ if(MUNT_EXTERNAL)
endif()
project(86Box
VERSION 4.3
VERSION 4.2.2
DESCRIPTION "Emulator of x86-based systems"
HOMEPAGE_URL "https://86box.net"
LANGUAGES C CXX)
@@ -147,6 +147,10 @@ else()
option(CPPTHREADS "C++11 threads" ON)
endif()
if(CMAKE_SYSTEM_NAME STREQUAL "OpenBSD")
SET(CMAKE_EXE_LINKER_FLAGS "-Wl,-z,wxneeded")
endif()
# Development branch features
#
# Option Description Def. Condition Otherwise

4
debian/changelog vendored
View File

@@ -1,5 +1,5 @@
86box (4.3) UNRELEASED; urgency=medium
86box (4.2.2) UNRELEASED; urgency=medium
* Bump release.
-- Jasmine Iwanek <jriwanek@gmail.com> Mon, 02 Sep 2024 00:16:28 +0200
-- Jasmine Iwanek <jriwanek@gmail.com> Sat, 28 Sep 2024 18:31:57 +0200

4
src/chipset/intel_piix.c
View File

@@ -599,9 +599,9 @@ piix_write(int func, int addr, uint8_t val, void *priv)
pci_set_mirq_routing(PCI_MIRQ0 + (addr & 0x01), val & 0xf);
if (dev->type == 3) {
if (val & 0x20)
sff_set_irq_mode(dev->bm[1], IRQ_MODE_MIRQ_0);
else
sff_set_irq_mode(dev->bm[1], IRQ_MODE_LEGACY);
else
sff_set_irq_mode(dev->bm[1], IRQ_MODE_MIRQ_0);
}
piix_log("MIRQ%i is %s\n", addr & 0x01, (val & 0x20) ? "disabled" : "enabled");
}

48
src/chipset/umc_8886.c
View File

@@ -126,10 +126,10 @@ umc_8886_ide_handler(umc_8886_t *dev)
ide_sec_disable();
if (dev->pci_conf_sb[1][0x04] & 0x01) {
if (dev->pci_conf_sb[1][0x40] & 0x80)
if (dev->pci_conf_sb[1][0x41] & 0x80)
ide_pri_enable();
if (dev->pci_conf_sb[1][0x40] & 0x40)
if (dev->pci_conf_sb[1][0x41] & 0x40)
ide_sec_enable();
}
}
@@ -204,7 +204,7 @@ umc_8886_write(int func, int addr, uint8_t val, void *priv)
case 0x50 ... 0x55:
case 0x57:
case 0x70 ... 0x76:
case 0x80 ... 0x82:
case 0x80 ... 0x83:
case 0x90 ... 0x92:
case 0xa0 ... 0xa1:
case 0xa5 ... 0xa8:
@@ -270,13 +270,13 @@ umc_8886_write(int func, int addr, uint8_t val, void *priv)
break;
case 0x3c:
case 0x41 ... 0x4b:
case 0x54 ... 0x59:
case 0x40:
case 0x42 ... 0x59:
if (dev->ide_id == 0x673a)
dev->pci_conf_sb[func][addr] = val;
break;
case 0x40:
case 0x41:
if (dev->ide_id == 0x673a) {
dev->pci_conf_sb[func][addr] = val;
umc_8886_ide_handler(dev);
@@ -322,25 +322,17 @@ umc_8886_reset(void *priv)
dev->pci_conf_sb[0][0x09] = 0x00;
dev->pci_conf_sb[0][0x0a] = 0x01;
dev->pci_conf_sb[0][0x0b] = 0x06;
dev->pci_conf_sb[0][0x40] = 0x01;
dev->pci_conf_sb[0][0x41] = 0x06;
dev->pci_conf_sb[0][0x41] = 0x04;
dev->pci_conf_sb[0][0x42] = 0x08;
dev->pci_conf_sb[0][0x43] = 0x00;
dev->pci_conf_sb[0][0x44] = 0x00;
dev->pci_conf_sb[0][0x45] = 0x04;
dev->pci_conf_sb[0][0x46] = 0x00;
dev->pci_conf_sb[0][0x47] = 0x40;
dev->pci_conf_sb[0][0x50] = 0x01;
dev->pci_conf_sb[0][0x51] = 0x03;
dev->pci_conf_sb[0][0x56] = dev->pci_conf_sb[0][0x57] = 0x00;
dev->pci_conf_sb[0][0x70] = dev->pci_conf_sb[0][0x71] = 0x00;
dev->pci_conf_sb[0][0x72] = dev->pci_conf_sb[0][0x73] = 0x00;
dev->pci_conf_sb[0][0x74] = dev->pci_conf_sb[0][0x76] = 0x00;
dev->pci_conf_sb[0][0x82] = 0x00;
dev->pci_conf_sb[0][0x90] = dev->pci_conf_sb[0][0x91] = 0x00;
dev->pci_conf_sb[0][0xa0] = dev->pci_conf_sb[0][0xa2] = 0x00;
dev->pci_conf_sb[0][0xa4] = 0x00;
dev->pci_conf_sb[0][0xa8] = 0x20;
dev->pci_conf_sb[0][0x43] = 0x9a;
dev->pci_conf_sb[0][0x44] = 0xbc;
dev->pci_conf_sb[0][0x45] = 0x00;
dev->pci_conf_sb[0][0x46] = 0x10;
dev->pci_conf_sb[0][0x47] = 0x30;
dev->pci_conf_sb[0][0x51] = 0x02;
if (dev->has_ide) {
dev->pci_conf_sb[1][0x00] = 0x60; /* UMC */
@@ -363,13 +355,15 @@ umc_8886_reset(void *priv)
dev->pci_conf_sb[1][0x21] = 0x10;
if (dev->ide_id == 0x673a) {
dev->pci_conf_sb[1][0x40] = 0xc0;
dev->pci_conf_sb[1][0x41] = 0x00;
dev->pci_conf_sb[1][0x40] = 0x00;
dev->pci_conf_sb[1][0x41] = 0xc0;
dev->pci_conf_sb[1][0x42] = dev->pci_conf_sb[1][0x43] = 0x00;
dev->pci_conf_sb[1][0x44] = dev->pci_conf_sb[1][0x45] = 0x00;
dev->pci_conf_sb[1][0x46] = dev->pci_conf_sb[1][0x47] = 0x00;
dev->pci_conf_sb[1][0x48] = dev->pci_conf_sb[1][0x49] = 0x00;
dev->pci_conf_sb[1][0x4a] = dev->pci_conf_sb[1][0x4b] = 0x00;
dev->pci_conf_sb[1][0x48] = dev->pci_conf_sb[1][0x49] = 0x55;
dev->pci_conf_sb[1][0x4a] = dev->pci_conf_sb[1][0x4b] = 0x55;
dev->pci_conf_sb[1][0x4c] = dev->pci_conf_sb[1][0x4d] = 0x88;
dev->pci_conf_sb[1][0x4e] = dev->pci_conf_sb[1][0x4f] = 0xaa;
dev->pci_conf_sb[1][0x54] = dev->pci_conf_sb[1][0x55] = 0x00;
dev->pci_conf_sb[1][0x56] = dev->pci_conf_sb[1][0x57] = 0x00;
dev->pci_conf_sb[1][0x58] = dev->pci_conf_sb[1][0x59] = 0x00;

92
src/chipset/umc_hb4.c
View File

@@ -136,6 +136,9 @@ hb4_log(const char *fmt, ...)
#endif
typedef struct hb4_t {
uint8_t idx;
uint8_t access_data;
uint8_t pci_slot;
uint8_t pci_conf[256]; /* PCI Registers */
@@ -176,7 +179,9 @@ hb4_shadow_bios_low(hb4_t *dev)
int state;
/* Erratum in Vogons' datasheet: Register 55h bit 7 in fact controls E0000-FFFFF. */
state = shadow_bios[dev->pci_conf[0x55] >> 6];
state = (dev->pci_conf[0x55] & 0x80) ? shadow_read[dev->pci_conf[0x54] & 0x01] :
MEM_READ_EXTANY;
state |= shadow_write[(dev->pci_conf[0x55] >> 6) & 0x01];
if (state != dev->mem_state[7]) {
mem_set_mem_state_both(0xe0000, 0x10000, state);
@@ -194,8 +199,9 @@ hb4_shadow_main(hb4_t *dev)
int n = 0;
for (uint8_t i = 0; i < 6; i++) {
state = shadow_read[(dev->pci_conf[0x54] >> (i + 2)) & 0x01] |
shadow_write[(dev->pci_conf[0x55] >> 6) & 0x01];
state = (dev->pci_conf[0x55] & 0x80) ? shadow_read[(dev->pci_conf[0x54] >> (i + 2)) & 0x01] :
MEM_READ_EXTANY;
state |= shadow_write[(dev->pci_conf[0x55] >> 6) & 0x01];
if (state != dev->mem_state[i + 1]) {
n++;
@@ -212,8 +218,9 @@ hb4_shadow_video(hb4_t *dev)
{
int state;
state = shadow_read[(dev->pci_conf[0x54] >> 1) & 0x01] |
shadow_write[(dev->pci_conf[0x55] >> 6) & 0x01];
state = (dev->pci_conf[0x55] & 0x80) ? shadow_read[(dev->pci_conf[0x54] >> 1) & 0x01] :
MEM_READ_EXTANY;
state |= shadow_write[(dev->pci_conf[0x55] >> 6) & 0x01];
if (state != dev->mem_state[0]) {
mem_set_mem_state_both(0xc0000, 0x8000, state);
@@ -302,7 +309,7 @@ hb4_write(UNUSED(int func), int addr, uint8_t val, void *priv)
hb4_shadow(dev);
break;
case 0x56 ... 0x5b:
case 0x56 ... 0x5a:
case 0x5e ... 0x5f:
dev->pci_conf[addr] = val;
break;
@@ -313,10 +320,14 @@ hb4_write(UNUSED(int func), int addr, uint8_t val, void *priv)
hb4_smram(dev);
break;
case 0x61 ... 0x62:
case 0x61:
dev->pci_conf[addr] = val;
break;
case 0x62:
dev->pci_conf[addr] = val & 0x03;
break;
default:
break;
}
@@ -354,14 +365,16 @@ hb4_reset(void *priv)
dev->pci_conf[0x52] = 0x01;
dev->pci_conf[0x53] = 0x00;
dev->pci_conf[0x54] = 0x00;
dev->pci_conf[0x55] = 0x00;
dev->pci_conf[0x56] = 0x00;
dev->pci_conf[0x57] = 0x00;
dev->pci_conf[0x58] = 0x00;
dev->pci_conf[0x59] = 0x00;
dev->pci_conf[0x5a] = 0x04;
dev->pci_conf[0x55] = 0x40;
dev->pci_conf[0x56] = 0xff;
dev->pci_conf[0x57] = 0x0f;
dev->pci_conf[0x58] = 0xff;
dev->pci_conf[0x59] = 0x0f;
dev->pci_conf[0x5a] = 0x00;
dev->pci_conf[0x5b] = 0x2c;
dev->pci_conf[0x5c] = 0x00;
dev->pci_conf[0x5d] = 0x20;
dev->pci_conf[0x5d] = 0x0f;
dev->pci_conf[0x5e] = 0x00;
dev->pci_conf[0x5f] = 0xff;
dev->pci_conf[0x60] = 0x00;
dev->pci_conf[0x61] = 0x00;
@@ -385,6 +398,55 @@ hb4_close(void *priv)
free(dev);
}
static void
ims8848_write(uint16_t addr, uint8_t val, void *priv)
{
hb4_t *dev = (hb4_t *) priv;
switch (addr) {
case 0x22:
dev->idx = val;
break;
case 0x23:
if (((val & 0x0f) == ((dev->idx >> 4) & 0x0f)) && ((val & 0xf0) == ((dev->idx << 4) & 0xf0)))
dev->access_data = 1;
break;
case 0x24:
if (dev->access_data)
dev->access_data = 0;
break;
default:
break;
}
}
static uint8_t
ims8848_read(uint16_t addr, void *priv)
{
uint8_t ret = 0xff;
hb4_t *dev = (hb4_t *) priv;
switch (addr) {
case 0x22:
ret = dev->idx;
break;
case 0x23:
ret = (dev->idx >> 4) | (dev->idx << 4);
break;
case 0x24:
if (dev->access_data) {
ret = dev->pci_conf[dev->idx];
dev->access_data = 0;
}
break;
default:
break;
}
return ret;
}
static void *
hb4_init(UNUSED(const device_t *info))
{
@@ -402,6 +464,8 @@ hb4_init(UNUSED(const device_t *info))
dev->smram_base = 0x000a0000;
hb4_reset(dev);
io_sethandler(0x0022, 0x0003, ims8848_read, NULL, NULL, ims8848_write, NULL, NULL, dev);
return dev;
}

20
src/cpu/cpu.c
View File

@@ -3301,26 +3301,17 @@ pentium_invalid_rdmsr:
break;
/* SYSENTER_CS - SYSENTER target CS */
case 0x174:
if (cpu_s->cpu_type == CPU_PENTIUMPRO)
goto i686_invalid_rdmsr;
EAX &= 0xffff0000;
EAX |= msr.sysenter_cs;
EDX = 0x00000000;
break;
/* SYSENTER_ESP - SYSENTER target ESP */
case 0x175:
if (cpu_s->cpu_type == CPU_PENTIUMPRO)
goto i686_invalid_rdmsr;
EAX = msr.sysenter_esp;
EDX = 0x00000000;
break;
/* SYSENTER_EIP - SYSENTER target EIP */
case 0x176:
if (cpu_s->cpu_type == CPU_PENTIUMPRO)
goto i686_invalid_rdmsr;
EAX = msr.sysenter_eip;
EDX = 0x00000000;
break;
@@ -3715,7 +3706,7 @@ cpu_WRMSR(void)
/* Extended Feature Enable Register */
case 0xc0000080:
temp = EAX | ((uint64_t) EDX << 32);
if (temp & ~1ULL)
if (temp & ~0x1fULL)
x86gpf(NULL, 0);
else
msr.amd_efer = temp;
@@ -4070,23 +4061,14 @@ pentium_invalid_wrmsr:
break;
/* SYSENTER_CS - SYSENTER target CS */
case 0x174:
if (cpu_s->cpu_type == CPU_PENTIUMPRO)
goto i686_invalid_wrmsr;
msr.sysenter_cs = EAX & 0xFFFF;
break;
/* SYSENTER_ESP - SYSENTER target ESP */
case 0x175:
if (cpu_s->cpu_type == CPU_PENTIUMPRO)
goto i686_invalid_wrmsr;
msr.sysenter_esp = EAX;
break;
/* SYSENTER_EIP - SYSENTER target EIP */
case 0x176:
if (cpu_s->cpu_type == CPU_PENTIUMPRO)
goto i686_invalid_wrmsr;
msr.sysenter_eip = EAX;
break;
/* MCG_CAP - Machine Check Global Capability */

8
src/cpu/x86_ops_mov_ctrl.h
View File

@@ -184,7 +184,7 @@ opMOV_CRx_r_a16(uint32_t fetchdat)
fetch_ea_16(fetchdat);
switch (cpu_reg) {
case 0:
if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x00000001)
if ((cpu_state.regs[cpu_rm].l ^ cr0) & (0x00000001 | WP_FLAG))
flushmmucache();
else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) {
if (is_p6 || cpu_use_dynarec)
@@ -222,7 +222,7 @@ opMOV_CRx_r_a16(uint32_t fetchdat)
break;
case 4:
if (cpu_has_feature(CPU_FEATURE_CR4)) {
if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PAE | CR4_PGE))
if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PSE | CR4_PAE | CR4_PGE))
flushmmucache();
cr4 = cpu_state.regs[cpu_rm].l & cpu_CR4_mask;
break;
@@ -249,7 +249,7 @@ opMOV_CRx_r_a32(uint32_t fetchdat)
fetch_ea_32(fetchdat);
switch (cpu_reg) {
case 0:
if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x00000001)
if ((cpu_state.regs[cpu_rm].l ^ cr0) & (0x00000001 | WP_FLAG))
flushmmucache();
else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) {
if (is_p6 || cpu_use_dynarec)
@@ -287,7 +287,7 @@ opMOV_CRx_r_a32(uint32_t fetchdat)
break;
case 4:
if (cpu_has_feature(CPU_FEATURE_CR4)) {
if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PAE | CR4_PGE))
if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PSE | CR4_PAE | CR4_PGE))
flushmmucache();
cr4 = cpu_state.regs[cpu_rm].l & cpu_CR4_mask;
break;

8
src/cpu/x86_ops_mov_ctrl_2386.h
View File

@@ -180,7 +180,7 @@ opMOV_CRx_r_a16(uint32_t fetchdat)
fetch_ea_16(fetchdat);
switch (cpu_reg) {
case 0:
if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x00000001)
if ((cpu_state.regs[cpu_rm].l ^ cr0) & (0x00000001 | WP_FLAG))
flushmmucache();
else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) {
flushmmucache_nopc();
@@ -214,7 +214,7 @@ opMOV_CRx_r_a16(uint32_t fetchdat)
break;
case 4:
if (cpu_has_feature(CPU_FEATURE_CR4)) {
if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PAE | CR4_PGE))
if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PSE | CR4_PAE | CR4_PGE))
flushmmucache();
cr4 = cpu_state.regs[cpu_rm].l & cpu_CR4_mask;
break;
@@ -241,7 +241,7 @@ opMOV_CRx_r_a32(uint32_t fetchdat)
fetch_ea_32(fetchdat);
switch (cpu_reg) {
case 0:
if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x00000001)
if ((cpu_state.regs[cpu_rm].l ^ cr0) & (0x00000001 | WP_FLAG))
flushmmucache();
else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) {
flushmmucache_nopc();
@@ -275,7 +275,7 @@ opMOV_CRx_r_a32(uint32_t fetchdat)
break;
case 4:
if (cpu_has_feature(CPU_FEATURE_CR4)) {
if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PAE | CR4_PGE))
if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PSE | CR4_PAE | CR4_PGE))
flushmmucache();
cr4 = cpu_state.regs[cpu_rm].l & cpu_CR4_mask;
break;

12
src/cpu/x86seg.c
View File

@@ -48,12 +48,12 @@
#define seg_writememwl writememwl_2386
#define seg_writememll writememll_2386
#else
#define seg_readmembl readmembl_2386
#define seg_readmemwl readmemwl_2386
#define seg_readmemll readmemll_2386
#define seg_writemembl writemembl_2386
#define seg_writememwl writememwl_2386
#define seg_writememll writememll_2386
#define seg_readmembl readmembl
#define seg_readmemwl readmemwl
#define seg_readmemll readmemll
#define seg_writemembl writemembl
#define seg_writememwl writememwl
#define seg_writememll writememll
#endif
#define DPL ((segdat[2] >> 13) & 3)

2
src/device/kbc_at.c
View File

@@ -821,7 +821,7 @@ write_p2(atkbc_t *dev, uint8_t val)
softresetx86(); /* Pulse reset! */
cpu_set_edx();
flushmmucache();
if (kbc_ven == KBC_VEN_ALI)
if ((kbc_ven == KBC_VEN_ALI) || !strcmp(machine_get_internal_name(), "spc7700plw"))
smbase = 0x00030000;
/* Yes, this is a hack, but until someone gets ahold of the real PCD-2L

3
src/disk/hdd_image.c
View File

@@ -577,6 +577,7 @@ hdd_image_write(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer)
}
num_write = fwrite(buffer, 512, count, hdd_images[id].file);
fflush(hdd_images[id].file);
hdd_images[id].pos = sector + num_write;
}
}
@@ -618,6 +619,8 @@ hdd_image_zero(uint8_t id, uint32_t sector, uint32_t count)
hdd_images[id].pos = sector + i;
fwrite(empty_sector, 512, 1, hdd_images[id].file);
}
fflush(hdd_images[id].file);
}
}

8
src/disk/minivhd/minivhd_io.c
View File

@@ -89,6 +89,8 @@ mvhd_write_empty_sectors(FILE *f, int sector_count)
for (int i = 0; i < sector_count; i++)
fwrite(zero_bytes, sizeof zero_bytes, 1, f);
fflush(f);
}
/**
@@ -141,6 +143,7 @@ write_bat_entry(MVHDMeta *vhdm, int blk)
mvhd_fseeko64(vhdm->f, table_offset, SEEK_SET);
fwrite(&offset, sizeof offset, 1, vhdm->f);
fflush(vhdm->f);
}
/**
@@ -197,6 +200,8 @@ create_block(MVHDMeta *vhdm, int blk)
/* We no longer have a sparse block. Update that BAT! */
vhdm->block_offset[blk] = sect_offset;
write_bat_entry(vhdm, blk);
fflush(vhdm->f);
}
int
@@ -317,6 +322,7 @@ mvhd_fixed_write(MVHDMeta *vhdm, uint32_t offset, int num_sectors, void *in_buff
addr = (int64_t)offset * MVHD_SECTOR_SIZE;
mvhd_fseeko64(vhdm->f, addr, SEEK_SET);
fwrite(in_buff, transfer_sectors * MVHD_SECTOR_SIZE, 1, vhdm->f);
fflush(vhdm->f);
return truncated_sectors;
}
@@ -376,6 +382,8 @@ mvhd_sparse_diff_write(MVHDMeta *vhdm, uint32_t offset, int num_sectors, void *i
/* And write the sector bitmap for the last block we visited to disk */
write_curr_sect_bitmap(vhdm);
fflush(vhdm->f);
return truncated_sectors;
}

4
src/disk/mo.c
View File

@@ -951,6 +951,8 @@ mo_blocks(mo_t *dev, int32_t *len, UNUSED(int first_batch), int out)
if (out) {
if (fwrite(dev->buffer + (i * dev->drv->sector_size), 1, dev->drv->sector_size, dev->drv->fp) != dev->drv->sector_size)
fatal("mo_blocks(): Error writing data\n");
fflush(dev->drv->fp);
} else {
if (fread(dev->buffer + (i * dev->drv->sector_size), 1, dev->drv->sector_size, dev->drv->fp) != dev->drv->sector_size)
fatal("mo_blocks(): Error reading data\n");
@@ -1069,6 +1071,8 @@ mo_erase(mo_t *dev)
fwrite(dev->buffer, 1, dev->drv->sector_size, dev->drv->fp);
}
fflush(dev->drv->fp);
mo_log("MO %i: Erased %i bytes of blocks...\n", dev->id, i * dev->drv->sector_size);
dev->sector_pos += i;

4
src/disk/zip.c
View File

@@ -1134,6 +1134,8 @@ zip_blocks(zip_t *dev, int32_t *len, UNUSED(int first_batch), int out)
if (out) {
if (fwrite(dev->buffer + (i << 9), 1, 512, dev->drv->fp) != 512)
fatal("zip_blocks(): Error writing data\n");
fflush(dev->drv->fp);
} else {
if (fread(dev->buffer + (i << 9), 1, 512, dev->drv->fp) != 512)
fatal("zip_blocks(): Error reading data\n");
@@ -2125,6 +2127,8 @@ zip_phase_data_out(scsi_common_t *sc)
if (fwrite(dev->buffer, 1, 512, dev->drv->fp) != 512)
fatal("zip_phase_data_out(): Error writing data\n");
}
fflush(dev->drv->fp);
break;
case GPCMD_MODE_SELECT_6:
case GPCMD_MODE_SELECT_10:

6
src/floppy/fdd_86f.c
View File

@@ -1854,6 +1854,7 @@ d86f_write_direct_common(int drive, int side, uint16_t byte, uint8_t type, uint3
if (type == 0) {
/* Byte write. */
encoded_byte = d86f_encode_byte(drive, 0, dbyte, dpbyte);
dev->preceding_bit[side] = encoded_byte & 1;
if (!d86f_reverse_bytes(drive)) {
mask_data = encoded_byte >> 8;
encoded_byte &= 0xFF;
@@ -1863,6 +1864,7 @@ d86f_write_direct_common(int drive, int side, uint16_t byte, uint8_t type, uint3
} else {
/* Word write. */
encoded_byte = byte;
dev->preceding_bit[side] = (encoded_byte >> 8) & 1;
if (d86f_reverse_bytes(drive)) {
mask_data = encoded_byte >> 8;
encoded_byte &= 0xFF;
@@ -1871,8 +1873,6 @@ d86f_write_direct_common(int drive, int side, uint16_t byte, uint8_t type, uint3
}
}
dev->preceding_bit[side] = encoded_byte & 1;
if (d86f_has_surface_desc(drive)) {
/* Inverted track data, clear bits are now set. */
mask_data = ~dev->track_encoded_data[side][pos];
@@ -3225,6 +3225,8 @@ d86f_writeback(int drive)
free(dev->filebuf);
}
#endif
fflush(dev->fp);
}
void

2
src/floppy/fdd_imd.c
View File

@@ -549,6 +549,8 @@ imd_writeback(int drive)
}
}
}
fflush(dev->fp);
}
static uint8_t

2
src/floppy/fdd_img.c
View File

@@ -431,6 +431,8 @@ write_back(int drive)
if (fwrite(dev->track_data[side], 1, size, dev->fp) != size)
fatal("IMG write_back(): Error writing data\n");
}
fflush(dev->fp);
}
static uint16_t

2
src/include/86box/vid_cga.h
View File

@@ -31,6 +31,8 @@ typedef struct cga_t {
uint8_t cgamode;
uint8_t cgacol;
uint8_t lp_strobe;
int fontbase;
int linepos;
int displine;

20
src/include/86box/vid_voodoo_regs.h
View File

@@ -338,18 +338,22 @@ enum {
};
enum {
LFB_FORMAT_RGB565 = 0,
LFB_FORMAT_RGB555 = 1,
LFB_FORMAT_ARGB1555 = 2,
LFB_FORMAT_XRGB8888 = 4,
LFB_FORMAT_ARGB8888 = 5,
LFB_FORMAT_DEPTH = 15,
LFB_FORMAT_MASK = 15
LFB_FORMAT_RGB565 = 0,
LFB_FORMAT_RGB555 = 1,
LFB_FORMAT_ARGB1555 = 2,
LFB_FORMAT_XRGB8888 = 4,
LFB_FORMAT_ARGB8888 = 5,
LFB_FORMAT_DEPTH_RGB565 = 12,
LFB_FORMAT_DEPTH_RGB555 = 13,
LFB_FORMAT_DEPTH_ARGB1555 = 14,
LFB_FORMAT_DEPTH = 15,
LFB_FORMAT_MASK = 15
};
enum {
LFB_WRITE_COLOUR = 1,
LFB_WRITE_DEPTH = 2
LFB_WRITE_DEPTH = 2,
LFB_WRITE_BOTH = 4
};
enum {

2
src/machine/m_at_sockets7.c
View File

@@ -263,7 +263,7 @@ machine_at_mvp3_init(const machine_t *model)
device_add(&via_mvp3_device);
device_add(&via_vt82c586b_device);
device_add(&keyboard_ps2_pci_device);
device_add(&w83877tf_device);
device_add(&w83877tf_acorp_device);
device_add(&sst_flash_39sf010_device);
spd_register(SPD_TYPE_SDRAM, 0x3, 256);

36
src/machine/m_tandy.c
View File

@@ -84,6 +84,7 @@ typedef struct t1kvid_t {
uint32_t b8000_mask;
uint32_t b8000_limit;
uint8_t planar_ctrl;
uint8_t lp_strobe;
int linepos;
int displine;
@@ -770,6 +771,15 @@ recalc_address_sl(tandy_t *dev)
}
}
static void
vid_update_latch(t1kvid_t *vid)
{
uint32_t lp_latch = vid->displine * vid->crtc[1];
vid->crtc[0x10] = (lp_latch >> 8) & 0x3f;
vid->crtc[0x11] = lp_latch & 0xff;
}
static void
vid_out(uint16_t addr, uint8_t val, void *priv)
{
@@ -816,6 +826,18 @@ vid_out(uint16_t addr, uint8_t val, void *priv)
vid->array_index = val & 0x1f;
break;
case 0x3db:
if (!dev->is_sl2 && (vid->lp_strobe == 1))
vid->lp_strobe = 0;
break;
case 0x3dc:
if (!dev->is_sl2 && (vid->lp_strobe == 0)) {
vid->lp_strobe = 1;
vid_update_latch(vid);
}
break;
case 0x03de:
if (vid->array_index & 16)
val &= 0xf;
@@ -852,7 +874,7 @@ static uint8_t
vid_in(uint16_t addr, void *priv)
{
const tandy_t *dev = (tandy_t *) priv;
const t1kvid_t *vid = dev->vid;
t1kvid_t *vid = dev->vid;
uint8_t ret = 0xff;
if ((addr >= 0x3d0) && (addr <= 0x3d7))
@@ -871,6 +893,18 @@ vid_in(uint16_t addr, void *priv)
ret = vid->stat;
break;
case 0x3db:
if (!dev->is_sl2 && (vid->lp_strobe == 1))
vid->lp_strobe = 0;
break;
case 0x3dc:
if (!dev->is_sl2 && (vid->lp_strobe == 0)) {
vid->lp_strobe = 1;
vid_update_latch(vid);
}
break;
default:
break;
}

16
src/mem/mem.c
View File

@@ -320,7 +320,7 @@ mmutranslatereal_normal(uint32_t addr, int rw)
if ((temp & 0x80) && (cr4 & CR4_PSE)) {
/*4MB page*/
if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !(temp & 2) && (((CPL == 3) && !cpl_override) || ((is486 || isibm486) && (cr0 & WP_FLAG))))) {
if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !cpl_override && !(temp & 2) && (((CPL == 3) && !cpl_override) || ((is486 || isibm486) && (cr0 & WP_FLAG))))) {
cr2 = addr;
temp &= 1;
if (CPL == 3)
@@ -341,7 +341,7 @@ mmutranslatereal_normal(uint32_t addr, int rw)
temp = rammap((temp & ~0xfff) + ((addr >> 10) & 0xffc));
temp3 = temp & temp2;
if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !(temp3 & 2) && (((CPL == 3) && !cpl_override) || ((is486 || isibm486) && (cr0 & WP_FLAG))))) {
if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !cpl_override && !(temp3 & 2) && (((CPL == 3) && !cpl_override) || ((is486 || isibm486) && (cr0 & WP_FLAG))))) {
cr2 = addr;
temp &= 1;
if (CPL == 3)
@@ -405,7 +405,7 @@ mmutranslatereal_pae(uint32_t addr, int rw)
if (temp & 0x80) {
/*2MB page*/
if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !(temp & 2) && (((CPL == 3) && !cpl_override) || (cr0 & WP_FLAG)))) {
if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !cpl_override && !(temp & 2) && (((CPL == 3) && !cpl_override) || (cr0 & WP_FLAG)))) {
cr2 = addr;
temp &= 1;
if (CPL == 3)
@@ -426,7 +426,7 @@ mmutranslatereal_pae(uint32_t addr, int rw)
addr4 = (temp & ~0xfffULL) + ((addr >> 9) & 0xff8);
temp = rammap64(addr4) & 0x000000ffffffffffULL;
temp3 = temp & temp4;
if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !(temp3 & 2) && (((CPL == 3) && !cpl_override) || (cr0 & WP_FLAG)))) {
if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !cpl_override && !(temp3 & 2) && (((CPL == 3) && !cpl_override) || (cr0 & WP_FLAG)))) {
cr2 = addr;
temp &= 1;
if (CPL == 3)
@@ -488,7 +488,7 @@ mmutranslate_noabrt_normal(uint32_t addr, int rw)
if ((temp & 0x80) && (cr4 & CR4_PSE)) {
/*4MB page*/
if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !(temp & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !cpl_override && !(temp & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
return 0xffffffffffffffffULL;
return (temp & ~0x3fffff) + (addr & 0x3fffff);
@@ -497,7 +497,7 @@ mmutranslate_noabrt_normal(uint32_t addr, int rw)
temp = rammap((temp & ~0xfff) + ((addr >> 10) & 0xffc));
temp3 = temp & temp2;
if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !(temp3 & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !cpl_override && !(temp3 & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
return 0xffffffffffffffffULL;
return (uint64_t) ((temp & ~0xfff) + (addr & 0xfff));
@@ -532,7 +532,7 @@ mmutranslate_noabrt_pae(uint32_t addr, int rw)
if (temp & 0x80) {
/*2MB page*/
if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !(temp & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !cpl_override && !(temp & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
return 0xffffffffffffffffULL;
return ((temp & ~0x1fffffULL) + (addr & 0x1fffff)) & 0x000000ffffffffffULL;
@@ -543,7 +543,7 @@ mmutranslate_noabrt_pae(uint32_t addr, int rw)
temp3 = temp & temp4;
if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !(temp3 & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !cpl_override && !(temp3 & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
return 0xffffffffffffffffULL;
return ((temp & ~0xfffULL) + ((uint64_t) (addr & 0xfff))) & 0x000000ffffffffffULL;

8
src/mem/mmu_2386.c
View File

@@ -198,7 +198,7 @@ mmutranslatereal_2386(uint32_t addr, int rw)
if ((temp & 0x80) && (cr4 & CR4_PSE)) {
/*4MB page*/
if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !(temp & 2) && (((CPL == 3) && !cpl_override) || ((is486 || isibm486) && (cr0 & WP_FLAG))))) {
if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !cpl_override && !(temp & 2) && (((CPL == 3) && !cpl_override) || ((is486 || isibm486) && (cr0 & WP_FLAG))))) {
cr2 = addr;
temp &= 1;
if (CPL == 3)
@@ -219,7 +219,7 @@ mmutranslatereal_2386(uint32_t addr, int rw)
temp = mem_readl_map((temp & ~0xfff) + ((addr >> 10) & 0xffc));
temp3 = temp & temp2;
if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !(temp3 & 2) && (((CPL == 3) && !cpl_override) || ((is486 || isibm486) && (cr0 & WP_FLAG))))) {
if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !cpl_override && !(temp3 & 2) && (((CPL == 3) && !cpl_override) || ((is486 || isibm486) && (cr0 & WP_FLAG))))) {
cr2 = addr;
temp &= 1;
if (CPL == 3)
@@ -258,7 +258,7 @@ mmutranslate_noabrt_2386(uint32_t addr, int rw)
if ((temp & 0x80) && (cr4 & CR4_PSE)) {
/*4MB page*/
if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !(temp & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !cpl_override && !(temp & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
return 0xffffffffffffffffULL;
return (temp & ~0x3fffff) + (addr & 0x3fffff);
@@ -267,7 +267,7 @@ mmutranslate_noabrt_2386(uint32_t addr, int rw)
temp = mem_readl_map((temp & ~0xfff) + ((addr >> 10) & 0xffc));
temp3 = temp & temp2;
if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !(temp3 & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !cpl_override && !(temp3 & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
return 0xffffffffffffffffULL;
return (uint64_t) ((temp & ~0xfff) + (addr & 0xfff));

5
src/network/net_rtl8139.c
View File

@@ -1076,10 +1076,11 @@ rtl8139_reset(void *priv)
s->cplus_enabled = 0;
#if 0
s->BasicModeCtrl = 0x3100; // 100Mbps, full duplex, autonegotiation
s->BasicModeCtrl = 0x2100; // 100Mbps, full duplex
#endif
s->BasicModeCtrl = 0x3100; // 100Mbps, full duplex, autonegotiation
s->BasicModeCtrl = 0x1000; // autonegotiation
#endif
s->BasicModeCtrl = 0x1100; // full duplex, autonegotiation
rtl8139_reset_phy(s);

8
src/qt/qt_platform.cpp
View File

@@ -54,6 +54,10 @@
# include <sys/mman.h>
#endif
#ifdef Q_OS_OPENBSD
# include <pthread_np.h>
#endif
#if 0
static QByteArray buf;
#endif
@@ -804,8 +808,10 @@ plat_set_thread_name(void *thread, const char *name)
char truncated[16];
# endif
strncpy(truncated, name, sizeof(truncated) - 1);
# ifdef Q_OS_DARWIN
# if defined(Q_OS_DARWIN)
pthread_setname_np(truncated);
# elif defined(Q_OS_OPENBSD)
pthread_set_name_np(thread ? *((pthread_t *) thread) : pthread_self(), truncated);
# else
pthread_setname_np(thread ? *((pthread_t *) thread) : pthread_self(), truncated);
# endif

2
src/qt/qt_progsettings.ui
View File

@@ -88,7 +88,7 @@
</property>
</widget>
</item>
<item row="7" column="0" colspan="2">
<item row="7" column="0" colspan="3">
<widget class="QSlider" name="horizontalSlider">
<property name="minimum">
<number>10</number>

5
src/sound/snd_adlibgold.c
View File

@@ -791,8 +791,8 @@ adgold_get_buffer(int32_t *buffer, int len, void *priv)
adgold_update(adgold);
for (c = 0; c < len * 2; c += 2) {
adgold_buffer[c] += ((adgold->mma_buffer[0][c >> 1] * adgold->samp_vol_l) >> 7) / 4;
adgold_buffer[c + 1] += ((adgold->mma_buffer[1][c >> 1] * adgold->samp_vol_r) >> 7) / 4;
adgold_buffer[c] = ((adgold->mma_buffer[0][c >> 1] * adgold->samp_vol_l) >> 7) / 4;
adgold_buffer[c + 1] = ((adgold->mma_buffer[1][c >> 1] * adgold->samp_vol_r) >> 7) / 4;
}
if (adgold->surround_enabled)
@@ -904,7 +904,6 @@ adgold_get_music_buffer(int32_t *buffer, int len, void *priv)
int c;
const int32_t *opl_buf = adgold->opl.update(adgold->opl.priv);
adgold_update(adgold);
for (c = 0; c < len * 2; c += 2) {
adgold_buffer[c] = ((opl_buf[c] * adgold->fm_vol_l) >> 7) / 2;

6
src/sound/snd_sn76489.c
View File

@@ -189,12 +189,6 @@ void
sn74689_set_extra_divide(sn76489_t *sn76489, int enable)
{
sn76489->extra_divide = enable;
if (!enable) {
for (uint8_t c = 1; c < 4; c++)
sn76489->latch[c] &= ~(0x400 << 6);
sn76489->latch[0] &= ~(0x400 << 6);
}
}
void

4
src/unix/assets/86Box.spec
View File

@@ -15,7 +15,7 @@
%global romver 4.1
Name: 86Box
Version: 4.3
Version: 4.2.2
Release: 1%{?dist}
Summary: Classic PC emulator
License: GPLv2+
@@ -121,5 +121,5 @@ popd
%{_datadir}/%{name}/roms
%changelog
* Sat Aug 31 Jasmine Iwanek <jriwanek[AT]gmail.com> 4.3-1
* Sat Aug 31 Jasmine Iwanek <jriwanek[AT]gmail.com> 4.2.2-1
- Bump release

2
src/unix/assets/net.86box.86Box.metainfo.xml
View File

@@ -11,7 +11,7 @@
</categories>
<launchable type="desktop-id">net.86box.86Box.desktop</launchable>
<releases>
<release version="4.3" date="2024-09-02"/>
<release version="4.2.2" date="2024-09-28"/>
</releases>
<content_rating type="oars-1.1" />
<description>

36
src/video/vid_cga.c
View File

@@ -70,6 +70,15 @@ static video_timings_t timing_cga = { .type = VIDEO_ISA, .write_b = 8, .write_w
void cga_recalctimings(cga_t *cga);
static void
cga_update_latch(cga_t *cga)
{
uint32_t lp_latch = cga->displine * cga->crtc[1];
cga->crtc[0x10] = (lp_latch >> 8) & 0x3f;
cga->crtc[0x11] = lp_latch & 0xff;
}
void
cga_out(uint16_t addr, uint8_t val, void *priv)
{
@@ -87,7 +96,7 @@ cga_out(uint16_t addr, uint8_t val, void *priv)
old = cga->crtc[cga->crtcreg];
cga->crtc[cga->crtcreg] = val & crtcmask[cga->crtcreg];
if (old != val) {
if ((cga->crtcreg < 0xe) || (cga->crtcreg > 0x10)) {
if ((cga->crtcreg < 0xe) || (cga->crtcreg > 0x11)) {
cga->fullchange = changeframecount;
cga_recalctimings(cga);
}
@@ -111,6 +120,17 @@ cga_out(uint16_t addr, uint8_t val, void *priv)
cga_recalctimings(cga);
return;
case 0x3DB:
if (cga->lp_strobe == 1)
cga->lp_strobe = 0;
return;
case 0x3DC:
if (cga->lp_strobe == 0) {
cga->lp_strobe = 1;
cga_update_latch(cga);
}
return;
default:
break;
}
@@ -119,8 +139,7 @@ cga_out(uint16_t addr, uint8_t val, void *priv)
uint8_t
cga_in(uint16_t addr, void *priv)
{
const cga_t *cga = (cga_t *) priv;
cga_t *cga = (cga_t *) priv;
uint8_t ret = 0xff;
if ((addr >= 0x3d0) && (addr <= 0x3d7))
@@ -137,6 +156,17 @@ cga_in(uint16_t addr, void *priv)
ret = cga->cgastat;
break;
case 0x3DB:
if (cga->lp_strobe == 1)
cga->lp_strobe = 0;
break;
case 0x3DC:
if (cga->lp_strobe == 0) {
cga->lp_strobe = 1;
cga_update_latch(cga);
}
break;
default:
break;
}

1923
src/video/vid_s3.c
View File

File diff suppressed because it is too large Load Diff

28
src/video/vid_voodoo_fb.c
View File

@@ -373,6 +373,26 @@ voodoo_fb_writel(uint32_t addr, uint32_t val, void *priv)
addr >>= 1;
break;
case LFB_FORMAT_DEPTH_RGB565:
colour_data[0] = rgb565[val & 0xffff];
depth_data[0] = val >> 16;
write_mask = LFB_WRITE_BOTH;
count = 1;
break;
case LFB_FORMAT_DEPTH_RGB555:
colour_data[0] = argb1555[val & 0xffff];
depth_data[0] = val >> 16;
write_mask = LFB_WRITE_BOTH;
count = 1;
break;
case LFB_FORMAT_DEPTH_ARGB1555:
colour_data[0] = argb1555[val & 0xffff];
alpha_data[0] = colour_data[0].a;
depth_data[0] = val >> 16;
write_mask = LFB_WRITE_BOTH;
count = 1;
break;
case LFB_FORMAT_DEPTH:
depth_data[0] = val;
depth_data[1] = val >> 16;
@@ -469,9 +489,15 @@ skip_pixel:
} else {
for (int c = 0; c < count; c++) {
if (write_mask & LFB_WRITE_COLOUR)
*(uint16_t *) (&voodoo->fb_mem[write_addr & voodoo->fb_mask]) = do_dither(&voodoo->params, colour_data[c], (x >> 1) + c, y);
*(uint16_t *) (&voodoo->fb_mem[write_addr & voodoo->fb_mask]) =
do_dither(&voodoo->params, colour_data[c], (x >> 1) + c, y);
if (write_mask & LFB_WRITE_DEPTH)
*(uint16_t *) (&voodoo->fb_mem[write_addr_aux & voodoo->fb_mask]) = depth_data[c];
if (write_mask & LFB_WRITE_BOTH) {
*(uint16_t *) (&voodoo->fb_mem[write_addr & voodoo->fb_mask]) =
do_dither(&voodoo->params, colour_data[c], (x >> 1) + c, y);
*(uint16_t *) (&voodoo->fb_mem[write_addr_aux & voodoo->fb_mask]) = depth_data[c];
}
write_addr += 2;
write_addr_aux += 2;

64
src/video/vid_xga.c
View File

@@ -168,12 +168,14 @@ xga_updatemapping(svga_t *svga)
xga_log("XGA: Extended Graphics mode.\n");
switch (xga->aperture_cntl) {
case 0:
xga_log("XGA: No 64KB aperture.\n");
if (xga->base_addr_1mb)
xga_log("XGA: No 64KB aperture: 1MB=%x, 4MB=%x.\n", xga->base_addr_1mb, xga->linear_base);
if (xga->base_addr_1mb) {
mem_mapping_set_addr(&xga->linear_mapping, xga->base_addr_1mb, 0x100000);
else if (xga->linear_base)
mem_mapping_enable(&xga->linear_mapping);
} else if (xga->linear_base) {
mem_mapping_set_addr(&xga->linear_mapping, xga->linear_base, 0x400000);
else
mem_mapping_enable(&xga->linear_mapping);
} else
mem_mapping_disable(&xga->linear_mapping);
mem_mapping_disable(&xga->video_mapping);
@@ -912,13 +914,8 @@ xga_accel_read_pattern_map_pixel(svga_t *svga, int x, int y, int map, uint32_t b
uint8_t px;
int skip = 0;
if (xga->base_addr_1mb) {
if (addr < xga->base_addr_1mb || (addr > (xga->base_addr_1mb + 0xfffff)))
skip = 1;
} else {
if (addr < xga->linear_base || (addr > (xga->linear_base + 0xfffff)))
skip = 1;
}
if (addr < xga->linear_base || (addr > (xga->linear_base + 0xfffff)))
skip = 1;
addr += (y * (width >> 3));
addr += (x >> 3);
@@ -956,13 +953,8 @@ xga_accel_read_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, int
uint8_t px;
int skip = 0;
if (xga->base_addr_1mb) {
if (addr < xga->base_addr_1mb || (addr > (xga->base_addr_1mb + 0xfffff)))
skip = 1;
} else {
if (addr < xga->linear_base || (addr > (xga->linear_base + 0xfffff)))
skip = 1;
}
if (addr < xga->linear_base || (addr > (xga->linear_base + 0xfffff)))
skip = 1;
switch (xga->accel.px_map_format[map] & 7) {
case 0: /*1-bit*/
@@ -1033,13 +1025,8 @@ xga_accel_write_map_pixel(svga_t *svga, int x, int y, int map, uint32_t base, ui
uint8_t mask;
int skip = 0;
if (xga->base_addr_1mb) {
if (addr < xga->base_addr_1mb || (addr > (xga->base_addr_1mb + 0xfffff)))
skip = 1;
} else {
if (addr < xga->linear_base || (addr > (xga->linear_base + 0xfffff)))
skip = 1;
}
if (addr < xga->linear_base || (addr > (xga->linear_base + 0xfffff)))
skip = 1;
switch (xga->accel.px_map_format[map] & 7) {
case 0: /*1-bit*/
@@ -1476,7 +1463,8 @@ xga_bitblt(svga_t *svga)
if (xga->accel.dst_map_x >= 0x1800)
dx |= ~0x17ff;
if (xga->accel.dst_map_y >= 0x1800)
dy |= ~0x17ff;
dy -= 0x1800;
xga_log("D(%d,%d), SWH(%d,%d), BLT(%d,%d), dstwidth=%d.\n", dx, dy, xga->accel.x, xga->accel.y, srcwidth, srcheight, dstwidth);
xga->accel.pattern = 0;
@@ -2776,8 +2764,10 @@ xga_write_linear(uint32_t addr, uint8_t val, void *priv)
addr &= svga->decode_mask;
if (addr >= xga->vram_size)
if (addr >= xga->vram_size) {
xga_log("Write Linear Over!.\n");
return;
}
cycles -= svga->monitor->mon_video_timing_write_b;
@@ -2839,8 +2829,10 @@ xga_read_linear(uint32_t addr, void *priv)
addr &= svga->decode_mask;
if (addr >= xga->vram_size)
if (addr >= xga->vram_size) {
xga_log("Read Linear Over!.\n");
return ret;
}
cycles -= svga->monitor->mon_video_timing_read_b;
@@ -3369,9 +3361,9 @@ xga_init(const device_t *info)
free(rom);
}
xga->base_addr_1mb = 0;
if (info->flags & DEVICE_MCA) {
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_xga_mca);
xga->base_addr_1mb = 0;
xga->linear_base = 0;
xga->instance = 0;
xga->rom_addr = 0;
@@ -3384,7 +3376,19 @@ xga_init(const device_t *info)
xga->pos_regs[2] = 1 | (xga->instance_isa << 1) | xga->ext_mem_addr;
xga->instance = (xga->pos_regs[2] & 0x0e) >> 1;
xga->pos_regs[4] = 1 | 2;
xga->pos_regs[4] = 2;
if (mem_size >= 16384) {
xga->pos_regs[4] |= 1;
xga->pos_regs[5] = 0;
} else {
xga->pos_regs[5] = ((mem_size * 64) >> 0x10) + 1;
if (xga->pos_regs[5] == 0x10) {
xga->pos_regs[5] = 0;
xga->pos_regs[4] |= 1;
}
}
xga->base_addr_1mb = (xga->pos_regs[5] & 0x0f) << 20;
xga->linear_base = ((xga->pos_regs[4] & 0xfe) * 0x1000000) + (xga->instance << 22);
xga->rom_addr = 0xc0000 + (((xga->pos_regs[2] & 0xf0) >> 4) * 0x2000);
}

2
vcpkg.json
View File

@@ -1,6 +1,6 @@
{
"name": "86box",
"version-string": "4.3",
"version-string": "4.2.2",
"homepage": "https://86box.net/",
"documentation": "https://86box.readthedocs.io/",
"license": "GPL-2.0-or-later",