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Merge branch 'master'

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This commit is contained in:
MaxwellS04
2025-05-13 08:10:39 +07:00
parent f4de904f14 b32908fad4
commit b7b537b1d8
205 changed files with 10208 additions and 3665 deletions
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2
.ci/Jenkinsfile vendored
View File

@@ -20,7 +20,7 @@ def repository = ['https://github.com/86Box/86Box.git', scm.userRemoteConfigs[0]
def commitBrowser = ['https://github.com/86Box/86Box/commit/%s', null]
def branch = ['master', scm.branches[0].name]
def buildType = ['beta', 'alpha']
def tarballFlags = ['', '-s']
def tarballFlags = ['', '-t']
def buildBranch = env.JOB_BASE_NAME.contains('-') ? 1 : 0
def osArchs = [

18
.github/workflows/cmake_macos.yml vendored
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@@ -59,22 +59,13 @@ jobs:
- name: SDL GUI
qt: off
static: on
src-packages: >-
libsndfile
- name: Qt GUI
qt: on
slug: -Qt
packages: >-
qt@5
src-packages: >-
libsndfile
steps:
- name: Install source dependencies
run: >-
brew reinstall -s
${{ matrix.ui.src-packages }}
- name: Install dependencies
run: >-
brew install
@@ -161,22 +152,13 @@ jobs:
- name: SDL GUI
qt: off
static: on
src-packages: >-
libsndfile
- name: Qt GUI
qt: on
slug: -Qt
packages: >-
qt@5
src-packages: >-
libsndfile
steps:
- name: Install source dependencies
run: >-
brew reinstall -s
${{ matrix.ui.src-packages }}
- name: Install dependencies
run: >-
brew install

3
CMakeLists.txt
View File

@@ -36,7 +36,7 @@ if(MUNT_EXTERNAL)
endif()
project(86Box
VERSION 4.3
VERSION 5.0
DESCRIPTION "Emulator of x86-based systems"
HOMEPAGE_URL "https://86box.net"
LANGUAGES C CXX)
@@ -180,7 +180,6 @@ cmake_dependent_option(GUSMAX "Gravis UltraSound MAX"
cmake_dependent_option(ISAMEM_RAMPAGE "AST Rampage" ON "DEV_BRANCH" OFF)
cmake_dependent_option(ISAMEM_IAB "Intel Above Board" ON "DEV_BRANCH" OFF)
cmake_dependent_option(ISAMEM_BRAT "BocaRAM/AT" ON "DEV_BRANCH" OFF)
cmake_dependent_option(LASERXT "VTech Laser XT" ON "DEV_BRANCH" OFF)
cmake_dependent_option(OLIVETTI "Olivetti M290" ON "DEV_BRANCH" OFF)
cmake_dependent_option(OPEN_AT "OpenAT" ON "DEV_BRANCH" OFF)
cmake_dependent_option(OPL4ML "OPL4-ML daughterboard" ON "DEV_BRANCH" OFF)

10
README.md
View File

@@ -26,18 +26,18 @@ Minimum system requirements and recommendations
* macOS version: macOS High Sierra 10.13 or newer
* 4 GB of RAM or higher
Performance may vary depending on both host and guest configuration. Most emulation logic is executed in a single thread; therefore, systems with better IPC (instructions per clock) generally should be able to emulate higher clock speeds.
Performance may vary depending on host and guest configuration. Most emulation logic is executed in a single thread. Therefore, systems with greater IPC (instructions per clock) capacity should be able to emulate higher clock speeds.
It is also recommended to use a manager application with 86Box for easier handling of multiple virtual machines.
For easier handling of multiple virtual machines, use a manager application:
* [Avalonia 86](https://github.com/notBald/Avalonia86) by [notBald](https://github.com/notBald) (Windows and Linux)
* [86Box Manager](https://github.com/86Box/86BoxManager) by [Overdoze](https://github.com/daviunic) (Windows only)
* [86Box Manager X](https://github.com/RetBox/86BoxManagerX) by [xafero](https://github.com/xafero) (Cross platform Port of 86Box Manager using Avalonia)
* [Avalonia 86](https://github.com/notBald/Avalonia86) by [notBald](https://github.com/notBald) (Windows and Linux)
* [sl86](https://github.com/DDXofficial/sl86) by [DDX](https://github.com/DDXofficial) (Command-line 86Box machine manager written in Python)
* [Linbox-qt5](https://github.com/Dungeonseeker/linbox-qt5) by [Dungeonseeker](https://github.com/Dungeonseeker/) (Linux focused, should work on Windows though untested)
* [MacBox for 86Box](https://github.com/Moonif/MacBox) by [Moonif](https://github.com/Moonif) (MacOS only)
It is also possible to use 86Box on its own with the `--vmpath`/`-P` command line option.
To use 86Box on its own, use the `--vmpath`/`-P` command line option.
Getting started
---------------
@@ -47,7 +47,7 @@ See [our documentation](https://86box.readthedocs.io/en/latest/index.html) for a
Community
---------
We operate an IRC channel and a Discord server for discussing 86Box, its development and anything related to retro computing. We look forward to hearing from you!
We operate an IRC channel and a Discord server for discussing 86Box, its development, and anything related to retro computing. We look forward to hearing from you!
[![Visit our IRC channel](https://kiwiirc.com/buttons/irc.ringoflightning.net/86Box.png)](https://kiwiirc.com/client/irc.ringoflightning.net/?nick=86box|?#86Box)

20
cmake/intel-linux-x86_64.cmake Normal file
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@@ -0,0 +1,20 @@
#
# 86Box A hypervisor and IBM PC system emulator that specializes in
# running old operating systems and software designed for IBM
# PC systems and compatibles from 1981 through fairly recent
# system designs based on the PCI bus.
#
# This file is part of the 86Box distribution.
#
# CMake toolchain file defining GCC compiler flags
# for 64-bit x86 targets.
#
# Authors: David Hrdlička, <hrdlickadavid@outlook.com>
#
# Copyright 2021 David Hrdlička.
#
include(${CMAKE_CURRENT_LIST_DIR}/flags-gcc-x86_64.cmake)
set(CMAKE_C_COMPILER icx)
set(CMAKE_CXX_COMPILER icpx)

23
cmake/llvm-linux-x86_64.cmake Normal file
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@@ -0,0 +1,23 @@
#
# 86Box A hypervisor and IBM PC system emulator that specializes in
# running old operating systems and software designed for IBM
# PC systems and compatibles from 1981 through fairly recent
# system designs based on the PCI bus.
#
# This file is part of the 86Box distribution.
#
# CMake toolchain file defining Clang compiler flags
# for 64-bit x86 targets.
#
# Authors: David Hrdlička, <hrdlickadavid@outlook.com>
# dob205
#
# Copyright 2021 David Hrdlička.
# Copyright 2022 dob205.
#
include(${CMAKE_CURRENT_LIST_DIR}/flags-gcc-x86_64.cmake)
# Use the GCC-compatible Clang executables in order to use our flags
set(CMAKE_C_COMPILER clang)
set(CMAKE_CXX_COMPILER clang++)

4
debian/changelog vendored
View File

@@ -1,5 +1,5 @@
86box (4.3) UNRELEASED; urgency=medium
86box (5.0) UNRELEASED; urgency=medium
* Bump release.
-- Jasmine Iwanek <jriwanek@gmail.com> Wed, 13 Nov 2024 06:31:46 +0100
-- Jasmine Iwanek <jriwanek@gmail.com> Wed, 16 Apr 2025 22:08:04 +0200

204
src/86box.c
View File

@@ -160,6 +160,7 @@ int window_remember;
int vid_resize; /* (C) allow resizing */
int invert_display = 0; /* (C) invert the display */
int suppress_overscan = 0; /* (C) suppress overscans */
int lang_id = 0; /* (C) language id */
int scale = 0; /* (C) screen scale factor */
int dpi_scale = 0; /* (C) DPI scaling of the emulated
screen */
@@ -167,13 +168,12 @@ int vid_api = 0; /* (C) video r
int vid_cga_contrast = 0; /* (C) video */
int video_fullscreen = 0; /* (C) video */
int video_fullscreen_scale = 0; /* (C) video */
int video_fullscreen_first = 0; /* (C) video */
int enable_overscan = 0; /* (C) video */
int force_43 = 0; /* (C) video */
int video_filter_method = 1; /* (C) video */
int video_vsync = 0; /* (C) video */
int video_framerate = -1; /* (C) video */
bool serial_passthrough_enabled[SERIAL_MAX] = { 0, 0, 0, 0, 0, 0, 0 }; /* (C) activation and kind of
bool serial_passthrough_enabled[SERIAL_MAX - 1] = { 0, 0, 0, 0, 0, 0, 0 }; /* (C) activation and kind of
pass-through for serial ports */
int bugger_enabled = 0; /* (C) enable ISAbugger */
int novell_keycard_enabled = 0; /* (C) enable Novell NetWare 2.x key card emulation. */
@@ -221,6 +221,37 @@ int other_ide_present = 0; /* IDE control
int other_scsi_present = 0; /* SCSI controllers from non-SCSI cards are
present */
// Accelerator key array
struct accelKey acc_keys[NUM_ACCELS];
// Default accelerator key values
struct accelKey def_acc_keys[NUM_ACCELS] = {
{ .name="send_ctrl_alt_del", .desc="Send Control+Alt+Del",
.seq="Ctrl+F12" },
{ .name="send_ctrl_alt_esc", .desc="Send Control+Alt+Escape",
.seq="Ctrl+F10" },
{ .name="fullscreen", .desc="Toggle fullscreen",
.seq="Ctrl+Alt+PgUp" },
{ .name="screenshot", .desc="Screenshot",
.seq="Ctrl+F11" },
{ .name="release_mouse", .desc="Release mouse pointer",
.seq="Ctrl+End" },
{ .name="hard_reset", .desc="Hard reset",
.seq="Ctrl+Alt+F12" },
{ .name="pause", .desc="Toggle pause",
.seq="Ctrl+Alt+F1" },
{ .name="mute", .desc="Toggle mute",
.seq="Ctrl+Alt+M" }
};
/* Statistics. */
extern int mmuflush;
extern int readlnum;
@@ -554,6 +585,62 @@ delete_nvr_file(uint8_t flash)
extern void device_find_all_descs(void);
static void
pc_show_usage(char *s)
{
char p[4096] = { 0 };
sprintf(p,
"\n%sUsage: 86box [options] [cfg-file]\n\n"
"Valid options are:\n\n"
"-? or --help\t\t\t- show this information\n"
"-C or --config path\t\t- set 'path' to be config file\n"
#ifdef _WIN32
"-D or --debug\t\t\t- force debug output logging\n"
#endif
#if 0
"-E or --nographic\t\t- forces the old behavior\n"
#endif
"-F or --fullscreen\t\t- start in fullscreen mode\n"
"-G or --lang langid\t\t- start with specified language\n"
"\t\t\t\t (e.g. en-US, or system)\n"
#ifdef _WIN32
"-H or --hwnd id,hwnd\t\t- sends back the main dialog's hwnd\n"
#endif
"-I or --image d:path\t\t- load 'path' as floppy image on drive d\n"
#ifdef USE_INSTRUMENT
"-J or --instrument name\t- set 'name' to be the profiling instrument\n"
#endif
"-L or --logfile pat\t\t- set 'path' to be the logfile\n"
"-M or --missing\t\t- dump missing machines and video cards\n"
"-N or --noconfirm\t\t- do not ask for confirmation on quit\n"
"-P or --vmpath path\t\t- set 'path' to be root for vm\n"
"-R or --rompath path\t\t- set 'path' to be ROM path\n"
#ifndef USE_SDL_UI
"-S or --settings\t\t\t- show only the settings dialog\n"
#endif
"-T or --testmode\t\t- test mode: execute the test mode entry\n"
"\t\t\t\t point on init/hard reset\n"
"-V or --vmname name\t\t- overrides the name of the running VM\n"
"-W or --nohook\t\t- disables keyboard hook\n"
"\t\t\t\t (compatibility-only outside Windows)\n"
"-X or --clear what\t\t- clears the 'what' (cmos/flash/both)\n"
"-Y or --donothing\t\t- do not show any UI or run the emulation\n"
"-Z or --lastvmpath\t\t- the last parameter is VM path rather\n"
"\t\t\t\t than config\n"
"\nA config file can be specified. If none is, the default file will be used.\n",
(s == NULL) ? "" : s);
#ifdef _WIN32
ui_msgbox(MBX_ANSI | ((s == NULL) ? MBX_INFO : MBX_WARNING), p);
#else
if (s == NULL)
pclog(p);
else
ui_msgbox(MBX_ANSI | MBX_WARNING, p);
#endif
}
/*
* Perform initial startup of the PC.
*
@@ -577,6 +664,9 @@ pc_init(int argc, char *argv[])
time_t now;
int c;
int lvmp = 0;
#ifdef DEPRECATE_USAGE
int deprecated = 1;
#endif
#ifdef ENABLE_NG
int ng = 0;
#endif
@@ -584,7 +674,7 @@ pc_init(int argc, char *argv[])
uint32_t *uid;
uint32_t *shwnd;
#endif
uint32_t lang_init = 0;
int lang_init = 0;
/* Grab the executable's full path. */
plat_get_exe_name(exe_path, sizeof(exe_path) - 1);
@@ -634,41 +724,7 @@ usage:
}
}
printf("\nUsage: 86box [options] [cfg-file]\n\n");
printf("Valid options are:\n\n");
printf("-? or --help - show this information\n");
printf("-C or --config path - set 'path' to be config file\n");
#ifdef _WIN32
printf("-D or --debug - force debug output logging\n");
#endif
#if 0
printf("-E or --nographic - forces the old behavior\n");
#endif
printf("-F or --fullscreen - start in fullscreen mode\n");
printf("-G or --lang langid - start with specified language (e.g. en-US, or system)\n");
#ifdef _WIN32
printf("-H or --hwnd id,hwnd - sends back the main dialog's hwnd\n");
#endif
printf("-I or --image d:path - load 'path' as floppy image on drive d\n");
#ifdef USE_INSTRUMENT
printf("-J or --instrument name - set 'name' to be the profiling instrument\n");
#endif
printf("-K or --keycodes codes - set 'codes' to be the uncapture combination\n");
printf("-L or --logfile path - set 'path' to be the logfile\n");
printf("-M or --missing - dump missing machines and video cards\n");
printf("-N or --noconfirm - do not ask for confirmation on quit\n");
printf("-P or --vmpath path - set 'path' to be root for vm\n");
printf("-R or --rompath path - set 'path' to be ROM path\n");
#ifndef USE_SDL_UI
printf("-S or --settings - show only the settings dialog\n");
#endif
printf("-T or --testmode - test mode: execute the test mode entry point on init/hard reset\n");
printf("-V or --vmname name - overrides the name of the running VM\n");
printf("-W or --nohook - disables keyboard hook (compatibility-only outside Windows)\n");
printf("-X or --clear what - clears the 'what' (cmos/flash/both)\n");
printf("-Y or --donothing - do not show any UI or run the emulation\n");
printf("-Z or --lastvmpath - the last parameter is VM path rather than config\n");
printf("\nA config file can be specified. If none is, the default file will be used.\n");
pc_show_usage(NULL);
return 0;
} else if (!strcasecmp(argv[c], "--lastvmpath") || !strcasecmp(argv[c], "-Z")) {
lvmp = 1;
@@ -695,6 +751,9 @@ usage:
goto usage;
ppath = argv[++c];
#ifdef DEPRECATE_USAGE
deprecated = 0;
#endif
} else if (!strcasecmp(argv[c], "--rompath") || !strcasecmp(argv[c], "-R")) {
if ((c + 1) == argc)
goto usage;
@@ -706,6 +765,9 @@ usage:
goto usage;
cfg = argv[++c];
#ifdef DEPRECATE_USAGE
deprecated = 0;
#endif
} else if (!strcasecmp(argv[c], "--image") || !strcasecmp(argv[c], "-I")) {
if ((c + 1) == argc)
goto usage;
@@ -744,13 +806,6 @@ usage:
do_nothing = 1;
} else if (!strcasecmp(argv[c], "--nohook") || !strcasecmp(argv[c], "-W")) {
hook_enabled = 0;
} else if (!strcasecmp(argv[c], "--keycodes") || !strcasecmp(argv[c], "-K")) {
if ((c + 1) == argc)
goto usage;
sscanf(argv[++c], "%03hX,%03hX,%03hX,%03hX,%03hX,%03hX",
&key_prefix_1_1, &key_prefix_1_2, &key_prefix_2_1, &key_prefix_2_2,
&key_uncapture_1, &key_uncapture_2);
} else if (!strcasecmp(argv[c], "--clearboth") || !strcasecmp(argv[c], "-X")) {
if ((c + 1) == argc)
goto usage;
@@ -811,11 +866,22 @@ usage:
ppath = argv[c++];
else
cfg = argv[c++];
#ifdef DEPRECATE_USAGE
deprecated = 0;
#endif
}
if (c != argc)
goto usage;
#ifdef DEPRECATE_USAGE
if (deprecated)
pc_show_usage("Running 86Box without a specified VM path and/or configuration\n"
"file has been deprected. Please specify one or use a manager\n"
"(Avalonia 86 is recommended).\n\n");
#endif
path_slash(usr_path);
path_slash(rom_path);
@@ -972,6 +1038,13 @@ usage:
zip_global_init();
mo_global_init();
/* Initialize the keyboard accelerator list with default values */
for (int x = 0; x < NUM_ACCELS; x++) {
strcpy(acc_keys[x].name, def_acc_keys[x].name);
strcpy(acc_keys[x].desc, def_acc_keys[x].desc);
strcpy(acc_keys[x].seq, def_acc_keys[x].seq);
}
/* Load the configuration file. */
config_load();
@@ -1177,20 +1250,48 @@ pc_send_ca(uint16_t sc)
if (keyboard_mode >= 0x81) {
/* Use R-Alt because PS/55 DOS and OS/2 assign L-Alt Kanji */
keyboard_input(1, 0x1D); /* Ctrl key pressed */
if (keyboard_get_in_reset())
return;
keyboard_input(1, 0x138); /* R-Alt key pressed */
if (keyboard_get_in_reset())
return;
keyboard_input(1, sc);
if (keyboard_get_in_reset())
return;
usleep(50000);
if (keyboard_get_in_reset())
return;
keyboard_input(0, sc);
if (keyboard_get_in_reset())
return;
keyboard_input(0, 0x138); /* R-Alt key released */
if (keyboard_get_in_reset())
return;
keyboard_input(0, 0x1D); /* Ctrl key released */
if (keyboard_get_in_reset())
return;
} else {
keyboard_input(1, 0x1D); /* Ctrl key pressed */
if (keyboard_get_in_reset())
return;
keyboard_input(1, 0x38); /* Alt key pressed */
if (keyboard_get_in_reset())
return;
keyboard_input(1, sc);
if (keyboard_get_in_reset())
return;
usleep(50000);
if (keyboard_get_in_reset())
return;
keyboard_input(0, sc);
if (keyboard_get_in_reset())
return;
keyboard_input(0, 0x38); /* Alt key released */
if (keyboard_get_in_reset())
return;
keyboard_input(0, 0x1D); /* Ctrl key released */
if (keyboard_get_in_reset())
return;
}
}
@@ -1788,3 +1889,16 @@ do_pause(int p)
}
atomic_store(&pause_ack, 0);
}
// Helper to find an accelerator key and return it's index in acc_keys
int FindAccelerator(const char *name) {
for(int x=0;x<NUM_ACCELS;x++)
{
if(strcmp(acc_keys[x].name, name) == 0)
{
return(x);
}
}
// No key was found
return -1;
}

8
src/acpi.c
View File

@@ -2387,6 +2387,14 @@ acpi_reset(void *priv)
dev->regs.gpi_val = 0xfff57fc1;
if (!strcmp(machine_get_internal_name(), "ficva503a") || !strcmp(machine_get_internal_name(), "6via90ap"))
dev->regs.gpi_val |= 0x00000004;
/*
TriGem Delhi-III second GPI word:
- Bit 7 = Save CMOS (must be set);
- Bit 6 = Password jumper (must be set);
- Bit 5 = Enable Setup (must be set).
*/
else if (!strcmp(machine_get_internal_name(), "delhi3"))
dev->regs.gpi_val |= 0x00008000;
}
if (acpi_power_on) {

100
src/cdrom/cdrom.c
View File

@@ -29,6 +29,9 @@
#include <86box/cdrom.h>
#include <86box/cdrom_image.h>
#include <86box/cdrom_interface.h>
#ifdef USE_CDROM_MITSUMI
#include <86box/cdrom_mitsumi.h>
#endif
#include <86box/log.h>
#include <86box/plat.h>
#include <86box/plat_cdrom_ioctl.h>
@@ -117,6 +120,9 @@ static const struct {
} controllers[] = {
// clang-format off
{ &cdrom_interface_none_device },
#ifdef USE_CDROM_MITSUMI
{ &mitsumi_cdrom_device },
#endif
{ NULL }
// clang-format on
};
@@ -2274,13 +2280,73 @@ cdrom_read_disc_info_toc(cdrom_t *dev, uint8_t *b,
return ret;
}
static uint32_t
cdrom_msf_to_lba(const int sector, const int ismsf,
int cdrom_sector_type, const uint8_t vendor_type)
{
int pos = sector;
uint32_t lba;
if ((cdrom_sector_type & 0x0f) >= 0x08) {
mult = cdrom_sector_type >> 4;
pos /= mult;
}
if (ismsf) {
const int m = (pos >> 16) & 0xff;
const int s = (pos >> 8) & 0xff;
const int f = pos & 0xff;
lba = MSFtoLBA(m, s, f) - 150;
} else {
switch (vendor_type) {
case 0x00:
lba = pos;
break;
case 0x40: {
const int m = bcd2bin((pos >> 24) & 0xff);
const int s = bcd2bin((pos >> 16) & 0xff);
const int f = bcd2bin((pos >> 8) & 0xff);
lba = MSFtoLBA(m, s, f) - 150;
break;
} case 0x80:
lba = bcd2bin((pos >> 24) & 0xff);
break;
/* Never used values but the compiler complains. */
default:
lba = 0;
}
}
return lba;
}
int
cdrom_is_track_audio(cdrom_t *dev, const int sector,
const int ismsf, int cdrom_sector_type,
const uint8_t vendor_type)
{
int audio = 0;
uint32_t lba = cdrom_msf_to_lba(sector, ismsf,
cdrom_sector_type, vendor_type);
if (dev->ops->get_track_type)
audio = dev->ops->get_track_type(dev->local, lba);
audio &= CD_TRACK_AUDIO;
return audio;
}
int
cdrom_readsector_raw(cdrom_t *dev, uint8_t *buffer, const int sector, const int ismsf,
int cdrom_sector_type, const int cdrom_sector_flags,
int *len, const uint8_t vendor_type)
{
int pos = sector;
int ret = 0;
int pos = sector;
int ret = 0;
const int old_type = cdrom_sector_type;
if ((cdrom_sector_type & 0x0f) >= 0x08) {
mult = cdrom_sector_type >> 4;
@@ -2298,38 +2364,12 @@ cdrom_readsector_raw(cdrom_t *dev, uint8_t *buffer, const int sector, const int
uint8_t *temp_b;
uint8_t *b = temp_b = buffer;
int audio = 0;
uint32_t lba;
uint32_t lba = cdrom_msf_to_lba(sector, ismsf,
old_type, vendor_type);
int mode2 = 0;
*len = 0;
if (ismsf) {
const int m = (pos >> 16) & 0xff;
const int s = (pos >> 8) & 0xff;
const int f = pos & 0xff;
lba = MSFtoLBA(m, s, f) - 150;
} else {
switch (vendor_type) {
case 0x00:
lba = pos;
break;
case 0x40: {
const int m = bcd2bin((pos >> 24) & 0xff);
const int s = bcd2bin((pos >> 16) & 0xff);
const int f = bcd2bin((pos >> 8) & 0xff);
lba = MSFtoLBA(m, s, f) - 150;
break;
} case 0x80:
lba = bcd2bin((pos >> 24) & 0xff);
break;
/* Never used values but the compiler complains. */
default:
lba = 0;
}
}
if (dev->ops->get_track_type)
audio = dev->ops->get_track_type(dev->local, lba);

7
src/cdrom/cdrom_image.c
View File

@@ -2016,6 +2016,10 @@ image_open(cdrom_t *dev, const char *path)
img->has_audio = 0;
else if (ret)
img->has_audio = 1;
else {
image_close(img);
img = NULL;
}
} else {
ret = image_load_iso(img, path);
@@ -2033,7 +2037,8 @@ image_open(cdrom_t *dev, const char *path)
img->log = log_open(n);
dev->ops = &image_ops;
}
} else
warning("Unable to load CD-ROM image: %s\n", path);
}
return img;

15
src/cdrom/cdrom_image_viso.c
View File

@@ -782,9 +782,8 @@ viso_close(void *priv)
if (viso->entry_map)
free(viso->entry_map);
if (tf->log != NULL) {
}
if (tf->log != NULL)
log_close(tf->log);
free(viso);
}
@@ -1607,10 +1606,12 @@ end:
return &viso->tf;
} else {
image_viso_log(viso->tf.log, "Initialization failed\n");
if (data)
free(data);
viso_close(&viso->tf);
if (viso != NULL) {
image_viso_log(viso->tf.log, "Initialization failed\n");
if (data)
free(data);
viso_close(&viso->tf);
}
return NULL;
}
}

1
src/chipset/CMakeLists.txt
View File

@@ -39,6 +39,7 @@ add_library(chipset OBJECT
intel_i450kx.c
intel_sio.c
intel_piix.c
isa486c.c
../ioapic.c
neat.c
opti283.c

61
src/chipset/intel_piix.c
View File

@@ -59,7 +59,6 @@ typedef struct piix_io_trap_t {
} piix_io_trap_t;
typedef struct _piix_ {
uint8_t cur_readout_reg;
uint8_t rev;
uint8_t type;
uint8_t func_shift;
@@ -67,7 +66,6 @@ typedef struct _piix_ {
uint8_t pci_slot;
uint8_t no_mirq0;
uint8_t regs[4][256];
uint8_t readout_regs[256];
uint16_t func0_id;
uint16_t nvr_io_base;
uint16_t acpi_io_base;
@@ -1185,31 +1183,6 @@ piix_read(int func, int addr, void *priv)
return ret;
}
static void
board_write(uint16_t port, uint8_t val, void *priv)
{
piix_t *dev = (piix_t *) priv;
if (port == 0x00e0)
dev->cur_readout_reg = val;
else if (port == 0x00e1)
dev->readout_regs[dev->cur_readout_reg] = val;
}
static uint8_t
board_read(uint16_t port, void *priv)
{
const piix_t *dev = (piix_t *) priv;
uint8_t ret = 0x64;
if (port == 0x00e0)
ret = dev->cur_readout_reg;
else if (port == 0x00e1)
ret = dev->readout_regs[dev->cur_readout_reg];
return ret;
}
static void
piix_reset_hard(piix_t *dev)
{
@@ -1624,40 +1597,6 @@ piix_init(const device_t *info)
if (dev->type < 3)
pci_enable_mirq(1);
dev->readout_regs[0] = 0xff;
dev->readout_regs[1] = 0x40;
dev->readout_regs[2] = 0xff;
/* Port E1 register 01 (TODO: Find how multipliers > 3.0 are defined):
Bit 6: 1 = can boot, 0 = no;
Bit 7, 1 = multiplier (00 = 2.5, 01 = 2.0, 10 = 3.0, 11 = 1.5);
Bit 5, 4 = bus speed (00 = 50 MHz, 01 = 66 MHz, 10 = 60 MHz, 11 = ????):
Bit 7, 5, 4, 1: 0000 = 125 MHz, 0010 = 166 MHz, 0100 = 150 MHz, 0110 = ??? MHz;
0001 = 100 MHz, 0011 = 133 MHz, 0101 = 120 MHz, 0111 = ??? MHz;
1000 = 150 MHz, 1010 = 200 MHz, 1100 = 180 MHz, 1110 = ??? MHz;
1001 = 75 MHz, 1011 = 100 MHz, 1101 = 90 MHz, 1111 = ??? MHz */
if (cpu_busspeed <= 40000000)
dev->readout_regs[1] |= 0x30;
else if ((cpu_busspeed > 40000000) && (cpu_busspeed <= 50000000))
dev->readout_regs[1] |= 0x00;
else if ((cpu_busspeed > 50000000) && (cpu_busspeed <= 60000000))
dev->readout_regs[1] |= 0x20;
else if (cpu_busspeed > 60000000)
dev->readout_regs[1] |= 0x10;
if (cpu_dmulti <= 1.5)
dev->readout_regs[1] |= 0x82;
else if ((cpu_dmulti > 1.5) && (cpu_dmulti <= 2.0))
dev->readout_regs[1] |= 0x02;
else if ((cpu_dmulti > 2.0) && (cpu_dmulti <= 2.5))
dev->readout_regs[1] |= 0x00;
else if (cpu_dmulti > 2.5)
dev->readout_regs[1] |= 0x80;
io_sethandler(0x00e0, 0x0002, board_read, NULL, NULL, board_write, NULL, NULL, dev);
#if 0
device_add(&i8254_sec_device);
#endif

131
src/chipset/isa486c.c Normal file
View File

@@ -0,0 +1,131 @@
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include "cpu.h"
#include <86box/io.h>
#include <86box/device.h>
#include <86box/mem.h>
#include <86box/plat_unused.h>
#include <86box/chipset.h>
typedef struct isa486c_t {
uint8_t regs[3];
} isa486c_t;
static void
isa486c_recalcmapping(isa486c_t *dev)
{
uint32_t shflags = 0;
uint32_t bases[5] = { 0x000c0000, 0x000c8000, 0x000d0000, 0x000d8000, 0x000e0000 };
uint32_t sizes[5] = { 0x00008000, 0x00008000, 0x00008000, 0x00008000, 0x00020000 };
if (dev->regs[1] & 0x20)
shflags = MEM_READ_EXTANY | MEM_WRITE_INTERNAL;
else
shflags = MEM_READ_INTERNAL | MEM_WRITE_EXTANY;
shadowbios = 0;
shadowbios_write = 0;
for (uint8_t i = 0; i < 5; i++)
if (dev->regs[1] & (1 << i)) {
if (i == 4) {
shadowbios = 1;
shadowbios_write = !!(dev->regs[1] & 0x20);
}
mem_set_mem_state_both(bases[i], sizes[i], shflags);
} else
mem_set_mem_state_both(bases[i], sizes[i], MEM_READ_EXTANY | MEM_WRITE_EXTANY);
flushmmucache_nopc();
}
static void
isa486c_write(uint16_t addr, uint8_t val, void *priv)
{
isa486c_t *dev = (isa486c_t *) priv;
switch (addr) {
case 0x0023:
dev->regs[0] = val;
break;
/*
Port 25h:
- Bit 0 = Video BIOS (C000-C7FF) shadow enabled;
- Bit 1 = C800-C8FF shadow enabled;
- Bit 2 = D000-D7FF shadow enabled;
- Bit 3 = D800-DFFF shadow enabled;
- Bit 4 = E000-FFFF shadow enabled (or F0000-FFFFF?);
- Bit 5 = If set, read from ROM, write to shadow;
- Bit 6 = KEN Video & BIOS enabled (cacheability!).
*/
case 0x0025:
dev->regs[1] = val;
isa486c_recalcmapping(dev);
break;
case 0x0027:
dev->regs[2] = val;
break;
}
}
static uint8_t
isa486c_read(uint16_t addr, void *priv)
{
isa486c_t *dev = (isa486c_t *) priv;
uint8_t ret = 0xff;
switch (addr) {
case 0x0023:
ret = dev->regs[0];
break;
case 0x0025:
ret = dev->regs[1];
break;
case 0x0027:
ret = dev->regs[2];
break;
}
return ret;
}
static void
isa486c_close(void *priv)
{
isa486c_t *dev = (isa486c_t *) priv;
free(dev);
}
static void *
isa486c_init(UNUSED(const device_t *info))
{
isa486c_t *dev = (isa486c_t *) calloc(1, sizeof(isa486c_t));
io_sethandler(0x0023, 0x0001, isa486c_read, NULL, NULL, isa486c_write, NULL, NULL, dev);
io_sethandler(0x0025, 0x0001, isa486c_read, NULL, NULL, isa486c_write, NULL, NULL, dev);
io_sethandler(0x0027, 0x0001, isa486c_read, NULL, NULL, isa486c_write, NULL, NULL, dev);
return dev;
}
const device_t isa486c_device = {
.name = "ASUS ISA-486C Gate Array",
.internal_name = "isa486c",
.flags = 0,
.local = 0,
.init = isa486c_init,
.close = isa486c_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};

2
src/chipset/sis_5511_h2p.c
View File

@@ -259,7 +259,7 @@ sis_5511_host_to_pci_write(int addr, uint8_t val, void *priv)
case 0x7a: /* DRAM Bank Register 2-1 */
case 0x7c: /* DRAM Bank Register 3-0 */
case 0x7e: /* DRAM Bank Register 3-1 */
spd_write_drbs(dev->pci_conf, 0x70, 0x7e, 0x82);
spd_write_drbs(dev->pci_conf, 0x70, 0x7e, 0x02);
break;
case 0x71: /* DRAM Bank Register 0-0 */

527
src/chipset/sis_85c4xx.c
View File

@@ -33,27 +33,384 @@
#include <86box/mem.h>
#include <86box/smram.h>
#include <86box/pic.h>
#include <86box/plat_fallthrough.h>
#include <86box/keyboard.h>
#include <86box/machine.h>
#include <86box/chipset.h>
typedef struct ram_bank_t {
uint32_t virt_base;
uint32_t virt_size;
uint32_t phys_base;
uint32_t phys_size;
mem_mapping_t mapping;
} ram_bank_t;
typedef struct sis_85c4xx_t {
uint8_t cur_reg;
uint8_t tries;
uint8_t reg_base;
uint8_t reg_last;
uint8_t reg_00;
uint8_t is_471;
uint8_t force_flush;
uint8_t shadowed;
uint8_t smram_enabled;
uint8_t pad;
uint8_t regs[39];
uint8_t scratch[2];
uint32_t mem_state[8];
smram_t *smram;
port_92_t *port_92;
uint8_t cur_reg;
uint8_t tries;
uint8_t reg_base;
uint8_t reg_last;
uint8_t reg_00;
uint8_t is_471;
uint8_t ram_banks_val;
uint8_t force_flush;
uint8_t shadowed;
uint8_t smram_enabled;
uint8_t pad;
uint8_t regs[39];
uint8_t scratch[2];
uint32_t mem_state[8];
ram_bank_t ram_banks[8];
smram_t * smram;
port_92_t * port_92;
} sis_85c4xx_t;
static uint8_t ram_4xx[64] = { 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 0x03, 0x00,
0x04, 0x00, 0x05, 0x00, 0x0b, 0x00, 0x00, 0x00,
0x19, 0x00, 0x06, 0x00, 0x14, 0x00, 0x00, 0x00,
0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x1b, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00,
0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
static uint8_t ram_471[64] = { 0x00, 0x00, 0x01, 0x01, 0x02, 0x20, 0x09, 0x09,
0x04, 0x04, 0x05, 0x05, 0x0b, 0x0b, 0x0b, 0x0b,
0x13, 0x21, 0x06, 0x06, 0x0d, 0x0d, 0x0d, 0x0d,
0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e,
0x1b, 0x1b, 0x1b, 0x1b, 0x0f, 0x0f, 0x0f, 0x0f,
0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17,
0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d,
0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d, 0x3d };
static uint8_t ram_asus[64] = { 0x00, 0x00, 0x01, 0x10, 0x10, 0x20, 0x03, 0x11,
0x11, 0x05, 0x05, 0x12, 0x12, 0x13, 0x13, 0x13,
0x13, 0x21, 0x06, 0x14, 0x14, 0x15, 0x15, 0x15,
0x15, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d,
0x1d, 0x16, 0x16, 0x16, 0x16, 0x17, 0x17, 0x17,
0x17, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e,
0x1e, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f,
0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f };
static uint8_t ram_tg486g[64] = { 0x10, 0x10, 0x10, 0x10, 0x10, 0x11, 0x11, 0x11,
0x11, 0x12, 0x12, 0x12, 0x12, 0x13, 0x13, 0x13,
0x13, 0x14, 0x14, 0x14, 0x14, 0x15, 0x15, 0x15,
0x15, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d,
0x1d, 0x16, 0x16, 0x16, 0x16, 0x17, 0x17, 0x17,
0x17, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e,
0x1e, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f,
0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f, 0x1f };
static uint32_t banks_471[64][4] = { { 0x00100000, 0x00000000, 0x00000000, 0x00000000 }, /* 0x00 */
{ 0x00100000, 0x00100000, 0x00000000, 0x00000000 },
{ 0x00100000, 0x00100000, 0x00200000, 0x00000000 },
{ 0x00100000, 0x00100000, 0x00400000, 0x00000000 },
{ 0x00100000, 0x00100000, 0x00200000, 0x00400000 },
{ 0x00100000, 0x00100000, 0x00400000, 0x00400000 },
{ 0x00100000, 0x00100000, 0x01000000, 0x00000000 },
{ 0x00200000, 0x00000000, 0x00000000, 0x00000000 },
{ 0x00200000, 0x00200000, 0x00000000, 0x00000000 }, /* 0x08 */
{ 0x00200000, 0x00400000, 0x00000000, 0x00000000 },
{ 0x00200000, 0x00200000, 0x00400000, 0x00000000 },
{ 0x00200000, 0x00200000, 0x00400000, 0x00400000 },
{ 0x00200000, 0x01000000, 0x00000000, 0x00000000 },
{ 0x00200000, 0x00200000, 0x01000000, 0x00000000 },
{ 0x00200000, 0x00200000, 0x00400000, 0x01000000 },
{ 0x00200000, 0x00200000, 0x01000000, 0x01000000 },
{ 0x00400000, 0x00000000, 0x00000000, 0x00000000 }, /* 0x10 */
{ 0x00400000, 0x00400000, 0x00000000, 0x00000000 },
{ 0x00400000, 0x00400000, 0x00400000, 0x00000000 },
{ 0x00400000, 0x00400000, 0x00400000, 0x00400000 },
{ 0x00400000, 0x01000000, 0x00000000, 0x00000000 },
{ 0x00400000, 0x00400000, 0x01000000, 0x00000000 },
{ 0x00400000, 0x01000000, 0x01000000, 0x00000000 },
{ 0x00400000, 0x00400000, 0x01000000, 0x01000000 },
{ 0x00800000, 0x00000000, 0x00000000, 0x00000000 }, /* 0x18 */
{ 0x00800000, 0x00800000, 0x00000000, 0x00000000 },
{ 0x00800000, 0x00800000, 0x00800000, 0x00000000 },
{ 0x00800000, 0x00800000, 0x00800000, 0x00800000 },
{ 0x01000000, 0x00000000, 0x00000000, 0x00000000 },
{ 0x01000000, 0x01000000, 0x00000000, 0x00000000 },
{ 0x01000000, 0x01000000, 0x01000000, 0x00000000 },
{ 0x01000000, 0x01000000, 0x01000000, 0x01000000 },
{ 0x00100000, 0x00400000, 0x00000000, 0x00000000 }, /* 0x20 */
{ 0x00100000, 0x01000000, 0x00000000, 0x00000000 },
{ 0x00100000, 0x04000000, 0x00000000, 0x00000000 },
{ 0x00400000, 0x00800000, 0x00000000, 0x00000000 },
{ 0x00400000, 0x04000000, 0x00000000, 0x00000000 },
{ 0x00400000, 0x00400000, 0x04000000, 0x00000000 },
{ 0x01000000, 0x04000000, 0x00000000, 0x00000000 },
{ 0x01000000, 0x01000000, 0x04000000, 0x00000000 },
{ 0x04000000, 0x00000000, 0x00000000, 0x00000000 }, /* 0x28 */
{ 0x04000000, 0x04000000, 0x00000000, 0x00000000 },
{ 0x00400000, 0x02000000, 0x00000000, 0x00000000 },
{ 0x00400000, 0x02000000, 0x02000000, 0x00000000 },
{ 0x00400000, 0x00400000, 0x02000000, 0x00000000 },
{ 0x00400000, 0x00400000, 0x02000000, 0x02000000 },
{ 0x01000000, 0x02000000, 0x00000000, 0x00000000 },
{ 0x01000000, 0x02000000, 0x02000000, 0x00000000 },
{ 0x01000000, 0x01000000, 0x02000000, 0x00000000 }, /* 0x30 */
{ 0x01000000, 0x01000000, 0x02000000, 0x02000000 },
{ 0x02000000, 0x00000000, 0x00000000, 0x00000000 },
{ 0x02000000, 0x02000000, 0x00000000, 0x00000000 },
{ 0x02000000, 0x02000000, 0x02000000, 0x00000000 },
{ 0x02000000, 0x02000000, 0x02000000, 0x02000000 },
{ 0x00400000, 0x00800000, 0x00800000, 0x00000000 },
{ 0x00400000, 0x00800000, 0x00800000, 0x00800000 },
{ 0x00400000, 0x00400000, 0x00800000, 0x00000000 }, /* 0x38 */
{ 0x00400000, 0x00400000, 0x00800000, 0x00800000 },
{ 0x00800000, 0x01000000, 0x00000000, 0x00000000 },
{ 0x00800000, 0x00800000, 0x00800000, 0x01000000 },
{ 0x00800000, 0x00800000, 0x01000000, 0x00000000 },
{ 0x00800000, 0x00800000, 0x01000000, 0x01000000 },
{ 0x00800000, 0x00800000, 0x02000000, 0x00000000 },
{ 0x00800000, 0x00800000, 0x02000000, 0x02000000 } };
static uint32_t
sis_85c471_get_row(ram_bank_t *dev, uint32_t addr)
{
uint32_t ret = 0x00000000;
switch (dev->virt_size) {
case 0x00100000:
case 0x00200000:
ret |= (addr >> 13) & 0x00000001;
ret |= ((addr >> 12) & 0x00000001) << 1;
ret |= ((addr >> 14) & 0x0000003f) << 2;
ret |= ((addr >> 11) & 0x00000001) << 8;
ret |= ((addr >> 20) & 0x00000001) << 9;
ret |= ((addr >> 22) & 0x00000001) << 10;
ret |= ((addr >> 24) & 0x00000001) << 11;
break;
case 0x00400000:
case 0x00800000:
ret |= (addr >> 13) & 0x00000001;
ret |= ((addr >> 12) & 0x00000001) << 1;
ret |= ((addr >> 14) & 0x000000ff) << 2;
ret |= ((addr >> 22) & 0x00000001) << 10;
ret |= ((addr >> 24) & 0x00000001) << 11;
break;
case 0x01000000:
case 0x02000000:
case 0x04000000:
ret |= (addr >> 13) & 0x00000001;
ret |= ((addr >> 22) & 0x00000001) << 1;
ret |= ((addr >> 14) & 0x000000ff) << 2;
ret |= ((addr >> 23) & 0x00000001) << 10;
ret |= ((addr >> 24) & 0x00000001) << 11;
break;
}
return ret;
}
static uint32_t
sis_85c471_get_col(ram_bank_t *dev, uint32_t addr)
{
uint32_t ret = 0x00000000;
switch (dev->virt_size) {
case 0x00100000:
case 0x00200000:
ret |= (addr >> 3) & 0x00000001;
ret |= ((addr >> 2) & 0x00000001) << 1;
ret |= ((addr >> 4) & 0x0000003f) << 2;
ret |= ((addr >> 10) & 0x00000001) << 8;
ret |= ((addr >> 21) & 0x00000001) << 9;
ret |= ((addr >> 23) & 0x00000001) << 10;
ret |= ((addr >> 25) & 0x00000001) << 11;
break;
case 0x00400000:
case 0x00800000:
ret |= (addr >> 3) & 0x00000001;
ret |= ((addr >> 2) & 0x00000001) << 1;
ret |= ((addr >> 4) & 0x000000ff) << 2;
ret |= ((addr >> 23) & 0x00000001) << 10;
ret |= ((addr >> 25) & 0x00000001) << 11;
break;
case 0x01000000:
case 0x02000000:
case 0x04000000:
ret |= (addr >> 3) & 0x00000001;
ret |= ((addr >> 2) & 0x00000001) << 1;
ret |= ((addr >> 4) & 0x000001ff) << 2;
ret |= ((addr >> 25) & 0x00000001) << 11;
break;
}
return ret;
}
static uint32_t
sis_85c471_set_row(ram_bank_t *dev, uint32_t addr)
{
uint32_t ret = 0x00000000;
switch (dev->phys_size) {
case 0x00100000:
ret = (addr & 0x1ff) << 11;
break;
case 0x00200000:
ret = (addr & 0x3ff) << 11;
break;
case 0x00400000:
ret = (addr & 0x3ff) << 12;
break;
case 0x00800000:
ret = (addr & 0x7ff) << 12;
break;
case 0x01000000:
ret = (addr & 0x7ff) << 13;
break;
case 0x02000000:
ret = (addr & 0xfff) << 13;
break;
case 0x04000000:
ret = (addr & 0xfff) << 14;
break;
}
return ret;
}
static uint32_t
sis_85c471_set_col(ram_bank_t *dev, uint32_t addr)
{
uint32_t ret = 0x00000000;
switch (dev->phys_size) {
case 0x00100000:
case 0x00200000:
ret = (addr & 0x1ff) << 2;
break;
case 0x00400000:
case 0x00800000:
ret = (addr & 0x3ff) << 2;
break;
case 0x01000000:
case 0x02000000:
ret = (addr & 0x7ff) << 2;
break;
case 0x04000000:
ret = (addr & 0xfff) << 2;
break;
}
return ret;
}
uint8_t reg09 = 0x00;
static uint8_t
sis_85c471_read_ram(uint32_t addr, void *priv)
{
ram_bank_t *dev = (ram_bank_t *) priv;
uint32_t rel = addr - dev->virt_base;
uint8_t ret = 0xff;
uint32_t row = sis_85c471_set_row(dev, sis_85c471_get_row(dev, rel));
uint32_t col = sis_85c471_set_col(dev, sis_85c471_get_col(dev, rel));
uint32_t dw = rel & 0x00000003;
rel = row | col | dw;
addr = (rel + dev->phys_base);
if ((addr < (mem_size << 10)) && (rel < dev->phys_size))
ret = ram[addr];
return ret;
}
static uint16_t
sis_85c471_read_ramw(uint32_t addr, void *priv)
{
ram_bank_t *dev = (ram_bank_t *) priv;
uint32_t rel = addr - dev->virt_base;
uint16_t ret = 0xffff;
uint32_t row = sis_85c471_set_row(dev, sis_85c471_get_row(dev, rel));
uint32_t col = sis_85c471_set_col(dev, sis_85c471_get_col(dev, rel));
uint32_t dw = rel & 0x00000003;
rel = row | col | dw;
addr = (rel + dev->phys_base);
if ((addr < (mem_size << 10)) && (rel < dev->phys_size))
ret = *(uint16_t *) &(ram[addr]);
return ret;
}
static uint32_t
sis_85c471_read_raml(uint32_t addr, void *priv)
{
ram_bank_t *dev = (ram_bank_t *) priv;
uint32_t rel = addr - dev->virt_base;
uint32_t ret = 0xffffffff;
uint32_t row = sis_85c471_set_row(dev, sis_85c471_get_row(dev, rel));
uint32_t col = sis_85c471_set_col(dev, sis_85c471_get_col(dev, rel));
uint32_t dw = rel & 0x00000003;
rel = row | col | dw;
addr = (rel + dev->phys_base);
if ((addr < (mem_size << 10)) && (rel < dev->phys_size))
ret = *(uint32_t *) &(ram[addr]);
return ret;
}
static void
sis_85c471_write_ram(uint32_t addr, uint8_t val, void *priv)
{
ram_bank_t *dev = (ram_bank_t *) priv;
uint32_t rel = addr - dev->virt_base;
uint32_t row = sis_85c471_set_row(dev, sis_85c471_get_row(dev, rel));
uint32_t col = sis_85c471_set_col(dev, sis_85c471_get_col(dev, rel));
uint32_t dw = rel & 0x00000003;
rel = row | col | dw;
addr = (rel + dev->phys_base);
if ((addr < (mem_size << 10)) && (rel < dev->phys_size))
ram[addr] = val;
}
static void
sis_85c471_write_ramw(uint32_t addr, uint16_t val, void *priv)
{
ram_bank_t *dev = (ram_bank_t *) priv;
uint32_t rel = addr - dev->virt_base;
uint32_t row = sis_85c471_set_row(dev, sis_85c471_get_row(dev, rel));
uint32_t col = sis_85c471_set_col(dev, sis_85c471_get_col(dev, rel));
uint32_t dw = rel & 0x00000003;
rel = row | col | dw;
addr = (rel + dev->phys_base);
if ((addr < (mem_size << 10)) && (rel < dev->phys_size))
*(uint16_t *) &(ram[addr]) = val;
}
static void
sis_85c471_write_raml(uint32_t addr, uint32_t val, void *priv)
{
ram_bank_t *dev = (ram_bank_t *) priv;
uint32_t rel = addr - dev->virt_base;
uint32_t row = sis_85c471_set_row(dev, sis_85c471_get_row(dev, rel));
uint32_t col = sis_85c471_set_col(dev, sis_85c471_get_col(dev, rel));
uint32_t dw = rel & 0x00000003;
rel = row | col | dw;
addr = (rel + dev->phys_base);
if ((addr < (mem_size << 10)) && (rel < dev->phys_size))
*(uint32_t *) &(ram[addr]) = val;
}
static void
sis_85c4xx_recalcremap(sis_85c4xx_t *dev)
{
@@ -158,6 +515,62 @@ sis_85c4xx_sw_smi_handler(sis_85c4xx_t *dev)
NULL, NULL, NULL, sis_85c4xx_sw_smi_out, NULL, NULL, dev);
}
static void
sis_85c471_banks_split(uint32_t *b_ex, uint32_t *banks)
{
for (uint8_t i = 0; i < 4; i++) {
if ((banks[i] == 0x00200000) || (banks[i] == 0x00800000) ||
(banks[i] == 0x02000000))
b_ex[i << 1] = b_ex[(i << 1) + 1] = banks[i] >> 1;
else {
b_ex[i << 1] = banks[i];
b_ex[(i << 1) + 1] = 0x00000000;
}
}
}
static void
sis_85c471_banks_recalc(sis_85c4xx_t *dev)
{
reg09 = dev->regs[0x09];
for (uint8_t i = 0; i < 8; i++)
mem_mapping_disable(&dev->ram_banks[i].mapping);
mem_mapping_disable(&ram_low_mapping);
mem_mapping_disable(&ram_high_mapping);
mem_set_mem_state_both(1 << 20, 127 << 20, MEM_READ_EXTERNAL | MEM_WRITE_EXTERNAL);
if ((dev->regs[0x09] & 0x3f) == dev->ram_banks_val) {
if (mem_size > 1024) {
mem_mapping_enable(&ram_low_mapping);
mem_mapping_enable(&ram_high_mapping);
mem_set_mem_state_both(1 << 20, (mem_size << 10) - (1 << 20),
MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
}
} else {
uint8_t banks_val = dev->regs[0x09] & 0x3f;
uint32_t *banks = banks_471[banks_val];
uint32_t b_ex[8] = { 0x00000000 };
uint32_t size = 0x00000000;
sis_85c471_banks_split(b_ex, banks);
for (uint8_t i = 0; i < 8; i++) if (b_ex[i] != 0x00000000) {
dev->ram_banks[i].virt_base = size;
dev->ram_banks[i].virt_size = b_ex[i];
mem_mapping_set_addr(&dev->ram_banks[i].mapping, size, b_ex[i]);
size += b_ex[i];
}
mem_set_mem_state_both(1 << 20, 127 << 20, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
}
flushmmucache_nopc();
}
static void
sis_85c4xx_out(uint16_t port, uint8_t val, void *priv)
{
@@ -174,12 +587,25 @@ sis_85c4xx_out(uint16_t port, uint8_t val, void *priv)
case 0x23:
if ((dev->cur_reg >= dev->reg_base) && (dev->cur_reg <= dev->reg_last)) {
valxor = val ^ dev->regs[rel_reg];
if (rel_reg == 0x00)
if (!dev->is_471 && (rel_reg == 0x00))
dev->regs[rel_reg] = (dev->regs[rel_reg] & 0x1f) | (val & 0xe0);
else
dev->regs[rel_reg] = val;
switch (rel_reg) {
case 0x00:
if (dev->is_471) {
if (val & 0x01) {
kbc_at_set_fast_reset(0);
cpu_cpurst_on_sr = 1;
} else {
kbc_at_set_fast_reset(1);
cpu_cpurst_on_sr = 0;
}
}
break;
case 0x01:
cpu_cache_ext_enabled = ((val & 0x84) == 0x84);
cpu_update_waitstates();
@@ -190,6 +616,13 @@ sis_85c4xx_out(uint16_t port, uint8_t val, void *priv)
case 0x08:
if (valxor)
sis_85c4xx_recalcmapping(dev);
if ((rel_reg == 0x08) && dev->is_471)
flushmmucache();
break;
case 0x09:
if (dev->is_471)
sis_85c471_banks_recalc(dev);
break;
case 0x0b:
@@ -297,14 +730,6 @@ sis_85c4xx_reset(void *priv)
{
sis_85c4xx_t *dev = (sis_85c4xx_t *) priv;
int mem_size_mb = mem_size >> 10;
static uint8_t ram_4xx[64] = { 0x00, 0x00, 0x01, 0x00, 0x02, 0x00, 0x03, 0x00, 0x04, 0x00, 0x05, 0x00, 0x0b, 0x00, 0x00, 0x00,
0x19, 0x00, 0x06, 0x00, 0x14, 0x00, 0x00, 0x00, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x1b, 0x00, 0x00, 0x00, 0x16, 0x00, 0x00, 0x00, 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x1e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
static uint8_t ram_471[64] = { 0x00, 0x00, 0x01, 0x01, 0x02, 0x20, 0x09, 0x09, 0x04, 0x04, 0x05, 0x05, 0x0b, 0x0b, 0x0b, 0x0b,
0x13, 0x21, 0x06, 0x06, 0x0d, 0x0d, 0x0d, 0x0d, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e, 0x0e,
0x1b, 0x1b, 0x1b, 0x1b, 0x0f, 0x0f, 0x0f, 0x0f, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17,
0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e };
memset(dev->regs, 0x00, sizeof(dev->regs));
@@ -313,13 +738,44 @@ sis_85c4xx_reset(void *priv)
if (dev->is_471) {
dev->regs[0x09] = 0x40;
if (mem_size_mb >= 64) {
if ((mem_size_mb >= 65) && (mem_size_mb < 68))
dev->regs[0x09] |= 0x22;
if (!strcmp(machine_get_internal_name(), "vli486sv2g")) {
if (mem_size_mb == 64)
dev->regs[0x09] |= 0x1f;
else
dev->regs[0x09] |= 0x24;
} else
dev->regs[0x09] |= ram_asus[mem_size_mb];
} else if (mem_size_mb >= 64) {
if ((mem_size_mb >= 64) && (mem_size_mb < 68))
dev->regs[0x09] |= 0x33;
else if ((mem_size_mb >= 68) && (mem_size_mb < 72))
dev->regs[0x09] |= 0x2b;
else if ((mem_size_mb >= 72) && (mem_size_mb < 80))
dev->regs[0x09] |= 0x2d;
else if ((mem_size_mb >= 80) && (mem_size_mb < 96))
dev->regs[0x09] |= 0x2f;
else if ((mem_size_mb >= 96) && (mem_size_mb < 128))
dev->regs[0x09] |= 0x34;
else
dev->regs[0x09] |= 0x35;
} else if (!strcmp(machine_get_internal_name(), "tg486g"))
dev->regs[0x09] |= ram_tg486g[mem_size_mb];
else
dev->regs[0x09] |= ram_471[mem_size_mb];
dev->ram_banks_val = dev->regs[0x09] & 0x3f;
dev->regs[0x09] = 0x00;
uint32_t *banks = banks_471[dev->ram_banks_val];
uint32_t b_ex[8] = { 0x00000000 };
uint32_t size = 0x00000000;
sis_85c471_banks_split(b_ex, banks);
for (uint8_t i = 0; i < 8; i++) {
dev->ram_banks[i].phys_base = size;
dev->ram_banks[i].phys_size = b_ex[i];
size += b_ex[i];
}
dev->regs[0x11] = 0x09;
dev->regs[0x12] = 0xff;
@@ -332,6 +788,11 @@ sis_85c4xx_reset(void *priv)
port_92_remove(dev->port_92);
soft_reset_mask = 0;
sis_85c471_banks_recalc(dev);
kbc_at_set_fast_reset(1);
cpu_cpurst_on_sr = 0;
} else {
/* Bits 6 and 7 must be clear on the SiS 40x. */
if (dev->reg_base == 0x60)
@@ -380,6 +841,14 @@ sis_85c4xx_init(const device_t *info)
dev->smram = smram_add();
dev->port_92 = device_add(&port_92_device);
for (uint8_t i = 0; i < 8; i++) {
mem_mapping_add(&dev->ram_banks[i].mapping, 0x00000000, 0x00000000,
sis_85c471_read_ram, sis_85c471_read_ramw, sis_85c471_read_raml,
sis_85c471_write_ram, sis_85c471_write_ramw, sis_85c471_write_raml,
NULL, MEM_MAPPING_INTERNAL, &(dev->ram_banks[i]));
mem_mapping_disable(&dev->ram_banks[i].mapping);
}
} else
dev->reg_last = dev->reg_base + 0x11;

13
src/codegen/codegen_x86-64.c
View File

@@ -819,6 +819,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
int pc_off = 0;
int test_modrm = 1;
int c;
uint32_t op87 = 0x00000000;
op_ea_seg = &cpu_state.seg_ds;
op_ssegs = 0;
@@ -872,6 +873,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
break;
case 0xd8:
op87 = (op87 & 0xf800) | ((opcode & 0x07) << 8) | (fetchdat & 0xff);
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_d8_a32 : x86_dynarec_opcodes_d8_a16;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_d8;
opcode_shift = 3;
@@ -882,6 +884,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
block->flags |= CODEBLOCK_HAS_FPU;
break;
case 0xd9:
op87 = (op87 & 0xf800) | ((opcode & 0x07) << 8) | (fetchdat & 0xff);
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_d9_a32 : x86_dynarec_opcodes_d9_a16;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_d9;
opcode_mask = 0xff;
@@ -891,6 +894,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
block->flags |= CODEBLOCK_HAS_FPU;
break;
case 0xda:
op87 = (op87 & 0xf800) | ((opcode & 0x07) << 8) | (fetchdat & 0xff);
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_da_a32 : x86_dynarec_opcodes_da_a16;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_da;
opcode_mask = 0xff;
@@ -900,6 +904,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
block->flags |= CODEBLOCK_HAS_FPU;
break;
case 0xdb:
op87 = (op87 & 0xf800) | ((opcode & 0x07) << 8) | (fetchdat & 0xff);
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_db_a32 : x86_dynarec_opcodes_db_a16;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_db;
opcode_mask = 0xff;
@@ -909,6 +914,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
block->flags |= CODEBLOCK_HAS_FPU;
break;
case 0xdc:
op87 = (op87 & 0xf800) | ((opcode & 0x07) << 8) | (fetchdat & 0xff);
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_dc_a32 : x86_dynarec_opcodes_dc_a16;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_dc;
opcode_shift = 3;
@@ -919,6 +925,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
block->flags |= CODEBLOCK_HAS_FPU;
break;
case 0xdd:
op87 = (op87 & 0xf800) | ((opcode & 0x07) << 8) | (fetchdat & 0xff);
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_dd_a32 : x86_dynarec_opcodes_dd_a16;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_dd;
opcode_mask = 0xff;
@@ -928,6 +935,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
block->flags |= CODEBLOCK_HAS_FPU;
break;
case 0xde:
op87 = (op87 & 0xf800) | ((opcode & 0x07) << 8) | (fetchdat & 0xff);
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_de_a32 : x86_dynarec_opcodes_de_a16;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_de;
opcode_mask = 0xff;
@@ -937,6 +945,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
block->flags |= CODEBLOCK_HAS_FPU;
break;
case 0xdf:
op87 = (op87 & 0xf800) | ((opcode & 0x07) << 8) | (fetchdat & 0xff);
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_df_a32 : x86_dynarec_opcodes_df_a16;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_df;
opcode_mask = 0xff;
@@ -1000,6 +1009,10 @@ generate_call:
recomp_op_table = recomp_opcodes;
}
if (op87 != 0x0000) {
STORE_IMM_ADDR_L((uintptr_t) &x87_op, op87);
}
if (recomp_op_table && recomp_op_table[(opcode | op_32) & 0x1ff]) {
uint32_t new_pc = recomp_op_table[(opcode | op_32) & 0x1ff](opcode, fetchdat, op_32, op_pc, block);
if (new_pc) {

13
src/codegen/codegen_x86.c
View File

@@ -1858,6 +1858,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
int pc_off = 0;
int test_modrm = 1;
int c;
uint32_t op87 = 0x00000000;
op_ea_seg = &cpu_state.seg_ds;
op_ssegs = 0;
@@ -1912,6 +1913,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
break;
case 0xd8:
op87 = (op87 & 0xf800) | ((opcode & 0x07) << 8) | (fetchdat & 0xff);
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_d8_a32 : x86_dynarec_opcodes_d8_a16;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_d8;
opcode_shift = 3;
@@ -1922,6 +1924,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
block->flags |= CODEBLOCK_HAS_FPU;
break;
case 0xd9:
op87 = (op87 & 0xf800) | ((opcode & 0x07) << 8) | (fetchdat & 0xff);
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_d9_a32 : x86_dynarec_opcodes_d9_a16;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_d9;
opcode_mask = 0xff;
@@ -1931,6 +1934,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
block->flags |= CODEBLOCK_HAS_FPU;
break;
case 0xda:
op87 = (op87 & 0xf800) | ((opcode & 0x07) << 8) | (fetchdat & 0xff);
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_da_a32 : x86_dynarec_opcodes_da_a16;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_da;
opcode_mask = 0xff;
@@ -1940,6 +1944,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
block->flags |= CODEBLOCK_HAS_FPU;
break;
case 0xdb:
op87 = (op87 & 0xf800) | ((opcode & 0x07) << 8) | (fetchdat & 0xff);
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_db_a32 : x86_dynarec_opcodes_db_a16;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_db;
opcode_mask = 0xff;
@@ -1949,6 +1954,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
block->flags |= CODEBLOCK_HAS_FPU;
break;
case 0xdc:
op87 = (op87 & 0xf800) | ((opcode & 0x07) << 8) | (fetchdat & 0xff);
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_dc_a32 : x86_dynarec_opcodes_dc_a16;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_dc;
opcode_shift = 3;
@@ -1959,6 +1965,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
block->flags |= CODEBLOCK_HAS_FPU;
break;
case 0xdd:
op87 = (op87 & 0xf800) | ((opcode & 0x07) << 8) | (fetchdat & 0xff);
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_dd_a32 : x86_dynarec_opcodes_dd_a16;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_dd;
opcode_mask = 0xff;
@@ -1968,6 +1975,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
block->flags |= CODEBLOCK_HAS_FPU;
break;
case 0xde:
op87 = (op87 & 0xf800) | ((opcode & 0x07) << 8) | (fetchdat & 0xff);
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_de_a32 : x86_dynarec_opcodes_de_a16;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_de;
opcode_mask = 0xff;
@@ -1977,6 +1985,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
block->flags |= CODEBLOCK_HAS_FPU;
break;
case 0xdf:
op87 = (op87 & 0xf800) | ((opcode & 0x07) << 8) | (fetchdat & 0xff);
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_df_a32 : x86_dynarec_opcodes_df_a16;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_df;
opcode_mask = 0xff;
@@ -2041,6 +2050,10 @@ generate_call:
recomp_op_table = recomp_opcodes;
}
if (op87 != 0x0000) {
STORE_IMM_ADDR_L((uintptr_t) &x87_op, op87);
}
if (recomp_op_table && recomp_op_table[(opcode | op_32) & 0x1ff]) {
uint32_t new_pc = recomp_op_table[(opcode | op_32) & 0x1ff](opcode, fetchdat, op_32, op_pc, block);
if (new_pc) {

12
src/codegen_new/codegen.c
View File

@@ -396,6 +396,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
int test_modrm = 1;
int pc_off = 0;
uint32_t next_pc = 0;
uint16_t op87 = 0x0000;
#ifdef DEBUG_EXTRA
uint8_t last_prefix = 0;
#endif
@@ -451,6 +452,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
#ifdef DEBUG_EXTRA
last_prefix = 0xd8;
#endif
op87 = (op87 & 0xf800) | ((opcode & 0x07) << 8) | (fetchdat & 0xff);
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_d8_a32 : x86_dynarec_opcodes_d8_a16;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_d8;
opcode_shift = 3;
@@ -464,6 +466,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
#ifdef DEBUG_EXTRA
last_prefix = 0xd9;
#endif
op87 = (op87 & 0xf800) | ((opcode & 0x07) << 8) | (fetchdat & 0xff);
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_d9_a32 : x86_dynarec_opcodes_d9_a16;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_d9;
opcode_mask = 0xff;
@@ -476,6 +479,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
#ifdef DEBUG_EXTRA
last_prefix = 0xda;
#endif
op87 = (op87 & 0xf800) | ((opcode & 0x07) << 8) | (fetchdat & 0xff);
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_da_a32 : x86_dynarec_opcodes_da_a16;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_da;
opcode_mask = 0xff;
@@ -488,6 +492,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
#ifdef DEBUG_EXTRA
last_prefix = 0xdb;
#endif
op87 = (op87 & 0xf800) | ((opcode & 0x07) << 8) | (fetchdat & 0xff);
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_db_a32 : x86_dynarec_opcodes_db_a16;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_db;
opcode_mask = 0xff;
@@ -500,6 +505,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
#ifdef DEBUG_EXTRA
last_prefix = 0xdc;
#endif
op87 = (op87 & 0xf800) | ((opcode & 0x07) << 8) | (fetchdat & 0xff);
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_dc_a32 : x86_dynarec_opcodes_dc_a16;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_dc;
opcode_shift = 3;
@@ -513,6 +519,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
#ifdef DEBUG_EXTRA
last_prefix = 0xdd;
#endif
op87 = (op87 & 0xf800) | ((opcode & 0x07) << 8) | (fetchdat & 0xff);
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_dd_a32 : x86_dynarec_opcodes_dd_a16;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_dd;
opcode_mask = 0xff;
@@ -525,6 +532,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
#ifdef DEBUG_EXTRA
last_prefix = 0xde;
#endif
op87 = (op87 & 0xf800) | ((opcode & 0x07) << 8) | (fetchdat & 0xff);
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_de_a32 : x86_dynarec_opcodes_de_a16;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_de;
opcode_mask = 0xff;
@@ -537,6 +545,7 @@ codegen_generate_call(uint8_t opcode, OpFn op, uint32_t fetchdat, uint32_t new_p
#ifdef DEBUG_EXTRA
last_prefix = 0xdf;
#endif
op87 = (op87 & 0xf800) | ((opcode & 0x07) << 8) | (fetchdat & 0xff);
op_table = (op_32 & 0x200) ? x86_dynarec_opcodes_df_a32 : x86_dynarec_opcodes_df_a16;
recomp_op_table = fpu_softfloat ? NULL : recomp_opcodes_df;
opcode_mask = 0xff;
@@ -657,6 +666,9 @@ generate_call:
}
}
codegen_mark_code_present(block, cs + old_pc, (op_pc - old_pc) - pc_off);
if (op87 != 0x0000) {
uop_MOV_IMM(ir, IREG_x87_op, op87);
}
/* It is apparently a prefixed instruction. */
#if 0
if ((recomp_op_table == recomp_opcodes) && (opcode == 0x48))

1
src/codegen_new/codegen.h
View File

@@ -306,6 +306,7 @@ struct ir_data_t;
x86seg *codegen_generate_ea(struct ir_data_t *ir, x86seg *op_ea_seg, uint32_t fetchdat, int op_ssegs, uint32_t *op_pc, uint32_t op_32, int stack_offset);
extern void codegen_check_seg_read(codeblock_t *block, struct ir_data_t *ir, x86seg *seg);
extern void codegen_check_seg_write(codeblock_t *block, struct ir_data_t *ir, x86seg *seg);
extern void codegen_check_regs(void);
extern int codegen_purge_purgable_list(void);
/*Delete a random code block to free memory. This is obviously quite expensive, and

4
src/codegen_new/codegen_backend_x86-64.c
View File

@@ -329,7 +329,7 @@ codegen_backend_init(void)
host_x86_POP(block, REG_RSI);
#endif
host_x86_POP(block, REG_RBP);
host_x86_POP(block, REG_RDX);
host_x86_POP(block, REG_RBX);
host_x86_RET(block);
block_write_data = NULL;
@@ -392,7 +392,7 @@ codegen_backend_epilogue(codeblock_t *block)
host_x86_POP(block, REG_RSI);
#endif
host_x86_POP(block, REG_RBP);
host_x86_POP(block, REG_RDX);
host_x86_POP(block, REG_RBX);
host_x86_RET(block);
}
#endif

12
src/codegen_new/codegen_backend_x86-64_ops.c
View File

@@ -780,8 +780,18 @@ host_x86_MOV32_REG_ABS(codeblock_t *block, int dst_reg, void *p)
codegen_alloc_bytes(block, 8);
codegen_addbyte4(block, 0x41, 0x8b, 0x84 | ((dst_reg & 7) << 3), 0x24); /*MOV dst_reg, ram_offset[R12]*/
codegen_addlong(block, ram_offset);
} else if ((ram_offset < -2147483648LL) || (ram_offset > 2147483647LL) || !(block->flags & CODEBLOCK_NO_IMMEDIATES)) {
// fatal("host_x86_MOV32_REG_ABS - out of range\n");
// void *q = p;
//uint32_t *r = NULL;
// *r = 5; /* Crash deliberately. */
codegen_alloc_bytes(block, 8);
codegen_addbyte2(block, 0x49, 0xb9); /*MOV r9,(uintptr_t) p*/
codegen_addquad(block, (uintptr_t) p);
codegen_alloc_bytes(block, 3);
codegen_addbyte3(block, 0x41, 0x8b, 0x01 | ((dst_reg & 7) << 3)); /*MOV dst_reg, [R9]*/
} else {
fatal("host_x86_MOV32_REG_ABS - out of range\n");
fatal("host_x86_MOV32_REG_ABS - RAM offset = %016" PRIX64 " (p - ram = %016" PRIX64 ")\n", ram_offset, (uintptr_t) p - (uintptr_t) ram);
codegen_alloc_bytes(block, 6);
codegen_addbyte(block, 0x8b); /*MOV [p], src_reg*/
codegen_addbyte(block, 0x05 | ((dst_reg & 7) << 3));

1
src/codegen_new/codegen_block.c
View File

@@ -217,6 +217,7 @@ block_free_list_get(void)
void
codegen_init(void)
{
codegen_check_regs();
codegen_allocator_init();
codegen_backend_init();

15
src/codegen_new/codegen_reg.c
View File

@@ -170,6 +170,7 @@ struct
[IREG_SS_limit_high] = { REG_DWORD, &cpu_state.seg_ss.limit_high, REG_INTEGER, REG_PERMANENT},
[IREG_eaa16] = { REG_WORD, &cpu_state.eaaddr, REG_INTEGER, REG_PERMANENT},
[IREG_x87_op] = { REG_WORD, &x87_op, REG_INTEGER, REG_PERMANENT},
/*Temporary registers are stored on the stack, and are not guaranteed to
be preserved across uOPs. They will not be written back if they will
@@ -225,6 +226,20 @@ reg_is_native_size(ir_reg_t ir_reg)
return 0;
}
void
codegen_check_regs(void)
{
int i = 0;
for (i = 0; i < IREG_COUNT; i++) {
if (ireg_data[i].is_volatile == REG_VOLATILE)
continue;
if (ireg_data[i].p && ((uintptr_t)ireg_data[i].p - (uintptr_t)&cpu_state) >= sizeof(cpu_state)) {
fatal("Register number %d outside cpu_state!\n", i);
}
}
}
void
codegen_reg_reset(void)
{

3
src/codegen_new/codegen_reg.h
View File

@@ -133,8 +133,9 @@ enum {
IREG_SS_limit_high = 87,
IREG_eaa16 = 88,
IREG_x87_op = 89,
IREG_COUNT = 89,
IREG_COUNT = 90,
IREG_INVALID = 255,

73
src/config.c
View File

@@ -107,6 +107,7 @@ config_log(const char *fmt, ...)
# define config_log(fmt, ...)
#endif
/* Load "General" section. */
static void
load_general(void)
@@ -127,8 +128,6 @@ load_general(void)
video_fullscreen_scale = ini_section_get_int(cat, "video_fullscreen_scale", 1);
video_fullscreen_first = ini_section_get_int(cat, "video_fullscreen_first", 1);
video_filter_method = ini_section_get_int(cat, "video_filter_method", 1);
inhibit_multimedia_keys = ini_section_get_int(cat, "inhibit_multimedia_keys", 0);
@@ -186,7 +185,7 @@ load_general(void)
if (p != NULL)
lang_id = plat_language_code(p);
else
lang_id = 0xffff;
lang_id = plat_language_code(DEFAULT_LANGUAGE);
mouse_sensitivity = ini_section_get_double(cat, "mouse_sensitivity", 1.0);
if (mouse_sensitivity < 0.1)
@@ -745,7 +744,7 @@ load_ports(void)
char temp[512];
memset(temp, 0, sizeof(temp));
for (int c = 0; c < SERIAL_MAX; c++) {
for (int c = 0; c < (SERIAL_MAX - 1); c++) {
sprintf(temp, "serial%d_enabled", c + 1);
com_ports[c].enabled = !!ini_section_get_int(cat, temp, (c >= 2) ? 0 : 1);
@@ -1762,6 +1761,36 @@ load_gl3_shaders(void)
}
#endif
/* Load "Keybinds" section. */
static void
load_keybinds(void)
{
ini_section_t cat = ini_find_section(config, "Keybinds");
char *p;
char temp[512];
memset(temp, 0, sizeof(temp));
/* Now load values from config */
for (int x = 0; x < NUM_ACCELS; x++) {
p = ini_section_get_string(cat, acc_keys[x].name, "default");
/* Check if the binding was marked as cleared */
if (strcmp(p, "none") == 0)
acc_keys[x].seq[0] = '\0';
/* If there's no binding in the file, leave it alone. */
else if (strcmp(p, "default") != 0) {
/*
It would be ideal to validate whether the user entered a
valid combo at this point, but the Qt method for testing that is
not available from C. Fortunately, if you feed Qt an invalid
keysequence string it just assigns nothing, so this won't blow up.
However, to improve the user experience, we should validate keys
and erase any bad combos from config on mainwindow load.
*/
strcpy(acc_keys[x].seq, p);
}
}
}
/* Load the specified or a default configuration file. */
void
config_load(void)
@@ -1801,14 +1830,13 @@ config_load(void)
gfxcard[0] = video_get_video_from_internal_name("cga");
vid_api = plat_vidapi("default");
vid_resize = 0;
video_fullscreen_first = 1;
video_fullscreen_scale = 1;
time_sync = TIME_SYNC_ENABLED;
hdc_current[0] = hdc_get_from_internal_name("none");
com_ports[0].enabled = 1;
com_ports[1].enabled = 1;
for (i = 2; i < SERIAL_MAX; i++)
for (i = 2; i < (SERIAL_MAX - 1); i++)
com_ports[i].enabled = 0;
lpt_ports[0].enabled = 1;
@@ -1842,7 +1870,7 @@ config_load(void)
cassette_pcm = 0;
cassette_ui_writeprot = 0;
lang_id = DEFAULT_LANGUAGE;
lang_id = plat_language_code(DEFAULT_LANGUAGE);
config_log("Config file not present or invalid!\n");
} else {
@@ -1863,6 +1891,7 @@ config_load(void)
#ifndef USE_SDL_UI
load_gl3_shaders(); /* GL3 Shaders */
#endif
load_keybinds(); /* Load shortcut keybinds */
/* Migrate renamed device configurations. */
c = ini_find_section(config, "MDA");
@@ -1923,11 +1952,6 @@ save_general(void)
else
ini_section_set_int(cat, "video_fullscreen_scale", video_fullscreen_scale);
if (video_fullscreen_first == 1)
ini_section_delete_var(cat, "video_fullscreen_first");
else
ini_section_set_int(cat, "video_fullscreen_first", video_fullscreen_first);
if (video_filter_method == 1)
ini_section_delete_var(cat, "video_filter_method");
else
@@ -2029,7 +2053,7 @@ save_general(void)
else
ini_section_delete_var(cat, "mouse_sensitivity");
if (lang_id == DEFAULT_LANGUAGE)
if (lang_id == plat_language_code(DEFAULT_LANGUAGE))
ini_section_delete_var(cat, "language");
else {
plat_language_code_r(lang_id, buffer, 511);
@@ -2427,7 +2451,7 @@ save_ports(void)
ini_section_t cat = ini_find_or_create_section(config, "Ports (COM & LPT)");
char temp[512];
for (int c = 0; c < SERIAL_MAX; c++) {
for (int c = 0; c < (SERIAL_MAX - 1); c++) {
sprintf(temp, "serial%d_enabled", c + 1);
if (((c < 2) && com_ports[c].enabled) || ((c >= 2) && !com_ports[c].enabled))
ini_section_delete_var(cat, temp);
@@ -2488,6 +2512,26 @@ save_ports(void)
ini_delete_section_if_empty(config, cat);
}
/* Save "Keybinds" section. */
static void
save_keybinds(void)
{
ini_section_t cat = ini_find_or_create_section(config, "Keybinds");
for (int x = 0; x < NUM_ACCELS; x++) {
/* Has accelerator been changed from default? */
if (strcmp(def_acc_keys[x].seq, acc_keys[x].seq) == 0)
ini_section_delete_var(cat, acc_keys[x].name);
/* Check for a cleared binding to avoid saving it as an empty string */
else if (acc_keys[x].seq[0] == '\0')
ini_section_set_string(cat, acc_keys[x].name, "none");
else
ini_section_set_string(cat, acc_keys[x].name, acc_keys[x].seq);
}
ini_delete_section_if_empty(config, cat);
}
/* Save "Storage Controllers" section. */
static void
save_storage_controllers(void)
@@ -3098,6 +3142,7 @@ config_save(void)
#ifndef USE_SDL_UI
save_gl3_shaders(); /* GL3 Shaders */
#endif
save_keybinds(); /* Key bindings */
ini_write(config, cfg_path);
}

12
src/cpu/808x.c
View File

@@ -38,6 +38,7 @@
#include <86box/ppi.h>
#include <86box/timer.h>
#include <86box/gdbstub.h>
#include <86box/plat_fallthrough.h>
#include <86box/plat_unused.h>
/* Is the CPU 8088 or 8086. */
@@ -3438,10 +3439,13 @@ execx86(int cycs)
set_pzs(8);
break;
case 0xD6: /*SALC*/
wait(1, 0);
AL = (cpu_state.flags & C_FLAG) ? 0xff : 0x00;
wait(1, 0);
break;
if (!is_nec) {
wait(1, 0);
AL = (cpu_state.flags & C_FLAG) ? 0xff : 0x00;
wait(1, 0);
break;
}
fallthrough;
case 0xD7: /*XLATB*/
cpu_state.eaaddr = (BX + AL) & 0xffff;
access(4, 8);

4
src/cpu/cpu.h
View File

@@ -416,6 +416,8 @@ typedef struct {
uint16_t eflags;
uint32_t _smbase;
uint32_t x87_op;
} cpu_state_t;
#define in_smm cpu_state._in_smm
@@ -784,6 +786,8 @@ typedef struct {
uint32_t smhr;
} cyrix_t;
#define x87_op cpu_state.x87_op
extern uint32_t addr64;
extern uint32_t addr64_2;
extern uint32_t addr64a[8];

2
src/cpu/cpu_table.c
View File

@@ -7793,7 +7793,7 @@ const cpu_family_t cpu_families[] = {
{
.package = CPU_PKG_SOCKET370,
.manufacturer = "VIA",
.name = "Cyrix III",
.name = "Cyrix III (Samuel)",
.internal_name = "c3_samuel",
.cpus = (const CPU[]) {
{ /* out of multiplier range */

2
src/cpu/x86.c
View File

@@ -272,6 +272,7 @@ reset_common(int hard)
msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
msw = 0;
new_ne = 0;
x87_op = 0;
ccr0 = ccr1 = ccr2 = ccr3 = ccr4 = ccr5 = ccr6 = ccr7 = 0;
ccr4 = 0x85;
@@ -325,7 +326,6 @@ reset_common(int hard)
resetreadlookup();
makemod1table();
cpu_set_edx();
mmu_perm = 4;
}
x86seg_reset();
#ifdef USE_DYNAREC

16
src/cpu/x86_ops_fpu.h
View File

@@ -4,88 +4,104 @@
static int
opESCAPE_d8_a16(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_opcodes_d8_a16[(fetchdat >> 3) & 0x1f](fetchdat);
}
static int
opESCAPE_d8_a32(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_opcodes_d8_a32[(fetchdat >> 3) & 0x1f](fetchdat);
}
static int
opESCAPE_d9_a16(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_opcodes_d9_a16[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_d9_a32(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_opcodes_d9_a32[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_da_a16(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_opcodes_da_a16[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_da_a32(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_opcodes_da_a32[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_db_a16(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_opcodes_db_a16[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_db_a32(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_opcodes_db_a32[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_dc_a16(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_opcodes_dc_a16[(fetchdat >> 3) & 0x1f](fetchdat);
}
static int
opESCAPE_dc_a32(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_opcodes_dc_a32[(fetchdat >> 3) & 0x1f](fetchdat);
}
static int
opESCAPE_dd_a16(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_opcodes_dd_a16[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_dd_a32(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_opcodes_dd_a32[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_de_a16(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_opcodes_de_a16[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_de_a32(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_opcodes_de_a32[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_df_a16(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_opcodes_df_a16[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_df_a32(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_opcodes_df_a32[fetchdat & 0xff](fetchdat);
}

16
src/cpu/x86_ops_fpu_2386.h
View File

@@ -4,88 +4,104 @@
static int
opESCAPE_d8_a16(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_2386_opcodes_d8_a16[(fetchdat >> 3) & 0x1f](fetchdat);
}
static int
opESCAPE_d8_a32(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_2386_opcodes_d8_a32[(fetchdat >> 3) & 0x1f](fetchdat);
}
static int
opESCAPE_d9_a16(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_2386_opcodes_d9_a16[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_d9_a32(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_2386_opcodes_d9_a32[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_da_a16(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_2386_opcodes_da_a16[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_da_a32(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_2386_opcodes_da_a32[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_db_a16(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_2386_opcodes_db_a16[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_db_a32(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_2386_opcodes_db_a32[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_dc_a16(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_2386_opcodes_dc_a16[(fetchdat >> 3) & 0x1f](fetchdat);
}
static int
opESCAPE_dc_a32(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_2386_opcodes_dc_a32[(fetchdat >> 3) & 0x1f](fetchdat);
}
static int
opESCAPE_dd_a16(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_2386_opcodes_dd_a16[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_dd_a32(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_2386_opcodes_dd_a32[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_de_a16(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_2386_opcodes_de_a16[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_de_a32(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_2386_opcodes_de_a32[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_df_a16(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_2386_opcodes_df_a16[fetchdat & 0xff](fetchdat);
}
static int
opESCAPE_df_a32(uint32_t fetchdat)
{
x87_op = ((opcode & 0x07) << 8) | (fetchdat & 0xff);
return x86_2386_opcodes_df_a32[fetchdat & 0xff](fetchdat);
}

50
src/cpu/x86_ops_i686.h
View File

@@ -46,8 +46,6 @@ sf_fx_save_stor_common(uint32_t fetchdat, int bits)
if (CPUID < 0x650)
return ILLEGAL(fetchdat);
FP_ENTER();
if (bits == 32) {
fetch_ea_32(fetchdat);
} else {
@@ -82,12 +80,18 @@ sf_fx_save_stor_common(uint32_t fetchdat, int bits)
/* The lower 11 bits contain the FPU opcode, upper 5 bits are reserved */
fpu_state.foo = readmemw(easeg, cpu_state.eaaddr + 6) & 0x7FF;
fpu_state.fip = readmeml(easeg, cpu_state.eaaddr + 8);
if (bits == 32)
fpu_state.fip = readmeml(easeg, cpu_state.eaaddr + 8);
else
fpu_state.fip = readmemw(easeg, cpu_state.eaaddr + 8);
fpu_state.fcs = readmemw(easeg, cpu_state.eaaddr + 12);
tag_byte = readmemb(easeg, cpu_state.eaaddr + 4);
fpu_state.fdp = readmeml(easeg, cpu_state.eaaddr + 16);
if (bits == 32)
fpu_state.fdp = readmeml(easeg, cpu_state.eaaddr + 16);
else
fpu_state.fdp = readmemw(easeg, cpu_state.eaaddr + 16);
fpu_state.fds = readmemw(easeg, cpu_state.eaaddr + 20);
/* load i387 register file */
@@ -110,7 +114,6 @@ sf_fx_save_stor_common(uint32_t fetchdat, int bits)
fpu_state.swd &= ~(FPU_SW_Summary | FPU_SW_Backward);
}
// CLOCK_CYCLES((cr0 & 1) ? 34 : 44);
CLOCK_CYCLES(1);
} else {
/* FXSAVE */
@@ -132,7 +135,10 @@ sf_fx_save_stor_common(uint32_t fetchdat, int bits)
* x87 CS FPU IP Selector
* + 16 bit, in 16/32 bit mode only
*/
writememl(easeg, cpu_state.eaaddr + 8, fpu_state.fip);
if (bits == 32)
writememl(easeg, cpu_state.eaaddr + 8, fpu_state.fip);
else
writememl(easeg, cpu_state.eaaddr + 8, fpu_state.fip & 0xffff);
writememl(easeg, cpu_state.eaaddr + 12, fpu_state.fcs);
/*
@@ -145,7 +151,10 @@ sf_fx_save_stor_common(uint32_t fetchdat, int bits)
* x87 DS FPU Instruction Operand (Data) Pointer Selector
* + 16 bit, in 16/32 bit mode only
*/
writememl(easeg, cpu_state.eaaddr + 16, fpu_state.fdp);
if (bits == 32)
writememl(easeg, cpu_state.eaaddr + 16, fpu_state.fdp);
else
writememl(easeg, cpu_state.eaaddr + 16, fpu_state.fdp & 0xffff);
writememl(easeg, cpu_state.eaaddr + 20, fpu_state.fds);
/* store i387 register file */
@@ -256,8 +265,6 @@ fx_save_stor_common(uint32_t fetchdat, int bits)
return cpu_state.abrt;
}
FP_ENTER();
old_eaaddr = cpu_state.eaaddr;
if (fxinst == 1) {
@@ -269,13 +276,19 @@ fx_save_stor_common(uint32_t fetchdat, int bits)
cpu_state.TOP = (fpus >> 11) & 7;
cpu_state.npxs &= fpus & ~0x3800;
x87_pc_off = readmeml(easeg, cpu_state.eaaddr + 8);
if (bits == 32)
x87_pc_off = readmeml(easeg, cpu_state.eaaddr + 8);
else
x87_pc_off = readmemw(easeg, cpu_state.eaaddr + 8);
x87_pc_seg = readmemw(easeg, cpu_state.eaaddr + 12);
ftwb = readmemb(easeg, cpu_state.eaaddr + 4);
x87_op = readmemw(easeg, cpu_state.eaaddr + 6) & 0x07ff;
x87_op_off = readmeml(easeg, cpu_state.eaaddr + 16);
x87_op_off |= (readmemw(easeg, cpu_state.eaaddr + 6) >> 12) << 16;
if (bits == 32)
x87_op_off = readmeml(easeg, cpu_state.eaaddr + 16);
else
x87_op_off = readmemw(easeg, cpu_state.eaaddr +16);
x87_op_seg = readmemw(easeg, cpu_state.eaaddr + 20);
for (i = 0; i <= 7; i++) {
@@ -320,7 +333,6 @@ fx_save_stor_common(uint32_t fetchdat, int bits)
}
}
// CLOCK_CYCLES((cr0 & 1) ? 34 : 44);
CLOCK_CYCLES(1);
} else {
/* FXSAVE */
@@ -345,11 +357,17 @@ fx_save_stor_common(uint32_t fetchdat, int bits)
writememw(easeg, cpu_state.eaaddr + 2, cpu_state.npxs);
writememb(easeg, cpu_state.eaaddr + 4, ftwb);
writememw(easeg, cpu_state.eaaddr + 6, (x87_op_off >> 16) << 12);
writememl(easeg, cpu_state.eaaddr + 8, x87_pc_off);
writememw(easeg, cpu_state.eaaddr + 6, x87_op);
if (bits == 32)
writememl(easeg, cpu_state.eaaddr + 8, x87_pc_off);
else
writememl(easeg, cpu_state.eaaddr + 8, x87_pc_off & 0xffff);
writememw(easeg, cpu_state.eaaddr + 12, x87_pc_seg);
writememl(easeg, cpu_state.eaaddr + 16, x87_op_off);
if (bits == 32)
writememl(easeg, cpu_state.eaaddr + 16, x87_op_off);
else
writememl(easeg, cpu_state.eaaddr + 16, x87_op_off & 0xffff);
writememw(easeg, cpu_state.eaaddr + 20, x87_op_seg);
if (cpu_state.ismmx) {

4
src/cpu/x86_ops_mmx.h
View File

@@ -22,12 +22,12 @@
}
#define MMX_ENTER() \
if (!cpu_has_feature(CPU_FEATURE_MMX)) { \
if (!cpu_has_feature(CPU_FEATURE_MMX) || (cr0 & 0x4)) { \
cpu_state.pc = cpu_state.oldpc; \
x86illegal(); \
return 1; \
} \
if (cr0 & 0xc) { \
if (cr0 & 0x8) { \
x86_int(7); \
return 1; \
} \

4
src/cpu/x86_ops_mov_ctrl.h
View File

@@ -201,8 +201,6 @@ opMOV_CRx_r_a16(uint32_t fetchdat)
cr0 = cpu_state.regs[cpu_rm].l;
if (cpu_16bitbus)
cr0 |= 0x10;
if (!(cr0 & 0x80000000))
mmu_perm = 4;
if (hascache && !(cr0 & (1 << 30)))
cpu_cache_int_enabled = 1;
else
@@ -267,8 +265,6 @@ opMOV_CRx_r_a32(uint32_t fetchdat)
cr0 = cpu_state.regs[cpu_rm].l;
if (cpu_16bitbus)
cr0 |= 0x10;
if (!(cr0 & 0x80000000))
mmu_perm = 4;
if (hascache && !(cr0 & (1 << 30)))
cpu_cache_int_enabled = 1;
else

4
src/cpu/x86_ops_mov_ctrl_2386.h
View File

@@ -193,8 +193,6 @@ opMOV_CRx_r_a16(uint32_t fetchdat)
cr0 = cpu_state.regs[cpu_rm].l;
if (cpu_16bitbus)
cr0 |= 0x10;
if (!(cr0 & 0x80000000))
mmu_perm = 4;
if (hascache && !(cr0 & (1 << 30)))
cpu_cache_int_enabled = 1;
else
@@ -255,8 +253,6 @@ opMOV_CRx_r_a32(uint32_t fetchdat)
cr0 = cpu_state.regs[cpu_rm].l;
if (cpu_16bitbus)
cr0 |= 0x10;
if (!(cr0 & 0x80000000))
mmu_perm = 4;
if (hascache && !(cr0 & (1 << 30)))
cpu_cache_int_enabled = 1;
else

68
src/device.c
View File

@@ -390,42 +390,18 @@ device_get_priv(const device_t *dev)
int
device_available(const device_t *dev)
{
if (dev != NULL) {
const device_config_t *config = dev->config;
if (config != NULL) {
while (config->type != CONFIG_END) {
if (config->type == CONFIG_BIOS) {
int roms_present = 0;
const device_config_bios_t *bios = (const device_config_bios_t *) config->bios;
/* Go through the ROM's in the device configuration. */
while ((bios != NULL) &&
(bios->name != NULL) &&
(bios->internal_name != NULL) &&
(bios->files_no != 0)) {
int i = 0;
for (uint8_t bf = 0; bf < bios->files_no; bf++)
i += !!rom_present(bios->files[bf]);
if (i == bios->files_no)
roms_present++;
bios++;
}
return (roms_present ? -1 : 0);
}
config++;
}
}
int ret = machine_device_available(dev);
if (ret == 0) {
/* No CONFIG_BIOS field present, use the classic available(). */
if (dev->available != NULL)
return (dev->available());
ret = (dev->available());
else
return 1;
}
ret = (dev != NULL);
} else
ret = (ret == -1);
/* A NULL device is never available. */
return 0;
return ret;
}
uint8_t
@@ -969,6 +945,36 @@ machine_get_config_string(char *str)
return ret;
}
int
machine_device_available(const device_t *dev)
{
if (dev != NULL) {
const device_config_t *config = dev->config;
if ((config != NULL) && (config->type == CONFIG_BIOS)) {
int roms_present = 0;
const device_config_bios_t *bios = (const device_config_bios_t *) config->bios;
/* Go through the ROM's in the device configuration. */
while ((bios != NULL) &&
(bios->name != NULL) &&
(bios->internal_name != NULL) &&
(bios->files_no != 0)) {
int i = 0;
for (uint8_t bf = 0; bf < bios->files_no; bf++)
i += !!rom_present(bios->files[bf]);
if (i == bios->files_no)
roms_present++;
bios++;
}
return (roms_present ? -1 : -2);
}
}
/* NULL device or no CONFIG_BIOS field, return 0. */
return 0;
}
const device_t *
device_context_get_device(void)
{

25
src/device/kbc_at.c
View File

@@ -509,9 +509,6 @@ kbc_scan_kbd_at(atkbc_t *dev)
}
}
static void
write_p2(atkbc_t *dev, uint8_t val);
static void
kbc_at_poll_at(atkbc_t *dev)
{
@@ -778,6 +775,7 @@ static void
write_p2(atkbc_t *dev, uint8_t val)
{
uint8_t old = dev->p2;
kbc_at_log("ATkbc: write P2: %02X (old: %02X)\n", val, dev->p2);
uint8_t kbc_ven = dev->flags & KBC_VEN_MASK;
@@ -851,6 +849,25 @@ write_p2(atkbc_t *dev, uint8_t val)
}
}
uint8_t
kbc_at_read_p(void *priv, uint8_t port, uint8_t mask)
{
atkbc_t *dev = (atkbc_t *) priv;
uint8_t *p = (port == 2) ? &dev->p2 : &dev->p1;
uint8_t ret = *p & mask;
return ret;
}
void
kbc_at_write_p(void *priv, uint8_t port, uint8_t mask, uint8_t val)
{
atkbc_t *dev = (atkbc_t *) priv;
uint8_t *p = (port == 2) ? &dev->p2 : &dev->p1;
*p = (*p & mask) | val;
}
static void
write_p2_fast_a20(atkbc_t *dev, uint8_t val)
{
@@ -2807,7 +2824,7 @@ const device_t keyboard_ps2_acer_pci_device = {
const device_t keyboard_ps2_phoenix_pci_device = {
.name = "PS/2 Keyboard (Phoenix)",
.internal_name = "keyboard_ps2_acer_pci",
.internal_name = "keyboard_ps2_phoenix_pci",
.flags = DEVICE_KBC | DEVICE_PCI,
.local = KBC_TYPE_PS2_1 | KBC_VEN_PHOENIX,
.init = kbc_at_init,

78
src/device/keyboard.c
View File

@@ -36,14 +36,6 @@ uint16_t scancode_map[768] = { 0 };
int keyboard_scan;
/* F8+F12 */
uint16_t key_prefix_1_1 = 0x042; /* F8 */
uint16_t key_prefix_1_2 = 0x000; /* Invalid */
uint16_t key_prefix_2_1 = 0x000; /* Invalid */
uint16_t key_prefix_2_2 = 0x000; /* Invalid */
uint16_t key_uncapture_1 = 0x058; /* F12 */
uint16_t key_uncapture_2 = 0x000; /* Invalid */
#ifdef ENABLE_KBC_AT_LOG
int kbc_at_do_log = ENABLE_KBC_AT_LOG;
@@ -72,10 +64,12 @@ static int keydelay[512];
#endif
static scancode *scan_table; /* scancode table for keyboard */
static uint8_t caps_lock = 0;
static uint8_t num_lock = 0;
static uint8_t scroll_lock = 0;
static uint8_t shift = 0;
static volatile uint8_t caps_lock = 0;
static volatile uint8_t num_lock = 0;
static volatile uint8_t scroll_lock = 0;
static volatile uint8_t kana_lock = 0;
static volatile uint8_t kbd_in_reset = 0;
static uint8_t shift = 0;
static int key5576mode = 0;
@@ -113,10 +107,12 @@ static scconvtbl scconv55_8a[18 + 1] =
void
keyboard_init(void)
{
num_lock = 0;
caps_lock = 0;
scroll_lock = 0;
shift = 0;
num_lock = 0;
caps_lock = 0;
scroll_lock = 0;
kana_lock = 0;
shift = 0;
kbd_in_reset = 0;
memset(recv_key, 0x00, sizeof(recv_key));
memset(recv_key_ui, 0x00, sizeof(recv_key));
@@ -244,6 +240,9 @@ key_process(uint16_t scan, int down)
void
keyboard_input(int down, uint16_t scan)
{
if (kbd_in_reset)
return;
/* Special case for E1 1D, translate it to 0100 - special case. */
if ((scan >> 8) == 0xe1) {
if ((scan & 0xff) == 0x1d)
@@ -318,13 +317,16 @@ keyboard_input(int down, uint16_t scan)
shift &= ~0x80;
break;
case 0x03a: /* Caps Lock */
caps_lock ^= 1;
if (!(machine_has_bus(machine, MACHINE_AT) > 0))
caps_lock ^= 1;
break;
case 0x045:
num_lock ^= 1;
if (!(machine_has_bus(machine, MACHINE_AT) > 0))
num_lock ^= 1;
break;
case 0x046:
scroll_lock ^= 1;
if (!(machine_has_bus(machine, MACHINE_AT) > 0))
scroll_lock ^= 1;
break;
default:
@@ -346,9 +348,9 @@ void
keyboard_all_up(void)
{
for (unsigned short i = 0; i < 0x200; i++) {
if (recv_key_ui[i]) {
if (recv_key_ui[i])
recv_key_ui[i] = 0;
}
if (recv_key[i]) {
recv_key[i] = 0;
key_process(i, 0);
@@ -356,6 +358,18 @@ keyboard_all_up(void)
}
}
void
keyboard_set_in_reset(uint8_t in_reset)
{
kbd_in_reset = in_reset;
}
uint8_t
keyboard_get_in_reset(void)
{
return kbd_in_reset;
}
static uint8_t
keyboard_do_break(uint16_t scan)
{
@@ -375,11 +389,12 @@ keyboard_do_break(uint16_t scan)
Caps Lock, Num Lock, and Scroll Lock when receving the "Set keyboard LEDs"
command. */
void
keyboard_update_states(uint8_t cl, uint8_t nl, uint8_t sl)
keyboard_update_states(uint8_t cl, uint8_t nl, uint8_t sl, uint8_t kl)
{
caps_lock = cl;
num_lock = nl;
scroll_lock = sl;
kana_lock = kl;
}
uint8_t
@@ -389,7 +404,7 @@ keyboard_get_shift(void)
}
void
keyboard_get_states(uint8_t *cl, uint8_t *nl, uint8_t *sl)
keyboard_get_states(uint8_t *cl, uint8_t *nl, uint8_t *sl, uint8_t *kl)
{
if (cl)
*cl = caps_lock;
@@ -397,6 +412,8 @@ keyboard_get_states(uint8_t *cl, uint8_t *nl, uint8_t *sl)
*nl = num_lock;
if (sl)
*sl = scroll_lock;
if (kl)
*kl = kana_lock;
}
/* Called by the UI to update the states of Caps Lock, Num Lock, and Scroll Lock. */
@@ -440,7 +457,7 @@ keyboard_set_states(uint8_t cl, uint8_t nl, uint8_t sl)
}
}
keyboard_update_states(cl, nl, sl);
keyboard_update_states(cl, nl, sl, kana_lock);
}
int
@@ -481,19 +498,6 @@ keyboard_isfsexit_up(void)
return (!recv_key_ui[0x01d] && !recv_key_ui[0x11d] && !recv_key_ui[0x038] && !recv_key_ui[0x138] && !recv_key_ui[0x051] && !recv_key_ui[0x151]);
}
/* Do we have the mouse uncapture combination in the keyboard buffer? */
int
keyboard_ismsexit(void)
{
if ((key_prefix_2_1 != 0x000) || (key_prefix_2_2 != 0x000))
return ((recv_key_ui[key_prefix_1_1] || recv_key_ui[key_prefix_1_2]) &&
(recv_key_ui[key_prefix_2_1] || recv_key_ui[key_prefix_2_2]) &&
(recv_key_ui[key_uncapture_1] || recv_key_ui[key_uncapture_2]));
else
return ((recv_key_ui[key_prefix_1_1] || recv_key_ui[key_prefix_1_2]) &&
(recv_key_ui[key_uncapture_1] || recv_key_ui[key_uncapture_2]));
}
/* This is so we can disambiguate scan codes that would otherwise conflict and get
passed on incorrectly. */
uint16_t

11
src/device/keyboard_at.c
View File

@@ -3276,7 +3276,7 @@ add_data_kbd(uint16_t val)
dev->ignore = 1;
keyboard_get_states(NULL, &num_lock, NULL);
keyboard_get_states(NULL, &num_lock, NULL, NULL);
shift_states = keyboard_get_shift() & STATE_SHIFT_MASK;
switch (val) {
@@ -3476,6 +3476,10 @@ keyboard_at_bat(void *priv)
keyboard_scan = 1;
keyboard_all_up();
keyboard_update_states(0, 0, 0, 0);
keyboard_set_in_reset(0);
kbc_at_dev_queue_add(dev, 0xaa, 0);
} else {
bat_counter--;
@@ -3510,6 +3514,7 @@ keyboard_at_write(void *priv)
switch (dev->command) {
case 0xed: /* Set/reset LEDs */
kbc_at_dev_queue_add(dev, 0xfa, 0);
keyboard_update_states(!!(val & 0x4), !!(val & 0x2), val & 0x1, !!(val & 0x8));
keyboard_at_log("%s: Set/reset LEDs [%02X]\n", dev->name, val);
break;
@@ -3712,6 +3717,7 @@ keyboard_at_write(void *priv)
break;
case 0xff: /* reset */
keyboard_set_in_reset(1);
kbc_at_dev_reset(dev, 1);
bat_counter = 1000;
break;
@@ -3767,6 +3773,7 @@ keyboard_at_init(const device_t *info)
keyboard_send = add_data_kbd;
SavedKbd = dev;
keyboard_update_states(0, 0, 0, 0);
inv_cmd_response = (dev->type & FLAG_PS2) ? 0xfe : 0xfa;
@@ -3785,6 +3792,8 @@ keyboard_at_close(void *priv)
/* Disable the scancode maps. */
keyboard_set_table(NULL);
keyboard_update_states(0, 0, 0, 0);
SavedKbd = NULL;
free(dev);

4
src/device/keyboard_xt.c
View File

@@ -742,7 +742,7 @@ kbd_adddata_process(uint16_t val, void (*adddata)(uint16_t val))
if (!adddata)
return;
keyboard_get_states(NULL, &num_lock, NULL);
keyboard_get_states(NULL, &num_lock, NULL, NULL);
shift_states = keyboard_get_shift() & STATE_LSHIFT;
if (is_amstrad)
@@ -1312,7 +1312,6 @@ const device_t keyboard_xt_t1x00_device = {
.config = NULL
};
#ifdef USE_LASERXT
const device_t keyboard_xt_lxt3_device = {
.name = "VTech Laser Turbo XT Keyboard",
.internal_name = "keyboard_xt_lxt",
@@ -1326,7 +1325,6 @@ const device_t keyboard_xt_lxt3_device = {
.force_redraw = NULL,
.config = NULL
};
#endif /* USE_LASERXT */
const device_t keyboard_xt_olivetti_device = {
.name = "Olivetti XT Keyboard",

27
src/device/mouse.c
View File

@@ -83,23 +83,24 @@ static const device_t mouse_internal_device = {
static mouse_t mouse_devices[] = {
// clang-format off
{ &mouse_none_device },
{ &mouse_internal_device },
{ &mouse_logibus_device },
{ &mouse_msinport_device },
{ &mouse_none_device },
{ &mouse_internal_device },
{ &mouse_logibus_device },
{ &mouse_msinport_device },
#ifdef USE_GENIBUS
{ &mouse_genibus_device },
{ &mouse_genibus_device },
#endif
{ &mouse_mssystems_device },
{ &mouse_msserial_device },
{ &mouse_ltserial_device },
{ &mouse_ps2_device },
{ &mouse_mssystems_device },
{ &mouse_mssystems_bus_device },
{ &mouse_msserial_device },
{ &mouse_ltserial_device },
{ &mouse_ps2_device },
#ifdef USE_WACOM
{ &mouse_wacom_device },
{ &mouse_wacom_artpad_device },
{ &mouse_wacom_device },
{ &mouse_wacom_artpad_device },
#endif
{ &mouse_mtouch_device },
{ NULL }
{ &mouse_mtouch_device },
{ NULL }
// clang-format on
};

112
src/device/mouse_serial.c
View File

@@ -146,7 +146,11 @@ sermouse_transmit_byte(mouse_t *dev, int do_next)
serial_write_fifo(dev->serial, dev->buf[dev->buf_pos]);
if (do_next) {
dev->buf_pos = (dev->buf_pos + 1) % dev->buf_len;
/* If we have a buffer length of 0, pretend the state is STATE_SKIP_PACKET. */
if (dev->buf_len == 0)
dev->buf_pos = 0;
else
dev->buf_pos = (dev->buf_pos + 1) % dev->buf_len;
if (dev->buf_pos != 0)
sermouse_set_period(dev, dev->transmit_period);
@@ -747,7 +751,7 @@ sermouse_timer(void *priv)
if (!dev->prompt && !dev->continuous)
sermouse_transmit_report(dev, (dev->state == STATE_TRANSMIT_REPORT));
else
dev->state = STATE_IDLE;
dev->state = STATE_IDLE;
break;
case STATE_TRANSMIT_REPORT:
case STATE_TRANSMIT:
@@ -829,10 +833,6 @@ sermouse_close(void *priv)
{
mouse_t *dev = (mouse_t *) priv;
/* Detach serial port from the mouse. */
if (dev && dev->serial && dev->serial->sd)
memset(dev->serial->sd, 0, sizeof(serial_device_t));
free(dev);
}
@@ -843,7 +843,15 @@ sermouse_init(const device_t *info)
mouse_t *dev;
void (*rcr_callback)(struct serial_s *serial, void *priv);
void (*dev_write)(struct serial_s *serial, void *priv, uint8_t data);
void (*transmit_period_callback)(struct serial_s *serial, void *priv, double transmit_period);
void (*transmit_period_callback)(struct serial_s *serial, void *priv,
double transmit_period);
if (info->local == MOUSE_TYPE_MSYSTEMSB) {
uintptr_t irqbase = ((device_get_config_int("irq") << 16) |
(device_get_config_hex16("addr") << 20)) |
ns16450_device.local;
device_add_params(&ns16450_device, (void*)irqbase);
}
dev = (mouse_t *) calloc(1, sizeof(mouse_t));
dev->name = info->name;
@@ -858,7 +866,7 @@ sermouse_init(const device_t *info)
if (dev->but > 2)
dev->flags |= FLAG_3BTN;
if (info->local == MOUSE_TYPE_MSYSTEMS) {
if (info->local == MOUSE_TYPE_MSYSTEMS || info->local == MOUSE_TYPE_MSYSTEMSB) {
dev->format = 0;
dev->type = info->local;
dev->id_len = 1;
@@ -889,7 +897,7 @@ sermouse_init(const device_t *info)
}
}
dev->port = device_get_config_int("port");
dev->port = (info->local == MOUSE_TYPE_MSYSTEMSB) ? (SERIAL_MAX - 1) : device_get_config_int("port");
/* Attach a serial port to the mouse. */
rcr_callback = dev->rts_toggle ? sermouse_callback : NULL;
@@ -964,6 +972,78 @@ static const device_config_t msssermouse_config[] = {
// clang-format on
};
static const device_config_t mssbusmouse_config[] = {
// clang-format off
{
.name = "addr",
.description = "Address",
.type = CONFIG_HEX16,
.default_string = NULL,
.default_int = 0x238,
.file_filter = NULL,
.spinner = { 0 },
.selection = {
{ .description = "0x338", .value = 0x338 },
{ .description = "0x238", .value = 0x238 },
{ .description = "0x3f8", .value = 0x3f8 },
{ .description = "0x2f8", .value = 0x2f8 },
{ .description = "" }
},
.bios = { { 0 } }
},
{
.name = "irq",
.description = "IRQ",
.type = CONFIG_SELECTION,
.default_string = NULL,
.default_int = 5,
.file_filter = NULL,
.spinner = { 0 },
.selection = {
{ .description = "IRQ 2", .value = 2 },
{ .description = "IRQ 3", .value = 3 },
{ .description = "IRQ 4", .value = 4 },
{ .description = "IRQ 5", .value = 5 },
{ .description = "IRQ 7", .value = 7 },
{ .description = "IRQ 10", .value = 10 },
{ .description = "IRQ 11", .value = 11 },
{ .description = "IRQ 12", .value = 12 },
{ .description = "IRQ 15", .value = 15 },
{ .description = "" }
},
.bios = { { 0 } }
},
{
.name = "buttons",
.description = "Buttons",
.type = CONFIG_SELECTION,
.default_string = NULL,
.default_int = 2,
.file_filter = NULL,
.spinner = { 0 },
.selection = {
{ .description = "Two", .value = 2 },
{ .description = "Three", .value = 3 },
{ .description = "" }
},
.bios = { { 0 } }
},
{
.name = "rts_toggle",
.description = "RTS toggle",
.type = CONFIG_BINARY,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = { 0 },
.selection = { { 0 } },
.bios = { { 0 } }
},
{ .name = "", .description = "", .type = CONFIG_END }
// clang-format on
};
static const device_config_t mssermouse_config[] = {
// clang-format off
{
@@ -1083,6 +1163,20 @@ const device_t mouse_mssystems_device = {
.config = msssermouse_config
};
const device_t mouse_mssystems_bus_device = {
.name = "Mouse Systems Bus Mouse",
.internal_name = "mssystems_bus",
.flags = DEVICE_ISA,
.local = MOUSE_TYPE_MSYSTEMSB,
.init = sermouse_init,
.close = sermouse_close,
.reset = NULL,
.available = NULL,
.speed_changed = sermouse_speed_changed,
.force_redraw = NULL,
.config = mssbusmouse_config
};
const device_t mouse_msserial_device = {
.name = "Microsoft Serial Mouse",
.internal_name = "msserial",

2
src/device/postcard.c
View File

@@ -158,6 +158,8 @@ postcard_init(UNUSED(const device_t *info))
postcard_port = 0x84; /* ISA Compaq machines */
else if (strstr(machines[machine].name, "Olivetti"))
postcard_port = 0x378; /* Olivetti machines */
else if (!strcmp(machines[machine].internal_name, "isa486c"))
postcard_port = 0x5080; /* ASUS ISA-486C */
else
postcard_port = 0x80; /* AT and clone machines */
postcard_log("POST card initializing on port %04Xh\n", postcard_port);

27
src/device/serial.c
View File

@@ -884,10 +884,10 @@ serial_close(void *priv)
{
serial_t *dev = (serial_t *) priv;
next_inst--;
if (com_ports[dev->inst].enabled)
if (dev->sd) {
memset(dev->sd, 0, sizeof(serial_device_t));
fifo_close(dev->rcvr_fifo);
}
free(dev);
}
@@ -897,7 +897,7 @@ serial_reset(void *priv)
{
serial_t *dev = (serial_t *) priv;
if (com_ports[dev->inst].enabled) {
if (dev->sd) {
timer_disable(&dev->transmit_timer);
timer_disable(&dev->timeout_timer);
timer_disable(&dev->receive_timer);
@@ -930,16 +930,26 @@ static void *
serial_init(const device_t *info)
{
serial_t *dev = (serial_t *) calloc(1, sizeof(serial_t));
int orig_inst = next_inst;
if (info->local & 0xFFF00000)
next_inst = SERIAL_MAX - 1;
dev->inst = next_inst;
if (com_ports[next_inst].enabled) {
if (com_ports[next_inst].enabled || (info->local & 0xFFF00000)) {
serial_log("Adding serial port %i...\n", next_inst);
dev->type = info->local;
memset(&(serial_devices[next_inst]), 0, sizeof(serial_device_t));
dev->sd = &(serial_devices[next_inst]);
dev->sd->serial = dev;
if (next_inst == 6)
if (info->local & 0xfff00000) {
dev->base_address = info->local >> 20;
dev->irq = (info->local >> 16) & 0xF;
io_sethandler(dev->base_address, 0x0008, serial_read, NULL, NULL, serial_write, NULL, NULL, dev);
next_inst = orig_inst;
} else if (next_inst == 6)
serial_setup(dev, COM7_ADDR, COM7_IRQ);
else if (next_inst == 5)
serial_setup(dev, COM6_ADDR, COM6_IRQ);
@@ -984,7 +994,8 @@ serial_init(const device_t *info)
serial_reset_port(dev);
}
next_inst++;
if (!(info->local & 0xfff00000))
next_inst++;
return dev;
}
@@ -998,7 +1009,7 @@ serial_set_next_inst(int ni)
void
serial_standalone_init(void)
{
while (next_inst < SERIAL_MAX)
while (next_inst < (SERIAL_MAX - 1))
device_add_inst(&ns8250_device, next_inst + 1);
};

2
src/device/serial_passthrough.c
View File

@@ -54,7 +54,7 @@ serial_passthrough_log(const char *fmt, ...)
void
serial_passthrough_init(void)
{
for (uint8_t c = 0; c < SERIAL_MAX; c++) {
for (uint8_t c = 0; c < (SERIAL_MAX - 1); c++) {
if (serial_passthrough_enabled[c]) {
/* Instance n for COM n */
device_add_inst(&serial_passthrough_device, c + 1);

1
src/disk/CMakeLists.txt
View File

@@ -31,6 +31,7 @@ add_library(hdd OBJECT
hdc_ide_opti611.c
hdc_ide_cmd640.c
hdc_ide_cmd646.c
hdc_ide_rz1000.c
hdc_ide_sff8038i.c
hdc_ide_um8673f.c
hdc_ide_w83769f.c

24
src/disk/hdc_esdi_at.c
View File

@@ -395,7 +395,7 @@ esdi_write(uint16_t port, uint8_t val, void *priv)
fatal("Write with ECC\n");
esdi->status = STAT_READY | STAT_DRQ | STAT_DSC;
esdi->pos = 0;
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 1);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 1);
break;
case CMD_VERIFY:
@@ -412,7 +412,7 @@ esdi_write(uint16_t port, uint8_t val, void *priv)
case CMD_FORMAT:
esdi->status = STAT_DRQ;
esdi->pos = 0;
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 1);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 1);
break;
case CMD_SET_PARAMETERS: /* Initialize Drive Parameters */
@@ -593,6 +593,7 @@ esdi_callback(void *priv)
esdi->reset = 0;
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
return;
}
@@ -650,7 +651,7 @@ read_error:
esdi->status = STAT_READY | STAT_ERR | STAT_DSC;
esdi->error = ERR_ABRT;
irq_raise(esdi);
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
break;
} else {
if (get_sector(esdi, &addr)) {
@@ -658,7 +659,7 @@ read_error:
write_error:
esdi->status = STAT_READY | STAT_DSC | STAT_ERR;
irq_raise(esdi);
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
break;
}
@@ -672,10 +673,10 @@ write_error:
esdi->status = STAT_DRQ | STAT_READY | STAT_DSC;
esdi->pos = 0;
next_sector(esdi);
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 1);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 1);
} else {
esdi->status = STAT_READY | STAT_DSC;
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
}
}
break;
@@ -718,7 +719,7 @@ verify_error:
break;
case CMD_FORMAT:
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
if (!drive->present) {
esdi->status = STAT_READY | STAT_ERR | STAT_DSC;
esdi->error = ERR_ABRT;
@@ -752,10 +753,12 @@ format_error:
esdi->status = STAT_READY | STAT_DSC;
irq_raise(esdi);
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
break;
case CMD_SET_PARAMETERS: /* Initialize Drive Parameters */
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
if (!drive->present) {
esdi->status = STAT_READY | STAT_ERR | STAT_DSC;
esdi->error = ERR_ABRT;
@@ -778,10 +781,12 @@ format_error:
esdi->error = ERR_ABRT;
irq_raise(esdi);
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
break;
case 0xe0:
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
if (!drive->present) {
esdi->status = STAT_READY | STAT_ERR | STAT_DSC;
esdi->error = ERR_ABRT;
@@ -825,6 +830,7 @@ format_error:
}
irq_raise(esdi);
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
break;
case CMD_READ_PARAMETERS:
@@ -869,6 +875,7 @@ format_error:
irq_raise(esdi);
}
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
break;
default:
@@ -880,6 +887,7 @@ format_error:
esdi->error = ERR_ABRT;
irq_raise(esdi);
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
break;
}
}
@@ -954,6 +962,7 @@ wd1007vse1_init(UNUSED(const device_t *info))
timer_add(&esdi->callback_timer, esdi_callback, esdi, 0);
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
return esdi;
}
@@ -973,6 +982,7 @@ wd1007vse1_close(void *priv)
free(esdi);
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
}
static int

9
src/disk/hdc_esdi_mca.c
View File

@@ -288,6 +288,7 @@ cmd_unsupported(esdi_t *dev)
dev->irq_in_progress = 1;
set_irq(dev);
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
}
static void
@@ -309,6 +310,7 @@ device_not_present(esdi_t *dev)
dev->irq_in_progress = 1;
set_irq(dev);
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
}
static void
@@ -330,6 +332,7 @@ rba_out_of_range(esdi_t *dev)
dev->irq_in_progress = 1;
set_irq(dev);
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
}
static void
@@ -351,6 +354,7 @@ defective_block(esdi_t *dev)
dev->irq_in_progress = 1;
set_irq(dev);
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
}
static void
@@ -368,6 +372,7 @@ complete_command_status(esdi_t *dev)
dev->status_data[5] = (dev->rba - 1) >> 8;
dev->status_data[6] = 0; /*Number of blocks requiring error recovery*/
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
}
#define ESDI_ADAPTER_ONLY() \
@@ -696,6 +701,7 @@ esdi_callback(void *priv)
dev->irq_in_progress = 1;
set_irq(dev);
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
break;
case CMD_GET_DEV_CONFIG:
@@ -744,6 +750,7 @@ esdi_callback(void *priv)
dev->irq_in_progress = 1;
set_irq(dev);
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
break;
case CMD_GET_POS_INFO:
@@ -764,6 +771,7 @@ esdi_callback(void *priv)
dev->irq_in_progress = 1;
set_irq(dev);
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
break;
case 0x10:
@@ -817,6 +825,7 @@ esdi_callback(void *priv)
dev->irq_in_progress = 1;
set_irq(dev);
ui_sb_update_icon(SB_HDD | HDD_BUS_ESDI, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_ESDI, 0);
break;
default:

11
src/disk/hdc_ide.c
View File

@@ -1827,7 +1827,7 @@ ide_writeb(uint16_t addr, uint8_t val, void *priv)
ide->blockcount = 0;
/* Turn on the activity indicator *here* so that it gets turned on
less times. */
ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus_type, 1);
ui_sb_update_icon_write(SB_HDD | hdd[ide->hdd_num].bus_type, 1);
fallthrough;
case WIN_WRITE:
@@ -2472,6 +2472,7 @@ ide_callback(void *priv)
else if (!ide->tf->lba && (ide->cfg_spt == 0))
err = IDNF_ERR;
else {
ui_sb_update_icon_write(SB_HDD | hdd[ide->hdd_num].bus_type, 1);
ret = hdd_image_write(ide->hdd_num, ide_get_sector(ide), 1, (uint8_t *) ide->buffer);
ide_irq_raise(ide);
ide->tf->secount--;
@@ -2479,10 +2480,8 @@ ide_callback(void *priv)
ide->tf->atastat = DRQ_STAT | DRDY_STAT | DSC_STAT;
ide->tf->pos = 0;
ide_next_sector(ide);
ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus_type, 1);
} else {
ide->tf->atastat = DRDY_STAT | DSC_STAT;
ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus_type, 0);
}
if (ret < 0)
err = UNC_ERR;
@@ -2514,6 +2513,7 @@ ide_callback(void *priv)
return;
} else if (ret & 1) {
/* DMA successful */
ui_sb_update_icon_write(SB_HDD | hdd[ide->hdd_num].bus_type, 1);
ret = hdd_image_write(ide->hdd_num, ide_get_sector(ide),
ide->sector_pos, ide->sector_buffer);
@@ -2524,7 +2524,6 @@ ide_callback(void *priv)
err = UNC_ERR;
ide_irq_raise(ide);
ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus_type, 0);
} else {
/* Bus master DMA error, abort the command. */
ide_log("IDE %i: DMA read aborted (failed)\n", ide->channel);
@@ -2562,7 +2561,7 @@ ide_callback(void *priv)
ide_next_sector(ide);
} else {
ide->tf->atastat = DRDY_STAT | DSC_STAT;
ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus_type, 0);
ui_sb_update_icon_write(SB_HDD | hdd[ide->hdd_num].bus_type, 0);
}
if (ret < 0)
err = UNC_ERR;
@@ -2596,7 +2595,7 @@ ide_callback(void *priv)
err = UNC_ERR;
ide_irq_raise(ide);
ui_sb_update_icon(SB_HDD | hdd[ide->hdd_num].bus_type, 1);
ui_sb_update_icon_write(SB_HDD | hdd[ide->hdd_num].bus_type, 1);
}
break;

321
src/disk/hdc_ide_rz1000.c Normal file
View File

@@ -0,0 +1,321 @@
/*
* 86Box A hypervisor and IBM PC system emulator that specializes in
* running old operating systems and software designed for IBM
* PC systems and compatibles from 1981 through fairly recent
* system designs based on the PCI bus.
*
* This file is part of the 86Box distribution.
*
* Implementation of the PC Technology RZ-1000 controller.
*
* Authors: Miran Grca, <mgrca8@gmail.com>
*
* Copyright 2025 Miran Grca.
*/
#include <stdarg.h>
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#define HAVE_STDARG_H
#include <86box/86box.h>
#include <86box/cdrom.h>
#include <86box/scsi_device.h>
#include <86box/scsi_cdrom.h>
#include <86box/dma.h>
#include <86box/io.h>
#include <86box/device.h>
#include <86box/keyboard.h>
#include <86box/mem.h>
#include <86box/pci.h>
#include <86box/pic.h>
#include <86box/timer.h>
#include <86box/hdc.h>
#include <86box/hdc_ide.h>
#include <86box/hdc_ide_sff8038i.h>
#include <86box/zip.h>
#include <86box/mo.h>
typedef struct rz1000_t {
uint8_t vlb_idx;
uint8_t id;
uint8_t in_cfg;
uint8_t channels;
uint8_t pci;
uint8_t irq_state;
uint8_t pci_slot;
uint8_t pad0;
uint8_t regs[256];
uint32_t local;
int irq_mode[2];
int irq_pin;
int irq_line;
} rz1000_t;
static int next_id = 0;
#ifdef ENABLE_RZ1000_LOG
int rz1000_do_log = ENABLE_RZ1000_LOG;
static void
rz1000_log(const char *fmt, ...)
{
va_list ap;
if (rz1000_do_log) {
va_start(ap, fmt);
pclog_ex(fmt, ap);
va_end(ap);
}
}
#else
# define rz1000_log(fmt, ...)
#endif
static void
rz1000_ide_handlers(rz1000_t *dev)
{
uint16_t main;
uint16_t side;
if (dev->channels & 0x01) {
ide_pri_disable();
main = 0x1f0;
side = 0x3f6;
ide_set_base(0, main);
ide_set_side(0, side);
if (dev->regs[0x04] & 0x01)
ide_pri_enable();
}
if (dev->channels & 0x02) {
ide_sec_disable();
main = 0x170;
side = 0x376;
ide_set_base(1, main);
ide_set_side(1, side);
if (dev->regs[0x04] & 0x01)
ide_sec_enable();
}
}
static void
rz1000_pci_write(int func, int addr, uint8_t val, void *priv)
{
rz1000_t *dev = (rz1000_t *) priv;
rz1000_log("rz1000_pci_write(%i, %02X, %02X)\n", func, addr, val);
if (func == 0x00)
switch (addr) {
case 0x04:
dev->regs[addr] = (val & 0x41);
rz1000_ide_handlers(dev);
break;
case 0x07:
dev->regs[addr] &= ~(val & 0x80);
break;
case 0x09:
if ((dev->regs[addr] & 0x0a) == 0x0a) {
dev->regs[addr] = (dev->regs[addr] & 0x0a) | (val & 0x05);
dev->irq_mode[0] = !!(val & 0x01);
dev->irq_mode[1] = !!(val & 0x04);
rz1000_ide_handlers(dev);
}
break;
case 0x10:
dev->regs[0x10] = (val & 0xf8) | 1;
rz1000_ide_handlers(dev);
break;
case 0x11:
dev->regs[0x11] = val;
rz1000_ide_handlers(dev);
break;
case 0x14:
dev->regs[0x14] = (val & 0xfc) | 1;
rz1000_ide_handlers(dev);
break;
case 0x15:
dev->regs[0x15] = val;
rz1000_ide_handlers(dev);
break;
case 0x18:
dev->regs[0x18] = (val & 0xf8) | 1;
rz1000_ide_handlers(dev);
break;
case 0x19:
dev->regs[0x19] = val;
rz1000_ide_handlers(dev);
break;
case 0x1c:
dev->regs[0x1c] = (val & 0xfc) | 1;
rz1000_ide_handlers(dev);
break;
case 0x1d:
dev->regs[0x1d] = val;
rz1000_ide_handlers(dev);
break;
case 0x40 ... 0x4f:
dev->regs[addr] = val;
break;
}
}
static uint8_t
rz1000_pci_read(int func, int addr, void *priv)
{
rz1000_t *dev = (rz1000_t *) priv;
uint8_t ret = 0xff;
if (func == 0x00)
ret = dev->regs[addr];
rz1000_log("rz1000_pci_read(%i, %02X, %02X)\n", func, addr, ret);
return ret;
}
static void
rz1000_reset(void *priv)
{
rz1000_t *dev = (rz1000_t *) priv;
int i = 0;
int min_channel;
int max_channel;
switch (dev->channels) {
default:
case 0x00:
min_channel = max_channel = 0;
break;
case 0x01:
min_channel = 0;
max_channel = 1;
break;
case 0x02:
min_channel = 2;
max_channel = 3;
break;
case 0x03:
min_channel = 0;
max_channel = 3;
break;
}
for (i = 0; i < CDROM_NUM; i++) {
if ((cdrom[i].bus_type == CDROM_BUS_ATAPI) && (cdrom[i].ide_channel >= min_channel) &&
(cdrom[i].ide_channel <= max_channel) && cdrom[i].priv)
scsi_cdrom_reset((scsi_common_t *) cdrom[i].priv);
}
for (i = 0; i < ZIP_NUM; i++) {
if ((zip_drives[i].bus_type == ZIP_BUS_ATAPI) && (zip_drives[i].ide_channel >= min_channel) &&
(zip_drives[i].ide_channel <= max_channel) && zip_drives[i].priv)
zip_reset((scsi_common_t *) zip_drives[i].priv);
}
for (i = 0; i < MO_NUM; i++) {
if ((mo_drives[i].bus_type == MO_BUS_ATAPI) && (mo_drives[i].ide_channel >= min_channel) &&
(mo_drives[i].ide_channel <= max_channel) && mo_drives[i].priv)
mo_reset((scsi_common_t *) mo_drives[i].priv);
}
memset(dev->regs, 0x00, sizeof(dev->regs));
rz1000_log("dev->local = %08X\n", dev->local);
dev->regs[0x00] = 0x42; /* PC Technology */
dev->regs[0x01] = 0x10;
dev->regs[0x02] = 0x00; /* RZ-1000 */
dev->regs[0x03] = 0x10;
dev->regs[0x04] = 0x01;
dev->regs[0x07] = 0x02; /* DEVSEL timing: 01 medium */
dev->regs[0x08] = 0x02; /* Revision 02 */
dev->regs[0x09] = dev->local; /* Programming interface */
dev->regs[0x0a] = 0x01; /* IDE controller */
dev->regs[0x0b] = 0x01; /* Mass storage controller */
dev->regs[0x3c] = 0x14; /* IRQ 14 */
dev->regs[0x3d] = 0x01; /* INTA */
dev->irq_mode[0] = dev->irq_mode[1] = 0;
dev->irq_pin = PCI_INTA;
dev->irq_line = 14;
rz1000_ide_handlers(dev);
}
static void
rz1000_close(void *priv)
{
rz1000_t *dev = (rz1000_t *) priv;
free(dev);
next_id = 0;
}
static void *
rz1000_init(const device_t *info)
{
rz1000_t *dev = (rz1000_t *) calloc(1, sizeof(rz1000_t));
dev->id = next_id | 0x60;
dev->pci = !!(info->flags & DEVICE_PCI);
dev->local = info->local;
dev->channels = ((info->local & 0x60000) >> 17) & 0x03;
device_add(&ide_pci_2ch_device);
if (info->local & 0x80000)
pci_add_card(PCI_ADD_NORMAL, rz1000_pci_read, rz1000_pci_write, dev, &dev->pci_slot);
else
pci_add_card(PCI_ADD_IDE, rz1000_pci_read, rz1000_pci_write, dev, &dev->pci_slot);
if (dev->channels & 0x01)
ide_board_set_force_ata3(0, 1);
if (dev->channels & 0x02)
ide_board_set_force_ata3(1, 1);
next_id++;
rz1000_reset(dev);
return dev;
}
const device_t ide_rz1000_pci_device = {
.name = "PC Technology RZ-1000 PCI",
.internal_name = "ide_rz1000_pci",
.flags = DEVICE_PCI,
.local = 0x6000a,
.init = rz1000_init,
.close = rz1000_close,
.reset = rz1000_reset,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};
const device_t ide_rz1000_pci_single_channel_device = {
.name = "PC Technology RZ-1000 PCI",
.internal_name = "ide_rz1000_pci_single_channel",
.flags = DEVICE_PCI,
.local = 0x2000a,
.init = rz1000_init,
.close = rz1000_close,
.reset = rz1000_reset,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = NULL
};

9
src/disk/hdc_st506_at.c
View File

@@ -557,6 +557,7 @@ do_callback(void *priv)
mfm->reset = 0;
ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_MFM, 0);
return;
}
@@ -627,9 +628,9 @@ write_error:
mfm->status |= STAT_DRQ;
mfm->pos = 0;
next_sector(mfm);
ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 1);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_MFM, 1);
} else
ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_MFM, 0);
break;
case CMD_VERIFY:
@@ -657,7 +658,7 @@ write_error:
mfm->status = STAT_READY | STAT_DSC;
irq_raise(mfm);
ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 1);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_MFM, 1);
break;
case CMD_DIAGNOSE:
@@ -772,6 +773,7 @@ mfm_init(UNUSED(const device_t *info))
timer_add(&mfm->callback_timer, do_callback, mfm, 0);
ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_MFM, 0);
return mfm;
}
@@ -790,6 +792,7 @@ mfm_close(void *priv)
free(mfm);
ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_MFM, 0);
}
const device_t st506_at_wd1003_device = {

18
src/disk/hdc_st506_xt.c
View File

@@ -580,14 +580,14 @@ st506_callback(void *priv)
(void) get_chs(dev, drive);
st506_xt_log("ST506: FORMAT_DRIVE(%i) interleave=%i\n",
dev->drive_sel, dev->command[4]);
ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 1);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_MFM, 1);
timer_advance_u64(&dev->timer, ST506_TIME);
dev->state = STATE_SEND_DATA;
break;
case STATE_SEND_DATA: /* wrong, but works */
if (!get_sector(dev, drive, &addr)) {
ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_MFM, 0);
st506_error(dev, dev->error);
st506_complete(dev);
return;
@@ -604,7 +604,7 @@ st506_callback(void *priv)
break;
case STATE_SENT_DATA:
ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_MFM, 0);
st506_complete(dev);
break;
@@ -663,14 +663,14 @@ st506_callback(void *priv)
st506_xt_log("ST506: FORMAT_%sTRACK(%i, %i/%i)\n",
(dev->command[0] == CMD_FORMAT_BAD_TRACK) ? "BAD_" : "",
dev->drive_sel, dev->cylinder, dev->head);
ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 1);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_MFM, 1);
timer_advance_u64(&dev->timer, ST506_TIME);
dev->state = STATE_SEND_DATA;
break;
case STATE_SEND_DATA: /* wrong, but works */
if (!get_sector(dev, drive, &addr)) {
ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_MFM, 0);
st506_error(dev, dev->error);
st506_complete(dev);
return;
@@ -686,7 +686,7 @@ st506_callback(void *priv)
break;
case STATE_SENT_DATA:
ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_MFM, 0);
st506_complete(dev);
break;
@@ -828,7 +828,7 @@ read_error_sent:
return;
}
ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 1);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_MFM, 1);
/* Set up the data transfer. */
dev->buff_pos = 0;
@@ -865,7 +865,7 @@ read_error_sent:
case STATE_RECEIVED_DATA:
if (!get_sector(dev, drive, &addr)) {
write_error:
ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_MFM, 0);
st506_error(dev, dev->error);
st506_complete(dev);
return;
@@ -879,7 +879,7 @@ write_error:
}
if (--dev->count == 0) {
ui_sb_update_icon(SB_HDD | HDD_BUS_MFM, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_MFM, 0);
st506_complete(dev);
break;
}

70
src/disk/hdc_xta.c
View File

@@ -385,7 +385,7 @@ do_format(hdc_t *dev, drive_t *drive, dcb_t *dcb)
dev->sector = 0;
/* Activate the status icon. */
ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 1);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_XTA, 1);
do_fmt:
/*
@@ -426,7 +426,7 @@ do_fmt:
}
/* De-activate the status icon. */
ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_XTA, 0);
}
/* Execute the DCB we just received. */
@@ -631,7 +631,7 @@ read_error:
case STATE_RECV:
/* Activate the status icon. */
ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 1);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_XTA, 1);
do_recv:
/* Ready to transfer the data in. */
dev->state = STATE_RDATA;
@@ -680,7 +680,7 @@ do_recv:
if (get_sector(dev, drive, &addr)) {
write_error:
/* De-activate the status icon. */
ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_XTA, 0);
dev->comp |= COMP_ERR;
set_intr(dev);
@@ -697,7 +697,7 @@ write_error:
dev->buf_idx = 0;
if (--dev->count == 0) {
/* De-activate the status icon. */
ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_XTA, 0);
set_intr(dev);
return;
@@ -1106,6 +1106,36 @@ xta_close(void *priv)
static const device_config_t wdxt150_config[] = {
// clang-format off
{
.name = "bios_rev",
.description = "BIOS Revision",
.type = CONFIG_BIOS,
.default_string = "rev_1",
.default_int = 0,
.file_filter = NULL,
.spinner = { 0 },
.bios = {
{
.name = "Revision 1.0",
.internal_name = "rev_1",
.bios_type = BIOS_NORMAL,
.files_no = 1,
.local = 0,
.size = 8192,
.files = { WD_REV_1_BIOS_FILE, "" }
},
{
.name = "Revision 2.0",
.internal_name = "rev_2",
.bios_type = BIOS_NORMAL,
.files_no = 1,
.local = 0,
.size = 8192,
.files = { WD_REV_2_BIOS_FILE, "" }
},
{ .files_no = 0 }
},
},
{
.name = "base",
.description = "Address",
@@ -1151,36 +1181,6 @@ static const device_config_t wdxt150_config[] = {
},
.bios = { { 0 } }
},
{
.name = "bios_rev",
.description = "BIOS Revision",
.type = CONFIG_BIOS,
.default_string = "rev_1",
.default_int = 0,
.file_filter = NULL,
.spinner = { 0 },
.bios = {
{
.name = "Revision 1.0",
.internal_name = "rev_1",
.bios_type = BIOS_NORMAL,
.files_no = 1,
.local = 0,
.size = 8192,
.files = { WD_REV_1_BIOS_FILE, "" }
},
{
.name = "Revision 2.0",
.internal_name = "rev_2",
.bios_type = BIOS_NORMAL,
.files_no = 1,
.local = 0,
.size = 8192,
.files = { WD_REV_2_BIOS_FILE, "" }
},
{ .files_no = 0 }
},
},
{ .name = "", .description = "", .type = CONFIG_END }
// clang-format off
};

62
src/disk/hdc_xtide.c
View File

@@ -252,6 +252,37 @@ xtide_at_close(void *priv)
// clang-format off
static const device_config_t xtide_config[] = {
{
.name = "bios",
.description = "BIOS Revision",
.type = CONFIG_BIOS,
.default_string = "xt",
.default_int = 0,
.file_filter = NULL,
.spinner = { 0 },
.selection = { { 0 } },
.bios = {
{
.name = "Regular XT",
.internal_name = "xt",
.bios_type = BIOS_NORMAL,
.files_no = 1,
.local = 0,
.size = 8192,
.files = { ROM_PATH_XT, "" }
},
{
.name = "XT+ (V20/V30/8018x)",
.internal_name = "xt_plus",
.bios_type = BIOS_NORMAL,
.files_no = 1,
.local = 0,
.size = 8192,
.files = { ROM_PATH_XTP, "" }
},
{ .files_no = 0 }
},
},
{
.name = "base",
.description = "Address",
@@ -348,37 +379,6 @@ static const device_config_t xtide_config[] = {
},
.bios = { { 0 } }
},
{
.name = "bios",
.description = "BIOS Revision",
.type = CONFIG_BIOS,
.default_string = "xt",
.default_int = 0,
.file_filter = NULL,
.spinner = { 0 },
.selection = { { 0 } },
.bios = {
{
.name = "Regular XT",
.internal_name = "xt",
.bios_type = BIOS_NORMAL,
.files_no = 1,
.local = 0,
.size = 8192,
.files = { ROM_PATH_XT, "" }
},
{
.name = "XT+ (V20/V30/8018x)",
.internal_name = "xt_plus",
.bios_type = BIOS_NORMAL,
.files_no = 1,
.local = 0,
.size = 8192,
.files = { ROM_PATH_XTP, "" }
},
{ .files_no = 0 }
},
},
{ .name = "", .description = "", .type = CONFIG_END }
};

6
src/disk/mo.c
View File

@@ -628,6 +628,7 @@ mo_cmd_error(mo_t *dev)
dev->callback = 50.0 * MO_TIME;
mo_set_callback(dev);
ui_sb_update_icon(SB_MO | dev->id, 0);
ui_sb_update_icon_write(SB_MO | dev->id, 0);
mo_log(dev->log, "[%02X] ERROR: %02X/%02X/%02X\n", dev->current_cdb[0], mo_sense_key,
mo_asc, mo_ascq);
}
@@ -644,6 +645,7 @@ mo_unit_attention(mo_t *dev)
dev->callback = 50.0 * MO_TIME;
mo_set_callback(dev);
ui_sb_update_icon(SB_MO | dev->id, 0);
ui_sb_update_icon_write(SB_MO | dev->id, 0);
mo_log(dev->log, "UNIT ATTENTION\n");
}
@@ -1462,7 +1464,7 @@ mo_command(scsi_common_t *sc, const uint8_t *cdb)
mo_data_command_finish(dev, dev->packet_len, dev->drv->sector_size,
dev->packet_len, 1);
ui_sb_update_icon(SB_MO | dev->id,
ui_sb_update_icon_write(SB_MO | dev->id,
dev->packet_status != PHASE_COMPLETE);
} else {
mo_set_phase(dev, SCSI_PHASE_STATUS);
@@ -1501,7 +1503,7 @@ mo_command(scsi_common_t *sc, const uint8_t *cdb)
dev->drv->sector_size,
alloc_length, 1);
ui_sb_update_icon(SB_MO | dev->id,
ui_sb_update_icon_write(SB_MO | dev->id,
dev->packet_status != PHASE_COMPLETE);
} else {
mo_set_phase(dev, SCSI_PHASE_STATUS);

6
src/disk/zip.c
View File

@@ -709,6 +709,7 @@ zip_cmd_error(zip_t *dev)
dev->callback = 50.0 * ZIP_TIME;
zip_set_callback(dev);
ui_sb_update_icon(SB_ZIP | dev->id, 0);
ui_sb_update_icon_write(SB_ZIP | dev->id, 0);
zip_log(dev->log, "[%02X] ERROR: %02X/%02X/%02X\n", dev->current_cdb[0], zip_sense_key,
zip_asc, zip_ascq);
}
@@ -725,6 +726,7 @@ zip_unit_attention(zip_t *dev)
dev->callback = 50.0 * ZIP_TIME;
zip_set_callback(dev);
ui_sb_update_icon(SB_ZIP | dev->id, 0);
ui_sb_update_icon_write(SB_ZIP | dev->id, 0);
zip_log(dev->log, "UNIT ATTENTION\n", dev->id);
}
@@ -1485,7 +1487,7 @@ zip_command(scsi_common_t *sc, const uint8_t *cdb)
zip_data_command_finish(dev, dev->packet_len, 512,
dev->packet_len, 1);
ui_sb_update_icon(SB_ZIP | dev->id,
ui_sb_update_icon_write(SB_ZIP | dev->id,
dev->packet_status != PHASE_COMPLETE);
} else {
zip_set_phase(dev, SCSI_PHASE_STATUS);
@@ -1526,7 +1528,7 @@ zip_command(scsi_common_t *sc, const uint8_t *cdb)
zip_data_command_finish(dev, 512, 512,
alloc_length, 1);
ui_sb_update_icon(SB_ZIP | dev->id,
ui_sb_update_icon_write(SB_ZIP | dev->id,
dev->packet_status != PHASE_COMPLETE);
} else {
zip_set_phase(dev, SCSI_PHASE_STATUS);

55
src/floppy/fdc.c
View File

@@ -81,6 +81,7 @@ int fdc_current[FDC_MAX] = { 0, 0 };
volatile int fdcinited = 0;
// #define ENABLE_FDC_LOG 1
#ifdef ENABLE_FDC_LOG
int fdc_do_log = ENABLE_FDC_LOG;
@@ -278,6 +279,15 @@ fdc_is_mfm(fdc_t *fdc)
return fdc->mfm ? 1 : 0;
}
int
fdc_is_dma(fdc_t *fdc)
{
if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma)
return 0;
else
return 1;
}
void
fdc_request_next_sector_id(fdc_t *fdc)
{
@@ -395,6 +405,20 @@ fdc_update_rwc(fdc_t *fdc, int drive, int rwc)
fdc_rate(fdc, drive);
}
uint8_t
fdc_get_media_id(fdc_t *fdc, int id)
{
uint8_t ret = fdc->media_id & (1 << id);
return ret;
}
void
fdc_set_media_id(fdc_t *fdc, int id, int set)
{
fdc->media_id = (fdc->media_id & ~(1 << id)) | (set << id);
}
int
fdc_get_boot_drive(fdc_t *fdc)
{
@@ -615,7 +639,10 @@ fdc_io_command_phase1(fdc_t *fdc, int out)
}
}
ui_sb_update_icon(SB_FLOPPY | real_drive(fdc, fdc->drive), 1);
if (fdc->processed_cmd == 0x05 || fdc->processed_cmd == 0x09)
ui_sb_update_icon_write(SB_FLOPPY | real_drive(fdc, fdc->drive), 1);
else
ui_sb_update_icon(SB_FLOPPY | real_drive(fdc, fdc->drive), 1);
fdc->stat = out ? 0x10 : 0x50;
if ((fdc->flags & FDC_FLAG_PCJR) || !fdc->dma) {
fdc->stat |= 0x20;
@@ -671,8 +698,10 @@ fdc_soft_reset(fdc_t *fdc)
fdc->perp &= 0xfc;
for (int i = 0; i < FDD_NUM; i++)
ui_sb_update_icon(SB_FLOPPY | i, 0);
for (int i = 0; i < FDD_NUM; i++) {
ui_sb_update_icon(SB_FLOPPY | i, 0);
ui_sb_update_icon_write(SB_FLOPPY | i, 0);
}
fdc_ctrl_reset(fdc);
}
@@ -706,6 +735,7 @@ fdc_write(uint16_t addr, uint8_t val, void *priv)
timer_set_delay_u64(&fdc->timer, 8 * TIMER_USEC);
fdc->interrupt = -1;
ui_sb_update_icon(SB_FLOPPY | 0, 0);
ui_sb_update_icon_write(SB_FLOPPY | 0, 0);
fdc_ctrl_reset(fdc);
}
if (!fdd_get_flags(0))
@@ -1363,7 +1393,7 @@ fdc_read(uint16_t addr, void *priv)
} else if (!fdc->enh_mode)
ret = 0x20;
else
ret = fdc->rwc[drive] << 4;
ret = (fdc->rwc[drive] << 4) | (fdc->media_id << 6);
break;
case 4: /*Status*/
ret = fdc->stat;
@@ -1502,6 +1532,7 @@ fdc_poll_common_finish(fdc_t *fdc, int compare, int st5)
fdc->res[10] = fdc->params[4];
fdc_log("Read/write finish (%02X %02X %02X %02X %02X %02X %02X)\n", fdc->res[4], fdc->res[5], fdc->res[6], fdc->res[7], fdc->res[8], fdc->res[9], fdc->res[10]);
ui_sb_update_icon(SB_FLOPPY | real_drive(fdc, fdc->drive), 0);
ui_sb_update_icon_write(SB_FLOPPY | real_drive(fdc, fdc->drive), 0);
fdc->paramstogo = 7;
dma_set_drq(fdc->dma_ch, 0);
}
@@ -1545,8 +1576,10 @@ fdc_callback(void *priv)
case -5: /*Reset in power down mode */
fdc->perp &= 0xfc;
for (uint8_t i = 0; i < FDD_NUM; i++)
for (uint8_t i = 0; i < FDD_NUM; i++) {
ui_sb_update_icon(SB_FLOPPY | i, 0);
ui_sb_update_icon_write(SB_FLOPPY | i, 0);
}
fdc_ctrl_reset(fdc);
@@ -1694,7 +1727,10 @@ fdc_callback(void *priv)
fdc->sector++;
else if (fdc->params[5] == 0)
fdc->sector++;
ui_sb_update_icon(SB_FLOPPY | real_drive(fdc, fdc->drive), 1);
if (fdc->interrupt == 0x05 || fdc->interrupt == 0x09)
ui_sb_update_icon_write(SB_FLOPPY | real_drive(fdc, fdc->drive), 1);
else
ui_sb_update_icon(SB_FLOPPY | real_drive(fdc, fdc->drive), 1);
switch (fdc->interrupt) {
case 5:
case 9:
@@ -1885,6 +1921,7 @@ fdc_error(fdc_t *fdc, int st5, int st6)
break;
}
ui_sb_update_icon(SB_FLOPPY | real_drive(fdc, fdc->drive), 0);
ui_sb_update_icon_write(SB_FLOPPY | real_drive(fdc, fdc->drive), 0);
fdc->paramstogo = 7;
}
@@ -2333,10 +2370,14 @@ fdc_reset(void *priv)
current_drive = 0;
for (uint8_t i = 0; i < FDD_NUM; i++)
for (uint8_t i = 0; i < FDD_NUM; i++) {
ui_sb_update_icon(SB_FLOPPY | i, 0);
ui_sb_update_icon_write(SB_FLOPPY | i, 0);
}
fdc->power_down = 0;
fdc->media_id = 0;
}
static void

18
src/floppy/fdd_86f.c
View File

@@ -2414,16 +2414,28 @@ d86f_turbo_poll(int drive, int side)
case STATE_0C_READ_DATA:
case STATE_11_SCAN_DATA:
case STATE_16_VERIFY_DATA:
d86f_turbo_read(drive, side);
if (fdc_is_dma(d86f_fdc))
for (int i = 0; i < (128 << dev->last_sector.id.n); i++)
d86f_turbo_read(drive, side);
else
d86f_turbo_read(drive, side);
break;
case STATE_05_WRITE_DATA:
case STATE_09_WRITE_DATA:
d86f_turbo_write(drive, side);
if (fdc_is_dma(d86f_fdc))
for (int i = 0; i < (128 << dev->last_sector.id.n); i++)
d86f_turbo_write(drive, side);
else
d86f_turbo_write(drive, side);
break;
case STATE_0D_FORMAT_TRACK:
d86f_turbo_format(drive, side, (side && (d86f_get_sides(drive) != 2)));
if (fdc_is_dma(d86f_fdc))
while (dev->state == STATE_0D_FORMAT_TRACK)
d86f_turbo_format(drive, side, (side && (d86f_get_sides(drive) != 2)));
else
d86f_turbo_format(drive, side, (side && (d86f_get_sides(drive) != 2)));
return;
case STATE_IDLE:

19
src/game/joystick_standard.c
View File

@@ -62,13 +62,18 @@ joystick_standard_read(UNUSED(void *priv))
{
uint8_t ret = 0xf0;
for (int js = 0; js < 2; js++) {
if (JOYSTICK_PRESENT(0, js)) {
if (joystick_state[0][js].button[0])
ret &= ~0x10;
if (joystick_state[0][js].button[1])
ret &= ~0x20;
}
if (JOYSTICK_PRESENT(0, 0)) {
if (joystick_state[0][0].button[0])
ret &= ~0x10;
if (joystick_state[0][0].button[1])
ret &= ~0x20;
}
if (JOYSTICK_PRESENT(0, 1)) {
if (joystick_state[0][1].button[0])
ret &= ~0x40;
if (joystick_state[0][1].button[1])
ret &= ~0x80;
}
return ret;

30
src/include/86box/86box.h
View File

@@ -27,7 +27,7 @@
/* Configuration values. */
#define GFXCARD_MAX 2
#define SERIAL_MAX 7
#define SERIAL_MAX 8
#define PARALLEL_MAX 4
#define SCREEN_RES_X 640
#define SCREEN_RES_Y 480
@@ -44,8 +44,8 @@
/* Max UUID Length */
#define MAX_UUID_LEN 64
/* Default language 0xFFFF = from system, 0x409 = en-US */
#define DEFAULT_LANGUAGE 0xffff
/* Default language code */
#define DEFAULT_LANGUAGE "system"
#define POSTCARDS_NUM 4
#define POSTCARD_MASK (POSTCARDS_NUM - 1)
@@ -84,8 +84,6 @@ extern "C" {
#endif
/* Global variables. */
extern uint32_t lang_sys; /* (-) system language code */
extern int dump_on_exit; /* (O) dump regs on exit*/
extern int start_in_fullscreen; /* (O) start in fullscreen */
#ifdef _WIN32
@@ -117,13 +115,12 @@ extern int window_remember;
extern int vid_resize; /* (C) allow resizing */
extern int invert_display; /* (C) invert the display */
extern int suppress_overscan; /* (C) suppress overscans */
extern uint32_t lang_id; /* (C) language code identifier */
extern int lang_id; /* (C) language id */
extern int scale; /* (C) screen scale factor */
extern int dpi_scale; /* (C) DPI scaling of the emulated screen */
extern int vid_api; /* (C) video renderer */
extern int vid_cga_contrast; /* (C) video */
extern int video_fullscreen; /* (C) video */
extern int video_fullscreen_first; /* (C) video */
extern int video_fullscreen_scale; /* (C) video */
extern int enable_overscan; /* (C) video */
extern int force_43; /* (C) video */
@@ -174,14 +171,6 @@ extern int pit_mode; /* (C) force setting PIT mode */
extern int fm_driver; /* (C) select FM sound driver */
extern int hook_enabled; /* (C) Keyboard hook is enabled */
/* Keyboard variables for future key combination redefinition. */
extern uint16_t key_prefix_1_1;
extern uint16_t key_prefix_1_2;
extern uint16_t key_prefix_2_1;
extern uint16_t key_prefix_2_2;
extern uint16_t key_uncapture_1;
extern uint16_t key_uncapture_2;
extern char exe_path[2048]; /* path (dir) of executable */
extern char usr_path[1024]; /* path (dir) of user data */
extern char cfg_path[1024]; /* full path of config file */
@@ -246,6 +235,17 @@ extern int framecountx;
extern volatile int cpu_thread_run;
extern uint8_t postcard_codes[POSTCARDS_NUM];
// Accelerator key structure, defines, helper functions
struct accelKey {
char name[64];
char desc[64];
char seq[64];
};
#define NUM_ACCELS 8
extern struct accelKey acc_keys[NUM_ACCELS];
extern struct accelKey def_acc_keys[NUM_ACCELS];
extern int FindAccelerator(const char *name);
#ifdef __cplusplus
}
#endif

2
src/include/86box/cdrom.h
View File

@@ -425,6 +425,8 @@ extern uint8_t cdrom_mitsumi_audio_play(cdrom_t *dev, uint32_t pos, uint
#endif
extern uint8_t cdrom_read_disc_info_toc(cdrom_t *dev, uint8_t *b,
const uint8_t track, const int type);
extern int cdrom_is_track_audio(cdrom_t *dev, const int sector, const int ismsf,
int cdrom_sector_type, const uint8_t vendor_type);
extern int cdrom_readsector_raw(cdrom_t *dev, uint8_t *buffer, const int sector, const int ismsf,
int cdrom_sector_type, const int cdrom_sector_flags,
int *len, const uint8_t vendor_type);

3
src/include/86box/chipset.h
View File

@@ -37,6 +37,9 @@ extern const device_t ali6117d_device;
/* AMD */
extern const device_t amd640_device;
/* ASUS */
extern const device_t isa486c_device;
/* Compaq */
extern const device_t compaq_386_device;
extern const device_t compaq_genoa_device;

2
src/include/86box/device.h
View File

@@ -239,6 +239,8 @@ extern const char *device_get_internal_name(const device_t *dev);
extern int machine_get_config_int(char *str);
extern const char *machine_get_config_string(char *str);
extern int machine_device_available(const device_t *dev);
extern const device_t device_none;
extern const device_t device_internal;

6
src/include/86box/fdc.h
View File

@@ -119,6 +119,8 @@ typedef struct fdc_t {
uint8_t lock;
uint8_t dsr;
uint8_t media_id;
uint8_t params[15];
uint8_t specify[2];
uint8_t res[11];
@@ -166,6 +168,9 @@ extern void fdc_3f1_enable(fdc_t *fdc, int enable);
extern int fdc_get_bit_rate(fdc_t *fdc);
extern int fdc_get_bitcell_period(fdc_t *fdc);
extern uint8_t fdc_get_media_id(fdc_t *fdc, int id);
extern void fdc_set_media_id(fdc_t *fdc, int id, int set);
/* A few functions to communicate between Super I/O chips and the FDC. */
extern void fdc_update_enh_mode(fdc_t *fdc, int enh_mode);
extern int fdc_get_rwc(fdc_t *fdc, int drive);
@@ -201,6 +206,7 @@ extern int fdc_get_drive(fdc_t *fdc);
extern int fdc_get_perp(fdc_t *fdc);
extern int fdc_get_format_n(fdc_t *fdc);
extern int fdc_is_mfm(fdc_t *fdc);
extern int fdc_is_dma(fdc_t *fdc);
extern double fdc_get_hut(fdc_t *fdc);
extern double fdc_get_hlt(fdc_t *fdc);
extern void fdc_request_next_sector_id(fdc_t *fdc);

6
src/include/86box/hdc.h
View File

@@ -60,6 +60,8 @@ extern const device_t ide_pci_device; /* pci_ide */
extern const device_t ide_pci_sec_device; /* pci_ide sec */
extern const device_t ide_pci_2ch_device; /* pci_ide_2ch */
extern const device_t ide_pci_ter_qua_2ch_device; /* pci_ide_ter_qua_2ch */
extern const device_t ide_ali1489_device; /* ALi M1489 */
extern const device_t ide_ali5213_device; /* ALi M5213 */
@@ -76,10 +78,14 @@ extern const device_t ide_cmd640_pci_single_channel_sec_device; /* CMD PCI-640B
extern const device_t ide_cmd646_device; /* CMD PCI-646 */
extern const device_t ide_cmd646_legacy_only_device; /* CMD PCI-646 (Legacy Mode Only) */
extern const device_t ide_cmd646_single_channel_device; /* CMD PCI-646 (Only primary channel) */
extern const device_t ide_cmd646_ter_qua_device; /* CMD PCI-646 (Tertiary and quaternary channels) */
extern const device_t ide_opti611_vlb_device; /* OPTi 82c611/611A VLB */
extern const device_t ide_opti611_vlb_sec_device; /* OPTi 82c611/611A VLB (Secondary channel) */
extern const device_t ide_rz1000_pci_device; /* PC Technology RZ-1000 PCI */
extern const device_t ide_rz1000_pci_single_channel_device; /* PC Technology RZ-1000 PCI (Only primary channel) */
extern const device_t ide_um8673f_device; /* UMC UM8673F */
extern const device_t ide_um8886af_device; /* UMC UM8886AF */

10
src/include/86box/keyboard.h
View File

@@ -224,9 +224,7 @@ extern const device_t keyboard_xt86_device;
extern const device_t keyboard_xt_compaq_device;
extern const device_t keyboard_xt_t1x00_device;
extern const device_t keyboard_tandy_device;
# ifdef USE_LASERXT
extern const device_t keyboard_xt_lxt3_device;
# endif /* USE_LASERXT */
extern const device_t keyboard_xt_olivetti_device;
extern const device_t keyboard_xt_zenith_device;
extern const device_t keyboard_xt_hyundai_device;
@@ -273,9 +271,11 @@ extern void keyboard_process(void);
extern uint16_t keyboard_convert(int ch);
extern void keyboard_input(int down, uint16_t scan);
extern void keyboard_all_up(void);
extern void keyboard_update_states(uint8_t cl, uint8_t nl, uint8_t sl);
extern void keyboard_update_states(uint8_t cl, uint8_t nl, uint8_t sl, uint8_t kl);
extern uint8_t keyboard_get_shift(void);
extern void keyboard_get_states(uint8_t *cl, uint8_t *nl, uint8_t *sl);
extern void keyboard_set_in_reset(uint8_t in_reset);
extern uint8_t keyboard_get_in_reset(void);
extern void keyboard_get_states(uint8_t *cl, uint8_t *nl, uint8_t *sl, uint8_t *kl);
extern void keyboard_set_states(uint8_t cl, uint8_t nl, uint8_t sl);
extern int keyboard_recv(uint16_t key);
extern int keyboard_recv_ui(uint16_t key);
@@ -283,9 +283,9 @@ extern int keyboard_isfsenter(void);
extern int keyboard_isfsenter_up(void);
extern int keyboard_isfsexit(void);
extern int keyboard_isfsexit_up(void);
extern int keyboard_ismsexit(void);
extern void keyboard_set_is_amstrad(int ams);
extern void kbc_at_set_ps2(void *priv, uint8_t ps2);
extern uint8_t kbc_at_read_p(void *priv, uint8_t port, uint8_t mask);
extern void kbc_at_write_p(void *priv, uint8_t port, uint8_t mask, uint8_t val);
extern void kbc_at_set_fast_reset(uint8_t new_fast_reset);

15
src/include/86box/machine.h
View File

@@ -101,7 +101,7 @@
#define MACHINE_GAMEPORT 0x00008000 /* sys has int game port */
#define MACHINE_SOUND 0x00010000 /* sys has int sound */
#define MACHINE_NIC 0x00020000 /* sys has int NIC */
#define MACHINE_MODEM 0x00040000 /* sys has int modem */
#define MACHINE_AX 0x00040000 /* sys adheres to Japanese AX standard */
/* Feature flags for advanced devices. */
#define MACHINE_APM 0x00080000 /* sys has APM */
#define MACHINE_ACPI 0x00100000 /* sys has ACPI */
@@ -508,11 +508,13 @@ extern int machine_at_pc916sx_init(const machine_t *);
sure this appear here (and in the .c file) in the order and position
in which they appear in the machine table. */
extern int machine_at_dataexpert386wb_init(const machine_t *);
extern int machine_at_isa486c_init(const machine_t *);
extern int machine_at_genoa486_init(const machine_t *);
extern int machine_at_ga486l_init(const machine_t *);
extern int machine_at_cougar_init(const machine_t *);
extern int machine_at_acc386_init(const machine_t *);
extern int machine_at_asus386_3364k_init(const machine_t *);
extern int machine_at_asus386_init(const machine_t *);
extern int machine_at_ecs386_init(const machine_t *);
extern int machine_at_spc6000a_init(const machine_t *);
@@ -571,6 +573,7 @@ extern int machine_at_r418_init(const machine_t *);
extern int machine_at_ls486e_init(const machine_t *);
extern int machine_at_4dps_init(const machine_t *);
extern int machine_at_ms4144_init(const machine_t *);
extern int machine_at_acerp3_init(const machine_t *);
extern int machine_at_4saw2_init(const machine_t *);
extern int machine_at_m4li_init(const machine_t *);
extern int machine_at_alfredo_init(const machine_t *);
@@ -781,6 +784,7 @@ extern int machine_at_ax59pro_init(const machine_t *);
extern int machine_at_mvp3_init(const machine_t *);
extern int machine_at_ficva503a_init(const machine_t *);
extern int machine_at_5emapro_init(const machine_t *);
extern int machine_at_delhi3_init(const machine_t *);
extern int machine_at_5sg100_init(const machine_t *);
@@ -805,6 +809,7 @@ extern int machine_at_p65up5_cp6nd_init(const machine_t *);
/* m_at_slot1.c */
extern int machine_at_m729_init(const machine_t *);
extern int machine_at_acerv62x_init(const machine_t *);
extern int machine_at_p65up5_cpknd_init(const machine_t *);
extern int machine_at_kn97_init(const machine_t *);
@@ -968,10 +973,14 @@ extern int machine_xt_compaq_deskpro_init(const machine_t *);
extern int machine_xt_compaq_portable_init(const machine_t *);
/* m_xt_laserxt.c */
#ifdef USE_LASERXT
extern int machine_xt_laserxt_init(const machine_t *);
#ifdef EMU_DEVICE_H
extern const device_t laserxt_device;
#endif
extern int machine_xt_lxt3_init(const machine_t *);
#endif /* USE_LASERXT */
#ifdef EMU_DEVICE_H
extern const device_t lxt3_device;
#endif
/* m_xt_philips.c */
extern int machine_xt_p3105_init(const machine_t *);

2
src/include/86box/machine_status.h
View File

@@ -4,10 +4,12 @@
typedef struct dev_status_empty_active_t {
atomic_bool_t empty;
atomic_bool_t active;
atomic_bool_t write_active;
} dev_status_empty_active_t;
typedef struct dev_status_active_t {
atomic_bool_t active;
atomic_bool_t write_active;
} dev_status_active_t;
typedef struct dev_status_empty_t {

1
src/include/86box/mem.h
View File

@@ -300,7 +300,6 @@ extern int writelnum;
extern int memspeed[11];
extern int mmu_perm;
extern uint8_t high_page; /* if a high (> 4 gb) page was detected */
extern uint8_t *_mem_exec[MEM_MAPPINGS_NO];

2
src/include/86box/mouse.h
View File

@@ -41,6 +41,7 @@
#define MOUSE_TYPE_PS2 11 /* PS/2 series Bus Mouse */
#define MOUSE_TYPE_WACOM 12 /* WACOM tablet */
#define MOUSE_TYPE_WACOMARTP 13 /* WACOM tablet (ArtPad) */
#define MOUSE_TYPE_MSYSTEMSB 14 /* Mouse Systems bus mouse */
#define MOUSE_TYPE_ONBOARD 0x80 /* Mouse is an on-board version of one of the above. */
@@ -68,6 +69,7 @@ extern const device_t mouse_msinport_device;
extern const device_t mouse_genibus_device;
# endif
extern const device_t mouse_mssystems_device;
extern const device_t mouse_mssystems_bus_device;
extern const device_t mouse_msserial_device;
extern const device_t mouse_ltserial_device;
extern const device_t mouse_ps2_device;

8
src/include/86box/plat.h
View File

@@ -32,8 +32,8 @@
/* String ID numbers. */
enum {
STRING_MOUSE_CAPTURE, /* "Click to capture mouse" */
STRING_MOUSE_RELEASE, /* "Press F8+F12 to release mouse" */
STRING_MOUSE_RELEASE_MMB, /* "Press F8+F12 or middle button to release mouse" */
STRING_MOUSE_RELEASE, /* "Press %1 to release mouse" */
STRING_MOUSE_RELEASE_MMB, /* "Press %1 or middle button to release mouse" */
STRING_INVALID_CONFIG, /* "Invalid configuration" */
STRING_NO_ST506_ESDI_CDROM, /* "MFM/RLL or ESDI CD-ROM drives never existed" */
STRING_NET_ERROR, /* "Failed to initialize network driver" */
@@ -160,8 +160,8 @@ extern int plat_vidapi(const char *name);
extern char *plat_vidapi_name(int api);
extern void plat_resize(int x, int y, int monitor_index);
extern void plat_resize_request(int x, int y, int monitor_index);
extern uint32_t plat_language_code(char *langcode);
extern void plat_language_code_r(uint32_t lcid, char *outbuf, int len);
extern int plat_language_code(char *langcode);
extern void plat_language_code_r(int id, char *outbuf, int len);
extern void plat_get_cpu_string(char *outbuf, uint8_t len);
extern void plat_set_thread_name(void *thread, const char *name);
extern void plat_break(void);

2
src/include/86box/serial_passthrough.h
View File

@@ -55,7 +55,7 @@ typedef struct serial_passthrough_s {
void *backend_priv; /* Private platform backend data */
} serial_passthrough_t;
extern bool serial_passthrough_enabled[SERIAL_MAX];
extern bool serial_passthrough_enabled[SERIAL_MAX - 1];
extern const device_t serial_passthrough_device;
extern void serial_passthrough_init(void);

24
src/include/86box/sio.h
View File

@@ -48,14 +48,22 @@ extern const device_t fdc37c669_370_device;
extern const device_t fdc37c67x_device;
extern const device_t fdc37c931apm_device;
extern const device_t fdc37c931apm_compaq_device;
extern const device_t fdc37c932fr_device;
extern const device_t fdc37c932qf_device;
extern const device_t fdc37c932_device;
extern const device_t fdc37c935_device;
extern const device_t fdc37c935_370_device;
extern const device_t fdc37c935_no_nvr_device;
#define FDC37C93X_NORMAL 0x0002
#define FDC37C93X_FR 0x0003
#define FDC37C93X_APM 0x0030
#define FDC37C93X_CHIP_ID 0x00ff
#define FDC37C931 0x0100 /* Compaq KBC firmware and configuration registers on GPIO ports. */
#define FDC37C932 0x0200 /* AMI '5' Megakey KBC firmware. */
#define FDC37C933 0x0300 /* IBM KBC firmware. */
#define FDC37C935 0x0500 /* Phoenix Multikey/42 1.38 KBC firmware. */
#define FDC37C937 0x0700 /* Phoenix Multikey/42i 4.16 KBC firmware. */
#define FDC37C93X_KBC 0x0f00
#define FDC37C93X_NO_NVR 0x1000
#define FDC37C93X_370 0x2000
extern const device_t fdc37c93x_device;
extern const device_t fdc37m60x_device;
extern const device_t fdc37m60x_370_device;

1
src/include/86box/ui.h
View File

@@ -65,6 +65,7 @@ extern void ui_sb_update_panes(void);
extern void ui_sb_update_text(void);
extern void ui_sb_update_tip(int meaning);
extern void ui_sb_update_icon(int tag, int active);
extern void ui_sb_update_icon_write(int tag, int write);
extern void ui_sb_update_icon_state(int tag, int state);
extern void ui_sb_set_text_w(wchar_t *wstr);
extern void ui_sb_set_text(char *str);

17
src/include/86box/vid_8514a.h
View File

@@ -90,6 +90,7 @@ typedef struct ibm8514_t {
uint16_t subsys_cntl;
uint16_t setup_md;
uint16_t advfunc_cntl;
uint16_t advfunc_cntl_old;
uint16_t cur_y;
uint16_t cur_x;
int16_t destx;
@@ -107,8 +108,10 @@ typedef struct ibm8514_t {
uint16_t wrt_mask;
uint16_t rd_mask;
uint16_t color_cmp;
uint16_t bkgd_mix;
uint16_t frgd_mix;
uint8_t bkgd_mix;
uint8_t frgd_mix;
uint8_t bkgd_sel;
uint8_t frgd_sel;
uint16_t multifunc_cntl;
uint16_t multifunc[16];
uint16_t clip_right;
@@ -159,6 +162,14 @@ typedef struct ibm8514_t {
int ydir;
int linedraw;
uint32_t ge_offset;
uint32_t src_ge_offset;
uint32_t dst_ge_offset;
uint16_t src_pitch;
uint16_t dst_pitch;
int64_t cur_x_24bpp;
int64_t cur_y_24bpp;
int64_t dest_x_24bpp;
int64_t dest_y_24bpp;
} accel;
uint16_t test;
@@ -240,6 +251,8 @@ typedef struct ibm8514_t {
uint32_t vram_amount;
int vram_512k_8514;
int vendor_mode;
int _8514on;
int _8514crt;
PALETTE _8514pal;
latch8514_t latch;

14
src/include/86box/vid_ati_mach8.h
View File

@@ -77,8 +77,9 @@ typedef struct mach_t {
uint8_t overscan_g_col_24;
uint8_t overscan_r_col_24;
uint16_t fifo_test_data[17];
int port_len;
int crt_resolution;
uint8_t old_on1;
uint8_t old_on2;
int crt_resolution;
struct {
uint8_t line_idx;
@@ -99,12 +100,13 @@ typedef struct mach_t {
uint16_t src_x_end;
uint16_t src_x_start;
uint16_t src_x;
uint16_t r_src_x;
uint16_t src_y;
int16_t bres_count;
uint16_t clock_sel;
uint16_t crt_pitch;
uint16_t ge_pitch;
uint16_t src_pitch;
uint16_t dst_pitch;
uint16_t dest_cmp_fn;
uint16_t dp_config;
uint16_t ext_ge_config;
@@ -158,14 +160,18 @@ typedef struct mach_t {
int src_stepx;
uint8_t mono_pattern_normal[16];
uint8_t color_pattern[32];
uint16_t color_pattern_hicol[8];
int mono_pattern[8][8];
uint32_t ge_offset;
uint32_t src_ge_offset;
uint32_t dst_ge_offset;
uint32_t crt_offset;
uint32_t patt_len_reg;
int poly_fill;
uint16_t dst_clr_cmp_mask;
int clip_overrun;
int color_pattern_idx;
int64_t src_x_scan;
int64_t src_y_scan;
} accel;
atomic_int force_busy;

6
src/include/86box/vid_svga.h
View File

@@ -171,11 +171,11 @@ typedef struct svga_t {
latch_t latch;
pc_timer_t timer;
pc_timer_t timer8514;
pc_timer_t timer_8514;
pc_timer_t timer_xga;
double clock;
double clock8514;
double clock_8514;
double clock_xga;
double multiplier;
@@ -315,6 +315,8 @@ typedef struct svga_t {
card should not attempt to display anything. */
void (*render_override)(void *priv);
void * priv_parent;
void * local;
} svga_t;
extern void ibm8514_set_poll(svga_t *svga);

2
src/include/86box/video.h
View File

@@ -189,7 +189,6 @@ extern uint32_t pal_lookup[256];
#endif
extern int video_fullscreen;
extern int video_fullscreen_scale;
extern int video_fullscreen_first;
extern uint8_t fontdat[2048][8];
extern uint8_t fontdatm[2048][16];
extern uint8_t fontdat2[2048][8];
@@ -488,6 +487,7 @@ extern const device_t s3_metheus_86c928_isa_device;
extern const device_t s3_metheus_86c928_vlb_device;
extern const device_t s3_spea_mercury_lite_86c928_pci_device;
extern const device_t s3_spea_mirage_86c801_isa_device;
extern const device_t s3_winner1000_805_isa_device;
extern const device_t s3_86c805_onboard_vlb_device;
extern const device_t s3_spea_mirage_86c805_vlb_device;
extern const device_t s3_mirocrystal_8s_805_vlb_device;

6
src/machine/CMakeLists.txt
View File

@@ -20,6 +20,7 @@ add_library(mch OBJECT
machine_table.c
m_xt.c
m_xt_compaq.c
m_xt_laserxt.c
m_xt_philips.c
m_xt_t1000.c
m_xt_t1000_vid.c
@@ -64,11 +65,6 @@ if(DESKPRO386)
target_compile_definitions(mch PRIVATE USE_DESKPRO386)
endif()
if(LASERXT)
target_sources(mch PRIVATE m_xt_laserxt.c)
target_compile_definitions(mch PRIVATE USE_LASERXT)
endif()
if(OLIVETTI)
target_compile_definitions(mch PRIVATE USE_OLIVETTI)
endif()

83
src/machine/m_at_386dx_486.c
View File

@@ -72,6 +72,27 @@ machine_at_acc386_init(const machine_t *model)
return ret;
}
int
machine_at_asus386_3364k_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/asus386_3364k/am27c512dip28-64b53c26be3d8160533563.bin",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&rabbit_device);
device_add(&keyboard_at_ami_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
int
machine_at_asus386_init(const machine_t *model)
{
@@ -700,6 +721,8 @@ static const device_config_t pb450_config[] = {
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/pb450/OPTI802.bin", "" } },
{ .name = "PNP 1.1A", .internal_name = "pnp11a", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/pb450/PNP11A.bin", "" } },
{ .name = "P4HS20 (Micro Firmware/Phoenix 4.05)", .internal_name = "p4hs20", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/pb450/p4hs20.bin", "" } },
{ .files_no = 0 }
},
},
@@ -1182,6 +1205,39 @@ machine_at_ms4144_init(const machine_t *model)
return ret;
}
int
machine_at_acerp3_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/acerp3/Acer Mate 600 P3 BIOS U13 V2.0R02-J3 ACR8DE00-S00-950911-R02-J3.bin",
0x000e0000, 131072, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
machine_at_sis_85c496_common_init(model);
device_add(&sis_85c496_device);
pci_register_slot(0x09, PCI_CARD_VIDEO, 0, 0, 0, 0);
pci_register_slot(0x0A, PCI_CARD_IDE, 0, 0, 0, 0);
pci_register_slot(0x12, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x13, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x14, PCI_CARD_NORMAL, 1, 2, 3, 4);
device_add(&fdc37c665_ide_device);
device_add(&keyboard_ps2_acer_pci_device);
device_add(&ide_cmd640_pci_legacy_only_device);
if (gfxcard[0] == VID_INTERNAL)
device_add(&gd5434_onboard_pci_device);
device_add(&intel_flash_bxt_device);
return ret;
}
int
machine_at_486sp3c_init(const machine_t *model)
{
@@ -2283,7 +2339,8 @@ machine_at_tg486g_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
machine_at_common_init_ex(model, 2);
device_add(&amstrad_megapc_nvr_device);
device_add(&sis_85c471_device);
device_add(&ide_isa_device);
device_add(&fdc37c651_ide_device);
@@ -2409,6 +2466,30 @@ machine_at_dataexpert386wb_init(const machine_t *model)
return ret;
}
int
machine_at_isa486c_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/isa486c/asus-isa-486c-401a0-040591-657e2c17a0218417632602.bin",
0x000f0000, 65536, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init(model);
device_add(&isa486c_device);
device_add(&port_92_key_device);
device_add(&keyboard_at_ami_device);
if (fdc_current[0] == FDC_INTERNAL)
device_add(&fdc_at_device);
return ret;
}
int
machine_at_genoa486_init(const machine_t *model)
{

34
src/machine/m_at_slot1.c
View File

@@ -40,6 +40,36 @@
#include <86box/clock.h>
#include <86box/snd_ac97.h>
int
machine_at_acerv62x_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/acerv62x/v62xc0s1.bin",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 5, 0, 0, 4);
pci_register_slot(0x12, PCI_CARD_NORMAL, 4, 1, 2, 3);
pci_register_slot(0x10, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x0F, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x0D, PCI_CARD_NORMAL, 2, 3, 4, 1);
device_add(&i440fx_device);
device_add(&piix3_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C935 | FDC37C93X_APM));
device_add(&sst_flash_29ee020_device);
spd_register(SPD_TYPE_SDRAM, 0x7, 128);
return ret;
}
int
machine_at_p65up5_cpknd_init(const machine_t *model)
{
@@ -131,7 +161,7 @@ machine_at_spitfire_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
machine_at_common_init(model);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
@@ -143,7 +173,7 @@ machine_at_spitfire_init(const machine_t *model)
pci_register_slot(0x01, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&i440lx_device);
device_add(&piix4e_device);
device_add(&fdc37c935_no_nvr_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C935 | FDC37C93X_NORMAL | FDC37C93X_NO_NVR));
device_add(&intel_flash_bxt_device);
spd_register(SPD_TYPE_SDRAM, 0xF, 256);
device_add(&lm78_device); /* no reporting in BIOS */

4
src/machine/m_at_socket370.c
View File

@@ -561,11 +561,11 @@ machine_at_7sbb_init(const machine_t *model)
pci_register_slot(0x0F, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x10, PCI_CARD_NORMAL, 2, 3, 4, 1);
pci_register_slot(0x11, PCI_CARD_NORMAL, 3, 4, 1, 2);
pci_register_slot(0x02, PCI_CARD_AGPBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x02, PCI_CARD_AGPBRIDGE, 1, 2, 3, 4);
device_add(&sis_5600_device);
device_add(&keyboard_ps2_ami_pci_device);
device_add(&it8661f_device);
device_add(&sst_flash_29ee020_device); /* assumed */
return ret;
}
}

23
src/machine/m_at_socket4.c
View File

@@ -58,7 +58,8 @@ machine_at_premiere_common_init(const machine_t *model, int pci_switch)
pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
device_add(&keyboard_ps2_phoenix_device);
device_add(&sio_zb_device);
device_add(&fdc37c665_device);
device_add(&ide_rz1000_pci_single_channel_device);
device_add(&fdc37c665_ide_sec_device);
device_add(&intel_flash_bxt_ami_device);
}
@@ -218,7 +219,22 @@ machine_at_ambradp60_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_premiere_common_init(model, 0);
machine_at_common_init_ex(model, 2);
device_add(&amstrad_megapc_nvr_device);
device_add(&ide_pci_device);
pci_init(PCI_CONFIG_TYPE_2);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x01, PCI_CARD_IDE, 0, 0, 0, 0);
pci_register_slot(0x06, PCI_CARD_NORMAL, 3, 2, 1, 4);
pci_register_slot(0x0E, PCI_CARD_NORMAL, 2, 1, 3, 4);
pci_register_slot(0x0C, PCI_CARD_NORMAL, 1, 3, 2, 4);
pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
device_add(&keyboard_ps2_phoenix_device);
device_add(&sio_zb_device);
device_add(&fdc37c665_ide_pri_device);
device_add(&intel_flash_bxt_ami_device);
device_add(&i430lx_device);
@@ -238,7 +254,7 @@ machine_at_valuepointp60_init(const machine_t *model)
return ret;
machine_at_common_init(model);
device_add(&ide_pci_2ch_device);
device_add(&ide_pci_device);
pci_init(PCI_CONFIG_TYPE_2 | PCI_NO_IRQ_STEERING);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
@@ -250,6 +266,7 @@ machine_at_valuepointp60_init(const machine_t *model)
pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
device_add(&keyboard_ps2_ps1_pci_device);
device_add(&sio_device);
device_add(&ide_rz1000_pci_single_channel_device);
device_add(&fdc37c665_device);
device_add(&intel_flash_bxt_ami_device);

16
src/machine/m_at_socket5.c
View File

@@ -110,19 +110,19 @@ machine_at_p54np4_init(const machine_t *model)
return ret;
machine_at_common_init(model);
device_add(&ide_vlb_2ch_device);
pci_init(PCI_CONFIG_TYPE_2 | PCI_NO_IRQ_STEERING);
pci_init(PCI_CONFIG_TYPE_2 | PCI_CAN_SWITCH_TYPE);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x03, PCI_CARD_NORMAL, 1, 2, 3, 4); /* 03 = Slot 1 */
pci_register_slot(0x04, PCI_CARD_NORMAL, 2, 3, 4, 1); /* 04 = Slot 2 */
pci_register_slot(0x05, PCI_CARD_NORMAL, 3, 4, 1, 2); /* 05 = Slot 3 */
pci_register_slot(0x06, PCI_CARD_NORMAL, 4, 1, 2, 3); /* 06 = Slot 4 */
pci_register_slot(0x07, PCI_CARD_SCSI, 1, 2, 3, 4); /* 07 = SCSI */
pci_register_slot(0x06, PCI_CARD_NORMAL, 1, 2, 3, 4); /* 06 = Slot 1 */
pci_register_slot(0x05, PCI_CARD_NORMAL, 2, 3, 4, 1); /* 05 = Slot 2 */
pci_register_slot(0x04, PCI_CARD_NORMAL, 3, 4, 1, 2); /* 04 = Slot 3 */
pci_register_slot(0x03, PCI_CARD_NORMAL, 4, 1, 2, 3); /* 03 = Slot 4 */
pci_register_slot(0x02, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
device_add(&i430nx_device);
device_add(&sio_zb_device);
device_add(&keyboard_ps2_ami_pci_device);
device_add(&fdc37c665_ide_pri_device);
device_add(&ncr53c810_onboard_pci_device);
device_add(&intel_flash_bxt_device);
return ret;
@@ -169,8 +169,8 @@ machine_at_tek932_init(const machine_t *model)
device_add(&keyboard_ps2_intel_ami_pci_device);
device_add(&i430nx_device);
device_add(&sio_zb_device);
device_add(&fdc37c665_ide_device);
device_add(&ide_vlb_device);
device_add(&fdc37c665_ide_pri_device);
device_add(&intel_flash_bxt_ami_device);
return ret;

23
src/machine/m_at_socket7.c
View File

@@ -69,7 +69,8 @@ machine_at_acerv35n_init(const machine_t *model)
pci_register_slot(0x0D, PCI_CARD_NORMAL, 1, 2, 3, 4);
device_add(&i430hx_device);
device_add(&piix3_device);
device_add(&fdc37c932fr_device);
/* The chip is not marked FR but the BIOS accesses register 06h of GPIO. */
device_add_params(&fdc37c93x_device, (void *) (FDC37C935 | FDC37C93X_FR));
device_add(&sst_flash_29ee010_device);
return ret;
@@ -160,7 +161,7 @@ machine_at_m7shi_init(const machine_t *model)
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
device_add(&i430hx_device);
device_add(&piix3_device);
device_add(&fdc37c935_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C935 | FDC37C93X_NORMAL));
device_add(&intel_flash_bxt_device);
return ret;
@@ -568,7 +569,7 @@ machine_at_presario2240_init(const machine_t *model)
device_add(&i430vx_device);
device_add(&piix3_device);
device_add(&fdc37c932qf_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C932 | FDC37C93X_NORMAL));
device_add(&sst_flash_29ee020_device);
return ret;
@@ -598,7 +599,7 @@ machine_at_presario4500_init(const machine_t *model)
device_add(&i430vx_device);
device_add(&piix3_device);
device_add(&fdc37c931apm_compaq_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C931 | FDC37C93X_APM));
device_add(&sst_flash_29ee020_device);
return ret;
@@ -631,7 +632,7 @@ machine_at_dellhannibalp_init(const machine_t *model)
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 4);
device_add(&i430vx_device);
device_add(&piix3_device);
device_add(&fdc37c932fr_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C932 | FDC37C93X_FR));
device_add(&intel_flash_bxt_ami_device);
return ret;
@@ -659,7 +660,7 @@ machine_at_p55va_init(const machine_t *model)
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 0, 0, 0, 0);
device_add(&i430vx_device);
device_add(&piix3_device);
device_add(&fdc37c932fr_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C932 | FDC37C93X_FR));
device_add(&intel_flash_bxt_device);
return ret;
@@ -687,7 +688,7 @@ machine_at_brio80xx_init(const machine_t *model)
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
device_add(&i430vx_device);
device_add(&piix3_device);
device_add(&fdc37c935_370_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C935 | FDC37C93X_NORMAL | FDC37C93X_370));
device_add(&sst_flash_29ee020_device);
return ret;
@@ -756,7 +757,7 @@ machine_at_pb810_init(const machine_t *model)
device_add(&i430vx_device);
device_add(&piix3_device);
device_add(&fdc37c935_370_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C935 | FDC37C93X_NORMAL | FDC37C93X_370));
device_add(&intel_flash_bxt_device);
return ret;
@@ -851,7 +852,7 @@ machine_at_gw2kte_init(const machine_t *model)
device_add(&i430vx_device);
device_add(&piix3_device);
device_add(&fdc37c932fr_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C932 | FDC37C93X_FR));
device_add(&intel_flash_bxt_ami_device);
return ret;
@@ -1553,7 +1554,7 @@ machine_at_thunderbolt_init(const machine_t *model)
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
machine_at_common_init(model);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
@@ -1564,7 +1565,7 @@ machine_at_thunderbolt_init(const machine_t *model)
pci_register_slot(0x14, PCI_CARD_NORMAL, 3, 0, 1, 2);
device_add(&i430tx_device);
device_add(&piix4_device);
device_add(&fdc37c935_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C935 | FDC37C93X_NORMAL | FDC37C93X_NO_NVR));
device_add(&intel_flash_bxt_device);
spd_register(SPD_TYPE_SDRAM, 0x3, 128);

59
src/machine/m_at_socket7_3v.c
View File

@@ -455,7 +455,7 @@ machine_at_pb640_init(const machine_t *model)
device_add(&piix_rev02_device);
if (gfxcard[0] == VID_INTERNAL)
device_add(&gd5440_onboard_pci_device);
device_add(machine_get_vid_device(machine));
device_add(&keyboard_ps2_intel_ami_pci_device);
device_add(&pc87306_device);
@@ -546,7 +546,7 @@ machine_at_acerm3a_init(const machine_t *model)
pci_register_slot(0x10, PCI_CARD_VIDEO, 4, 0, 0, 0);
device_add(&i430hx_device);
device_add(&piix3_device);
device_add(&fdc37c935_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C935 | FDC37C93X_NORMAL));
device_add(&sst_flash_29ee010_device);
@@ -700,7 +700,7 @@ machine_at_gw2kma_init(const machine_t *model)
device_add(&i430vx_device);
device_add(&piix3_device);
device_add(&fdc37c932fr_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C932 | FDC37C93X_FR));
device_add(&intel_flash_bxt_ami_device);
return ret;
@@ -819,19 +819,64 @@ machine_at_vectra54_init(const machine_t *model)
device_add(&i430fx_device);
device_add(&piix_device);
device_add(&fdc37c932_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C932 | FDC37C93X_NORMAL));
device_add(&sst_flash_29ee010_device);
return ret;
}
static const device_config_t c5sbm2_config[] = {
// clang-format off
{
.name = "bios",
.description = "BIOS Version",
.type = CONFIG_BIOS,
.default_string = "5sbm2",
.default_int = 0,
.file_filter = "",
.spinner = { 0 },
.bios = {
{ .name = "4.50GP (07/17/1995)", .internal_name = "5sbm2", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/5sbm2/5SBM0717.BIN", "" } },
{ .name = "4.50PG (03/21/1996)", .internal_name = "5sbm2_450pg", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/5sbm2/5SBM0326.BIN", "" } },
{ .name = "4.51PG (03/15/2000 Unicore Upgrade)", .internal_name = "5sbm2_451pg", .bios_type = BIOS_NORMAL,
.files_no = 1, .local = 0, .size = 131072, .files = { "roms/machines/5sbm2/2A5ICC3A.BIN", "" } },
{ .files_no = 0 }
},
},
{ .name = "", .description = "", .type = CONFIG_END }
// clang-format on
};
const device_t c5sbm2_device = {
.name = "Chaintech 5SBM/5SBM2 (M103)",
.internal_name = "5sbm2_device",
.flags = 0,
.local = 0,
.init = NULL,
.close = NULL,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = c5sbm2_config
};
int
machine_at_5sbm2_init(const machine_t *model)
{
int ret;
int ret = 0;
const char* fn;
ret = bios_load_linear("roms/machines/5sbm2/5SBM0717.BIN",
0x000e0000, 131072, 0);
/* No ROMs available */
if (!device_available(model->device))
return ret;
device_context(model->device);
fn = device_get_bios_file(machine_get_device(machine), device_get_config_bios("bios"), 0);
ret = bios_load_linear(fn, 0x000e0000, 131072, 0);
device_context_restore();
if (bios_only || !ret)
return ret;

7
src/machine/m_at_socket8.c
View File

@@ -188,8 +188,9 @@ machine_at_acerv60n_init(const machine_t *model)
pci_register_slot(0x0C, PCI_CARD_NORMAL, 2, 3, 4, 1);
device_add(&i440fx_device);
device_add(&piix3_device);
device_add(&fdc37c935_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C935 | FDC37C93X_NORMAL));
device_add(&sst_flash_29ee010_device);
spd_register(SPD_TYPE_SDRAM, 0x7, 128);
return ret;
}
@@ -216,9 +217,7 @@ machine_at_lgibmx61_init(const machine_t *model)
pci_register_slot(0x0F, PCI_CARD_NORMAL, 4, 1, 2, 3);
device_add(&i440fx_device);
device_add(&piix3_device);
// device_add(&keyboard_ps2_ami_pci_device);
device_add(&keyboard_ps2_ami_device);
// device_add(&w83787f_device);
device_add(&w83877f_president_device);
device_add(&sst_flash_29ee010_device);
@@ -389,7 +388,7 @@ machine_at_m6mi_init(const machine_t *model)
pci_register_slot(0x0F, PCI_CARD_NORMAL, 4, 1, 2, 3);
device_add(&i440fx_device);
device_add(&piix3_device);
device_add(&fdc37c935_device);
device_add_params(&fdc37c93x_device, (void *) (FDC37C935 | FDC37C93X_NORMAL));
device_add(&intel_flash_bxt_device);
return ret;

32
src/machine/m_at_sockets7.c
View File

@@ -343,6 +343,38 @@ machine_at_5emapro_init(const machine_t *model)
return ret;
}
int
machine_at_delhi3_init(const machine_t *model)
{
int ret;
ret = bios_load_linear("roms/machines/delhi3/DELHI3.ROM",
0x000c0000, 262144, 0);
if (bios_only || !ret)
return ret;
machine_at_common_init_ex(model, 2);
pci_init(PCI_CONFIG_TYPE_1);
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
pci_register_slot(0x07, PCI_CARD_SOUTHBRIDGE, 1, 2, 3, 4);
pci_register_slot(0x13, PCI_CARD_NORMAL, 1, 2, 3, 4);
pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1);
device_add(&via_mvp3_device);
device_add(&via_vt82c596a_device);
device_add(&keyboard_ps2_ami_pci_device);
device_add(&w83877tf_device);
device_add(&sst_flash_39sf020_device);
spd_register(SPD_TYPE_SDRAM, 0x3, 256);
if ((sound_card_current[0] == SOUND_INTERNAL) && machine_get_snd_device(machine))
device_add(machine_get_snd_device(machine));
return ret;
}
int
machine_at_5sg100_init(const machine_t *model)
{

3
src/machine/m_pcjr.c
View File

@@ -1566,7 +1566,8 @@ machine_pcjr_init(UNUSED(const machine_t *model))
device_add(&fdc_pcjr_device);
device_add(&ns8250_pcjr_device);
serial_set_next_inst(SERIAL_MAX); /* So that serial_standalone_init() won't do anything. */
/* So that serial_standalone_init() won't do anything. */
serial_set_next_inst(SERIAL_MAX - 1);
/* "All the inputs are 'read' with one 'IN' from address hex 201." - PCjr Technical Reference (Nov. 83), p.2-119

13
src/machine/m_ps1_hdc.c
View File

@@ -653,7 +653,7 @@ do_format(hdc_t *dev, drive_t *drive, ccb_t *ccb)
case STATE_FINIT:
do_fmt:
/* Activate the status icon. */
ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 1);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_XTA, 1);
/* Seek to cylinder. */
if (do_seek(dev, drive, start_cyl)) {
@@ -691,7 +691,7 @@ do_fmt:
}
/* De-activate the status icon. */
ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_XTA, 0);
/* This saves us a LOT of code. */
dev->state = STATE_FINIT;
@@ -705,6 +705,7 @@ do_fmt:
if (intr) {
/* De-activate the status icon. */
ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_XTA, 0);
do_finish(dev);
}
@@ -970,7 +971,7 @@ do_send:
case STATE_RECV:
/* Activate the status icon. */
ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 1);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_XTA, 1);
do_recv:
/* Ready to transfer the data in. */
dev->state = STATE_RDATA;
@@ -1000,7 +1001,7 @@ do_recv:
ps1_hdc_log("HDC: CMD_WRITE_SECTORS out of data (idx=%d, len=%d)!\n", dev->buf_idx, dev->buf_len);
/* De-activate the status icon. */
ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_XTA, 0);
dev->intstat |= ISR_EQUIP_CHECK;
dev->ssb.need_reset = 1;
@@ -1025,7 +1026,7 @@ do_recv:
/* Get address of sector to write. */
if (get_sector(dev, drive, &addr)) {
/* De-activate the status icon. */
ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_XTA, 0);
do_finish(dev);
return;
@@ -1038,7 +1039,7 @@ do_recv:
dev->buf_idx = 0;
if (--dev->count == 0) {
/* De-activate the status icon. */
ui_sb_update_icon(SB_HDD | HDD_BUS_XTA, 0);
ui_sb_update_icon_write(SB_HDD | HDD_BUS_XTA, 0);
if (!(dev->ctrl & ACR_DMA_EN))
dev->status &= ~ASR_DATA_REQ;

487
src/machine/m_xt_laserxt.c
View File

@@ -1,6 +1,7 @@
/*This is the chipset used in the LaserXT series model*/
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <wchar.h>
#include <86box/86box.h>
@@ -21,125 +22,437 @@
#include <86box/keyboard.h>
#include <86box/plat_unused.h>
static int laserxt_emspage[4];
static int laserxt_emscontrol[4];
static mem_mapping_t laserxt_ems_mapping[4];
static int laserxt_ems_baseaddr_index = 0;
static int laserxt_is_lxt3 = 0;
#define EMS_TOTAL_MAX 0x00100000
static uint32_t
get_laserxt_ems_addr(uint32_t addr)
typedef struct
{
if (laserxt_emspage[(addr >> 14) & 3] & 0x80) {
addr = (!laserxt_is_lxt3 ? 0x70000 + (((mem_size + 64) & 255) << 10) : 0x30000 + (((mem_size + 320) & 511) << 10)) + ((laserxt_emspage[(addr >> 14) & 3] & 0x0F) << 14) + ((laserxt_emspage[(addr >> 14) & 3] & 0x40) << 12) + (addr & 0x3FFF);
}
uint8_t page;
uint8_t ctrl;
return addr;
uint32_t phys;
uint32_t virt;
mem_mapping_t mapping;
uint8_t *ram;
void *parent;
} lxt_ems_t;
typedef struct
{
int ems_base_idx;
lxt_ems_t ems[4];
uint16_t io_base;
uint32_t base;
uint32_t mem_size;
uint8_t *ram;
void *parent;
} lxt_ems_board_t;
typedef struct
{
int is_lxt3;
lxt_ems_board_t *ems_boards[2];
} lxt_t;
static void
ems_update_virt(lxt_ems_t *dev, uint8_t new_page)
{
lxt_ems_board_t *board = (lxt_ems_board_t *) dev->parent;
lxt_t *lxt = (lxt_t *) board->parent;
dev->page = new_page;
if (new_page & 0x80) {
if (lxt->is_lxt3) {
/* Point invalid pages at 1 MB which is outside the maximum. */
if ((new_page & 0x7f) >= 0x40)
dev->virt = EMS_TOTAL_MAX;
else
dev->virt = ((new_page & 0x7f) << 14);
} else
dev->virt = ((new_page & 0x0f) << 14) + ((new_page & 0x40) << 12);
if (dev->virt >= board->mem_size)
dev->virt = EMS_TOTAL_MAX;
} else
dev->virt = EMS_TOTAL_MAX;
dev->ram = board->ram + dev->virt;
if ((new_page & 0x80) && (dev->virt != EMS_TOTAL_MAX)) {
mem_mapping_enable(&dev->mapping);
mem_mapping_set_exec(&dev->mapping, dev->ram);
mem_mapping_set_p(&dev->mapping, dev->ram);
} else
mem_mapping_disable(&dev->mapping);
flushmmucache();
}
static void
laserxt_write(uint16_t port, uint8_t val, UNUSED(void *priv))
lxt_ems_out(uint16_t port, uint8_t val, void *priv)
{
uint32_t paddr;
uint32_t vaddr;
switch (port) {
case 0x0208:
case 0x4208:
case 0x8208:
case 0xC208:
laserxt_emspage[port >> 14] = val;
paddr = 0xC0000 + (port & 0xC000) + (((laserxt_ems_baseaddr_index + (4 - (port >> 14))) & 0x0C) << 14);
if (val & 0x80) {
mem_mapping_enable(&laserxt_ems_mapping[port >> 14]);
vaddr = get_laserxt_ems_addr(paddr);
mem_mapping_set_exec(&laserxt_ems_mapping[port >> 14], ram + vaddr);
} else {
mem_mapping_disable(&laserxt_ems_mapping[port >> 14]);
}
flushmmucache();
break;
case 0x0209:
case 0x4209:
case 0x8209:
case 0xC209:
laserxt_emscontrol[port >> 14] = val;
laserxt_ems_baseaddr_index = 0;
lxt_ems_board_t *dev = (lxt_ems_board_t *) priv;
uint8_t reg = port >> 14;
uint32_t saddrs[8] = { 0xc4000, 0xc8000, 0xcc000, 0xd0000,
0xd4000, 0xd8000, 0xdc000, 0xe0000 };
uint32_t saddr;
if (port & 0x0001) {
dev->ems[reg].ctrl = val;
if (reg < 0x03) {
dev->ems_base_idx = (dev->ems_base_idx & ~(0x04 >> (2 - reg))) |
((dev->ems[reg].ctrl & 0x80) >> (7 - reg));
saddr = saddrs[dev->ems_base_idx];
for (uint8_t i = 0; i < 4; i++) {
laserxt_ems_baseaddr_index |= (laserxt_emscontrol[i] & 0x80) >> (7 - i);
uint32_t base = saddr + (i * 0x4000);
mem_mapping_set_addr(&dev->ems[i].mapping, base, 0x4000);
if (!(dev->ems[i].page & 0x80) || (dev->ems[i].virt == EMS_TOTAL_MAX))
mem_mapping_disable(&dev->ems[i].mapping);
}
}
mem_mapping_set_addr(&laserxt_ems_mapping[0], 0xC0000 + (((laserxt_ems_baseaddr_index + 4) & 0x0C) << 14), 0x4000);
mem_mapping_set_addr(&laserxt_ems_mapping[1], 0xC4000 + (((laserxt_ems_baseaddr_index + 3) & 0x0C) << 14), 0x4000);
mem_mapping_set_addr(&laserxt_ems_mapping[2], 0xC8000 + (((laserxt_ems_baseaddr_index + 2) & 0x0C) << 14), 0x4000);
mem_mapping_set_addr(&laserxt_ems_mapping[3], 0xCC000 + (((laserxt_ems_baseaddr_index + 1) & 0x0C) << 14), 0x4000);
flushmmucache();
break;
default:
break;
flushmmucache();
} else if (!(port & 0x0001)) {
dev->ems[reg].page = val;
ems_update_virt(&dev->ems[reg], val);
}
}
static uint8_t
laserxt_read(uint16_t port, UNUSED(void *priv))
lxt_ems_in(uint16_t port, void *priv)
{
switch (port) {
case 0x0208:
case 0x4208:
case 0x8208:
case 0xC208:
return laserxt_emspage[port >> 14];
case 0x0209:
case 0x4209:
case 0x8209:
case 0xC209:
return laserxt_emscontrol[port >> 14];
lxt_ems_board_t *dev = (lxt_ems_board_t *) priv;
uint8_t reg = port >> 14;
uint8_t ret = 0xff;
default:
break;
}
return 0xff;
if (port & 0x0001)
ret = dev->ems[reg].ctrl;
else
ret = dev->ems[reg].page;
return ret;
}
static void
mem_write_laserxtems(uint32_t addr, uint8_t val, UNUSED(void *priv))
lxt_ems_write(uint32_t addr, uint8_t val, void *priv)
{
addr = get_laserxt_ems_addr(addr);
if (addr < (mem_size << 10))
ram[addr] = val;
uint8_t *mem = (uint8_t *) priv;
mem[addr & 0x3fff] = val;
}
static void
lxt_ems_writew(uint32_t addr, uint16_t val, void *priv)
{
uint8_t *mem = (uint8_t *) priv;
*(uint16_t *) &(mem[addr & 0x3fff]) = val;
}
static uint8_t
mem_read_laserxtems(uint32_t addr, UNUSED(void *priv))
lxt_ems_read(uint32_t addr, void *priv)
{
uint8_t val = 0xFF;
addr = get_laserxt_ems_addr(addr);
if (addr < (mem_size << 10))
val = ram[addr];
return val;
uint8_t *mem = (uint8_t *) priv;
uint8_t ret = 0xff;
ret = mem[addr & 0x3fff];
return ret;
}
static uint16_t
lxt_ems_readw(uint32_t addr, void *priv)
{
uint8_t *mem = (uint8_t *) priv;
uint16_t ret = 0xff;
ret = *(uint16_t *) &(mem[addr & 0x3fff]);
return ret;
}
static lxt_ems_board_t *
lxt_ems_init(lxt_t *parent, int en, uint16_t io, uint32_t mem)
{
lxt_ems_board_t *dev = (lxt_ems_board_t *) calloc(1, sizeof(lxt_ems_board_t));
if (en) {
dev->parent = parent;
if (io != 0x0000) {
io_sethandler(io , 0x0002, lxt_ems_in, NULL, NULL, lxt_ems_out, NULL, NULL, dev);
io_sethandler(io | 0x4000, 0x0002, lxt_ems_in, NULL, NULL, lxt_ems_out, NULL, NULL, dev);
io_sethandler(io | 0x8000, 0x0002, lxt_ems_in, NULL, NULL, lxt_ems_out, NULL, NULL, dev);
io_sethandler(io | 0xc000, 0x0002, lxt_ems_in, NULL, NULL, lxt_ems_out, NULL, NULL, dev);
}
dev->ram = (uint8_t *) calloc(mem, sizeof(uint8_t));
dev->mem_size = mem;
for (uint8_t i = 0; i < 4; i++) {
uint8_t *ptr = dev->ram + (i << 14);
if (parent->is_lxt3)
mem_mapping_add(&dev->ems[i].mapping, 0xe0000 + (i << 14), 0x4000,
lxt_ems_read, lxt_ems_readw, NULL,
lxt_ems_write, lxt_ems_writew, NULL,
ptr, 0, ptr);
else
mem_mapping_add(&dev->ems[i].mapping, 0xe0000 + (i << 14), 0x4000,
lxt_ems_read, NULL, NULL,
lxt_ems_write, NULL, NULL,
ptr, 0, ptr);
mem_mapping_disable(&dev->ems[i].mapping);
dev->ems[i].page = 0x7f;
dev->ems[i].ctrl = (i == 3) ? 0x00 : 0x80;
dev->ems[i].parent = dev;
ems_update_virt(&(dev->ems[i]), dev->ems[i].page);
}
}
return dev;
}
static void
laserxt_init(int is_lxt3)
lxt_close(void *priv)
{
if (mem_size > 640) {
io_sethandler(0x0208, 0x0002, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL);
io_sethandler(0x4208, 0x0002, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL);
io_sethandler(0x8208, 0x0002, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL);
io_sethandler(0xc208, 0x0002, laserxt_read, NULL, NULL, laserxt_write, NULL, NULL, NULL);
mem_mapping_set_addr(&ram_low_mapping, 0, !is_lxt3 ? 0x70000 + (((mem_size + 64) & 255) << 10) : 0x30000 + (((mem_size + 320) & 511) << 10));
lxt_t *dev = (lxt_t *) priv;
int ems_boards = (1 - dev->is_lxt3) + 1;
for (int i = 0; i < ems_boards; i++)
if (dev->ems_boards[i] != NULL) {
if (dev->ems_boards[i]->ram != NULL)
free(dev->ems_boards[i]->ram);
free(dev->ems_boards[i]);
}
free(dev);
}
static void *
lxt_init(const device_t *info)
{
lxt_t * dev = (lxt_t *) calloc(1, sizeof(lxt_t));
int ems_boards = (1 - info->local) + 1;
int ems_en[2] = { 0 };
uint16_t ems_io[2] = { 0 };
uint32_t ems_mem[2] = { 0 };
char conf_str[512] = { 0 };
dev->is_lxt3 = info->local;
for (int i = 0; i < ems_boards; i++) {
sprintf(conf_str, "ems_%i_enable", i + 1);
ems_en[i] = device_get_config_int(conf_str);
sprintf(conf_str, "ems_%i_base", i + 1);
ems_io[i] = device_get_config_hex16(conf_str);
sprintf(conf_str, "ems_%i_mem_size", i + 1);
ems_mem[i] = device_get_config_int(conf_str) << 10;
dev->ems_boards[i] = lxt_ems_init(dev, ems_en[i], ems_io[i], ems_mem[i]);
}
for (uint8_t i = 0; i < 4; i++) {
laserxt_emspage[i] = 0x7F;
laserxt_emscontrol[i] = (i == 3) ? 0x00 : 0x80;
mem_mapping_add(&laserxt_ems_mapping[i], 0xE0000 + (i << 14), 0x4000, mem_read_laserxtems, NULL, NULL, mem_write_laserxtems, NULL, NULL, ram + 0xA0000 + (i << 14), 0, NULL);
mem_mapping_disable(&laserxt_ems_mapping[i]);
}
mem_set_mem_state(0x0c0000, 0x40000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
laserxt_is_lxt3 = is_lxt3;
return dev;
}
static const device_config_t laserxt_config[] = {
{
.name = "ems_1_base",
.description = "EMS 1 Address",
.type = CONFIG_HEX16,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = { 0 },
.selection = {
{ .description = "Disabled", .value = 0 },
{ .description = "0x208", .value = 0x208 },
{ .description = "0x218", .value = 0x218 },
{ .description = "0x258", .value = 0x258 },
{ .description = "0x268", .value = 0x268 },
{ .description = "0x2A8", .value = 0x2a8 },
{ .description = "0x2B8", .value = 0x2b8 },
{ .description = "0x2E8", .value = 0x2e8 },
{ .description = "" }
},
.bios = { { 0 } }
},
{
.name = "ems_2_base",
.description = "EMS 2 Address",
.type = CONFIG_HEX16,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = { 0 },
.selection = {
{ .description = "Disabled", .value = 0 },
{ .description = "0x208", .value = 0x208 },
{ .description = "0x218", .value = 0x218 },
{ .description = "0x258", .value = 0x258 },
{ .description = "0x268", .value = 0x268 },
{ .description = "0x2A8", .value = 0x2a8 },
{ .description = "0x2B8", .value = 0x2b8 },
{ .description = "0x2E8", .value = 0x2e8 },
{ .description = "" }
},
.bios = { { 0 } }
},
{
.name = "ems_1_mem_size",
.description = "EMS 1 Memory Size",
.type = CONFIG_SPINNER,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = {
.min = 0,
.max = 512,
.step = 32
},
.selection = { { 0 } },
.bios = { { 0 } }
},
{
.name = "ems_2_mem_size",
.description = "EMS 2 Memory Size",
.type = CONFIG_SPINNER,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = {
.min = 0,
.max = 512,
.step = 32
},
.selection = { { 0 } },
.bios = { { 0 } }
},
{
.name = "ems_1_enable",
.description = "Enable EMS 1",
.type = CONFIG_BINARY,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = { 0 },
.selection = { { 0 } },
.bios = { { 0 } }
},
{
.name = "ems_2_enable",
.description = "Enable EMS 2",
.type = CONFIG_BINARY,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = { 0 },
.selection = { { 0 } },
.bios = { { 0 } }
},
{ .name = "", .description = "", .type = CONFIG_END }
};
const device_t laserxt_device = {
.name = "VTech Laser Turbo XT",
.internal_name = "laserxt",
.flags = 0,
.local = 0,
.init = lxt_init,
.close = lxt_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = laserxt_config
};
static const device_config_t lxt3_config[] = {
{
.name = "ems_1_base",
.description = "EMS Address",
.type = CONFIG_HEX16,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = { 0 },
.selection = {
{ .description = "Disabled", .value = 0 },
{ .description = "0x208", .value = 0x208 },
{ .description = "0x218", .value = 0x218 },
{ .description = "0x258", .value = 0x258 },
{ .description = "0x268", .value = 0x268 },
{ .description = "0x2A8", .value = 0x2a8 },
{ .description = "0x2B8", .value = 0x2b8 },
{ .description = "0x2E8", .value = 0x2e8 },
{ .description = "" }
},
.bios = { { 0 } }
},
{
.name = "ems_1_mem_size",
.description = "EMS Memory Size",
.type = CONFIG_SPINNER,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = {
.min = 0,
.max = 1024,
.step = 32
},
.selection = { { 0 } },
.bios = { { 0 } }
},
{
.name = "ems_1_enable",
.description = "Enable EMS",
.type = CONFIG_BINARY,
.default_string = NULL,
.default_int = 0,
.file_filter = NULL,
.spinner = { 0 },
.selection = { { 0 } },
.bios = { { 0 } }
},
{ .name = "", .description = "", .type = CONFIG_END }
};
const device_t lxt3_device = {
.name = "VTech Laser Turbo XT",
.internal_name = "laserxt",
.flags = 0,
.local = 1,
.init = lxt_init,
.close = lxt_close,
.reset = NULL,
.available = NULL,
.speed_changed = NULL,
.force_redraw = NULL,
.config = lxt3_config
};
static void
machine_xt_laserxt_common_init(const machine_t *model,int is_lxt3)
{
@@ -153,7 +466,7 @@ machine_xt_laserxt_common_init(const machine_t *model,int is_lxt3)
nmi_init();
standalone_gameport_type = &gameport_device;
laserxt_init(is_lxt3);
device_add(is_lxt3 ? &lxt3_device : &laserxt_device);
device_add(&keyboard_xt_lxt3_device);
}

3
src/machine/m_xt_zenith.c
View File

@@ -146,7 +146,8 @@ machine_xt_z184_init(const machine_t *model)
lpt2_remove();
lpt1_setup(LPT2_ADDR);
device_add(&ns8250_device);
serial_set_next_inst(SERIAL_MAX); /* So that serial_standalone_init() won't do anything. */
/* So that serial_standalone_init() won't do anything. */
serial_set_next_inst(SERIAL_MAX - 1);
device_add(&cga_device);

20
src/machine/machine.c
View File

@@ -139,18 +139,24 @@ machine_init(void)
int
machine_available(int m)
{
int ret;
int ret = 0;
const device_t *dev = machine_get_device(m);
bios_only = 1;
if (dev != NULL)
ret = machine_device_available(dev);
/*
Only via machine_init_ex() if the device is NULL or
it lacks a CONFIG_BIOS field (or the CONFIG_BIOS field
is not the first in list.
*/
if (ret == 0) {
bios_only = 1;
ret = device_available(dev);
/* Do not check via machine_init_ex() if the device is not NULL and
it has a CONFIG_BIOS field. */
if ((dev == NULL) || (ret != -1))
ret = machine_init_ex(m);
bios_only = 0;
bios_only = 0;
} else if (ret == -2)
ret = 0;
return !!ret;
}

258
src/machine/machine_table.c
View File

@@ -68,6 +68,7 @@ extern const device_t ibmxt286_device;
extern const device_t pb450_device;
extern const device_t jukopc_device;
extern const device_t vendex_device;
extern const device_t c5sbm2_device;
const machine_filter_t machine_types[] = {
{ "None", MACHINE_TYPE_NONE },
@@ -1709,7 +1710,6 @@ const machine_t machines[] = {
.snd_device = NULL,
.net_device = NULL
},
#ifdef USE_LASERXT
{
.name = "[8088] VTech Laser Turbo XT",
.internal_name = "ltxt",
@@ -1735,21 +1735,20 @@ const machine_t machines[] = {
.ram = {
.min = 256,
.max = 640,
.step = 256
.step = 64
},
.nvrmask = 0,
.kbc_device = &keyboard_xt_device,
.kbc_p1 = 0xff,
.gpio = 0xffffffff,
.gpio_acpi = 0xffffffff,
.device = NULL,
.device = &laserxt_device,
.fdc_device = NULL,
.sio_device = NULL,
.vid_device = NULL,
.snd_device = NULL,
.net_device = NULL
},
#endif /* USE_LASERXT */
/* Has a standard PS/2 KBC (so, use IBM PS/2 Type 1). */
{
.name = "[8088] Xi8088",
@@ -2612,8 +2611,6 @@ const machine_t machines[] = {
.snd_device = NULL,
.net_device = NULL
},
#ifdef USE_LASERXT
{
.name = "[8086] VTech Laser XT3",
.internal_name = "lxt3",
@@ -2637,23 +2634,22 @@ const machine_t machines[] = {
.bus_flags = MACHINE_PC,
.flags = MACHINE_FLAGS_NONE,
.ram = {
.min = 256,
.min = 512,
.max = 640,
.step = 256
.step = 64
},
.nvrmask = 0,
.kbc_device = &keyboard_xt_lxt3_device,
.kbc_p1 = 0xff,
.gpio = 0xffffffff,
.gpio_acpi = 0xffffffff,
.device = NULL,
.device = &lxt3_device,
.fdc_device = NULL,
.sio_device = NULL,
.vid_device = NULL,
.snd_device = NULL,
.net_device = NULL
},
#endif /* USE_LASERXT */
/* 286 AT machines */
/* Has IBM AT KBC firmware. */
@@ -4809,7 +4805,7 @@ const machine_t machines[] = {
.max_multi = 0
},
.bus_flags = MACHINE_AT,
.flags = MACHINE_VIDEO_FIXED,
.flags = MACHINE_VIDEO_FIXED | MACHINE_AX,
.ram = {
.min = 1024,
.max = 4096,
@@ -5637,6 +5633,46 @@ const machine_t machines[] = {
.snd_device = NULL,
.net_device = NULL
},
/* Has Award KBC firmware. */
{
.name = "[SiS 310] ASUS 386/33-64K",
.internal_name = "asus386_3364k",
.type = MACHINE_TYPE_386DX,
.chipset = MACHINE_CHIPSET_SIS_310,
.init = machine_at_asus386_3364k_init,
.p1_handler = NULL,
.gpio_handler = NULL,
.available_flag = MACHINE_AVAILABLE,
.gpio_acpi_handler = NULL,
.cpu = {
.package = CPU_PKG_386DX,
.block = CPU_BLOCK_NONE,
.min_bus = 0,
.max_bus = 0,
.min_voltage = 0,
.max_voltage = 0,
.min_multi = 0,
.max_multi = 0
},
.bus_flags = MACHINE_AT,
.flags = MACHINE_APM,
.ram = {
.min = 1024,
.max = 16384,
.step = 1024
},
.nvrmask = 127,
.kbc_device = NULL,
.kbc_p1 = 0xff,
.gpio = 0xffffffff,
.gpio_acpi = 0xffffffff,
.device = NULL,
.fdc_device = NULL,
.sio_device = NULL,
.vid_device = NULL,
.snd_device = NULL,
.net_device = NULL
},
/* Has AMIKey F KBC firmware. */
{
.name = "[SiS 310] ASUS ISA-386C",
@@ -6003,6 +6039,46 @@ const machine_t machines[] = {
},
/* 486 machines - Socket 1 */
/* Has Award KBC firmware. */
{
.name = "[ZyMOS Poach] ASUS ISA-486C",
.internal_name = "isa486c",
.type = MACHINE_TYPE_486,
.chipset = MACHINE_CHIPSET_ZYMOS_POACH,
.init = machine_at_isa486c_init,
.p1_handler = NULL,
.gpio_handler = NULL,
.available_flag = MACHINE_AVAILABLE,
.gpio_acpi_handler = NULL,
.cpu = {
.package = CPU_PKG_SOCKET1,
.block = CPU_BLOCK_NONE,
.min_bus = 0,
.max_bus = 0,
.min_voltage = 0,
.max_voltage = 0,
.min_multi = 0,
.max_multi = 0
},
.bus_flags = MACHINE_AT,
.flags = MACHINE_APM,
.ram = {
.min = 1024,
.max = 16384,
.step = 1024
},
.nvrmask = 127,
.kbc_device = NULL,
.kbc_p1 = 0xff,
.gpio = 0xffffffff,
.gpio_acpi = 0xffffffff,
.device = NULL,
.fdc_device = NULL,
.sio_device = NULL,
.vid_device = NULL,
.snd_device = NULL,
.net_device = NULL
},
/* Has AMI KF KBC firmware. */
{
.name = "[ZyMOS Poach] Genoa Unknown 486",
@@ -7089,7 +7165,7 @@ const machine_t machines[] = {
.flags = MACHINE_APM,
.ram = {
.min = 1024,
.max = 65536,
.max = 131072,
.step = 1024
},
.nvrmask = 127,
@@ -7129,7 +7205,7 @@ const machine_t machines[] = {
.flags = MACHINE_APM,
.ram = {
.min = 1024,
.max = 65536,
.max = 131072,
.step = 1024
},
.nvrmask = 127,
@@ -7209,7 +7285,7 @@ const machine_t machines[] = {
.flags = MACHINE_APM,
.ram = {
.min = 1024,
.max = 65536,
.max = 131072,
.step = 1024
},
.nvrmask = 127,
@@ -7249,7 +7325,7 @@ const machine_t machines[] = {
.flags = MACHINE_APM,
.ram = {
.min = 1024,
.max = 65536,
.max = 131072,
.step = 1024
},
.nvrmask = 127,
@@ -7328,9 +7404,9 @@ const machine_t machines[] = {
.bus_flags = MACHINE_PS2_VLB,
.flags = MACHINE_IDE | MACHINE_APM, /* Has internal video: Western Digital WD90C33-ZZ */
.ram = {
.min = 1024,
.max = 65536,
.step = 1024
.min = 4096,
.max = 40960,
.step = 4096
},
.nvrmask = 127,
.kbc_device = NULL,
@@ -7368,9 +7444,9 @@ const machine_t machines[] = {
.bus_flags = MACHINE_PS2,
.flags = MACHINE_IDE_DUAL | MACHINE_SUPER_IO | MACHINE_APM | MACHINE_VIDEO,
.ram = {
.min = 1024,
.max = 65536,
.step = 1024
.min = 4096,
.max = 69632,
.step = 4096
},
.nvrmask = 127,
.kbc_device = NULL,
@@ -8156,7 +8232,10 @@ const machine_t machines[] = {
.snd_device = NULL,
.net_device = NULL
},
/* I'm going to assume this as an AMIKey-2 like the other two 486SP3's. */
/*
This has an AMIKey (and an on-board NCR 53C810 PCI SCSI controller), thanks, eBay!
The keyboard port is AT.
*/
{
.name = "[i420TX] ASUS PCI/I-486SP3",
.internal_name = "486sp3",
@@ -8357,6 +8436,45 @@ const machine_t machines[] = {
.snd_device = NULL,
.net_device = NULL
},
{
.name = "[SiS 496] Acer P3",
.internal_name = "acerp3",
.type = MACHINE_TYPE_486_S3_PCI,
.chipset = MACHINE_CHIPSET_SIS_496,
.init = machine_at_acerp3_init,
.p1_handler = NULL,
.gpio_handler = NULL,
.available_flag = MACHINE_AVAILABLE,
.gpio_acpi_handler = NULL,
.cpu = {
.package = CPU_PKG_SOCKET3,
.block = CPU_BLOCK(CPU_i486SX, CPU_i486DX, CPU_Am486SX, CPU_Am486DX),
.min_bus = 0,
.max_bus = 0,
.min_voltage = 0,
.max_voltage = 0,
.min_multi = 0,
.max_multi = 0
},
.bus_flags = MACHINE_PS2_PCI,
.flags = MACHINE_IDE_DUAL | MACHINE_APM | MACHINE_VIDEO,
.ram = {
.min = 2048,
.max = 131072,
.step = 1024
},
.nvrmask = 255,
.kbc_device = NULL,
.kbc_p1 = 0xff,
.gpio = 0xffffffff,
.gpio_acpi = 0xffffffff,
.device = NULL,
.fdc_device = NULL,
.sio_device = NULL,
.vid_device = &gd5434_onboard_pci_device,
.snd_device = NULL,
.net_device = NULL
},
/* This has an AMIKey-2, which is an updated version of type 'H'. */
{
.name = "[SiS 496] ASUS PVI-486SP3C",
@@ -10053,7 +10171,7 @@ const machine_t machines[] = {
.max_multi = 1.5
},
.bus_flags = MACHINE_PS2_PCI,
.flags = MACHINE_IDE | MACHINE_SCSI | MACHINE_APM,
.flags = MACHINE_IDE /*| MACHINE_SCSI */ | MACHINE_APM,
.ram = {
.min = 2048,
.max = 524288,
@@ -11428,7 +11546,7 @@ const machine_t machines[] = {
/* SiS 5501 */
/* Has the Lance LT38C41 KBC. */
{
.name = "[SiS 5501] Chaintech 5SBM2 (M103)",
.name = "[SiS 5501] Chaintech 5SBM/5SBM2 (M103)",
.internal_name = "5sbm2",
.type = MACHINE_TYPE_SOCKET7_3V,
.chipset = MACHINE_CHIPSET_SIS_5501,
@@ -11451,7 +11569,7 @@ const machine_t machines[] = {
.flags = MACHINE_IDE_DUAL | MACHINE_APM,
.ram = {
.min = 8192,
.max = 262144,
.max = 131072,
.step = 8192
},
.nvrmask = 255,
@@ -11459,7 +11577,7 @@ const machine_t machines[] = {
.kbc_p1 = 0xff,
.gpio = 0xffffffff,
.gpio_acpi = 0xffffffff,
.device = NULL,
.device = &c5sbm2_device,
.fdc_device = NULL,
.sio_device = NULL,
.vid_device = NULL,
@@ -13976,6 +14094,47 @@ const machine_t machines[] = {
.snd_device = NULL,
.net_device = NULL
},
/* Has the VIA VT82C596A southbridge with on-chip KBC identical to the VIA
VT82C42N. */
{
.name = "[VIA MVP3] eMachines eTower 3xxc",
.internal_name = "delhi3",
.type = MACHINE_TYPE_SOCKETS7,
.chipset = MACHINE_CHIPSET_VIA_APOLLO_MVP3,
.init = machine_at_delhi3_init,
.p1_handler = NULL,
.gpio_handler = NULL,
.available_flag = MACHINE_AVAILABLE,
.gpio_acpi_handler = NULL,
.cpu = {
.package = CPU_PKG_SOCKET5_7,
.block = CPU_BLOCK_NONE,
.min_bus = 66666667,
.max_bus = 124242424,
.min_voltage = 2000,
.max_voltage = 3520,
.min_multi = 1.5,
.max_multi = 5.5
},
.bus_flags = MACHINE_PS2_PCI | MACHINE_BUS_USB, /* Has internal video: ATI 3D Rage IIc AGP (Rage 2) */
.flags = MACHINE_IDE_DUAL | MACHINE_APM | MACHINE_ACPI | MACHINE_SOUND | MACHINE_USB,
.ram = {
.min = 8192,
.max = 524288,
.step = 8192
},
.nvrmask = 255,
.kbc_device = NULL,
.kbc_p1 = 0xff,
.gpio = 0xffffffff,
.gpio_acpi = 0xffffffff,
.device = NULL,
.fdc_device = NULL,
.sio_device = NULL,
.vid_device = NULL,
.snd_device = &cs4235_device,
.net_device = NULL
},
/* SiS 5591 */
/* Has the SiS 5591 chipset with on-chip KBC. */
@@ -14129,7 +14288,7 @@ const machine_t machines[] = {
.flags = MACHINE_IDE_DUAL | MACHINE_APM | MACHINE_USB,
.ram = {
.min = 8192,
.max = 786432,
.max = 393216,
.step = 8192
},
.nvrmask = 511,
@@ -14554,6 +14713,47 @@ const machine_t machines[] = {
},
/* 440FX */
/* Has a SM(S)C FDC37C935 Super I/O chip with on-chip KBC with Phoenix
MultiKey/42 (version 1.38) KBC firmware. */
{
.name = "[i440FX] Acer V62X",
.internal_name = "acerv62x",
.type = MACHINE_TYPE_SLOT1,
.chipset = MACHINE_CHIPSET_INTEL_440FX,
.init = machine_at_acerv62x_init,
.p1_handler = NULL,
.gpio_handler = NULL,
.available_flag = MACHINE_AVAILABLE,
.gpio_acpi_handler = NULL,
.cpu = {
.package = CPU_PKG_SLOT1,
.block = CPU_BLOCK_NONE,
.min_bus = 60000000,
.max_bus = 83333333,
.min_voltage = 1800,
.max_voltage = 3500,
.min_multi = 1.5,
.max_multi = 8.0
},
.bus_flags = MACHINE_PS2_PCI | MACHINE_BUS_USB,
.flags = MACHINE_IDE_DUAL | MACHINE_APM | MACHINE_USB,
.ram = {
.min = 8192,
.max = 393216,
.step = 8192
},
.nvrmask = 511,
.kbc_device = NULL,
.kbc_p1 = 0xff,
.gpio = 0xffffffff,
.gpio_acpi = 0xffffffff,
.device = NULL,
.fdc_device = NULL,
.sio_device = NULL,
.vid_device = NULL,
.snd_device = NULL,
.net_device = NULL
},
/* The base board has a Holtek HT6542B KBC with AMIKey-2 (updated 'H') KBC firmware. */
{
.name = "[i440FX] ASUS P/I-P65UP5 (C-PKND)",
@@ -14611,7 +14811,7 @@ const machine_t machines[] = {
.block = CPU_BLOCK_NONE,
.min_bus = 60000000,
.max_bus = 83333333,
.min_voltage = 1800,
.min_voltage = 2800,
.max_voltage = 3500,
.min_multi = 1.5,
.max_multi = 8.0
@@ -14741,7 +14941,7 @@ const machine_t machines[] = {
.min_multi = 1.5,
.max_multi = 8.0
},
.bus_flags = MACHINE_PS2_PCI | MACHINE_BUS_USB,
.bus_flags = MACHINE_PS2_PCI | MACHINE_BUS_USB, /* Has internal video: SGS Thompson Riva 128 AGP, network: NEC PK-UG-X006 (Intel 82558B chip) and sound: OAK Audia 3D (OTI-610) */
.flags = MACHINE_IDE_DUAL | MACHINE_APM | MACHINE_ACPI | MACHINE_USB,
.ram = {
.min = 8192,

59
src/mem/mem.c
View File

@@ -108,7 +108,6 @@ int mem_a20_alt = 0;
int mem_a20_state = 0;
int mmuflush = 0;
int mmu_perm = 4;
#ifdef USE_NEW_DYNAREC
uint64_t *byte_dirty_mask;
@@ -125,10 +124,6 @@ mem_mapping_t *write_mapping[MEM_MAPPINGS_NO];
uint8_t *_mem_exec[MEM_MAPPINGS_NO];
/* FIXME: re-do this with a 'mem_ops' struct. */
static uint8_t *page_lookupp; /* pagetable mmu_perm lookup */
static uint8_t *readlookupp;
static uint8_t *writelookupp;
static mem_mapping_t *base_mapping;
static mem_mapping_t *last_mapping;
static mem_mapping_t *read_mapping_bus[MEM_MAPPINGS_NO];
@@ -187,10 +182,8 @@ resetreadlookup(void)
/* Initialize the tables for high (> 1024K) RAM. */
memset(readlookup2, 0xff, (1 << 20) * sizeof(uintptr_t));
memset(readlookupp, 0x04, (1 << 20) * sizeof(uint8_t));
memset(writelookup2, 0xff, (1 << 20) * sizeof(uintptr_t));
memset(writelookupp, 0x04, (1 << 20) * sizeof(uint8_t));
readlnext = 0;
writelnext = 0;
@@ -204,14 +197,11 @@ flushmmucache(void)
for (uint16_t c = 0; c < 256; c++) {
if (readlookup[c] != (int) 0xffffffff) {
readlookup2[readlookup[c]] = LOOKUP_INV;
readlookupp[readlookup[c]] = 4;
readlookup[c] = 0xffffffff;
}
if (writelookup[c] != (int) 0xffffffff) {
page_lookup[writelookup[c]] = NULL;
page_lookupp[writelookup[c]] = 4;
writelookup2[writelookup[c]] = LOOKUP_INV;
writelookupp[writelookup[c]] = 4;
writelookup[c] = 0xffffffff;
}
}
@@ -231,9 +221,7 @@ flushmmucache_write(void)
for (uint16_t c = 0; c < 256; c++) {
if (writelookup[c] != (int) 0xffffffff) {
page_lookup[writelookup[c]] = NULL;
page_lookupp[writelookup[c]] = 4;
writelookup2[writelookup[c]] = LOOKUP_INV;
writelookupp[writelookup[c]] = 4;
writelookup[c] = 0xffffffff;
}
}
@@ -259,14 +247,11 @@ flushmmucache_nopc(void)
for (uint16_t c = 0; c < 256; c++) {
if (readlookup[c] != (int) 0xffffffff) {
readlookup2[readlookup[c]] = LOOKUP_INV;
readlookupp[readlookup[c]] = 4;
readlookup[c] = 0xffffffff;
}
if (writelookup[c] != (int) 0xffffffff) {
page_lookup[writelookup[c]] = NULL;
page_lookupp[writelookup[c]] = 4;
writelookup2[writelookup[c]] = LOOKUP_INV;
writelookupp[writelookup[c]] = 4;
writelookup[c] = 0xffffffff;
}
}
@@ -348,7 +333,6 @@ mmutranslatereal_normal(uint32_t addr, int rw)
return 0xffffffffffffffffULL;
}
mmu_perm = temp & 4;
rammap(addr2) |= (rw ? 0x60 : 0x20);
uint64_t page = temp & ~0x3fffff;
@@ -371,7 +355,6 @@ mmutranslatereal_normal(uint32_t addr, int rw)
return 0xffffffffffffffffULL;
}
mmu_perm = temp & 4;
rammap(addr2) |= 0x20;
rammap((temp2 & ~0xfff) + ((addr >> 10) & 0xffc)) |= (rw ? 0x60 : 0x20);
@@ -435,7 +418,6 @@ mmutranslatereal_pae(uint32_t addr, int rw)
return 0xffffffffffffffffULL;
}
mmu_perm = temp & 4;
rammap64(addr3) |= (rw ? 0x60 : 0x20);
return ((temp & ~0x1fffffULL) + (addr & 0x1fffffULL)) & 0x000000ffffffffffULL;
@@ -456,7 +438,6 @@ mmutranslatereal_pae(uint32_t addr, int rw)
return 0xffffffffffffffffULL;
}
mmu_perm = temp & 4;
rammap64(addr3) |= 0x20;
rammap64(addr4) |= (rw ? 0x60 : 0x20);
@@ -631,7 +612,6 @@ addreadlookup(uint32_t virt, uint32_t phys)
else
readlookup2[virt >> 12] = (uintptr_t) &ram[a];
#endif
readlookupp[virt >> 12] = mmu_perm;
readlookup[readlnext++] = virt >> 12;
readlnext &= (cachesize - 1);
@@ -671,7 +651,6 @@ addwritelookup(uint32_t virt, uint32_t phys)
# endif
#endif
page_lookup[virt >> 12] = &pages[phys >> 12];
page_lookupp[virt >> 12] = mmu_perm;
} else {
#if (defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64)
writelookup2[virt >> 12] = (uintptr_t) &ram[(uintptr_t) (phys & ~0xFFF) - (uintptr_t) (virt & ~0xfff)];
@@ -684,7 +663,6 @@ addwritelookup(uint32_t virt, uint32_t phys)
writelookup2[virt >> 12] = (uintptr_t) &ram[a];
#endif
}
writelookupp[virt >> 12] = mmu_perm;
writelookup[writelnext++] = virt >> 12;
writelnext &= (cachesize - 1);
@@ -973,10 +951,8 @@ readmemwl(uint32_t addr)
}
return readmembl_no_mmut(addr, addr64a[0]) | (((uint16_t) readmembl_no_mmut(addr + 1, addr64a[1])) << 8);
} else if (readlookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) {
mmu_perm = readlookupp[addr >> 12];
} else if (readlookup2[addr >> 12] != (uintptr_t) LOOKUP_INV)
return *(uint16_t *) (readlookup2[addr >> 12] + addr);
}
}
if (cr0 >> 31) {
@@ -1044,7 +1020,6 @@ writememwl(uint32_t addr, uint16_t val)
writemembl_no_mmut(addr + 1, addr64a[1], val >> 8);
return;
} else if (writelookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) {
mmu_perm = writelookupp[addr >> 12];
*(uint16_t *) (writelookup2[addr >> 12] + addr) = val;
return;
}
@@ -1052,7 +1027,6 @@ writememwl(uint32_t addr, uint16_t val)
if (page_lookup[addr >> 12] && page_lookup[addr >> 12]->write_w) {
page_lookup[addr >> 12]->write_w(addr, val, page_lookup[addr >> 12]);
mmu_perm = page_lookupp[addr >> 12];
return;
}
@@ -1100,10 +1074,8 @@ readmemwl_no_mmut(uint32_t addr, uint32_t *a64)
}
return readmembl_no_mmut(addr, a64[0]) | (((uint16_t) readmembl_no_mmut(addr + 1, a64[1])) << 8);
} else if (readlookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) {
mmu_perm = readlookupp[addr >> 12];
} else if (readlookup2[addr >> 12] != (uintptr_t) LOOKUP_INV)
return *(uint16_t *) (readlookup2[addr >> 12] + addr);
}
}
if (cr0 >> 31) {
@@ -1149,14 +1121,12 @@ writememwl_no_mmut(uint32_t addr, uint32_t *a64, uint16_t val)
writemembl_no_mmut(addr + 1, a64[1], val >> 8);
return;
} else if (writelookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) {
mmu_perm = writelookupp[addr >> 12];
*(uint16_t *) (writelookup2[addr >> 12] + addr) = val;
return;
}
}
if (page_lookup[addr >> 12] && page_lookup[addr >> 12]->write_w) {
mmu_perm = page_lookupp[addr >> 12];
page_lookup[addr >> 12]->write_w(addr, val, page_lookup[addr >> 12]);
return;
}
@@ -1231,10 +1201,8 @@ readmemll(uint32_t addr)
/* No need to waste precious CPU host cycles on mmutranslate's that were already done, just pass
their result as a parameter to be used if needed. */
return readmemwl_no_mmut(addr, addr64a) | (((uint32_t) readmemwl_no_mmut(addr + 2, &(addr64a[2]))) << 16);
} else if (readlookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) {
mmu_perm = readlookupp[addr >> 12];
} else if (readlookup2[addr >> 12] != (uintptr_t) LOOKUP_INV)
return *(uint32_t *) (readlookup2[addr >> 12] + addr);
}
}
if (cr0 >> 31) {
@@ -1316,14 +1284,12 @@ writememll(uint32_t addr, uint32_t val)
writememwl_no_mmut(addr + 2, &(addr64a[2]), val >> 16);
return;
} else if (writelookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) {
mmu_perm = writelookupp[addr >> 12];
*(uint32_t *) (writelookup2[addr >> 12] + addr) = val;
return;
}
}
if (page_lookup[addr >> 12] && page_lookup[addr >> 12]->write_l) {
mmu_perm = page_lookupp[addr >> 12];
page_lookup[addr >> 12]->write_l(addr, val, page_lookup[addr >> 12]);
return;
}
@@ -1378,10 +1344,8 @@ readmemll_no_mmut(uint32_t addr, uint32_t *a64)
}
return readmemwl_no_mmut(addr, a64) | ((uint32_t) (readmemwl_no_mmut(addr + 2, &(a64[2]))) << 16);
} else if (readlookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) {
mmu_perm = readlookupp[addr >> 12];
} else if (readlookup2[addr >> 12] != (uintptr_t) LOOKUP_INV)
return *(uint32_t *) (readlookup2[addr >> 12] + addr);
}
}
if (cr0 >> 31) {
@@ -1429,14 +1393,12 @@ writememll_no_mmut(uint32_t addr, uint32_t *a64, uint32_t val)
writememwl_no_mmut(addr + 2, &(a64[2]), val >> 16);
return;
} else if (writelookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) {
mmu_perm = writelookupp[addr >> 12];
*(uint32_t *) (writelookup2[addr >> 12] + addr) = val;
return;
}
}
if (page_lookup[addr >> 12] && page_lookup[addr >> 12]->write_l) {
mmu_perm = page_lookupp[addr >> 12];
page_lookup[addr >> 12]->write_l(addr, val, page_lookup[addr >> 12]);
return;
}
@@ -1516,10 +1478,8 @@ readmemql(uint32_t addr)
/* No need to waste precious CPU host cycles on mmutranslate's that were already done, just pass
their result as a parameter to be used if needed. */
return readmemll_no_mmut(addr, addr64a) | (((uint64_t) readmemll_no_mmut(addr + 4, &(addr64a[4]))) << 32);
} else if (readlookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) {
mmu_perm = readlookupp[addr >> 12];
} else if (readlookup2[addr >> 12] != (uintptr_t) LOOKUP_INV)
return *(uint64_t *) (readlookup2[addr >> 12] + addr);
}
}
if (cr0 >> 31) {
@@ -1611,14 +1571,12 @@ writememql(uint32_t addr, uint64_t val)
writememll_no_mmut(addr + 4, &(addr64a[4]), val >> 32);
return;
} else if (writelookup2[addr >> 12] != (uintptr_t) LOOKUP_INV) {
mmu_perm = writelookupp[addr >> 12];
*(uint64_t *) (writelookup2[addr >> 12] + addr) = val;
return;
}
}
if (page_lookup[addr >> 12] && page_lookup[addr >> 12]->write_l) {
mmu_perm = page_lookupp[addr >> 12];
page_lookup[addr >> 12]->write_l(addr, val, page_lookup[addr >> 12]);
page_lookup[addr >> 12]->write_l(addr + 4, val >> 32, page_lookup[addr >> 12]);
return;
@@ -1702,8 +1660,7 @@ do_mmutranslate(uint32_t addr, uint32_t *a64, int num, int write)
a = (a & 0xfffffffffffff000ULL) | ((uint64_t) (addr & 0xfff));
a64[i] = (uint32_t) a;
}
} else
mmu_perm = page_lookupp[addr >> 12];
}
addr++;
}
@@ -2914,7 +2871,6 @@ mem_reset(void)
pages = (page_t *) malloc(m * sizeof(page_t));
memset(page_lookup, 0x00, (1 << 20) * sizeof(page_t *));
memset(page_lookupp, 0x04, (1 << 20) * sizeof(uint8_t));
memset(pages, 0x00, pages_sz * sizeof(page_t));
@@ -3033,11 +2989,8 @@ mem_init(void)
/* Allocate the lookup tables. */
page_lookup = (page_t **) malloc((1 << 20) * sizeof(page_t *));
page_lookupp = (uint8_t *) malloc((1 << 20) * sizeof(uint8_t));
readlookup2 = malloc((1 << 20) * sizeof(uintptr_t));
readlookupp = malloc((1 << 20) * sizeof(uint8_t));
writelookup2 = malloc((1 << 20) * sizeof(uintptr_t));
writelookupp = malloc((1 << 20) * sizeof(uint8_t));
}
static void

2
src/mem/mmu_2386.c
View File

@@ -211,7 +211,6 @@ mmutranslatereal_2386(uint32_t addr, int rw)
return 0xffffffffffffffffULL;
}
mmu_perm = temp & 4;
mem_writel_map(addr2, mem_readl_map(addr2) | (rw ? 0x60 : 0x20));
return (temp & ~0x3fffff) + (addr & 0x3fffff);
@@ -231,7 +230,6 @@ mmutranslatereal_2386(uint32_t addr, int rw)
return 0xffffffffffffffffULL;
}
mmu_perm = temp & 4;
mem_writel_map(addr2, mem_readl_map(addr2) | 0x20);
mem_writel_map((temp2 & ~0xfff) + ((addr >> 10) & 0xffc),
mem_readl_map((temp2 & ~0xfff) + ((addr >> 10) & 0xffc)) | (rw ? 0x60 : 0x20));

6
src/network/network.c
View File

@@ -432,7 +432,8 @@ network_rx_queue(void *priv)
bool activity = rx_bytes || tx_bytes;
bool led_on = card->led_timer & 0x80000000;
if ((activity && !led_on) || (card->led_timer & 0x7fffffff) >= 150000) {
ui_sb_update_icon(SB_NETWORK | card->card_num, activity);
ui_sb_update_icon(SB_NETWORK | card->card_num, !!(rx_bytes));
ui_sb_update_icon_write(SB_NETWORK | card->card_num, !!(tx_bytes));
card->led_timer = 0 | (activity << 31);
}
@@ -501,7 +502,7 @@ network_attach(void *card_drv, uint8_t *mac, NETRXCB rx, NETSETLINKSTATE set_lin
if(net_cards_conf[net_card_current].net_type != NET_TYPE_NONE) {
// We're here because of a failure
swprintf(tempmsg, sizeof_w(tempmsg), L"%ls:<br /><br />%s<br /><br />%ls", plat_get_string(STRING_NET_ERROR), net_drv_error, plat_get_string(STRING_NET_ERROR_DESC));
swprintf(tempmsg, sizeof_w(tempmsg), L"%ls:\n\n%s\n\n%ls", plat_get_string(STRING_NET_ERROR), net_drv_error, plat_get_string(STRING_NET_ERROR_DESC));
ui_msgbox(MBX_ERROR, tempmsg);
net_cards_conf[net_card_current].net_type = NET_TYPE_NONE;
}
@@ -577,6 +578,7 @@ void
network_reset(void)
{
ui_sb_update_icon(SB_NETWORK, 0);
ui_sb_update_icon_write(SB_NETWORK, 0);
#ifdef ENABLE_NETWORK_LOG
network_dump_mutex = thread_create_mutex();

10
src/qt/CMakeLists.txt
View File

@@ -137,6 +137,11 @@ add_library(ui STATIC
qt_joystickconfiguration.cpp
qt_joystickconfiguration.hpp
qt_joystickconfiguration.ui
qt_keybind.cpp
qt_keybind.hpp
qt_keybind.ui
qt_singlekeyseqedit.cpp
qt_singlekeyseqedit.hpp
qt_filefield.cpp
qt_filefield.hpp
@@ -207,6 +212,10 @@ if(WACOM)
target_compile_definitions(ui PRIVATE USE_WACOM)
endif()
if(CDROM_MITSUMI)
target_compile_definitions(ui PRIVATE USE_CDROM_MITSUMI)
endif()
if(WIN32)
enable_language(RC)
target_sources(86Box PUBLIC 86Box-qt.rc)
@@ -444,6 +453,7 @@ if (UNIX AND NOT APPLE AND NOT HAIKU)
set(WL_SOURCE_VAR)
ecm_add_wayland_client_protocol(WL_SOURCE_VAR PROTOCOL ${CMAKE_SOURCE_DIR}/wl_protocols/relative-pointer-unstable-v1.xml BASENAME relative-pointer-unstable-v1)
ecm_add_wayland_client_protocol(WL_SOURCE_VAR PROTOCOL ${CMAKE_SOURCE_DIR}/wl_protocols/pointer-constraints-unstable-v1.xml BASENAME pointer-constraints-unstable-v1)
ecm_add_wayland_client_protocol(WL_SOURCE_VAR PROTOCOL ${CMAKE_SOURCE_DIR}/wl_protocols/keyboard-shortcuts-inhibit-unstable-v1.xml BASENAME keyboard-shortcuts-inhibit-unstable-v1)
target_include_directories(ui PRIVATE ${CMAKE_CURRENT_BINARY_DIR} ${Qt${QT_MAJOR}Gui_PRIVATE_INCLUDE_DIRS})
target_sources(ui PRIVATE ${WL_SOURCE_VAR} wl_mouse.cpp)
if (XKBCOMMON_FOUND)

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