mirror/86Box
1
0
Fork 0
mirror of https://github.com/86Box/86Box.git synced 2026-02-23 18:08:20 -07:00
Code Issues Packages Projects Releases Activity

Remove various unused ega_t fields and lots of unused 8514 stuff

Browse Source
This commit is contained in:
starfrost013
2025-06-21 00:39:50 +01:00
parent c826294a96
commit bba8f4d499
11 changed files with 101 additions and 199 deletions
Download Patch File Download Diff File Expand all files Collapse all files

39
src/include/86box/vid_8514a.h
View File

@@ -18,6 +18,8 @@
#ifndef VIDEO_8514A_H
#define VIDEO_8514A_H
#include <stdbool.h>
#define INT_VSY (1 << 0)
#define INT_GE_BSY (1 << 1)
#define INT_FIFO_OVR (1 << 2)
@@ -92,18 +94,14 @@ typedef struct ibm8514_t {
int dac_r;
int dac_g;
int dac_b;
int internal_pitch;
int hwcursor_on;
int modechange;
uint64_t dispontime;
uint64_t dispofftime;
struct {
uint16_t subsys_cntl;
uint16_t setup_md;
uint16_t advfunc_cntl;
uint16_t advfunc_cntl_old;
uint16_t cur_y;
uint16_t cur_x;
int16_t destx;
@@ -132,35 +130,24 @@ typedef struct ibm8514_t {
int16_t clip_left;
int16_t clip_top;
uint8_t pix_trans[2];
int poly_draw;
int ssv_state;
int x1;
int x2;
int x3;
int y1;
int y2;
int temp_cnt;
int16_t dx_ibm;
int16_t dy_ibm;
int16_t cx;
int16_t cx_back;
int16_t cy;
int16_t oldcx;
/* oldcx was not used! */
int16_t oldcy;
int16_t sx;
int16_t sy;
int16_t dx;
int16_t dy;
int16_t err;
uint32_t src;
uint32_t dest;
int x_count;
int xx_count;
int y_count;
int input;
int input2;
int output;
int output2;
int ssv_len;
int ssv_len_back;
@@ -179,20 +166,12 @@ typedef struct ibm8514_t {
uint32_t dst_ge_offset;
uint16_t src_pitch;
uint16_t dst_pitch;
int64_t cur_x_24bpp;
int64_t cur_y_24bpp;
int64_t dest_x_24bpp;
int64_t dest_y_24bpp;
} accel;
uint16_t test;
int h_blankstart;
int h_blank_end_val;
int hblankstart;
int hblank_end_val;
int hblankend;
int hblank_ext;
int hblank_sub;
int v_total_reg;
int v_total;
@@ -202,12 +181,10 @@ typedef struct ibm8514_t {
int split;
int h_disp;
int h_total;
int h_sync_width;
int h_disp_time;
int rowoffset;
int dispon;
int hdisp_on;
int linecountff;
int hdispon;
int vc;
int linepos;
int oddeven;
@@ -241,9 +218,7 @@ typedef struct ibm8514_t {
int vsyncwidth;
int vtotal;
int v_disp;
int v_disp2;
int vdisp;
int vdisp2;
int disp_cntl;
int interlace;
uint16_t subsys_cntl;
@@ -255,15 +230,15 @@ typedef struct ibm8514_t {
int blitter_busy;
uint64_t blitter_time;
uint64_t status_time;
int pitch;
int ext_pitch;
int ext_crt_pitch;
ibm8514_extensions_t extensions;
int onboard;
int linear;
bool vram_is_512k;
uint32_t vram_amount;
int vram_512k_8514;
int vendor_mode;
int _8514on;
int _8514crt;

127
src/include/86box/vid_ega.h
View File

@@ -13,14 +13,18 @@
*
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
* Connor Hyde / starfrost, <mario64crashed@gmail.com>
*
* Copyright 2008-2020 Sarah Walker.
* Copyright 2016-2020 Miran Grca.
* Copyright 2025 Connor Hyde.
*/
#ifndef VIDEO_EGA_H
#define VIDEO_EGA_H
#include <stdbool.h>
#if defined(EMU_MEM_H) && defined(EMU_ROM_H)
typedef struct ega_t {
mem_mapping_t mapping;
@@ -57,65 +61,52 @@ typedef struct ega_t {
uint16_t light_pen;
int vidclock;
int fast;
int extvram;
int vres;
int readmode;
int writemode;
int readplane;
int vrammask;
int chain4;
int chain2_read;
int chain2_write;
int cursorvisible;
int oddeven_page;
int oddeven_chain;
int vc;
int real_vc;
int scanline;
int dispon;
int hdisp_on;
int cursoron;
int blink;
int fullchange;
int linepos;
int vslines;
int linecountff;
int oddeven;
int lowres;
int interlace;
int linedbl;
int lindebl;
int rowcount;
int vtotal;
int dispend;
int vsyncstart;
int split;
int hdisp;
int hdisp_old;
int htotal;
int hdisp_time;
int rowoffset;
int vblankstart;
int scrollcache;
int firstline;
int lastline;
int firstline_draw;
int lastline_draw;
int x_add;
int y_add;
int displine;
int res_x;
int res_y;
int bpp;
int index;
int remap_required;
int actual_type;
int chipset;
int mono_display;
int32_t vidclock;
int32_t vres;
int32_t readmode;
int32_t writemode;
int32_t readplane;
int32_t vrammask;
int32_t chain4;
int32_t chain2_read;
int32_t chain2_write;
int32_t cursorvisible;
int32_t vc;
int32_t real_vc;
int32_t scanline;
int32_t dispon;
int32_t cursoron;
int32_t blink;
int32_t fullchange;
int32_t linepos;
int32_t vslines;
int32_t linecountff;
int32_t oddeven;
int32_t interlace;
int32_t linedbl;
int32_t rowcount;
int32_t vtotal;
int32_t dispend;
int32_t vsyncstart;
int32_t split;
int32_t hdisp;
int32_t htotal;
int32_t rowoffset;
int32_t vblankstart;
int32_t scrollcache;
int32_t firstline;
int32_t lastline;
int32_t firstline_draw;
int32_t lastline_draw;
int32_t x_add;
int32_t y_add;
int32_t displine;
int32_t index;
bool remap_required;
int32_t actual_type;
int32_t chipset;
int mda_attr_to_color_table[256][2][2];
int32_t mda_attr_to_color_table[256][2][2];
uint32_t charseta;
uint32_t charsetb;
@@ -164,7 +155,7 @@ extern const device_t jega_device;
extern const device_t jvga_device;
#endif
extern int update_overscan;
extern int32_t update_overscan;
#define DISPLAY_RGB 0
#define DISPLAY_COMPOSITE 1
@@ -174,7 +165,7 @@ extern int update_overscan;
#define DISPLAY_WHITE 5
#if defined(EMU_MEM_H) && defined(EMU_ROM_H)
extern void ega_init(ega_t *ega, int monitor_type, int is_mono);
extern void ega_init(ega_t *ega, int32_t monitor_type, int32_t is_mono);
extern void ega_recalctimings(struct ega_t *ega);
extern void ega_recalc_remap_func(struct ega_t *ega);
#endif
@@ -186,18 +177,18 @@ extern void ega_write(uint32_t addr, uint8_t val, void *priv);
extern uint8_t ega_read(uint32_t addr, void *priv);
extern void ega_set_type(void *priv, uint32_t local);
extern int firstline_draw;
extern int lastline_draw;
extern int displine;
extern int scanline;
extern int32_t firstline_draw;
extern int32_t lastline_draw;
extern int32_t displine;
extern int32_t scanline;
extern uint32_t memaddr;
extern uint32_t cursoraddr;
extern int cursorvisible;
extern int cursoron;
extern int cgablink;
extern int32_t cursorvisible;
extern int32_t cursoron;
extern int32_t cgablink;
extern int scrollcache;
extern int32_t scrollcache;
extern uint8_t edatlookup[4][4];
extern uint8_t egaremap2bpp[256];

1
src/include/86box/vid_svga.h
View File

@@ -98,7 +98,6 @@ typedef struct svga_t {
int hdisp_time;
int rowoffset;
int dispon;
int hdisp_on;
int vc;
int scanline;
int linepos;

13
src/video/vid_8514a.c
View File

@@ -520,7 +520,6 @@ ibm8514_accel_out_fifo(svga_t *svga, uint16_t port, uint32_t val, int len)
case 0x92e8:
if (len == 2) {
dev->test = val;
dev->accel.err_term = val & 0x3fff;
if (val & 0x2000)
dev->accel.err_term |= ~0x1fff;
@@ -790,7 +789,7 @@ ibm8514_accel_in_fifo(svga_t *svga, uint16_t port, int len)
case 0x92e8:
if (len == 2)
temp = dev->test;
temp = dev->accel.err_term;
break;
case 0x96e8:
@@ -968,7 +967,7 @@ ibm8514_accel_in(uint16_t port, svga_t *svga)
dev->data_available2 = 0;
temp |= INT_FIFO_EMP;
}
temp |= (dev->subsys_stat | (dev->vram_512k_8514 ? 0x00 : 0x80));
temp |= (dev->subsys_stat | (dev->vram_is_512k ? 0x00 : 0x80));
temp |= 0x20;
}
break;
@@ -2430,7 +2429,7 @@ skip_nibble_rect_write:
((compare_mode == 0x28) && (dest_dat == compare)) ||
((compare_mode == 0x30) && (dest_dat <= compare)) ||
((compare_mode == 0x38) && (dest_dat > compare))) {
ibm8514_log("Results c(%d,%d):rdmask=%02x, wrtmask=%02x, mix=%02x, destdat=%02x, nowrite=%d.\n", dev->accel.cx, dev->accel.cy, rd_mask_polygon, wrt_mask, mix_dat, dest_dat, dev->accel.cx_back);
ibm8514_log("Results c(%d,%d):rdmask=%02x, wrtmask=%02x, mix=%02x, destdat=%02x\n", dev->accel.cx, dev->accel.cy, rd_mask_polygon, wrt_mask, mix_dat, dest_dat);
WRITE(dev->accel.dest + dev->accel.cx, dest_dat);
}
} else
@@ -3679,7 +3678,6 @@ ibm8514_poll(void *priv)
dev->linepos = 1;
if (dev->dispon) {
dev->hdisp_on = 1;
dev->memaddr &= dev->vram_mask;
@@ -3722,7 +3720,6 @@ ibm8514_poll(void *priv)
timer_advance_u64(&svga->timer, dev->dispontime);
if (dev->dispon)
svga->cgastat &= ~1;
dev->hdisp_on = 0;
dev->linepos = 0;
if (dev->dispon) {
@@ -3862,7 +3859,7 @@ ibm8514_recalctimings(svga_t *svga)
dev->pitch = 1024;
dev->rowoffset = 0x80;
if (dev->vram_512k_8514) {
if (dev->vram_is_512k) {
if (dev->h_disp == 640)
dev->pitch = 640;
}
@@ -3947,7 +3944,7 @@ ibm8514_init(const device_t *info)
svga->ext8514 = NULL;
dev->vram_amount = device_get_config_int("memory");
dev->vram_512k_8514 = dev->vram_amount == 512;
dev->vram_is_512k = dev->vram_amount == 512;
dev->vram_size = dev->vram_amount << 10;
dev->vram = calloc(dev->vram_size, 1);
dev->changedvram = calloc((dev->vram_size >> 12) + 1, 1);

8
src/video/vid_ati_mach64.c
View File

@@ -255,9 +255,6 @@ typedef struct mach64_t {
event_t *wake_fifo_thread;
event_t *fifo_not_full_event;
uint64_t blitter_time;
uint64_t status_time;
uint16_t pci_id;
uint32_t config_chip_id;
uint32_t block_decoded_io;
@@ -1189,8 +1186,6 @@ fifo_thread(void *param)
thread_reset_event(mach64->wake_fifo_thread);
mach64->blitter_busy = 1;
while (!FIFO_EMPTY) {
uint64_t start_time = plat_timer_read();
uint64_t end_time;
fifo_entry_t *fifo = &mach64->fifo[mach64->fifo_read_idx & FIFO_MASK];
switch (fifo->addr_type & FIFO_TYPE) {
@@ -1213,9 +1208,6 @@ fifo_thread(void *param)
if (FIFO_ENTRIES > 0xe000)
thread_set_event(mach64->fifo_not_full_event);
end_time = plat_timer_read();
mach64->blitter_time += end_time - start_time;
}
mach64->blitter_busy = 0;
}

60
src/video/vid_ati_mach8.c
View File

@@ -2835,7 +2835,7 @@ ati8514_recalctimings(svga_t *svga)
mach_log("cntl=%d, hv(%d,%d), pitch=%d, rowoffset=%d, gextconfig=%03x, shadow=%x interlace=%d.\n",
dev->accel.advfunc_cntl & 0x04, dev->h_disp, dev->dispend, dev->pitch, dev->rowoffset,
mach->accel.ext_ge_config & 0xcec0, mach->shadow_set & 3, dev->interlace);
if (dev->vram_512k_8514) {
if (dev->vram_is_512k) {
if (dev->h_disp == 640)
dev->pitch = 640;
else
@@ -2917,7 +2917,7 @@ mach_recalctimings(svga_t *svga)
mach->accel.crt_offset <<= 2;
}
if (ATI_MACH32 && !dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if (ATI_MACH32 && !dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
dev->accel.ge_offset <<= 1;
mach->accel.crt_offset <<= 1;
}
@@ -2960,7 +2960,7 @@ mach_recalctimings(svga_t *svga)
mach->accel.src_ge_offset <<= 2;
mach->accel.dst_ge_offset <<= 2;
}
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
mach->accel.src_ge_offset <<= 1;
mach->accel.dst_ge_offset <<= 1;
}
@@ -2979,7 +2979,7 @@ mach_recalctimings(svga_t *svga)
else
mach->accel.dst_ge_offset <<= 2;
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00))
mach->accel.dst_ge_offset <<= 1;
mach->accel.dst_ge_offset -= mach->accel.crt_offset;
@@ -2994,7 +2994,7 @@ mach_recalctimings(svga_t *svga)
else
mach->accel.src_ge_offset <<= 2;
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00))
mach->accel.src_ge_offset <<= 1;
mach->accel.src_ge_offset -= mach->accel.crt_offset;
@@ -3015,7 +3015,7 @@ mach_recalctimings(svga_t *svga)
switch (dev->accel_bpp) {
case 8:
if ((mach->accel.ext_ge_config & 0x30) == 0x00) {
if (dev->vram_512k_8514) {
if (dev->vram_is_512k) {
if (dev->h_disp == 640)
dev->pitch = 640;
else
@@ -3056,7 +3056,7 @@ mach_recalctimings(svga_t *svga)
mach_log("cntl=%d, clksel=%x, hv(%d,%d), pitch=%d, rowoffset=%d, gextconfig=%03x, shadow=%x interlace=%d, vgahdisp=%d.\n",
dev->accel.advfunc_cntl & 0x04, mach->accel.clock_sel & 0x01, dev->h_disp, dev->dispend, dev->pitch, dev->rowoffset,
mach->accel.ext_ge_config & 0xcec0, mach->shadow_set & 0x03, dev->interlace, svga->hdisp);
if (dev->vram_512k_8514) {
if (dev->vram_is_512k) {
if (dev->h_disp == 640)
dev->pitch = 640;
else
@@ -3236,7 +3236,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u
dev->v_disp &= 0x1fff;
}
}
mach_log("ATI 8514/A: V_DISP write 16E8=%d, vdisp2=%d.\n", dev->v_disp, dev->v_disp2);
mach_log("ATI 8514/A: V_DISP write 16E8=%d\n", dev->v_disp);
mach_log("ATI 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val);
} else {
if ((mach->accel.clock_sel & 0x01) || (!(mach->accel.clock_sel & 0x01) && (mach->shadow_set & 0x03))) { /*For 8514/A mode, take the shadow sets into account.*/
@@ -3256,7 +3256,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u
dev->v_disp &= 0x1fff;
}
}
mach_log("ATI 8514/A: V_DISP write 16E8=%d, vdisp2=%d.\n", dev->v_disp, dev->v_disp2);
mach_log("ATI 8514/A: V_DISP write 16E8=%d.\n", dev->v_disp);
mach_log("ATI 8514/A: (0x%04x): vdisp=0x%02x.\n", port, val);
}
svga_recalctimings(svga);
@@ -3594,7 +3594,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u
}
mach->cursor_offset_lo = mach->cursor_offset_lo_reg;
dev->hwcursor.addr = ((mach->cursor_offset_lo | (mach->cursor_offset_hi << 16)) << 2);
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00))
dev->hwcursor.addr <<= 1;
break;
@@ -3607,7 +3607,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u
dev->hwcursor.ena = !!(mach->cursor_offset_hi_reg & 0x8000);
mach->cursor_offset_hi = mach->cursor_offset_hi_reg & 0x0f;
dev->hwcursor.addr = ((mach->cursor_offset_lo | (mach->cursor_offset_hi << 16)) << 2);
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00))
dev->hwcursor.addr <<= 1;
break;
@@ -4794,7 +4794,7 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev)
temp |= INT_FIFO_EMP;
mach_log("Fifo Empty.\n");
}
temp |= (dev->subsys_stat | (dev->vram_512k_8514 ? 0x00 : 0x80));
temp |= (dev->subsys_stat | (dev->vram_is_512k ? 0x00 : 0x80));
if (mach->accel.ext_ge_config & 0x08)
temp |= ((mach->accel.ext_ge_config & 0x07) << 4);
else
@@ -5231,12 +5231,12 @@ mach32_write_common(uint32_t addr, uint8_t val, int linear, mach_t *mach, svga_t
cycles -= svga->monitor->mon_video_timing_write_b;
if (linear) {
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00))
addr <<= 1;
addr &= dev->vram_mask;
dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
switch (addr & 0x06) {
case 0x00:
case 0x06:
@@ -5387,7 +5387,7 @@ mach32_write(uint32_t addr, uint8_t val, void *priv)
return;
}
if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if ((ATI_MACH32 && !dev->vram_is_512k) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
addr <<= 1;
switch (addr & 0x06) {
case 0x00:
@@ -5427,7 +5427,7 @@ mach32_writew(uint32_t addr, uint16_t val, void *priv)
return;
}
if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if ((ATI_MACH32 && !dev->vram_is_512k) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
addr <<= 1;
if (addr & 0x04) {
mach32_write_common(addr - 2, val & 0x0f, 0, mach, svga);
@@ -5462,7 +5462,7 @@ mach32_writel(uint32_t addr, uint32_t val, void *priv)
return;
}
if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if ((ATI_MACH32 && !dev->vram_is_512k) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
addr <<= 1;
mach32_write_common(addr, val & 0x0f, 0, mach, svga);
mach32_write_common(addr + 1, (val >> 4) & 0x0f, 0, mach, svga);
@@ -5705,12 +5705,12 @@ mach32_writew_linear(uint32_t addr, uint16_t val, mach_t *mach)
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
cycles -= svga->monitor->mon_video_timing_write_w;
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00))
addr <<= 1;
addr &= dev->vram_mask;
dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if (addr & 0x04) {
dev->vram[addr - 2] = val & 0x0f;
dev->vram[addr - 1] = (val >> 4) & 0x0f;
@@ -5734,12 +5734,12 @@ mach32_writel_linear(uint32_t addr, uint32_t val, mach_t *mach)
cycles -= svga->monitor->mon_video_timing_write_l;
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00))
addr <<= 1;
addr &= dev->vram_mask;
dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
dev->vram[addr] = val & 0x0f;
dev->vram[addr + 1] = (val >> 4) & 0x0f;
dev->vram[addr + 4] = (val >> 8) & 0x0f;
@@ -5765,11 +5765,11 @@ mach32_read_common(uint32_t addr, int linear, mach_t *mach, svga_t *svga)
cycles -= svga->monitor->mon_video_timing_read_b;
if (linear) {
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00))
addr <<= 1;
addr &= dev->vram_mask;
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
switch ((addr & 0x06) >> 1) {
case 0x00:
case 0x03:
@@ -5879,7 +5879,7 @@ mach32_read(uint32_t addr, void *priv)
(void) xga_read_test(addr, svga);
addr = (addr & svga->banked_mask) + svga->read_bank;
if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if ((ATI_MACH32 && !dev->vram_is_512k) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
addr <<= 1;
switch ((addr & 0x06) >> 1) {
case 0x00:
@@ -5916,7 +5916,7 @@ mach32_readw(uint32_t addr, void *priv)
(void) xga_read_test(addr, svga);
addr = (addr & svga->banked_mask) + svga->read_bank;
if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if ((ATI_MACH32 && !dev->vram_is_512k) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
addr <<= 1;
if (addr & 0x04) {
ret = mach32_read_common(addr - 2, 0, mach, svga) & 0x0f;
@@ -5948,7 +5948,7 @@ mach32_readl(uint32_t addr, void *priv)
(void) xga_read_test(addr, svga);
addr = (addr & svga->banked_mask) + svga->read_bank;
if ((ATI_MACH32 && !dev->vram_512k_8514) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if ((ATI_MACH32 && !dev->vram_is_512k) && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
addr <<= 1;
ret = mach32_read_common(addr, 0, mach, svga) & 0x0f;
ret |= (mach32_read_common(addr + 1, 0, mach, svga) << 4);
@@ -5976,7 +5976,7 @@ mach32_readw_linear(uint32_t addr, mach_t *mach)
uint16_t ret;
cycles -= svga->monitor->mon_video_timing_read_w;
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
addr <<= 1;
addr &= dev->vram_mask;
if (addr & 0x04) {
@@ -6004,7 +6004,7 @@ mach32_readl_linear(uint32_t addr, mach_t *mach)
uint32_t ret;
cycles -= svga->monitor->mon_video_timing_read_l;
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00)) {
addr <<= 1;
addr &= dev->vram_mask;
ret = dev->vram[addr] & 0x0f;
@@ -6301,7 +6301,7 @@ mach32_hwcursor_draw(svga_t *svga, int displine)
int shift = 0;
offset = dev->hwcursor_latch.x - dev->hwcursor_latch.xoff;
if (!dev->vram_512k_8514 && ((mach->accel.ext_ge_config & 0x30) == 0x00))
if (!dev->vram_is_512k && ((mach->accel.ext_ge_config & 0x30) == 0x00))
shift = 1;
mach_log("BPP=%d, displine=%d.\n", dev->accel_bpp, displine);
@@ -7070,7 +7070,7 @@ mach8_init(const device_t *info)
mach->has_bios = !(info->local & 0xff00);
mach->ramdac_type = mach->pci_bus ? device_get_config_int("ramdac") : 1;
dev->vram_amount = device_get_config_int("memory");
dev->vram_512k_8514 = dev->vram_amount == 512;
dev->vram_is_512k = dev->vram_amount == 512;
if (ATI_MACH32) {
if (mach->pci_bus) {

5
src/video/vid_ega.c
View File

@@ -663,7 +663,6 @@ ega_recalctimings(ega_t *ega)
ega->hdisp *= (ega->seqregs[1] & 8) ? 16 : 8;
ega->render = ega_render_graphics;
}
ega->hdisp_old = ega->hdisp;
}
if (ega->chipset) {
@@ -841,7 +840,6 @@ ega_poll(void *priv)
ega->linepos = 1;
if (ega->dispon) {
ega->hdisp_on = 1;
ega->memaddr &= ega->vrammask;
if (ega->firstline == 2000) {
@@ -897,7 +895,6 @@ ega_poll(void *priv)
if (ega->dispon)
ega->status &= ~1;
ega->hdisp_on = 0;
ega->linepos = 0;
if ((ega->scanline == (ega->crtc[11] & 31)) || (ega->scanline == ega->rowcount))
@@ -1539,10 +1536,8 @@ ega_init(ega_t *ega, int monitor_type, int is_mono)
old_overscan_color = 0;
ega->miscout |= 0x22;
ega->oddeven_page = 0;
ega->seqregs[4] |= 2;
ega->extvram = 1;
update_overscan = 0;

7
src/video/vid_mga.c
View File

@@ -474,8 +474,6 @@ typedef struct mystique_t {
atomic_uint status;
atomic_bool softrap_status_read;
uint64_t blitter_time, status_time;
pc_timer_t softrap_pending_timer, wake_timer;
fifo_entry_t fifo[FIFO_SIZE];
@@ -6048,8 +6046,6 @@ static void
mystique_start_blit(mystique_t *mystique)
{
svga_t *svga = &mystique->svga;
uint64_t start_time = plat_timer_read();
uint64_t end_time;
/*Make sure we don't get any artifacts.*/
svga->chain2_write = 0;
@@ -6119,9 +6115,6 @@ mystique_start_blit(mystique_t *mystique)
fatal("mystique_start_blit: unknown blit %08x\n", mystique->dwgreg.dwgctrl_running & DWGCTRL_OPCODE_MASK);
break;
}
end_time = plat_timer_read();
mystique->blitter_time += end_time - start_time;
}
static void

3
src/video/vid_ps55da2.c
View File

@@ -356,7 +356,6 @@ typedef struct da2_t {
uint64_t da2const;
int dispon;
int hdisp_on;
uint32_t memaddr, memaddr_backup, cursoraddr;
int vc;
@@ -3020,7 +3019,6 @@ da2_poll(void *priv)
da2->linepos = 1;
if (da2->dispon) {
da2->hdisp_on = 1;
da2->memaddr &= da2->vram_display_mask;
if (da2->firstline == 2000) {
@@ -3052,7 +3050,6 @@ da2_poll(void *priv)
if (da2->dispon)
da2->cgastat &= ~1;
da2->hdisp_on = 0;
da2->linepos = 0;
if (da2->scanline == (da2->crtc[LC_CURSOR_ROW_END] & 31))

8
src/video/vid_s3.c
View File

@@ -375,8 +375,6 @@ typedef struct s3_t {
event_t *fifo_not_full_event;
atomic_int blitter_busy;
uint64_t blitter_time;
uint64_t status_time;
uint8_t subsys_cntl, subsys_stat;
@@ -9698,8 +9696,6 @@ static void
fifo_thread(void *param)
{
s3_t *s3 = (s3_t *) param;
uint64_t start_time;
uint64_t end_time;
while (s3->fifo_thread_run) {
thread_set_event(s3->fifo_not_full_event);
@@ -9707,7 +9703,6 @@ fifo_thread(void *param)
thread_reset_event(s3->wake_fifo_thread);
s3->blitter_busy = 1;
while (!FIFO_EMPTY) {
start_time = plat_timer_read();
fifo_entry_t *fifo = &s3->fifo[s3->fifo_read_idx & FIFO_MASK];
switch (fifo->addr_type & FIFO_TYPE) {
@@ -9739,9 +9734,6 @@ fifo_thread(void *param)
if (FIFO_ENTRIES > 0xe000)
thread_set_event(s3->fifo_not_full_event);
end_time = plat_timer_read();
s3->blitter_time += (end_time - start_time);
}
s3->blitter_busy = 0;
s3->subsys_stat |= INT_FIFO_EMP;

29
src/video/vid_svga.c
View File

@@ -972,33 +972,6 @@ svga_recalctimings(svga_t *svga)
}
}
#ifdef TBD
if (ibm8514_active && (svga->dev8514 != NULL)) {
if (dev->on) {
uint32_t dot8514 = dev->h_blankstart;
uint32_t adj_dot8514 = dev->h_blankstart;
uint32_t eff_mask8514 = 0x0000001f;
dev->hblank_sub = 0;
while (adj_dot8514 < (dev->h_total << 1)) {
if (dot8514 == dev->h_total)
dot8514 = 0;
if (adj_dot8514 >= dev->h_total)
dev->hblank_sub++;
if ((dot8514 & eff_mask8514) == (dev->h_blank_end_val & eff_mask8514))
break;
dot8514++;
adj_dot8514++;
}
dev->h_disp -= dev->hblank_sub;
}
}
#endif
if (svga->vblankstart < svga->dispend) {
svga_log("DISPEND > VBLANKSTART.\n");
svga->dispend = svga->vblankstart;
@@ -1281,7 +1254,6 @@ svga_poll(void *priv)
svga->linepos = 1;
if (svga->dispon) {
svga->hdisp_on = 1;
svga->memaddr &= svga->vram_display_mask;
if (svga->firstline == 2000) {
@@ -1328,7 +1300,6 @@ svga_poll(void *priv)
if (svga->dispon)
svga->cgastat &= ~1;
svga->hdisp_on = 0;
svga->linepos = 0;
if ((svga->scanline == (svga->crtc[11] & 31)) || (svga->scanline == svga->rowcount))