mirror of
https://github.com/86Box/86Box.git
synced 2026-02-23 18:08:20 -07:00
Merge remote-tracking branch 'origin/master' into version/4.1
This commit is contained in:
@@ -9,5 +9,6 @@ zlib
|
||||
libpng
|
||||
rtmidi
|
||||
libslirp
|
||||
fluidsynth
|
||||
qt5-static
|
||||
qt5-translations
|
||||
|
||||
@@ -331,7 +331,7 @@ viso_fill_fn_short(char *data, const viso_entry_t *entry, viso_entry_t **entries
|
||||
}
|
||||
|
||||
/* Check if this filename is unique, and add a tail if required, while also adding the extension. */
|
||||
char tail[8];
|
||||
char tail[16];
|
||||
for (int i = force_tail; i <= 999999; i++) {
|
||||
/* Add tail to the filename if this is not the first run. */
|
||||
int tail_len = -1;
|
||||
|
||||
@@ -13,13 +13,14 @@
|
||||
# Copyright 2020-2021 David Hrdlička.
|
||||
#
|
||||
|
||||
add_library(chipset OBJECT 82c100.c acc2168.c cs8230.c ali1429.c ali1435.c ali1489.c ali1531.c ali1541.c ali1543.c
|
||||
ali1621.c ali6117.c headland.c ims8848.c intel_82335.c contaq_82c59x.c cs4031.c intel_420ex.c
|
||||
intel_4x0.c intel_i450kx.c intel_sio.c intel_piix.c ../ioapic.c neat.c opti283.c opti291.c opti391.c
|
||||
opti495.c opti822.c opti895.c opti5x7.c scamp.c scat.c sis_85c310.c sis_85c4xx.c
|
||||
sis_85c496.c sis_85c50x.c sis_5511.c sis_5571.c via_vt82c49x.c via_vt82c505.c sis_85c310.c
|
||||
sis_85c4xx.c sis_85c496.c sis_85c50x.c gc100.c stpc.c umc_8886.c umc_hb4.c via_apollo.c
|
||||
via_pipc.c vl82c480.c wd76c10.c)
|
||||
add_library(chipset OBJECT 82c100.c acc2168.c cs8230.c ali1429.c ali1435.c ali1489.c
|
||||
ali1531.c ali1541.c ali1543.c ali1621.c ali6117.c headland.c ims8848.c intel_82335.c
|
||||
compaq_386.c contaq_82c59x.c cs4031.c intel_420ex.c intel_4x0.c intel_i450kx.c
|
||||
intel_sio.c intel_piix.c ../ioapic.c neat.c opti283.c opti291.c opti391.c opti495.c
|
||||
opti602.c opti822.c opti895.c opti5x7.c scamp.c scat.c sis_85c310.c sis_85c4xx.c
|
||||
sis_85c496.c sis_85c50x.c sis_5511.c sis_5571.c via_vt82c49x.c via_vt82c505.c
|
||||
sis_85c310.c sis_85c4xx.c sis_85c496.c sis_85c50x.c gc100.c stpc.c umc_8886.c
|
||||
umc_hb4.c via_apollo.c via_pipc.c vl82c480.c wd76c10.c)
|
||||
|
||||
if(OLIVETTI)
|
||||
target_sources(chipset PRIVATE olivetti_eva.c)
|
||||
|
||||
761
src/chipset/compaq_386.c
Normal file
761
src/chipset/compaq_386.c
Normal file
@@ -0,0 +1,761 @@
|
||||
/*
|
||||
* 86Box A hypervisor and IBM PC system emulator that specializes in
|
||||
* running old operating systems and software designed for IBM
|
||||
* PC systems and compatibles from 1981 through fairly recent
|
||||
* system designs based on the PCI bus.
|
||||
*
|
||||
* This file is part of the 86Box distribution.
|
||||
*
|
||||
* Emulation of the Compaq 386 memory controller.
|
||||
*
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
*
|
||||
* Copyright 2023 Miran Grca.
|
||||
*/
|
||||
#include <stdio.h>
|
||||
#include <stdint.h>
|
||||
#include <string.h>
|
||||
#include <stdlib.h>
|
||||
#include <wchar.h>
|
||||
#include <math.h>
|
||||
#include <86box/86box.h>
|
||||
#include "cpu.h"
|
||||
#include <86box/io.h>
|
||||
#include <86box/timer.h>
|
||||
#include <86box/pit.h>
|
||||
#include <86box/mem.h>
|
||||
#include <86box/rom.h>
|
||||
#include <86box/device.h>
|
||||
#include <86box/keyboard.h>
|
||||
#include <86box/fdd.h>
|
||||
#include <86box/fdc.h>
|
||||
#include <86box/fdc_ext.h>
|
||||
#include <86box/hdc.h>
|
||||
#include <86box/hdc_ide.h>
|
||||
#include <86box/machine.h>
|
||||
#include <86box/video.h>
|
||||
#include <86box/vid_cga.h>
|
||||
#include <86box/vid_cga_comp.h>
|
||||
#include <86box/plat_unused.h>
|
||||
|
||||
#define RAM_DIAG_L_BASE_MEM_640KB 0x00
|
||||
#define RAM_DIAG_L_BASE_MEM_INV 0x10
|
||||
#define RAM_DIAG_L_BASE_MEM_512KB 0x20
|
||||
#define RAM_DIAG_L_BASE_MEM_256KB 0x30
|
||||
#define RAM_DIAG_L_BASE_MEM_MASK 0x30
|
||||
#define RAM_DIAG_L_PERMA_BITS 0x80
|
||||
|
||||
#define RAM_DIAG_H_SYS_RAM_4MB 0x01
|
||||
#define RAM_DIAG_H_SYS_RAM_1MB 0x02
|
||||
#define RAM_DIAG_H_SYS_RAM_NONE 0x03
|
||||
#define RAM_DIAG_H_SYS_RAM_MASK 0x03
|
||||
#define RAM_DIAG_H_MOD_A_RAM_4MB 0x04
|
||||
#define RAM_DIAG_H_MOD_A_RAM_1MB 0x08
|
||||
#define RAM_DIAG_H_MOD_A_RAM_NONE 0x0c
|
||||
#define RAM_DIAG_H_MOD_A_RAM_MASK 0x0c
|
||||
#define RAM_DIAG_H_MOD_B_RAM_4MB 0x10
|
||||
#define RAM_DIAG_H_MOD_B_RAM_1MB 0x20
|
||||
#define RAM_DIAG_H_MOD_B_RAM_NONE 0x30
|
||||
#define RAM_DIAG_H_MOD_B_RAM_MASK 0x30
|
||||
#define RAM_DIAG_H_MOD_C_RAM_4MB 0x40
|
||||
#define RAM_DIAG_H_MOD_C_RAM_1MB 0x80
|
||||
#define RAM_DIAG_H_MOD_C_RAM_NONE 0xc0
|
||||
#define RAM_DIAG_H_MOD_C_RAM_MASK 0xc0
|
||||
|
||||
#define MEM_STATE_BUS 0x00
|
||||
#define MEM_STATE_SYS 0x01
|
||||
#define MEM_STATE_SYS_RELOC 0x02
|
||||
#define MEM_STATE_MOD_A 0x04
|
||||
#define MEM_STATE_MOD_B 0x08
|
||||
#define MEM_STATE_MOD_C 0x10
|
||||
#define MEM_STATE_MASK (MEM_STATE_SYS | MEM_STATE_MOD_A | MEM_STATE_MOD_B | MEM_STATE_MOD_C)
|
||||
#define MEM_STATE_WP 0x20
|
||||
|
||||
typedef struct cpq_ram_t {
|
||||
uint8_t wp;
|
||||
|
||||
uint32_t phys_base;
|
||||
uint32_t virt_base;
|
||||
|
||||
mem_mapping_t mapping;
|
||||
} cpq_ram_t;
|
||||
|
||||
typedef struct cpq_386_t {
|
||||
uint8_t regs[8];
|
||||
|
||||
uint8_t old_state[256];
|
||||
uint8_t mem_state[256];
|
||||
|
||||
uint32_t ram_bases[4];
|
||||
|
||||
uint32_t ram_sizes[4];
|
||||
uint32_t ram_map_sizes[4];
|
||||
|
||||
cpq_ram_t ram[4][64];
|
||||
cpq_ram_t high_ram[16];
|
||||
|
||||
mem_mapping_t regs_mapping;
|
||||
} cpq_386_t;
|
||||
|
||||
static uint8_t
|
||||
cpq_read_ram(uint32_t addr, void *priv)
|
||||
{
|
||||
const cpq_ram_t *dev = (cpq_ram_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
addr = (addr - dev->virt_base) + dev->phys_base;
|
||||
|
||||
if (addr < (mem_size << 10))
|
||||
ret = mem_read_ram(addr, priv);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static uint16_t
|
||||
cpq_read_ramw(uint32_t addr, void *priv)
|
||||
{
|
||||
const cpq_ram_t *dev = (cpq_ram_t *) priv;
|
||||
uint16_t ret = 0xffff;
|
||||
|
||||
addr = (addr - dev->virt_base) + dev->phys_base;
|
||||
|
||||
if (addr < (mem_size << 10))
|
||||
ret = mem_read_ramw(addr, priv);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static uint32_t
|
||||
cpq_read_raml(uint32_t addr, void *priv)
|
||||
{
|
||||
const cpq_ram_t *dev = (cpq_ram_t *) priv;
|
||||
uint32_t ret = 0xffffffff;
|
||||
|
||||
addr = (addr - dev->virt_base) + dev->phys_base;
|
||||
|
||||
if (addr < (mem_size << 10))
|
||||
ret = mem_read_raml(addr, priv);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void
|
||||
cpq_write_ram(uint32_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
const cpq_ram_t *dev = (cpq_ram_t *) priv;
|
||||
|
||||
addr = (addr - dev->virt_base) + dev->phys_base;
|
||||
|
||||
if (!dev->wp && (addr < (mem_size << 10)))
|
||||
mem_write_ram(addr, val, priv);
|
||||
}
|
||||
|
||||
static void
|
||||
cpq_write_ramw(uint32_t addr, uint16_t val, void *priv)
|
||||
{
|
||||
const cpq_ram_t *dev = (cpq_ram_t *) priv;
|
||||
|
||||
addr = (addr - dev->virt_base) + dev->phys_base;
|
||||
|
||||
if (!dev->wp && (addr < (mem_size << 10)))
|
||||
mem_write_ramw(addr, val, priv);
|
||||
}
|
||||
|
||||
static void
|
||||
cpq_write_raml(uint32_t addr, uint32_t val, void *priv)
|
||||
{
|
||||
const cpq_ram_t *dev = (cpq_ram_t *) priv;
|
||||
|
||||
addr = (addr - dev->virt_base) + dev->phys_base;
|
||||
|
||||
if (!dev->wp && (addr < (mem_size << 10)))
|
||||
mem_write_raml(addr, val, priv);
|
||||
}
|
||||
|
||||
static uint8_t
|
||||
cpq_read_regs(uint32_t addr, void *priv)
|
||||
{
|
||||
const cpq_386_t *dev = (cpq_386_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
addr &= 0x00000fff;
|
||||
|
||||
switch (addr) {
|
||||
case 0x00000000:
|
||||
case 0x00000001:
|
||||
/* RAM Diagnostics (Read Only) */
|
||||
case 0x00000002:
|
||||
case 0x00000003:
|
||||
/* RAM Setup Port (Read/Write) */
|
||||
ret = dev->regs[addr];
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static uint16_t
|
||||
cpq_read_regsw(uint32_t addr, void *priv)
|
||||
{
|
||||
uint16_t ret = 0xffff;
|
||||
|
||||
ret = cpq_read_regs(addr, priv);
|
||||
ret |= (((uint16_t) cpq_read_regs(addr + 1, priv)) << 8);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static uint32_t
|
||||
cpq_read_regsl(uint32_t addr, void *priv)
|
||||
{
|
||||
uint32_t ret = 0xffffffff;
|
||||
|
||||
ret = cpq_read_regsw(addr, priv);
|
||||
ret |= (((uint32_t) cpq_read_regsw(addr + 2, priv)) << 16);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void
|
||||
cpq_recalc_state(cpq_386_t *dev, uint8_t i)
|
||||
{
|
||||
uint32_t addr;
|
||||
|
||||
addr = ((uint32_t) i) << 16;
|
||||
if (dev->mem_state[i] == 0x00)
|
||||
mem_set_mem_state(addr, 0x00010000, MEM_READ_EXTANY | MEM_WRITE_EXTANY);
|
||||
else if (dev->mem_state[i] == MEM_STATE_WP)
|
||||
mem_set_mem_state(addr, 0x00010000, MEM_READ_EXTANY | MEM_WRITE_DISABLED);
|
||||
else if (dev->mem_state[i] & MEM_STATE_WP)
|
||||
mem_set_mem_state(addr, 0x00010000, MEM_READ_INTERNAL | MEM_WRITE_DISABLED);
|
||||
else
|
||||
mem_set_mem_state(addr, 0x00010000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
|
||||
|
||||
dev->old_state[i] = dev->mem_state[i];
|
||||
}
|
||||
|
||||
static void
|
||||
cpq_recalc_states(cpq_386_t *dev)
|
||||
{
|
||||
/* Recalculate the entire 16 MB space. */
|
||||
for (uint16_t i = 0; i < 256; i++) {
|
||||
if (dev->mem_state[i] != dev->old_state[i])
|
||||
cpq_recalc_state(dev, i);
|
||||
}
|
||||
|
||||
flushmmucache_nopc();
|
||||
}
|
||||
|
||||
static void
|
||||
cpq_recalc_cache(cpq_386_t *dev)
|
||||
{
|
||||
cpu_cache_ext_enabled = (dev->regs[0x00000002] & 0x40);
|
||||
cpu_update_waitstates();
|
||||
}
|
||||
|
||||
static void
|
||||
cpq_recalc_ram(cpq_386_t *dev)
|
||||
{
|
||||
uint8_t sys_ram = (dev->regs[0x00000001] & RAM_DIAG_H_SYS_RAM_MASK) & 0x01;
|
||||
uint8_t setup_port = dev->regs[0x00000002] & 0x0f;
|
||||
uint8_t sys_min_high = sys_ram ? 0xfa : 0xf4;
|
||||
uint8_t ram_states[4] = { MEM_STATE_SYS, MEM_STATE_MOD_A,
|
||||
MEM_STATE_MOD_B, MEM_STATE_MOD_C };
|
||||
uint8_t ram_bases[4][2][16] = { { { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
|
||||
{ 0x10, 0x00, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
|
||||
0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10 } },
|
||||
{ { 0x00, 0x00, 0x10, 0x10, 0x10, 0x10, 0x10, 0x10,
|
||||
0x10, 0x10, 0x10, 0x10, 0x10, 0x10, 0x00, 0x00 },
|
||||
{ 0x40, 0x00, 0x00, 0x00, 0x00, 0x40, 0x40, 0x40,
|
||||
0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40 } },
|
||||
{ { 0x00, 0x00, 0x00, 0x20, 0x20, 0x00, 0x20, 0x20,
|
||||
0x50, 0x50, 0x50, 0x50, 0x50, 0x50, 0x00, 0x00 },
|
||||
{ 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x50,
|
||||
0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80 } },
|
||||
{ { 0x00, 0x00, 0x00, 0x00, 0x30, 0x00, 0x00, 0x60,
|
||||
0x00, 0x00, 0x90, 0x90, 0x90, 0x90, 0x00, 0x00 },
|
||||
{ 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60,
|
||||
0x00, 0x00, 0x90, 0x00, 0x00, 0xc0, 0xc0, 0xc0 } } };
|
||||
uint8_t ram_sizes[4][2][16] = { { { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
|
||||
{ 0x30, 0x00, 0x10, 0x20, 0x30, 0x30, 0x30, 0x30,
|
||||
0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30 } },
|
||||
{ { 0x00, 0x00, 0x10, 0x10, 0x10, 0x40, 0x10, 0x10,
|
||||
0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x00, 0x00 },
|
||||
{ 0x40, 0x00, 0x00, 0x00, 0x00, 0x10, 0x10, 0x10,
|
||||
0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0x40 } },
|
||||
{ { 0x00, 0x00, 0x00, 0x10, 0x10, 0x00, 0x40, 0x40,
|
||||
0x30, 0x40, 0x40, 0x40, 0x40, 0x40, 0x00, 0x00 },
|
||||
{ 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x10,
|
||||
0x00, 0x10, 0x10, 0x30, 0x40, 0x40, 0x40, 0x40 } },
|
||||
{ { 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x10,
|
||||
0x00, 0x00, 0x10, 0x20, 0x30, 0x40, 0x00, 0x00 },
|
||||
{ 0x3a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10,
|
||||
0x00, 0x00, 0x10, 0x00, 0x00, 0x10, 0x20, 0x30 } } };
|
||||
uint8_t size;
|
||||
uint8_t start;
|
||||
uint8_t end;
|
||||
uint8_t k;
|
||||
uint32_t virt_base;
|
||||
cpq_ram_t *cram;
|
||||
|
||||
for (uint16_t i = 0x10; i < sys_min_high; i++)
|
||||
dev->mem_state[i] &= ~MEM_STATE_MASK;
|
||||
|
||||
for (uint8_t i = 0; i < 4; i++) {
|
||||
for (uint8_t j = 0; j <= 64; j++) {
|
||||
if ((i >= 1) || (j >= 0x10))
|
||||
mem_mapping_disable(&dev->ram[i][j].mapping);
|
||||
}
|
||||
}
|
||||
|
||||
for (uint8_t i = 0; i < 4; i++) {
|
||||
size = ram_sizes[i][sys_ram][setup_port];
|
||||
if (size > 0x00) {
|
||||
start = ram_bases[i][sys_ram][setup_port];
|
||||
end = start + (size - 1);
|
||||
|
||||
virt_base = ((uint32_t) start) << 16;
|
||||
|
||||
for (uint16_t j = start; j <= end; j++) {
|
||||
k = j - start;
|
||||
if (i == 0)
|
||||
k += 0x10;
|
||||
|
||||
cram = &(dev->ram[i][k]);
|
||||
|
||||
dev->mem_state[j] |= ram_states[i];
|
||||
|
||||
cram->virt_base = ((uint32_t) j) << 16;
|
||||
cram->phys_base = cram->virt_base - virt_base + dev->ram_bases[i];
|
||||
|
||||
mem_mapping_set_addr(&cram->mapping, cram->virt_base, 0x00010000);
|
||||
mem_mapping_set_exec(&cram->mapping, &(ram[cram->phys_base]));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Recalculate the entire 16 MB space. */
|
||||
cpq_recalc_states(dev);
|
||||
}
|
||||
|
||||
static void
|
||||
cpq_write_regs(uint32_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
cpq_386_t *dev = (cpq_386_t *) priv;
|
||||
|
||||
addr &= 0x00000fff;
|
||||
|
||||
switch (addr) {
|
||||
case 0x00000000:
|
||||
case 0x00000001:
|
||||
/* RAM Relocation (Write Only) */
|
||||
dev->regs[addr + 4] = val;
|
||||
if (addr == 0x00000000) {
|
||||
dev->mem_state[0x0e] &= ~(MEM_STATE_SYS | MEM_STATE_WP);
|
||||
dev->mem_state[0x0f] &= ~(MEM_STATE_SYS | MEM_STATE_WP);
|
||||
dev->mem_state[0xfe] &= ~MEM_STATE_WP;
|
||||
dev->mem_state[0xff] &= ~MEM_STATE_WP;
|
||||
if (!(val & 0x01)) {
|
||||
dev->mem_state[0x0e] |= MEM_STATE_SYS;
|
||||
dev->mem_state[0x0f] |= MEM_STATE_SYS;
|
||||
}
|
||||
if (!(val & 0x02)) {
|
||||
dev->mem_state[0x0e] |= MEM_STATE_WP;
|
||||
dev->mem_state[0x0f] |= MEM_STATE_WP;
|
||||
dev->mem_state[0xfe] |= MEM_STATE_WP;
|
||||
dev->mem_state[0xff] |= MEM_STATE_WP;
|
||||
}
|
||||
cpq_recalc_state(dev, 0x0e);
|
||||
cpq_recalc_state(dev, 0x0f);
|
||||
cpq_recalc_state(dev, 0xfe);
|
||||
cpq_recalc_state(dev, 0xff);
|
||||
flushmmucache_nopc();
|
||||
}
|
||||
break;
|
||||
case 0x00000002:
|
||||
case 0x00000003:
|
||||
/* RAM Setup Port (Read/Write) */
|
||||
dev->regs[addr] = val;
|
||||
if (addr == 0x00000002) {
|
||||
cpq_recalc_ram(dev);
|
||||
cpq_recalc_cache(dev);
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
cpq_write_regsw(uint32_t addr, uint16_t val, void *priv)
|
||||
{
|
||||
cpq_write_regs(addr, val & 0xff, priv);
|
||||
cpq_write_regs(addr + 1, (val >> 8) & 0xff, priv);
|
||||
}
|
||||
|
||||
static void
|
||||
cpq_write_regsl(uint32_t addr, uint32_t val, void *priv)
|
||||
{
|
||||
cpq_write_regsw(addr, val & 0xff, priv);
|
||||
cpq_write_regsw(addr + 2, (val >> 16) & 0xff, priv);
|
||||
}
|
||||
|
||||
static void
|
||||
compaq_ram_init(cpq_ram_t *dev)
|
||||
{
|
||||
mem_mapping_add(&dev->mapping,
|
||||
0x00000000,
|
||||
0x00010000,
|
||||
cpq_read_ram,
|
||||
cpq_read_ramw,
|
||||
cpq_read_raml,
|
||||
cpq_write_ram,
|
||||
cpq_write_ramw,
|
||||
cpq_write_raml,
|
||||
NULL,
|
||||
MEM_MAPPING_INTERNAL,
|
||||
dev);
|
||||
|
||||
mem_mapping_disable(&dev->mapping);
|
||||
}
|
||||
|
||||
static void
|
||||
compaq_ram_diags_parse(cpq_386_t *dev)
|
||||
{
|
||||
uint8_t val = dev->regs[0x00000001];
|
||||
uint32_t accum = 0x00100000;
|
||||
|
||||
for (uint8_t i = 0; i < 4; i++) {
|
||||
dev->ram_bases[i] = accum;
|
||||
|
||||
switch (val & 0x03) {
|
||||
case RAM_DIAG_H_SYS_RAM_1MB:
|
||||
dev->ram_sizes[i] = 0x00100000;
|
||||
break;
|
||||
case RAM_DIAG_H_SYS_RAM_4MB:
|
||||
dev->ram_sizes[i] = 0x00400000;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
if (i == 0)
|
||||
dev->ram_sizes[i] -= 0x00100000;
|
||||
|
||||
dev->ram_map_sizes[i] = dev->ram_sizes[i];
|
||||
accum += dev->ram_sizes[i];
|
||||
|
||||
if (accum >= (mem_size << 10)) {
|
||||
dev->ram_sizes[i] = (mem_size << 10) - dev->ram_bases[i];
|
||||
break;
|
||||
}
|
||||
|
||||
val >>= 2;
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
compaq_recalc_base_ram(cpq_386_t *dev)
|
||||
{
|
||||
uint8_t base_mem = dev->regs[0x00000000] & RAM_DIAG_L_BASE_MEM_MASK;
|
||||
uint8_t sys_ram = dev->regs[0x00000001] & RAM_DIAG_H_SYS_RAM_MASK;
|
||||
uint8_t low_start = 0x00;
|
||||
uint8_t low_end = 0x00;
|
||||
uint8_t high_start = 0x00;
|
||||
uint8_t high_end = 0x00;
|
||||
cpq_ram_t *cram;
|
||||
|
||||
switch (base_mem) {
|
||||
case RAM_DIAG_L_BASE_MEM_256KB:
|
||||
switch (sys_ram) {
|
||||
case RAM_DIAG_H_SYS_RAM_1MB:
|
||||
low_start = 0x00;
|
||||
low_end = 0x03;
|
||||
high_start = 0xf4;
|
||||
high_end = 0xff;
|
||||
break;
|
||||
case RAM_DIAG_H_SYS_RAM_4MB:
|
||||
low_start = 0x00;
|
||||
low_end = 0x03;
|
||||
high_start = 0xfa;
|
||||
high_end = 0xff;
|
||||
break;
|
||||
default:
|
||||
fatal("Compaq 386 - Invalid configuation: %02X %02X\n", base_mem, sys_ram);
|
||||
return;
|
||||
}
|
||||
break;
|
||||
case RAM_DIAG_L_BASE_MEM_512KB:
|
||||
switch (sys_ram) {
|
||||
case RAM_DIAG_H_SYS_RAM_1MB:
|
||||
low_start = 0x00;
|
||||
low_end = 0x07;
|
||||
high_start = 0xf8;
|
||||
high_end = 0xff;
|
||||
break;
|
||||
case RAM_DIAG_H_SYS_RAM_4MB:
|
||||
low_start = 0x00;
|
||||
low_end = 0x07;
|
||||
high_start = 0xfa;
|
||||
high_end = 0xff;
|
||||
break;
|
||||
default:
|
||||
fatal("Compaq 386 - Invalid configuation: %02X %02X\n", base_mem, sys_ram);
|
||||
return;
|
||||
}
|
||||
break;
|
||||
case RAM_DIAG_L_BASE_MEM_640KB:
|
||||
switch (sys_ram) {
|
||||
case RAM_DIAG_H_SYS_RAM_1MB:
|
||||
low_start = 0x00;
|
||||
low_end = 0x09;
|
||||
high_start = 0xfa;
|
||||
high_end = 0xff;
|
||||
break;
|
||||
case RAM_DIAG_H_SYS_RAM_4MB:
|
||||
low_start = 0x00;
|
||||
low_end = 0x09;
|
||||
high_start = 0xfa;
|
||||
high_end = 0xff;
|
||||
break;
|
||||
default:
|
||||
fatal("Compaq 386 - Invalid configuation: %02X %02X\n", base_mem, sys_ram);
|
||||
return;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
fatal("Compaq 386 - Invalid configuation: %02X %02X\n", base_mem, sys_ram);
|
||||
return;
|
||||
}
|
||||
|
||||
switch (sys_ram) {
|
||||
case RAM_DIAG_H_SYS_RAM_1MB:
|
||||
if (mem_size < 1024)
|
||||
dev->regs[0x00000002] = 0x01;
|
||||
else if (mem_size == 8192)
|
||||
dev->regs[0x00000002] = 0x09;
|
||||
else if (mem_size >= 11264)
|
||||
dev->regs[0x00000002] = 0x0d;
|
||||
else
|
||||
dev->regs[0x00000002] = (mem_size >> 10);
|
||||
break;
|
||||
case RAM_DIAG_H_SYS_RAM_4MB:
|
||||
if (mem_size < 4096)
|
||||
dev->regs[0x00000002] = 0x04;
|
||||
else if (mem_size == 11264)
|
||||
dev->regs[0x00000002] = 0x0c;
|
||||
else if (mem_size >= 16384)
|
||||
dev->regs[0x00000002] = 0x00;
|
||||
else if (mem_size > 13312)
|
||||
dev->regs[0x00000002] = 0x0d;
|
||||
else
|
||||
dev->regs[0x00000002] = (mem_size >> 10);
|
||||
break;
|
||||
default:
|
||||
fatal("Compaq 386 - Invalid configuation: %02X\n", sys_ram);
|
||||
return;
|
||||
}
|
||||
|
||||
/* The base 640 kB. */
|
||||
for (uint8_t i = low_start; i <= low_end; i++) {
|
||||
cram = &(dev->ram[0][i]);
|
||||
|
||||
cram->phys_base = cram->virt_base = ((uint32_t) i) << 16;
|
||||
dev->mem_state[i] |= MEM_STATE_SYS;
|
||||
|
||||
mem_mapping_set_addr(&cram->mapping, cram->virt_base, 0x00010000);
|
||||
mem_mapping_set_exec(&cram->mapping, &(ram[cram->phys_base]));
|
||||
|
||||
cpq_recalc_state(dev, i);
|
||||
}
|
||||
|
||||
/* The relocated 128 kB. */
|
||||
for (uint8_t i = 0x0e; i <= 0x0f; i++) {
|
||||
cram = &(dev->ram[0][i]);
|
||||
|
||||
cram->phys_base = cram->virt_base = ((uint32_t) i) << 16;
|
||||
|
||||
mem_mapping_set_addr(&cram->mapping, cram->virt_base, 0x00010000);
|
||||
mem_mapping_set_exec(&cram->mapping, &(ram[cram->phys_base]));
|
||||
}
|
||||
|
||||
/* Blocks FA-FF. */
|
||||
for (uint16_t i = high_start; i <= high_end; i++) {
|
||||
cram = &(dev->high_ram[i & 0x0f]);
|
||||
|
||||
cram->phys_base = ((uint32_t) (i & 0x0f)) << 16;
|
||||
cram->virt_base = ((uint32_t) i) << 16;
|
||||
dev->mem_state[i] |= MEM_STATE_SYS;
|
||||
|
||||
mem_mapping_set_addr(&cram->mapping, cram->virt_base, 0x00010000);
|
||||
mem_mapping_set_exec(&cram->mapping, &(ram[cram->phys_base]));
|
||||
|
||||
cpq_recalc_state(dev, i);
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
compaq_386_close(void *priv)
|
||||
{
|
||||
cpq_386_t *dev = (cpq_386_t *) priv;
|
||||
|
||||
free(dev);
|
||||
}
|
||||
|
||||
static void *
|
||||
compaq_386_init(UNUSED(const device_t *info))
|
||||
{
|
||||
cpq_386_t *dev = (cpq_386_t *) calloc(1, sizeof(cpq_386_t));
|
||||
|
||||
mem_mapping_add(&dev->regs_mapping,
|
||||
0x80c00000,
|
||||
0x00001000,
|
||||
cpq_read_regs,
|
||||
cpq_read_regsw,
|
||||
cpq_read_regsl,
|
||||
cpq_write_regs,
|
||||
cpq_write_regsw,
|
||||
cpq_write_regsl,
|
||||
NULL,
|
||||
MEM_MAPPING_INTERNAL,
|
||||
dev);
|
||||
|
||||
mem_set_mem_state(0x80c00000, 0x00001000, MEM_READ_INTERNAL | MEM_WRITE_INTERNAL);
|
||||
|
||||
dev->regs[0x00000000] = RAM_DIAG_L_PERMA_BITS;
|
||||
if (mem_size >= 640)
|
||||
dev->regs[0x00000000] |= RAM_DIAG_L_BASE_MEM_640KB;
|
||||
else if (mem_size >= 512)
|
||||
dev->regs[0x00000000] |= RAM_DIAG_L_BASE_MEM_512KB;
|
||||
else if (mem_size >= 256)
|
||||
dev->regs[0x00000000] |= RAM_DIAG_L_BASE_MEM_256KB;
|
||||
else
|
||||
dev->regs[0x00000000] |= RAM_DIAG_L_BASE_MEM_INV;
|
||||
/* Indicate no parity error. */
|
||||
dev->regs[0x00000000] |= 0x0f;
|
||||
|
||||
if (mem_size >= 1024) {
|
||||
switch (mem_size) {
|
||||
case 1024:
|
||||
dev->regs[0x00000001] = RAM_DIAG_H_SYS_RAM_4MB | RAM_DIAG_H_MOD_A_RAM_NONE |
|
||||
RAM_DIAG_H_MOD_B_RAM_NONE | RAM_DIAG_H_MOD_C_RAM_NONE;
|
||||
break;
|
||||
case 2048:
|
||||
dev->regs[0x00000001] = RAM_DIAG_H_SYS_RAM_4MB | RAM_DIAG_H_MOD_A_RAM_NONE |
|
||||
RAM_DIAG_H_MOD_B_RAM_NONE | RAM_DIAG_H_MOD_C_RAM_NONE;
|
||||
break;
|
||||
case 3072:
|
||||
dev->regs[0x00000001] = RAM_DIAG_H_SYS_RAM_4MB | RAM_DIAG_H_MOD_A_RAM_NONE |
|
||||
RAM_DIAG_H_MOD_B_RAM_NONE | RAM_DIAG_H_MOD_C_RAM_NONE;
|
||||
break;
|
||||
case 4096:
|
||||
dev->regs[0x00000001] = RAM_DIAG_H_SYS_RAM_4MB | RAM_DIAG_H_MOD_A_RAM_NONE |
|
||||
RAM_DIAG_H_MOD_B_RAM_NONE | RAM_DIAG_H_MOD_C_RAM_NONE;
|
||||
break;
|
||||
case 5120:
|
||||
dev->regs[0x00000001] = RAM_DIAG_H_SYS_RAM_4MB | RAM_DIAG_H_MOD_A_RAM_1MB |
|
||||
RAM_DIAG_H_MOD_B_RAM_NONE | RAM_DIAG_H_MOD_C_RAM_NONE;
|
||||
break;
|
||||
case 6144:
|
||||
dev->regs[0x00000001] = RAM_DIAG_H_SYS_RAM_4MB | RAM_DIAG_H_MOD_A_RAM_1MB |
|
||||
RAM_DIAG_H_MOD_B_RAM_1MB | RAM_DIAG_H_MOD_C_RAM_NONE;
|
||||
break;
|
||||
case 7168:
|
||||
dev->regs[0x00000001] = RAM_DIAG_H_SYS_RAM_4MB | RAM_DIAG_H_MOD_A_RAM_1MB |
|
||||
RAM_DIAG_H_MOD_B_RAM_1MB | RAM_DIAG_H_MOD_C_RAM_1MB;
|
||||
break;
|
||||
case 8192:
|
||||
dev->regs[0x00000001] = RAM_DIAG_H_SYS_RAM_4MB | RAM_DIAG_H_MOD_A_RAM_4MB |
|
||||
RAM_DIAG_H_MOD_B_RAM_NONE | RAM_DIAG_H_MOD_C_RAM_NONE;
|
||||
break;
|
||||
case 9216:
|
||||
dev->regs[0x00000001] = RAM_DIAG_H_SYS_RAM_4MB | RAM_DIAG_H_MOD_A_RAM_4MB |
|
||||
RAM_DIAG_H_MOD_B_RAM_1MB | RAM_DIAG_H_MOD_C_RAM_NONE;
|
||||
break;
|
||||
case 10240:
|
||||
dev->regs[0x00000001] = RAM_DIAG_H_SYS_RAM_4MB | RAM_DIAG_H_MOD_A_RAM_4MB |
|
||||
RAM_DIAG_H_MOD_B_RAM_1MB | RAM_DIAG_H_MOD_C_RAM_1MB;
|
||||
break;
|
||||
case 11264:
|
||||
case 12288:
|
||||
dev->regs[0x00000001] = RAM_DIAG_H_SYS_RAM_4MB | RAM_DIAG_H_MOD_A_RAM_4MB |
|
||||
RAM_DIAG_H_MOD_B_RAM_4MB | RAM_DIAG_H_MOD_C_RAM_NONE;
|
||||
break;
|
||||
case 13312:
|
||||
dev->regs[0x00000001] = RAM_DIAG_H_SYS_RAM_4MB | RAM_DIAG_H_MOD_A_RAM_4MB |
|
||||
RAM_DIAG_H_MOD_B_RAM_4MB | RAM_DIAG_H_MOD_C_RAM_1MB;
|
||||
break;
|
||||
case 14336:
|
||||
case 15360:
|
||||
case 16384:
|
||||
dev->regs[0x00000001] = RAM_DIAG_H_SYS_RAM_4MB | RAM_DIAG_H_MOD_A_RAM_4MB |
|
||||
RAM_DIAG_H_MOD_B_RAM_4MB | RAM_DIAG_H_MOD_C_RAM_4MB;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
} else
|
||||
dev->regs[0x00000001] = RAM_DIAG_H_SYS_RAM_1MB | RAM_DIAG_H_MOD_A_RAM_NONE |
|
||||
RAM_DIAG_H_MOD_B_RAM_NONE | RAM_DIAG_H_MOD_C_RAM_NONE;
|
||||
|
||||
dev->regs[0x00000003] = 0xfc;
|
||||
dev->regs[0x00000004] = dev->regs[0x00000005] = 0xff;
|
||||
|
||||
compaq_ram_diags_parse(dev);
|
||||
|
||||
mem_mapping_disable(&ram_low_mapping);
|
||||
mem_mapping_disable(&ram_mid_mapping);
|
||||
mem_mapping_disable(&ram_high_mapping);
|
||||
#if (!(defined __amd64__ || defined _M_X64 || defined __aarch64__ || defined _M_ARM64))
|
||||
/* Should never be the case, but you never know what a user may set. */
|
||||
if (mem_size > 1048576)
|
||||
mem_mapping_disable(&ram_2gb_mapping);
|
||||
#endif
|
||||
|
||||
/* Initialize in reverse order for memory mapping precedence
|
||||
reasons. */
|
||||
for (int8_t i = 3; i >= 0; i--) {
|
||||
for (uint8_t j = 0; j < 64; j++)
|
||||
compaq_ram_init(&(dev->ram[i][j]));
|
||||
}
|
||||
|
||||
for (uint8_t i = 0; i < 16; i++)
|
||||
compaq_ram_init(&(dev->high_ram[i]));
|
||||
|
||||
/* First, set the entire 256 MB of space to invalid states. */
|
||||
for (uint16_t i = 0; i < 256; i++)
|
||||
dev->old_state[i] = 0xff;
|
||||
|
||||
/* Then, recalculate the base RAM mappings. */
|
||||
compaq_recalc_base_ram(dev);
|
||||
|
||||
/* Enable the external cache. */
|
||||
dev->regs[0x00000002] |= 0x40;
|
||||
cpq_recalc_cache(dev);
|
||||
|
||||
/* Recalculate the rest of the RAM mapping. */
|
||||
cpq_recalc_ram(dev);
|
||||
|
||||
return dev;
|
||||
}
|
||||
|
||||
const device_t compaq_386_device = {
|
||||
.name = "Compaq 386 Memory Control",
|
||||
.internal_name = "opti391",
|
||||
.flags = 0,
|
||||
.local = 0,
|
||||
.init = compaq_386_init,
|
||||
.close = compaq_386_close,
|
||||
.reset = NULL,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
238
src/chipset/opti602.c
Normal file
238
src/chipset/opti602.c
Normal file
@@ -0,0 +1,238 @@
|
||||
/*
|
||||
* 86Box A hypervisor and IBM PC system emulator that specializes in
|
||||
* running old operating systems and software designed for IBM
|
||||
* PC systems and compatibles from 1981 through fairly recent
|
||||
* system designs based on the PCI bus.
|
||||
*
|
||||
* This file is part of the 86Box distribution.
|
||||
*
|
||||
* Implementation of the OPTi 82C601/82C602 Buffer Devices.
|
||||
*
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
*
|
||||
* Copyright 2023 Miran Grca.
|
||||
*/
|
||||
#include <stdarg.h>
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include <string.h>
|
||||
#include <wchar.h>
|
||||
#define HAVE_STDARG_H
|
||||
#include <86box/86box.h>
|
||||
#include "cpu.h"
|
||||
#include <86box/io.h>
|
||||
#include <86box/device.h>
|
||||
#include <86box/mem.h>
|
||||
#include <86box/timer.h>
|
||||
#include <86box/nvr.h>
|
||||
#include <86box/smram.h>
|
||||
#include <86box/port_92.h>
|
||||
#include <86box/chipset.h>
|
||||
|
||||
typedef struct opti602_t {
|
||||
uint8_t idx;
|
||||
|
||||
uint8_t regs[256];
|
||||
uint8_t gpio[32];
|
||||
|
||||
uint16_t gpio_base;
|
||||
|
||||
uint16_t gpio_mask;
|
||||
uint16_t gpio_size;
|
||||
|
||||
nvr_t *nvr;
|
||||
} opti602_t;
|
||||
|
||||
#ifdef ENABLE_OPTI602_LOG
|
||||
int opti602_do_log = ENABLE_OPTI602_LOG;
|
||||
|
||||
static void
|
||||
opti602_log(const char *fmt, ...)
|
||||
{
|
||||
va_list ap;
|
||||
|
||||
if (opti602_do_log) {
|
||||
va_start(ap, fmt);
|
||||
pclog_ex(fmt, ap);
|
||||
va_end(ap);
|
||||
}
|
||||
}
|
||||
#else
|
||||
# define opti602_log(fmt, ...)
|
||||
#endif
|
||||
|
||||
static void
|
||||
opti602_gpio_write(uint16_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
opti602_t *dev = (opti602_t *) priv;
|
||||
|
||||
dev->gpio[addr - dev->gpio_base] = val;
|
||||
}
|
||||
|
||||
static uint8_t
|
||||
opti602_gpio_read(uint16_t addr, void *priv)
|
||||
{
|
||||
opti602_t *dev = (opti602_t *) priv;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
ret = dev->gpio[addr - dev->gpio_base];
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void
|
||||
opti602_gpio_recalc(opti602_t *dev)
|
||||
{
|
||||
if (dev->gpio_base != 0x0000)
|
||||
io_removehandler(dev->gpio_base, dev->gpio_size, opti602_gpio_read, NULL, NULL, opti602_gpio_write, NULL, NULL, dev);
|
||||
|
||||
dev->gpio_base = dev->regs[0xf8];
|
||||
dev->gpio_base |= (((uint16_t) dev->regs[0xf7]) << 8);
|
||||
|
||||
dev->gpio_size = 1 << ((dev->regs[0xf9] >> 2) & 0x07);
|
||||
|
||||
dev->gpio_mask = ~(dev->gpio_size - 1);
|
||||
dev->gpio_base &= dev->gpio_mask;
|
||||
|
||||
dev->gpio_mask = ~dev->gpio_mask;
|
||||
|
||||
if (dev->gpio_base != 0x0000)
|
||||
io_sethandler(dev->gpio_base, dev->gpio_size, opti602_gpio_read, NULL, NULL, opti602_gpio_write, NULL, NULL, dev);
|
||||
}
|
||||
|
||||
static void
|
||||
opti602_write(uint16_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
opti602_t *dev = (opti602_t *) priv;
|
||||
|
||||
switch (addr) {
|
||||
case 0x22:
|
||||
dev->idx = val;
|
||||
break;
|
||||
case 0x24:
|
||||
if ((dev->idx == 0xea) || ((dev->idx >= 0xf7) && (dev->idx <= 0xfa))) {
|
||||
dev->regs[dev->idx] = val;
|
||||
opti602_log("dev->regs[%04x] = %08x\n", dev->idx, val);
|
||||
|
||||
/* TODO: Registers 0x30-0x3F for OPTi 802GP and 898. */
|
||||
switch (dev->idx) {
|
||||
case 0xea:
|
||||
/* GREEN Power Port */
|
||||
break;
|
||||
|
||||
case 0xf7:
|
||||
case 0xf8:
|
||||
/* General Purpose Chip Select Registers */
|
||||
opti602_gpio_recalc(dev);
|
||||
break;
|
||||
|
||||
case 0xf9:
|
||||
/* General Purpose Chip Select Register */
|
||||
nvr_bank_set(0, !!(val & 0x20), dev->nvr);
|
||||
opti602_gpio_recalc(dev);
|
||||
break;
|
||||
|
||||
case 0xfa:
|
||||
/* GPM Port */
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static uint8_t
|
||||
opti602_read(uint16_t addr, void *priv)
|
||||
{
|
||||
uint8_t ret = 0xff;
|
||||
const opti602_t *dev = (opti602_t *) priv;
|
||||
|
||||
switch (addr) {
|
||||
case 0x24:
|
||||
if ((dev->idx == 0xea) || ((dev->idx >= 0xf7) && (dev->idx <= 0xfa))) {
|
||||
ret = dev->regs[dev->idx];
|
||||
if ((dev->idx == 0xfa) && (dev->regs[0xf9] & 0x40))
|
||||
ret |= dev->regs[0xea];
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void
|
||||
opti602_reset(void *priv)
|
||||
{
|
||||
opti602_t *dev = (opti602_t *) priv;
|
||||
|
||||
memset(dev->regs, 0x00, 256 * sizeof(uint8_t));
|
||||
memset(dev->gpio, 0x00, 32 * sizeof(uint8_t));
|
||||
|
||||
dev->regs[0xfa] = 0x07;
|
||||
|
||||
dev->gpio[0x01] |= 0xfe;
|
||||
|
||||
nvr_bank_set(0, 0, dev->nvr);
|
||||
opti602_gpio_recalc(dev);
|
||||
}
|
||||
|
||||
static void
|
||||
opti602_close(void *priv)
|
||||
{
|
||||
opti602_t *dev = (opti602_t *) priv;
|
||||
|
||||
free(dev);
|
||||
}
|
||||
|
||||
static void *
|
||||
opti602_init(const device_t *info)
|
||||
{
|
||||
opti602_t *dev = (opti602_t *) calloc(1, sizeof(opti602_t));
|
||||
|
||||
io_sethandler(0x0022, 0x0001, opti602_read, NULL, NULL, opti602_write, NULL, NULL, dev);
|
||||
io_sethandler(0x0024, 0x0001, opti602_read, NULL, NULL, opti602_write, NULL, NULL, dev);
|
||||
|
||||
dev->nvr = device_add(&at_mb_nvr_device);
|
||||
|
||||
opti602_reset(dev);
|
||||
|
||||
return dev;
|
||||
}
|
||||
|
||||
const device_t opti601_device = {
|
||||
.name = "OPTi 82C601",
|
||||
.internal_name = "opti601",
|
||||
.flags = 0,
|
||||
.local = 0,
|
||||
.init = opti602_init,
|
||||
.close = opti602_close,
|
||||
.reset = opti602_reset,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t opti602_device = {
|
||||
.name = "OPTi 82C602",
|
||||
.internal_name = "opti602",
|
||||
.flags = 0,
|
||||
.local = 0,
|
||||
.init = opti602_init,
|
||||
.close = opti602_close,
|
||||
.reset = opti602_reset,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
@@ -140,6 +140,8 @@ opti895_write(uint16_t addr, uint8_t val, void *priv)
|
||||
{
|
||||
opti895_t *dev = (opti895_t *) priv;
|
||||
|
||||
opti895_log("opti895_write(%04X, %08X)\n", addr, val);
|
||||
|
||||
switch (addr) {
|
||||
case 0x22:
|
||||
dev->idx = val;
|
||||
@@ -231,6 +233,8 @@ opti895_read(uint16_t addr, void *priv)
|
||||
break;
|
||||
}
|
||||
|
||||
opti895_log("opti895_read(%04X) = %02X\n", addr, ret);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
@@ -10,13 +10,12 @@
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Melissa Goad, <mszoopers@protonmail.com>
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
* RichardG, <richardg867@gmail.com>
|
||||
* Tiseno100,
|
||||
*
|
||||
* Copyright 2020 Miran Grca.
|
||||
* Copyright 2020 Melissa Goad.
|
||||
* Copyright 2020 RichardG.
|
||||
* Copyright 2020 Tiseno100.
|
||||
*/
|
||||
#include <stdio.h>
|
||||
|
||||
@@ -10,14 +10,10 @@
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Melissa Goad, <mszoopers@protonmail.com>
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
* RichardG, <richardg867@gmail.com>
|
||||
*
|
||||
* Copyright 2008-2020 Sarah Walker.
|
||||
* Copyright 2016-2020 Miran Grca.
|
||||
* Copyright 2020 Melissa Goad.
|
||||
* Copyright 2020-2021 RichardG.
|
||||
*/
|
||||
#include <stdarg.h>
|
||||
|
||||
@@ -341,7 +341,7 @@ host_arm64_ADDX_IMM(codeblock_t *block, int dst_reg, int src_n_reg, uint64_t imm
|
||||
} else if (imm_data & 0xfff000)
|
||||
codegen_addlong(block, OPCODE_ADDX_IMM | Rd(dst_reg) | Rn(src_n_reg) | IMM12((imm_data >> 12) & 0xfff) | DATPROC_IMM_SHIFT(1));
|
||||
} else
|
||||
fatal("ADD_IMM_X %016llx\n", imm_data);
|
||||
fatal("ADD_IMM_X %016" PRIu64 "\n", imm_data);
|
||||
}
|
||||
void
|
||||
host_arm64_ADD_REG(codeblock_t *block, int dst_reg, int src_n_reg, int src_m_reg, int shift)
|
||||
@@ -684,7 +684,7 @@ host_arm64_CMPX_IMM(codeblock_t *block, int src_n_reg, uint64_t imm_data)
|
||||
} else if (!(imm_data & 0xfffffffffffff000ull)) {
|
||||
codegen_addlong(block, OPCODE_CMPX_IMM | Rd(REG_XZR) | Rn(src_n_reg) | IMM12(imm_data & 0xfff) | DATPROC_IMM_SHIFT(0));
|
||||
} else
|
||||
fatal("CMPX_IMM %08llx\n", imm_data);
|
||||
fatal("CMPX_IMM %08" PRIu64 "\n", imm_data);
|
||||
}
|
||||
|
||||
void
|
||||
|
||||
@@ -1,6 +1,7 @@
|
||||
#if defined __amd64__ || defined _M_X64
|
||||
|
||||
# include <stdint.h>
|
||||
# include <inttypes.h>
|
||||
# include <86box/86box.h>
|
||||
# include "cpu.h"
|
||||
# include <86box/mem.h>
|
||||
@@ -125,7 +126,7 @@ host_x86_ADD64_REG_IMM(codeblock_t *block, int dst_reg, uint64_t imm_data)
|
||||
codegen_alloc_bytes(block, 4);
|
||||
codegen_addbyte4(block, 0x48, 0x83, 0xc0 | RM_OP_ADD | (dst_reg & 7), imm_data & 0xff); /*ADD dst_reg, imm_data*/
|
||||
} else
|
||||
fatal("ADD64_REG_IMM !is_imm8 %016llx\n", imm_data);
|
||||
fatal("ADD64_REG_IMM !is_imm8 %016" PRIx64 "\n", imm_data);
|
||||
}
|
||||
void
|
||||
host_x86_ADD8_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
|
||||
@@ -1614,7 +1615,7 @@ host_x86_SUB64_REG_IMM(codeblock_t *block, int dst_reg, uint64_t imm_data)
|
||||
codegen_alloc_bytes(block, 4);
|
||||
codegen_addbyte4(block, 0x48, 0x83, 0xc0 | RM_OP_SUB | (dst_reg & 7), imm_data & 0xff); /*SUB dst_reg, imm_data*/
|
||||
} else
|
||||
fatal("SUB64_REG_IMM !is_imm8 %016llx\n", imm_data);
|
||||
fatal("SUB64_REG_IMM !is_imm8 %016" PRIx64 "\n", imm_data);
|
||||
}
|
||||
void
|
||||
host_x86_SUB8_REG_REG(codeblock_t *block, int dst_reg, int src_reg)
|
||||
|
||||
34
src/config.c
34
src/config.c
@@ -619,35 +619,35 @@ load_input_devices(void)
|
||||
else {
|
||||
c = ini_section_get_int(cat, "joystick_type", 8);
|
||||
switch (c) {
|
||||
case 1:
|
||||
case JS_TYPE_2AXIS_4BUTTON:
|
||||
joystick_type = joystick_get_from_internal_name("2axis_4button");
|
||||
break;
|
||||
case 2:
|
||||
case JS_TYPE_2AXIS_6BUTTON:
|
||||
joystick_type = joystick_get_from_internal_name("2axis_6button");
|
||||
break;
|
||||
case 3:
|
||||
case JS_TYPE_2AXIS_8BUTTON:
|
||||
joystick_type = joystick_get_from_internal_name("2axis_8button");
|
||||
break;
|
||||
case 4:
|
||||
case JS_TYPE_4AXIS_4BUTTON:
|
||||
joystick_type = joystick_get_from_internal_name("4axis_4button");
|
||||
break;
|
||||
case 5:
|
||||
case JS_TYPE_CH_FLIGHTSTICK_PRO:
|
||||
joystick_type = joystick_get_from_internal_name("ch_flightstick_pro");
|
||||
break;
|
||||
case 6:
|
||||
case JS_TYPE_SIDEWINDER_PAD:
|
||||
joystick_type = joystick_get_from_internal_name("sidewinder_pad");
|
||||
break;
|
||||
case 7:
|
||||
case JS_TYPE_THRUSTMASTER_FCS:
|
||||
joystick_type = joystick_get_from_internal_name("thrustmaster_fcs");
|
||||
break;
|
||||
default:
|
||||
joystick_type = 0;
|
||||
joystick_type = JS_TYPE_NONE;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
} else
|
||||
joystick_type = 0;
|
||||
joystick_type = JS_TYPE_NONE;
|
||||
|
||||
for (c = 0; c < joystick_get_max_joysticks(joystick_type); c++) {
|
||||
sprintf(temp, "joystick_%i_nr", c);
|
||||
@@ -2923,16 +2923,14 @@ save_floppy_and_cdrom_drives(void)
|
||||
}
|
||||
|
||||
sprintf(temp, "cdrom_%02i_parameters", c + 1);
|
||||
if (cdrom[c].bus_type == 0) {
|
||||
if (cdrom[c].bus_type == 0)
|
||||
ini_section_delete_var(cat, temp);
|
||||
} else { /*In case one wants an ATAPI drive on SCSI and vice-versa.*/
|
||||
if (cdrom[c].bus_type == CDROM_BUS_ATAPI) {
|
||||
if (cdrom_drive_types[cdrom_get_type(c)].bus_type == BUS_TYPE_SCSI)
|
||||
cdrom[c].bus_type = CDROM_BUS_SCSI;
|
||||
} else if (cdrom[c].bus_type == CDROM_BUS_SCSI) {
|
||||
if (cdrom_drive_types[cdrom_get_type(c)].bus_type == BUS_TYPE_IDE)
|
||||
cdrom[c].bus_type = CDROM_BUS_ATAPI;
|
||||
}
|
||||
else {
|
||||
/* In case one wants an ATAPI drive on SCSI and vice-versa. */
|
||||
if ((cdrom_drive_types[cdrom_get_type(c)].bus_type != BUS_TYPE_BOTH) &&
|
||||
(cdrom_drive_types[cdrom_get_type(c)].bus_type != cdrom[c].bus_type))
|
||||
cdrom[c].bus_type = cdrom_drive_types[cdrom_get_type(c)].bus_type;
|
||||
|
||||
sprintf(tmp2, "%u, %s", cdrom[c].sound_on,
|
||||
hdd_bus_to_string(cdrom[c].bus_type, 1));
|
||||
ini_section_set_string(cat, temp, tmp2);
|
||||
|
||||
@@ -77,7 +77,6 @@ x386_log(const char *fmt, ...)
|
||||
static __inline void
|
||||
fetch_ea_32_long(uint32_t rmdat)
|
||||
{
|
||||
eal_r = eal_w = NULL;
|
||||
easeg = cpu_state.ea_seg->base;
|
||||
if (cpu_rm == 4) {
|
||||
uint8_t sib = rmdat >> 8;
|
||||
@@ -122,19 +121,11 @@ fetch_ea_32_long(uint32_t rmdat)
|
||||
cpu_state.eaaddr = getlong();
|
||||
}
|
||||
}
|
||||
if (easeg != 0xFFFFFFFF && ((easeg + cpu_state.eaaddr) & 0xFFF) <= 0xFFC) {
|
||||
uint32_t addr = easeg + cpu_state.eaaddr;
|
||||
if (readlookup2[addr >> 12] != (uintptr_t) -1)
|
||||
eal_r = (uint32_t *) (readlookup2[addr >> 12] + addr);
|
||||
if (writelookup2[addr >> 12] != (uintptr_t) -1)
|
||||
eal_w = (uint32_t *) (writelookup2[addr >> 12] + addr);
|
||||
}
|
||||
}
|
||||
|
||||
static __inline void
|
||||
fetch_ea_16_long(uint32_t rmdat)
|
||||
{
|
||||
eal_r = eal_w = NULL;
|
||||
easeg = cpu_state.ea_seg->base;
|
||||
if (!cpu_mod && cpu_rm == 6) {
|
||||
cpu_state.eaaddr = getword();
|
||||
@@ -158,13 +149,6 @@ fetch_ea_16_long(uint32_t rmdat)
|
||||
}
|
||||
cpu_state.eaaddr &= 0xFFFF;
|
||||
}
|
||||
if (easeg != 0xFFFFFFFF && ((easeg + cpu_state.eaaddr) & 0xFFF) <= 0xFFC) {
|
||||
uint32_t addr = easeg + cpu_state.eaaddr;
|
||||
if (readlookup2[addr >> 12] != (uintptr_t) -1)
|
||||
eal_r = (uint32_t *) (readlookup2[addr >> 12] + addr);
|
||||
if (writelookup2[addr >> 12] != (uintptr_t) -1)
|
||||
eal_w = (uint32_t *) (writelookup2[addr >> 12] + addr);
|
||||
}
|
||||
}
|
||||
|
||||
#define fetch_ea_16(rmdat) \
|
||||
@@ -225,11 +209,23 @@ fetch_ea_16_long(uint32_t rmdat)
|
||||
|
||||
#define CLOCK_CYCLES_ALWAYS(c) cycles -= (c)
|
||||
|
||||
#define CHECK_READ_CS(chseg, low, high) \
|
||||
if ((low < (chseg)->limit_low) || (high > (chseg)->limit_high)) \
|
||||
x86gpf("Limit check (READ)", 0); \
|
||||
if (msw & 1 && !(cpu_state.eflags & VM_FLAG) && !((chseg)->access & 0x80)) { \
|
||||
if ((chseg) == &cpu_state.seg_ss) \
|
||||
x86ss(NULL, (chseg)->seg & 0xfffc); \
|
||||
else \
|
||||
x86np("Read from seg not present", (chseg)->seg & 0xfffc); \
|
||||
}
|
||||
|
||||
#include "386_ops.h"
|
||||
|
||||
void
|
||||
exec386_2386(int cycs)
|
||||
{
|
||||
int ol;
|
||||
|
||||
int vector;
|
||||
int tempi;
|
||||
int cycdiff;
|
||||
@@ -264,6 +260,12 @@ exec386_2386(int cycs)
|
||||
cpu_state.ssegs = 0;
|
||||
|
||||
fetchdat = fastreadl_fetch(cs + cpu_state.pc);
|
||||
ol = opcode_length[fetchdat & 0xff];
|
||||
if (ol < 4) {
|
||||
CHECK_READ_CS(&cpu_state.seg_cs, cpu_state.pc, cpu_state.pc + ol - 1);
|
||||
} else {
|
||||
CHECK_READ_CS(&cpu_state.seg_cs, cpu_state.pc, cpu_state.pc + 3);
|
||||
}
|
||||
|
||||
if (!cpu_state.abrt) {
|
||||
#ifdef ENABLE_386_LOG
|
||||
|
||||
@@ -225,19 +225,19 @@ int checkio(uint32_t port, int mask);
|
||||
static __inline uint8_t
|
||||
fastreadb(uint32_t a)
|
||||
{
|
||||
return readmembl(a);
|
||||
return readmembl_2386(a);
|
||||
}
|
||||
|
||||
static __inline uint16_t
|
||||
fastreadw(uint32_t a)
|
||||
{
|
||||
return readmemwl(a);
|
||||
return readmemwl_2386(a);
|
||||
}
|
||||
|
||||
static __inline uint32_t
|
||||
fastreadl(uint32_t a)
|
||||
{
|
||||
return readmemll(a);
|
||||
return readmemll_2386(a);
|
||||
}
|
||||
#else
|
||||
static __inline uint8_t
|
||||
@@ -351,7 +351,7 @@ fastreadw_fetch(uint32_t a)
|
||||
return val;
|
||||
}
|
||||
|
||||
return readmemwl(a);
|
||||
return readmemwl_2386(a);
|
||||
}
|
||||
|
||||
static __inline uint32_t
|
||||
@@ -359,14 +359,14 @@ fastreadl_fetch(uint32_t a)
|
||||
{
|
||||
uint32_t val;
|
||||
|
||||
if ((a & 0xFFF) > 0xFFC) {
|
||||
if (cpu_16bitbus || ((a & 0xFFF) > 0xFFC)) {
|
||||
val = fastreadw_fetch(a);
|
||||
if (opcode_length[val & 0xff] > 2)
|
||||
val |= (fastreadw(a + 2) << 16);
|
||||
return val;
|
||||
}
|
||||
|
||||
return readmemll(a);
|
||||
return readmemll_2386(a);
|
||||
}
|
||||
#else
|
||||
static __inline uint16_t
|
||||
|
||||
@@ -462,6 +462,9 @@ cycles_biu(int bus, int init)
|
||||
cycles_idle(5 - BUS_CYCLE); /* Leftover BIU cycles + 2 idle cycles. */
|
||||
BUS_CYCLE_T1; /* Abort the prefetch. */
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
schedule_fetch = 0;
|
||||
@@ -1035,6 +1038,9 @@ do_mod_rm(void)
|
||||
case 2:
|
||||
wait(3, 0);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
cpu_state.eaaddr = (*mod1add[0][cpu_rm]) + (*mod1add[1][cpu_rm]);
|
||||
easeg = ovr_seg ? *ovr_seg : *mod1seg[cpu_rm];
|
||||
@@ -1049,6 +1055,8 @@ do_mod_rm(void)
|
||||
cpu_state.eaaddr += pfq_fetchw();
|
||||
wait(1, 0);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
cpu_state.eaaddr &= 0xffff;
|
||||
wait(2, 0);
|
||||
@@ -1591,6 +1599,9 @@ alu_op(int bits)
|
||||
case 6:
|
||||
bitwise(bits, (cpu_dest ^ cpu_src));
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -2274,6 +2285,9 @@ execx86(int cycs)
|
||||
set_af(0);
|
||||
set_pzs(bits);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
if ((opcode & 2) != 0)
|
||||
wait(4, 0);
|
||||
@@ -2288,6 +2302,9 @@ execx86(int cycs)
|
||||
BP = pop();
|
||||
handled = 1;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
if (!handled) {
|
||||
@@ -3433,6 +3450,9 @@ execx86(int cycs)
|
||||
set_af(0);
|
||||
set_pzs(bits);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
if ((opcode & 2) != 0)
|
||||
wait(4, 0);
|
||||
@@ -3517,6 +3537,9 @@ execx86(int cycs)
|
||||
case 0xDF:
|
||||
ops_sf_fpu_8087_df[rmdat & 0xff](rmdat);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
switch (opcode) {
|
||||
@@ -3544,6 +3567,9 @@ execx86(int cycs)
|
||||
case 0xDF:
|
||||
ops_fpu_8087_df[rmdat & 0xff](rmdat);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -3572,6 +3598,9 @@ execx86(int cycs)
|
||||
if (!(cpu_state.flags & Z_FLAG))
|
||||
oldc = 0;
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
} else
|
||||
oldc = (CX == 0);
|
||||
@@ -3744,6 +3773,9 @@ execx86(int cycs)
|
||||
if (x86_div(AL, AH))
|
||||
wait(1, 0);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
@@ -3843,6 +3875,9 @@ execx86(int cycs)
|
||||
wait(4, 0);
|
||||
push((uint16_t *) &cpu_data);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
@@ -17,6 +17,7 @@
|
||||
#include "cpu.h"
|
||||
#include <86box/mem.h>
|
||||
#include <86box/plat_unused.h>
|
||||
#include <inttypes.h>
|
||||
|
||||
#include "x86.h"
|
||||
#include "x86_ops.h"
|
||||
@@ -850,7 +851,7 @@ COUNT(uint64_t timings, uint64_t deps, int op_32)
|
||||
return cpu_has_feature(CPU_FEATURE_MMX) ? 1 : 2;
|
||||
}
|
||||
|
||||
fatal("Illegal COUNT %016llx\n", timings);
|
||||
fatal("Illegal COUNT %016" PRIu64 "\n", timings);
|
||||
|
||||
return timings;
|
||||
}
|
||||
|
||||
@@ -22,7 +22,7 @@ x87_from80(x87_conv_t *test)
|
||||
blah = ((exp64 > 0) ? exp64 : -exp64) & 0x3ff;
|
||||
exp64final = ((exp64 > 0) ? blah : -blah) + BIAS64;
|
||||
|
||||
mant64 = (test->eind.ll >> 11) & (0xfffffffffffffll);
|
||||
mant64 = (test->eind.ll >> 11) & (0xfffffffffffffLL);
|
||||
sign = (test->begin & 0x8000) ? 1 : 0;
|
||||
|
||||
if ((test->begin & 0x7fff) == 0x7fff)
|
||||
@@ -48,19 +48,19 @@ x87_to80(double d, x87_conv_t *test)
|
||||
|
||||
test->eind.d = d;
|
||||
|
||||
sign80 = (test->eind.ll & (0x8000000000000000ll)) ? 1 : 0;
|
||||
exp80 = test->eind.ll & (0x7ff0000000000000ll);
|
||||
sign80 = (test->eind.ll & (0x8000000000000000LL)) ? 1 : 0;
|
||||
exp80 = test->eind.ll & (0x7ff0000000000000LL);
|
||||
exp80final = (exp80 >> 52);
|
||||
mant80 = test->eind.ll & (0x000fffffffffffffll);
|
||||
mant80 = test->eind.ll & (0x000fffffffffffffLL);
|
||||
mant80final = (mant80 << 11);
|
||||
|
||||
if (exp80final == 0x7ff) /*Infinity / Nan*/
|
||||
{
|
||||
exp80final = 0x7fff;
|
||||
mant80final |= (0x8000000000000000ll);
|
||||
mant80final |= (0x8000000000000000LL);
|
||||
} else if (d != 0) { /* Zero is a special case */
|
||||
/* Elvira wants the 8 and tcalc doesn't */
|
||||
mant80final |= (0x8000000000000000ll);
|
||||
mant80final |= (0x8000000000000000LL);
|
||||
/* Ca-cyber doesn't like this when result is zero. */
|
||||
exp80final += (BIAS80 - BIAS64);
|
||||
}
|
||||
|
||||
@@ -193,7 +193,7 @@ FSTOR(void)
|
||||
something like this is needed*/
|
||||
p = (uint64_t *) cpu_state.tag;
|
||||
#ifdef USE_NEW_DYNAREC
|
||||
if (cpu_state.MM_w4[0] == 0xffff && cpu_state.MM_w4[1] == 0xffff && cpu_state.MM_w4[2] == 0xffff && cpu_state.MM_w4[3] == 0xffff && cpu_state.MM_w4[4] == 0xffff && cpu_state.MM_w4[5] == 0xffff && cpu_state.MM_w4[6] == 0xffff && cpu_state.MM_w4[7] == 0xffff && !cpu_state.TOP && (*p == 0x0101010101010101ull))
|
||||
if (cpu_state.MM_w4[0] == 0xffff && cpu_state.MM_w4[1] == 0xffff && cpu_state.MM_w4[2] == 0xffff && cpu_state.MM_w4[3] == 0xffff && cpu_state.MM_w4[4] == 0xffff && cpu_state.MM_w4[5] == 0xffff && cpu_state.MM_w4[6] == 0xffff && cpu_state.MM_w4[7] == 0xffff && !cpu_state.TOP && (*p == 0x0101010101010101ULL))
|
||||
#else
|
||||
if (cpu_state.MM_w4[0] == 0xffff && cpu_state.MM_w4[1] == 0xffff && cpu_state.MM_w4[2] == 0xffff && cpu_state.MM_w4[3] == 0xffff && cpu_state.MM_w4[4] == 0xffff && cpu_state.MM_w4[5] == 0xffff && cpu_state.MM_w4[6] == 0xffff && cpu_state.MM_w4[7] == 0xffff && !cpu_state.TOP && !(*p))
|
||||
#endif
|
||||
|
||||
26
src/device.c
26
src/device.c
@@ -731,27 +731,51 @@ device_is_valid(const device_t *device, int m)
|
||||
if (device == NULL)
|
||||
return 1;
|
||||
|
||||
if ((device->flags & DEVICE_PCJR) && !machine_has_bus(m, MACHINE_BUS_PCJR))
|
||||
return 0;
|
||||
|
||||
if ((device->flags & DEVICE_XTKBC) && machine_has_bus(m, MACHINE_BUS_ISA16) && !machine_has_bus(m, MACHINE_BUS_DM_KBC))
|
||||
return 0;
|
||||
|
||||
if ((device->flags & DEVICE_AT) && !machine_has_bus(m, MACHINE_BUS_ISA16))
|
||||
return 0;
|
||||
|
||||
if ((device->flags & DEVICE_CBUS) && !machine_has_bus(m, MACHINE_BUS_CBUS))
|
||||
if ((device->flags & DEVICE_ATKBC) && !machine_has_bus(m, MACHINE_BUS_ISA16) && !machine_has_bus(m, MACHINE_BUS_DM_KBC))
|
||||
return 0;
|
||||
|
||||
if ((device->flags & DEVICE_ISA) && !machine_has_bus(m, MACHINE_BUS_ISA))
|
||||
return 0;
|
||||
|
||||
if ((device->flags & DEVICE_CBUS) && !machine_has_bus(m, MACHINE_BUS_CBUS))
|
||||
return 0;
|
||||
|
||||
if ((device->flags & DEVICE_PCMCIA) && !machine_has_bus(m, MACHINE_BUS_PCMCIA))
|
||||
return 0;
|
||||
|
||||
if ((device->flags & DEVICE_MCA) && !machine_has_bus(m, MACHINE_BUS_MCA))
|
||||
return 0;
|
||||
|
||||
if ((device->flags & DEVICE_HIL) && !machine_has_bus(m, MACHINE_BUS_HIL))
|
||||
return 0;
|
||||
|
||||
if ((device->flags & DEVICE_EISA) && !machine_has_bus(m, MACHINE_BUS_EISA))
|
||||
return 0;
|
||||
|
||||
if ((device->flags & DEVICE_OLB) && !machine_has_bus(m, MACHINE_BUS_OLB))
|
||||
return 0;
|
||||
|
||||
if ((device->flags & DEVICE_VLB) && !machine_has_bus(m, MACHINE_BUS_VLB))
|
||||
return 0;
|
||||
|
||||
if ((device->flags & DEVICE_PCI) && !machine_has_bus(m, MACHINE_BUS_PCI))
|
||||
return 0;
|
||||
|
||||
if ((device->flags & DEVICE_CARDBUS) && !machine_has_bus(m, MACHINE_BUS_CARDBUS))
|
||||
return 0;
|
||||
|
||||
if ((device->flags & DEVICE_USB) && !machine_has_bus(m, MACHINE_BUS_USB))
|
||||
return 0;
|
||||
|
||||
if ((device->flags & DEVICE_AGP) && !machine_has_bus(m, MACHINE_BUS_AGP))
|
||||
return 0;
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -35,7 +35,7 @@
|
||||
}
|
||||
|
||||
#define CHECK_CURRENT_CARD() \
|
||||
do { \
|
||||
if (1) { \
|
||||
card = dev->first_card; \
|
||||
while (card) { \
|
||||
if (card->enable && (card->state == PNP_STATE_CONFIG)) \
|
||||
@@ -46,7 +46,7 @@
|
||||
isapnp_log("ISAPnP: No card in CONFIG state\n"); \
|
||||
break; \
|
||||
} \
|
||||
} while (0);
|
||||
}
|
||||
|
||||
static const uint8_t pnp_init_key[32] = { 0x6A, 0xB5, 0xDA, 0xED, 0xF6, 0xFB, 0x7D, 0xBE,
|
||||
0xDF, 0x6F, 0x37, 0x1B, 0x0D, 0x86, 0xC3, 0x61,
|
||||
|
||||
@@ -921,7 +921,7 @@ write64_generic(void *priv, uint8_t val)
|
||||
Bit 6: Mostly, display: 0 = CGA, 1 = MDA, inverted on Xi8088 and Acer KBC's;
|
||||
Intel AMI MegaKey KB-5: Used for green features, SMM handler expects it to be set;
|
||||
IBM PS/1 Model 2011: 0 = current FDD is 3.5", 1 = current FDD is 5.25";
|
||||
Comapq: 0 = Compaq dual-scan display, 1 = non-Compaq display.
|
||||
Compaq: 0 = Compaq dual-scan display, 1 = non-Compaq display.
|
||||
Bit 5: Mostly, manufacturing jumper: 0 = installed (infinite loop at POST), 1 = not installed;
|
||||
NCR: power-on default speed: 0 = high, 1 = low;
|
||||
Compaq: System board DIP switch 5: 0 = ON, 1 = OFF.
|
||||
|
||||
@@ -8,9 +8,11 @@
|
||||
*
|
||||
* Implementation of PS/2 series Mouse devices.
|
||||
*
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
* Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
*
|
||||
*
|
||||
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
* Copyright 2016-2023 Miran Grca.
|
||||
* Copyright 2017-2023 Fred N. van Kempen.
|
||||
*/
|
||||
#include <stdarg.h>
|
||||
#include <stdio.h>
|
||||
|
||||
@@ -156,7 +156,7 @@ mouse_clear_coords(void)
|
||||
mouse_z = 0;
|
||||
}
|
||||
|
||||
static void
|
||||
void
|
||||
mouse_clear_buttons(void)
|
||||
{
|
||||
mouse_buttons = 0x00;
|
||||
@@ -165,6 +165,38 @@ mouse_clear_buttons(void)
|
||||
mouse_delta_b = 0x00;
|
||||
}
|
||||
|
||||
static double
|
||||
mouse_scale_coord_x(double x, int mul)
|
||||
{
|
||||
double ratio = 1.0;
|
||||
|
||||
if (!mouse_raw)
|
||||
ratio = ((double) monitors[0].mon_unscaled_size_x) / monitors[0].mon_res_x;
|
||||
|
||||
if (mul)
|
||||
x *= ratio;
|
||||
else
|
||||
x /= ratio;
|
||||
|
||||
return x;
|
||||
}
|
||||
|
||||
static double
|
||||
mouse_scale_coord_y(double y, int mul)
|
||||
{
|
||||
double ratio = 1.0;
|
||||
|
||||
if (!mouse_raw)
|
||||
ratio = ((double) monitors[0].mon_efscrnsz_y) / monitors[0].mon_res_y;
|
||||
|
||||
if (mul)
|
||||
y *= ratio;
|
||||
else
|
||||
y /= ratio;
|
||||
|
||||
return y;
|
||||
}
|
||||
|
||||
void
|
||||
mouse_subtract_x(int *delta_x, int *o_x, int min, int max, int abs)
|
||||
{
|
||||
@@ -172,31 +204,53 @@ mouse_subtract_x(int *delta_x, int *o_x, int min, int max, int abs)
|
||||
double smax_x;
|
||||
double rsmin_x;
|
||||
double smin_x;
|
||||
int ds_x;
|
||||
int scaled_x;
|
||||
|
||||
rsmin_x = (double) min;
|
||||
rsmin_x = mouse_scale_coord_x(min, 0);
|
||||
if (abs) {
|
||||
smax_x = (double) max + ABS(rsmin_x);
|
||||
max += ABS(min);
|
||||
smax_x = mouse_scale_coord_x(max, 0) + ABS(rsmin_x);
|
||||
max += ABSD(min);
|
||||
real_x += rsmin_x;
|
||||
smin_x = 0;
|
||||
} else {
|
||||
smax_x = (double) max;
|
||||
smax_x = mouse_scale_coord_x(max, 0);
|
||||
smin_x = rsmin_x;
|
||||
}
|
||||
|
||||
/* Default the X and Y overflows to 1. */
|
||||
smax_x = floor(smax_x);
|
||||
smin_x = ceil(smin_x);
|
||||
|
||||
/* Default the X overflow to 1. */
|
||||
if (o_x != NULL)
|
||||
*o_x = 1;
|
||||
|
||||
ds_x = mouse_scale_coord_x(real_x, 1);
|
||||
|
||||
if (ds_x >= 0.0)
|
||||
scaled_x = (int) floor(mouse_scale_coord_x(real_x, 1));
|
||||
else
|
||||
scaled_x = (int) ceil(mouse_scale_coord_x(real_x, 1));
|
||||
|
||||
if (real_x > smax_x) {
|
||||
*delta_x = abs ? (int) real_x : max;
|
||||
real_x -= smax_x;
|
||||
if (abs) {
|
||||
*delta_x = scaled_x;
|
||||
real_x -= mouse_scale_coord_x((double) scaled_x, 0);
|
||||
} else {
|
||||
*delta_x = max;
|
||||
real_x -= smax_x;
|
||||
}
|
||||
} else if (real_x < smin_x) {
|
||||
*delta_x = abs ? (int) real_x : min;
|
||||
real_x += ABS(smin_x);
|
||||
if (abs) {
|
||||
*delta_x = scaled_x;
|
||||
real_x -= mouse_scale_coord_x((double) scaled_x, 0);
|
||||
} else {
|
||||
*delta_x = min;
|
||||
real_x += ABSD(smin_x);
|
||||
}
|
||||
} else {
|
||||
*delta_x = (int) real_x;
|
||||
real_x = 0.0;
|
||||
*delta_x = scaled_x;
|
||||
real_x -= mouse_scale_coord_x((double) scaled_x, 0);
|
||||
if (o_x != NULL)
|
||||
*o_x = 0;
|
||||
}
|
||||
@@ -217,34 +271,56 @@ mouse_subtract_y(int *delta_y, int *o_y, int min, int max, int invert, int abs)
|
||||
double smax_y;
|
||||
double rsmin_y;
|
||||
double smin_y;
|
||||
int ds_y;
|
||||
int scaled_y;
|
||||
|
||||
if (invert)
|
||||
real_y = -real_y;
|
||||
|
||||
rsmin_y = (double) min;
|
||||
rsmin_y = mouse_scale_coord_y(min, 0);
|
||||
if (abs) {
|
||||
smax_y = (double) max + ABS(rsmin_y);
|
||||
max += ABS(min);
|
||||
smax_y = mouse_scale_coord_y(max, 0) + ABS(rsmin_y);
|
||||
max += ABSD(min);
|
||||
real_y += rsmin_y;
|
||||
smin_y = 0;
|
||||
} else {
|
||||
smax_y = (double) max;
|
||||
smax_y = mouse_scale_coord_y(max, 0);
|
||||
smin_y = rsmin_y;
|
||||
}
|
||||
|
||||
/* Default the X and Y overflows to 1. */
|
||||
smax_y = floor(smax_y);
|
||||
smin_y = ceil(smin_y);
|
||||
|
||||
/* Default Y overflow to 1. */
|
||||
if (o_y != NULL)
|
||||
*o_y = 1;
|
||||
|
||||
ds_y = mouse_scale_coord_x(real_y, 1);
|
||||
|
||||
if (ds_y >= 0.0)
|
||||
scaled_y = (int) floor(mouse_scale_coord_x(real_y, 1));
|
||||
else
|
||||
scaled_y = (int) ceil(mouse_scale_coord_x(real_y, 1));
|
||||
|
||||
if (real_y > smax_y) {
|
||||
*delta_y = abs ? (int) real_y : max;
|
||||
real_y -= smax_y;
|
||||
if (abs) {
|
||||
*delta_y = scaled_y;
|
||||
real_y -= mouse_scale_coord_y((double) scaled_y, 0);
|
||||
} else {
|
||||
*delta_y = max;
|
||||
real_y -= smax_y;
|
||||
}
|
||||
} else if (real_y < smin_y) {
|
||||
*delta_y = abs ? (int) real_y : min;
|
||||
real_y += ABS(smin_y);
|
||||
if (abs) {
|
||||
*delta_y = scaled_y;
|
||||
real_y -= mouse_scale_coord_y((double) scaled_y, 0);
|
||||
} else {
|
||||
*delta_y = min;
|
||||
real_y += ABSD(smin_y);
|
||||
}
|
||||
} else {
|
||||
*delta_y = (int) real_y;
|
||||
real_y = 0.0;
|
||||
*delta_y = scaled_y;
|
||||
real_y -= mouse_scale_coord_y((double) scaled_y, 0);
|
||||
if (o_y != NULL)
|
||||
*o_y = 0;
|
||||
}
|
||||
@@ -272,9 +348,11 @@ mouse_subtract_coords(int *delta_x, int *delta_y, int *o_x, int *o_y,
|
||||
int
|
||||
mouse_moved(void)
|
||||
{
|
||||
int moved_x = !!((int) floor(ABSD(mouse_scale_coord_x(atomic_load(&mouse_x), 1))));
|
||||
int moved_y = !!((int) floor(ABSD(mouse_scale_coord_y(atomic_load(&mouse_y), 1))));
|
||||
|
||||
/* Convert them to integer so we treat < 1.0 and > -1.0 as 0. */
|
||||
int ret = (((int) floor(atomic_load(&mouse_x)) != 0) ||
|
||||
((int) floor(atomic_load(&mouse_y)) != 0));
|
||||
int ret = (moved_x || moved_y);
|
||||
|
||||
return ret;
|
||||
}
|
||||
@@ -328,26 +406,35 @@ atomic_double_add(_Atomic double *var, double val)
|
||||
atomic_store(var, temp);
|
||||
}
|
||||
|
||||
void
|
||||
mouse_scale_fx(double x)
|
||||
{
|
||||
atomic_double_add(&mouse_x, ((double) x) * mouse_sensitivity);
|
||||
}
|
||||
|
||||
void
|
||||
mouse_scale_fy(double y)
|
||||
{
|
||||
atomic_double_add(&mouse_y, ((double) y) * mouse_sensitivity);
|
||||
}
|
||||
|
||||
void
|
||||
mouse_scale_x(int x)
|
||||
{
|
||||
double ratio_x = ((double) monitors[0].mon_unscaled_size_x) / monitors[0].mon_res_x;
|
||||
|
||||
if (mouse_raw)
|
||||
ratio_x /= plat_get_dpi();
|
||||
|
||||
atomic_double_add(&mouse_x, (((double) x) * mouse_sensitivity * ratio_x));
|
||||
atomic_double_add(&mouse_x, ((double) x) * mouse_sensitivity);
|
||||
}
|
||||
|
||||
void
|
||||
mouse_scale_y(int y)
|
||||
{
|
||||
double ratio_y = ((double) monitors[0].mon_efscrnsz_y) / monitors[0].mon_res_y;
|
||||
atomic_double_add(&mouse_y, ((double) y) * mouse_sensitivity);
|
||||
}
|
||||
|
||||
if (mouse_raw)
|
||||
ratio_y /= plat_get_dpi();
|
||||
|
||||
atomic_double_add(&mouse_y, (((double) y) * mouse_sensitivity * ratio_y));
|
||||
void
|
||||
mouse_scalef(double x, double y)
|
||||
{
|
||||
mouse_scale_fx(x);
|
||||
mouse_scale_fy(y);
|
||||
}
|
||||
|
||||
void
|
||||
|
||||
@@ -8,9 +8,9 @@
|
||||
*
|
||||
* Implementation of PS/2 series Mouse devices.
|
||||
*
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
*
|
||||
*
|
||||
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
* Copyright 2023 Miran Grca.
|
||||
*/
|
||||
#include <stdarg.h>
|
||||
#include <stdatomic.h>
|
||||
@@ -84,9 +84,9 @@ ps2_report_coordinates(atkbc_dev_t *dev, int main)
|
||||
|
||||
mouse_subtract_coords(&delta_x, &delta_y, &overflow_x, &overflow_y,
|
||||
-256, 255, 1, 0);
|
||||
mouse_subtract_z(&delta_z, -8, 7, 1);
|
||||
mouse_subtract_z(&delta_z, -8, 7, 0);
|
||||
|
||||
buff[0] = (overflow_y << 7) | (overflow_x << 6) |
|
||||
buff[0] |= (overflow_y << 7) | (overflow_x << 6) |
|
||||
((delta_y & 0x0100) >> 3) | ((delta_x & 0x0100) >> 4) |
|
||||
(b & ((dev->flags & FLAG_INTELLI) ? 0x07 : 0x03));
|
||||
buff[1] = (delta_x & 0x00ff);
|
||||
|
||||
@@ -10,9 +10,9 @@
|
||||
*
|
||||
* TODO: Add the Genius Serial Mouse.
|
||||
*
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
*
|
||||
*
|
||||
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
* Copyright 2023 Miran Grca.
|
||||
*/
|
||||
#include <math.h>
|
||||
#include <stdarg.h>
|
||||
@@ -193,8 +193,8 @@ sermouse_report_msystems(mouse_t *dev)
|
||||
dev->buf[0] |= (b & 0x02) ? 0x00 : 0x01; /* right button */
|
||||
dev->buf[1] = delta_x;
|
||||
dev->buf[2] = delta_y;
|
||||
dev->buf[2] = delta_x; /* same as byte 1 */
|
||||
dev->buf[3] = delta_y; /* same as byte 2 */
|
||||
dev->buf[3] = delta_x; /* same as byte 1 */
|
||||
dev->buf[4] = delta_y; /* same as byte 2 */
|
||||
|
||||
return 5;
|
||||
}
|
||||
@@ -215,8 +215,6 @@ sermouse_report_3bp(mouse_t *dev)
|
||||
dev->buf[0] |= (b & 0x02) ? 0x01 : 0x00; /* right button */
|
||||
dev->buf[1] = delta_x;
|
||||
dev->buf[2] = delta_y;
|
||||
dev->buf[2] = delta_x; /* same as byte 1 */
|
||||
dev->buf[3] = delta_y; /* same as byte 2 */
|
||||
|
||||
return 3;
|
||||
}
|
||||
@@ -279,7 +277,7 @@ sermouse_report_ms(mouse_t *dev)
|
||||
int b = mouse_get_buttons_ex();
|
||||
|
||||
mouse_subtract_coords(&delta_x, &delta_y, NULL, NULL, -128, 127, 0, 0);
|
||||
mouse_subtract_z(&delta_z, -8, 7, 1);
|
||||
mouse_subtract_z(&delta_z, -8, 7, 0);
|
||||
|
||||
dev->buf[0] = 0x40;
|
||||
dev->buf[0] |= (((delta_y >> 6) & 0x03) << 2);
|
||||
|
||||
@@ -6,15 +6,16 @@
|
||||
*
|
||||
* This file is part of the 86Box distribution.
|
||||
*
|
||||
* Implementation of the Phoenix 486 Jumper Readout
|
||||
* Implementation of the Phoenix 486 Jumper Readout.
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Tiseno100
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
* Tiseno100,
|
||||
*
|
||||
* Copyright 2020 Tiseno100
|
||||
* Copyright 2020-2023 Miran Grca.
|
||||
* Copyright 2020-2023 Tiseno100.
|
||||
*/
|
||||
|
||||
#include <stdarg.h>
|
||||
#include <stdint.h>
|
||||
#include <stdio.h>
|
||||
|
||||
@@ -29,15 +29,13 @@
|
||||
#include <86box/postcard.h>
|
||||
#include "cpu.h"
|
||||
|
||||
#define POSTCARDS_NUM 4
|
||||
#define POSTCARD_MASK (POSTCARDS_NUM - 1)
|
||||
uint8_t postcard_codes[POSTCARDS_NUM];
|
||||
|
||||
static uint16_t postcard_port;
|
||||
static uint8_t postcard_written[POSTCARDS_NUM];
|
||||
static uint8_t postcard_ports_num = 1;
|
||||
static uint8_t postcard_codes[POSTCARDS_NUM];
|
||||
static uint8_t postcard_prev_codes[POSTCARDS_NUM];
|
||||
#define UISTR_LEN 13
|
||||
#define UISTR_LEN 32
|
||||
static char postcard_str[UISTR_LEN]; /* UI output string */
|
||||
|
||||
extern void ui_sb_bugui(char *__str);
|
||||
@@ -66,44 +64,46 @@ static void
|
||||
postcard_setui(void)
|
||||
{
|
||||
if (postcard_ports_num > 1) {
|
||||
char ps[2][POSTCARDS_NUM][64] = { { 0 },
|
||||
{ 0 } };
|
||||
char ps[2][POSTCARDS_NUM][3] = { { { 0 },
|
||||
{ 0 },
|
||||
} };
|
||||
|
||||
for (uint8_t i = 0; i < POSTCARDS_NUM; i++) {
|
||||
if (!postcard_written[i]) {
|
||||
sprintf(ps[0][i], "--");
|
||||
sprintf(ps[1][i], "--");
|
||||
snprintf(ps[0][i], sizeof(ps[0][i]), "--");
|
||||
snprintf(ps[1][i], sizeof(ps[1][i]), "--");
|
||||
} else if (postcard_written[i] == 1) {
|
||||
sprintf(ps[0][i], "%02X", postcard_codes[i]);
|
||||
sprintf(ps[1][i], "--");
|
||||
snprintf(ps[0][i], sizeof(ps[0][i]), "%02X", postcard_codes[i]);
|
||||
snprintf(ps[1][i], sizeof(ps[1][i]), "--");
|
||||
} else {
|
||||
sprintf(ps[0][i], "%02X", postcard_codes[i]);
|
||||
sprintf(ps[1][i], "%02X", postcard_prev_codes[i]);
|
||||
snprintf(ps[0][i], sizeof(ps[0][i]), "%02X", postcard_codes[i]);
|
||||
snprintf(ps[1][i], sizeof(ps[1][i]), "%02X", postcard_prev_codes[i]);
|
||||
}
|
||||
}
|
||||
|
||||
switch (postcard_ports_num) {
|
||||
default:
|
||||
case 2:
|
||||
sprintf(postcard_str, "POST: %s%s %s%s",
|
||||
snprintf(postcard_str, sizeof(postcard_str), "POST: %s%s %s%s",
|
||||
ps[0][0], ps[0][1], ps[1][0], ps[1][1]);
|
||||
break;
|
||||
case 3:
|
||||
sprintf(postcard_str, "POST: %s/%s%s %s/%s%s",
|
||||
snprintf(postcard_str, sizeof(postcard_str), "POST: %s/%s%s %s/%s%s",
|
||||
ps[0][0], ps[0][1], ps[0][2], ps[1][0], ps[1][1], ps[1][2]);
|
||||
break;
|
||||
case 4:
|
||||
sprintf(postcard_str, "POST: %s%s/%s%s %s%s/%s%s",
|
||||
snprintf(postcard_str, sizeof(postcard_str), "POST: %s%s/%s%s %s%s/%s%s",
|
||||
ps[0][0], ps[0][1], ps[0][2], ps[0][3],
|
||||
ps[1][0], ps[1][1], ps[1][2], ps[1][3]);
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
if (!postcard_written[0])
|
||||
sprintf(postcard_str, "POST: -- --");
|
||||
snprintf(postcard_str, sizeof(postcard_str), "POST: -- --");
|
||||
else if (postcard_written[0] == 1)
|
||||
sprintf(postcard_str, "POST: %02X --", postcard_codes[0]);
|
||||
snprintf(postcard_str, sizeof(postcard_str), "POST: %02X --", postcard_codes[0]);
|
||||
else
|
||||
sprintf(postcard_str, "POST: %02X %02X", postcard_codes[0], postcard_prev_codes[0]);
|
||||
snprintf(postcard_str, sizeof(postcard_str), "POST: %02X %02X", postcard_codes[0], postcard_prev_codes[0]);
|
||||
}
|
||||
|
||||
ui_sb_bugui(postcard_str);
|
||||
|
||||
@@ -109,8 +109,12 @@ serial_transmit_period(serial_t *dev)
|
||||
void
|
||||
serial_do_irq(serial_t *dev, int set)
|
||||
{
|
||||
if (dev->irq != 0xff)
|
||||
picint_common(1 << dev->irq, !!(dev->type >= SERIAL_16450), set, &dev->irq_state);
|
||||
if (dev->irq != 0xff) {
|
||||
if (set || (dev->irq_state != !!set))
|
||||
picint_common(1 << dev->irq, !!(dev->type >= SERIAL_16450), set, &dev->irq_state);
|
||||
if (dev->type < SERIAL_16450)
|
||||
dev->irq_state = !!set;
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
|
||||
@@ -445,7 +445,6 @@ mvhd_file_is_vhd(FILE* f)
|
||||
}
|
||||
|
||||
mvhd_fseeko64(f, -MVHD_FOOTER_SIZE, SEEK_END);
|
||||
fread(con_str, sizeof con_str, 1, f);
|
||||
if (mvhd_is_conectix_str(con_str)) {
|
||||
return 1;
|
||||
}
|
||||
|
||||
@@ -58,7 +58,7 @@ typedef struct _joystick_instance_ {
|
||||
void *dat;
|
||||
} joystick_instance_t;
|
||||
|
||||
int joystick_type = 0;
|
||||
int joystick_type = JS_TYPE_NONE;
|
||||
|
||||
static const joystick_if_t joystick_none = {
|
||||
.name = "None",
|
||||
@@ -128,21 +128,21 @@ int gameport_instance_id = 0;
|
||||
or writes, and ports at the standard 200h location are prioritized. */
|
||||
static gameport_t *active_gameports = NULL;
|
||||
|
||||
char *
|
||||
const char *
|
||||
joystick_get_name(int js)
|
||||
{
|
||||
if (!joysticks[js].joystick)
|
||||
return NULL;
|
||||
return (char *) joysticks[js].joystick->name;
|
||||
return joysticks[js].joystick->name;
|
||||
}
|
||||
|
||||
char *
|
||||
const char *
|
||||
joystick_get_internal_name(int js)
|
||||
{
|
||||
if (joysticks[js].joystick == NULL)
|
||||
return "";
|
||||
|
||||
return (char *) joysticks[js].joystick->internal_name;
|
||||
return joysticks[js].joystick->internal_name;
|
||||
}
|
||||
|
||||
int
|
||||
@@ -151,7 +151,7 @@ joystick_get_from_internal_name(char *s)
|
||||
int c = 0;
|
||||
|
||||
while (joysticks[c].joystick != NULL) {
|
||||
if (!strcmp((char *) joysticks[c].joystick->internal_name, s))
|
||||
if (!strcmp(joysticks[c].joystick->internal_name, s))
|
||||
return c;
|
||||
c++;
|
||||
}
|
||||
@@ -183,22 +183,22 @@ joystick_get_pov_count(int js)
|
||||
return joysticks[js].joystick->pov_count;
|
||||
}
|
||||
|
||||
char *
|
||||
const char *
|
||||
joystick_get_axis_name(int js, int id)
|
||||
{
|
||||
return (char *) joysticks[js].joystick->axis_names[id];
|
||||
return joysticks[js].joystick->axis_names[id];
|
||||
}
|
||||
|
||||
char *
|
||||
const char *
|
||||
joystick_get_button_name(int js, int id)
|
||||
{
|
||||
return (char *) joysticks[js].joystick->button_names[id];
|
||||
return joysticks[js].joystick->button_names[id];
|
||||
}
|
||||
|
||||
char *
|
||||
const char *
|
||||
joystick_get_pov_name(int js, int id)
|
||||
{
|
||||
return (char *) joysticks[js].joystick->pov_names[id];
|
||||
return joysticks[js].joystick->pov_names[id];
|
||||
}
|
||||
|
||||
static void
|
||||
@@ -410,7 +410,7 @@ tmacm_init(UNUSED(const device_t *info))
|
||||
dev = malloc(sizeof(gameport_t));
|
||||
memset(dev, 0x00, sizeof(gameport_t));
|
||||
|
||||
port = device_get_config_hex16("port1_addr");
|
||||
port = (uint16_t) device_get_config_hex16("port1_addr");
|
||||
switch (port) {
|
||||
case 0x201:
|
||||
dev = gameport_add(&gameport_201_device);
|
||||
@@ -428,7 +428,7 @@ tmacm_init(UNUSED(const device_t *info))
|
||||
break;
|
||||
}
|
||||
|
||||
port = device_get_config_hex16("port2_addr");
|
||||
port = (uint16_t) device_get_config_hex16("port2_addr");
|
||||
switch (port) {
|
||||
case 0x209:
|
||||
dev = gameport_add(&gameport_209_device);
|
||||
|
||||
@@ -38,6 +38,9 @@
|
||||
/* Default language 0xFFFF = from system, 0x409 = en-US */
|
||||
#define DEFAULT_LANGUAGE 0x0409
|
||||
|
||||
#define POSTCARDS_NUM 4
|
||||
#define POSTCARD_MASK (POSTCARDS_NUM - 1)
|
||||
|
||||
#ifdef MIN
|
||||
# undef MIN
|
||||
#endif
|
||||
@@ -47,10 +50,14 @@
|
||||
#ifdef ABS
|
||||
# undef ABS
|
||||
#endif
|
||||
#ifdef ABSD
|
||||
# undef ABSD
|
||||
#endif
|
||||
|
||||
#define MIN(a, b) ((a) < (b) ? (a) : (b))
|
||||
#define MAX(a, b) ((a) > (b) ? (a) : (b))
|
||||
#define ABS(x) ((x) > 0 ? (x) : -(x))
|
||||
#define ABSD(x) ((x) > 0.0 ? (x) : -(x))
|
||||
#define BCD8(x) ((((x) / 10) << 4) | ((x) % 10))
|
||||
#define BCD16(x) ((((x) / 1000) << 12) | (((x) / 100) << 8) | BCD8(x))
|
||||
#define BCD32(x) ((((x) / 10000000) << 28) | (((x) / 1000000) << 24) | (((x) / 100000) << 20) | (((x) / 10000) << 16) | BCD16(x))
|
||||
@@ -138,8 +145,6 @@ extern int confirm_exit; /* (C) enable exit confirmation */
|
||||
extern int confirm_save; /* (C) enable save confirmation */
|
||||
extern int enable_discord; /* (C) enable Discord integration */
|
||||
|
||||
extern int is_pentium; /* TODO: Move back to cpu/cpu.h when it's figured out,
|
||||
how to remove that hack from the ET4000/W32p. */
|
||||
extern int fixed_size_x;
|
||||
extern int fixed_size_y;
|
||||
extern double mouse_sensitivity; /* (C) Mouse sensitivity scale */
|
||||
@@ -174,7 +179,7 @@ extern void reset_screen_size_monitor(int monitor_index);
|
||||
extern void set_screen_size_natural(void);
|
||||
extern void update_mouse_msg(void);
|
||||
#if 0
|
||||
extern void pc_reload(wchar_t *fn);
|
||||
extern void pc_reload(wchar_t *fn);
|
||||
#endif
|
||||
extern int pc_init_modules(void);
|
||||
extern int pc_init(int argc, char *argv[]);
|
||||
@@ -203,7 +208,8 @@ extern double isa_timing;
|
||||
extern int io_delay;
|
||||
extern int framecountx;
|
||||
|
||||
extern volatile int cpu_thread_run;
|
||||
extern volatile int cpu_thread_run;
|
||||
extern uint8_t postcard_codes[POSTCARDS_NUM];
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* 86Box A hypervisor and IBM PC system emulator that specializes in
|
||||
* 86Box A hypervisor and IBM PC system emulator that specializes in
|
||||
* running old operating systems and software designed for IBM
|
||||
* PC systems and compatibles from 1981 through fairly recent
|
||||
* system designs based on the PCI bus.
|
||||
|
||||
@@ -60,12 +60,13 @@ enum {
|
||||
CDROM_BUS_USB = 8
|
||||
};
|
||||
|
||||
#define KNOWN_CDROM_DRIVE_TYPES 35
|
||||
#define BUS_TYPE_ALL 0
|
||||
#define BUS_TYPE_IDE 1
|
||||
#define BUS_TYPE_SCSI 2
|
||||
#define KNOWN_CDROM_DRIVE_TYPES 35
|
||||
#define BUS_TYPE_IDE CDROM_BUS_ATAPI
|
||||
#define BUS_TYPE_SCSI CDROM_BUS_SCSI
|
||||
#define BUS_TYPE_BOTH -1
|
||||
|
||||
static const struct {
|
||||
static const struct
|
||||
{
|
||||
const char vendor[9];
|
||||
const char model[17];
|
||||
const char revision[5];
|
||||
@@ -73,7 +74,7 @@ static const struct {
|
||||
const char *internal_name;
|
||||
const int bus_type;
|
||||
} cdrom_drive_types[] = {
|
||||
{ "86BOX", "CD-ROM", "1.00", "(ATAPI/SCSI) 86BOX CD-ROM 1.00", "86BOX_CD-ROM_1.00", BUS_TYPE_ALL }, /*1*/
|
||||
{ "86BOX", "CD-ROM", "1.00", "(ATAPI/SCSI) 86BOX CD-ROM 1.00", "86BOX_CD-ROM_1.00", BUS_TYPE_BOTH }, /*1*/
|
||||
{ "AZT", "CDA46802I", "1.15", "(ATAPI) AZT CDA46802I 1.15", "AZT_CDA46802I_1.15", BUS_TYPE_IDE }, /*2*/
|
||||
{ "BTC", "CD-ROM BCD36XH", "U1.0", "(ATAPI) BTC CD-ROM BCD36XH U1.0", "BTC_CD-ROM_BCD36XH_U1.0", BUS_TYPE_IDE }, /*3*/
|
||||
{ "GOLDSTAR", "CRD-8160B", "3.14", "(ATAPI) GOLDSTAR CRD-8160B 3.14", "GOLDSTAR_CRD-8160B_3.14", BUS_TYPE_IDE }, /*4*/
|
||||
|
||||
@@ -1,18 +1,18 @@
|
||||
/*
|
||||
* 86Box A hypervisor and IBM PC system emulator that specializes in
|
||||
* running old operating systems and software designed for IBM
|
||||
* PC systems and compatibles from 1981 through fairly recent
|
||||
* system designs based on the PCI bus.
|
||||
* 86Box A hypervisor and IBM PC system emulator that specializes in
|
||||
* running old operating systems and software designed for IBM
|
||||
* PC systems and compatibles from 1981 through fairly recent
|
||||
* system designs based on the PCI bus.
|
||||
*
|
||||
* This file is part of the 86Box distribution.
|
||||
* This file is part of the 86Box distribution.
|
||||
*
|
||||
* Definitions for the common CD-ROM interface controller handler.
|
||||
* Definitions for the common CD-ROM interface controller handler.
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: TheCollector1995
|
||||
* Authors: TheCollector1995
|
||||
*
|
||||
* Copyright 2022 TheCollector1995.
|
||||
* Copyright 2022 TheCollector1995.
|
||||
*/
|
||||
#ifndef EMU_CDROM_INTERFACE_H
|
||||
#define EMU_CDROM_INTERFACE_H
|
||||
|
||||
@@ -36,6 +36,9 @@ extern const device_t ali6117d_device;
|
||||
/* AMD */
|
||||
extern const device_t amd640_device;
|
||||
|
||||
/* Compaq */
|
||||
extern const device_t compaq_386_device;
|
||||
|
||||
/* Contaq/Cypress */
|
||||
extern const device_t contaq_82c596a_device;
|
||||
extern const device_t contaq_82c597_device;
|
||||
@@ -108,6 +111,8 @@ extern const device_t opti283_device;
|
||||
extern const device_t opti291_device;
|
||||
extern const device_t opti493_device;
|
||||
extern const device_t opti495_device;
|
||||
extern const device_t opti601_device;
|
||||
extern const device_t opti602_device;
|
||||
extern const device_t opti802g_device;
|
||||
extern const device_t opti802g_pci_device;
|
||||
extern const device_t opti822_device;
|
||||
|
||||
@@ -58,19 +58,26 @@
|
||||
|
||||
enum {
|
||||
DEVICE_PCJR = 2, /* requires an IBM PCjr */
|
||||
DEVICE_AT = 4, /* requires an AT-compatible system */
|
||||
DEVICE_PS2 = 8, /* requires a PS/1 or PS/2 system */
|
||||
DEVICE_ISA = 0x10, /* requires the ISA bus */
|
||||
DEVICE_CBUS = 0x20, /* requires the C-BUS bus */
|
||||
DEVICE_MCA = 0x40, /* requires the MCA bus */
|
||||
DEVICE_EISA = 0x80, /* requires the EISA bus */
|
||||
DEVICE_VLB = 0x100, /* requires the PCI bus */
|
||||
DEVICE_PCI = 0x200, /* requires the VLB bus */
|
||||
DEVICE_AGP = 0x400, /* requires the AGP bus */
|
||||
DEVICE_AC97 = 0x800, /* requires the AC'97 bus */
|
||||
DEVICE_COM = 0x1000, /* requires a serial port */
|
||||
DEVICE_LPT = 0x2000, /* requires a parallel port */
|
||||
DEVICE_KBC = 0x4000, /* is a keyboard controller */
|
||||
DEVICE_XTKBC = 4, /* requires an XT-compatible keyboard controller */
|
||||
DEVICE_AT = 8, /* requires an AT-compatible system */
|
||||
DEVICE_ATKBC = 0x10, /* requires an AT-compatible keyboard controller */
|
||||
DEVICE_PS2 = 0x20, /* requires a PS/1 or PS/2 system */
|
||||
DEVICE_ISA = 0x40, /* requires the ISA bus */
|
||||
DEVICE_CBUS = 0x80, /* requires the C-BUS bus */
|
||||
DEVICE_PCMCIA = 0x100, /* requires the PCMCIA bus */
|
||||
DEVICE_MCA = 0x200, /* requires the MCA bus */
|
||||
DEVICE_HIL = 0x400, /* requires the HP HIL bus */
|
||||
DEVICE_EISA = 0x800, /* requires the EISA bus */
|
||||
DEVICE_OLB = 0x1000, /* requires the OPTi local bus */
|
||||
DEVICE_VLB = 0x2000, /* requires the VLB bus */
|
||||
DEVICE_PCI = 0x4000, /* requires the PCI bus */
|
||||
DEVICE_CARDBUS = 0x8000, /* requires the CardBus bus */
|
||||
DEVICE_USB = 0x10000, /* requires the USB bus */
|
||||
DEVICE_AGP = 0x20000, /* requires the AGP bus */
|
||||
DEVICE_AC97 = 0x40000, /* requires the AC'97 bus */
|
||||
DEVICE_COM = 0x80000, /* requires a serial port */
|
||||
DEVICE_LPT = 0x100000, /* requires a parallel port */
|
||||
DEVICE_KBC = 0x200000, /* is a keyboard controller */
|
||||
|
||||
DEVICE_EXTPARAMS = 0x40000000, /* accepts extended parameters */
|
||||
|
||||
|
||||
@@ -24,6 +24,16 @@
|
||||
#define MAX_PLAT_JOYSTICKS 8
|
||||
#define MAX_JOYSTICKS 4
|
||||
|
||||
#define JS_TYPE_NONE 0
|
||||
#define JS_TYPE_2AXIS_4BUTTON 1
|
||||
#define JS_TYPE_2AXIS_6BUTTON 2
|
||||
#define JS_TYPE_2AXIS_8BUTTON 3
|
||||
#define JS_TYPE_4AXIS_4BUTTON 4
|
||||
#define JS_TYPE_CH_FLIGHTSTICK_PRO 5
|
||||
#define JS_TYPE_SIDEWINDER_PAD 6
|
||||
#define JS_TYPE_THRUSTMASTER_FCS 7
|
||||
|
||||
|
||||
#define POV_X 0x80000000
|
||||
#define POV_Y 0x40000000
|
||||
#define SLIDER 0x20000000
|
||||
@@ -84,11 +94,11 @@ typedef struct joystick_if_t {
|
||||
const char *internal_name;
|
||||
|
||||
void *(*init)(void);
|
||||
void (*close)(void *p);
|
||||
uint8_t (*read)(void *p);
|
||||
void (*write)(void *p);
|
||||
int (*read_axis)(void *p, int axis);
|
||||
void (*a0_over)(void *p);
|
||||
void (*close)(void *priv);
|
||||
uint8_t (*read)(void *priv);
|
||||
void (*write)(void *priv);
|
||||
int (*read_axis)(void *priv, int axis);
|
||||
void (*a0_over)(void *priv);
|
||||
|
||||
int axis_count;
|
||||
int button_count;
|
||||
@@ -133,16 +143,16 @@ extern void joystick_init(void);
|
||||
extern void joystick_close(void);
|
||||
extern void joystick_process(void);
|
||||
|
||||
extern char *joystick_get_name(int js);
|
||||
extern char *joystick_get_internal_name(int js);
|
||||
extern int joystick_get_from_internal_name(char *s);
|
||||
extern int joystick_get_max_joysticks(int js);
|
||||
extern int joystick_get_axis_count(int js);
|
||||
extern int joystick_get_button_count(int js);
|
||||
extern int joystick_get_pov_count(int js);
|
||||
extern char *joystick_get_axis_name(int js, int id);
|
||||
extern char *joystick_get_button_name(int js, int id);
|
||||
extern char *joystick_get_pov_name(int js, int id);
|
||||
extern const char *joystick_get_name(int js);
|
||||
extern const char *joystick_get_internal_name(int js);
|
||||
extern int joystick_get_from_internal_name(char *s);
|
||||
extern int joystick_get_max_joysticks(int js);
|
||||
extern int joystick_get_axis_count(int js);
|
||||
extern int joystick_get_button_count(int js);
|
||||
extern int joystick_get_pov_count(int js);
|
||||
extern const char *joystick_get_axis_name(int js, int id);
|
||||
extern const char *joystick_get_button_name(int js, int id);
|
||||
extern const char *joystick_get_pov_name(int js, int id);
|
||||
|
||||
extern void gameport_update_joystick_type(void);
|
||||
extern void gameport_remap(void *priv, uint16_t address);
|
||||
|
||||
@@ -53,13 +53,13 @@ extern void lpt1_remove_ams(void);
|
||||
#define lpt4_remove() lpt_port_remove(3)
|
||||
|
||||
#if 0
|
||||
#define lpt5_init(a) lpt_port_init(4, a)
|
||||
#define lpt5_irq(a) lpt_port_irq(4, a)
|
||||
#define lpt5_remove() lpt_port_remove(4)
|
||||
#define lpt5_init(a) lpt_port_init(4, a)
|
||||
#define lpt5_irq(a) lpt_port_irq(4, a)
|
||||
#define lpt5_remove() lpt_port_remove(4)
|
||||
|
||||
#define lpt6_init(a) lpt_port_init(5, a)
|
||||
#define lpt6_irq(a) lpt_port_irq(5, a)
|
||||
#define lpt6_remove() lpt_port_remove(5)
|
||||
#define lpt6_init(a) lpt_port_init(5, a)
|
||||
#define lpt6_irq(a) lpt_port_irq(5, a)
|
||||
#define lpt6_remove() lpt_port_remove(5)
|
||||
#endif
|
||||
|
||||
void lpt_devices_init(void);
|
||||
|
||||
@@ -12,11 +12,11 @@
|
||||
*
|
||||
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* John Elliott, <jce@seasip.info>
|
||||
*
|
||||
* Copyright 2017-2018 Fred N. van Kempen.
|
||||
* Copyright 2016-2018 Miran Grca.
|
||||
* Copyright 2008-2018 Sarah Walker.
|
||||
* Copyright 2008-2018 John Elliott.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
||||
@@ -12,11 +12,11 @@
|
||||
*
|
||||
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* John Elliott, <jce@seasip.info>
|
||||
*
|
||||
* Copyright 2017-2018 Fred N. van Kempen.
|
||||
* Copyright 2016-2018 Miran Grca.
|
||||
* Copyright 2008-2018 Sarah Walker.
|
||||
* Copyright 2008-2018 John Elliott.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
||||
@@ -28,18 +28,25 @@
|
||||
#define MACHINE_BUS_ISA 0x00000001 /* sys has ISA bus */
|
||||
#define MACHINE_BUS_CASSETTE 0x00000002 /* sys has cassette port */
|
||||
#define MACHINE_BUS_CARTRIDGE 0x00000004 /* sys has two cartridge bays */
|
||||
#define MACHINE_BUS_ISA16 0x00000008 /* sys has ISA16 bus - PC/AT architecture */
|
||||
#define MACHINE_BUS_CBUS 0x00000010 /* sys has C-BUS bus */
|
||||
#define MACHINE_BUS_PS2_LATCH 0x00000020 /* system has PS/2 keyboard controller IRQ latch */
|
||||
#define MACHINE_BUS_PS2_PORTS 0x00000040 /* system has PS/2 keyboard and mouse ports */
|
||||
#define MACHINE_BUS_PCJR 0x00000008 /* sys has PCjr sidecar bus */
|
||||
#define MACHINE_BUS_DM_KBC 0x00000010 /* system has keyboard controller that supports
|
||||
both XT and AT keyboards */
|
||||
#define MACHINE_BUS_ISA16 0x00000020 /* sys has ISA16 bus - PC/AT architecture */
|
||||
#define MACHINE_BUS_CBUS 0x00000040 /* sys has C-BUS bus */
|
||||
#define MACHINE_BUS_PCMCIA 0x00000080 /* sys has PCMCIA bus */
|
||||
#define MACHINE_BUS_PS2_LATCH 0x00000100 /* system has PS/2 keyboard controller IRQ latch */
|
||||
#define MACHINE_BUS_PS2_PORTS 0x00000200 /* system has PS/2 keyboard and mouse ports */
|
||||
#define MACHINE_BUS_PS2 (MACHINE_BUS_PS2_LATCH | MACHINE_BUS_PS2_PORTS)
|
||||
#define MACHINE_BUS_EISA 0x00000080 /* sys has EISA bus */
|
||||
#define MACHINE_BUS_VLB 0x00000100 /* sys has VL bus */
|
||||
#define MACHINE_BUS_MCA 0x00000200 /* sys has MCA bus */
|
||||
#define MACHINE_BUS_PCI 0x00000400 /* sys has PCI bus */
|
||||
#define MACHINE_BUS_PCMCIA 0x00000800 /* sys has PCMCIA bus */
|
||||
#define MACHINE_BUS_AGP 0x00001000 /* sys has AGP bus */
|
||||
#define MACHINE_BUS_AC97 0x00002000 /* sys has AC97 bus (ACR/AMR/CNR slot) */
|
||||
#define MACHINE_BUS_HIL 0x00000400 /* system has HP HIL keyboard and mouse ports */
|
||||
#define MACHINE_BUS_EISA 0x00000800 /* sys has EISA bus */
|
||||
#define MACHINE_BUS_OLB 0x00001000 /* sys has OPTi local bus */
|
||||
#define MACHINE_BUS_VLB 0x00002000 /* sys has VL bus */
|
||||
#define MACHINE_BUS_MCA 0x00004000 /* sys has MCA bus */
|
||||
#define MACHINE_BUS_PCI 0x00008000 /* sys has PCI bus */
|
||||
#define MACHINE_BUS_CARDBUS 0x00010000 /* sys has CardBus bus */
|
||||
#define MACHINE_BUS_USB 0x00020000 /* sys has USB bus */
|
||||
#define MACHINE_BUS_AGP 0x00040000 /* sys has AGP bus */
|
||||
#define MACHINE_BUS_AC97 0x00080000 /* sys has AC97 bus (ACR/AMR/CNR slot) */
|
||||
/* Aliases. */
|
||||
#define MACHINE_CASSETTE (MACHINE_BUS_CASSETTE) /* sys has cassette port */
|
||||
#define MACHINE_CARTRIDGE (MACHINE_BUS_CARTRIDGE) /* sys has two cartridge bays */
|
||||
@@ -73,61 +80,69 @@
|
||||
#define MACHINE_PS2_NOISA (MACHINE_PS2_AGP & ~MACHINE_AT) /* sys is AGP PS/2 without ISA */
|
||||
#define MACHINE_PS2_NOI97 (MACHINE_PS2_A97 & ~MACHINE_AT) /* sys is AGP/AC97 PS/2 without ISA */
|
||||
/* Feature flags for miscellaneous internal devices. */
|
||||
#define MACHINE_FLAGS_NONE 0x00000000 /* sys has no int devices */
|
||||
#define MACHINE_VIDEO 0x00000001 /* sys has int video */
|
||||
#define MACHINE_VIDEO_ONLY 0x00000002 /* sys has fixed video */
|
||||
#define MACHINE_MOUSE 0x00000004 /* sys has int mouse */
|
||||
#define MACHINE_FDC 0x00000008 /* sys has int FDC */
|
||||
#define MACHINE_LPT_PRI 0x00000010 /* sys has int pri LPT */
|
||||
#define MACHINE_LPT_SEC 0x00000020 /* sys has int sec LPT */
|
||||
#define MACHINE_UART_PRI 0x00000040 /* sys has int pri UART */
|
||||
#define MACHINE_UART_SEC 0x00000080 /* sys has int sec UART */
|
||||
#define MACHINE_UART_TER 0x00000100 /* sys has int ter UART */
|
||||
#define MACHINE_UART_QUA 0x00000200 /* sys has int qua UART */
|
||||
#define MACHINE_GAMEPORT 0x00000400 /* sys has int game port */
|
||||
#define MACHINE_SOUND 0x00000800 /* sys has int sound */
|
||||
#define MACHINE_NIC 0x00001000 /* sys has int NIC */
|
||||
#define MACHINE_MODEM 0x00002000 /* sys has int modem */
|
||||
#define MACHINE_FLAGS_NONE 0x00000000 /* sys has no int devices */
|
||||
#define MACHINE_SOFTFLOAT_ONLY 0x00000001 /* sys requires SoftFloat FPU */
|
||||
#define MACHINE_VIDEO 0x00000002 /* sys has int video */
|
||||
#define MACHINE_VIDEO_ONLY 0x00000004 /* sys has fixed video */
|
||||
#define MACHINE_MOUSE 0x00000008 /* sys has int mouse */
|
||||
#define MACHINE_FDC 0x00000010 /* sys has int FDC */
|
||||
#define MACHINE_LPT_PRI 0x00000020 /* sys has int pri LPT */
|
||||
#define MACHINE_LPT_SEC 0x00000040 /* sys has int sec LPT */
|
||||
#define MACHINE_LPT_TER 0x00000080 /* sys has int ter LPT */
|
||||
#define MACHINE_LPT_QUA 0x00000100 /* sys has int qua LPT */
|
||||
#define MACHINE_UART_PRI 0x00000200 /* sys has int pri UART */
|
||||
#define MACHINE_UART_SEC 0x00000400 /* sys has int sec UART */
|
||||
#define MACHINE_UART_TER 0x00000800 /* sys has int ter UART */
|
||||
#define MACHINE_UART_QUA 0x00001000 /* sys has int qua UART */
|
||||
#define MACHINE_GAMEPORT 0x00002000 /* sys has int game port */
|
||||
#define MACHINE_SOUND 0x00004000 /* sys has int sound */
|
||||
#define MACHINE_NIC 0x00008000 /* sys has int NIC */
|
||||
#define MACHINE_MODEM 0x00010000 /* sys has int modem */
|
||||
/* Feature flags for advanced devices. */
|
||||
#define MACHINE_APM 0x00004000 /* sys has APM */
|
||||
#define MACHINE_ACPI 0x00008000 /* sys has ACPI */
|
||||
#define MACHINE_HWM 0x00010000 /* sys has hw monitor */
|
||||
/* Combined flags. */
|
||||
#define MACHINE_VIDEO_FIXED (MACHINE_VIDEO | MACHINE_VIDEO_ONLY) /* sys has fixed int video */
|
||||
#define MACHINE_SUPER_IO (MACHINE_FDC | MACHINE_LPT_PRI | MACHINE_UART_PRI | MACHINE_UART_SEC)
|
||||
#define MACHINE_SUPER_IO_GAME (MACHINE_SUPER_IO | MACHINE_GAMEPORT)
|
||||
#define MACHINE_SUPER_IO_DUAL (MACHINE_SUPER_IO | MACHINE_LPT_SEC | MACHINE_UART_TER | MACHINE_UART_QUA)
|
||||
#define MACHINE_AV (MACHINE_VIDEO | MACHINE_SOUND) /* sys has video and sound */
|
||||
#define MACHINE_AG (MACHINE_SOUND | MACHINE_GAMEPORT) /* sys has sound and game port */
|
||||
#define MACHINE_APM 0x00020000 /* sys has APM */
|
||||
#define MACHINE_ACPI 0x00040000 /* sys has ACPI */
|
||||
#define MACHINE_HWM 0x00080000 /* sys has hw monitor */
|
||||
#define MACHINE_COREBOOT 0x00100000 /* sys has coreboot BIOS */
|
||||
/* Feature flags for internal storage controllers. */
|
||||
#define MACHINE_HDC 0x03FE0000 /* sys has int HDC */
|
||||
#define MACHINE_MFM 0x00020000 /* sys has int MFM/RLL */
|
||||
#define MACHINE_XTA 0x00040000 /* sys has int XTA */
|
||||
#define MACHINE_ESDI 0x00080000 /* sys has int ESDI */
|
||||
#define MACHINE_IDE_PRI 0x00100000 /* sys has int pri IDE/ATAPI */
|
||||
#define MACHINE_IDE_SEC 0x00200000 /* sys has int sec IDE/ATAPI */
|
||||
#define MACHINE_IDE_TER 0x00400000 /* sys has int ter IDE/ATAPI */
|
||||
#define MACHINE_IDE_QUA 0x00800000 /* sys has int qua IDE/ATAPI */
|
||||
#define MACHINE_SCSI_PRI 0x01000000 /* sys has int pri SCSI */
|
||||
#define MACHINE_SCSI_SEC 0x02000000 /* sys has int sec SCSI */
|
||||
#define MACHINE_USB_PRI 0x04000000 /* sys has int pri USB */
|
||||
#define MACHINE_USB_SEC 0x08000000 /* sys has int sec USB */
|
||||
#define MACHINE_COREBOOT 0x10000000 /* sys has coreboot BIOS */
|
||||
#define MACHINE_SOFTFLOAT_ONLY 0x20000000 /* sys requires softfloat FPU */
|
||||
#define MACHINE_MFM 0x00200000 /* sys has int MFM/RLL */
|
||||
#define MACHINE_XTA 0x00400000 /* sys has int XTA */
|
||||
#define MACHINE_ESDI 0x00800000 /* sys has int ESDI */
|
||||
#define MACHINE_IDE_PRI 0x01000000 /* sys has int pri IDE/ATAPI */
|
||||
#define MACHINE_IDE_SEC 0x02000000 /* sys has int sec IDE/ATAPI */
|
||||
#define MACHINE_IDE_TER 0x04000000 /* sys has int ter IDE/ATAPI */
|
||||
#define MACHINE_IDE_QUA 0x08000000 /* sys has int qua IDE/ATAPI */
|
||||
#define MACHINE_SCSI_PRI 0x10000000 /* sys has int pri SCSI */
|
||||
#define MACHINE_SCSI_SEC 0x20000000 /* sys has int sec SCSI */
|
||||
#define MACHINE_USB_PRI 0x40000000 /* sys has int pri USB */
|
||||
#define MACHINE_USB_SEC 0x80000000 /* sys has int sec USB */
|
||||
/* Combined flags. */
|
||||
#define MACHINE_IDE (MACHINE_IDE_PRI) /* sys has int single IDE/ATAPI - mark as pri IDE/ATAPI */
|
||||
#define MACHINE_IDE_DUAL (MACHINE_IDE_PRI | MACHINE_IDE_SEC) /* sys has int dual IDE/ATAPI - mark as both pri and sec IDE/ATAPI */
|
||||
#define MACHINE_IDE_DUALTQ (MACHINE_IDE_TER | MACHINE_IDE_QUA)
|
||||
#define MACHINE_IDE_QUAD (MACHINE_IDE_DUAL | MACHINE_IDE_DUALTQ) /* sys has int quad IDE/ATAPI - mark as dual + both ter and and qua IDE/ATAPI */
|
||||
#define MACHINE_SCSI (MACHINE_SCSI_PRI) /* sys has int single SCSI - mark as pri SCSI */
|
||||
#define MACHINE_SCSI_DUAL (MACHINE_SCSI_PRI | MACHINE_SCSI_SEC) /* sys has int dual SCSI - mark as both pri and sec SCSI */
|
||||
#define MACHINE_USB (MACHINE_USB_PRI)
|
||||
#define MACHINE_USB_DUAL (MACHINE_USB_PRI | MACHINE_USB_SEC)
|
||||
#define MACHINE_LPT (MACHINE_LPT-PRI | MACHINE_LPT_SEC | \
|
||||
MACHINE_LPT_TER | MACHINE_LPT_QUA)
|
||||
#define MACHINE_UART (MACHINE_UART_PRI | MACHINE_UART_SEC | \
|
||||
MACHINE_UART_TER | MACHINE_UART_QUA)
|
||||
#define MACHINE_VIDEO_FIXED (MACHINE_VIDEO | MACHINE_VIDEO_ONLY) /* sys has fixed int video */
|
||||
#define MACHINE_SUPER_IO (MACHINE_FDC | MACHINE_LPT_PRI | MACHINE_UART_PRI | MACHINE_UART_SEC)
|
||||
#define MACHINE_SUPER_IO_GAME (MACHINE_SUPER_IO | MACHINE_GAMEPORT)
|
||||
#define MACHINE_SUPER_IO_DUAL (MACHINE_SUPER_IO | MACHINE_LPT_SEC | \
|
||||
MACHINE_UART_TER | MACHINE_UART_QUA)
|
||||
#define MACHINE_AV (MACHINE_VIDEO | MACHINE_SOUND) /* sys has video and sound */
|
||||
#define MACHINE_AG (MACHINE_SOUND | MACHINE_GAMEPORT) /* sys has sound and game port */
|
||||
/* Combined flag for internal storage controllerss. */
|
||||
#define MACHINE_IDE (MACHINE_IDE_PRI) /* sys has int single IDE/ATAPI - mark as pri IDE/ATAPI */
|
||||
#define MACHINE_IDE_DUAL (MACHINE_IDE_PRI | MACHINE_IDE_SEC) /* sys has int dual IDE/ATAPI - mark as both pri and sec IDE/ATAPI */
|
||||
#define MACHINE_IDE_DUALTQ (MACHINE_IDE_TER | MACHINE_IDE_QUA)
|
||||
#define MACHINE_IDE_QUAD (MACHINE_IDE_DUAL | MACHINE_IDE_DUALTQ) /* sys has int quad IDE/ATAPI - mark as dual + both ter and and qua IDE/ATAPI */
|
||||
#define MACHINE_SCSI (MACHINE_SCSI_PRI) /* sys has int single SCSI - mark as pri SCSI */
|
||||
#define MACHINE_SCSI_DUAL (MACHINE_SCSI_PRI | MACHINE_SCSI_SEC) /* sys has int dual SCSI - mark as both pri and sec SCSI */
|
||||
#define MACHINE_USB (MACHINE_USB_PRI)
|
||||
#define MACHINE_USB_DUAL (MACHINE_USB_PRI | MACHINE_USB_SEC)
|
||||
#define MACHINE_HDC (MACHINE_MFM | MACHINE_XTA | \
|
||||
MACHINE_ESDI | MACHINE_IDE_QUAD | \
|
||||
MACHINE_SCSI_DUAL | MACHINE_USB_DUAL)
|
||||
/* Special combined flags. */
|
||||
#define MACHINE_PIIX (MACHINE_IDE_DUAL)
|
||||
#define MACHINE_PIIX3 (MACHINE_PIIX | MACHINE_USB)
|
||||
/* TODO: ACPI flag. */
|
||||
#define MACHINE_PIIX4 (MACHINE_PIIX3 | MACHINE_ACPI)
|
||||
#define MACHINE_PIIX (MACHINE_IDE_DUAL)
|
||||
#define MACHINE_PIIX3 (MACHINE_PIIX | MACHINE_USB)
|
||||
#define MACHINE_PIIX4 (MACHINE_PIIX3 | MACHINE_ACPI)
|
||||
|
||||
#define IS_ARCH(m, a) ((machines[m].bus_flags & (a)) ? 1 : 0)
|
||||
#define IS_AT(m) (((machines[m].bus_flags & (MACHINE_BUS_ISA16 | MACHINE_BUS_EISA | MACHINE_BUS_VLB | MACHINE_BUS_MCA | MACHINE_BUS_PCI | MACHINE_BUS_PCMCIA | MACHINE_BUS_AGP | MACHINE_BUS_AC97)) && !(machines[m].bus_flags & MACHINE_PC98)) ? 1 : 0)
|
||||
@@ -303,8 +318,8 @@ typedef struct _machine_ {
|
||||
void *kbc_device;
|
||||
#endif /* EMU_DEVICE_H */
|
||||
/* Bits:
|
||||
7-0 Set bits are forced set on P1 (no forced set = 0x00);
|
||||
15-8 Clear bits are forced clear on P1 (no foced clear = 0xff). */
|
||||
7-0 Set bits are forced set on P1 (no forced set = 0x00);
|
||||
15-8 Clear bits are forced clear on P1 (no foced clear = 0xff). */
|
||||
uint16_t kbc_p1;
|
||||
uint32_t gpio;
|
||||
uint32_t gpio_acpi;
|
||||
|
||||
@@ -65,7 +65,7 @@ extern const device_t mouse_logibus_device;
|
||||
extern const device_t mouse_logibus_onboard_device;
|
||||
extern const device_t mouse_msinport_device;
|
||||
# ifdef USE_GENIBUS
|
||||
extern const device_t mouse_genibus_device;
|
||||
extern const device_t mouse_genibus_device;
|
||||
# endif
|
||||
extern const device_t mouse_mssystems_device;
|
||||
extern const device_t mouse_msserial_device;
|
||||
@@ -78,6 +78,7 @@ extern const device_t mouse_wacom_artpad_device;
|
||||
extern void mouse_clear_x(void);
|
||||
extern void mouse_clear_y(void);
|
||||
extern void mouse_clear_coords(void);
|
||||
extern void mouse_clear_buttons(void);
|
||||
extern void mouse_subtract_x(int *delta_x, int *o_x, int min, int max, int abs);
|
||||
extern void mouse_subtract_y(int *delta_y, int *o_y, int min, int max, int invert, int abs);
|
||||
extern void mouse_subtract_coords(int *delta_x, int *delta_y, int *o_x, int *o_y,
|
||||
@@ -85,8 +86,11 @@ extern void mouse_subtract_coords(int *delta_x, int *delta_y, int *o_
|
||||
extern int mouse_moved(void);
|
||||
extern int mouse_state_changed(void);
|
||||
extern int mouse_mbut_changed(void);
|
||||
extern void mouse_scale_fx(double x);
|
||||
extern void mouse_scale_fy(double y);
|
||||
extern void mouse_scale_x(int x);
|
||||
extern void mouse_scale_y(int y);
|
||||
extern void mouse_scalef(double x, double y);
|
||||
extern void mouse_scale(int x, int y);
|
||||
extern void mouse_set_z(int z);
|
||||
extern void mouse_clear_z(void);
|
||||
|
||||
@@ -11,7 +11,7 @@
|
||||
*
|
||||
*
|
||||
*
|
||||
* Based on @(#)Dev3C501.cpp Oracle (VirtualBox)
|
||||
* Based on @(#)Dev3C501.cpp Oracle (VirtualBox)
|
||||
*
|
||||
* Authors: TheCollector1995, <mariogplayer@gmail.com>
|
||||
* Oracle
|
||||
|
||||
@@ -85,6 +85,7 @@ extern int nvr_dosave;
|
||||
#ifdef EMU_DEVICE_H
|
||||
extern const device_t at_nvr_old_device;
|
||||
extern const device_t at_nvr_device;
|
||||
extern const device_t at_mb_nvr_device;
|
||||
extern const device_t ps_nvr_device;
|
||||
extern const device_t amstrad_nvr_device;
|
||||
extern const device_t amstrad_megapc_nvr_device;
|
||||
|
||||
@@ -49,7 +49,7 @@ extern int strnicmp(const char *s1, const char *s2, size_t n);
|
||||
# define ftello64 ftello
|
||||
# define off64_t off_t
|
||||
#elif defined(_MSC_VER)
|
||||
// # define fopen64 fopen
|
||||
// # define fopen64 fopen
|
||||
# define fseeko64 _fseeki64
|
||||
# define ftello64 _ftelli64
|
||||
# define off64_t off_t
|
||||
|
||||
@@ -40,23 +40,23 @@ struct dirent {
|
||||
# define d_namlen d_reclen
|
||||
|
||||
typedef struct DIR_t {
|
||||
short flags; /* internal flags */
|
||||
short offset; /* offset of entry into dir */
|
||||
long handle; /* open handle to Win32 system */
|
||||
short sts; /* last known status code */
|
||||
char *dta; /* internal work data */
|
||||
short flags; /* internal flags */
|
||||
short offset; /* offset of entry into dir */
|
||||
long handle; /* open handle to Win32 system */
|
||||
short sts; /* last known status code */
|
||||
char *dta; /* internal work data */
|
||||
# ifdef UNICODE
|
||||
wchar_t dir[MAXDIRLEN + 1]; /* open dir */
|
||||
wchar_t dir[MAXDIRLEN + 1]; /* open dir */
|
||||
# else
|
||||
char dir[MAXDIRLEN + 1]; /* open dir */
|
||||
char dir[MAXDIRLEN + 1]; /* open dir */
|
||||
# endif
|
||||
struct dirent dent; /* actual directory entry */
|
||||
struct dirent dent; /* actual directory entry */
|
||||
} DIR;
|
||||
|
||||
/* Directory routine flags. */
|
||||
# define DIR_F_LOWER 0x0001 /* force to lowercase */
|
||||
# define DIR_F_SANE 0x0002 /* force this to sane path */
|
||||
# define DIR_F_ISROOT 0x0010 /* this is the root directory */
|
||||
# define DIR_F_LOWER 0x0001 /* force to lowercase */
|
||||
# define DIR_F_SANE 0x0002 /* force this to sane path */
|
||||
# define DIR_F_ISROOT 0x0010 /* this is the root directory */
|
||||
|
||||
/* Function prototypes. */
|
||||
extern DIR *opendir(const char *);
|
||||
|
||||
@@ -67,7 +67,7 @@
|
||||
#define IDT_CPU_SPEED 1710 /* CPU speed: */
|
||||
#define IDT_FPU 1711 /* FPU: */
|
||||
#define IDT_WAIT_STATES 1712 /* Wait states: */
|
||||
#define IDT_MB 1713 /* MB == IDC_TEXT_MB */
|
||||
#define IDT_MB 1713 /* MB == IDC_TEXT_MB */
|
||||
#define IDT_MEMORY 1714 /* Memory: */
|
||||
|
||||
/* DLG_CFG_VIDEO */
|
||||
|
||||
@@ -1,18 +1,18 @@
|
||||
/*
|
||||
* 86Box A hypervisor and IBM PC system emulator that specializes in
|
||||
* running old operating systems and software designed for IBM
|
||||
* PC systems and compatibles from 1981 through fairly recent
|
||||
* system designs based on the PCI bus.
|
||||
* 86Box A hypervisor and IBM PC system emulator that specializes in
|
||||
* running old operating systems and software designed for IBM
|
||||
* PC systems and compatibles from 1981 through fairly recent
|
||||
* system designs based on the PCI bus.
|
||||
*
|
||||
* This file is part of the 86Box distribution.
|
||||
* This file is part of the 86Box distribution.
|
||||
*
|
||||
* Definitions for the SMRAM interface.
|
||||
* Definitions for the SMRAM interface.
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
*
|
||||
* Copyright 2016-2020 Miran Grca.
|
||||
* Copyright 2016-2020 Miran Grca.
|
||||
*/
|
||||
|
||||
#ifndef EMU_ROW_H
|
||||
@@ -43,4 +43,4 @@ extern void row_set_boundary(uint8_t row_id, uint32_t boundary);
|
||||
extern device_t row_device;
|
||||
|
||||
|
||||
#endif /*EMU_ROW_H*/
|
||||
#endif /*EMU_ROW_H*/
|
||||
|
||||
@@ -30,32 +30,32 @@
|
||||
#define NVR_SIZE 256 /* size of NVR */
|
||||
|
||||
/* EEPROM map and bit definitions. */
|
||||
#define EE0_HOSTID 0x07 /* EE(0) [2:0] */
|
||||
#define EE0_ALTFLOP 0x80 /* EE(0) [7] FDC at 370h */
|
||||
#define EE1_IRQCH 0x07 /* EE(1) [3:0] */
|
||||
#define EE1_DMACH 0x70 /* EE(1) [7:4] */
|
||||
#define EE2_RMVOK 0x01 /* EE(2) [0] Support removable disks */
|
||||
#define EE2_HABIOS 0x02 /* EE(2) [1] HA Bios Space Reserved */
|
||||
#define EE2_INT19 0x04 /* EE(2) [2] HA Bios Controls INT19 */
|
||||
#define EE2_DYNSCAN 0x08 /* EE(2) [3] Dynamically scan bus */
|
||||
#define EE2_TWODRV 0x10 /* EE(2) [4] Allow more than 2 drives */
|
||||
#define EE2_SEEKRET 0x20 /* EE(2) [5] Immediate return on seek */
|
||||
#define EE2_EXT1G 0x80 /* EE(2) [7] Extended Translation >1GB */
|
||||
#define EE3_SPEED 0x00 /* EE(3) [7:0] DMA Speed */
|
||||
#define EE0_HOSTID 0x07 /* EE(0) [2:0] */
|
||||
#define EE0_ALTFLOP 0x80 /* EE(0) [7] FDC at 370h */
|
||||
#define EE1_IRQCH 0x07 /* EE(1) [3:0] */
|
||||
#define EE1_DMACH 0x70 /* EE(1) [7:4] */
|
||||
#define EE2_RMVOK 0x01 /* EE(2) [0] Support removable disks */
|
||||
#define EE2_HABIOS 0x02 /* EE(2) [1] HA Bios Space Reserved */
|
||||
#define EE2_INT19 0x04 /* EE(2) [2] HA Bios Controls INT19 */
|
||||
#define EE2_DYNSCAN 0x08 /* EE(2) [3] Dynamically scan bus */
|
||||
#define EE2_TWODRV 0x10 /* EE(2) [4] Allow more than 2 drives */
|
||||
#define EE2_SEEKRET 0x20 /* EE(2) [5] Immediate return on seek */
|
||||
#define EE2_EXT1G 0x80 /* EE(2) [7] Extended Translation >1GB */
|
||||
#define EE3_SPEED 0x00 /* EE(3) [7:0] DMA Speed */
|
||||
#define SPEED_33 0xFF
|
||||
#define SPEED_50 0x00
|
||||
#define SPEED_56 0x04
|
||||
#define SPEED_67 0x01
|
||||
#define SPEED_80 0x02
|
||||
#define SPEED_10 0x03
|
||||
#define EE4_FLOPTOK 0x80 /* EE(4) [7] Support Flopticals */
|
||||
#define EE6_PARITY 0x01 /* EE(6) [0] parity check enable */
|
||||
#define EE6_TERM 0x02 /* EE(6) [1] host term enable */
|
||||
#define EE6_RSTBUS 0x04 /* EE(6) [2] reset SCSI bus on boot */
|
||||
#define EEE_SYNC 0x01 /* EE(E) [0] Enable Sync Negotiation */
|
||||
#define EEE_DISCON 0x02 /* EE(E) [1] Enable Disconnection */
|
||||
#define EEE_FAST 0x04 /* EE(E) [2] Enable FAST SCSI */
|
||||
#define EEE_START 0x08 /* EE(E) [3] Enable Start Unit */
|
||||
#define EE4_FLOPTOK 0x80 /* EE(4) [7] Support Flopticals */
|
||||
#define EE6_PARITY 0x01 /* EE(6) [0] parity check enable */
|
||||
#define EE6_TERM 0x02 /* EE(6) [1] host term enable */
|
||||
#define EE6_RSTBUS 0x04 /* EE(6) [2] reset SCSI bus on boot */
|
||||
#define EEE_SYNC 0x01 /* EE(E) [0] Enable Sync Negotiation */
|
||||
#define EEE_DISCON 0x02 /* EE(E) [1] Enable Disconnection */
|
||||
#define EEE_FAST 0x04 /* EE(E) [2] Enable FAST SCSI */
|
||||
#define EEE_START 0x08 /* EE(E) [3] Enable Start Unit */
|
||||
|
||||
/*
|
||||
* Host Adapter I/O ports.
|
||||
@@ -166,11 +166,11 @@
|
||||
#define FOURTEEN_BYTES 0x00 /* Request Sense Buffer size */
|
||||
#define NO_AUTO_REQUEST_SENSE 0x01 /* No Request Sense Buffer */
|
||||
|
||||
/* Bytes 4, 5 and 6 Data Length - Data transfer byte count */
|
||||
/* Bytes 7, 8 and 9 Data Pointer - SGD List or Data Buffer */
|
||||
/* Bytes 10, 11 and 12 Link Pointer - Next CCB in Linked List */
|
||||
/* Byte 13 Command Link ID - TBD (I don't know yet) */
|
||||
/* Byte 14 Host Status - Host Adapter status */
|
||||
/* Bytes 4, 5 and 6 Data Length - Data transfer byte count */
|
||||
/* Bytes 7, 8 and 9 Data Pointer - SGD List or Data Buffer */
|
||||
/* Bytes 10, 11 and 12 Link Pointer - Next CCB in Linked List */
|
||||
/* Byte 13 Command Link ID - TBD (I don't know yet) */
|
||||
/* Byte 14 Host Status - Host Adapter status */
|
||||
#define CCB_COMPLETE 0x00 /* CCB completed without error */
|
||||
#define CCB_LINKED_COMPLETE 0x0A /* Linked command completed */
|
||||
#define CCB_LINKED_COMPLETE_INT 0x0B /* Linked complete with intr */
|
||||
|
||||
@@ -668,11 +668,11 @@ Short Delay Short Delay + Feedback
|
||||
|
||||
// Chorus Params
|
||||
typedef struct {
|
||||
WORD FbkLevel; // Feedback Level (0xE600-0xE6FF)
|
||||
WORD Delay; // Delay (0-0x0DA3) [1/44100 sec]
|
||||
WORD LfoDepth; // LFO Depth (0xBC00-0xBCFF)
|
||||
DWORD DelayR; // Right Delay (0-0xFFFFFFFF) [1/256/44100 sec]
|
||||
DWORD LfoFreq; // LFO Frequency (0-0xFFFFFFFF)
|
||||
WORD FbkLevel; // Feedback Level (0xE600-0xE6FF)
|
||||
WORD Delay; // Delay (0-0x0DA3) [1/44100 sec]
|
||||
WORD LfoDepth; // LFO Depth (0xBC00-0xBCFF)
|
||||
DWORD DelayR; // Right Delay (0-0xFFFFFFFF) [1/256/44100 sec]
|
||||
DWORD LfoFreq; // LFO Frequency (0-0xFFFFFFFF)
|
||||
} CHORUS_TYPE;
|
||||
|
||||
|
||||
|
||||
@@ -8,7 +8,7 @@
|
||||
*
|
||||
* Definitions for the NukedOPL3 driver.
|
||||
*
|
||||
* Version: @(#)snd_opl_nuked.h 1.0.5 2020/07/16
|
||||
* Version: @(#)snd_opl_nuked.h 1.0.5 2020/07/16
|
||||
*
|
||||
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
|
||||
@@ -7,6 +7,7 @@
|
||||
#define MAX_USEC64 1000000ULL
|
||||
#define MAX_USEC 1000000.0
|
||||
|
||||
#define TIMER_PROCESS 4
|
||||
#define TIMER_SPLIT 2
|
||||
#define TIMER_ENABLED 1
|
||||
|
||||
@@ -117,6 +118,13 @@ timer_is_enabled(pc_timer_t *timer)
|
||||
return !!(timer->flags & TIMER_ENABLED);
|
||||
}
|
||||
|
||||
/*True if timer currently on*/
|
||||
static __inline int
|
||||
timer_is_on(pc_timer_t *timer)
|
||||
{
|
||||
return ((timer->flags & TIMER_ENABLED) && (timer->period > 0.0));
|
||||
}
|
||||
|
||||
/*Return integer timestamp of timer*/
|
||||
static __inline uint32_t
|
||||
timer_get_ts_int(pc_timer_t *timer)
|
||||
|
||||
@@ -19,22 +19,31 @@
|
||||
#ifndef VIDEO_8514A_H
|
||||
#define VIDEO_8514A_H
|
||||
|
||||
typedef struct {
|
||||
int ena,
|
||||
x, y, xoff, yoff, cur_xsize, cur_ysize,
|
||||
v_acc, h_acc;
|
||||
uint32_t addr, pitch;
|
||||
typedef struct hwcursor8514_t {
|
||||
int ena;
|
||||
int x;
|
||||
int y;
|
||||
int xoff;
|
||||
int yoff;
|
||||
int cur_xsize;
|
||||
int cur_ysize;
|
||||
int v_acc;
|
||||
int h_acc;
|
||||
uint32_t addr;
|
||||
uint32_t pitch;
|
||||
} hwcursor8514_t;
|
||||
|
||||
typedef struct ibm8514_t {
|
||||
hwcursor8514_t hwcursor;
|
||||
hwcursor8514_t hwcursor_latch;
|
||||
uint8_t pos_regs[8];
|
||||
hwcursor8514_t hwcursor;
|
||||
hwcursor8514_t hwcursor_latch;
|
||||
uint8_t pos_regs[8];
|
||||
|
||||
int force_old_addr;
|
||||
int type;
|
||||
int local;
|
||||
int bpp;
|
||||
int on;
|
||||
int accel_bpp;
|
||||
|
||||
uint32_t vram_size;
|
||||
uint32_t vram_mask;
|
||||
@@ -49,9 +58,9 @@ typedef struct ibm8514_t {
|
||||
int dac_pos;
|
||||
int dac_r;
|
||||
int dac_g;
|
||||
int dac_b;
|
||||
int dac_b;
|
||||
int internal_pitch;
|
||||
int hwcursor_on;
|
||||
int hwcursor_on;
|
||||
|
||||
struct {
|
||||
uint16_t subsys_cntl;
|
||||
|
||||
@@ -45,8 +45,8 @@ typedef struct ega_t {
|
||||
uint8_t scrblank;
|
||||
uint8_t plane_mask;
|
||||
uint8_t ctl_mode;
|
||||
uint8_t pad;
|
||||
uint8_t pad0;
|
||||
uint8_t color_mux;
|
||||
uint8_t dot;
|
||||
uint8_t crtc[32];
|
||||
uint8_t gdcreg[16];
|
||||
uint8_t attrregs[32];
|
||||
@@ -108,6 +108,7 @@ typedef struct ega_t {
|
||||
int res_y;
|
||||
int bpp;
|
||||
int index;
|
||||
int remap_required;
|
||||
|
||||
uint32_t charseta;
|
||||
uint32_t charsetb;
|
||||
@@ -117,21 +118,24 @@ typedef struct ega_t {
|
||||
uint32_t ca;
|
||||
uint32_t vram_limit;
|
||||
uint32_t overscan_color;
|
||||
uint32_t cca;
|
||||
|
||||
uint32_t *pallook;
|
||||
|
||||
uint64_t dispontime;
|
||||
uint64_t dispofftime;
|
||||
|
||||
uint64_t dot_time;
|
||||
|
||||
pc_timer_t timer;
|
||||
pc_timer_t dot_timer;
|
||||
|
||||
double clock;
|
||||
double dot_clock;
|
||||
|
||||
int remap_required;
|
||||
uint32_t (*remap_func)(struct ega_t *ega, uint32_t in_addr);
|
||||
void * eeprom;
|
||||
|
||||
void (*render)(struct ega_t *svga);
|
||||
|
||||
void *eeprom;
|
||||
uint32_t (*remap_func)(struct ega_t *ega, uint32_t in_addr);
|
||||
void (*render)(struct ega_t *svga);
|
||||
} ega_t;
|
||||
#endif
|
||||
|
||||
|
||||
@@ -11,14 +11,10 @@
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
* EngiNerd, <webmaster.crrc@yahoo.it>
|
||||
*
|
||||
* Copyright 2008-2019 Sarah Walker.
|
||||
* Copyright 2016-2019 Miran Grca.
|
||||
* Copyright 2017-2019 Fred N. van Kempen.
|
||||
* Copyright 2020 EngiNerd.
|
||||
*/
|
||||
|
||||
|
||||
@@ -11,14 +11,10 @@
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
* EngiNerd, <webmaster.crrc@yahoo.it>
|
||||
*
|
||||
* Copyright 2008-2019 Sarah Walker.
|
||||
* Copyright 2016-2019 Miran Grca.
|
||||
* Copyright 2017-2019 Fred N. van Kempen.
|
||||
* Copyright 2020 EngiNerd.
|
||||
*/
|
||||
|
||||
|
||||
@@ -156,12 +156,12 @@ extern void pgc_sto_raster(pgc_t *, int16_t *x, int16_t *y);
|
||||
extern void pgc_ito_raster(pgc_t *, int32_t *x, int32_t *y);
|
||||
extern void pgc_dto_raster(pgc_t *, double *x, double *y);
|
||||
#if 0
|
||||
extern int pgc_input_byte(pgc_t *, uint8_t *val);
|
||||
extern int pgc_output_byte(pgc_t *, uint8_t val);
|
||||
extern int pgc_input_byte(pgc_t *, uint8_t *val);
|
||||
extern int pgc_output_byte(pgc_t *, uint8_t val);
|
||||
#endif
|
||||
extern int pgc_output_string(pgc_t *, const char *val);
|
||||
#if 0
|
||||
extern int pgc_error_byte(pgc_t *, uint8_t val);
|
||||
extern int pgc_error_byte(pgc_t *, uint8_t val);
|
||||
#endif
|
||||
extern int pgc_error_string(pgc_t *, const char *val);
|
||||
extern int pgc_error(pgc_t *, int err);
|
||||
|
||||
@@ -182,6 +182,7 @@ typedef struct svga_t {
|
||||
hwcursor_t overlay_latch;
|
||||
|
||||
void (*render)(struct svga_t *svga);
|
||||
void (*render8514)(struct svga_t *svga);
|
||||
void (*recalctimings_ex)(struct svga_t *svga);
|
||||
|
||||
void (*video_out)(uint16_t addr, uint8_t val, void *priv);
|
||||
@@ -271,7 +272,6 @@ typedef struct svga_t {
|
||||
} svga_t;
|
||||
|
||||
extern int vga_on;
|
||||
extern int ibm8514_on;
|
||||
|
||||
extern void ibm8514_poll(ibm8514_t *dev, svga_t *svga);
|
||||
extern void ibm8514_recalctimings(svga_t *svga);
|
||||
|
||||
@@ -1,18 +1,18 @@
|
||||
/*
|
||||
* 86Box A hypervisor and IBM PC system emulator that specializes in
|
||||
* running old operating systems and software designed for IBM
|
||||
* PC systems and compatibles from 1981 through fairly recent
|
||||
* system designs based on the PCI bus.
|
||||
* 86Box A hypervisor and IBM PC system emulator that specializes in
|
||||
* running old operating systems and software designed for IBM
|
||||
* PC systems and compatibles from 1981 through fairly recent
|
||||
* system designs based on the PCI bus.
|
||||
*
|
||||
* This file is part of the 86Box distribution.
|
||||
* This file is part of the 86Box distribution.
|
||||
*
|
||||
* 3DFX Voodoo emulation.
|
||||
* 3DFX Voodoo emulation.
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
*
|
||||
* Copyright 2008-2020 Sarah Walker.
|
||||
* Copyright 2008-2020 Sarah Walker.
|
||||
*/
|
||||
|
||||
#ifndef VIDEO_VOODOO_BLITTER_H
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -152,7 +152,7 @@ extern int changeframecount;
|
||||
|
||||
extern volatile int screenshots;
|
||||
#if 0
|
||||
extern bitmap_t *buffer32;
|
||||
extern bitmap_t *buffer32;
|
||||
#endif
|
||||
#define buffer32 (monitors[monitor_index_global].target_buffer)
|
||||
#define pal_lookup (monitors[monitor_index_global].mon_pal_lookup)
|
||||
@@ -179,7 +179,7 @@ extern bitmap_t *buffer32;
|
||||
extern PALETTE cgapal;
|
||||
extern PALETTE cgapal_mono[6];
|
||||
#if 0
|
||||
extern uint32_t pal_lookup[256];
|
||||
extern uint32_t pal_lookup[256];
|
||||
#endif
|
||||
extern int video_fullscreen;
|
||||
extern int video_fullscreen_scale;
|
||||
@@ -352,6 +352,7 @@ extern const device_t gd5429_vlb_device;
|
||||
extern const device_t gd5430_diamond_speedstar_pro_se_a8_vlb_device;
|
||||
extern const device_t gd5430_vlb_device;
|
||||
extern const device_t gd5430_pci_device;
|
||||
extern const device_t gd5430_onboard_pci_device;
|
||||
extern const device_t gd5434_isa_device;
|
||||
extern const device_t gd5434_diamond_speedstar_64_a3_isa_device;
|
||||
extern const device_t gd5434_onboard_pci_device;
|
||||
|
||||
@@ -1299,7 +1299,7 @@ lcdm_poll(amsvid_t *vid)
|
||||
drawcursor = ((mda->ma == ca) && mda->con && mda->cursoron);
|
||||
blink = ((mda->blink & 16) && (mda->ctrl & 0x20) && (attr & 0x80) && !drawcursor);
|
||||
|
||||
lcd_draw_char_80(vid, &((buffer32->line[mda->displine]))[x * 8], chr, attr, drawcursor, blink, mda->sc, 0, mda->ctrl);
|
||||
lcd_draw_char_80(vid, &(buffer32->line[mda->displine])[x * 8], chr, attr, drawcursor, blink, mda->sc, 0, mda->ctrl);
|
||||
mda->ma++;
|
||||
}
|
||||
}
|
||||
@@ -2005,10 +2005,8 @@ const device_t vid_pc3086_device = {
|
||||
};
|
||||
|
||||
static void
|
||||
ms_write(uint16_t addr, UNUSED(uint8_t val), void *priv)
|
||||
ms_write(uint16_t addr, UNUSED(uint8_t val), UNUSED(void *priv))
|
||||
{
|
||||
amstrad_t *ams = (amstrad_t *) priv;
|
||||
|
||||
if ((addr == 0x78) || (addr == 0x79))
|
||||
mouse_clear_x();
|
||||
else
|
||||
@@ -2016,11 +2014,10 @@ ms_write(uint16_t addr, UNUSED(uint8_t val), void *priv)
|
||||
}
|
||||
|
||||
static uint8_t
|
||||
ms_read(uint16_t addr, void *priv)
|
||||
ms_read(uint16_t addr, UNUSED(void *priv))
|
||||
{
|
||||
amstrad_t *ams = (amstrad_t *) priv;
|
||||
uint8_t ret;
|
||||
int delta = 0;
|
||||
uint8_t ret;
|
||||
int delta = 0;
|
||||
|
||||
if ((addr == 0x78) || (addr == 0x79)) {
|
||||
mouse_subtract_x(&delta, NULL, -128, 127, 0);
|
||||
|
||||
@@ -10,11 +10,9 @@
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
* EngiNerd <webmaster.crrc@yahoo.it>
|
||||
*
|
||||
* Copyright 2010-2019 Sarah Walker.
|
||||
* Copyright 2016-2019 Miran Grca.
|
||||
* Copyright 2020 EngiNerd.
|
||||
*/
|
||||
|
||||
@@ -10,10 +10,8 @@
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
*
|
||||
* Copyright 2010-2020 Sarah Walker.
|
||||
* Copyright 2016-2020 Miran Grca.
|
||||
*/
|
||||
#include <stdarg.h>
|
||||
@@ -632,16 +630,24 @@ machine_at_pc330_6573_init(const machine_t *model) /* doesn't like every CPU oth
|
||||
if (bios_only || !ret)
|
||||
return ret;
|
||||
|
||||
machine_at_common_init(model);
|
||||
machine_at_common_init_ex(model, 2);
|
||||
device_add(&ide_vlb_2ch_device);
|
||||
|
||||
pci_init(PCI_CONFIG_TYPE_1);
|
||||
pci_register_slot(0x10, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
|
||||
pci_register_slot(0x11, PCI_CARD_NORMAL, 1, 2, 3, 4);
|
||||
pci_register_slot(0x12, PCI_CARD_NORMAL, 2, 3, 4, 1);
|
||||
pci_register_slot(0x13, PCI_CARD_NORMAL, 3, 4, 1, 2);
|
||||
pci_register_slot(0x10, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
|
||||
pci_register_slot(0x0B, PCI_CARD_NORMAL, 1, 2, 3, 4);
|
||||
pci_register_slot(0x0C, PCI_CARD_NORMAL, 5, 6, 7, 8);
|
||||
pci_register_slot(0x0D, PCI_CARD_NORMAL, 9, 10, 11, 12);
|
||||
/* This is a guess because the BIOS always gives it a video BIOS
|
||||
and never gives it an IRQ, so it is impossible to known for
|
||||
certain until we obtain PCI readouts from the real machine. */
|
||||
pci_register_slot(0x0E, PCI_CARD_VIDEO, 13, 14, 15, 16);
|
||||
|
||||
device_add(&opti802g_pci_device);
|
||||
if (gfxcard[0] == VID_INTERNAL)
|
||||
device_add(&gd5430_onboard_pci_device);
|
||||
|
||||
device_add(&opti602_device);
|
||||
device_add(&opti802g_device);
|
||||
device_add(&opti822_device);
|
||||
device_add(&keyboard_ps2_ami_device);
|
||||
device_add(&fdc37c665_ide_device);
|
||||
@@ -1568,7 +1574,7 @@ machine_at_ecs486_init(const machine_t *model)
|
||||
device_add(&ide_cmd640_pci_legacy_only_device);
|
||||
device_add(&fdc37c665_device);
|
||||
device_add(&intel_flash_bxt_device);
|
||||
device_add(&keyboard_at_ami_device);
|
||||
device_add(&keyboard_ps2_ami_device);
|
||||
|
||||
return ret;
|
||||
}
|
||||
@@ -1717,7 +1723,7 @@ machine_at_spc7700plw_init(const machine_t *model)
|
||||
device_add(&umc_8886af_device);
|
||||
device_add(&fdc37c665_device);
|
||||
device_add(&intel_flash_bxt_device);
|
||||
device_add(&keyboard_at_ami_device);
|
||||
device_add(&keyboard_ps2_ami_device);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -31,6 +31,7 @@
|
||||
#include <86box/mem.h>
|
||||
#include <86box/rom.h>
|
||||
#include <86box/device.h>
|
||||
#include <86box/chipset.h>
|
||||
#include <86box/keyboard.h>
|
||||
#include <86box/fdd.h>
|
||||
#include <86box/fdc.h>
|
||||
@@ -704,8 +705,8 @@ const device_config_t compaq_plasma_config[] = {
|
||||
// clang-format off
|
||||
{
|
||||
.name = "rgb_type",
|
||||
.description = "RGB type",
|
||||
.type = CONFIG_SELECTION,
|
||||
.description = "RGB type",
|
||||
.type = CONFIG_SELECTION,
|
||||
.default_string = "",
|
||||
.default_int = 0,
|
||||
.file_filter = "",
|
||||
@@ -795,34 +796,28 @@ machine_at_compaq_init(const machine_t *model, int type)
|
||||
{
|
||||
compaq_machine_type = type;
|
||||
|
||||
if ((type != COMPAQ_DESKPRO386) && (type != COMPAQ_DESKPRO386_01_1988))
|
||||
mem_remap_top(384);
|
||||
|
||||
if (fdc_type == FDC_INTERNAL)
|
||||
device_add(&fdc_at_device);
|
||||
|
||||
if ((type == COMPAQ_DESKPRO386) || (type == COMPAQ_DESKPRO386_01_1988) || (type == COMPAQ_PORTABLEIII386))
|
||||
mem_mapping_add(&ram_mapping, 0xfa0000, 0x60000,
|
||||
read_ram, read_ramw, read_raml,
|
||||
write_ram, write_ramw, write_raml,
|
||||
0xa0000 + ram, MEM_MAPPING_EXTERNAL, NULL);
|
||||
else
|
||||
if (type < COMPAQ_PORTABLEIII386) {
|
||||
mem_remap_top(384);
|
||||
mem_mapping_add(&ram_mapping, 0xfa0000, 0x60000,
|
||||
read_ram, read_ramw, read_raml,
|
||||
write_ram, write_ramw, write_raml,
|
||||
0xa0000 + ram, MEM_MAPPING_INTERNAL, NULL);
|
||||
}
|
||||
|
||||
video_reset(gfxcard[0]);
|
||||
|
||||
switch (type) {
|
||||
case COMPAQ_PORTABLEII:
|
||||
machine_at_init(model);
|
||||
machine_at_init(model);
|
||||
break;
|
||||
|
||||
case COMPAQ_PORTABLEIII:
|
||||
if (gfxcard[0] == VID_INTERNAL)
|
||||
device_add(&compaq_plasma_device);
|
||||
machine_at_init(model);
|
||||
machine_at_init(model);
|
||||
break;
|
||||
|
||||
case COMPAQ_PORTABLEIII386:
|
||||
@@ -830,13 +825,14 @@ machine_at_compaq_init(const machine_t *model, int type)
|
||||
device_add(&ide_isa_device);
|
||||
if (gfxcard[0] == VID_INTERNAL)
|
||||
device_add(&compaq_plasma_device);
|
||||
machine_at_init(model);
|
||||
machine_at_init(model);
|
||||
break;
|
||||
|
||||
case COMPAQ_DESKPRO386:
|
||||
case COMPAQ_DESKPRO386_01_1988:
|
||||
if (hdc_current == 1)
|
||||
device_add(&ide_isa_device);
|
||||
device_add(&compaq_386_device);
|
||||
machine_at_common_init(model);
|
||||
device_add(&keyboard_at_compaq_device);
|
||||
break;
|
||||
|
||||
@@ -10,10 +10,8 @@
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
*
|
||||
* Copyright 2010-2019 Sarah Walker.
|
||||
* Copyright 2016-2019 Miran Grca.
|
||||
*/
|
||||
#include <stdio.h>
|
||||
|
||||
@@ -10,10 +10,8 @@
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
*
|
||||
* Copyright 2010-2019 Sarah Walker.
|
||||
* Copyright 2016-2019 Miran Grca.
|
||||
*/
|
||||
#include <stdio.h>
|
||||
@@ -191,7 +189,7 @@ machine_at_zappa_init(const machine_t *model)
|
||||
if (bios_only || !ret)
|
||||
return ret;
|
||||
|
||||
machine_at_common_init(model);
|
||||
machine_at_common_init_ex(model, 2);
|
||||
|
||||
pci_init(PCI_CONFIG_TYPE_1);
|
||||
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
|
||||
|
||||
@@ -10,11 +10,8 @@
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Melissa Goad, <mszoopers@protonmail.com>
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
*
|
||||
* Copyright 2010-2020 Sarah Walker.
|
||||
* Copyright 2016-2020 Miran Grca.
|
||||
*
|
||||
*/
|
||||
@@ -189,7 +186,7 @@ machine_at_tc430hx_init(const machine_t *model)
|
||||
if (bios_only || !ret)
|
||||
return ret;
|
||||
|
||||
machine_at_common_init(model);
|
||||
machine_at_common_init_ex(model, 2);
|
||||
|
||||
pci_init(PCI_CONFIG_TYPE_1);
|
||||
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
|
||||
@@ -224,7 +221,7 @@ machine_at_infinia7200_init(const machine_t *model)
|
||||
if (bios_only || !ret)
|
||||
return ret;
|
||||
|
||||
machine_at_common_init(model);
|
||||
machine_at_common_init_ex(model, 2);
|
||||
|
||||
pci_init(PCI_CONFIG_TYPE_1);
|
||||
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
|
||||
@@ -260,7 +257,7 @@ machine_at_equium5200_init(const machine_t *model)
|
||||
if (bios_only || !ret)
|
||||
return ret;
|
||||
|
||||
machine_at_common_init(model);
|
||||
machine_at_common_init_ex(model, 2);
|
||||
|
||||
pci_init(PCI_CONFIG_TYPE_1);
|
||||
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
|
||||
@@ -294,7 +291,7 @@ machine_at_pcv90_init(const machine_t *model)
|
||||
if (bios_only || !ret)
|
||||
return ret;
|
||||
|
||||
machine_at_common_init(model);
|
||||
machine_at_common_init_ex(model, 2);
|
||||
|
||||
pci_init(PCI_CONFIG_TYPE_1);
|
||||
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
|
||||
@@ -550,7 +547,7 @@ machine_at_pb680_init(const machine_t *model)
|
||||
if (bios_only || !ret)
|
||||
return ret;
|
||||
|
||||
machine_at_common_init(model);
|
||||
machine_at_common_init_ex(model, 2);
|
||||
|
||||
pci_init(PCI_CONFIG_TYPE_1);
|
||||
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
|
||||
|
||||
@@ -10,11 +10,8 @@
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Melissa Goad, <mszoopers@protonmail.com>
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
*
|
||||
* Copyright 2010-2020 Sarah Walker.
|
||||
* Copyright 2016-2020 Miran Grca.
|
||||
*/
|
||||
#include <stdio.h>
|
||||
@@ -47,7 +44,7 @@
|
||||
static void
|
||||
machine_at_thor_common_init(const machine_t *model, int mr)
|
||||
{
|
||||
machine_at_common_init_ex(model, mr);
|
||||
machine_at_common_init_ex(model, 2);
|
||||
|
||||
pci_init(PCI_CONFIG_TYPE_1);
|
||||
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
|
||||
@@ -61,9 +58,6 @@ machine_at_thor_common_init(const machine_t *model, int mr)
|
||||
if (gfxcard[0] == VID_INTERNAL)
|
||||
device_add(&s3_phoenix_trio64vplus_onboard_pci_device);
|
||||
|
||||
#if 0
|
||||
device_add(&keyboard_ps2_ami_pci_device);
|
||||
#endif
|
||||
device_add(&keyboard_ps2_intel_ami_pci_device);
|
||||
device_add(&i430fx_device);
|
||||
device_add(&piix_device);
|
||||
@@ -213,7 +207,7 @@ machine_at_endeavor_init(const machine_t *model)
|
||||
if (bios_only || !ret)
|
||||
return ret;
|
||||
|
||||
machine_at_common_init(model);
|
||||
machine_at_common_init_ex(model, 2);
|
||||
|
||||
pci_init(PCI_CONFIG_TYPE_1);
|
||||
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
|
||||
@@ -276,7 +270,7 @@ machine_at_pb640_init(const machine_t *model)
|
||||
if (bios_only || !ret)
|
||||
return ret;
|
||||
|
||||
machine_at_common_init(model);
|
||||
machine_at_common_init_ex(model, 2);
|
||||
|
||||
pci_init(PCI_CONFIG_TYPE_1);
|
||||
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
|
||||
@@ -458,7 +452,7 @@ machine_at_p55t2s_init(const machine_t *model)
|
||||
if (bios_only || !ret)
|
||||
return ret;
|
||||
|
||||
machine_at_common_init(model);
|
||||
machine_at_common_init_ex(model, 2);
|
||||
|
||||
pci_init(PCI_CONFIG_TYPE_1);
|
||||
pci_register_slot(0x00, PCI_CARD_NORTHBRIDGE, 0, 0, 0, 0);
|
||||
|
||||
@@ -10,13 +10,9 @@
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Melissa Goad, <mszoopers@protonmail.com>
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
*
|
||||
* Copyright 2010-2020 Sarah Walker.
|
||||
* Copyright 2016-2020 Miran Grca.
|
||||
* Copyright 2020 Melissa Goad.
|
||||
*/
|
||||
#include <stdio.h>
|
||||
#include <stdint.h>
|
||||
|
||||
@@ -121,11 +121,11 @@
|
||||
*
|
||||
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* John Elliott, <jce@seasip.info>
|
||||
*
|
||||
* Copyright 2017-2018 Fred N. van Kempen.
|
||||
* Copyright 2016-2018 Miran Grca.
|
||||
* Copyright 2008-2018 Sarah Walker.
|
||||
* Copyright 2008-2018 John Elliott.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
||||
@@ -26,11 +26,11 @@
|
||||
*
|
||||
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* John Elliott, <jce@seasip.info>
|
||||
*
|
||||
* Copyright 2017-2019 Fred N. van Kempen.
|
||||
* Copyright 2016-2019 Miran Grca.
|
||||
* Copyright 2008-2019 Sarah Walker.
|
||||
* Copyright 2008-2019 John Elliott.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
||||
@@ -1504,7 +1504,7 @@ m19_vid_init(m19_vid_t *vid)
|
||||
#endif
|
||||
|
||||
/* OGC emulation part begin */
|
||||
loadfont_ex("roms/machines/m19/BIOS.BIN", 1, 90);
|
||||
loadfont("roms/machines/m19/MBM2764-30 8514 107 AB PCF3.BIN", 7);
|
||||
/* composite is not working yet */
|
||||
vid->ogc.cga.composite = 0; // (display_type != CGA_RGB);
|
||||
vid->ogc.cga.revision = device_get_config_int("composite_type");
|
||||
@@ -1916,6 +1916,7 @@ machine_xt_m19_init(const machine_t *model)
|
||||
|
||||
ret = bios_load_linear("roms/machines/m19/BIOS.BIN",
|
||||
0x000fc000, 16384, 0);
|
||||
ret &= rom_present("roms/machines/m19/MBM2764-30 8514 107 AB PCF3.BIN");
|
||||
|
||||
if (bios_only || !ret)
|
||||
return ret;
|
||||
|
||||
@@ -55,11 +55,11 @@
|
||||
*
|
||||
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* John Elliott, <jce@seasip.info>
|
||||
*
|
||||
* Copyright 2018-2019 Fred N. van Kempen.
|
||||
* Copyright 2018-2019 Miran Grca.
|
||||
* Copyright 2018-2019 Sarah Walker.
|
||||
* Copyright 2018-2019 John Elliott.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
||||
@@ -13,11 +13,11 @@
|
||||
*
|
||||
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* John Elliott, <jce@seasip.info>
|
||||
*
|
||||
* Copyright 2018-2019 Fred N. van Kempen.
|
||||
* Copyright 2018-2019 Miran Grca.
|
||||
* Copyright 2018-2019 Sarah Walker.
|
||||
* Copyright 2018-2019 John Elliott.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
||||
@@ -11,12 +11,12 @@
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* Authors: Tux,
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* TheCollector1995, <mariogplayer@gmail.com>
|
||||
* EngiNerd <webmaster.crrc@yahoo.it>
|
||||
*
|
||||
* Copyright 2008-2019 Sarah Walker.
|
||||
* Copyright 2016-2019 Tux.
|
||||
* Copyright 2016-2019 Miran Grca.
|
||||
* Copyright 2020 EngiNerd.
|
||||
*/
|
||||
|
||||
@@ -10,11 +10,9 @@
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
* Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
*
|
||||
* Copyright 2008-2020 Sarah Walker.
|
||||
* Copyright 2016-2020 Miran Grca.
|
||||
* Copyright 2017-2020 Fred N. van Kempen.
|
||||
*/
|
||||
|
||||
@@ -13,11 +13,9 @@
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
* Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
*
|
||||
* Copyright 2008-2020 Sarah Walker.
|
||||
* Copyright 2016-2020 Miran Grca.
|
||||
* Copyright 2017-2020 Fred N. van Kempen.
|
||||
*/
|
||||
@@ -4694,9 +4692,9 @@ const machine_t machines[] = {
|
||||
.bus_flags = MACHINE_AT,
|
||||
.flags = MACHINE_IDE,
|
||||
.ram = {
|
||||
.min = 640,
|
||||
.min = 1024,
|
||||
.max = 16384,
|
||||
.step = 128
|
||||
.step = 1024
|
||||
},
|
||||
.nvrmask = 63,
|
||||
.kbc_device = NULL,
|
||||
@@ -4732,9 +4730,9 @@ const machine_t machines[] = {
|
||||
.bus_flags = MACHINE_AT,
|
||||
.flags = MACHINE_IDE,
|
||||
.ram = {
|
||||
.min = 640,
|
||||
.min = 1024,
|
||||
.max = 16384,
|
||||
.step = 128
|
||||
.step = 1024
|
||||
},
|
||||
.nvrmask = 63,
|
||||
.kbc_device = NULL,
|
||||
@@ -6485,17 +6483,17 @@ const machine_t machines[] = {
|
||||
.max_multi = 3.0
|
||||
},
|
||||
.bus_flags = MACHINE_PS2_PCI,
|
||||
.flags = MACHINE_IDE | MACHINE_APM,
|
||||
.flags = MACHINE_IDE | MACHINE_VIDEO | MACHINE_APM,
|
||||
.ram = {
|
||||
.min = 1024,
|
||||
.max = 65536,
|
||||
.step = 1024
|
||||
},
|
||||
.nvrmask = 127,
|
||||
.nvrmask = 255,
|
||||
.kbc_device = NULL,
|
||||
.kbc_p1 = 0,
|
||||
.gpio = 0,
|
||||
.device = NULL,
|
||||
.device = &gd5430_onboard_pci_device,
|
||||
.fdc_device = NULL,
|
||||
.sio_device = NULL,
|
||||
.vid_device = NULL,
|
||||
@@ -7072,7 +7070,7 @@ const machine_t machines[] = {
|
||||
.min_multi = 0,
|
||||
.max_multi = 0
|
||||
},
|
||||
.bus_flags = MACHINE_PCI,
|
||||
.bus_flags = MACHINE_PCI | MACHINE_BUS_PS2_LATCH,
|
||||
.flags = MACHINE_IDE_DUAL | MACHINE_APM,
|
||||
.ram = {
|
||||
.min = 1024,
|
||||
@@ -8322,7 +8320,7 @@ const machine_t machines[] = {
|
||||
.max = 131072,
|
||||
.step = 8192
|
||||
},
|
||||
.nvrmask = 127,
|
||||
.nvrmask = 255,
|
||||
.kbc_device = NULL,
|
||||
.kbc_p1 = 0,
|
||||
.gpio = 0,
|
||||
@@ -8763,7 +8761,7 @@ const machine_t machines[] = {
|
||||
.max = 131072,
|
||||
.step = 8192
|
||||
},
|
||||
.nvrmask = 127,
|
||||
.nvrmask = 255,
|
||||
.kbc_device = NULL,
|
||||
.kbc_p1 = 0,
|
||||
.gpio = 0,
|
||||
@@ -8844,7 +8842,7 @@ const machine_t machines[] = {
|
||||
.max = 131072,
|
||||
.step = 8192
|
||||
},
|
||||
.nvrmask = 127,
|
||||
.nvrmask = 255,
|
||||
.kbc_device = NULL,
|
||||
.kbc_p1 = 0,
|
||||
.gpio = 0,
|
||||
@@ -8885,7 +8883,7 @@ const machine_t machines[] = {
|
||||
.max = 131072,
|
||||
.step = 8192
|
||||
},
|
||||
.nvrmask = 127,
|
||||
.nvrmask = 255,
|
||||
.kbc_device = NULL,
|
||||
.kbc_p1 = 0,
|
||||
.gpio = 0,
|
||||
@@ -8926,7 +8924,7 @@ const machine_t machines[] = {
|
||||
.max = 131072,
|
||||
.step = 8192
|
||||
},
|
||||
.nvrmask = 127,
|
||||
.nvrmask = 255,
|
||||
.kbc_device = NULL,
|
||||
.kbc_p1 = 0,
|
||||
.gpio = 0,
|
||||
@@ -9005,7 +9003,7 @@ const machine_t machines[] = {
|
||||
.max = 131072,
|
||||
.step = 8192
|
||||
},
|
||||
.nvrmask = 127,
|
||||
.nvrmask = 255,
|
||||
.kbc_device = NULL,
|
||||
.kbc_p1 = 0,
|
||||
.gpio = 0,
|
||||
@@ -9244,7 +9242,7 @@ const machine_t machines[] = {
|
||||
.max = 786432,
|
||||
.step = 8192
|
||||
},
|
||||
.nvrmask = 127,
|
||||
.nvrmask = 255,
|
||||
.kbc_device = NULL,
|
||||
.kbc_p1 = 0,
|
||||
.gpio = 0,
|
||||
@@ -9648,7 +9646,7 @@ const machine_t machines[] = {
|
||||
.max = 196608,
|
||||
.step = 8192
|
||||
},
|
||||
.nvrmask = 127,
|
||||
.nvrmask = 255,
|
||||
.kbc_device = NULL,
|
||||
.kbc_p1 = 0,
|
||||
.gpio = 0,
|
||||
@@ -9690,7 +9688,7 @@ const machine_t machines[] = {
|
||||
.max = 196608,
|
||||
.step = 8192
|
||||
},
|
||||
.nvrmask = 127,
|
||||
.nvrmask = 255,
|
||||
.kbc_device = NULL,
|
||||
.kbc_p1 = 0,
|
||||
.gpio = 0,
|
||||
@@ -10086,7 +10084,7 @@ const machine_t machines[] = {
|
||||
.max = 131072,
|
||||
.step = 8192
|
||||
},
|
||||
.nvrmask = 127,
|
||||
.nvrmask = 255,
|
||||
.kbc_device = NULL,
|
||||
.kbc_p1 = 0,
|
||||
.gpio = 0,
|
||||
|
||||
@@ -132,6 +132,7 @@ readmembl_2386(uint32_t addr)
|
||||
{
|
||||
mem_mapping_t *map;
|
||||
uint64_t a;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
GDBSTUB_MEM_ACCESS(addr, GDBSTUB_MEM_READ, 1);
|
||||
|
||||
@@ -145,15 +146,15 @@ readmembl_2386(uint32_t addr)
|
||||
addr64 = (uint32_t) a;
|
||||
|
||||
if (a > 0xffffffffULL)
|
||||
return 0xff;
|
||||
return 0xff;
|
||||
}
|
||||
addr = (uint32_t) (addr64 & rammask);
|
||||
|
||||
map = read_mapping[addr >> MEM_GRANULARITY_BITS];
|
||||
if (map && map->read_b)
|
||||
return map->read_b(addr, map->priv);
|
||||
ret = map->read_b(addr, map->priv);
|
||||
|
||||
return 0xff;
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
@@ -190,6 +191,7 @@ uint8_t
|
||||
readmembl_no_mmut_2386(uint32_t addr, uint32_t a64)
|
||||
{
|
||||
mem_mapping_t *map;
|
||||
uint8_t ret = 0xff;
|
||||
|
||||
GDBSTUB_MEM_ACCESS(addr, GDBSTUB_MEM_READ, 1);
|
||||
|
||||
@@ -205,9 +207,9 @@ readmembl_no_mmut_2386(uint32_t addr, uint32_t a64)
|
||||
|
||||
map = read_mapping[addr >> MEM_GRANULARITY_BITS];
|
||||
if (map && map->read_b)
|
||||
return map->read_b(addr, map->priv);
|
||||
ret = map->read_b(addr, map->priv);
|
||||
|
||||
return 0xff;
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
@@ -241,6 +243,7 @@ readmemwl_2386(uint32_t addr)
|
||||
mem_mapping_t *map;
|
||||
int i;
|
||||
uint64_t a;
|
||||
uint16_t ret = 0xffff;
|
||||
|
||||
addr64a[0] = addr;
|
||||
addr64a[1] = addr + 1;
|
||||
@@ -283,14 +286,13 @@ readmemwl_2386(uint32_t addr)
|
||||
map = read_mapping[addr >> MEM_GRANULARITY_BITS];
|
||||
|
||||
if (map && map->read_w)
|
||||
return map->read_w(addr, map->priv);
|
||||
|
||||
if (map && map->read_b) {
|
||||
return map->read_b(addr, map->priv) |
|
||||
((uint16_t) (map->read_b(addr + 1, map->priv)) << 8);
|
||||
ret = map->read_w(addr, map->priv);
|
||||
else if (map && map->read_b) {
|
||||
ret = map->read_b(addr, map->priv) |
|
||||
((uint16_t) (map->read_b(addr + 1, map->priv)) << 8);
|
||||
}
|
||||
|
||||
return 0xffff;
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
@@ -361,6 +363,7 @@ uint16_t
|
||||
readmemwl_no_mmut_2386(uint32_t addr, uint32_t *a64)
|
||||
{
|
||||
mem_mapping_t *map;
|
||||
uint16_t ret = 0xffff;
|
||||
|
||||
GDBSTUB_MEM_ACCESS(addr, GDBSTUB_MEM_READ, 2);
|
||||
|
||||
@@ -391,14 +394,13 @@ readmemwl_no_mmut_2386(uint32_t addr, uint32_t *a64)
|
||||
map = read_mapping[addr >> MEM_GRANULARITY_BITS];
|
||||
|
||||
if (map && map->read_w)
|
||||
return map->read_w(addr, map->priv);
|
||||
|
||||
if (map && map->read_b) {
|
||||
return map->read_b(addr, map->priv) |
|
||||
((uint16_t) (map->read_b(addr + 1, map->priv)) << 8);
|
||||
ret = map->read_w(addr, map->priv);
|
||||
else if (map && map->read_b) {
|
||||
ret = map->read_b(addr, map->priv) |
|
||||
((uint16_t) (map->read_b(addr + 1, map->priv)) << 8);
|
||||
}
|
||||
|
||||
return 0xffff;
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
|
||||
@@ -10,14 +10,10 @@
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Melissa Goad, <mszoopers@protonmail.com>
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
* Jasmine Iwanek, <jriwanek@gmail.com>
|
||||
*
|
||||
* Copyright 2008-2020 Sarah Walker.
|
||||
* Copyright 2016-2020 Miran Grca.
|
||||
* Copyright 2020 Melody Goad.
|
||||
* Copyright 2022-2023 Jasmine Iwanek.
|
||||
*/
|
||||
#include <stdio.h>
|
||||
|
||||
49
src/nvr_at.c
49
src/nvr_at.c
@@ -194,11 +194,10 @@
|
||||
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Mahod,
|
||||
* Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
*
|
||||
* Copyright 2017-2020 Fred N. van Kempen.
|
||||
* Copyright 2016-2020 Miran Grca.
|
||||
* Copyright 2008-2020 Sarah Walker.
|
||||
* Copyright 2016-2020 Mahod.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
@@ -296,6 +295,7 @@
|
||||
#define FLAG_AMI_1995_HACK 0x08
|
||||
#define FLAG_P6RP4_HACK 0x10
|
||||
#define FLAG_PIIX4 0x20
|
||||
#define FLAG_MULTI_BANK 0x40
|
||||
|
||||
typedef struct local_t {
|
||||
int8_t stat;
|
||||
@@ -440,12 +440,14 @@ timer_update_irq(nvr_t *nvr)
|
||||
local_t *local = (local_t *) nvr->data;
|
||||
uint8_t irq = (nvr->regs[RTC_REGB] & nvr->regs[RTC_REGC]) & (REGB_UIE | REGB_AIE | REGB_PIE);
|
||||
|
||||
if (irq) {
|
||||
nvr->regs[RTC_REGC] |= REGC_IRQF;
|
||||
picintlevel(1 << nvr->irq, &local->irq_state);
|
||||
} else {
|
||||
nvr->regs[RTC_REGC] &= ~REGC_IRQF;
|
||||
picintclevel(1 << nvr->irq, &local->irq_state);
|
||||
if (irq || (local->irq_state != !!irq)) {
|
||||
if (irq) {
|
||||
nvr->regs[RTC_REGC] |= REGC_IRQF;
|
||||
picintlevel(1 << nvr->irq, &local->irq_state);
|
||||
} else {
|
||||
nvr->regs[RTC_REGC] &= ~REGC_IRQF;
|
||||
picintclevel(1 << nvr->irq, &local->irq_state);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@@ -558,6 +560,8 @@ timer_tick(nvr_t *nvr)
|
||||
static void
|
||||
nvr_reg_common_write(uint16_t reg, uint8_t val, nvr_t *nvr, local_t *local)
|
||||
{
|
||||
if (local->lock[reg])
|
||||
return;
|
||||
if ((reg == 0x2c) && (local->flags & FLAG_AMI_1994_HACK))
|
||||
nvr->is_new = 0;
|
||||
if ((reg == 0x2d) && (local->flags & FLAG_AMI_1992_HACK))
|
||||
@@ -568,8 +572,6 @@ nvr_reg_common_write(uint16_t reg, uint8_t val, nvr_t *nvr, local_t *local)
|
||||
return;
|
||||
if ((reg >= 0xb8) && (reg <= 0xbf) && local->wp[1])
|
||||
return;
|
||||
if (local->lock[reg])
|
||||
return;
|
||||
if (nvr->regs[reg] != val) {
|
||||
nvr->regs[reg] = val;
|
||||
nvr_dosave = 1;
|
||||
@@ -663,9 +665,12 @@ nvr_write(uint16_t addr, uint8_t val, void *priv)
|
||||
} else {
|
||||
local->addr[addr_id] = (val & (nvr->size - 1));
|
||||
/* Some chipsets use a 256 byte NVRAM but ports 70h and 71h always access only 128 bytes. */
|
||||
if (addr_id == 0x0)
|
||||
if (addr_id == 0x0) {
|
||||
local->addr[addr_id] &= 0x7f;
|
||||
else if ((addr_id == 0x1) && (local->flags & FLAG_PIIX4))
|
||||
/* Needed for OPTi 82C601/82C602 and NSC PC87306. */
|
||||
if (local->flags & FLAG_MULTI_BANK)
|
||||
local->addr[addr_id] |= (0x80 * local->bank[addr_id]);
|
||||
} else if ((addr_id == 0x1) && (local->flags & FLAG_PIIX4))
|
||||
local->addr[addr_id] = (local->addr[addr_id] & 0x7f) | 0x80;
|
||||
if (local->bank[addr_id] > 0)
|
||||
local->addr[addr_id] = (local->addr[addr_id] & 0x7f) | (0x80 * local->bank[addr_id]);
|
||||
@@ -1079,6 +1084,12 @@ nvr_at_init(const device_t *info)
|
||||
break;
|
||||
}
|
||||
|
||||
if (info->local & 0x20)
|
||||
local->def = 0x00;
|
||||
|
||||
if (info->local & 0x40)
|
||||
local->flags |= FLAG_MULTI_BANK;
|
||||
|
||||
local->read_addr = 1;
|
||||
|
||||
/* Set up any local handlers here. */
|
||||
@@ -1173,6 +1184,20 @@ const device_t at_nvr_device = {
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t at_mb_nvr_device = {
|
||||
.name = "PC/AT NVRAM",
|
||||
.internal_name = "at_nvr",
|
||||
.flags = DEVICE_ISA | DEVICE_AT,
|
||||
.local = 0x40 | 0x20 | 1,
|
||||
.init = nvr_at_init,
|
||||
.close = nvr_at_close,
|
||||
.reset = nvr_at_reset,
|
||||
{ .available = NULL },
|
||||
.speed_changed = nvr_at_speed_changed,
|
||||
.force_redraw = NULL,
|
||||
.config = NULL
|
||||
};
|
||||
|
||||
const device_t ps_nvr_device = {
|
||||
.name = "PS/1 or PS/2 NVRAM",
|
||||
.internal_name = "ps_nvr",
|
||||
|
||||
@@ -33,7 +33,7 @@ CocoaEventFilter::nativeEventFilter(const QByteArray &eventType, void *message,
|
||||
|| [event type] == NSEventTypeLeftMouseDragged
|
||||
|| [event type] == NSEventTypeRightMouseDragged
|
||||
|| [event type] == NSEventTypeOtherMouseDragged) {
|
||||
mouse_scale([event deltaX], [event deltaY]);
|
||||
mouse_scalef((double) [event deltaX], (double) [event deltaY]);
|
||||
return true;
|
||||
}
|
||||
if ([event type] == NSEventTypeScrollWheel) {
|
||||
|
||||
@@ -10,8 +10,7 @@
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
* Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
*
|
||||
* Copyright 2016-2018 Miran Grca.
|
||||
|
||||
@@ -321,16 +321,16 @@ HarddiskDialog::onCreateNewFile()
|
||||
|
||||
ui->progressBar->setEnabled(true);
|
||||
setResult(QDialog::Rejected);
|
||||
quint64 size = ui->lineEditSize->text().toULongLong() << 20U;
|
||||
uint32_t sector_size = 512;
|
||||
quint64 size = (static_cast<uint64_t>(cylinders_) * static_cast<uint64_t>(heads_) * static_cast<uint64_t>(sectors_) * static_cast<uint64_t>(sector_size));
|
||||
if (size > 0x1FFFFFFE00LL) {
|
||||
QMessageBox::critical(this, tr("Disk image too large"), tr("Disk images cannot be larger than 127 GB."));
|
||||
return;
|
||||
}
|
||||
|
||||
int img_format = ui->comboBoxFormat->currentIndex();
|
||||
uint32_t zero = 0;
|
||||
uint32_t base = 0x1000;
|
||||
uint32_t sector_size = 512;
|
||||
int img_format = ui->comboBoxFormat->currentIndex();
|
||||
uint32_t zero = 0;
|
||||
uint32_t base = 0x1000;
|
||||
|
||||
auto fileName = ui->fileField->fileName();
|
||||
QString expectedSuffix;
|
||||
|
||||
@@ -87,9 +87,9 @@ SettingsInput::onCurrentMachineChanged(int machineId)
|
||||
mouseModel->removeRows(0, removeRows);
|
||||
ui->comboBoxMouse->setCurrentIndex(selectedRow);
|
||||
|
||||
int i = 0;
|
||||
char *joyName = joystick_get_name(i);
|
||||
auto *joystickModel = ui->comboBoxJoystick->model();
|
||||
int i = 0;
|
||||
const char *joyName = joystick_get_name(i);
|
||||
auto *joystickModel = ui->comboBoxJoystick->model();
|
||||
removeRows = joystickModel->rowCount();
|
||||
selectedRow = 0;
|
||||
while (joyName) {
|
||||
@@ -116,7 +116,7 @@ void
|
||||
SettingsInput::on_comboBoxJoystick_currentIndexChanged(int index)
|
||||
{
|
||||
int joystickId = ui->comboBoxJoystick->currentData().toInt();
|
||||
for (int i = 0; i < 4; ++i) {
|
||||
for (int i = 0; i < MAX_JOYSTICKS; ++i) {
|
||||
auto *btn = findChild<QPushButton *>(QString("pushButtonJoystick%1").arg(i + 1));
|
||||
if (btn == nullptr) {
|
||||
continue;
|
||||
|
||||
@@ -10,13 +10,13 @@
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
* GH Cao, <driver1998.ms@outlook.com>
|
||||
* Jasmine Iwanek,
|
||||
*
|
||||
* Copyright 2008-2018 Sarah Walker.
|
||||
* Copyright 2016-2018 Miran Grca.
|
||||
* Copyright 2020 GH Cao.
|
||||
* Copyright 2021-2023 Jasmine Iwanek.
|
||||
*/
|
||||
#include <windows.h>
|
||||
#include <windowsx.h>
|
||||
@@ -98,8 +98,6 @@ joystick_add_button(raw_joystick_t *rawjoy, plat_joystick_t *joy, USAGE usage)
|
||||
void
|
||||
joystick_add_axis(raw_joystick_t *rawjoy, plat_joystick_t *joy, PHIDP_VALUE_CAPS prop)
|
||||
{
|
||||
LONG center;
|
||||
|
||||
if (joy->nr_axes >= 8)
|
||||
return;
|
||||
|
||||
@@ -139,14 +137,11 @@ joystick_add_axis(raw_joystick_t *rawjoy, plat_joystick_t *joy, PHIDP_VALUE_CAPS
|
||||
* Some joysticks will send -1 in LogicalMax, like Xbox Controllers
|
||||
* so we need to mask that to appropriate value (instead of 0xFFFFFFFF)
|
||||
*/
|
||||
rawjoy->axis[joy->nr_axes].max = prop->LogicalMax & ((1 << prop->BitSize) - 1);
|
||||
rawjoy->axis[joy->nr_axes].max = prop->LogicalMax & ((1ULL << prop->BitSize) - 1);
|
||||
}
|
||||
rawjoy->axis[joy->nr_axes].min = prop->LogicalMin;
|
||||
|
||||
center = (rawjoy->axis[joy->nr_axes].max - rawjoy->axis[joy->nr_axes].min + 1) / 2;
|
||||
|
||||
if (center != 0x00)
|
||||
joy->nr_axes++;
|
||||
joy->nr_axes++;
|
||||
}
|
||||
|
||||
void
|
||||
@@ -450,7 +445,7 @@ joystick_process(void)
|
||||
{
|
||||
int d;
|
||||
|
||||
if (joystick_type == 7)
|
||||
if (joystick_type == JS_TYPE_NONE)
|
||||
return;
|
||||
|
||||
for (int c = 0; c < joystick_get_max_joysticks(joystick_type); c++) {
|
||||
|
||||
@@ -18,11 +18,9 @@
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* Eluan Costa Miranda <eluancm@gmail.com>
|
||||
* Authors: Eluan Costa Miranda <eluancm@gmail.com>
|
||||
* Lubomir Rintel <lkundrak@v3.sk>
|
||||
*
|
||||
* Copyright 2020 Sarah Walker.
|
||||
* Copyright 2020 Eluan Costa Miranda.
|
||||
* Copyright 2021 Lubomir Rintel.
|
||||
*/
|
||||
|
||||
@@ -11,10 +11,8 @@
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
*
|
||||
* Copyright 2008-2020 Sarah Walker.
|
||||
* Copyright 2016-2020 Miran Grca.
|
||||
*/
|
||||
#include <stdio.h>
|
||||
|
||||
@@ -297,6 +297,16 @@ pc87306_write(uint16_t port, uint8_t val, void *priv)
|
||||
lpt1_handler(dev);
|
||||
}
|
||||
break;
|
||||
case 4:
|
||||
if (valxor & 0x80)
|
||||
nvr_lock_set(0x00, 256, !!(val & 0x80), dev->nvr);
|
||||
break;
|
||||
case 5:
|
||||
if (valxor & 0x08)
|
||||
nvr_at_handler(!!(val & 0x08), 0x0070, dev->nvr);
|
||||
if (valxor & 0x20)
|
||||
nvr_bank_set(0, !!(val & 0x20), dev->nvr);
|
||||
break;
|
||||
case 9:
|
||||
if (valxor & 0x44) {
|
||||
fdc_update_enh_mode(dev->fdc, (val & 4) ? 1 : 0);
|
||||
@@ -308,6 +318,8 @@ pc87306_write(uint16_t port, uint8_t val, void *priv)
|
||||
pc87306_gpio_init(dev);
|
||||
break;
|
||||
case 0x12:
|
||||
if (valxor & 0x01)
|
||||
nvr_wp_set(!!(val & 0x01), 0, dev->nvr);
|
||||
if (valxor & 0x30)
|
||||
pc87306_gpio_init(dev);
|
||||
break;
|
||||
@@ -368,8 +380,10 @@ pc87306_read(uint16_t port, void *priv)
|
||||
}
|
||||
|
||||
void
|
||||
pc87306_reset(pc87306_t *dev)
|
||||
pc87306_reset(void *priv)
|
||||
{
|
||||
pc87306_t *dev = (pc87306_t *) priv;
|
||||
|
||||
memset(dev->regs, 0, 29);
|
||||
|
||||
dev->regs[0x00] = 0x0B;
|
||||
@@ -398,6 +412,10 @@ pc87306_reset(pc87306_t *dev)
|
||||
serial_handler(dev, 1);
|
||||
fdc_reset(dev->fdc);
|
||||
pc87306_gpio_init(dev);
|
||||
nvr_lock_set(0x00, 256, 0, dev->nvr);
|
||||
nvr_at_handler(1, 0x0070, dev->nvr);
|
||||
nvr_bank_set(0, 0, dev->nvr);
|
||||
nvr_wp_set(0, 0, dev->nvr);
|
||||
}
|
||||
|
||||
static void
|
||||
@@ -419,7 +437,7 @@ pc87306_init(UNUSED(const device_t *info))
|
||||
dev->uart[0] = device_add_inst(&ns16550_device, 1);
|
||||
dev->uart[1] = device_add_inst(&ns16550_device, 2);
|
||||
|
||||
// dev->nvr = device_add(&piix4_nvr_device);
|
||||
dev->nvr = device_add(&at_mb_nvr_device);
|
||||
|
||||
pc87306_reset(dev);
|
||||
|
||||
@@ -436,7 +454,7 @@ const device_t pc87306_device = {
|
||||
.local = 0,
|
||||
.init = pc87306_init,
|
||||
.close = pc87306_close,
|
||||
.reset = NULL,
|
||||
.reset = pc87306_reset,
|
||||
{ .available = NULL },
|
||||
.speed_changed = NULL,
|
||||
.force_redraw = NULL,
|
||||
|
||||
@@ -10,12 +10,10 @@
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
* Bit,
|
||||
* DOSBox Team,
|
||||
*
|
||||
* Copyright 2008-2020 Sarah Walker.
|
||||
* Copyright 2016-2020 Miran Grca.
|
||||
* Copyright 2016-2020 Bit.
|
||||
* Copyright 2008-2020 DOSBox Team.
|
||||
|
||||
@@ -22,5 +22,5 @@ add_library(mt32emu STATIC Analog.cpp BReverbModel.cpp Display.cpp File.cpp File
|
||||
srchelper/srctools/src/LinearResampler.cpp
|
||||
srchelper/srctools/src/ResamplerModel.cpp
|
||||
srchelper/srctools/src/SincResampler.cpp
|
||||
srchelper/InternalResampler.cpp Synth.cpp Tables.cpp TVA.cpp TVF.cpp
|
||||
srchelper/InternalResampler.cpp Synth.cpp Tables.cpp TVA.cpp TVF.cpp
|
||||
TVP.cpp sha1/sha1.cpp c_interface/c_interface.cpp)
|
||||
@@ -692,7 +692,7 @@ adgold_timer_poll(void *priv)
|
||||
{
|
||||
adgold_t *adgold = (adgold_t *) priv;
|
||||
|
||||
/*A small timer period will result in hangs.*/
|
||||
/*A small timer period will result in hangs.*/
|
||||
timer_on_auto(&adgold->adgold_mma_timer_count, 4.88964);
|
||||
|
||||
if (adgold->adgold_midi_ctrl & 0x3f) {
|
||||
|
||||
@@ -10,14 +10,13 @@
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* DOSBox Team,
|
||||
* Authors: DOSBox Team,
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* TheCollector1995, <mariogplayer@gmail.com>
|
||||
*
|
||||
* Copyright 2008-2020 Sarah Walker.
|
||||
* Copyright 2008-2020 DOSBox Team.
|
||||
* Copyright 2016-2020 Miran Grca.
|
||||
* Copyright 2016-2020 TheCollector1995.
|
||||
*/
|
||||
#include <stdarg.h>
|
||||
#include <stdint.h>
|
||||
|
||||
@@ -122,8 +122,11 @@ timer_process(void)
|
||||
|
||||
if (timer->flags & TIMER_SPLIT)
|
||||
timer_advance_ex(timer, 0); /* We're splitting a > 1 s period into multiple <= 1 s periods. */
|
||||
else if (timer->callback != NULL) /* Make sure it's no NULL, so that we can have a NULL callback when no operation is needed. */
|
||||
else if (timer->callback != NULL) {/* Make sure it's no NULL, so that we can have a NULL callback when no operation is needed. */
|
||||
timer->flags |= TIMER_PROCESS;
|
||||
timer->callback(timer->priv);
|
||||
timer->flags &= ~TIMER_PROCESS;
|
||||
}
|
||||
}
|
||||
|
||||
timer_target = timer_head->ts.ts32.integer;
|
||||
@@ -232,7 +235,7 @@ timer_on_auto(pc_timer_t *timer, double period)
|
||||
return;
|
||||
|
||||
if (period > 0.0)
|
||||
timer_on(timer, period, (timer->period == 0.0));
|
||||
timer_on(timer, period, !(timer->flags & TIMER_PROCESS) && (timer->period <= 0.0));
|
||||
else
|
||||
timer_stop(timer);
|
||||
}
|
||||
|
||||
@@ -10,8 +10,7 @@
|
||||
*
|
||||
*
|
||||
*
|
||||
* Authors: Sarah Walker, <https://pcem-emulator.co.uk/>
|
||||
* Miran Grca, <mgrca8@gmail.com>
|
||||
* Authors: Miran Grca, <mgrca8@gmail.com>
|
||||
* Fred N. van Kempen, <decwiz@yahoo.com>
|
||||
*
|
||||
* Copyright 2016-2018 Miran Grca.
|
||||
|
||||
@@ -94,6 +94,7 @@ plat_serpt_write_vcon(serial_passthrough_t *dev, uint8_t data)
|
||||
fd_set wrfds;
|
||||
int res;
|
||||
#endif
|
||||
size_t res;
|
||||
|
||||
/* We cannot use select here, this would block the hypervisor! */
|
||||
#if 0
|
||||
@@ -109,12 +110,11 @@ plat_serpt_write_vcon(serial_passthrough_t *dev, uint8_t data)
|
||||
|
||||
/* just write it out */
|
||||
if (dev->mode == SERPT_MODE_HOSTSER) {
|
||||
int res = 0;
|
||||
do {
|
||||
res = write(dev->master_fd, &data, 1);
|
||||
} while (res == 0 || (res == -1 && (errno == EAGAIN || res == EWOULDBLOCK)));
|
||||
} else
|
||||
write(dev->master_fd, &data, 1);
|
||||
res = write(dev->master_fd, &data, 1);
|
||||
}
|
||||
|
||||
void
|
||||
|
||||
@@ -193,7 +193,7 @@ int ibm8514_has_vga = 0;
|
||||
int
|
||||
ibm8514_cpu_src(svga_t *svga)
|
||||
{
|
||||
ibm8514_t *dev = &svga->dev8514;
|
||||
const ibm8514_t *dev = &svga->dev8514;
|
||||
|
||||
if (!(dev->accel.cmd & 0x100))
|
||||
return 0;
|
||||
@@ -207,7 +207,7 @@ ibm8514_cpu_src(svga_t *svga)
|
||||
int
|
||||
ibm8514_cpu_dest(svga_t *svga)
|
||||
{
|
||||
ibm8514_t *dev = &svga->dev8514;
|
||||
const ibm8514_t *dev = &svga->dev8514;
|
||||
|
||||
if (!(dev->accel.cmd & 0x100))
|
||||
return 0;
|
||||
@@ -962,8 +962,8 @@ ibm8514_accel_out(uint16_t port, uint32_t val, svga_t *svga, int len)
|
||||
if (!val)
|
||||
break;
|
||||
dev->accel.advfunc_cntl = val & 0x0f;
|
||||
ibm8514_on = val & 0x01;
|
||||
vga_on = !ibm8514_on;
|
||||
dev->on = val & 0x01;
|
||||
vga_on = !dev->on;
|
||||
ibm8514_log("IBM 8514/A: VGA ON = %i, val = %02x\n", vga_on, val);
|
||||
svga_recalctimings(svga);
|
||||
break;
|
||||
@@ -978,6 +978,7 @@ static void
|
||||
ibm8514_accel_outb(uint16_t port, uint8_t val, void *priv)
|
||||
{
|
||||
svga_t *svga = (svga_t *) priv;
|
||||
|
||||
ibm8514_accel_out(port, val, svga, 1);
|
||||
}
|
||||
|
||||
@@ -985,6 +986,7 @@ static void
|
||||
ibm8514_accel_outw(uint16_t port, uint16_t val, void *priv)
|
||||
{
|
||||
svga_t *svga = (svga_t *) priv;
|
||||
|
||||
ibm8514_accel_out(port, val, svga, 2);
|
||||
}
|
||||
|
||||
@@ -3742,7 +3744,6 @@ void
|
||||
ibm8514_render_8bpp(svga_t *svga)
|
||||
{
|
||||
ibm8514_t *dev = &svga->dev8514;
|
||||
int x;
|
||||
uint32_t *p;
|
||||
uint32_t dat;
|
||||
|
||||
@@ -3757,7 +3758,7 @@ ibm8514_render_8bpp(svga_t *svga)
|
||||
dev->firstline_draw = dev->displine;
|
||||
dev->lastline_draw = dev->displine;
|
||||
|
||||
for (x = 0; x <= dev->h_disp; x += 8) {
|
||||
for (int x = 0; x <= dev->h_disp; x += 8) {
|
||||
dat = *(uint32_t *) (&dev->vram[dev->ma & dev->vram_mask]);
|
||||
p[0] = dev->pallook[dat & 0xff];
|
||||
p[1] = dev->pallook[(dat >> 8) & 0xff];
|
||||
@@ -3781,7 +3782,7 @@ void
|
||||
ibm8514_render_15bpp(svga_t *svga)
|
||||
{
|
||||
ibm8514_t *dev = &svga->dev8514;
|
||||
int x;
|
||||
int x;
|
||||
uint32_t *p;
|
||||
uint32_t dat;
|
||||
|
||||
@@ -3822,7 +3823,7 @@ void
|
||||
ibm8514_render_16bpp(svga_t *svga)
|
||||
{
|
||||
ibm8514_t *dev = &svga->dev8514;
|
||||
int x;
|
||||
int x;
|
||||
uint32_t *p;
|
||||
uint32_t dat;
|
||||
|
||||
@@ -3863,7 +3864,6 @@ void
|
||||
ibm8514_render_24bpp(svga_t *svga)
|
||||
{
|
||||
ibm8514_t *dev = &svga->dev8514;
|
||||
int x;
|
||||
uint32_t *p;
|
||||
uint32_t dat;
|
||||
|
||||
@@ -3877,7 +3877,7 @@ ibm8514_render_24bpp(svga_t *svga)
|
||||
dev->firstline_draw = dev->displine;
|
||||
dev->lastline_draw = dev->displine;
|
||||
|
||||
for (x = 0; x <= dev->h_disp; x += 4) {
|
||||
for (int x = 0; x <= dev->h_disp; x += 4) {
|
||||
dat = *(uint32_t *) (&dev->vram[dev->ma & dev->vram_mask]);
|
||||
p[x] = dat & 0xffffff;
|
||||
|
||||
@@ -3900,9 +3900,8 @@ void
|
||||
ibm8514_render_BGR(svga_t *svga)
|
||||
{
|
||||
ibm8514_t *dev = &svga->dev8514;
|
||||
int x;
|
||||
uint32_t *p;
|
||||
uint32_t dat;
|
||||
uint32_t *p;
|
||||
uint32_t dat;
|
||||
|
||||
if ((dev->displine + svga->y_add) < 0)
|
||||
return;
|
||||
@@ -3914,7 +3913,7 @@ ibm8514_render_BGR(svga_t *svga)
|
||||
dev->firstline_draw = dev->displine;
|
||||
dev->lastline_draw = dev->displine;
|
||||
|
||||
for (x = 0; x <= dev->h_disp; x += 4) {
|
||||
for (int x = 0; x <= dev->h_disp; x += 4) {
|
||||
dat = *(uint32_t *) (&dev->vram[dev->ma & dev->vram_mask]);
|
||||
p[x] = ((dat & 0xff0000) >> 16) | (dat & 0x00ff00) | ((dat & 0x0000ff) << 16);
|
||||
|
||||
@@ -3937,9 +3936,9 @@ void
|
||||
ibm8514_render_ABGR8888(svga_t *svga)
|
||||
{
|
||||
ibm8514_t *dev = &svga->dev8514;
|
||||
int x;
|
||||
uint32_t *p;
|
||||
uint32_t dat;
|
||||
int x;
|
||||
uint32_t *p;
|
||||
uint32_t dat;
|
||||
|
||||
if ((dev->displine + svga->y_add) < 0)
|
||||
return;
|
||||
@@ -3964,9 +3963,9 @@ void
|
||||
ibm8514_render_RGBA8888(svga_t *svga)
|
||||
{
|
||||
ibm8514_t *dev = &svga->dev8514;
|
||||
int x;
|
||||
uint32_t *p;
|
||||
uint32_t dat;
|
||||
int x;
|
||||
uint32_t *p;
|
||||
uint32_t dat;
|
||||
|
||||
if ((dev->displine + svga->y_add) < 0)
|
||||
return;
|
||||
@@ -4029,7 +4028,7 @@ ibm8514_poll(ibm8514_t *dev, svga_t *svga)
|
||||
dev->hwcursor_oddeven = 0;
|
||||
}
|
||||
|
||||
if ((dev->displine == (svga->hwcursor_latch.y + 1)) && dev->hwcursor_latch.ena && dev->interlace) {
|
||||
if ((dev->displine == (dev->hwcursor_latch.y + 1)) && dev->hwcursor_latch.ena && dev->interlace) {
|
||||
dev->hwcursor_on = dev->hwcursor_latch.cur_ysize - (dev->hwcursor_latch.yoff + 1);
|
||||
dev->hwcursor_oddeven = 1;
|
||||
}
|
||||
@@ -4045,13 +4044,13 @@ ibm8514_poll(ibm8514_t *dev, svga_t *svga)
|
||||
|
||||
if (dev->firstline == 2000) {
|
||||
dev->firstline = dev->displine;
|
||||
video_wait_for_buffer();
|
||||
video_wait_for_buffer_monitor(svga->monitor_index);
|
||||
}
|
||||
|
||||
if (dev->hwcursor_on)
|
||||
dev->changedvram[dev->ma >> 12] = dev->changedvram[(dev->ma >> 12) + 1] = dev->interlace ? 3 : 2;
|
||||
|
||||
svga->render(svga);
|
||||
svga->render8514(svga);
|
||||
|
||||
svga->x_add = (overscan_x >> 1);
|
||||
ibm8514_render_overscan_left(dev, svga);
|
||||
@@ -4137,7 +4136,7 @@ ibm8514_poll(ibm8514_t *dev, svga_t *svga)
|
||||
|
||||
dev->oddeven ^= 1;
|
||||
|
||||
changeframecount = dev->interlace ? 3 : 2;
|
||||
svga->monitor->mon_changeframecount = dev->interlace ? 3 : 2;
|
||||
svga->vslines = 0;
|
||||
|
||||
if (dev->interlace && dev->oddeven)
|
||||
@@ -4167,7 +4166,7 @@ ibm8514_recalctimings(svga_t *svga)
|
||||
{
|
||||
ibm8514_t *dev = &svga->dev8514;
|
||||
|
||||
if (ibm8514_on) {
|
||||
if (dev->on) {
|
||||
dev->h_disp = (dev->hdisp + 1) << 3;
|
||||
dev->pitch = (dev->accel.advfunc_cntl & 4) ? 1024 : 640;
|
||||
dev->h_total = (dev->htotal + 1);
|
||||
@@ -4224,7 +4223,7 @@ ibm8514_recalctimings(svga_t *svga)
|
||||
|
||||
svga->clock = (cpuclock * (double) (1ULL << 32)) / 25175000.0;
|
||||
}
|
||||
svga->render = ibm8514_render_8bpp;
|
||||
svga->render8514 = ibm8514_render_8bpp;
|
||||
ibm8514_log("BPP=%d, Pitch = %d, rowoffset = %d, crtc13 = %02x, mode = %d, highres bit = %02x, has_vga? = %d.\n", dev->bpp, dev->pitch, dev->rowoffset, svga->crtc[0x13], dev->ibm_mode, dev->accel.advfunc_cntl & 4, ibm8514_has_vga);
|
||||
}
|
||||
ibm8514_log("8514 enabled, hdisp=%d, vtotal=%d, htotal=%d, dispend=%d, rowoffset=%d, split=%d, vsyncstart=%d, split=%08x\n", dev->hdisp, dev->vtotal, dev->htotal, dev->dispend, dev->rowoffset, dev->split, dev->vsyncstart, dev->split);
|
||||
|
||||
@@ -65,22 +65,23 @@ typedef struct ati68860_ramdac_t {
|
||||
} ati68860_ramdac_t;
|
||||
|
||||
void
|
||||
ati68860_ramdac_out(uint16_t addr, uint8_t val, void *p, svga_t *svga)
|
||||
ati68860_ramdac_out(uint16_t addr, uint8_t val, void *priv, svga_t *svga)
|
||||
{
|
||||
ati68860_ramdac_t *ramdac = (ati68860_ramdac_t *) p;
|
||||
ati68860_ramdac_t *ramdac = (ati68860_ramdac_t *) priv;
|
||||
const ibm8514_t *dev = &svga->dev8514;
|
||||
|
||||
switch (addr) {
|
||||
case 0:
|
||||
svga_out(ibm8514_on ? 0x2ec : 0x3c8, val, svga);
|
||||
svga_out(dev->on ? 0x2ec : 0x3c8, val, svga);
|
||||
break;
|
||||
case 1:
|
||||
svga_out(ibm8514_on ? 0x2ed : 0x3c9, val, svga);
|
||||
svga_out(dev->on ? 0x2ed : 0x3c9, val, svga);
|
||||
break;
|
||||
case 2:
|
||||
svga_out(ibm8514_on ? 0x2ea : 0x3c6, val, svga);
|
||||
svga_out(dev->on ? 0x2ea : 0x3c6, val, svga);
|
||||
break;
|
||||
case 3:
|
||||
svga_out(ibm8514_on ? 0x2eb : 0x3c7, val, svga);
|
||||
svga_out(dev->on ? 0x2eb : 0x3c7, val, svga);
|
||||
break;
|
||||
default:
|
||||
ramdac->regs[addr & 0xf] = val;
|
||||
@@ -168,23 +169,24 @@ ati68860_ramdac_out(uint16_t addr, uint8_t val, void *p, svga_t *svga)
|
||||
}
|
||||
|
||||
uint8_t
|
||||
ati68860_ramdac_in(uint16_t addr, void *p, svga_t *svga)
|
||||
ati68860_ramdac_in(uint16_t addr, void *priv, svga_t *svga)
|
||||
{
|
||||
ati68860_ramdac_t *ramdac = (ati68860_ramdac_t *) p;
|
||||
uint8_t temp = 0;
|
||||
const ati68860_ramdac_t *ramdac = (ati68860_ramdac_t *) priv;
|
||||
const ibm8514_t *dev = &svga->dev8514;
|
||||
uint8_t temp = 0;
|
||||
|
||||
switch (addr) {
|
||||
case 0:
|
||||
temp = svga_in(ibm8514_on ? 0x2ec : 0x3c8, svga);
|
||||
temp = svga_in(dev->on ? 0x2ec : 0x3c8, svga);
|
||||
break;
|
||||
case 1:
|
||||
temp = svga_in(ibm8514_on ? 0x2ed : 0x3c9, svga);
|
||||
temp = svga_in(dev->on ? 0x2ed : 0x3c9, svga);
|
||||
break;
|
||||
case 2:
|
||||
temp = svga_in(ibm8514_on ? 0x2ea : 0x3c6, svga);
|
||||
temp = svga_in(dev->on ? 0x2ea : 0x3c6, svga);
|
||||
break;
|
||||
case 3:
|
||||
temp = svga_in(ibm8514_on ? 0x2eb : 0x3c7, svga);
|
||||
temp = svga_in(dev->on ? 0x2eb : 0x3c7, svga);
|
||||
break;
|
||||
case 4:
|
||||
case 8:
|
||||
@@ -207,9 +209,9 @@ ati68860_ramdac_in(uint16_t addr, void *p, svga_t *svga)
|
||||
}
|
||||
|
||||
void
|
||||
ati68860_set_ramdac_type(void *p, int type)
|
||||
ati68860_set_ramdac_type(void *priv, int type)
|
||||
{
|
||||
ati68860_ramdac_t *ramdac = (ati68860_ramdac_t *) p;
|
||||
ati68860_ramdac_t *ramdac = (ati68860_ramdac_t *) priv;
|
||||
|
||||
if (ramdac->ramdac_type != type) {
|
||||
ramdac->ramdac_type = type;
|
||||
@@ -237,17 +239,17 @@ ati68860_ramdac_init(UNUSED(const device_t *info))
|
||||
}
|
||||
|
||||
void
|
||||
ati68860_ramdac_set_render(void *p, svga_t *svga)
|
||||
ati68860_ramdac_set_render(void *priv, svga_t *svga)
|
||||
{
|
||||
ati68860_ramdac_t *ramdac = (ati68860_ramdac_t *) p;
|
||||
ati68860_ramdac_t *ramdac = (ati68860_ramdac_t *) priv;
|
||||
|
||||
svga->render = ramdac->render;
|
||||
}
|
||||
|
||||
void
|
||||
ati68860_ramdac_set_pallook(void *p, int i, uint32_t col)
|
||||
ati68860_ramdac_set_pallook(void *priv, int i, uint32_t col)
|
||||
{
|
||||
ati68860_ramdac_t *ramdac = (ati68860_ramdac_t *) p;
|
||||
ati68860_ramdac_t *ramdac = (ati68860_ramdac_t *) priv;
|
||||
|
||||
ramdac->pallook[i] = col;
|
||||
}
|
||||
@@ -255,11 +257,11 @@ ati68860_ramdac_set_pallook(void *p, int i, uint32_t col)
|
||||
void
|
||||
ati68860_hwcursor_draw(svga_t *svga, int displine)
|
||||
{
|
||||
ati68860_ramdac_t *ramdac = (ati68860_ramdac_t *) svga->ramdac;
|
||||
int offset;
|
||||
uint8_t dat;
|
||||
uint32_t col0 = ramdac->pallook[0];
|
||||
uint32_t col1 = ramdac->pallook[1];
|
||||
const ati68860_ramdac_t *ramdac = (ati68860_ramdac_t *) svga->ramdac;
|
||||
int offset;
|
||||
uint8_t dat;
|
||||
uint32_t col0 = ramdac->pallook[0];
|
||||
uint32_t col1 = ramdac->pallook[1];
|
||||
|
||||
offset = svga->dac_hwcursor_latch.xoff;
|
||||
for (uint32_t x = 0; x < 64 - svga->dac_hwcursor_latch.xoff; x += 4) {
|
||||
|
||||
@@ -26,6 +26,7 @@
|
||||
#include <86box/video.h>
|
||||
#include <86box/vid_svga.h>
|
||||
#include <86box/vid_svga_render.h>
|
||||
#include <86box/plat_unused.h>
|
||||
|
||||
typedef struct ati68875_ramdac_t {
|
||||
uint8_t gen_cntl;
|
||||
@@ -36,24 +37,10 @@ typedef struct ati68875_ramdac_t {
|
||||
uint8_t test_reg;
|
||||
} ati68875_ramdac_t;
|
||||
|
||||
static void
|
||||
ati68875_set_bpp(ati68875_ramdac_t *ramdac, svga_t *svga)
|
||||
{
|
||||
if (ramdac->mux_cntl == 0xff)
|
||||
return;
|
||||
|
||||
if (ramdac->mux_cntl & 0x20)
|
||||
svga->bpp = 8;
|
||||
else {
|
||||
svga->bpp = 24;
|
||||
}
|
||||
svga_recalctimings(svga);
|
||||
}
|
||||
|
||||
void
|
||||
ati68875_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_t *svga)
|
||||
ati68875_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *priv, svga_t *svga)
|
||||
{
|
||||
ati68875_ramdac_t *ramdac = (ati68875_ramdac_t *) p;
|
||||
ati68875_ramdac_t *ramdac = (ati68875_ramdac_t *) priv;
|
||||
uint8_t rs = (addr & 0x03);
|
||||
|
||||
rs |= (!!rs2 << 2);
|
||||
@@ -77,7 +64,6 @@ ati68875_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_
|
||||
break;
|
||||
case 0x0b: /* MUX Control Register (RS value = 1011) */
|
||||
ramdac->mux_cntl = val;
|
||||
ati68875_set_bpp(ramdac, svga);
|
||||
break;
|
||||
case 0x0c: /* Palette Page Register (RS value = 1100) */
|
||||
ramdac->palette_page_sel = val;
|
||||
@@ -87,8 +73,9 @@ ati68875_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_
|
||||
break;
|
||||
case 0x0f: /* Reset State (RS value = 1111) */
|
||||
ramdac->mux_cntl = 0x2d;
|
||||
svga->bpp = 8;
|
||||
svga_recalctimings(svga);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -96,12 +83,11 @@ ati68875_ramdac_out(uint16_t addr, int rs2, int rs3, uint8_t val, void *p, svga_
|
||||
}
|
||||
|
||||
uint8_t
|
||||
ati68875_ramdac_in(uint16_t addr, int rs2, int rs3, void *p, svga_t *svga)
|
||||
ati68875_ramdac_in(uint16_t addr, int rs2, int rs3, void *priv, svga_t *svga)
|
||||
{
|
||||
ati68875_ramdac_t *ramdac = (ati68875_ramdac_t *) p;
|
||||
ibm8514_t *dev = &svga->dev8514;
|
||||
uint8_t rs = (addr & 0x03);
|
||||
uint8_t temp = 0;
|
||||
const ati68875_ramdac_t *ramdac = (ati68875_ramdac_t *) priv;
|
||||
uint8_t rs = (addr & 0x03);
|
||||
uint8_t temp = 0;
|
||||
|
||||
rs |= (!!rs2 << 2);
|
||||
rs |= (!!rs3 << 3);
|
||||
@@ -130,62 +116,24 @@ ati68875_ramdac_in(uint16_t addr, int rs2, int rs3, void *p, svga_t *svga)
|
||||
break;
|
||||
case 0x0e: /* Test Register (RS value = 1110) */
|
||||
switch (ramdac->test_reg & 0x07) {
|
||||
case 0x00:
|
||||
temp = ibm8514_on ? dev->dac_r : svga->dac_r;
|
||||
break;
|
||||
case 0x01:
|
||||
temp = ibm8514_on ? dev->dac_g : svga->dac_g;
|
||||
break;
|
||||
case 0x02:
|
||||
temp = ibm8514_on ? dev->dac_b : svga->dac_b;
|
||||
break;
|
||||
case 0x03:
|
||||
temp = 0x75;
|
||||
break;
|
||||
case 0x04:
|
||||
if (ibm8514_on) {
|
||||
dev->dac_r++;
|
||||
temp = dev->dac_r;
|
||||
} else {
|
||||
svga->dac_r++;
|
||||
temp = svga->dac_r;
|
||||
}
|
||||
break;
|
||||
case 0x05:
|
||||
if (ibm8514_on) {
|
||||
dev->dac_g++;
|
||||
temp = dev->dac_g;
|
||||
} else {
|
||||
svga->dac_g++;
|
||||
temp = svga->dac_g;
|
||||
}
|
||||
break;
|
||||
case 0x06:
|
||||
if (ibm8514_on) {
|
||||
dev->dac_b++;
|
||||
temp = dev->dac_b;
|
||||
} else {
|
||||
svga->dac_b++;
|
||||
temp = svga->dac_b;
|
||||
}
|
||||
break;
|
||||
case 0x07:
|
||||
if (ramdac->test_reg & 0x80)
|
||||
temp = ibm8514_on ? dev->dac_r : svga->dac_r;
|
||||
else if (ramdac->test_reg & 0x40)
|
||||
temp = ibm8514_on ? dev->dac_g : svga->dac_g;
|
||||
else if (ramdac->test_reg & 0x20)
|
||||
temp = ibm8514_on ? dev->dac_b : svga->dac_b;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return temp;
|
||||
}
|
||||
|
||||
static void *
|
||||
ati68875_ramdac_init(const device_t *info)
|
||||
ati68875_ramdac_init(UNUSED(const device_t *info))
|
||||
{
|
||||
ati68875_ramdac_t *ramdac = (ati68875_ramdac_t *) malloc(sizeof(ati68875_ramdac_t));
|
||||
memset(ramdac, 0, sizeof(ati68875_ramdac_t));
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user