mirror/86Box
1
0
Fork 0
mirror of https://github.com/86Box/86Box.git synced 2026-02-23 01:48:21 -07:00
Code Issues Packages Projects Releases Activity

Cleanups to make all logging functions use stdlog instead of stdout.

Browse Source 
The new --logfile (-L) commandline option sets a file to log to.
The new --debug (-D) forces output to stderr if no logfile is given.
This commit is contained in:
waltje
2017-11-24 02:23:00 -05:00
parent d287293a75
commit ce1bab2967
20 changed files with 1547 additions and 1571 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
src/cdrom/cdrom.c
View File

@@ -9,7 +9,7 @@
* Implementation of the CD-ROM drive with SCSI(-like)
* commands, for both ATAPI and SCSI usage.
*
* Version: @(#)cdrom.c 1.0.22 2017/11/04
* Version: @(#)cdrom.c 1.0.23 2017/11/24
*
* Author: Miran Grca, <mgrca8@gmail.com>
*
@@ -721,20 +721,23 @@ uint8_t cdrom_mode_sense_pages_saved[CDROM_NUM][0x40][0x40] =
int cdrom_do_log = ENABLE_CDROM_LOG;
#endif
void cdrom_log(const char *format, ...)
static void
cdrom_log(const char *format, ...)
{
#ifdef ENABLE_CDROM_LOG
if (cdrom_do_log)
{
va_list ap;
va_start(ap, format);
vprintf(format, ap);
vfprintf(stdlog, format, ap);
va_end(ap);
fflush(stdout);
fflush(stdlog);
}
#endif
}
int cdrom_mode_select_terminate(uint8_t id, int force);
int find_cdrom_for_channel(uint8_t channel)

2
src/cpu/808x.c
View File

@@ -18,7 +18,7 @@
* 2 clocks - fetch opcode 1 2 clocks - execute
* 2 clocks - fetch opcode 2 etc
*
* Version: @(#)808x.c 1.0.8 2017/11/18
* Version: @(#)808x.c 1.0.9 2017/11/24
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>

8
src/cpu/x86seg.c
View File

@@ -8,7 +8,7 @@
*
* x86 CPU segment emulation.
*
* Version: @(#)x86seg.c 1.0.5 2017/11/04
* Version: @(#)x86seg.c 1.0.6 2017/11/24
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -61,12 +61,12 @@ void x86abort(const char *format, ...)
{
va_list ap;
va_start(ap, format);
vprintf(format, ap);
vfprintf(stdlog, format, ap);
va_end(ap);
fflush(stdout);
fflush(stdlog);
nvr_save();
dumpregs(1);
fflush(stdout);
fflush(stdlog);
exit(-1);
}

15
src/disk/hdc_ide.c
View File

@@ -9,7 +9,7 @@
* Implementation of the IDE emulation for hard disks and ATAPI
* CD-ROM devices.
*
* Version: @(#)hdc_ide.c 1.0.19 2017/11/04
* Version: @(#)hdc_ide.c 1.0.20 2017/11/24
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -109,22 +109,25 @@ int cur_ide[5];
int ide_do_log = ENABLE_IDE_LOG;
#endif
static void ide_log(const char *format, ...)
{
#ifdef ENABLE_IDE_LOG
if (ide_do_log)
{
va_list ap;
va_start(ap, format);
vprintf(format, ap);
va_end(ap);
fflush(stdout);
va_list ap;
va_start(ap, format);
vfprintf(stdlog, format, ap);
va_end(ap);
fflush(stdlog);
}
#endif
}
uint8_t getstat(IDE *ide) { return ide->atastat; }
int ide_drive_is_cdrom(IDE *ide)
{
if (ide->channel >= 8)

10
src/disk/hdd_image.c
View File

@@ -8,7 +8,7 @@
*
* Handling of hard disk image files.
*
* Version: @(#)hdd_image.c 1.0.7 2017/11/01
* Version: @(#)hdd_image.c 1.0.8 2017/11/24
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -53,16 +53,18 @@ static char *empty_sector_1mb;
int hdd_image_do_log = ENABLE_HDD_LOG;
#endif
void hdd_image_log(const char *format, ...)
static void
hdd_image_log(const char *format, ...)
{
#ifdef ENABLE_HDD_LOG
if (hdd_image_do_log)
{
va_list ap;
va_start(ap, format);
vprintf(format, ap);
vfprintf(stdlog, format, ap);
va_end(ap);
fflush(stdout);
fflush(stdlog);
}
#endif
}

117
src/floppy/fdc.c
View File

@@ -9,7 +9,7 @@
* Implementation of the NEC uPD-765 and compatible floppy disk
* controller.
*
* Version: @(#)fdc.c 1.0.8 2017/11/05
* Version: @(#)fdc.c 1.0.9 2017/11/24
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -171,21 +171,24 @@ int floppyint;
int fdc_do_log = ENABLE_FDC_LOG;
#endif
void fdc_log(const char *format, ...)
static void
fdc_log(const char *format, ...)
{
#ifdef ENABLE_FDC_LOG
if (fdc_do_log)
{
va_list ap;
va_start(ap, format);
vprintf(format, ap);
va_end(ap);
fflush(stdout);
va_list ap;
va_start(ap, format);
vfprintf(stdlog, format, ap);
va_end(ap);
fflush(stdlog);
}
#endif
}
void fdc_reset()
void fdc_reset(void)
{
fdc.stat=0x80;
fdc.pnum=fdc.ptot=0;
@@ -199,12 +202,12 @@ void fdc_reset()
}
}
sector_id_t fdc_get_read_track_sector()
sector_id_t fdc_get_read_track_sector(void)
{
return fdc.read_track_sector;
}
int fdc_ps1_525()
int fdc_ps1_525(void)
{
if ((romset == ROM_IBMPS1_2011) && fdd_is_525(real_drive(fdc.dor & 3)))
{
@@ -216,7 +219,7 @@ int fdc_ps1_525()
}
}
int fdc_get_compare_condition()
int fdc_get_compare_condition(void)
{
switch (floppyint)
{
@@ -230,36 +233,36 @@ int fdc_get_compare_condition()
}
}
int fdc_is_deleted()
int fdc_is_deleted(void)
{
return fdc.deleted & 1;
}
int fdc_is_sk()
int fdc_is_sk(void)
{
return (fdc.deleted & 0x20) ? 1 : 0;
}
void fdc_set_wrong_am()
void fdc_set_wrong_am(void)
{
fdc.wrong_am = 1;
}
int fdc_get_drive()
int fdc_get_drive(void)
{
return fdc.drive;
}
int fdc_get_bitcell_period();
int fdc_get_bitcell_period(void);
int fdc_get_perp()
int fdc_get_perp(void)
{
if (!AT || fdc.pcjr || fdc.ps1) return 0;
return fdc.perp;
}
int fdc_get_bit_rate();
int fdc_get_bit_rate(void);
int fdc_get_gap2(int drive)
{
@@ -278,7 +281,7 @@ int fdc_get_gap2(int drive)
}
}
int fdc_get_format_n()
int fdc_get_format_n(void)
{
return fdc.format_n;
}
@@ -289,7 +292,7 @@ int fdc_is_mfm()
}
#if 0
double fdc_get_hut()
double fdc_get_hut(void)
{
int hut = (fdc.specify[0] & 0xF);
double dusec;
@@ -301,7 +304,7 @@ double fdc_get_hut()
return (bcp * dhut * dusec * 1000.0);
}
double fdc_get_hlt()
double fdc_get_hlt(void)
{
int hlt = (fdc.specify[1] >> 1);
double dusec;
@@ -314,7 +317,7 @@ double fdc_get_hlt()
}
#endif
void fdc_request_next_sector_id()
void fdc_request_next_sector_id(void)
{
if (fdc.pcjr || !fdc.dma)
{
@@ -326,33 +329,33 @@ void fdc_request_next_sector_id()
}
}
void fdc_stop_id_request()
void fdc_stop_id_request(void)
{
fdc.stat &= 0x7f;
}
int fdc_get_gap()
int fdc_get_gap(void)
{
return fdc.gap;
}
int fdc_get_dtl()
int fdc_get_dtl(void)
{
return fdc.dtl;
}
int fdc_get_format_sectors()
int fdc_get_format_sectors(void)
{
return fdc.format_sectors;
}
void fdc_reset_fifo_buf()
void fdc_reset_fifo_buf(void)
{
memset(fdc.fifobuf, 0, 16);
fdc.fifobufpos = 0;
}
void fdc_fifo_buf_advance()
void fdc_fifo_buf_advance(void)
{
if (fdc.fifobufpos == fdc.tfifo)
{
@@ -370,7 +373,7 @@ void fdc_fifo_buf_write(int val)
fdc_fifo_buf_advance();
}
int fdc_fifo_buf_read()
int fdc_fifo_buf_read(void)
{
int temp = 0;
temp = fdc.fifobuf[fdc.fifobufpos];
@@ -378,7 +381,7 @@ int fdc_fifo_buf_read()
return temp;
}
static void fdc_int()
static void fdc_int(void)
{
if (!fdc.pcjr)
{
@@ -419,7 +422,7 @@ int bit_rate = 250;
static void fdc_rate(int drive);
void fdc_update_rates()
void fdc_update_rates(void)
{
fdc_rate(0);
fdc_rate(1);
@@ -461,7 +464,7 @@ void fdc_update_rwc(int drive, int rwc)
fdc_rate(drive);
}
int fdc_get_boot_drive()
int fdc_get_boot_drive(void)
{
return fdc.boot_drive;
}
@@ -478,7 +481,7 @@ void fdc_update_densel_polarity(int densel_polarity)
fdc_update_rates();
}
uint8_t fdc_get_densel_polarity()
uint8_t fdc_get_densel_polarity(void)
{
return fdc.densel_polarity;
}
@@ -542,7 +545,7 @@ void fdc_update_rate(int drive)
fdc.bitcell_period = 1000000 / bit_rate*2; /*Bitcell period in ns*/
}
int fdc_get_bit_rate()
int fdc_get_bit_rate(void)
{
switch(bit_rate)
{
@@ -562,7 +565,7 @@ int fdc_get_bit_rate()
return 2;
}
int fdc_get_bitcell_period()
int fdc_get_bitcell_period(void)
{
return fdc.bitcell_period;
}
@@ -641,7 +644,7 @@ int real_drive(int drive)
}
}
void fdc_implied_seek()
void fdc_implied_seek(void)
{
if (fdc.config & 0x40)
{
@@ -1935,7 +1938,7 @@ void fdc_overrun()
fdc_error(0x10, 0);
}
int fdc_is_verify()
int fdc_is_verify(void)
{
return (fdc.deleted & 2) ? 1 : 0;
}
@@ -2014,7 +2017,7 @@ int fdc_data(uint8_t data)
return 0;
}
void fdc_finishread()
void fdc_finishread(void)
{
fdc.inread = 0;
}
@@ -2035,7 +2038,7 @@ void fdc_sector_finishcompare(int satisfying)
fdc_callback(NULL);
}
void fdc_sector_finishread()
void fdc_sector_finishread(void)
{
fdc.stat = 0x10;
fdc.inread = 0;
@@ -2043,51 +2046,51 @@ void fdc_sector_finishread()
}
/* There is no sector ID. */
void fdc_noidam()
void fdc_noidam(void)
{
fdc_error(1, 0);
}
/* Sector ID's are there, but there is no sector. */
void fdc_nosector()
void fdc_nosector(void)
{
fdc_error(4, 0);
}
/* There is no sector data. */
void fdc_nodataam()
void fdc_nodataam(void)
{
fdc_error(1, 1);
}
/* Abnormal termination with both status 1 and 2 set to 0, used when abnormally
terminating the FDC FORMAT TRACK command. */
void fdc_cannotformat()
void fdc_cannotformat(void)
{
fdc_error(0, 0);
}
void fdc_datacrcerror()
void fdc_datacrcerror(void)
{
fdc_error(0x20, 0x20);
}
void fdc_headercrcerror()
void fdc_headercrcerror(void)
{
fdc_error(0x20, 0);
}
void fdc_wrongcylinder()
void fdc_wrongcylinder(void)
{
fdc_error(4, 0x10);
}
void fdc_badcylinder()
void fdc_badcylinder(void)
{
fdc_error(4, 0x02);
}
void fdc_writeprotect()
void fdc_writeprotect(void)
{
fdc_error(0x02, 0);
}
@@ -2158,12 +2161,12 @@ void fdc_sectorid(uint8_t track, uint8_t side, uint8_t sector, uint8_t size, uin
paramstogo=7;
}
void fdc_indexpulse()
void fdc_indexpulse(void)
{
return;
}
void fdc_hard_reset()
void fdc_hard_reset(void)
{
int i = 0;
int base_address = fdc.base_address;
@@ -2214,14 +2217,14 @@ void fdc_hard_reset()
}
}
void fdc_init()
void fdc_init(void)
{
fdc_hard_reset();
timer_add(fdc_callback, &floppytime, &floppytime, NULL);
}
void fdc_add()
void fdc_add(void)
{
io_sethandler(0x03f0, 0x0006, fdc_read, NULL, NULL, fdc_write, NULL, NULL, NULL);
io_sethandler(0x03f7, 0x0001, fdc_read, NULL, NULL, fdc_write, NULL, NULL, NULL);
@@ -2241,7 +2244,7 @@ void fdc_set_base(int base, int super_io)
fdc_log("FDC Base address set%s (%04X)\n", super_io ? " for Super I/O" : "", fdc.base_address);
}
void fdc_add_for_superio()
void fdc_add_for_superio(void)
{
io_sethandler(0x03f2, 0x0004, fdc_read, NULL, NULL, fdc_write, NULL, NULL, NULL);
io_sethandler(0x03f7, 0x0001, fdc_read, NULL, NULL, fdc_write, NULL, NULL, NULL);
@@ -2251,7 +2254,7 @@ void fdc_add_for_superio()
fdc_log("FDC Added for Super I/O (%04X)\n", fdc.base_address);
}
void fdc_add_pcjr()
void fdc_add_pcjr(void)
{
io_sethandler(0x00f0, 0x0006, fdc_read, NULL, NULL, fdc_write, NULL, NULL, NULL);
timer_add(fdc_watchdog_poll, &fdc.watchdog_timer, &fdc.watchdog_timer, &fdc);
@@ -2263,7 +2266,7 @@ void fdc_add_pcjr()
fdc_log("FDC Added for PCjr (%04X)\n", fdc.base_address);
}
void fdc_remove()
void fdc_remove(void)
{
fdc_log("FDC Removed (%04X)\n", fdc.base_address);
io_removehandler(fdc.base_address, 0x0006, fdc_read, NULL, NULL, fdc_write, NULL, NULL, NULL);
@@ -2276,7 +2279,7 @@ void fdc_floppychange_clear(int drive)
floppy_changed[drive] = 0;
}
void fdc_set_dskchg_activelow()
void fdc_set_dskchg_activelow(void)
{
fdc.dskchg_activelow = 1;
}
@@ -2286,7 +2289,7 @@ void fdc_3f1_enable(int enable)
fdc.enable_3f1 = enable;
}
void fdc_set_ps1()
void fdc_set_ps1(void)
{
fdc.ps1 = 1;
}

22
src/floppy/floppy_86f.c
View File

@@ -10,7 +10,7 @@
* data in the form of FM/MFM-encoded transitions) which also
* forms the core of the emulator's floppy disk emulation.
*
* Version: @(#)floppy_86f.c 1.0.11 2017/11/04
* Version: @(#)floppy_86f.c 1.0.12 2017/11/24
*
* Author: Miran Grca, <mgrca8@gmail.com>
* Copyright 2016,2017 Miran Grca.
@@ -131,6 +131,7 @@ typedef struct
} find_t;
#pragma pack(pop)
uint8_t encoded_fm[64] = { 0xAA, 0xAB, 0xAE, 0xAF, 0xBA, 0xBB, 0xBE, 0xBF, 0xEA, 0xEB, 0xEE, 0xEF, 0xFA, 0xFB, 0xFE, 0xFF,
0xAA, 0xAB, 0xAE, 0xAF, 0xBA, 0xBB, 0xBE, 0xBF, 0xEA, 0xEB, 0xEE, 0xEF, 0xFA, 0xFB, 0xFE, 0xFF,
0xAA, 0xAB, 0xAE, 0xAF, 0xBA, 0xBB, 0xBE, 0xBF, 0xEA, 0xEB, 0xEE, 0xEF, 0xFA, 0xFB, 0xFE, 0xFF,
@@ -141,6 +142,7 @@ uint8_t encoded_mfm[64] = { 0xAA, 0xA9, 0xA4, 0xA5, 0x92, 0x91, 0x94, 0x95, 0x4A
0xAA, 0xA9, 0xA4, 0xA5, 0x92, 0x91, 0x94, 0x95, 0x4A, 0x49, 0x44, 0x45, 0x52, 0x51, 0x54, 0x55,
0x2A, 0x29, 0x24, 0x25, 0x12, 0x11, 0x14, 0x15, 0x4A, 0x49, 0x44, 0x45, 0x52, 0x51, 0x54, 0x55 };
enum
{
FMT_PRETRK_GAP0,
@@ -163,6 +165,7 @@ enum
FMT_POSTTRK_GAP4
};
#pragma pack(push,1)
typedef struct
{
@@ -176,6 +179,7 @@ typedef union {
split_byte_t nibbles;
} decoded_t;
/* Disk flags: Bit 0 Has surface data (1 = yes, 0 = no)
Bits 2, 1 Hole (3 = ED + 2000 kbps, 2 = ED, 1 = HD, 0 = DD)
Bit 3 Sides (1 = 2 sides, 0 = 1 side)
@@ -235,24 +239,28 @@ struct
} d86f[FDD_NUM];
#pragma pack(pop)
#ifdef ENABLE_D86F_LOG
int d86f_do_log = ENABLE_D86F_LOG;
#endif
void d86f_log(const char *format, ...)
static void
d86f_log(const char *format, ...)
{
#ifdef ENABLE_D86F_LOG
if (d86f_do_log)
{
va_list ap;
va_start(ap, format);
vprintf(format, ap);
va_end(ap);
fflush(stdout);
va_list ap;
va_start(ap, format);
vfprintf(stdlog, format, ap);
va_end(ap);
fflush(stdlog);
}
#endif
}
void d86f_zero_bit_field(int drive, int side)
{
int i = 0;

102
src/keyboard_at.c
View File

@@ -8,7 +8,7 @@
*
* Intel 8042 (AT keyboard controller) emulation.
*
* Version: @(#)keyboard_at.c 1.0.9 2017/11/09
* Version: @(#)keyboard_at.c 1.0.10 2017/11/23
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -455,15 +455,15 @@ static scancode scancode_set3[272] = {
static void
kbd_log(const char *fmt, ...)
kbdlog(const char *fmt, ...)
{
#ifdef ENABLE_KEYBOARD_AT_LOG
if (keyboard_at_do_log) {
va_list ap;
va_start(ap, fmt);
vprintf(fmt, ap);
vfprintf(stdlog, fmt, ap);
va_end(ap);
fflush(stdout);
fflush(stdlog);
}
#endif
}
@@ -506,7 +506,7 @@ kbd_poll(void *priv)
if ((kbd->out_new != -1) && !kbd->last_irq) {
kbd->wantirq = 0;
if (kbd->out_new & 0x100) {
kbd_log("ATkbd: want mouse data\n");
kbdlog("ATkbd: want mouse data\n");
if (kbd->mem[0] & 0x02)
picint(0x1000);
kbd->out = kbd->out_new & 0xff;
@@ -516,7 +516,7 @@ kbd_poll(void *priv)
kbd->status |= STAT_MFULL;
kbd->last_irq = 0x1000;
} else {
kbd_log("ATkbd: want keyboard data\n");
kbdlog("ATkbd: want keyboard data\n");
if (kbd->mem[0] & 0x01)
picint(2);
kbd->out = kbd->out_new;
@@ -615,8 +615,8 @@ write_register:
if (!(val & 1) && kbd->wantirq)
kbd->wantirq = 0;
mouse_scan = !(val & 0x20);
kbd_log("ATkbd: mouse is now %s\n", mouse_scan ? "enabled" : "disabled");
kbd_log("ATkbd: mouse interrupt is now %s\n", (val & 0x02) ? "enabled" : "disabled");
kbdlog("ATkbd: mouse is now %s\n", mouse_scan ? "enabled" : "disabled");
kbdlog("ATkbd: mouse interrupt is now %s\n", (val & 0x02) ? "enabled" : "disabled");
/* Scan code translate ON/OFF. */
keyboard_mode &= 0x93;
@@ -643,7 +643,7 @@ write_register:
break;
case 0xaf: /*AMI - set extended controller RAM*/
kbd_log("AMI - set extended controller RAM\n");
kbdlog("AMI - set extended controller RAM\n");
if (kbd->secr_phase == 0) {
goto bad_command;
} else if (kbd->secr_phase == 1) {
@@ -657,11 +657,11 @@ write_register:
break;
case 0xcb: /*AMI - set keyboard mode*/
kbd_log("AMI - set keyboard mode\n");
kbdlog("AMI - set keyboard mode\n");
break;
case 0xcf: /*??? - sent by MegaPC BIOS*/
kbd_log("??? - sent by MegaPC BIOS\n");
kbdlog("??? - sent by MegaPC BIOS\n");
/* To make sure the keyboard works correctly on the MegaPC. */
keyboard_mode &= 0xFC;
keyboard_mode |= 2;
@@ -669,7 +669,7 @@ write_register:
break;
case 0xd1: /*Write output port*/
kbd_log("Write output port\n");
kbdlog("Write output port\n");
if ((kbd->output_port ^ val) & 0x02) { /*A20 enable change*/
mem_a20_key = val & 0x02;
mem_a20_recalc();
@@ -679,17 +679,17 @@ write_register:
break;
case 0xd2: /*Write to keyboard output buffer*/
kbd_log("ATkbd: write to keyboard output buffer\n");
kbdlog("ATkbd: write to keyboard output buffer\n");
kbd_adddata_keyboard(val);
break;
case 0xd3: /*Write to mouse output buffer*/
kbd_log("ATkbd: write to mouse output buffer\n");
kbdlog("ATkbd: write to mouse output buffer\n");
keyboard_at_adddata_mouse(val);
break;
case 0xd4: /*Write to mouse*/
kbd_log("ATkbd: write to mouse (%02X)\n", val);
kbdlog("ATkbd: write to mouse (%02X)\n", val);
if (mouse_write && (machines[machine].flags & MACHINE_PS2))
mouse_write(val, mouse_p);
else
@@ -698,7 +698,7 @@ write_register:
default:
bad_command:
kbd_log("ATkbd: bad keyboard controller 0060 write %02X command %02X\n", val, kbd->command);
kbdlog("ATkbd: bad keyboard controller 0060 write %02X command %02X\n", val, kbd->command);
}
} else {
/*Write to keyboard*/
@@ -728,7 +728,7 @@ bad_command:
break;
default:
kbd_log("ATkbd: bad keyboard 0060 write %02X command %02X\n", val, kbd->key_command);
kbdlog("ATkbd: bad keyboard 0060 write %02X command %02X\n", val, kbd->key_command);
}
} else {
kbd->key_command = val;
@@ -829,7 +829,7 @@ bad_command:
break;
default:
kbd_log("ATkbd: bad keyboard command %02X\n", val);
kbdlog("ATkbd: bad keyboard command %02X\n", val);
kbd_adddata_keyboard(0xfe);
}
}
@@ -890,31 +890,31 @@ bad_command:
break;
case 0xa1: /*AMI - get controller version*/
kbd_log("AMI - get controller version\n");
kbdlog("AMI - get controller version\n");
break;
case 0xa7: /*Disable mouse port*/
if (machines[machine].flags & MACHINE_PS2) {
kbd_log("ATkbd: disable mouse port\n");
kbdlog("ATkbd: disable mouse port\n");
mouse_scan = 0;
kbd->mem[0] |= 0x20;
} else {
kbd_log("ATkbd: Write Cache Bad\n");
kbdlog("ATkbd: Write Cache Bad\n");
}
break;
case 0xa8: /*Enable mouse port*/
if (machines[machine].flags & MACHINE_PS2) {
kbd_log("ATkbd: enable mouse port\n");
kbdlog("ATkbd: enable mouse port\n");
mouse_scan = 1;
kbd->mem[0] &= 0xDF;
} else {
kbd_log("ATkbd: Write Cache Good\n");
kbdlog("ATkbd: Write Cache Good\n");
}
break;
case 0xa9: /*Test mouse port*/
kbd_log("ATkbd: test mouse port\n");
kbdlog("ATkbd: test mouse port\n");
if (machines[machine].flags & MACHINE_PS2) {
kbd_adddata(0x00); /*no error*/
} else {
@@ -923,7 +923,7 @@ bad_command:
break;
case 0xaa: /*Self-test*/
kbd_log("Self-test\n");
kbdlog("Self-test\n");
if (! kbd->initialized) {
kbd->initialized = 1;
key_ctrl_queue_start = key_ctrl_queue_end = 0;
@@ -942,12 +942,12 @@ bad_command:
break;
case 0xab: /*Interface test*/
kbd_log("ATkbd: interface test\n");
kbdlog("ATkbd: interface test\n");
kbd_adddata(0x00); /*no error*/
break;
case 0xac: /*Diagnostic dump*/
kbd_log("ATkbd: diagnostic dump\n");
kbdlog("ATkbd: diagnostic dump\n");
for (i=0; i<16; i++)
kbd_adddata(kbd->mem[i]);
kbd_adddata((kbd->input_port & 0xf0) | 0x80);
@@ -956,12 +956,12 @@ bad_command:
break;
case 0xad: /*Disable keyboard*/
kbd_log("ATkbd: disable keyboard\n");
kbdlog("ATkbd: disable keyboard\n");
kbd->mem[0] |= 0x10;
break;
case 0xae: /*Enable keyboard*/
kbd_log("ATkbd: enable keyboard\n");
kbdlog("ATkbd: enable keyboard\n");
kbd->mem[0] &= ~0x10;
break;
@@ -982,14 +982,14 @@ bad_command:
case ROM_P55T2S:
case ROM_S1668:
/*Set extended controller RAM*/
kbd_log("ATkbd: set extended controller RAM\n");
kbdlog("ATkbd: set extended controller RAM\n");
kbd->want60 = 1;
kbd->secr_phase = 1;
break;
default:
/*Read keyboard version*/
kbd_log("ATkbd: read keyboard version\n");
kbdlog("ATkbd: read keyboard version\n");
kbd_adddata(0x00);
break;
}
@@ -1000,74 +1000,74 @@ bad_command:
case 0xb8: case 0xb9: case 0xba: case 0xbb:
case 0xbc: case 0xbd: case 0xbe: case 0xbf:
/*Set keyboard lines low (B0-B7) or high (B8-BF)*/
kbd_log("ATkbd: set keyboard lines low (B0-B7) or high (B8-BF)\n");
kbdlog("ATkbd: set keyboard lines low (B0-B7) or high (B8-BF)\n");
kbd_adddata(0x00);
break;
case 0xc0: /*Read input port*/
kbd_log("ATkbd: read input port\n");
kbdlog("ATkbd: read input port\n");
kbd_adddata(kbd->input_port | 4 | fdc_ps1_525());
kbd->input_port = ((kbd->input_port + 1) & 3) | (kbd->input_port & 0xfc) | fdc_ps1_525();
break;
case 0xc1: /*Copy bits 0 to 3 of input port to status bits 4 to 7*/
kbd_log("ATkbd: copy bits 0 to 3 of input port to status bits 4 to 7\n");
kbdlog("ATkbd: copy bits 0 to 3 of input port to status bits 4 to 7\n");
kbd->status &= 0xf;
kbd->status |= ((((kbd->input_port & 0xfc) | 0x84 | fdc_ps1_525()) & 0xf) << 4);
break;
case 0xc2: /*Copy bits 4 to 7 of input port to status bits 4 to 7*/
kbd_log("ATkbd: copy bits 4 to 7 of input port to status bits 4 to 7\n");
kbdlog("ATkbd: copy bits 4 to 7 of input port to status bits 4 to 7\n");
kbd->status &= 0xf;
kbd->status |= (((kbd->input_port & 0xfc) | 0x84 | fdc_ps1_525()) & 0xf0);
break;
case 0xc9: /*AMI - block P22 and P23 ???*/
kbd_log("AMI - block P22 and P23 ???\n");
kbdlog("AMI - block P22 and P23 ???\n");
break;
case 0xca: /*AMI - read keyboard mode*/
kbd_log("AMI - read keyboard mode\n");
kbdlog("AMI - read keyboard mode\n");
kbd_adddata(0x00); /*ISA mode*/
break;
case 0xcb: /*AMI - set keyboard mode*/
kbd_log("AMI - set keyboard mode\n");
kbdlog("AMI - set keyboard mode\n");
kbd->want60 = 1;
break;
case 0xcf: /*??? - sent by MegaPC BIOS*/
kbd_log("??? - sent by MegaPC BIOS\n");
kbdlog("??? - sent by MegaPC BIOS\n");
kbd->want60 = 1;
break;
case 0xd0: /*Read output port*/
kbd_log("ATkbd: read output port\n");
kbdlog("ATkbd: read output port\n");
kbd_adddata(kbd->output_port);
break;
case 0xd1: /*Write output port*/
kbd_log("ATkbd: write output port\n");
kbdlog("ATkbd: write output port\n");
kbd->want60 = 1;
break;
case 0xd2: /*Write keyboard output buffer*/
kbd_log("ATkbd: write keyboard output buffer\n");
kbdlog("ATkbd: write keyboard output buffer\n");
kbd->want60 = 1;
break;
case 0xd3: /*Write mouse output buffer*/
kbd_log("ATkbd: write mouse output buffer\n");
kbdlog("ATkbd: write mouse output buffer\n");
kbd->want60 = 1;
break;
case 0xd4: /*Write to mouse*/
kbd_log("ATkbd: write to mouse\n");
kbdlog("ATkbd: write to mouse\n");
kbd->want60 = 1;
break;
case 0xdd: /* Disable A20 Address Line */
kbd_log("ATkbd: disable A20 Address Line\n");
kbdlog("ATkbd: disable A20 Address Line\n");
kbd->output_port &= ~0x02;
mem_a20_key = 0;
mem_a20_recalc();
@@ -1075,7 +1075,7 @@ bad_command:
break;
case 0xdf: /* Enable A20 Address Line */
kbd_log("ATkbd: enable A20 address line\n");
kbdlog("ATkbd: enable A20 address line\n");
kbd->output_port |= 0x02;
mem_a20_key = 2;
mem_a20_recalc();
@@ -1083,19 +1083,19 @@ bad_command:
break;
case 0xe0: /*Read test inputs*/
kbd_log("ATkbd: read test inputs\n");
kbdlog("ATkbd: read test inputs\n");
kbd_adddata(0x00);
break;
case 0xef: /*??? - sent by AMI486*/
kbd_log("??? - sent by AMI486\n");
kbdlog("??? - sent by AMI486\n");
break;
case 0xf0: case 0xf1: case 0xf2: case 0xf3:
case 0xf4: case 0xf5: case 0xf6: case 0xf7:
case 0xf8: case 0xf9: case 0xfa: case 0xfb:
case 0xfc: case 0xfd: case 0xfe: case 0xff:
kbd_log("ATkbd: pulse\n");
kbdlog("ATkbd: pulse\n");
if (! (val & 1)) {
/* Pin 0 selected. */
/* trc_reset(2); */
@@ -1105,7 +1105,7 @@ bad_command:
break;
default:
kbd_log("ATkbd: bad controller command %02X\n", val);
kbdlog("ATkbd: bad controller command %02X\n", val);
}
break;
}
@@ -1314,7 +1314,7 @@ keyboard_at_set_mouse_scan(uint8_t val)
kbd->mem[0] &= 0xDF;
kbd->mem[0] |= (val ? 0x00 : 0x20);
kbd_log("ATkbd: mouse scan %sabled via PCI\n", mouse_scan ? "en" : "dis");
kbdlog("ATkbd: mouse scan %sabled via PCI\n", mouse_scan ? "en" : "dis");
}

20
src/machine/m_olivetti_m24.c
View File

@@ -8,7 +8,7 @@
*
* Emulation of the Olivetti M24.
*
* Version: @(#)m_olivetti_m24.c 1.0.4 2017/11/23
* Version: @(#)m_olivetti_m24.c 1.0.5 2017/11/24
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -112,16 +112,16 @@ int m24vid_do_log = ENABLE_M24VID_LOG;
static void
m24vid_log(const char *fmt, ...)
m24_log(const char *fmt, ...)
{
#ifdef ENABLE_M24VID_LOG
va_list ap;
if (m24vid_do_log) {
va_start(ap, fmt);
vprintf(fmt, ap);
vfprintf(stdlog, fmt, ap);
va_end(ap);
fflush(stdout);
fflush(stdlog);
}
#endif
}
@@ -525,13 +525,13 @@ kbd_poll(void *priv)
m24->wantirq = 0;
picint(2);
#if ENABLE_KEYBOARD_LOG
pclog("M24: take IRQ\n");
m24_log("M24: take IRQ\n");
#endif
}
if (!(m24->status & STAT_OFULL) && key_queue_start != key_queue_end) {
#if ENABLE_KEYBOARD_LOG
pclog("Reading %02X from the key queue at %i\n",
m24_log("Reading %02X from the key queue at %i\n",
m24->out, key_queue_start);
#endif
m24->out = key_queue[key_queue_start];
@@ -557,7 +557,7 @@ kbd_write(uint16_t port, uint8_t val, void *priv)
olim24_t *m24 = (olim24_t *)priv;
#if ENABLE_KEYBOARD_LOG
pclog("M24: write %04X %02X\n", port, val);
m24_log("M24: write %04X %02X\n", port, val);
#endif
#if 0
@@ -590,7 +590,7 @@ kbd_write(uint16_t port, uint8_t val, void *priv)
break;
default:
pclog("M24: bad keyboard command complete %02X\n", m24->command);
m24_log("M24: bad keyboard command complete %02X\n", m24->command);
}
}
} else {
@@ -614,7 +614,7 @@ kbd_write(uint16_t port, uint8_t val, void *priv)
break;
default:
pclog("M24: bad keyboard command %02X\n", val);
m24_log("M24: bad keyboard command %02X\n", val);
}
}
break;
@@ -667,7 +667,7 @@ kbd_read(uint16_t port, void *priv)
break;
default:
pclog("\nBad M24 keyboard read %04X\n", port);
m24_log("\nBad M24 keyboard read %04X\n", port);
}
return(ret);

7
src/network/net_ne2000.c
View File

@@ -10,13 +10,14 @@
*
* NOTE: The file will also implement an NE1000 for 8-bit ISA systems.
*
* Version: @(#)net_ne2000.c 1.0.23 2017/11/04
* Version: @(#)net_ne2000.c 1.0.24 2017/11/24
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Peter Grehan, grehan@iprg.nokia.com>
* SA1988, Tenshi
*
* Based on @(#)ne2k.cc v1.56.2.1 2004/02/02 22:37:22 cbothamy
*
* Portions Copyright (C) 2002 MandrakeSoft S.A.
* Copyright 2017 Fred N. van Kempen.
*/
@@ -231,9 +232,9 @@ nelog(int lvl, const char *fmt, ...)
if (nic_do_log >= lvl) {
va_start(ap, fmt);
vprintf(fmt, ap);
vfprintf(stdlog, fmt, ap);
va_end(ap);
fflush(stdout);
fflush(stdlog);
}
#endif
}

87
src/pci.c
View File

@@ -58,20 +58,23 @@ PCI_RESET pci_reset_handler;
int pci_do_log = ENABLE_PCI_LOG;
#endif
void pci_log(const char *format, ...)
static void
pcilog(const char *format, ...)
{
#ifdef ENABLE_PCI_LOG
if (pci_do_log)
{
va_list ap;
va_start(ap, format);
vprintf(format, ap);
vfprintf(stdlog, format, ap);
va_end(ap);
fflush(stdout);
fflush(stdlog);
}
#endif
}
static void pci_cf8_write(uint16_t port, uint32_t val, void *p)
{
pci_index = val & 0xff;
@@ -103,7 +106,7 @@ static void pci_write(uint16_t port, uint8_t val, void *priv)
{
if (pci_cards[slot].write)
{
/* pci_log("Reading PCI card on slot %02X (pci_cards[%i])...\n", pci_card, slot); */
/* pcilog("Reading PCI card on slot %02X (pci_cards[%i])...\n", pci_card, slot); */
pci_cards[slot].write(pci_func, pci_index | (port & 3), val, pci_cards[slot].priv);
}
}
@@ -142,7 +145,7 @@ static uint8_t pci_read(uint16_t port, void *priv)
static void elcr_write(uint16_t port, uint8_t val, void *priv)
{
/* pci_log("ELCR%i: WRITE %02X\n", port & 1, val); */
/* pcilog("ELCR%i: WRITE %02X\n", port & 1, val); */
if (port & 1)
{
val &= 0xDE;
@@ -153,12 +156,12 @@ static void elcr_write(uint16_t port, uint8_t val, void *priv)
}
elcr[port & 1] = val;
pci_log("ELCR %i: %c %c %c %c %c %c %c %c\n", port & 1, (val & 1) ? 'L' : 'E', (val & 2) ? 'L' : 'E', (val & 4) ? 'L' : 'E', (val & 8) ? 'L' : 'E', (val & 0x10) ? 'L' : 'E', (val & 0x20) ? 'L' : 'E', (val & 0x40) ? 'L' : 'E', (val & 0x80) ? 'L' : 'E');
pcilog("ELCR %i: %c %c %c %c %c %c %c %c\n", port & 1, (val & 1) ? 'L' : 'E', (val & 2) ? 'L' : 'E', (val & 4) ? 'L' : 'E', (val & 8) ? 'L' : 'E', (val & 0x10) ? 'L' : 'E', (val & 0x20) ? 'L' : 'E', (val & 0x40) ? 'L' : 'E', (val & 0x80) ? 'L' : 'E');
}
static uint8_t elcr_read(uint16_t port, void *priv)
{
/* pci_log("ELCR%i: READ %02X\n", port & 1, elcr[port & 1]); */
/* pcilog("ELCR%i: READ %02X\n", port & 1, elcr[port & 1]); */
return elcr[port & 1];
}
@@ -290,7 +293,7 @@ uint8_t pci_use_mirq(uint8_t mirq)
return 1;
}
#define pci_mirq_log pci_log
#define pci_mirq_log pcilog
void pci_set_mirq(uint8_t mirq)
{
@@ -361,82 +364,82 @@ void pci_set_irq(uint8_t card, uint8_t pci_int)
if (!last_pci_card)
{
pci_log("pci_set_irq(%02X, %02X): No PCI slots (how are we even here?!)\n", card, pci_int);
pcilog("pci_set_irq(%02X, %02X): No PCI slots (how are we even here?!)\n", card, pci_int);
return;
}
else
{
pci_log("pci_set_irq(%02X, %02X): %i PCI slots\n", card, pci_int, last_pci_card);
pcilog("pci_set_irq(%02X, %02X): %i PCI slots\n", card, pci_int, last_pci_card);
}
slot = pci_card_to_slot_mapping[card];
if (slot == 0xFF)
{
pci_log("pci_set_irq(%02X, %02X): Card is not on a PCI slot (how are we even here?!)\n", card, pci_int);
pcilog("pci_set_irq(%02X, %02X): Card is not on a PCI slot (how are we even here?!)\n", card, pci_int);
return;
}
else
{
pci_log("pci_set_irq(%02X, %02X): Card is on PCI slot %02X\n", card, pci_int, slot);
pcilog("pci_set_irq(%02X, %02X): Card is on PCI slot %02X\n", card, pci_int, slot);
}
if (!pci_cards[slot].irq_routing[pci_int_index])
{
pci_log("pci_set_irq(%02X, %02X): No IRQ routing for this slot and INT pin combination\n", card, pci_int);
pcilog("pci_set_irq(%02X, %02X): No IRQ routing for this slot and INT pin combination\n", card, pci_int);
return;
}
else
{
irq_routing = (pci_cards[slot].irq_routing[pci_int_index] - PCI_INTA) & 3;
pci_log("pci_set_irq(%02X, %02X): IRQ routing for this slot and INT pin combination: %02X\n", card, pci_int, irq_routing);
pcilog("pci_set_irq(%02X, %02X): IRQ routing for this slot and INT pin combination: %02X\n", card, pci_int, irq_routing);
}
if (pci_irqs[irq_routing] > 0x0F)
{
pci_log("pci_set_irq(%02X, %02X): IRQ line is disabled\n", card, pci_int);
pcilog("pci_set_irq(%02X, %02X): IRQ line is disabled\n", card, pci_int);
return;
}
else
{
irq_line = pci_irqs[irq_routing];
pci_log("pci_set_irq(%02X, %02X): Using IRQ %i\n", card, pci_int, irq_line);
pcilog("pci_set_irq(%02X, %02X): Using IRQ %i\n", card, pci_int, irq_line);
}
if (pci_irq_is_level(irq_line) && (pci_irq_hold[irq_line] & (1 << card)))
{
/* IRQ already held, do nothing. */
pci_log("pci_set_irq(%02X, %02X): Card is already holding the IRQ\n", card, pci_int);
pcilog("pci_set_irq(%02X, %02X): Card is already holding the IRQ\n", card, pci_int);
return;
}
else
{
pci_log("pci_set_irq(%02X, %02X): Card not yet holding the IRQ\n", card, pci_int);
pcilog("pci_set_irq(%02X, %02X): Card not yet holding the IRQ\n", card, pci_int);
}
level = pci_irq_is_level(irq_line);
if (!level || !pci_irq_hold[irq_line])
{
pci_log("pci_set_irq(%02X, %02X): Issuing %s-triggered IRQ (%sheld)\n", card, pci_int, level ? "level" : "edge", pci_irq_hold[irq_line] ? "" : "not ");
pcilog("pci_set_irq(%02X, %02X): Issuing %s-triggered IRQ (%sheld)\n", card, pci_int, level ? "level" : "edge", pci_irq_hold[irq_line] ? "" : "not ");
/* Only raise the interrupt if it's edge-triggered or level-triggered and not yet being held. */
picintlevel(1 << irq_line);
}
else if (level && pci_irq_hold[irq_line])
{
pci_log("pci_set_irq(%02X, %02X): IRQ line already being held\n", card, pci_int);
pcilog("pci_set_irq(%02X, %02X): IRQ line already being held\n", card, pci_int);
}
/* If the IRQ is level-triggered, mark that this card is holding it. */
if (pci_irq_is_level(irq_line))
{
pci_log("pci_set_irq(%02X, %02X): Marking that this card is holding the IRQ\n", card, pci_int);
pcilog("pci_set_irq(%02X, %02X): Marking that this card is holding the IRQ\n", card, pci_int);
pci_irq_hold[irq_line] |= (1 << card);
}
else
{
pci_log("pci_set_irq(%02X, %02X): Edge-triggered interrupt, not marking\n", card, pci_int);
pcilog("pci_set_irq(%02X, %02X): Edge-triggered interrupt, not marking\n", card, pci_int);
}
}
@@ -511,52 +514,52 @@ void pci_clear_irq(uint8_t card, uint8_t pci_int)
if (!last_pci_card)
{
pci_log("pci_clear_irq(%02X, %02X): No PCI slots (how are we even here?!)\n", card, pci_int);
pcilog("pci_clear_irq(%02X, %02X): No PCI slots (how are we even here?!)\n", card, pci_int);
return;
}
else
{
pci_log("pci_clear_irq(%02X, %02X): %i PCI slots\n", card, pci_int, last_pci_card);
pcilog("pci_clear_irq(%02X, %02X): %i PCI slots\n", card, pci_int, last_pci_card);
}
slot = pci_card_to_slot_mapping[card];
if (slot == 0xFF)
{
pci_log("pci_clear_irq(%02X, %02X): Card is not on a PCI slot (how are we even here?!)\n", card, pci_int);
pcilog("pci_clear_irq(%02X, %02X): Card is not on a PCI slot (how are we even here?!)\n", card, pci_int);
return;
}
else
{
pci_log("pci_clear_irq(%02X, %02X): Card is on PCI slot %02X\n", card, pci_int, slot);
pcilog("pci_clear_irq(%02X, %02X): Card is on PCI slot %02X\n", card, pci_int, slot);
}
if (!pci_cards[slot].irq_routing[pci_int_index])
{
pci_log("pci_clear_irq(%02X, %02X): No IRQ routing for this slot and INT pin combination\n", card, pci_int);
pcilog("pci_clear_irq(%02X, %02X): No IRQ routing for this slot and INT pin combination\n", card, pci_int);
return;
}
else
{
irq_routing = (pci_cards[slot].irq_routing[pci_int_index] - PCI_INTA) & 3;
pci_log("pci_clear_irq(%02X, %02X): IRQ routing for this slot and INT pin combination: %02X\n", card, pci_int, irq_routing);
pcilog("pci_clear_irq(%02X, %02X): IRQ routing for this slot and INT pin combination: %02X\n", card, pci_int, irq_routing);
}
if (pci_irqs[irq_routing] > 0x0F)
{
pci_log("pci_clear_irq(%02X, %02X): IRQ line is disabled\n", card, pci_int);
pcilog("pci_clear_irq(%02X, %02X): IRQ line is disabled\n", card, pci_int);
return;
}
else
{
irq_line = pci_irqs[irq_routing];
pci_log("pci_clear_irq(%02X, %02X): Using IRQ %i\n", card, pci_int, irq_line);
pcilog("pci_clear_irq(%02X, %02X): Using IRQ %i\n", card, pci_int, irq_line);
}
if (pci_irq_is_level(irq_line) && !(pci_irq_hold[irq_line] & (1 << card)))
{
/* IRQ not held, do nothing. */
pci_log("pci_clear_irq(%02X, %02X): Card is not holding the IRQ\n", card, pci_int);
pcilog("pci_clear_irq(%02X, %02X): Card is not holding the IRQ\n", card, pci_int);
return;
}
@@ -564,22 +567,22 @@ void pci_clear_irq(uint8_t card, uint8_t pci_int)
if (level)
{
pci_log("pci_clear_irq(%02X, %02X): Releasing this card's hold on the IRQ\n", card, pci_int);
pcilog("pci_clear_irq(%02X, %02X): Releasing this card's hold on the IRQ\n", card, pci_int);
pci_irq_hold[irq_line] &= ~(1 << card);
if (!pci_irq_hold[irq_line])
{
pci_log("pci_clear_irq(%02X, %02X): IRQ no longer held by any card, clearing it\n", card, pci_int);
pcilog("pci_clear_irq(%02X, %02X): IRQ no longer held by any card, clearing it\n", card, pci_int);
picintc(1 << irq_line);
}
else
{
pci_log("pci_clear_irq(%02X, %02X): IRQ is still being held\n", card, pci_int);
pcilog("pci_clear_irq(%02X, %02X): IRQ is still being held\n", card, pci_int);
}
}
else
{
pci_log("pci_clear_irq(%02X, %02X): Clearing edge-triggered interrupt\n", card, pci_int);
pcilog("pci_clear_irq(%02X, %02X): Clearing edge-triggered interrupt\n", card, pci_int);
picintc(1 << irq_line);
}
}
@@ -673,7 +676,7 @@ static void trc_reset(uint8_t val)
static void trc_write(uint16_t port, uint8_t val, void *priv)
{
/* pci_log("TRC Write: %02X\n", val); */
/* pcilog("TRC Write: %02X\n", val); */
if (!(trc_reg & 4) && (val & 4))
{
trc_reset(val);
@@ -741,7 +744,7 @@ void pci_register_slot(int card, int type, int inta, int intb, int intc, int int
pci_cards[last_pci_card].write = NULL;
pci_cards[last_pci_card].priv = NULL;
pci_card_to_slot_mapping[card] = last_pci_card;
pci_log("pci_register_slot(): pci_cards[%i].id = %02X\n", last_pci_card, card);
pcilog("pci_register_slot(): pci_cards[%i].id = %02X\n", last_pci_card, card);
last_pci_card++;
}
@@ -751,18 +754,18 @@ uint8_t pci_add_card(uint8_t add_type, uint8_t (*read)(int func, int addr, void
if (add_type < PCI_ADD_NORMAL)
{
pci_log("pci_add_card(): Adding PCI CARD at specific slot %02X [SPECIFIC]\n", add_type);
pcilog("pci_add_card(): Adding PCI CARD at specific slot %02X [SPECIFIC]\n", add_type);
}
if (!PCI)
{
pci_log("pci_add_card(): Adding PCI CARD failed (non-PCI machine) [%s]\n", (add_type == PCI_ADD_NORMAL) ? "NORMAL" : ((add_type == PCI_ADD_VIDEO) ? "VIDEO" : "SPECIFIC"));
pcilog("pci_add_card(): Adding PCI CARD failed (non-PCI machine) [%s]\n", (add_type == PCI_ADD_NORMAL) ? "NORMAL" : ((add_type == PCI_ADD_VIDEO) ? "VIDEO" : "SPECIFIC"));
return 0xFF;
}
if (!last_pci_card)
{
pci_log("pci_add_card(): Adding PCI CARD failed (no PCI slots) [%s]\n", (add_type == PCI_ADD_NORMAL) ? "NORMAL" : ((add_type == PCI_ADD_VIDEO) ? "VIDEO" : "SPECIFIC"));
pcilog("pci_add_card(): Adding PCI CARD failed (no PCI slots) [%s]\n", (add_type == PCI_ADD_NORMAL) ? "NORMAL" : ((add_type == PCI_ADD_VIDEO) ? "VIDEO" : "SPECIFIC"));
return 0xFF;
}
@@ -777,12 +780,12 @@ uint8_t pci_add_card(uint8_t add_type, uint8_t (*read)(int func, int addr, void
pci_cards[i].read = read;
pci_cards[i].write = write;
pci_cards[i].priv = priv;
pci_log("pci_add_card(): Adding PCI CARD to pci_cards[%i] (slot %02X) [%s]\n", i, pci_cards[i].id, (add_type == PCI_ADD_NORMAL) ? "NORMAL" : ((add_type == PCI_ADD_VIDEO) ? "VIDEO" : "SPECIFIC"));
pcilog("pci_add_card(): Adding PCI CARD to pci_cards[%i] (slot %02X) [%s]\n", i, pci_cards[i].id, (add_type == PCI_ADD_NORMAL) ? "NORMAL" : ((add_type == PCI_ADD_VIDEO) ? "VIDEO" : "SPECIFIC"));
return pci_cards[i].id;
}
}
}
pci_log("pci_add_card(): Adding PCI CARD failed (unable to find a suitable PCI slot) [%s]\n", (add_type == PCI_ADD_NORMAL) ? "NORMAL" : ((add_type == PCI_ADD_VIDEO) ? "VIDEO" : "SPECIFIC"));
pcilog("pci_add_card(): Adding PCI CARD failed (unable to find a suitable PCI slot) [%s]\n", (add_type == PCI_ADD_NORMAL) ? "NORMAL" : ((add_type == PCI_ADD_VIDEO) ? "VIDEO" : "SPECIFIC"));
return 0xFF;
}

6
src/scsi/scsi_aha154x.c
View File

@@ -10,7 +10,7 @@
* made by Adaptec, Inc. These controllers were designed for
* the ISA bus.
*
* Version: @(#)scsi_aha154x.c 1.0.34 2017/11/04
* Version: @(#)scsi_aha154x.c 1.0.35 2017/11/24
*
* Authors: Fred N. van Kempen, <decwiz@yahoo.com>
* Original Buslogic version by SA1988 and Miran Grca.
@@ -91,9 +91,9 @@ aha_log(const char *fmt, ...)
if (aha_do_log) {
va_start(ap, fmt);
vprintf(fmt, ap);
vfprintf(stdlog, fmt, ap);
va_end(ap);
fflush(stdout);
fflush(stdlog);
}
#endif
}

575
src/scsi/scsi_bus.c
View File

@@ -8,7 +8,7 @@
*
* The generic SCSI bus operations handler.
*
* Version: @(#)scsi_bus.c 1.0.3 2017/11/04
* Version: @(#)scsi_bus.c 1.0.4 2017/11/24
*
* NOTES: For now ported from PCem with some modifications
* but at least it's a start.
@@ -38,22 +38,22 @@
#define SET_BUS_STATE(bus, state) bus->bus_out = (bus->bus_out & ~(SCSI_PHASE_MESSAGE_IN)) | (state & (SCSI_PHASE_MESSAGE_IN))
uint32_t SCSI_BufferLength;
#ifdef ENABLE_SCSI_BUS_LOG
int scsi_bus_do_log = ENABLE_SCSI_BUS_LOG;
#endif
void scsi_bus_log(const char *format, ...)
static void
scsi_bus_log(const char *format, ...)
{
#ifdef ENABLE_SCSI_BUS_LOG
if (scsi_bus_do_log)
{
va_list ap;
va_start(ap, format);
vprintf(format, ap);
va_end(ap);
fflush(stdout);
}
if (scsi_bus_do_log) {
va_list ap;
va_start(ap, format);
vfprintf(stdlog, format, ap);
va_end(ap);
fflush(stdlog);
}
#endif
}
@@ -61,327 +61,302 @@ void scsi_bus_log(const char *format, ...)
/* get the length of a SCSI command based on its command byte type */
static int get_cmd_len(int cbyte)
{
int len;
int group;
int len;
int group;
group = (cbyte>>5) & 7;
group = (cbyte>>5) & 7;
if (group == 0) len = 6;
if (group == 1 || group == 2) len = 10;
if (group == 5) len = 12;
if (group == 0) len = 6;
if (group == 1 || group == 2) len = 10;
if (group == 5) len = 12;
//scsi_bus_log("Command group %d, length %d\n", group, len);
return len;
// scsi_bus_log("Command group %d, length %d\n", group, len);
return(len);
}
static int get_dev_id(uint8_t data)
{
int c;
for (c = 0; c < SCSI_ID_MAX; c++)
{
if (data & (1 << c))
{
return c;
static int
get_dev_id(uint8_t data)
{
int c;
for (c = 0; c < SCSI_ID_MAX; c++) {
if (data & (1 << c)) return(c);
}
return(-1);
}
int
scsi_bus_update(scsi_bus_t *bus, int bus_assert)
{
scsi_device_t *dev;
uint8_t lun = 0;
if (bus_assert & BUS_ARB)
bus->state = STATE_IDLE;
switch (bus->state) {
case STATE_IDLE:
scsi_bus_log("State Idle\n");
bus->clear_req = bus->change_state_delay = bus->new_req_delay = 0;
if ((bus_assert & BUS_SEL) && !(bus_assert & BUS_BSY)) {
uint8_t sel_data = BUS_GETDATA(bus_assert);
bus->dev_id = get_dev_id(sel_data);
if ((bus->dev_id != -1) && scsi_device_present(bus->dev_id, 0)) {
bus->bus_out |= BUS_BSY;
bus->state = STATE_PHASESEL;
}
//scsi_bus_log("Device id %i\n", bus->dev_id);
break;
}
}
return -1;
}
break;
int scsi_bus_update(scsi_bus_t *bus, int bus_assert)
{
scsi_device_t *dev;
uint8_t lun = 0;
if (bus_assert & BUS_ARB)
bus->state = STATE_IDLE;
switch (bus->state)
{
case STATE_IDLE:
scsi_bus_log("State Idle\n");
bus->clear_req = bus->change_state_delay = bus->new_req_delay = 0;
if ((bus_assert & BUS_SEL) && !(bus_assert & BUS_BSY))
{
uint8_t sel_data = BUS_GETDATA(bus_assert);
bus->dev_id = get_dev_id(sel_data);
if ((bus->dev_id != -1) && scsi_device_present(bus->dev_id, 0))
{
bus->bus_out |= BUS_BSY;
bus->state = STATE_PHASESEL;
case STATE_PHASESEL:
scsi_bus_log("State Phase Sel\n");
if (! (bus_assert & BUS_SEL)) {
if (! (bus_assert & BUS_ATN)) {
if ((bus->dev_id != -1) &&
scsi_device_present(bus->dev_id, 0)) {
bus->state = STATE_COMMAND;
bus->bus_out = BUS_BSY | BUS_REQ;
bus->command_pos = 0;
SET_BUS_STATE(bus, SCSI_PHASE_COMMAND);
} else {
bus->state = STATE_IDLE;
bus->bus_out = 0;
}
//scsi_bus_log("Device id %i\n", bus->dev_id);
break;
}
break;
case STATE_PHASESEL:
scsi_bus_log("State Phase Sel\n");
if (!(bus_assert & BUS_SEL))
{
if (!(bus_assert & BUS_ATN))
{
if ((bus->dev_id != -1) && scsi_device_present(bus->dev_id, 0))
{
bus->state = STATE_COMMAND;
bus->bus_out = BUS_BSY | BUS_REQ;
bus->command_pos = 0;
SET_BUS_STATE(bus, SCSI_PHASE_COMMAND);
}
else
{
bus->state = STATE_IDLE;
bus->bus_out = 0;
}
}
else
fatal("dropped sel %x\n", bus_assert & BUS_ATN);
}
break;
case STATE_COMMAND:
if ((bus_assert & BUS_ACK) && !(bus->bus_in & BUS_ACK))
{
scsi_bus_log("State Command\n");
bus->command[bus->command_pos++] = BUS_GETDATA(bus_assert);
bus->clear_req = 3;
bus->new_state = bus->bus_out & SCSI_PHASE_MESSAGE_IN;
bus->bus_out &= ~BUS_REQ;
if (get_cmd_len(bus->command[0]) == bus->command_pos)
{
lun = (bus->command[1] >> 5) & 7;
bus->data_pos = 0;
} else
fatal("dropped sel %x\n", bus_assert & BUS_ATN);
}
break;
dev = &SCSIDevices[bus->dev_id][lun];
case STATE_COMMAND:
if ((bus_assert & BUS_ACK) && !(bus->bus_in & BUS_ACK)) {
scsi_bus_log("State Command\n");
bus->command[bus->command_pos++] = BUS_GETDATA(bus_assert);
scsi_bus_log("Command 0x%02X\n", bus->command[0]);
dev->BufferLength = -1;
scsi_device_command_phase0(bus->dev_id, lun, get_cmd_len(bus->command[0]), bus->command);
scsi_bus_log("(%02X:%02X): Command %02X: Buffer Length %i, SCSI Phase %02X\n", bus->dev_id, lun, bus->command[0], dev->BufferLength, SCSIPhase);
if ((SCSIPhase == SCSI_PHASE_DATA_IN) || (SCSIPhase == SCSI_PHASE_DATA_OUT))
{
scsi_bus_log("dev->CmdBuffer = %08X\n", dev->CmdBuffer);
dev->CmdBuffer = (uint8_t *) malloc(dev->BufferLength);
scsi_bus_log("dev->CmdBuffer = %08X\n", dev->CmdBuffer);
}
if (SCSIPhase == SCSI_PHASE_DATA_OUT)
{
/* Write direction commands have delayed execution - only execute them after the bus has gotten all the data from the host. */
scsi_bus_log("Next state is data out\n");
bus->state = STATE_COMMANDWAIT;
bus->clear_req = 0;
}
else
{
/* Other command - execute immediately. */
bus->new_state = SCSIPhase;
if (SCSIPhase == SCSI_PHASE_DATA_IN)
{
scsi_device_command_phase1(bus->dev_id, lun);
}
bus->change_state_delay = 4;
}
}
}
break;
case STATE_COMMANDWAIT:
bus->new_state = SCSI_PHASE_DATA_OUT;
bus->change_state_delay = 4;
bus->clear_req = 4;
break;
case STATE_DATAIN:
if ((bus_assert & BUS_ACK) && !(bus->bus_in & BUS_ACK))
{
scsi_bus_log("State Data In\n");
/* This seems to be read, so we first execute the command, then we return the bytes to the host. */
bus->clear_req = 3;
bus->new_state = bus->bus_out & SCSI_PHASE_MESSAGE_IN;
bus->bus_out &= ~BUS_REQ;
if (get_cmd_len(bus->command[0]) == bus->command_pos) {
lun = (bus->command[1] >> 5) & 7;
bus->data_pos = 0;
dev = &SCSIDevices[bus->dev_id][lun];
if (bus->data_pos >= SCSIDevices[bus->dev_id][lun].BufferLength)
{
free(dev->CmdBuffer);
dev->CmdBuffer = NULL;
bus->bus_out &= ~BUS_REQ;
bus->new_state = SCSI_PHASE_STATUS;
bus->change_state_delay = 4;
bus->new_req_delay = 8;
scsi_bus_log("Command 0x%02X\n", bus->command[0]);
dev->BufferLength = -1;
scsi_device_command_phase0(bus->dev_id, lun,
get_cmd_len(bus->command[0]),
bus->command);
scsi_bus_log("(%02X:%02X): Command %02X: Buffer Length %i, SCSI Phase %02X\n", bus->dev_id, lun, bus->command[0], dev->BufferLength, SCSIPhase);
if ((SCSIPhase == SCSI_PHASE_DATA_IN) ||
(SCSIPhase == SCSI_PHASE_DATA_OUT)) {
scsi_bus_log("dev->CmdBuffer = %08X\n", dev->CmdBuffer);
dev->CmdBuffer = (uint8_t *) malloc(dev->BufferLength);
scsi_bus_log("dev->CmdBuffer = %08X\n", dev->CmdBuffer);
}
else
{
uint8_t val = dev->CmdBuffer[bus->data_pos++];
bus->bus_out = (bus->bus_out & ~BUS_DATAMASK) | BUS_SETDATA(val) | BUS_DBP | BUS_REQ;
bus->clear_req = 3;
bus->bus_out &= ~BUS_REQ;
bus->new_state = SCSI_PHASE_DATA_IN;
if (SCSIPhase == SCSI_PHASE_DATA_OUT) {
/* Write direction commands have delayed execution - only execute them after the bus has gotten all the data from the host. */
scsi_bus_log("Next state is data out\n");
bus->state = STATE_COMMANDWAIT;
bus->clear_req = 0;
} else {
/* Other command - execute immediately. */
bus->new_state = SCSIPhase;
if (SCSIPhase == SCSI_PHASE_DATA_IN) {
scsi_device_command_phase1(bus->dev_id, lun);
}
bus->change_state_delay = 4;
}
}
break;
}
break;
case STATE_DATAOUT:
if ((bus_assert & BUS_ACK) && !(bus->bus_in & BUS_ACK))
{
scsi_bus_log("State Data Out\n");
case STATE_COMMANDWAIT:
bus->new_state = SCSI_PHASE_DATA_OUT;
bus->change_state_delay = 4;
bus->clear_req = 4;
break;
lun = (bus->command[1] >> 5) & 7;
case STATE_DATAIN:
if ((bus_assert & BUS_ACK) && !(bus->bus_in & BUS_ACK)) {
scsi_bus_log("State Data In\n");
dev = &SCSIDevices[bus->dev_id][lun];
/* This is write, so first get the data from the host, then execute the last phase of the command. */
dev->CmdBuffer[bus->data_pos++] = BUS_GETDATA(bus_assert);
/* This seems to be read, so we first execute the command, then we return the bytes to the host. */
if (bus->data_pos >= SCSIDevices[bus->dev_id][lun].BufferLength)
{
/* scsi_bus_log("%04X bytes written (%02X %02X)\n", bus->data_pos, bus->command[0], bus->command[1]); */
scsi_bus_log("Actually executing write command\n");
scsi_device_command_phase1(bus->dev_id, lun);
free(dev->CmdBuffer);
dev->CmdBuffer = NULL;
bus->bus_out &= ~BUS_REQ;
bus->new_state = SCSI_PHASE_STATUS;
bus->change_state_delay = 4;
bus->new_req_delay = 8;
}
else
{
bus->bus_out |= BUS_REQ;
}
}
break;
case STATE_STATUS:
scsi_bus_log("State Status\n");
if ((bus_assert & BUS_ACK) && !(bus->bus_in & BUS_ACK))
{
/* scsi_bus_log("Preparing for message in\n"); */
lun = (bus->command[1] >> 5) & 7;
dev = &SCSIDevices[bus->dev_id][lun];
if (bus->data_pos >= SCSIDevices[bus->dev_id][lun].BufferLength) {
free(dev->CmdBuffer);
dev->CmdBuffer = NULL;
bus->bus_out &= ~BUS_REQ;
bus->new_state = SCSI_PHASE_MESSAGE_IN;
bus->new_state = SCSI_PHASE_STATUS;
bus->change_state_delay = 4;
bus->new_req_delay = 8;
}
break;
case STATE_MESSAGEIN:
scsi_bus_log("State Message In\n");
if ((bus_assert & BUS_ACK) && !(bus->bus_in & BUS_ACK))
{
} else {
uint8_t val = dev->CmdBuffer[bus->data_pos++];
bus->bus_out = (bus->bus_out & ~BUS_DATAMASK) | BUS_SETDATA(val) | BUS_DBP | BUS_REQ;
bus->clear_req = 3;
bus->bus_out &= ~BUS_REQ;
bus->new_state = BUS_IDLE;
bus->new_state = SCSI_PHASE_DATA_IN;
}
}
break;
case STATE_DATAOUT:
if ((bus_assert & BUS_ACK) && !(bus->bus_in & BUS_ACK)) {
scsi_bus_log("State Data Out\n");
lun = (bus->command[1] >> 5) & 7;
dev = &SCSIDevices[bus->dev_id][lun];
/* This is write, so first get the data from the host, then execute the last phase of the command. */
dev->CmdBuffer[bus->data_pos++] = BUS_GETDATA(bus_assert);
if (bus->data_pos >= SCSIDevices[bus->dev_id][lun].BufferLength) {
/* scsi_bus_log("%04X bytes written (%02X %02X)\n", bus->data_pos, bus->command[0], bus->command[1]); */
scsi_bus_log("Actually executing write command\n");
scsi_device_command_phase1(bus->dev_id, lun);
free(dev->CmdBuffer);
dev->CmdBuffer = NULL;
bus->bus_out &= ~BUS_REQ;
bus->new_state = SCSI_PHASE_STATUS;
bus->change_state_delay = 4;
}
break;
}
bus->bus_in = bus_assert;
return bus->bus_out | bus->bus_in;
}
int scsi_bus_read(scsi_bus_t *bus)
{
scsi_device_t *dev;
uint8_t lun = 0;
if (bus->clear_req)
{
bus->clear_req--;
if (!bus->clear_req)
{
scsi_bus_log("Clear REQ\n");
SET_BUS_STATE(bus, bus->new_state);
bus->bus_out |= BUS_REQ;
}
}
if (bus->change_state_delay)
{
bus->change_state_delay--;
if (!bus->change_state_delay)
{
uint8_t val;
scsi_bus_log("Change state delay\n");
SET_BUS_STATE(bus, bus->new_state);
switch (bus->bus_out & SCSI_PHASE_MESSAGE_IN)
{
case SCSI_PHASE_DATA_IN:
lun = (bus->command[1] >> 5) & 7;
dev = &SCSIDevices[bus->dev_id][lun];
scsi_bus_log("Phase data in\n");
bus->state = STATE_DATAIN;
val = dev->CmdBuffer[bus->data_pos++];
bus->bus_out = (bus->bus_out & ~BUS_DATAMASK) | BUS_SETDATA(val) | BUS_DBP;
break;
case SCSI_PHASE_DATA_OUT:
scsi_bus_log("Phase data out\n");
if (bus->new_state & BUS_IDLE)
{
bus->state = STATE_IDLE;
bus->bus_out &= ~BUS_BSY;
}
else
{
bus->state = STATE_DATAOUT;
}
break;
case SCSI_PHASE_STATUS:
scsi_bus_log("Phase status\n");
bus->state = STATE_STATUS;
bus->bus_out |= BUS_REQ;
bus->bus_out = (bus->bus_out & ~BUS_DATAMASK) | BUS_SETDATA(SCSIStatus) | BUS_DBP;
/* scsi_bus_log("SCSI Status (command %02X): %02X (%08X)\n", bus->command[0], SCSIStatus, bus->bus_out); */
break;
case SCSI_PHASE_MESSAGE_IN:
scsi_bus_log("Phase message in\n");
/* scsi_bus_log("Message in\n"); */
bus->state = STATE_MESSAGEIN;
bus->bus_out = (bus->bus_out & ~BUS_DATAMASK) | BUS_SETDATA(0) | BUS_DBP;
break;
default:
fatal("change_state_delay bad state %x\n", bus->bus_out);
bus->new_req_delay = 8;
} else {
bus->bus_out |= BUS_REQ;
}
}
}
if (bus->new_req_delay)
{
bus->new_req_delay--;
if (!bus->new_req_delay)
{
bus->bus_out |= BUS_REQ;
break;
case STATE_STATUS:
scsi_bus_log("State Status\n");
if ((bus_assert & BUS_ACK) && !(bus->bus_in & BUS_ACK)) {
/* scsi_bus_log("Preparing for message in\n"); */
bus->bus_out &= ~BUS_REQ;
bus->new_state = SCSI_PHASE_MESSAGE_IN;
bus->change_state_delay = 4;
bus->new_req_delay = 8;
}
}
return bus->bus_out;
break;
case STATE_MESSAGEIN:
scsi_bus_log("State Message In\n");
if ((bus_assert & BUS_ACK) && !(bus->bus_in & BUS_ACK)) {
bus->bus_out &= ~BUS_REQ;
bus->new_state = BUS_IDLE;
bus->change_state_delay = 4;
}
break;
}
bus->bus_in = bus_assert;
return(bus->bus_out | bus->bus_in);
}
int scsi_bus_match(scsi_bus_t *bus, int bus_assert)
int
scsi_bus_read(scsi_bus_t *bus)
{
return (bus_assert & (BUS_CD | BUS_IO | BUS_MSG)) == (bus->bus_out & (BUS_CD | BUS_IO | BUS_MSG));
scsi_device_t *dev;
uint8_t lun = 0;
if (bus->clear_req) {
bus->clear_req--;
if (!bus->clear_req) {
scsi_bus_log("Clear REQ\n");
SET_BUS_STATE(bus, bus->new_state);
bus->bus_out |= BUS_REQ;
}
}
if (bus->change_state_delay) {
bus->change_state_delay--;
if (!bus->change_state_delay) {
uint8_t val;
scsi_bus_log("Change state delay\n");
SET_BUS_STATE(bus, bus->new_state);
switch (bus->bus_out & SCSI_PHASE_MESSAGE_IN) {
case SCSI_PHASE_DATA_IN:
lun = (bus->command[1] >> 5) & 7;
dev = &SCSIDevices[bus->dev_id][lun];
scsi_bus_log("Phase data in\n");
bus->state = STATE_DATAIN;
val = dev->CmdBuffer[bus->data_pos++];
bus->bus_out = (bus->bus_out & ~BUS_DATAMASK) | BUS_SETDATA(val) | BUS_DBP;
break;
case SCSI_PHASE_DATA_OUT:
scsi_bus_log("Phase data out\n");
if (bus->new_state & BUS_IDLE) {
bus->state = STATE_IDLE;
bus->bus_out &= ~BUS_BSY;
} else {
bus->state = STATE_DATAOUT;
}
break;
case SCSI_PHASE_STATUS:
scsi_bus_log("Phase status\n");
bus->state = STATE_STATUS;
bus->bus_out |= BUS_REQ;
bus->bus_out = (bus->bus_out & ~BUS_DATAMASK) | BUS_SETDATA(SCSIStatus) | BUS_DBP;
/* scsi_bus_log("SCSI Status (command %02X): %02X (%08X)\n", bus->command[0], SCSIStatus, bus->bus_out); */
break;
case SCSI_PHASE_MESSAGE_IN:
scsi_bus_log("Phase message in\n");
/* scsi_bus_log("Message in\n"); */
bus->state = STATE_MESSAGEIN;
bus->bus_out = (bus->bus_out & ~BUS_DATAMASK) | BUS_SETDATA(0) | BUS_DBP;
break;
default:
fatal("change_state_delay bad state %x\n", bus->bus_out);
}
}
}
if (bus->new_req_delay) {
bus->new_req_delay--;
if (!bus->new_req_delay) {
bus->bus_out |= BUS_REQ;
}
}
return(bus->bus_out);
}
int
scsi_bus_match(scsi_bus_t *bus, int bus_assert)
{
return((bus_assert & (BUS_CD | BUS_IO | BUS_MSG)) ==
(bus->bus_out & (BUS_CD | BUS_IO | BUS_MSG)));
}

8
src/scsi/scsi_buslogic.c
View File

@@ -11,7 +11,7 @@
* 1 - BT-545S ISA;
* 2 - BT-958D PCI
*
* Version: @(#)scsi_buslogic.c 1.0.28 2017/11/04
* Version: @(#)scsi_buslogic.c 1.0.29 2017/11/24
*
* Authors: TheCollector1995, <mariogplayer@gmail.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -236,10 +236,12 @@ enum {
CHIP_BUSLOGIC_PCI
};
#ifdef ENABLE_BUSLOGIC_LOG
int buslogic_do_log = ENABLE_BUSLOGIC_LOG;
#endif
static void
buslogic_log(const char *format, ...)
{
@@ -248,9 +250,9 @@ buslogic_log(const char *format, ...)
if (buslogic_do_log) {
va_start(ap, format);
vprintf(format, ap);
vfprintf(stdlog, format, ap);
va_end(ap);
fflush(stdout);
fflush(stdlog);
}
#endif
}

22
src/scsi/scsi_disk.c
View File

@@ -6,7 +6,7 @@
*
* Emulation of SCSI fixed and removable disks.
*
* Version: @(#)scsi_disk.c 1.0.9 2017/11/04
* Version: @(#)scsi_disk.c 1.0.10 2017/11/24
*
* Author: Miran Grca, <mgrca8@gmail.com>
*
@@ -450,21 +450,23 @@ uint8_t scsi_hd_mode_sense_pages_saved[HDD_NUM][0x40][0x40] =
[0x30] = { 0xB0, 0x16, '8', '6', 'B', 'o', 'x', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ', ' ' } }
};
#ifdef ENABLE_SCSI_DISK_LOG
int scsi_hd_do_log = ENABLE_SCSI_DISK_LOG;
#endif
void scsi_hd_log(const char *format, ...)
static void
scsi_hd_log(const char *format, ...)
{
#ifdef ENABLE_SCSI_DISK_LOG
if (scsi_hd_do_log)
{
va_list ap;
va_start(ap, format);
vprintf(format, ap);
va_end(ap);
fflush(stdout);
}
if (scsi_hd_do_log) {
va_list ap;
va_start(ap, format);
vfprintf(stdlog, format, ap);
va_end(ap);
fflush(stdlog);
}
#endif
}

6
src/scsi/scsi_ncr5380.c
View File

@@ -9,7 +9,7 @@
* Implementation of the NCR 5380 series of SCSI Host Adapters
* made by NCR. These controllers were designed for the ISA bus.
*
* Version: @(#)scsi_ncr5380.c 1.0.6 2017/11/04
* Version: @(#)scsi_ncr5380.c 1.0.7 2017/11/24
*
* Authors: Sarah Walker, <tommowalker@tommowalker.co.uk>
* TheCollector1995, <mariogplayer@gmail.com>
@@ -156,9 +156,9 @@ ncr_log(const char *fmt, ...)
if (ncr5380_do_log) {
va_start(ap, fmt);
vprintf(fmt, ap);
vfprintf(stdlog, fmt, ap);
va_end(ap);
fflush(stdout);
fflush(stdlog);
}
#endif
}

181
src/scsi/scsi_x54x.c
View File

@@ -11,7 +11,7 @@
* series of SCSI Host Adapters made by Mylex.
* These controllers were designed for various buses.
*
* Version: @(#)scsi_x54x.c 1.0.5 2017/11/04
* Version: @(#)scsi_x54x.c 1.0.6 2017/11/24
*
* Authors: TheCollector1995, <mariogplayer@gmail.com>
* Miran Grca, <mgrca8@gmail.com>
@@ -81,9 +81,9 @@ x54x_log(const char *fmt, ...)
if (x54x_do_log) {
va_start(ap, fmt);
vprintf(fmt, ap);
vfprintf(stdlog, fmt, ap);
va_end(ap);
fflush(stdout);
fflush(stdlog);
}
#endif
}
@@ -97,39 +97,27 @@ x54x_irq(x54x_t *dev, int set)
if (dev->ven_get_irq)
irq = dev->ven_get_irq(dev);
else
else
irq = dev->Irq;
if (dev->bus & DEVICE_PCI)
{
if (dev->bus & DEVICE_PCI) {
x54x_log("PCI IRQ: %02X, PCI_INTA\n", dev->pci_slot);
if (set)
{
if (set) {
pci_set_irq(dev->pci_slot, PCI_INTA);
}
else
{
} else {
pci_clear_irq(dev->pci_slot, PCI_INTA);
}
}
else
{
if (set)
{
} else {
if (set) {
if (dev->interrupt_type)
int_type = dev->interrupt_type(dev);
if (int_type)
{
if (int_type) {
picintlevel(1 << irq);
}
else
{
} else {
picint(1 << irq);
}
}
else
{
} else {
picintc(1 << irq);
}
}
@@ -323,11 +311,11 @@ x54x_bios_command(x54x_t *x54x, uint8_t max_id, BIOSCMD *cmd, int8_t islba)
else
lba = (cmd->u.chs.cyl << 9) + (cmd->u.chs.head << 5) + cmd->u.chs.sec;
x54x_log("BIOS Command = 0x%02X\n", cmd->command);
x54x_log("BIOS Command = 0x%02X\n", cmd->command);
if ((cmd->id > max_id) || (cmd->lun > 7)) {
x54x_log("BIOS Target ID %i or LUN %i are above maximum\n",
cmd->id, cmd->lun);
cmd->id, cmd->lun);
return(0x80);
}
@@ -350,7 +338,7 @@ x54x_bios_command(x54x_t *x54x, uint8_t max_id, BIOSCMD *cmd, int8_t islba)
dma_address = ADDR_TO_U32(cmd->dma_address);
x54x_log("BIOS Data Buffer write: length %d, pointer 0x%04X\n",
sector_len, dma_address);
sector_len, dma_address);
if (dev->CmdBuffer != NULL) {
free(dev->CmdBuffer);
@@ -628,7 +616,7 @@ x54x_cmd_done(x54x_t *dev, int suppress)
static void
x54x_mbi_setup(x54x_t *dev, uint32_t CCBPointer, CCBU *CmdBlock,
uint8_t HostStatus, uint8_t TargetStatus, uint8_t mbcc)
uint8_t HostStatus, uint8_t TargetStatus, uint8_t mbcc)
{
Req_t *req = &dev->Req;
@@ -655,13 +643,9 @@ x54x_ccb(x54x_t *dev)
DMAPageWrite(req->CCBPointer + 0x000F, (char *)&(req->TargetStatus), 1);
if (dev->MailboxOutInterrupts)
{
dev->ToRaise = INTR_MBOA | INTR_ANY;
}
else
{
else
dev->ToRaise = 0;
}
}
@@ -669,7 +653,7 @@ static void
x54x_mbi(x54x_t *dev)
{
Req_t *req = &dev->Req;
// uint32_t CCBPointer = req->CCBPointer;
// uint32_t CCBPointer = req->CCBPointer;
addr24 CCBPointer;
CCBU *CmdBlock = &(req->CmdBlock);
uint8_t HostStatus = req->HostStatus;
@@ -681,8 +665,8 @@ x54x_mbi(x54x_t *dev)
if (MailboxCompletionCode != MBI_NOT_FOUND) {
CmdBlock->common.HostStatus = HostStatus;
CmdBlock->common.TargetStatus = TargetStatus;
CmdBlock->common.TargetStatus = TargetStatus;
/* Rewrite the CCB up to the CDB. */
x54x_log("CCB statuses rewritten (pointer %08X)\n", req->CCBPointer);
DMAPageWrite(req->CCBPointer + 0x000E, (char *)&(req->HostStatus), 1);
@@ -714,9 +698,7 @@ x54x_mbi(x54x_t *dev)
dev->ToRaise = INTR_MBIF | INTR_ANY;
if (dev->MailboxOutInterrupts)
{
dev->ToRaise |= INTR_MBOA;
}
}
@@ -753,13 +735,13 @@ x54x_get_length(Req_t *req, int Is24bit)
x54x_log("Data length: %08X\n", req->CmdBlock.old.DataLength);
} else {
DataPointer = req->CmdBlock.new.DataPointer;
DataLength = req->CmdBlock.new.DataLength;
DataLength = req->CmdBlock.new.DataLength;
}
x54x_log("Data Buffer write: length %d, pointer 0x%04X\n",
DataLength, DataPointer);
DataLength, DataPointer);
if (!DataLength)
return 0;
return(0);
if (req->CmdBlock.common.ControlByte != 0x03) {
if (req->CmdBlock.common.Opcode == SCATTER_GATHER_COMMAND ||
@@ -769,15 +751,15 @@ x54x_get_length(Req_t *req, int Is24bit)
DataToTransfer += SGBuffer.Segment;
}
return DataToTransfer;
return(DataToTransfer);
} else if (req->CmdBlock.common.Opcode == SCSI_INITIATOR_COMMAND ||
req->CmdBlock.common.Opcode == SCSI_INITIATOR_COMMAND_RES) {
return DataLength;
return(DataLength);
} else {
return 0;
return(0);
}
} else {
return 0;
return(0);
}
}
@@ -829,10 +811,10 @@ x54x_buf_dma_transfer(Req_t *req, int Is24bit, int TransferLength, int dir)
DataLength = ADDR_TO_U32(req->CmdBlock.old.DataLength);
} else {
DataPointer = req->CmdBlock.new.DataPointer;
DataLength = req->CmdBlock.new.DataLength;
DataLength = req->CmdBlock.new.DataLength;
}
x54x_log("Data Buffer %s: length %d, pointer 0x%04X\n",
dir ? "write" : "read", BufLen, DataPointer);
dir ? "write" : "read", BufLen, DataPointer);
if ((req->CmdBlock.common.ControlByte != 0x03) && TransferLength && BufLen) {
if ((req->CmdBlock.common.Opcode == SCATTER_GATHER_COMMAND) ||
@@ -873,13 +855,9 @@ x54x_buf_dma_transfer(Req_t *req, int Is24bit, int TransferLength, int dir)
Address = DataPointer;
if ((DataLength > 0) && (BufLen > 0) && (req->CmdBlock.common.ControlByte < 0x03)) {
if (read_from_host)
{
if (read_from_host) {
DMAPageRead(Address, (char *)SCSIDevices[req->TargetID][req->LUN].CmdBuffer, MIN(BufLen, DataLength));
}
else
if (write_to_host)
{
} else if (write_to_host) {
DMAPageWrite(Address, (char *)SCSIDevices[req->TargetID][req->LUN].CmdBuffer, MIN(BufLen, DataLength));
}
}
@@ -939,7 +917,7 @@ SenseBufferPointer(Req_t *req)
SenseBufferAddress = req->CmdBlock.new.SensePointer;
}
return SenseBufferAddress;
return(SenseBufferAddress);
}
@@ -1005,7 +983,7 @@ x54x_scsi_cmd(x54x_t *dev)
memset(temp_cdb, 0x00, target_cdb_len);
if (req->CmdBlock.common.CdbLength <= target_cdb_len) {
memcpy(temp_cdb, req->CmdBlock.common.Cdb,
req->CmdBlock.common.CdbLength);
req->CmdBlock.common.CdbLength);
} else {
memcpy(temp_cdb, req->CmdBlock.common.Cdb, target_cdb_len);
}
@@ -1071,14 +1049,10 @@ x54x_scsi_cmd(x54x_t *dev)
static void
x54x_notify(x54x_t *dev)
{
if (dev->MailboxIsBIOS)
{
x54x_ccb(dev);
}
else
{
x54x_mbi(dev);
}
if (dev->MailboxIsBIOS)
x54x_ccb(dev);
else
x54x_mbi(dev);
}
@@ -1107,8 +1081,8 @@ x54x_req_setup(x54x_t *dev, uint32_t CCBPointer, Mailbox32_t *Mailbox32)
x54x_notify(dev);
return;
}
x54x_log("Scanning SCSI Target ID %i\n", id);
x54x_log("Scanning SCSI Target ID %i\n", id);
SCSIStatus = SCSI_STATUS_OK;
@@ -1201,7 +1175,7 @@ x54x_mbo(x54x_t *dev, Mailbox32_t *Mailbox32)
} else {
Outgoing = Addr + (Cur * sizeof(Mailbox32_t));
DMAPageRead(Outgoing, (char *)Mailbox32, sizeof(Mailbox32_t));
DMAPageRead(Outgoing, (char *)Mailbox32, sizeof(Mailbox32_t));
}
return(Outgoing);
@@ -1235,23 +1209,22 @@ x54x_mbo_process(x54x_t *dev)
x54x_log("x54x_do_mail(): Writing %i bytes at %08X\n", sizeof(CmdStatus), Outgoing + CodeOffset);
DMAPageWrite(Outgoing + CodeOffset, (char *)&CmdStatus, 1);
if (dev->ToRaise)
{
if (dev->ToRaise) {
raise_irq(dev, 0, dev->ToRaise);
while (dev->Interrupt) {
}
while (dev->Interrupt)
;
}
if (dev->MailboxIsBIOS)
dev->BIOSMailboxReq--;
else
else
dev->MailboxReq--;
return 1;
return(1);
}
return 0;
return(0);
}
@@ -1313,8 +1286,7 @@ x54x_cmd_thread(void *priv)
x54x_log("Polling thread started\n");
while (x54x_dev)
{
while (x54x_dev) {
scsi_mutex_wait(1);
if ((dev->Status & STAT_INIT) || (!dev->MailboxInit && !dev->BIOSMailboxInit) || (!dev->MailboxReq && !dev->BIOSMailboxReq)) {
@@ -1325,8 +1297,7 @@ x54x_cmd_thread(void *priv)
continue;
}
if (!(x54x_dev->Status & STAT_INIT) && x54x_dev->MailboxInit && dev->MailboxReq)
{
if (!(x54x_dev->Status & STAT_INIT) && x54x_dev->MailboxInit && dev->MailboxReq) {
x54x_wait_for_poll();
x54x_do_mail(dev);
@@ -1365,14 +1336,14 @@ x54x_thread_start(x54x_t *dev)
uint8_t
x54x_is_busy(void)
{
return !!busy;
return(!!busy);
}
void
x54x_set_wait_event(void)
{
thread_set_event((event_t *) wait_evt);
thread_set_event((event_t *)wait_evt);
}
@@ -1387,7 +1358,7 @@ x54x_in(uint16_t port, void *priv)
default:
ret = dev->Status;
break;
case 1:
ret = dev->DataBuf[dev->DataReply];
if (dev->DataReplyLeft) {
@@ -1397,11 +1368,11 @@ x54x_in(uint16_t port, void *priv)
x54x_cmd_done(dev, 0);
}
break;
case 2:
ret = dev->Interrupt;
break;
case 3:
ret = dev->Geometry;
break;
@@ -1417,35 +1388,35 @@ x54x_in(uint16_t port, void *priv)
static uint16_t
x54x_inw(uint16_t port, void *priv)
{
return (uint16_t) x54x_in(port, priv);
return((uint16_t) x54x_in(port, priv));
}
static uint32_t
x54x_inl(uint16_t port, void *priv)
{
return (uint32_t) x54x_in(port, priv);
return((uint32_t) x54x_in(port, priv));
}
static uint8_t
x54x_read(uint32_t port, void *priv)
{
return x54x_in(port & 3, priv);
return(x54x_in(port & 3, priv));
}
static uint16_t
x54x_readw(uint32_t port, void *priv)
{
return x54x_inw(port & 3, priv);
return(x54x_inw(port & 3, priv));
}
static uint32_t
x54x_readl(uint32_t port, void *priv)
{
return x54x_inl(port & 3, priv);
return(x54x_inl(port & 3, priv));
}
@@ -1531,7 +1502,7 @@ x54x_out(uint16_t port, uint8_t val, void *priv)
x54x_busy(0);
break;
}
if (val & CTRL_IRST) {
x54x_busy(1);
clear_irq(dev);
@@ -1561,14 +1532,14 @@ x54x_out(uint16_t port, uint8_t val, void *priv)
dev->Command = val;
dev->CmdParam = 0;
dev->CmdParamLeft = 0;
dev->Status &= ~(STAT_INVCMD | STAT_IDLE);
x54x_log("%s: Operation Code 0x%02X\n", dev->name, val);
switch (dev->Command) {
case CMD_MBINIT:
dev->CmdParamLeft = sizeof(MailboxInit_t);
break;
case CMD_BIOSCMD:
dev->CmdParamLeft = 10;
break;
@@ -1616,14 +1587,14 @@ x54x_out(uint16_t port, uint8_t val, void *priv)
case CMD_MBINIT: /* mailbox initialization */
x54x_busy(1);
dev->Mbx24bit = 1;
mbi = (MailboxInit_t *)dev->CmdBuf;
dev->MailboxInit = 1;
dev->MailboxCount = mbi->Count;
dev->MailboxOutAddr = ADDR_TO_U32(mbi->Address);
dev->MailboxInAddr = dev->MailboxOutAddr + (dev->MailboxCount * sizeof(Mailbox_t));
x54x_log("Initialize Mailbox: MBO=0x%08lx, MBI=0x%08lx, %d entries at 0x%08lx\n",
dev->MailboxOutAddr,
dev->MailboxInAddr,
@@ -1641,7 +1612,7 @@ x54x_out(uint16_t port, uint8_t val, void *priv)
if (!(dev->bus & DEVICE_MCA)) {
/* 1640 uses LBA. */
cyl = ((cmd->u.chs.cyl & 0xff) << 8) | ((cmd->u.chs.cyl >> 8) & 0xff);
cmd->u.chs.cyl = cyl;
cmd->u.chs.cyl = cyl;
}
if (dev->bus & DEVICE_MCA) {
/* 1640 uses LBA. */
@@ -1681,19 +1652,19 @@ x54x_out(uint16_t port, uint8_t val, void *priv)
case CMD_SELTIMEOUT: /* Selection Time-out */
dev->DataReplyLeft = 0;
break;
case CMD_BUSON_TIME: /* bus-on time */
dev->BusOnTime = dev->CmdBuf[0];
dev->DataReplyLeft = 0;
x54x_log("Bus-on time: %d\n", dev->CmdBuf[0]);
break;
case CMD_BUSOFF_TIME: /* bus-off time */
dev->BusOffTime = dev->CmdBuf[0];
dev->DataReplyLeft = 0;
x54x_log("Bus-off time: %d\n", dev->CmdBuf[0]);
break;
case CMD_DMASPEED: /* DMA Transfer Rate */
dev->ATBusSpeed = dev->CmdBuf[0];
dev->DataReplyLeft = 0;
@@ -1718,7 +1689,7 @@ x54x_out(uint16_t port, uint8_t val, void *priv)
}
}
dev->DataReplyLeft = i;
break;
break;
case CMD_RETCONF: /* return Configuration */
if (dev->ven_get_dma)
@@ -1762,7 +1733,7 @@ x54x_out(uint16_t port, uint8_t val, void *priv)
x54x_log("Return Setup Information: %d (length: %i)\n", dev->CmdBuf[0], sizeof(ReplyInquireSetupInformation));
}
break;
case CMD_ECHO: /* ECHO data */
dev->DataBuf[0] = dev->CmdBuf[0];
dev->DataReplyLeft = 1;
@@ -1804,18 +1775,18 @@ x54x_out(uint16_t port, uint8_t val, void *priv)
break;
}
}
if (dev->DataReplyLeft)
dev->Status |= STAT_DFULL;
else if (!dev->CmdParamLeft)
x54x_cmd_done(dev, suppress);
break;
case 2:
if (dev->int_geom_writable)
dev->Interrupt = val;
break;
case 3:
if (dev->int_geom_writable)
dev->Geometry = val;
@@ -1941,8 +1912,7 @@ x54x_mem_enable(x54x_t *dev)
void
x54x_mem_set_addr(x54x_t *dev, uint32_t base)
{
mem_mapping_set_addr(&dev->mmio_mapping,
base, 0x20);
mem_mapping_set_addr(&dev->mmio_mapping, base, 0x20);
}
@@ -1992,8 +1962,7 @@ x54x_close(void *priv)
{
x54x_t *dev = (x54x_t *)priv;
if (dev)
{
if (dev) {
x54x_dev = NULL;
/* Tell the thread to terminate. */

1840
src/sound/snd_audiopci.c
View File

File diff suppressed because it is too large Load Diff

21
src/sound/snd_emu8k.c
View File

@@ -15,6 +15,7 @@
#include "sound.h"
#include "snd_emu8k.h"
#if !defined FILTER_INITIAL && !defined FILTER_MOOG && !defined FILTER_CONSTANT
//#define FILTER_INITIAL
#define FILTER_MOOG
@@ -295,20 +296,22 @@ uint32_t rep_count_w = 0;
int emu8k_do_log = ENABLE_EMU8K_LOG;
#endif
void emu8k_log(const char *format, ...)
static void
emu8k_log(const char *format, ...)
{
#ifdef ENABLE_EMU8K_LOG
if (emu8k_do_log)
{
va_list ap;
va_start(ap, format);
vprintf(format, ap);
va_end(ap);
fflush(stdout);
}
if (emu8k_do_log) {
va_list ap;
va_start(ap, format);
vfprintf(stdlog, format, ap);
va_end(ap);
fflush(stdlog);
}
#endif
}
static inline int16_t EMU8K_READ(emu8k_t *emu8k, uint32_t addr)
{
const register emu8k_mem_pointers_t addrmem = {{addr}};

58
src/win/win_cdrom_ioctl.c
View File

@@ -9,7 +9,7 @@
* Implementation of the CD-ROM host drive IOCTL interface for
* Windows using SCSI Passthrough Direct.
*
* Version: @(#)cdrom_ioctl.c 1.0.7 2017/11/04
* Version: @(#)cdrom_ioctl.c 1.0.8 2017/11/24
*
* Authors: Sarah Walker, <http://pcem-emulator.co.uk/>
* Miran Grca, <mgrca8@gmail.com>
@@ -36,38 +36,40 @@
#define MSFtoLBA(m,s,f) ((((m*60)+s)*75)+f)
enum {
CD_STOPPED = 0,
CD_PLAYING,
CD_PAUSED
};
typedef struct {
HANDLE hIOCTL;
CDROM_TOC toc;
int is_playing;
} cdrom_ioctl_windows_t;
cdrom_ioctl_windows_t cdrom_ioctl_windows[CDROM_NUM];
#ifdef ENABLE_CDROM_LOG
int cdrom_ioctl_do_log = ENABLE_CDROM_LOG;
#endif
static CDROM ioctl_cdrom;
typedef struct
{
HANDLE hIOCTL;
CDROM_TOC toc;
int is_playing;
} cdrom_ioctl_windows_t;
cdrom_ioctl_windows_t cdrom_ioctl_windows[CDROM_NUM];
enum
{
CD_STOPPED = 0,
CD_PLAYING,
CD_PAUSED
};
int cdrom_ioctl_do_log = 0;
void cdrom_ioctl_log(const char *format, ...)
static void
cdrom_ioctl_log(const char *format, ...)
{
#ifdef ENABLE_CDROM_LOG
if (cdrom_ioctl_do_log)
{
va_list ap;
va_start(ap, format);
vprintf(format, ap);
va_end(ap);
fflush(stdout);
}
if (cdrom_ioctl_do_log) {
va_list ap;
va_start(ap, format);
vfprintf(stdlog, format, ap);
va_end(ap);
fflush(stdstdlog);
}
#endif
}