Fix the timers...but they run slow.

This commit is contained in:
starfrost013
2024-12-20 21:20:03 +00:00
parent a1a15a83d4
commit d2d08d16c1
4 changed files with 27 additions and 10 deletions

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@@ -100,8 +100,10 @@ typedef struct nv_base_s
uint32_t gpu_revision; // GPU Stepping
double pixel_clock_period; // Period in seconds for pixel clock
pc_timer_t pixel_clock_timer; // Pixel Clock Timer
bool pixel_clock_enabled; // Pixel Clock Enabled - stupid crap used to prevent us enabling the timer multiple times
double memory_clock_period; // Period in seconds for pixel clock
pc_timer_t memory_clock_timer; // Memory Clock Timer
bool memory_clock_enabled; // Memory Clock Enabled - stupid crap used to prevent us eanbling the timer multiple times
} nv_base_t;
#define NV_REG_LIST_END 0xD15EA5E

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@@ -29,7 +29,7 @@ extern const device_config_t nv3_config[];
#define NV3_LFB_RAMIN_START 0xC00000 // RAMIN mapping start
#define NV3_LFB_MAPPING_SIZE 0x400000 // Size of RAMIN
#define NV3_86BOX_TIMER_SYSTEM_FIX_QUOTIENT 100 // The amount by which we have to ration out the memory clock because it's not fast enough...
#define NV3_86BOX_TIMER_SYSTEM_FIX_QUOTIENT 1000 // The amount by which we have to ration out the memory clock because it's not fast enough...
// Multiply by this value to get the real clock speed.
// various vbioses for testing

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@@ -346,6 +346,7 @@ void nv3_close(void* priv)
{
svga_close(&nv3->nvbase.svga);
free(nv3);
nv3 = NULL;
}

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@@ -53,17 +53,20 @@ void nv3_pramdac_init()
// This updates the 2D/3D engine PGRAPH
void nv3_pramdac_pixel_clock_poll(void* priv)
{
timer_on_auto(&nv3->nvbase.pixel_clock_timer, nv3->nvbase.pixel_clock_period);
nv3_t* nv3_poll = (nv3_t*)priv;
timer_on_auto(&nv3_poll->nvbase.pixel_clock_timer, nv3_poll->nvbase.pixel_clock_period);
}
// Polls the memory clock.
void nv3_pramdac_memory_clock_poll(void* poll)
void nv3_pramdac_memory_clock_poll(void* priv)
{
nv3_t* nv3_poll = (nv3_t*)priv;
// Let's hope qeeg was right here.
nv3_ptimer_tick();
timer_on_auto(&nv3->nvbase.memory_clock_timer, nv3->nvbase.memory_clock_period);
timer_on_auto(&nv3_poll->nvbase.memory_clock_timer, nv3_poll->nvbase.memory_clock_period);
}
// Gets the vram clock register.
@@ -110,15 +113,21 @@ void nv3_pramdac_set_vram_clock()
// prevent division by 0
if (nv3->pramdac.memory_clock_m == 0)
nv3->pramdac.memory_clock_m == 1;
else
frequency = (frequency * nv3->pramdac.memory_clock_n) / (nv3->pramdac.memory_clock_m << nv3->pramdac.memory_clock_p);
nv3->pramdac.memory_clock_m = 1;
if (nv3->pramdac.memory_clock_n == 0)
nv3->pramdac.memory_clock_n = 1;
frequency = (frequency * nv3->pramdac.memory_clock_n) / (nv3->pramdac.memory_clock_m << nv3->pramdac.memory_clock_p);
double time = (1000000.0 * NV3_86BOX_TIMER_SYSTEM_FIX_QUOTIENT) / (double)frequency; // needs to be a double for 86box
nv_log("NV3: Memory clock = %.2f MHz\n", frequency / 1000000.0f);
nv3->nvbase.memory_clock_period = time;
timer_on_auto(&nv3->nvbase.memory_clock_timer, nv3->nvbase.memory_clock_period);
//Breaks everything?
//timer_set_delay_u64(&nv3->nvbase.memory_clock_timer, time * TIMER_USEC); // do we need to decrease
}
@@ -146,9 +155,12 @@ void nv3_pramdac_set_pixel_clock()
// prevent division by 0
if (nv3->pramdac.pixel_clock_m == 0)
nv3->pramdac.pixel_clock_m == 1;
else
frequency = (frequency * nv3->pramdac.pixel_clock_n) / (nv3->pramdac.pixel_clock_m << nv3->pramdac.pixel_clock_p);
nv3->pramdac.pixel_clock_m = 1;
if (nv3->pramdac.memory_clock_n == 0)
nv3->pramdac.memory_clock_n = 1;
frequency = (frequency * nv3->pramdac.pixel_clock_n) / (nv3->pramdac.pixel_clock_m << nv3->pramdac.pixel_clock_p);
nv3->nvbase.svga.clock = cpuclock / frequency;
@@ -157,6 +169,8 @@ void nv3_pramdac_set_pixel_clock()
nv_log("NV3: Pixel clock = %.2f MHz\n", frequency / 1000000.0f);
nv3->nvbase.pixel_clock_period = time;
timer_on_auto(&nv3->nvbase.pixel_clock_timer, nv3->nvbase.pixel_clock_period);
//Breaks everything?
//timer_set_delay_u64(&nv3->nvbase.pixel_clock_timer, time * TIMER_USEC); // do we need to decrease
}