Merge branch '86Box:master' into main

2026-02-24 10:28:19 -07:00 · 2024-10-15 16:38:51 +07:00
parent fcba1d5526 9fb32aaa09
commit dd02164df6
53 changed files with 2533 additions and 1447 deletions
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -36,7 +36,7 @@ if(MUNT_EXTERNAL)
 endif()

 project(86Box
-    VERSION 4.3
+    VERSION 4.2.2
    DESCRIPTION "Emulator of x86-based systems"
    HOMEPAGE_URL "https://86box.net"
    LANGUAGES C CXX)
@@ -147,6 +147,10 @@ else()
    option(CPPTHREADS "C++11 threads" ON)
 endif()

+if(CMAKE_SYSTEM_NAME STREQUAL "OpenBSD")
+    SET(CMAKE_EXE_LINKER_FLAGS "-Wl,-z,wxneeded")
+endif()
+
 # Development branch features
 #
 #                      Option         Description                                Def.  Condition     Otherwise
--- a/debian/changelog
+++ b/debian/changelog
@@ -1,5 +1,5 @@
-86box (4.3) UNRELEASED; urgency=medium
+86box (4.2.2) UNRELEASED; urgency=medium

  * Bump release.

- -- Jasmine Iwanek <jriwanek@gmail.com>  Mon, 02 Sep 2024 00:16:28 +0200
+ -- Jasmine Iwanek <jriwanek@gmail.com>  Sat, 28 Sep 2024 18:31:57 +0200
--- a/src/chipset/intel_piix.c
+++ b/src/chipset/intel_piix.c
@@ -599,9 +599,9 @@ piix_write(int func, int addr, uint8_t val, void *priv)
                        pci_set_mirq_routing(PCI_MIRQ0 + (addr & 0x01), val & 0xf);
                    if (dev->type == 3) {
                        if (val & 0x20)
-                            sff_set_irq_mode(dev->bm[1], IRQ_MODE_MIRQ_0);
-                        else
                            sff_set_irq_mode(dev->bm[1], IRQ_MODE_LEGACY);
+                        else
+                            sff_set_irq_mode(dev->bm[1], IRQ_MODE_MIRQ_0);
                    }
                    piix_log("MIRQ%i is %s\n", addr & 0x01, (val & 0x20) ? "disabled" : "enabled");
                }
--- a/src/chipset/umc_8886.c
+++ b/src/chipset/umc_8886.c
@@ -126,10 +126,10 @@ umc_8886_ide_handler(umc_8886_t *dev)
    ide_sec_disable();

    if (dev->pci_conf_sb[1][0x04] & 0x01) {
-        if (dev->pci_conf_sb[1][0x40] & 0x80)
+        if (dev->pci_conf_sb[1][0x41] & 0x80)
            ide_pri_enable();

-        if (dev->pci_conf_sb[1][0x40] & 0x40)
+        if (dev->pci_conf_sb[1][0x41] & 0x40)
            ide_sec_enable();
    }
 }
@@ -170,20 +170,20 @@ umc_8886_irq_recalc(umc_8886_t *dev)
    int irq_routing;
    uint8_t *conf = dev->pci_conf_sb[0];

-    irq_routing = (conf[0x46] & 0x01) ? (conf[0x43] >> 8) : PCI_IRQ_DISABLED;
+    irq_routing = (conf[0x46] & 0x01) ? (conf[0x43] >> 4) : PCI_IRQ_DISABLED;
    pci_set_irq_routing(PCI_INTA, irq_routing);
    irq_routing = (conf[0x46] & 0x02) ? (conf[0x43] & 0x0f) : PCI_IRQ_DISABLED;
    pci_set_irq_routing(PCI_INTB, irq_routing);

-    irq_routing = (conf[0x46] & 0x04) ? (conf[0x44] >> 8) : PCI_IRQ_DISABLED;
+    irq_routing = (conf[0x46] & 0x04) ? (conf[0x44] >> 4) : PCI_IRQ_DISABLED;
    pci_set_irq_routing(PCI_INTC, irq_routing);
    irq_routing = (conf[0x46] & 0x08) ? (conf[0x44] & 0x0f) : PCI_IRQ_DISABLED;
    pci_set_irq_routing(PCI_INTD, irq_routing);

-    pci_set_irq_level(PCI_INTA, !(conf[0x47] & 0x01));
-    pci_set_irq_level(PCI_INTB, !(conf[0x47] & 0x02));
-    pci_set_irq_level(PCI_INTC, !(conf[0x47] & 0x04));
-    pci_set_irq_level(PCI_INTD, !(conf[0x47] & 0x08));
+    pci_set_irq_level(PCI_INTA, (conf[0x47] & 0x01));
+    pci_set_irq_level(PCI_INTB, (conf[0x47] & 0x02));
+    pci_set_irq_level(PCI_INTC, (conf[0x47] & 0x04));
+    pci_set_irq_level(PCI_INTD, (conf[0x47] & 0x08));
 }

 static void
@@ -204,7 +204,7 @@ umc_8886_write(int func, int addr, uint8_t val, void *priv)
                    case 0x50 ... 0x55:
                    case 0x57:
                    case 0x70 ... 0x76:
-                    case 0x80 ... 0x82:
+                    case 0x80 ... 0x83:
                    case 0x90 ... 0x92:
                    case 0xa0 ... 0xa1:
                    case 0xa5 ... 0xa8:
@@ -270,13 +270,13 @@ umc_8886_write(int func, int addr, uint8_t val, void *priv)
                        break;

                    case 0x3c:
-                    case 0x41 ... 0x4b:
-                    case 0x54 ... 0x59:
+                    case 0x40:
+                    case 0x42 ... 0x59:
                        if (dev->ide_id == 0x673a)
                            dev->pci_conf_sb[func][addr] = val;
                        break;

-                    case 0x40:
+                    case 0x41:
                        if (dev->ide_id == 0x673a) {
                            dev->pci_conf_sb[func][addr] = val;
                            umc_8886_ide_handler(dev);
@@ -322,25 +322,17 @@ umc_8886_reset(void *priv)
    dev->pci_conf_sb[0][0x09] = 0x00;
    dev->pci_conf_sb[0][0x0a] = 0x01;
    dev->pci_conf_sb[0][0x0b] = 0x06;
+
    dev->pci_conf_sb[0][0x40] = 0x01;
-    dev->pci_conf_sb[0][0x41] = 0x06;
+    dev->pci_conf_sb[0][0x41] = 0x04;
    dev->pci_conf_sb[0][0x42] = 0x08;
-    dev->pci_conf_sb[0][0x43] = 0x00;
-    dev->pci_conf_sb[0][0x44] = 0x00;
-    dev->pci_conf_sb[0][0x45] = 0x04;
-    dev->pci_conf_sb[0][0x46] = 0x00;
-    dev->pci_conf_sb[0][0x47] = 0x40;
-    dev->pci_conf_sb[0][0x50] = 0x01;
-    dev->pci_conf_sb[0][0x51] = 0x03;
-    dev->pci_conf_sb[0][0x56] = dev->pci_conf_sb[0][0x57] = 0x00;
-    dev->pci_conf_sb[0][0x70] = dev->pci_conf_sb[0][0x71] = 0x00;
-    dev->pci_conf_sb[0][0x72] = dev->pci_conf_sb[0][0x73] = 0x00;
-    dev->pci_conf_sb[0][0x74] = dev->pci_conf_sb[0][0x76] = 0x00;
-    dev->pci_conf_sb[0][0x82] = 0x00;
-    dev->pci_conf_sb[0][0x90] = dev->pci_conf_sb[0][0x91] = 0x00;
-    dev->pci_conf_sb[0][0xa0] = dev->pci_conf_sb[0][0xa2] = 0x00;
-    dev->pci_conf_sb[0][0xa4] = 0x00;
-    dev->pci_conf_sb[0][0xa8] = 0x20;
+    dev->pci_conf_sb[0][0x43] = 0x9a;
+    dev->pci_conf_sb[0][0x44] = 0xbc;
+    dev->pci_conf_sb[0][0x45] = 0x00;
+    dev->pci_conf_sb[0][0x46] = 0x10;
+    dev->pci_conf_sb[0][0x47] = 0x30;
+
+    dev->pci_conf_sb[0][0x51] = 0x02;

    if (dev->has_ide) {
        dev->pci_conf_sb[1][0x00] = 0x60; /* UMC */
@@ -363,13 +355,15 @@ umc_8886_reset(void *priv)
        dev->pci_conf_sb[1][0x21] = 0x10;

        if (dev->ide_id == 0x673a) {
-            dev->pci_conf_sb[1][0x40] = 0xc0;
-            dev->pci_conf_sb[1][0x41] = 0x00;
+            dev->pci_conf_sb[1][0x40] = 0x00;
+            dev->pci_conf_sb[1][0x41] = 0xc0;
            dev->pci_conf_sb[1][0x42] = dev->pci_conf_sb[1][0x43] = 0x00;
            dev->pci_conf_sb[1][0x44] = dev->pci_conf_sb[1][0x45] = 0x00;
            dev->pci_conf_sb[1][0x46] = dev->pci_conf_sb[1][0x47] = 0x00;
-            dev->pci_conf_sb[1][0x48] = dev->pci_conf_sb[1][0x49] = 0x00;
-            dev->pci_conf_sb[1][0x4a] = dev->pci_conf_sb[1][0x4b] = 0x00;
+            dev->pci_conf_sb[1][0x48] = dev->pci_conf_sb[1][0x49] = 0x55;
+            dev->pci_conf_sb[1][0x4a] = dev->pci_conf_sb[1][0x4b] = 0x55;
+            dev->pci_conf_sb[1][0x4c] = dev->pci_conf_sb[1][0x4d] = 0x88;
+            dev->pci_conf_sb[1][0x4e] = dev->pci_conf_sb[1][0x4f] = 0xaa;
            dev->pci_conf_sb[1][0x54] = dev->pci_conf_sb[1][0x55] = 0x00;
            dev->pci_conf_sb[1][0x56] = dev->pci_conf_sb[1][0x57] = 0x00;
            dev->pci_conf_sb[1][0x58] = dev->pci_conf_sb[1][0x59] = 0x00;
--- a/src/chipset/umc_hb4.c
+++ b/src/chipset/umc_hb4.c
@@ -136,6 +136,9 @@ hb4_log(const char *fmt, ...)
 #endif

 typedef struct hb4_t {
+    uint8_t idx;
+    uint8_t access_data;
+
    uint8_t  pci_slot;

    uint8_t  pci_conf[256]; /* PCI Registers */
@@ -176,7 +179,9 @@ hb4_shadow_bios_low(hb4_t *dev)
    int state;

    /* Erratum in Vogons' datasheet: Register 55h bit 7 in fact controls E0000-FFFFF. */
-    state = shadow_bios[dev->pci_conf[0x55] >> 6];
+    state  = (dev->pci_conf[0x55] & 0x80) ? shadow_read[dev->pci_conf[0x54] & 0x01] :
+                                            MEM_READ_EXTANY;
+    state |= shadow_write[(dev->pci_conf[0x55] >> 6) & 0x01];

    if (state != dev->mem_state[7]) {
        mem_set_mem_state_both(0xe0000, 0x10000, state);
@@ -194,8 +199,9 @@ hb4_shadow_main(hb4_t *dev)
    int n = 0;

    for (uint8_t i = 0; i < 6; i++) {
-        state = shadow_read[(dev->pci_conf[0x54] >> (i + 2)) & 0x01] |
-                shadow_write[(dev->pci_conf[0x55] >> 6) & 0x01];
+        state  = (dev->pci_conf[0x55] & 0x80) ? shadow_read[(dev->pci_conf[0x54] >> (i + 2)) & 0x01] :
+                                                MEM_READ_EXTANY;
+        state |= shadow_write[(dev->pci_conf[0x55] >> 6) & 0x01];

        if (state != dev->mem_state[i + 1]) {
            n++;
@@ -212,8 +218,9 @@ hb4_shadow_video(hb4_t *dev)
 {
    int state;

-    state = shadow_read[(dev->pci_conf[0x54] >> 1) & 0x01] |
-            shadow_write[(dev->pci_conf[0x55] >> 6) & 0x01];
+    state  = (dev->pci_conf[0x55] & 0x80) ? shadow_read[(dev->pci_conf[0x54] >> 1) & 0x01] :
+                                            MEM_READ_EXTANY;
+    state |= shadow_write[(dev->pci_conf[0x55] >> 6) & 0x01];

    if (state != dev->mem_state[0]) {
        mem_set_mem_state_both(0xc0000, 0x8000, state);
@@ -302,7 +309,7 @@ hb4_write(UNUSED(int func), int addr, uint8_t val, void *priv)
            hb4_shadow(dev);
            break;

-        case 0x56 ... 0x5b:
+        case 0x56 ... 0x5a:
        case 0x5e ... 0x5f:
            dev->pci_conf[addr] = val;
            break;
@@ -313,10 +320,14 @@ hb4_write(UNUSED(int func), int addr, uint8_t val, void *priv)
            hb4_smram(dev);
            break;

-        case 0x61 ... 0x62:
+        case 0x61:
            dev->pci_conf[addr] = val;
            break;

+        case 0x62:
+            dev->pci_conf[addr] = val & 0x03;
+            break;
+
        default:
            break;
    }
@@ -354,14 +365,16 @@ hb4_reset(void *priv)
    dev->pci_conf[0x52] = 0x01;
    dev->pci_conf[0x53] = 0x00;
    dev->pci_conf[0x54] = 0x00;
-    dev->pci_conf[0x55] = 0x00;
-    dev->pci_conf[0x56] = 0x00;
-    dev->pci_conf[0x57] = 0x00;
-    dev->pci_conf[0x58] = 0x00;
-    dev->pci_conf[0x59] = 0x00;
-    dev->pci_conf[0x5a] = 0x04;
+    dev->pci_conf[0x55] = 0x40;
+    dev->pci_conf[0x56] = 0xff;
+    dev->pci_conf[0x57] = 0x0f;
+    dev->pci_conf[0x58] = 0xff;
+    dev->pci_conf[0x59] = 0x0f;
+    dev->pci_conf[0x5a] = 0x00;
+    dev->pci_conf[0x5b] = 0x2c;
    dev->pci_conf[0x5c] = 0x00;
-    dev->pci_conf[0x5d] = 0x20;
+    dev->pci_conf[0x5d] = 0x0f;
+    dev->pci_conf[0x5e] = 0x00;
    dev->pci_conf[0x5f] = 0xff;
    dev->pci_conf[0x60] = 0x00;
    dev->pci_conf[0x61] = 0x00;
@@ -385,6 +398,55 @@ hb4_close(void *priv)
    free(dev);
 }

+static void
+ims8848_write(uint16_t addr, uint8_t val, void *priv)
+{
+    hb4_t     *dev = (hb4_t *) priv;
+
+    switch (addr) {
+        case 0x22:
+            dev->idx = val;
+            break;
+        case 0x23:
+            if (((val & 0x0f) == ((dev->idx >> 4) & 0x0f)) && ((val & 0xf0) == ((dev->idx << 4) & 0xf0)))
+                dev->access_data = 1;
+            break;
+        case 0x24:
+            if (dev->access_data)
+                dev->access_data = 0;
+            break;
+
+            default:
+                break;
+    }
+}
+
+static uint8_t
+ims8848_read(uint16_t addr, void *priv)
+{
+    uint8_t    ret = 0xff;
+    hb4_t     *dev = (hb4_t *) priv;
+
+    switch (addr) {
+        case 0x22:
+            ret = dev->idx;
+            break;
+        case 0x23:
+            ret = (dev->idx >> 4) | (dev->idx << 4);
+            break;
+        case 0x24:
+            if (dev->access_data) {
+                ret              = dev->pci_conf[dev->idx];
+                dev->access_data = 0;
+            }
+            break;
+        default:
+            break;
+    }
+
+    return ret;
+}
+
 static void *
 hb4_init(UNUSED(const device_t *info))
 {
@@ -402,6 +464,8 @@ hb4_init(UNUSED(const device_t *info))
    dev->smram_base = 0x000a0000;
    hb4_reset(dev);

+    io_sethandler(0x0022, 0x0003, ims8848_read, NULL, NULL, ims8848_write, NULL, NULL, dev);
+
    return dev;
 }

--- a/src/cpu/cpu.c
+++ b/src/cpu/cpu.c
@@ -3300,26 +3300,17 @@ pentium_invalid_rdmsr:
                    break;
                /* SYSENTER_CS - SYSENTER target CS */
                case 0x174:
-                    if (cpu_s->cpu_type == CPU_PENTIUMPRO)
-                        goto i686_invalid_rdmsr;
-
                    EAX &= 0xffff0000;
                    EAX |= msr.sysenter_cs;
                    EDX = 0x00000000;
                    break;
                /* SYSENTER_ESP - SYSENTER target ESP */
                case 0x175:
-                    if (cpu_s->cpu_type == CPU_PENTIUMPRO)
-                        goto i686_invalid_rdmsr;
-
                    EAX = msr.sysenter_esp;
                    EDX = 0x00000000;
                    break;
                /* SYSENTER_EIP - SYSENTER target EIP */
                case 0x176:
-                    if (cpu_s->cpu_type == CPU_PENTIUMPRO)
-                        goto i686_invalid_rdmsr;
-
                    EAX = msr.sysenter_eip;
                    EDX = 0x00000000;
                    break;
@@ -3714,7 +3705,7 @@ cpu_WRMSR(void)
                /* Extended Feature Enable Register */
                case 0xc0000080:
                    temp = EAX | ((uint64_t) EDX << 32);
-                    if (temp & ~1ULL)
+                    if (temp & ~0x1fULL)
                        x86gpf(NULL, 0);
                    else
                        msr.amd_efer = temp;
@@ -4069,23 +4060,14 @@ pentium_invalid_wrmsr:
                    break;
                /* SYSENTER_CS - SYSENTER target CS */
                case 0x174:
-                    if (cpu_s->cpu_type == CPU_PENTIUMPRO)
-                        goto i686_invalid_wrmsr;
-
                    msr.sysenter_cs = EAX & 0xFFFF;
                    break;
                /* SYSENTER_ESP - SYSENTER target ESP */
                case 0x175:
-                    if (cpu_s->cpu_type == CPU_PENTIUMPRO)
-                        goto i686_invalid_wrmsr;
-
                    msr.sysenter_esp = EAX;
                    break;
                /* SYSENTER_EIP - SYSENTER target EIP */
                case 0x176:
-                    if (cpu_s->cpu_type == CPU_PENTIUMPRO)
-                        goto i686_invalid_wrmsr;
-
                    msr.sysenter_eip = EAX;
                    break;
                /* MCG_CAP - Machine Check Global Capability */
--- a/src/cpu/x86_ops_mov_ctrl.h
+++ b/src/cpu/x86_ops_mov_ctrl.h
@@ -184,7 +184,7 @@ opMOV_CRx_r_a16(uint32_t fetchdat)
    fetch_ea_16(fetchdat);
    switch (cpu_reg) {
        case 0:
-            if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x00000001)
+            if ((cpu_state.regs[cpu_rm].l ^ cr0) & (0x00000001 | WP_FLAG))
                flushmmucache();
            else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) {
                if (is_p6 || cpu_use_dynarec)
@@ -222,7 +222,7 @@ opMOV_CRx_r_a16(uint32_t fetchdat)
            break;
        case 4:
            if (cpu_has_feature(CPU_FEATURE_CR4)) {
-                if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PAE | CR4_PGE))
+                if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PSE | CR4_PAE | CR4_PGE))
                    flushmmucache();
                cr4 = cpu_state.regs[cpu_rm].l & cpu_CR4_mask;
                break;
@@ -249,7 +249,7 @@ opMOV_CRx_r_a32(uint32_t fetchdat)
    fetch_ea_32(fetchdat);
    switch (cpu_reg) {
        case 0:
-            if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x00000001)
+            if ((cpu_state.regs[cpu_rm].l ^ cr0) & (0x00000001 | WP_FLAG))
                flushmmucache();
            else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) {
                if (is_p6 || cpu_use_dynarec)
@@ -287,7 +287,7 @@ opMOV_CRx_r_a32(uint32_t fetchdat)
            break;
        case 4:
            if (cpu_has_feature(CPU_FEATURE_CR4)) {
-                if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PAE | CR4_PGE))
+                if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PSE | CR4_PAE | CR4_PGE))
                    flushmmucache();
                cr4 = cpu_state.regs[cpu_rm].l & cpu_CR4_mask;
                break;
--- a/src/cpu/x86_ops_mov_ctrl_2386.h
+++ b/src/cpu/x86_ops_mov_ctrl_2386.h
@@ -180,7 +180,7 @@ opMOV_CRx_r_a16(uint32_t fetchdat)
    fetch_ea_16(fetchdat);
    switch (cpu_reg) {
        case 0:
-            if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x00000001)
+            if ((cpu_state.regs[cpu_rm].l ^ cr0) & (0x00000001 | WP_FLAG))
                flushmmucache();
            else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) {
                flushmmucache_nopc();
@@ -214,7 +214,7 @@ opMOV_CRx_r_a16(uint32_t fetchdat)
            break;
        case 4:
            if (cpu_has_feature(CPU_FEATURE_CR4)) {
-                if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PAE | CR4_PGE))
+                if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PSE | CR4_PAE | CR4_PGE))
                    flushmmucache();
                cr4 = cpu_state.regs[cpu_rm].l & cpu_CR4_mask;
                break;
@@ -241,7 +241,7 @@ opMOV_CRx_r_a32(uint32_t fetchdat)
    fetch_ea_32(fetchdat);
    switch (cpu_reg) {
        case 0:
-            if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x00000001)
+            if ((cpu_state.regs[cpu_rm].l ^ cr0) & (0x00000001 | WP_FLAG))
                flushmmucache();
            else if ((cpu_state.regs[cpu_rm].l ^ cr0) & 0x80000000) {
                flushmmucache_nopc();
@@ -275,7 +275,7 @@ opMOV_CRx_r_a32(uint32_t fetchdat)
            break;
        case 4:
            if (cpu_has_feature(CPU_FEATURE_CR4)) {
-                if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PAE | CR4_PGE))
+                if (((cpu_state.regs[cpu_rm].l ^ cr4) & cpu_CR4_mask) & (CR4_PSE | CR4_PAE | CR4_PGE))
                    flushmmucache();
                cr4 = cpu_state.regs[cpu_rm].l & cpu_CR4_mask;
                break;
--- a/src/cpu/x86seg.c
+++ b/src/cpu/x86seg.c
@@ -48,12 +48,12 @@
 #define  seg_writememwl writememwl_2386
 #define  seg_writememll writememll_2386
 #else
-#define  seg_readmembl  readmembl_2386
-#define  seg_readmemwl  readmemwl_2386
-#define  seg_readmemll  readmemll_2386
-#define  seg_writemembl writemembl_2386
-#define  seg_writememwl writememwl_2386
-#define  seg_writememll writememll_2386
+#define  seg_readmembl  readmembl
+#define  seg_readmemwl  readmemwl
+#define  seg_readmemll  readmemll
+#define  seg_writemembl writemembl
+#define  seg_writememwl writememwl
+#define  seg_writememll writememll
 #endif

 #define DPL  ((segdat[2] >> 13) & 3)
--- a/src/device/kbc_at.c
+++ b/src/device/kbc_at.c
@@ -821,7 +821,7 @@ write_p2(atkbc_t *dev, uint8_t val)
                softresetx86(); /* Pulse reset! */
                cpu_set_edx();
                flushmmucache();
-                if (kbc_ven == KBC_VEN_ALI)
+                if ((kbc_ven == KBC_VEN_ALI) || !strcmp(machine_get_internal_name(), "spc7700plw"))
                    smbase = 0x00030000;

                /* Yes, this is a hack, but until someone gets ahold of the real PCD-2L
--- a/src/device/mouse_microtouch_touchscreen.c
+++ b/src/device/mouse_microtouch_touchscreen.c
@@ -36,7 +36,10 @@
 #include <86box/plat.h>
 #include <86box/fifo8.h>
 #include <86box/fifo.h>
-#include <86box/video.h> /* Needed to account for overscan. */
+#include <86box/video.h>
+#include <86box/nvr.h>
+
+#define NVR_SIZE    16

 enum mtouch_formats {
    FORMAT_DEC    = 1,
@@ -60,15 +63,17 @@ const char* mtouch_identity[] = {
 };

 typedef struct mouse_microtouch_t {
-    double       baud_rate, abs_x, abs_x_old, abs_y, abs_y_old;
-    int          but, but_old;
    char         cmd[256];
-    int          cmd_pos;
+    double       abs_x, abs_x_old, abs_y, abs_y_old;
+    float        scale_x, scale_y, off_x, off_y;
+    int          but, but_old;
+    int          baud_rate, cmd_pos;
    uint8_t      format, mode;
-    bool         mode_status;
    uint8_t      id, cal_cntr, pen_mode;
-    bool         soh;
+    bool         mode_status, cal_ex, soh;   
    bool         in_reset, reset;
+    uint8_t     *nvr;
+    char         nvr_path[64];    
    serial_t    *serial;
    Fifo8        resp;
    pc_timer_t   host_to_serial_timer;
@@ -77,146 +82,241 @@ typedef struct mouse_microtouch_t {

 static mouse_microtouch_t *mtouch_inst = NULL;

-void
-microtouch_reset_complete(void *priv)
+static void
+mtouch_savenvr(void *priv)
 {
-    mouse_microtouch_t *mtouch = (mouse_microtouch_t *) priv;
+    mouse_microtouch_t *dev = (mouse_microtouch_t *) priv;
    
-    mtouch->reset = true;
-    mtouch->in_reset = false;
-    fifo8_push_all(&mtouch->resp, (uint8_t *) "\x01\x30\x0D", 3); /* <SOH>0<CR>  */
-}
+    FILE *fp;

-void
-microtouch_calibrate_timer(void *priv)
-{
-    mouse_microtouch_t *mtouch = (mouse_microtouch_t *) priv;
-    
-    if (!fifo8_num_used(&mtouch->resp)) {
-        mtouch->cal_cntr--;
-        fifo8_push_all(&mtouch->resp, (uint8_t *) "\x01\x31\x0D", 3); /* <SOH>1<CR>  */
+    fp = nvr_fopen(dev->nvr_path, "wb");
+    if (fp) {
+        fwrite(dev->nvr, 1, NVR_SIZE, fp);
+        fclose(fp);
+        fp = NULL;
    }
 }

-void
-microtouch_process_commands(mouse_microtouch_t *mtouch)
+static void
+mtouch_writenvr(void *priv, float scale_x, float scale_y, float off_x, float off_y)
 {
-    mtouch->cmd[strcspn(mtouch->cmd, "\r")] = '\0';
-    pclog("MT Command: %s\n", mtouch->cmd);
+    mouse_microtouch_t *dev = (mouse_microtouch_t *) priv;
    
-    if (mtouch->cmd[0] == 'C' && (mtouch->cmd[1] == 'N' || mtouch->cmd[1] == 'X')) { /* Calibrate New/Extended */
-        mtouch->cal_cntr = 2;
-    }
-    else if (mtouch->cmd[0] == 'F' && mtouch->cmd[1] == 'D') { /* Format Decimal */
-        mtouch->format = FORMAT_DEC;
-        mtouch->mode_status = false;
-    }
-    else if (mtouch->cmd[0] == 'F' && mtouch->cmd[1] == 'O') { /* Finger Only */
-        mtouch->pen_mode = 1;
-    }
-    else if (mtouch->cmd[0] == 'F' && mtouch->cmd[1] == 'H') { /* Format Hexadecimal */
-        mtouch->format = FORMAT_HEX;
-        mtouch->mode_status = false;
-    }
-    else if (mtouch->cmd[0] == 'F' && mtouch->cmd[1] == 'R') { /* Format Raw */
-        mtouch->format = FORMAT_RAW;
-        mtouch->mode = MODE_INACTIVE;
-        mtouch->cal_cntr = 0;
-    }
-    else if (mtouch->cmd[0] == 'F' && mtouch->cmd[1] == 'T') { /* Format Tablet */
-        mtouch->format = FORMAT_TABLET;
-    }
-    else if (mtouch->cmd[0] == 'G' && mtouch->cmd[1] == 'P' && mtouch->cmd[2] == '1') { /* Get Parameter Block 1 */
-        fifo8_push_all(&mtouch->resp, (uint8_t *) "\x01\x41\x0D", 3); /* <SOH>A<CR>  */
-        fifo8_push_all(&mtouch->resp, (uint8_t *) "0000000000000000000000000\r", 26);
-    }
-    else if (mtouch->cmd[0] == 'M' && mtouch->cmd[1] == 'D' && mtouch->cmd[2] == 'U') { /* Mode Down/Up */
-        mtouch->mode = MODE_DOWNUP;
-    }
-    else if (mtouch->cmd[0] == 'M' && mtouch->cmd[1] == 'I') { /* Mode Inactive */
-        mtouch->mode = MODE_INACTIVE;
-    }
-    else if (mtouch->cmd[0] == 'M' && mtouch->cmd[1] == 'P') { /* Mode Point */
-        mtouch->mode = MODE_POINT;
-    }
-    else if (mtouch->cmd[0] == 'M' && mtouch->cmd[1] == 'T') { /* Mode Status */
-        mtouch->mode_status = true;
-    }
-    else if (mtouch->cmd[0] == 'M' && mtouch->cmd[1] == 'S') { /* Mode Stream */
-        mtouch->mode = MODE_STREAM;
-    }
-    else if (mtouch->cmd[0] == 'O' && mtouch->cmd[1] == 'I') { /* Output Identity */
-        fifo8_push(&mtouch->resp, 0x01);
-        fifo8_push_all(&mtouch->resp, (uint8_t *) mtouch_identity[mtouch->id], 6);
-        fifo8_push(&mtouch->resp, 0x0D);
+    memcpy(&dev->nvr[0], &scale_x, 4);
+    memcpy(&dev->nvr[4], &scale_y, 4);
+    memcpy(&dev->nvr[8], &off_x, 4);
+    memcpy(&dev->nvr[12], &off_y, 4);
+}
+
+static void
+mtouch_readnvr(void *priv)
+{
+    mouse_microtouch_t *dev = (mouse_microtouch_t *) priv;
+    memcpy(&dev->scale_x, &dev->nvr[0], 4);
+    memcpy(&dev->scale_y, &dev->nvr[4], 4);
+    memcpy(&dev->off_x, &dev->nvr[8], 4);
+    memcpy(&dev->off_y, &dev->nvr[12], 4);
+    
+    pclog("MT NVR CAL: scale_x=%f, scale_y=%f, off_x=%f, off_y=%f\n", dev->scale_x, dev->scale_y, dev->off_x, dev->off_y);
+}
+
+static void
+mtouch_initnvr(void *priv)
+{
+    mouse_microtouch_t *dev = (mouse_microtouch_t *) priv;
+    FILE *fp;
+
+    /* Allocate and initialize the EEPROM. */
+    dev->nvr = (uint8_t *) malloc(NVR_SIZE);
+    memset(dev->nvr, 0x00, NVR_SIZE);
+
+    fp = nvr_fopen(dev->nvr_path, "rb");
+    if (fp) {
+        if (fread(dev->nvr, 1, NVR_SIZE, fp) != NVR_SIZE)
+            fatal("mtouch_initnvr(): Error reading data\n");
+        fclose(fp);
+        fp = NULL;
+    } else
+        mtouch_writenvr(dev, 1, 1, 0, 0);
+}
+
+static void
+mtouch_reset_complete(void *priv)
+{
+    mouse_microtouch_t *dev = (mouse_microtouch_t *) priv;
+    
+    dev->reset = true;
+    dev->in_reset = false;
+    fifo8_push_all(&dev->resp, (uint8_t *) "\x01\x30\x0D", 3); /* <SOH>0<CR>  */
+}
+
+static void
+mtouch_calibrate_timer(void *priv)
+{
+    mouse_microtouch_t *dev = (mouse_microtouch_t *) priv;
+    
+    if ((dev->cal_cntr == 2 && (dev->abs_x > 0.25 || dev->abs_y < 0.75)) || \
+        (dev->cal_cntr == 1 && (dev->abs_x < 0.75 || dev->abs_y > 0.25))) {
        return;
    }
-    else if (mtouch->cmd[0] == 'O' && mtouch->cmd[1] == 'S') { /* Output Status */
-        if (mtouch->reset) {
-            fifo8_push_all(&mtouch->resp, (uint8_t *) "\x01\x40\x60\x0D", 4);
+    
+    dev->cal_cntr--;    
+    fifo8_push_all(&dev->resp, (uint8_t *) "\x01\x31\x0D", 3); /* <SOH>1<CR>  */
+    
+    if (dev->cal_ex) {
+        if (!dev->cal_cntr) {
+            double x1_ref = 0.125;
+            double y1_ref = 0.875;
+            double x2_ref = 0.875;
+            double y2_ref = 0.125;
+            double x1 = dev->abs_x_old;
+            double y1 = dev->abs_y_old;
+            double x2 = dev->abs_x;
+            double y2 = dev->abs_y;
+            
+            dev->scale_x = (x2_ref - x1_ref) / (x2 - x1);
+            dev->off_x   = x1_ref - dev->scale_x * x1;
+            dev->scale_y = (y2_ref - y1_ref) / (y2 - y1);
+            dev->off_y   = y1_ref - dev->scale_y * y1;
+            dev->cal_ex = false;
+            
+            pclog("MT NEW CAL: scale_x=%f, scale_y=%f, off_x=%f, off_y=%f\n", dev->scale_x, dev->scale_y, dev->off_x, dev->off_y);
+            mtouch_writenvr(dev, dev->scale_x, dev->scale_y, dev->off_x, dev->off_y);
+            mtouch_savenvr(dev);
+        }
+        dev->abs_x_old = dev->abs_x;
+        dev->abs_y_old = dev->abs_y;
+    }    
+}
+
+static void
+mtouch_process_commands(mouse_microtouch_t *dev)
+{
+    dev->cmd[strcspn(dev->cmd, "\r")] = '\0';
+    pclog("MT Command: %s\n", dev->cmd);
+    
+    if (dev->cmd[0] == 'C' && dev->cmd[1] == 'N') {      /* Calibrate New */
+        dev->cal_cntr = 2;
+    }
+    else if (dev->cmd[0] == 'C' && dev->cmd[1] == 'X') { /* Calibrate Extended */
+        dev->scale_x = 1;
+        dev->scale_y = 1;
+        dev->off_x   = 0;
+        dev->off_y   = 0;
+        dev->cal_ex = true;
+        dev->cal_cntr = 2;
+    }
+    else if (dev->cmd[0] == 'F' && dev->cmd[1] == 'D') { /* Format Decimal */
+        dev->format = FORMAT_DEC;
+        dev->mode_status = false;
+    }
+    else if (dev->cmd[0] == 'F' && dev->cmd[1] == 'O') { /* Finger Only */
+        dev->pen_mode = 1;
+    }
+    else if (dev->cmd[0] == 'F' && dev->cmd[1] == 'H') { /* Format Hexadecimal */
+        dev->format = FORMAT_HEX;
+        dev->mode_status = false;
+    }
+    else if (dev->cmd[0] == 'F' && dev->cmd[1] == 'R') { /* Format Raw */
+        dev->format = FORMAT_RAW;
+        dev->mode = MODE_INACTIVE;
+        dev->cal_cntr = 0;
+    }
+    else if (dev->cmd[0] == 'F' && dev->cmd[1] == 'T') { /* Format Tablet */
+        dev->format = FORMAT_TABLET;
+    }
+    else if (dev->cmd[0] == 'G' && dev->cmd[1] == 'P' && dev->cmd[2] == '1') { /* Get Parameter Block 1 */
+        fifo8_push_all(&dev->resp, (uint8_t *) "\x01\x41\x0D", 3); /* <SOH>A<CR>  */
+        fifo8_push_all(&dev->resp, (uint8_t *) "0000000000000000000000000\r", 26);
+    }
+    else if (dev->cmd[0] == 'M' && dev->cmd[1] == 'D' && dev->cmd[2] == 'U') { /* Mode Down/Up */
+        dev->mode = MODE_DOWNUP;
+    }
+    else if (dev->cmd[0] == 'M' && dev->cmd[1] == 'I') { /* Mode Inactive */
+        dev->mode = MODE_INACTIVE;
+    }
+    else if (dev->cmd[0] == 'M' && dev->cmd[1] == 'P') { /* Mode Point */
+        dev->mode = MODE_POINT;
+    }
+    else if (dev->cmd[0] == 'M' && dev->cmd[1] == 'T') { /* Mode Status */
+        dev->mode_status = true;
+    }
+    else if (dev->cmd[0] == 'M' && dev->cmd[1] == 'S') { /* Mode Stream */
+        dev->mode = MODE_STREAM;
+    }
+    else if (dev->cmd[0] == 'O' && dev->cmd[1] == 'I') { /* Output Identity */
+        fifo8_push(&dev->resp, 0x01);
+        fifo8_push_all(&dev->resp, (uint8_t *) mtouch_identity[dev->id], 6);
+        fifo8_push(&dev->resp, 0x0D);
+        return;
+    }
+    else if (dev->cmd[0] == 'O' && dev->cmd[1] == 'S') { /* Output Status */
+        if (dev->reset) {
+            fifo8_push_all(&dev->resp, (uint8_t *) "\x01\x40\x60\x0D", 4);
        } else {
-            fifo8_push_all(&mtouch->resp, (uint8_t *) "\x01\x40\x40\x0D", 4);
+            fifo8_push_all(&dev->resp, (uint8_t *) "\x01\x40\x40\x0D", 4);
        }
        return;
    }
-    else if (mtouch->cmd[0] == 'P') { 
-        if (strlen(mtouch->cmd) == 2) { /* Pen */
-            if (mtouch->cmd[1] == 'F') mtouch->pen_mode = 3;      /* Pen or Finger */
-            else if (mtouch->cmd[1] == 'O') mtouch->pen_mode = 2; /* Pen Only */
+    else if (dev->cmd[0] == 'P') { 
+        if (strlen(dev->cmd) == 2) { /* Pen */
+            if (dev->cmd[1] == 'F') dev->pen_mode = 3;      /* Pen or Finger */
+            else if (dev->cmd[1] == 'O') dev->pen_mode = 2; /* Pen Only */
        } 
-        else if (strlen(mtouch->cmd) == 5) { /* Serial Options */
-            if      (mtouch->cmd[4] == 1) mtouch->baud_rate = 19200;
-            else if (mtouch->cmd[4] == 2) mtouch->baud_rate = 9600;
-            else if (mtouch->cmd[4] == 3) mtouch->baud_rate = 4600;
-            else if (mtouch->cmd[4] == 4) mtouch->baud_rate = 2400;
-            else if (mtouch->cmd[4] == 5) mtouch->baud_rate = 1200;
+        else if (strlen(dev->cmd) == 5) { /* Serial Options */
+            if      (dev->cmd[4] == 1) dev->baud_rate = 19200;
+            else if (dev->cmd[4] == 2) dev->baud_rate = 9600;
+            else if (dev->cmd[4] == 3) dev->baud_rate = 4600;
+            else if (dev->cmd[4] == 4) dev->baud_rate = 2400;
+            else if (dev->cmd[4] == 5) dev->baud_rate = 1200;
            
-            timer_stop(&mtouch->host_to_serial_timer);
-            timer_on_auto(&mtouch->host_to_serial_timer, (1000000. / mtouch->baud_rate) * 10);
+            timer_stop(&dev->host_to_serial_timer);
+            timer_on_auto(&dev->host_to_serial_timer, (1000000. / dev->baud_rate) * 10);
        }
    }
-    else if (mtouch->cmd[0] == 'R') { /* Reset */
-        mtouch->in_reset = true;
-        mtouch->cal_cntr = 0;
-        mtouch->pen_mode = 3;
+    else if (dev->cmd[0] == 'R') { /* Reset */
+        dev->in_reset = true;
+        dev->cal_cntr = 0;
+        dev->pen_mode = 3;
        
-        if (mtouch->cmd[0] == 'D') { /* Restore Defaults */
-            mtouch->mode = MODE_STREAM;
-            mtouch->mode_status = false;
+        if (dev->cmd[0] == 'D') { /* Restore Defaults */
+            dev->mode = MODE_STREAM;
+            dev->mode_status = false;
            
-            if (mtouch->id < 2) {
-                mtouch->format = FORMAT_DEC;
+            if (dev->id < 2) {
+                dev->format = FORMAT_DEC;
            } else {
-                mtouch->format = FORMAT_TABLET;
+                dev->format = FORMAT_TABLET;
            }
        }
        
-        timer_on_auto(&mtouch->reset_timer, 500. * 1000.);
+        timer_on_auto(&dev->reset_timer, 500. * 1000.);
        return;
    }
-    else if (mtouch->cmd[0] == 'S' && mtouch->cmd[1] == 'P' && mtouch->cmd[2] == '1') { /* Set Parameter Block 1 */
-        fifo8_push_all(&mtouch->resp, (uint8_t *) "\x01\x41\x0D", 3); /* <SOH>A<CR>  */
+    else if (dev->cmd[0] == 'S' && dev->cmd[1] == 'P' && dev->cmd[2] == '1') { /* Set Parameter Block 1 */
+        fifo8_push_all(&dev->resp, (uint8_t *) "\x01\x41\x0D", 3); /* <SOH>A<CR>  */
        return;
    }
-    else if (mtouch->cmd[0] == 'U' && mtouch->cmd[1] == 'T') { /* Unit Type */
-        fifo8_push(&mtouch->resp, 0x01);
+    else if (dev->cmd[0] == 'U' && dev->cmd[1] == 'T') { /* Unit Type */
+        fifo8_push(&dev->resp, 0x01);
        
-        if (mtouch->id == 2) {
-            fifo8_push_all(&mtouch->resp, (uint8_t *) "TP****00", 8);
+        if (dev->id == 2) {
+            fifo8_push_all(&dev->resp, (uint8_t *) "TP****00", 8);
        } else {
-            fifo8_push_all(&mtouch->resp, (uint8_t *) "QM****00", 8);
+            fifo8_push_all(&dev->resp, (uint8_t *) "QM****00", 8);
        }
-        fifo8_push(&mtouch->resp, 0x0D);
+        fifo8_push(&dev->resp, 0x0D);
        return;
    }
    
-    fifo8_push_all(&mtouch->resp, (uint8_t *) "\x01\x30\x0D", 3); /* <SOH>0<CR>  */
+    fifo8_push_all(&dev->resp, (uint8_t *) "\x01\x30\x0D", 3); /* <SOH>0<CR>  */
 }

-void
+static void
 mtouch_write(serial_t *serial, void *priv, uint8_t data)
 {
    mouse_microtouch_t *dev = (mouse_microtouch_t *) priv;
+    
    if (data == '\x1') {
        dev->soh = 1;
    } 
@@ -232,7 +332,7 @@ mtouch_write(serial_t *serial, void *priv, uint8_t data)
            
            dev->cmd[dev->cmd_pos++] = data;
            dev->cmd_pos = 0;
-            microtouch_process_commands(dev);
+            mtouch_process_commands(dev);
        }
    }
 }
@@ -240,9 +340,9 @@ mtouch_write(serial_t *serial, void *priv, uint8_t data)
 static int
 mtouch_prepare_transmit(void *priv)    
 {
-    char buffer[16];
    mouse_microtouch_t *dev = (mouse_microtouch_t *) priv;
    
+    char buffer[16];
    double abs_x = dev->abs_x;
    double abs_y = dev->abs_y;
    int but      = dev->but;
@@ -253,7 +353,7 @@ mtouch_prepare_transmit(void *priv)
    
    if (dev->cal_cntr || (!dev->but && !dev->but_old)) { /* Calibration or no buttonpress */
        if (!dev->but && dev->but_old) {
-            microtouch_calibrate_timer(dev);
+            mtouch_calibrate_timer(dev);
        }
        dev->but_old = but; /* Save buttonpress */
        return 0;
@@ -318,10 +418,11 @@ mtouch_prepare_transmit(void *priv)
    return 0;
 }

-void
+static void
 mtouch_write_to_host(void *priv)
 {
    mouse_microtouch_t *dev = (mouse_microtouch_t *) priv;
+    
    if (dev->serial == NULL)
        goto no_write_to_machine;
    if ((dev->serial->type >= SERIAL_16550) && dev->serial->fifo_enabled) {
@@ -376,6 +477,9 @@ mtouch_poll(void *priv)
        dev->abs_y = dev->abs_y / (double) monitors[index].mon_ysize;
    }
    
+    dev->abs_x = dev->scale_x * dev->abs_x + dev->off_x;
+    dev->abs_y = dev->scale_y * dev->abs_y + dev->off_y;
+    
    if (dev->abs_x >= 1.0) dev->abs_x = 1.0;
    if (dev->abs_y >= 1.0) dev->abs_y = 1.0;
    if (dev->abs_x <= 0.0) dev->abs_x = 0.0;
@@ -403,12 +507,16 @@ mtouch_init(const device_t *info)
    
    fifo8_create(&dev->resp, 256);
    timer_add(&dev->host_to_serial_timer, mtouch_write_to_host, dev, 0);
-    timer_add(&dev->reset_timer, microtouch_reset_complete, dev, 0);
+    timer_add(&dev->reset_timer, mtouch_reset_complete, dev, 0);
    timer_on_auto(&dev->host_to_serial_timer, (1000000. / dev->baud_rate) * 10);
    dev->id          = device_get_config_int("identity");
    dev->pen_mode    = 3;
    dev->mode        = MODE_STREAM;
    
+    sprintf(dev->nvr_path, "mtouch_%s.nvr", mtouch_identity[dev->id]);
+    mtouch_initnvr(dev);
+    mtouch_readnvr(dev);
+    
    if (dev->id < 2) { /* legacy controllers */
        dev->format = FORMAT_DEC;
    } else {
--- a/src/disk/hdc_ide.c
+++ b/src/disk/hdc_ide.c
@@ -1252,7 +1252,10 @@ ide_write_data(ide_t *ide, const uint16_t val)
                const double xfer_time = ide_get_xfer_time(ide, 512);
                const double wait_time = seek_time + xfer_time;
                if (ide->command == WIN_WRITE_MULTIPLE) {
-                    if ((ide->blockcount + 1) >= ide->blocksize || ide->tf->secount == 1) {
+                    if (hdd[ide->hdd_num].speed_preset == 0) {
+                        ide->pending_delay = 0;
+                        ide_callback(ide);
+                    } else if ((ide->blockcount + 1) >= ide->blocksize || ide->tf->secount == 1) {
                        ide_set_callback(ide, seek_time + xfer_time + ide->pending_delay);
                        ide->pending_delay = 0;
                    } else {
@@ -1607,9 +1610,13 @@ ide_writeb(uint16_t addr, uint8_t val, void *priv)
                        ide->sc->callback = 100.0 * IDE_TIME;
                        ide_set_callback(ide, 100.0 * IDE_TIME);
                    } else {
-                        double seek_time = hdd_seek_get_time(&hdd[ide->hdd_num], (val & 0x60) ?
-                                                             ide_get_sector(ide) : 0, HDD_OP_SEEK, 0, 0.0);
-                        ide_set_callback(ide, seek_time);
+                        if (hdd[ide->hdd_num].speed_preset == 0)
+                            ide_set_callback(ide, 100.0 * IDE_TIME);
+                        else {
+                            double seek_time = hdd_seek_get_time(&hdd[ide->hdd_num], (val & 0x60) ?
+                                                                 ide_get_sector(ide) : 0, HDD_OP_SEEK, 0, 0.0);
+                            ide_set_callback(ide, seek_time);
+                        }
                    }
                    break;

@@ -1652,6 +1659,10 @@ ide_writeb(uint16_t addr, uint8_t val, void *priv)
                                                               ide_get_sector(ide), sec_count);
                            double xfer_time = ide_get_xfer_time(ide, 512 * sec_count);
                            wait_time        = seek_time > xfer_time ? seek_time : xfer_time;
+                        } else if ((val == WIN_READ_MULTIPLE) && (hdd[ide->hdd_num].speed_preset == 0)) {
+                           ide_set_callback(ide, 200.0 * IDE_TIME);
+                           ide->do_initial_read = 1;
+                           break;
                        } else if ((val == WIN_READ_MULTIPLE) && (ide->blocksize > 0)) {
                            sec_count = ide->tf->secount ? ide->tf->secount : 256;
                            if (sec_count > ide->blocksize)
@@ -1848,7 +1859,9 @@ ide_read_data(ide_t *ide)
                    ide_next_sector(ide);
                    ide->tf->atastat = BSY_STAT | READY_STAT | DSC_STAT;
                    if (ide->command == WIN_READ_MULTIPLE) {
-                        if (!ide->blockcount) {
+                        if (hdd[ide->hdd_num].speed_preset == 0)
+                            ide_callback(ide);
+                        else if (!ide->blockcount) {
                            uint32_t cnt = ide->tf->secount ?
                                           ide->tf->secount : 256;
                            if (cnt > ide->blocksize)
@@ -1888,8 +1901,7 @@ ide_status(ide_t *ide, ide_t *ide_other, int ch)
        /* On real hardware, a slave with a present master always
           returns a status of 0x00.
           Confirmed by the ATA-3 and ATA-4 specifications. */
-        // ret = 0x00;
-        ret = 0x01;
+        ret = 0x00;
    } else {
        ret = ide->tf->atastat;
        if (ide->type == IDE_ATAPI)
--- a/src/disk/hdd_image.c
+++ b/src/disk/hdd_image.c
@@ -577,6 +577,7 @@ hdd_image_write(uint8_t id, uint32_t sector, uint32_t count, uint8_t *buffer)
        }

        num_write          = fwrite(buffer, 512, count, hdd_images[id].file);
+        fflush(hdd_images[id].file);
        hdd_images[id].pos = sector + num_write;
    }
 }
@@ -618,6 +619,8 @@ hdd_image_zero(uint8_t id, uint32_t sector, uint32_t count)
            hdd_images[id].pos = sector + i;
            fwrite(empty_sector, 512, 1, hdd_images[id].file);
        }
+
+        fflush(hdd_images[id].file);
    }
 }

--- a/src/disk/minivhd/minivhd_io.c
+++ b/src/disk/minivhd/minivhd_io.c
@@ -89,6 +89,8 @@ mvhd_write_empty_sectors(FILE *f, int sector_count)

    for (int i = 0; i < sector_count; i++)
        fwrite(zero_bytes, sizeof zero_bytes, 1, f);
+
+    fflush(f);
 }

 /**
@@ -141,6 +143,7 @@ write_bat_entry(MVHDMeta *vhdm, int blk)

    mvhd_fseeko64(vhdm->f, table_offset, SEEK_SET);
    fwrite(&offset, sizeof offset, 1, vhdm->f);
+    fflush(vhdm->f);
 }

 /**
@@ -197,6 +200,8 @@ create_block(MVHDMeta *vhdm, int blk)
    /* We no longer have a sparse block. Update that BAT! */
    vhdm->block_offset[blk] = sect_offset;
    write_bat_entry(vhdm, blk);
+
+    fflush(vhdm->f);
 }

 int
@@ -317,6 +322,7 @@ mvhd_fixed_write(MVHDMeta *vhdm, uint32_t offset, int num_sectors, void *in_buff
    addr = (int64_t)offset * MVHD_SECTOR_SIZE;
    mvhd_fseeko64(vhdm->f, addr, SEEK_SET);
    fwrite(in_buff, transfer_sectors * MVHD_SECTOR_SIZE, 1, vhdm->f);
+    fflush(vhdm->f);

    return truncated_sectors;
 }
@@ -376,6 +382,8 @@ mvhd_sparse_diff_write(MVHDMeta *vhdm, uint32_t offset, int num_sectors, void *i
    /* And write the sector bitmap for the last block we visited to disk */
    write_curr_sect_bitmap(vhdm);

+    fflush(vhdm->f);
+
    return truncated_sectors;
 }

--- a/src/disk/mo.c
+++ b/src/disk/mo.c
@@ -951,6 +951,8 @@ mo_blocks(mo_t *dev, int32_t *len, UNUSED(int first_batch), int out)
        if (out) {
            if (fwrite(dev->buffer + (i * dev->drv->sector_size), 1, dev->drv->sector_size, dev->drv->fp) != dev->drv->sector_size)
                fatal("mo_blocks(): Error writing data\n");
+
+            fflush(dev->drv->fp);
        } else {
            if (fread(dev->buffer + (i * dev->drv->sector_size), 1, dev->drv->sector_size, dev->drv->fp) != dev->drv->sector_size)
                fatal("mo_blocks(): Error reading data\n");
@@ -1069,6 +1071,8 @@ mo_erase(mo_t *dev)
        fwrite(dev->buffer, 1, dev->drv->sector_size, dev->drv->fp);
    }

+    fflush(dev->drv->fp);
+
    mo_log("MO %i: Erased %i bytes of blocks...\n", dev->id, i * dev->drv->sector_size);

    dev->sector_pos += i;
--- a/src/disk/zip.c
+++ b/src/disk/zip.c
@@ -1134,6 +1134,8 @@ zip_blocks(zip_t *dev, int32_t *len, UNUSED(int first_batch), int out)
        if (out) {
            if (fwrite(dev->buffer + (i << 9), 1, 512, dev->drv->fp) != 512)
                fatal("zip_blocks(): Error writing data\n");
+
+            fflush(dev->drv->fp);
        } else {
            if (fread(dev->buffer + (i << 9), 1, 512, dev->drv->fp) != 512)
                fatal("zip_blocks(): Error reading data\n");
@@ -2125,6 +2127,8 @@ zip_phase_data_out(scsi_common_t *sc)
                if (fwrite(dev->buffer, 1, 512, dev->drv->fp) != 512)
                    fatal("zip_phase_data_out(): Error writing data\n");
            }
+
+            fflush(dev->drv->fp);
            break;
        case GPCMD_MODE_SELECT_6:
        case GPCMD_MODE_SELECT_10:
--- a/src/dma.c
+++ b/src/dma.c
@@ -814,8 +814,6 @@ dma16_read(uint16_t addr, UNUSED(void *priv))
        case 7: /*Count registers*/
            dma_wp[1] ^= 1;
            count = dma[channel].cc/* + 1*/;
-            // if (count > dma[channel].cb)
-                // count = 0x0000;
            if (dma_wp[1])
                ret = count & 0xff;
            else
--- a/src/floppy/fdd_86f.c
+++ b/src/floppy/fdd_86f.c
@@ -628,10 +628,12 @@ d86f_get_array_size(int drive, int side, int words)
    int hole;
    int rm;
    int ssd;
+    int mpc;

    rm   = d86f_get_rpm_mode(drive);
    ssd  = d86f_get_speed_shift_dir(drive);
-    hole = (d86f_handler[drive].disk_flags(drive) & 6) >> 1;
+    hole = (d86f_handler[drive].disk_flags(drive) >> 1) & 3;
+    mpc  = (d86f_handler[drive].disk_flags(drive) >> 13) & 1;

    if (!rm && ssd) /* Special case - extra bit cells size specifies entire array size. */
        array_size = 0;
@@ -703,13 +705,20 @@ d86f_get_array_size(int drive, int side, int words)
    array_size <<= 4;
    array_size += d86f_handler[drive].extra_bit_cells(drive, side);

-    if (array_size & 15)
-        array_size = (array_size >> 4) + 1;
-    else
-        array_size = (array_size >> 4);
+    if (mpc && !words) {
+        if (array_size & 7)
+            array_size = (array_size >> 3) + 1;
+        else
+            array_size = (array_size >> 3);
+    } else {
+        if (array_size & 15)
+            array_size = (array_size >> 4) + 1;
+        else
+            array_size = (array_size >> 4);

-    if (!words)
-        array_size <<= 1;
+        if (!words)
+            array_size <<= 1;
+    }

    return array_size;
 }
@@ -1098,9 +1107,9 @@ d86f_get_bit(int drive, int side)
    /* In some cases, misindentification occurs so we need to make sure the surface data array is not
       not NULL. */
    if (d86f_has_surface_desc(drive) && dev->track_surface_data[side]) {
-        if (d86f_reverse_bytes(drive)) {
+        if (d86f_reverse_bytes(drive))
            surface_data = dev->track_surface_data[side][track_word] & 0xFF;
-        } else {
+        else {
            surface_data = (dev->track_surface_data[side][track_word] & 0xFF) << 8;
            surface_data |= (dev->track_surface_data[side][track_word] >> 8);
        }
@@ -1150,9 +1159,9 @@ d86f_put_bit(int drive, int side, int bit)
    }

    if (d86f_has_surface_desc(drive)) {
-        if (d86f_reverse_bytes(drive)) {
+        if (d86f_reverse_bytes(drive))
            surface_data = dev->track_surface_data[side][track_word] & 0xFF;
-        } else {
+        else {
            surface_data = (dev->track_surface_data[side][track_word] & 0xFF) << 8;
            surface_data |= (dev->track_surface_data[side][track_word] >> 8);
        }
@@ -1177,9 +1186,9 @@ d86f_put_bit(int drive, int side, int bit)

        surface_data &= ~(1 << track_bit);
        surface_data |= (surface_bit << track_bit);
-        if (d86f_reverse_bytes(drive)) {
+        if (d86f_reverse_bytes(drive))
            dev->track_surface_data[side][track_word] = surface_data;
-        } else {
+        else {
            dev->track_surface_data[side][track_word] = (surface_data & 0xFF) << 8;
            dev->track_surface_data[side][track_word] |= (surface_data >> 8);
        }
@@ -1191,9 +1200,9 @@ d86f_put_bit(int drive, int side, int bit)
    encoded_data &= ~(1 << track_bit);
    encoded_data |= (current_bit << track_bit);

-    if (d86f_reverse_bytes(drive)) {
+    if (d86f_reverse_bytes(drive))
        d86f_handler[drive].encoded_data(drive, side)[track_word] = encoded_data;
-    } else {
+    else {
        d86f_handler[drive].encoded_data(drive, side)[track_word] = (encoded_data & 0xFF) << 8;
        d86f_handler[drive].encoded_data(drive, side)[track_word] |= (encoded_data >> 8);
    }
@@ -1833,7 +1842,6 @@ d86f_write_direct_common(int drive, int side, uint16_t byte, uint8_t type, uint3
    uint16_t  mask_data;
    uint16_t  mask_surface;
    uint16_t  mask_hole;
-    uint16_t  mask_fuzzy;
    decoded_t dbyte;
    decoded_t dpbyte;

@@ -1846,6 +1854,7 @@ d86f_write_direct_common(int drive, int side, uint16_t byte, uint8_t type, uint3
    if (type == 0) {
        /* Byte write. */
        encoded_byte = d86f_encode_byte(drive, 0, dbyte, dpbyte);
+        dev->preceding_bit[side] = encoded_byte & 1;
        if (!d86f_reverse_bytes(drive)) {
            mask_data = encoded_byte >> 8;
            encoded_byte &= 0xFF;
@@ -1855,6 +1864,7 @@ d86f_write_direct_common(int drive, int side, uint16_t byte, uint8_t type, uint3
    } else {
        /* Word write. */
        encoded_byte = byte;
+        dev->preceding_bit[side] = (encoded_byte >> 8) & 1;
        if (d86f_reverse_bytes(drive)) {
            mask_data = encoded_byte >> 8;
            encoded_byte &= 0xFF;
@@ -1863,16 +1873,19 @@ d86f_write_direct_common(int drive, int side, uint16_t byte, uint8_t type, uint3
        }
    }

-    dev->preceding_bit[side] = encoded_byte & 1;
-
    if (d86f_has_surface_desc(drive)) {
-        mask_data    = dev->track_encoded_data[side][pos] ^= 0xFFFF;
+        /* Inverted track data, clear bits are now set. */
+        mask_data    = ~dev->track_encoded_data[side][pos];
+        /* Surface data. */
        mask_surface = dev->track_surface_data[side][pos];
-        mask_hole    = (mask_surface & mask_data) ^ 0xFFFF; /* This will retain bits that are both fuzzy and 0, therefore physical holes. */
-        encoded_byte &= mask_hole;                          /* Filter out physical hole bits from the encoded data. */
-        mask_data ^= 0xFFFF;                                /* Invert back so bits 1 are 1 again. */
-        mask_fuzzy = (mask_surface & mask_data) ^ 0xFFFF;   /* All fuzzy bits are 0. */
-        dev->track_surface_data[side][pos] &= mask_fuzzy;   /* Remove fuzzy bits (but not hole bits) from the surface mask, making them regular again. */
+
+        /* Hole = surface & ~data, so holes are one. */
+        mask_hole    = mask_surface & mask_data;
+        /* Hole bits are ones again, set the surface data to that. */
+        dev->track_surface_data[side][pos] = mask_hole;
+
+        /* Force the data of any hole to zero. */
+        encoded_byte &= ~mask_hole;
    }

    dev->track_encoded_data[side][pos] = encoded_byte;
@@ -2865,22 +2878,22 @@ d86f_construct_encoded_buffer(int drive, int side)
            /* Source image has surface description data, so we have some more handling to do. */
            src1_fuzm = src1[i] & src1_s[i];
            src2_fuzm = src2[i] & src2_s[i];
-            dst_fuzm  = src1_fuzm | src2_fuzm; /* The bits that remain set are fuzzy in either one or
-                                                                  the other or both. */
-            src1_holm = src1[i] | (src1_s[i] ^ 0xffff);
-            src2_holm = src2[i] | (src2_s[i] ^ 0xffff);
-            dst_holm  = (src1_holm & src2_holm) ^ 0xffff; /* The bits that remain set are holes in both. */
-            dst_neim  = (dst_fuzm | dst_holm) ^ 0xffff;   /* The bits that remain set are those that are neither
-                                                                     fuzzy nor are holes in both. */
+            dst_fuzm  = src1_fuzm | src2_fuzm;     /* The bits that remain set are fuzzy in either one or
+                                                      the other or both. */
+            src1_holm = ~src1[i] & src1_s[i];
+            src2_holm = ~src2[i] & src2_s[i];
+            dst_holm  = src1_holm & src2_holm;     /* The bits that remain set are holes in both. */
+            dst_neim  = ~(dst_fuzm | dst_holm);    /* The bits that remain set are those that are neither
+                                                      fuzzy nor are holes in both. */
            src1_d = src1[i] & dst_neim;
            src2_d = src2[i] & dst_neim;

-            dst_s[i] = (dst_neim ^ 0xffff); /* The set bits are those that are either fuzzy or are
-                                                                       holes in both. */
-            dst[i] = (src1_d | src2_d);     /* Initial data is remaining data from Source 1 and
-                                                       Source 2. */
-            dst[i] |= dst_fuzm;             /* Add to it the fuzzy bytes (holes have surface bit set
-                                                       but data bit clear). */
+            dst_s[i] = ~dst_neim;                  /* The set bits are those that are either fuzzy or are
+                                                      holes in both. */
+            dst[i] = (src1_d | src2_d);            /* Initial data is remaining data from Source 1 and
+                                                      Source 2. */
+            dst[i] |= dst_fuzm;                    /* Add to it the fuzzy bytes (holes have surface bit set
+                                                      but data bit clear). */
        } else {
            /* No surface data, the handling is much simpler - a simple OR. */
            dst[i]   = src1[i] | src2[i];
@@ -2909,15 +2922,14 @@ d86f_decompose_encoded_buffer(int drive, int side)
        if (d86f_has_surface_desc(drive)) {
            /* Source image has surface description data, so we have some more handling to do.
               We need hole masks for both buffers. Holes have data bit clear and surface bit set. */
-            temp      = src1[i] & (src1_s[i] ^ 0xffff);
-            temp2     = src2[i] & (src2_s[i] ^ 0xffff);
-            src1[i]   = dst[i] & temp;
-            src1_s[i] = temp ^ 0xffff;
-            src2[i]   = dst[i] & temp2;
-            src2_s[i] = temp2 ^ 0xffff;
-        } else {
+            temp      = ~src1[i] & src1_s[i];
+            temp2     = ~src2[i] & src2_s[i];
+            src1[i]   = dst[i] & ~temp;
+            src1_s[i] = temp;
+            src2[i]   = dst[i] & ~temp2;
+            src2_s[i] = temp2;
+        } else
            src1[i] = src2[i] = dst[i];
-        }
    }
 }

@@ -3213,6 +3225,8 @@ d86f_writeback(int drive)
        free(dev->filebuf);
    }
 #endif
+
+    fflush(dev->fp);
 }

 void
@@ -3544,9 +3558,9 @@ d86f_load(int drive, char *fn)
        writeprot[drive] = 1;
    }

-    if (ui_writeprot[drive]) {
+    if (ui_writeprot[drive])
        writeprot[drive] = 1;
-    }
+
    fwriteprot[drive] = writeprot[drive];

    fseek(dev->fp, 0, SEEK_END);
--- a/src/floppy/fdd_imd.c
+++ b/src/floppy/fdd_imd.c
@@ -549,6 +549,8 @@ imd_writeback(int drive)
            }
        }
    }
+
+    fflush(dev->fp);
 }

 static uint8_t
--- a/src/floppy/fdd_img.c
+++ b/src/floppy/fdd_img.c
@@ -431,6 +431,8 @@ write_back(int drive)
        if (fwrite(dev->track_data[side], 1, size, dev->fp) != size)
            fatal("IMG write_back(): Error writing data\n");
    }
+
+    fflush(dev->fp);
 }

 static uint16_t
--- a/src/include/86box/vid_8514a.h
+++ b/src/include/86box/vid_8514a.h
@@ -41,6 +41,8 @@ typedef union {

 typedef struct ibm8514_t {
    rom_t bios_rom;
+    rom_t bios_rom2;
+    rom_t bios_rom3;
    hwcursor8514_t hwcursor;
    hwcursor8514_t hwcursor_latch;
    uint8_t        pos_regs[8];
--- a/src/include/86box/vid_cga.h
+++ b/src/include/86box/vid_cga.h
@@ -31,6 +31,8 @@ typedef struct cga_t {
    uint8_t cgamode;
    uint8_t cgacol;

+    uint8_t lp_strobe;
+
    int      fontbase;
    int      linepos;
    int      displine;
--- a/src/include/86box/vid_svga.h
+++ b/src/include/86box/vid_svga.h
@@ -171,9 +171,11 @@ typedef struct svga_t {

    pc_timer_t timer;
    pc_timer_t timer8514;
+    pc_timer_t timer_xga;

    double clock;
    double clock8514;
+    double clock_xga;

    double multiplier;

@@ -319,9 +321,13 @@ extern void     ati8514_pos_write(uint16_t port, uint8_t val, void *priv);
 extern void     ati8514_init(svga_t *svga, void *ext8514, void *dev8514);
 #endif

-extern void xga_poll(void *priv, svga_t *svga);
+extern void xga_write_test(uint32_t addr, uint8_t val, void *priv);
+extern uint8_t xga_read_test(uint32_t addr, void *priv);
+extern void xga_poll(void *priv);
 extern void xga_recalctimings(svga_t *svga);

+extern uint32_t svga_decode_addr(svga_t *svga, uint32_t addr, int write);
+
 extern int  svga_init(const device_t *info, svga_t *svga, void *priv, int memsize,
                      void (*recalctimings_ex)(struct svga_t *svga),
                      uint8_t (*video_in)(uint16_t addr, void *priv),
--- a/src/include/86box/vid_vga.h
+++ b/src/include/86box/vid_vga.h
@@ -28,9 +28,7 @@ typedef struct vga_t {
    rom_t bios_rom;
 } vga_t;

-static video_timings_t timing_vga = { VIDEO_ISA, 8, 16, 32, 8, 16, 32 };
-
-void    vga_out(uint16_t addr, uint8_t val, void *priv);
-uint8_t vga_in(uint16_t addr, void *priv);
+extern void vga_out(uint16_t addr, uint8_t val, void *priv);
+extern uint8_t vga_in(uint16_t addr, void *priv);

 #endif /*VIDEO_VGA_H*/
--- a/src/include/86box/vid_voodoo_regs.h
+++ b/src/include/86box/vid_voodoo_regs.h
@@ -338,18 +338,22 @@ enum {
 };

 enum {
-    LFB_FORMAT_RGB565   = 0,
-    LFB_FORMAT_RGB555   = 1,
-    LFB_FORMAT_ARGB1555 = 2,
-    LFB_FORMAT_XRGB8888 = 4,
-    LFB_FORMAT_ARGB8888 = 5,
-    LFB_FORMAT_DEPTH    = 15,
-    LFB_FORMAT_MASK     = 15
+    LFB_FORMAT_RGB565         = 0,
+    LFB_FORMAT_RGB555         = 1,
+    LFB_FORMAT_ARGB1555       = 2,
+    LFB_FORMAT_XRGB8888       = 4,
+    LFB_FORMAT_ARGB8888       = 5,
+    LFB_FORMAT_DEPTH_RGB565   = 12,
+    LFB_FORMAT_DEPTH_RGB555   = 13,
+    LFB_FORMAT_DEPTH_ARGB1555 = 14,
+    LFB_FORMAT_DEPTH          = 15,
+    LFB_FORMAT_MASK           = 15
 };

 enum {
    LFB_WRITE_COLOUR = 1,
-    LFB_WRITE_DEPTH  = 2
+    LFB_WRITE_DEPTH  = 2,
+    LFB_WRITE_BOTH   = 4
 };

 enum {
--- a/src/include/86box/vid_xga.h
+++ b/src/include/86box/vid_xga.h
@@ -31,10 +31,12 @@ typedef struct xga_hwcursor_t {
 } xga_hwcursor_t;

 typedef struct xga_t {
+    mem_mapping_t  membios_mapping;
    mem_mapping_t  memio_mapping;
    mem_mapping_t  linear_mapping;
    mem_mapping_t  video_mapping;
    rom_t          bios_rom;
+    rom_t          membios_rom;
    rom_t          vga_bios_rom;
    xga_hwcursor_t hwcursor;
    xga_hwcursor_t hwcursor_latch;
@@ -47,8 +49,8 @@ typedef struct xga_t {

    uint8_t  pos_regs[8];
    uint8_t  disp_addr;
-    uint8_t   dac_mask;
-    uint8_t   dac_status;
+    uint8_t  dac_mask;
+    uint8_t  dac_status;
    uint8_t  cfg_reg;
    uint8_t  instance;
    uint8_t  op_mode;
@@ -87,6 +89,8 @@ typedef struct xga_t {
    uint8_t  instance_isa;
    uint8_t  instance_num;
    uint8_t  ext_mem_addr;
+    uint8_t  vga_post;
+    uint8_t  addr_test;
    uint8_t *vram;
    uint8_t *changedvram;

@@ -167,6 +171,9 @@ typedef struct xga_t {
    uint32_t write_bank;
    uint32_t px_map_base;
    uint32_t pallook[512];
+    uint32_t bios_diag;
+
+    PALETTE xgapal;

    uint64_t dispontime;
    uint64_t dispofftime;
--- a/src/machine/m_at_sockets7.c
+++ b/src/machine/m_at_sockets7.c
@@ -263,7 +263,7 @@ machine_at_mvp3_init(const machine_t *model)
    device_add(&via_mvp3_device);
    device_add(&via_vt82c586b_device);
    device_add(&keyboard_ps2_pci_device);
-    device_add(&w83877tf_device);
+    device_add(&w83877tf_acorp_device);
    device_add(&sst_flash_39sf010_device);
    spd_register(SPD_TYPE_SDRAM, 0x3, 256);

--- a/src/machine/m_tandy.c
+++ b/src/machine/m_tandy.c
@@ -84,6 +84,7 @@ typedef struct t1kvid_t {
    uint32_t b8000_mask;
    uint32_t b8000_limit;
    uint8_t  planar_ctrl;
+    uint8_t  lp_strobe;

    int      linepos;
    int      displine;
@@ -770,6 +771,15 @@ recalc_address_sl(tandy_t *dev)
    }
 }

+static void
+vid_update_latch(t1kvid_t *vid)
+{
+    uint32_t lp_latch = vid->displine * vid->crtc[1];
+
+    vid->crtc[0x10] = (lp_latch >> 8) & 0x3f;
+    vid->crtc[0x11] = lp_latch & 0xff;
+}
+
 static void
 vid_out(uint16_t addr, uint8_t val, void *priv)
 {
@@ -816,6 +826,18 @@ vid_out(uint16_t addr, uint8_t val, void *priv)
            vid->array_index = val & 0x1f;
            break;

+        case 0x3db:
+            if (!dev->is_sl2 && (vid->lp_strobe == 1))
+                vid->lp_strobe = 0;
+            break;
+
+        case 0x3dc:
+            if (!dev->is_sl2 && (vid->lp_strobe == 0)) {
+                vid->lp_strobe = 1;
+                vid_update_latch(vid);
+            }
+            break;
+
        case 0x03de:
            if (vid->array_index & 16)
                val &= 0xf;
@@ -852,7 +874,7 @@ static uint8_t
 vid_in(uint16_t addr, void *priv)
 {
    const tandy_t  *dev = (tandy_t *) priv;
-    const t1kvid_t *vid = dev->vid;
+    t1kvid_t       *vid = dev->vid;
    uint8_t         ret = 0xff;

    if ((addr >= 0x3d0) && (addr <= 0x3d7))
@@ -871,6 +893,18 @@ vid_in(uint16_t addr, void *priv)
            ret = vid->stat;
            break;

+        case 0x3db:
+            if (!dev->is_sl2 && (vid->lp_strobe == 1))
+                vid->lp_strobe = 0;
+            break;
+
+        case 0x3dc:
+            if (!dev->is_sl2 && (vid->lp_strobe == 0)) {
+                vid->lp_strobe = 1;
+                vid_update_latch(vid);
+            }
+            break;
+
        default:
            break;
    }
--- a/src/mem/mem.c
+++ b/src/mem/mem.c
@@ -320,7 +320,7 @@ mmutranslatereal_normal(uint32_t addr, int rw)

    if ((temp & 0x80) && (cr4 & CR4_PSE)) {
        /*4MB page*/
-        if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !(temp & 2) && (((CPL == 3) && !cpl_override) || ((is486 || isibm486) && (cr0 & WP_FLAG))))) {
+        if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !cpl_override && !(temp & 2) && (((CPL == 3) && !cpl_override) || ((is486 || isibm486) && (cr0 & WP_FLAG))))) {
            cr2 = addr;
            temp &= 1;
            if (CPL == 3)
@@ -341,7 +341,7 @@ mmutranslatereal_normal(uint32_t addr, int rw)

    temp  = rammap((temp & ~0xfff) + ((addr >> 10) & 0xffc));
    temp3 = temp & temp2;
-    if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !(temp3 & 2) && (((CPL == 3) && !cpl_override) || ((is486 || isibm486) && (cr0 & WP_FLAG))))) {
+    if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !cpl_override && !(temp3 & 2) && (((CPL == 3) && !cpl_override) || ((is486 || isibm486) && (cr0 & WP_FLAG))))) {
        cr2 = addr;
        temp &= 1;
        if (CPL == 3)
@@ -405,7 +405,7 @@ mmutranslatereal_pae(uint32_t addr, int rw)

    if (temp & 0x80) {
        /*2MB page*/
-        if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !(temp & 2) && (((CPL == 3) && !cpl_override) || (cr0 & WP_FLAG)))) {
+        if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !cpl_override && !(temp & 2) && (((CPL == 3) && !cpl_override) || (cr0 & WP_FLAG)))) {
            cr2 = addr;
            temp &= 1;
            if (CPL == 3)
@@ -426,7 +426,7 @@ mmutranslatereal_pae(uint32_t addr, int rw)
    addr4 = (temp & ~0xfffULL) + ((addr >> 9) & 0xff8);
    temp  = rammap64(addr4) & 0x000000ffffffffffULL;
    temp3 = temp & temp4;
-    if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !(temp3 & 2) && (((CPL == 3) && !cpl_override) || (cr0 & WP_FLAG)))) {
+    if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !cpl_override && !(temp3 & 2) && (((CPL == 3) && !cpl_override) || (cr0 & WP_FLAG)))) {
        cr2 = addr;
        temp &= 1;
        if (CPL == 3)
@@ -488,7 +488,7 @@ mmutranslate_noabrt_normal(uint32_t addr, int rw)

    if ((temp & 0x80) && (cr4 & CR4_PSE)) {
        /*4MB page*/
-        if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !(temp & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
+        if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !cpl_override && !(temp & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
            return 0xffffffffffffffffULL;

        return (temp & ~0x3fffff) + (addr & 0x3fffff);
@@ -497,7 +497,7 @@ mmutranslate_noabrt_normal(uint32_t addr, int rw)
    temp  = rammap((temp & ~0xfff) + ((addr >> 10) & 0xffc));
    temp3 = temp & temp2;

-    if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !(temp3 & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
+    if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !cpl_override && !(temp3 & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
        return 0xffffffffffffffffULL;

    return (uint64_t) ((temp & ~0xfff) + (addr & 0xfff));
@@ -532,7 +532,7 @@ mmutranslate_noabrt_pae(uint32_t addr, int rw)

    if (temp & 0x80) {
        /*2MB page*/
-        if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !(temp & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
+        if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !cpl_override && !(temp & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
            return 0xffffffffffffffffULL;

        return ((temp & ~0x1fffffULL) + (addr & 0x1fffff)) & 0x000000ffffffffffULL;
@@ -543,7 +543,7 @@ mmutranslate_noabrt_pae(uint32_t addr, int rw)

    temp3 = temp & temp4;

-    if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !(temp3 & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
+    if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !cpl_override && !(temp3 & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
        return 0xffffffffffffffffULL;

    return ((temp & ~0xfffULL) + ((uint64_t) (addr & 0xfff))) & 0x000000ffffffffffULL;
--- a/src/mem/mmu_2386.c
+++ b/src/mem/mmu_2386.c
@@ -198,7 +198,7 @@ mmutranslatereal_2386(uint32_t addr, int rw)

    if ((temp & 0x80) && (cr4 & CR4_PSE)) {
        /*4MB page*/
-        if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !(temp & 2) && (((CPL == 3) && !cpl_override) || ((is486 || isibm486) && (cr0 & WP_FLAG))))) {
+        if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !cpl_override && !(temp & 2) && (((CPL == 3) && !cpl_override) || ((is486 || isibm486) && (cr0 & WP_FLAG))))) {
            cr2 = addr;
            temp &= 1;
            if (CPL == 3)
@@ -219,7 +219,7 @@ mmutranslatereal_2386(uint32_t addr, int rw)

    temp = mem_readl_map((temp & ~0xfff) + ((addr >> 10) & 0xffc));
    temp3 = temp & temp2;
-    if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !(temp3 & 2) && (((CPL == 3) && !cpl_override) || ((is486 || isibm486) && (cr0 & WP_FLAG))))) {
+    if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !cpl_override && !(temp3 & 2) && (((CPL == 3) && !cpl_override) || ((is486 || isibm486) && (cr0 & WP_FLAG))))) {
        cr2 = addr;
        temp &= 1;
        if (CPL == 3)
@@ -258,7 +258,7 @@ mmutranslate_noabrt_2386(uint32_t addr, int rw)

    if ((temp & 0x80) && (cr4 & CR4_PSE)) {
        /*4MB page*/
-        if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !(temp & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
+        if (((CPL == 3) && !(temp & 4) && !cpl_override) || (rw && !cpl_override && !(temp & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
            return 0xffffffffffffffffULL;

        return (temp & ~0x3fffff) + (addr & 0x3fffff);
@@ -267,7 +267,7 @@ mmutranslate_noabrt_2386(uint32_t addr, int rw)
    temp  = mem_readl_map((temp & ~0xfff) + ((addr >> 10) & 0xffc));
    temp3 = temp & temp2;

-    if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !(temp3 & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
+    if (!(temp & 1) || ((CPL == 3) && !(temp3 & 4) && !cpl_override) || (rw && !cpl_override && !(temp3 & 2) && ((CPL == 3) || (cr0 & WP_FLAG))))
        return 0xffffffffffffffffULL;

    return (uint64_t) ((temp & ~0xfff) + (addr & 0xfff));
--- a/src/network/net_rtl8139.c
+++ b/src/network/net_rtl8139.c
@@ -352,7 +352,8 @@ enum chip_flags {
 #define RTL8139_PCI_REVID_8139      0x10
 #define RTL8139_PCI_REVID_8139CPLUS 0x20

-#define RTL8139_PCI_REVID           RTL8139_PCI_REVID_8139CPLUS
+/* Return 0x10 - the RTL8139C+ datasheet and Windows 2000 driver both confirm this. */
+#define RTL8139_PCI_REVID           RTL8139_PCI_REVID_8139

 #pragma pack(push, 1)
 typedef struct RTL8139TallyCounters {
@@ -1075,10 +1076,11 @@ rtl8139_reset(void *priv)
    s->cplus_enabled = 0;

 #if 0
-    s->BasicModeCtrl = 0x3100; // 100Mbps, full duplex, autonegotiation
    s->BasicModeCtrl = 0x2100; // 100Mbps, full duplex
-#endif
+    s->BasicModeCtrl = 0x3100; // 100Mbps, full duplex, autonegotiation
    s->BasicModeCtrl = 0x1000; // autonegotiation
+#endif
+    s->BasicModeCtrl = 0x1100; // full duplex, autonegotiation

    rtl8139_reset_phy(s);

@@ -3111,7 +3113,7 @@ rtl8139_pci_read(UNUSED(int func), int addr, void *priv)
        case 0x05:
            return s->pci_conf[addr & 0xFF] & 1;
        case 0x08:
-            return 0x20;
+            return RTL8139_PCI_REVID;
        case 0x09:
            return 0x0;
        case 0x0a:
--- a/src/qt/qt_mediahistorymanager.cpp
+++ b/src/qt/qt_mediahistorymanager.cpp
@@ -336,17 +336,16 @@ MediaHistoryManager::removeMissingImages(device_index_list_t &device_history)
            continue;
        }

-        char *p = checked_path.toUtf8().data();
        char temp[MAX_IMAGE_PATH_LEN -1] = { 0 };

-        if (path_abs(p)) {
-            if (strlen(p) > (MAX_IMAGE_PATH_LEN - 1))
-                fatal("removeMissingImages(): strlen(p) > 2047\n");
+        if (path_abs(checked_path.toUtf8().data())) {
+            if (checked_path.length() > (MAX_IMAGE_PATH_LEN - 1))
+                fatal("removeMissingImages(): checked_path.length() > 2047\n");
            else
-                snprintf(temp, (MAX_IMAGE_PATH_LEN - 1), "%s", p);
+                snprintf(temp, (MAX_IMAGE_PATH_LEN - 1), "%s", checked_path.toUtf8().constData());
        } else
            snprintf(temp, (MAX_IMAGE_PATH_LEN - 1), "%s%s%s", usr_path,
-                     path_get_slash(usr_path), p);
+                     path_get_slash(usr_path), checked_path.toUtf8().constData());
        path_normalize(temp);

        QString qstr = QString::fromUtf8(temp);
--- a/src/qt/qt_platform.cpp
+++ b/src/qt/qt_platform.cpp
@@ -54,6 +54,10 @@
 #    include <sys/mman.h>
 #endif

+#ifdef Q_OS_OPENBSD
+#    include <pthread_np.h>
+#endif
+
 #if 0
 static QByteArray buf;
 #endif
@@ -804,8 +808,10 @@ plat_set_thread_name(void *thread, const char *name)
    char truncated[16];
 #    endif
    strncpy(truncated, name, sizeof(truncated) - 1);
-#    ifdef Q_OS_DARWIN
+#    if defined(Q_OS_DARWIN)
    pthread_setname_np(truncated);
+#    elif defined(Q_OS_OPENBSD)
+    pthread_set_name_np(thread ? *((pthread_t *) thread) : pthread_self(), truncated);
 #    else
    pthread_setname_np(thread ? *((pthread_t *) thread) : pthread_self(), truncated);
 #    endif
--- a/src/qt/qt_progsettings.ui
+++ b/src/qt/qt_progsettings.ui
@@ -88,7 +88,7 @@
     </property>
    </widget>
   </item>
-   <item row="7" column="0" colspan="2">
+   <item row="7" column="0" colspan="3">
    <widget class="QSlider" name="horizontalSlider">
     <property name="minimum">
      <number>10</number>
--- a/src/sound/snd_adlibgold.c
+++ b/src/sound/snd_adlibgold.c
@@ -791,8 +791,8 @@ adgold_get_buffer(int32_t *buffer, int len, void *priv)
    adgold_update(adgold);

    for (c = 0; c < len * 2; c += 2) {
-        adgold_buffer[c] += ((adgold->mma_buffer[0][c >> 1] * adgold->samp_vol_l) >> 7) / 4;
-        adgold_buffer[c + 1] += ((adgold->mma_buffer[1][c >> 1] * adgold->samp_vol_r) >> 7) / 4;
+        adgold_buffer[c] = ((adgold->mma_buffer[0][c >> 1] * adgold->samp_vol_l) >> 7) / 4;
+        adgold_buffer[c + 1] = ((adgold->mma_buffer[1][c >> 1] * adgold->samp_vol_r) >> 7) / 4;
    }

    if (adgold->surround_enabled)
@@ -904,7 +904,6 @@ adgold_get_music_buffer(int32_t *buffer, int len, void *priv)
    int c;

    const int32_t *opl_buf = adgold->opl.update(adgold->opl.priv);
-    adgold_update(adgold);

    for (c = 0; c < len * 2; c += 2) {
        adgold_buffer[c] = ((opl_buf[c] * adgold->fm_vol_l) >> 7) / 2;
--- a/src/sound/snd_pas16.c
+++ b/src/sound/snd_pas16.c
@@ -1020,7 +1020,7 @@ pas16_nsc_mixer_reset(nsc_mixer_t *mixer)
    mixer->lmc1982_regs[LMC1982_REG_ISELECT] = 0x01;
    mixer->lmc1982_regs[LMC1982_REG_LES]     = 0x00;
    mixer->lmc1982_regs[LMC1982_REG_BASS]    = mixer->lmc1982_regs[LMC1982_REG_TREBLE]  = 0x06;
-    mixer->lmc1982_regs[LMC1982_REG_VOL_L]   = mixer->lmc1982_regs[LMC1982_REG_VOL_R]   = 0x28;
+    mixer->lmc1982_regs[LMC1982_REG_VOL_L]   = mixer->lmc1982_regs[LMC1982_REG_VOL_R]   = 0x00; /*0x28*/ /*Note by TC1995: otherwise the volume gets lowered too much*/
    mixer->lmc1982_regs[LMC1982_REG_MODE]    = 0x05;

    lmc1982_recalc(mixer);
--- a/src/sound/snd_sb_dsp.c
+++ b/src/sound/snd_sb_dsp.c
@@ -446,11 +446,47 @@ sb_dsp_set_mpu(sb_dsp_t *dsp, mpu_t *mpu)
        mpu401_irq_attach(mpu, sb_dsp_irq_update, sb_dsp_irq_pending, dsp);
 }

+static void
+sb_stop_dma(const sb_dsp_t *dsp)
+{
+    dma_set_drq(dsp->sb_8_dmanum, 0);
+
+    if (dsp->sb_16_dmanum != 0xff) {
+        if (dsp->sb_16_dmanum == 4)
+            dma_set_drq(dsp->sb_8_dmanum, 0);
+        else
+            dma_set_drq(dsp->sb_16_dmanum, 0);
+    }
+
+    if (dsp->sb_16_8_dmanum != 0xff)
+        dma_set_drq(dsp->sb_16_8_dmanum, 0);
+}
+
+static void
+sb_finish_dma(sb_dsp_t *dsp)
+{
+    if (dsp->ess_playback_mode) {
+        ESSreg(0xB8) &= ~0x01;
+        dma_set_drq(dsp->sb_8_dmanum, 0);
+    } else
+        sb_stop_dma(dsp);
+}
+
 void
 sb_dsp_reset(sb_dsp_t *dsp)
 {
    midi_clear_buffer();

+    if (dsp->sb_8_enable) {
+        dsp->sb_8_enable = 0;
+        sb_finish_dma(dsp);
+    }
+
+    if (dsp->sb_16_enable) {
+        dsp->sb_16_enable = 0;
+        sb_finish_dma(dsp);
+    }
+
    timer_disable(&dsp->output_timer);
    timer_disable(&dsp->input_timer);

@@ -565,22 +601,6 @@ sb_resume_dma(const sb_dsp_t *dsp, const int is_8)
    }
 }

-static void
-sb_stop_dma(const sb_dsp_t *dsp)
-{
-    dma_set_drq(dsp->sb_8_dmanum, 0);
-
-    if (dsp->sb_16_dmanum != 0xff) {
-        if (dsp->sb_16_dmanum == 4)
-            dma_set_drq(dsp->sb_8_dmanum, 0);
-        else
-            dma_set_drq(dsp->sb_16_dmanum, 0);
-    }
-
-    if (dsp->sb_16_8_dmanum != 0xff)
-        dma_set_drq(dsp->sb_16_8_dmanum, 0);
-}
-
 void
 sb_start_dma(sb_dsp_t *dsp, int dma8, int autoinit, uint8_t format, int len)
 {
@@ -2206,16 +2226,6 @@ sb_dsp_dma_attach(sb_dsp_t *dsp,
    dsp->dma_priv   = priv;
 }

-static void
-sb_finish_dma(sb_dsp_t *dsp)
-{
-    if (dsp->ess_playback_mode) {
-        ESSreg(0xB8) &= ~0x01;
-        dma_set_drq(dsp->sb_8_dmanum, 0);
-    } else
-        sb_stop_dma(dsp);
-}
-
 void
 sb_espcm_fifoctl_run(sb_dsp_t *dsp)
 {
--- a/src/sound/snd_sn76489.c
+++ b/src/sound/snd_sn76489.c
@@ -189,12 +189,6 @@ void
 sn74689_set_extra_divide(sn76489_t *sn76489, int enable)
 {
    sn76489->extra_divide = enable;
-
-    if (!enable) {
-        for (uint8_t c = 1; c < 4; c++)
-            sn76489->latch[c] &= ~(0x400 << 6);
-        sn76489->latch[0] &= ~(0x400 << 6);
-    }
 }

 void
--- a/src/unix/assets/86Box.spec
+++ b/src/unix/assets/86Box.spec
@@ -15,7 +15,7 @@
 %global romver 4.1

 Name:		86Box
-Version:	4.3
+Version:	4.2.2
 Release:	1%{?dist}
 Summary:	Classic PC emulator
 License:	GPLv2+
@@ -121,5 +121,5 @@ popd
 %{_datadir}/%{name}/roms

 %changelog
-* Sat Aug 31 Jasmine Iwanek <jriwanek[AT]gmail.com> 4.3-1
+* Sat Aug 31 Jasmine Iwanek <jriwanek[AT]gmail.com> 4.2.2-1
 - Bump release
--- a/src/unix/assets/net.86box.86Box.metainfo.xml
+++ b/src/unix/assets/net.86box.86Box.metainfo.xml
@@ -11,7 +11,7 @@
    </categories>
    <launchable type="desktop-id">net.86box.86Box.desktop</launchable>
    <releases>
-      <release version="4.3" date="2024-09-02"/>
+      <release version="4.2.2" date="2024-09-28"/>
    </releases>
    <content_rating type="oars-1.1" />
    <description>
--- a/src/video/vid_8514a.c
+++ b/src/video/vid_8514a.c
@@ -44,8 +44,6 @@

 #ifdef ATI_8514_ULTRA
 #define BIOS_MACH8_ROM_PATH  "roms/video/mach8/11301113140.BIN"
-
-static video_timings_t timing_8514ultra_isa = { .type = VIDEO_ISA, .write_b = 3, .write_w = 3, .write_l = 6, .read_b = 5, .read_w = 5, .read_l = 10 };
 #endif

 static void     ibm8514_accel_outb(uint16_t port, uint8_t val, void *priv);
@@ -2407,9 +2405,9 @@ rect_fill_pix:
                                        dev->accel.sx += (dev->accel.cur_x & 3);
                                }

-                                if (dev->accel.cmd & 0x20) {
+                                if (dev->accel.cmd & 0x20)
                                    dev->accel.cx -= (dev->accel.sx) + 1;
-                                } else
+                                else
                                    dev->accel.cx += (dev->accel.sx) + 1;

                                if (dev->accel.cmd & 2) {
@@ -3006,9 +3004,7 @@ rect_fill:
                else
                    dev->accel.oldcy = dev->accel.cy - 1;

-                dev->accel.oldcx = 0;
-
-                ibm8514_log("Polygon Boundary activated=%04x, len=%d, cur(%d,%d), frgdmix=%02x, err=%d, clipping: l=%d, r=%d, t=%d, b=%d, pixcntl=%02x.\n", dev->accel.cmd, dev->accel.sy, dev->accel.cur_x_nolimit, dev->accel.cy, dev->accel.frgd_mix & 0x1f, dev->accel.err_term, dev->accel.clip_left, clip_r, dev->accel.clip_top, clip_b, compare_mode, dev->accel.multifunc[0x0a]);
+                ibm8514_log("Polygon Boundary activated=%04x, len=%d, cur(%d,%d), frgdmix=%02x, err=%d, clipping: l=%d, r=%d, t=%d, b=%d, pixcntl=%02x.\n", dev->accel.cmd, dev->accel.sy, dev->accel.cx, dev->accel.cy, dev->accel.frgd_mix & 0x1f, dev->accel.err_term, dev->accel.multifunc[2], dev->accel.multifunc[4], dev->accel.clip_top, clip_b, dev->accel.multifunc[0x0a]);

                if (ibm8514_cpu_src(svga)) {
                    dev->data_available  = 0;
@@ -3122,10 +3118,8 @@ rect_fill:
                }
            } else {
                while (count-- && (dev->accel.sy >= 0)) {
-                    if (dev->accel.cx < 0)
-                        dev->accel.cx = 0;
-                    if (dev->accel.cy < 0)
-                        dev->accel.cy = 0;
+                    if (dev->accel.cx < dev->accel.clip_left)
+                        dev->accel.cx = dev->accel.clip_left;

                    if (dev->accel.cx >= dev->accel.clip_left && dev->accel.cx <= clip_r && dev->accel.cy >= dev->accel.clip_top && dev->accel.cy <= clip_b) {
                        switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
@@ -3155,12 +3149,8 @@ rect_fill:

                            if ((dev->accel.cmd & 0x14) == 0x14) {
                                if (dev->accel.sy) {
-                                    if (dev->accel.cmd & 0x40) {
+                                    if (dev->accel.oldcy != dev->accel.cy) {
                                        WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat);
-                                    } else {
-                                        if (dev->accel.oldcy != dev->accel.cy) {
-                                            WRITE((dev->accel.cy * dev->pitch) + dev->accel.cx, dest_dat);
-                                        }
                                    }
                                }
                            }
@@ -3178,6 +3168,7 @@ rect_fill:
                        break;

                    if (dev->accel.cmd & 0x40) {
+                        dev->accel.oldcy = dev->accel.cy;
                        if (dev->accel.cmd & 0x80)
                            dev->accel.cy++;
                        else
@@ -4159,12 +4150,12 @@ ibm8514_poll(void *priv)
    if (dev->on[0] || dev->on[1]) {
        ibm8514_log("ON!\n");
        if (!dev->linepos) {
-            if ((dev->displine == dev->hwcursor_latch.y) && dev->hwcursor_latch.ena) {
+            if ((dev->displine == ((dev->hwcursor_latch.y < 0) ? 0 : dev->hwcursor_latch.y)) && dev->hwcursor_latch.ena) {
                dev->hwcursor_on      = dev->hwcursor_latch.cur_ysize - dev->hwcursor_latch.yoff;
                dev->hwcursor_oddeven = 0;
            }

-            if ((dev->displine == (dev->hwcursor_latch.y + 1)) && dev->hwcursor_latch.ena && dev->interlace) {
+            if ((dev->displine == (((dev->hwcursor_latch.y < 0) ? 0 : dev->hwcursor_latch.y) + 1)) && dev->hwcursor_latch.ena && dev->interlace) {
                dev->hwcursor_on      = dev->hwcursor_latch.cur_ysize - (dev->hwcursor_latch.yoff + 1);
                dev->hwcursor_oddeven = 1;
            }
@@ -4195,7 +4186,7 @@ ibm8514_poll(void *priv)

                if (dev->hwcursor_on) {
                    if (svga->hwcursor_draw)
-                        svga->hwcursor_draw(svga, dev->displine + svga->y_add);
+                        svga->hwcursor_draw(svga, (dev->displine + svga->y_add + ((dev->hwcursor_latch.y >= 0) ? 0 : dev->hwcursor_latch.y)) & 2047);
                    dev->hwcursor_on--;
                    if (dev->hwcursor_on && dev->interlace)
                        dev->hwcursor_on--;
@@ -4333,15 +4324,15 @@ ibm8514_recalctimings(svga_t *svga)
            else
                svga->clock8514 = (cpuclock * (double) (1ULL << 32)) / 25175000.0;

-            if (dev->interlace)
-                dev->dispend >>= 1;
-
            if (dev->dispend == 766)
                dev->dispend += 2;

            if (dev->dispend == 478)
                dev->dispend += 2;

+            if (dev->interlace)
+                dev->dispend >>= 1;
+
            dev->pitch = 1024;
            dev->rowoffset = 0x80;
            svga->map8 = dev->pallook;
@@ -4405,6 +4396,10 @@ ibm8514_mca_reset(void *priv)
 static void *
 ibm8514_init(const device_t *info)
 {
+#ifdef ATI_8514_ULTRA
+    uint32_t bios_addr = 0;
+#endif
+
    if (svga_get_pri() == NULL)
        return NULL;

@@ -4426,6 +4421,7 @@ ibm8514_init(const device_t *info)

 #ifdef ATI_8514_ULTRA
    dev->extensions = device_get_config_int("extensions");
+    bios_addr = device_get_config_hex20("bios_addr");

    switch (dev->extensions) {
        case 1:
@@ -4446,10 +4442,14 @@ ibm8514_init(const device_t *info)
                } else {
                    rom_init(&dev->bios_rom,
                             BIOS_MACH8_ROM_PATH,
-                             0xd0000, 0x2000, 0x1fff,
+                             bios_addr, 0x1000, 0xfff,
                             0, MEM_MAPPING_EXTERNAL);
+                    rom_init(&dev->bios_rom2,
+                             BIOS_MACH8_ROM_PATH,
+                             bios_addr + 0x1000, 0x800, 0x7ff,
+                             0x1000, MEM_MAPPING_EXTERNAL);
                    ati_eeprom_load(&mach->eeprom, "ati8514.nvr", 0);
-                    dev->bios_addr = dev->bios_rom.mapping.base;
+                    mach->accel.scratch0 = (((bios_addr >> 7) - 0x1000) >> 4);
                }
                ati8514_init(svga, svga->ext8514, svga->dev8514);
                break;
@@ -4538,6 +4538,30 @@ static const device_config_t ext8514_config[] = {
            }
        }
    },
+    {
+        .name = "bios_addr",
+        .description = "BIOS address",
+        .type = CONFIG_HEX20,
+        .default_string = "",
+        .default_int = 0xc8000,
+        .file_filter = "",
+        .spinner = { 0 },
+        .selection = {
+            { .description = "C800h", .value = 0xc8000 },
+            { .description = "CA00h", .value = 0xca000 },
+            { .description = "CC00h", .value = 0xcc000 },
+            { .description = "CE00h", .value = 0xce000 },
+            { .description = "D000h", .value = 0xd0000 },
+            { .description = "D200h", .value = 0xd2000 },
+            { .description = "D400h", .value = 0xd4000 },
+            { .description = "D600h", .value = 0xd6000 },
+            { .description = "D800h", .value = 0xd8000 },
+            { .description = "DA00h", .value = 0xda000 },
+            { .description = "DC00h", .value = 0xdc000 },
+            { .description = "DE00h", .value = 0xde000 },
+            { .description = ""                      }
+        },
+    },
    {
        .type = CONFIG_END
    }
--- a/src/video/vid_ati_mach8.c
+++ b/src/video/vid_ati_mach8.c
@@ -37,6 +37,7 @@
 #include <86box/i2c.h>
 #include <86box/vid_ddc.h>
 #include <86box/vid_8514a.h>
+#include <86box/vid_xga.h>
 #include <86box/vid_svga.h>
 #include <86box/vid_svga_render.h>
 #include <86box/vid_ati_eeprom.h>
@@ -2478,11 +2479,13 @@ ati8514_recalctimings(svga_t *svga)
            dev->dispend = dev->vdisp;
        }

-        if (dev->accel.advfunc_cntl & 0x04) {
+        if (dev->accel.advfunc_cntl & 0x04)
            svga->clock8514 = (cpuclock * (double) (1ULL << 32)) / 44900000.0;
-        } else {
+        else
            svga->clock8514 = (cpuclock * (double) (1ULL << 32)) / 25175000.0;
-        }
+
+        if (dev->interlace)
+            dev->dispend >>= 1;

        if (dev->dispend == 766)
            dev->dispend += 2;
@@ -2592,6 +2595,8 @@ mach_recalctimings(svga_t *svga)
        }

        svga->clock8514 = (cpuclock * (double) (1ULL << 32)) / svga->getclock((mach->accel.clock_sel >> 2) & 0x0f, svga->clock_gen);
+        if (mach->accel.clock_sel & 0x40)
+            svga->clock8514 *= 2;

        if (dev->interlace)
            dev->dispend >>= 1;
@@ -3454,7 +3459,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u
 static void
 mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8514_t *dev)
 {
-    if (port != 0x7aee && port != 0x7aef && port != 0x42e8 && port != 0x42e9 && port != 0x46e8 && port != 0x46e9)
+    if (port != 0x7aee && port != 0x7aef && port != 0x42e8 && port != 0x42e9)
        mach_log("[%04X:%08X]: Port CALL OUT=%04x, val=%02x.\n", CS, cpu_state.pc, port, val);

    switch (port) {
@@ -3532,13 +3537,14 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8
        case 0xaef:
            WRITE8(port, mach->cursor_offset_lo_reg, val);
            mach->cursor_offset_lo = mach->cursor_offset_lo_reg;
+            dev->hwcursor.addr = ((mach->cursor_offset_lo | (mach->cursor_offset_hi << 16)) << 2);
            break;

        case 0xeee:
        case 0xeef:
            WRITE8(port, mach->cursor_offset_hi_reg, val);
            mach->cursor_offset_hi = mach->cursor_offset_hi_reg & 0x0f;
-            dev->hwcursor.addr = (mach->cursor_offset_lo | (mach->cursor_offset_hi << 16)) << 2;
+            dev->hwcursor.addr = ((mach->cursor_offset_lo | (mach->cursor_offset_hi << 16)) << 2);
            dev->hwcursor.ena = !!(mach->cursor_offset_hi_reg & 0x8000);
            break;

@@ -4287,26 +4293,6 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev)
        case 0x52ee:
        case 0x52ef:
            READ8(port, mach->accel.scratch0);
-#ifdef ATI_8514_ULTRA
-            if (mach->mca_bus) {
-                if (!(port & 1)) {
-                    if (svga->ext8514 != NULL)
-                        temp = dev->pos_regs[4];
-                } else {
-                    if (svga->ext8514 != NULL)
-                        temp = dev->pos_regs[5];
-                }
-            } else {
-                if (svga->ext8514 != NULL) {
-                    temp = ((dev->bios_addr >> 7) - 0x1000) >> 4;
-                    if (port & 1) {
-                        temp &= ~0x80;
-                        temp |= 0x01;
-                    }
-                } else
-                    temp = 0x00;
-            }
-#endif
            break;

        case 0x56ee:
@@ -4365,7 +4351,7 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev)
        default:
            break;
    }
-    if (port != 0x62ee && port != 0x62ef && port != 0x42e8 && port != 0x42e9)
+    if (port != 0x62ee && port != 0x62ef && port != 0x42e8 && port != 0x42e9 && port != 0x02e8 && port != 0x02e9)
        mach_log("[%04X:%08X]: Port NORMAL IN=%04x, temp=%04x.\n", CS, cpu_state.pc, port, temp);

    return temp;
@@ -4633,14 +4619,12 @@ mach32_write_common(uint32_t addr, uint8_t val, int linear, mach_t *mach, svga_t
    cycles -= svga->monitor->mon_video_timing_write_b;

    if (linear) {
-        addr &= svga->decode_mask;
-        if (addr >= dev->vram_size)
-            return;
        addr &= dev->vram_mask;
        dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
        dev->vram[addr]              = val;
        return;
    } else {
+        xga_write_test(addr, val, svga);
        addr = mach32_decode_addr(svga, addr, 1);
        if (addr == 0xffffffff)
            return;
@@ -4825,9 +4809,6 @@ mach32_writew_linear(uint32_t addr, uint16_t val, mach_t *mach)

    cycles -= svga->monitor->mon_video_timing_write_w;

-    addr &= svga->decode_mask;
-    if (addr >= dev->vram_size)
-        return;
    addr &= dev->vram_mask;
    dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
    *(uint16_t *) &dev->vram[addr] = val;
@@ -4841,9 +4822,6 @@ mach32_writel_linear(uint32_t addr, uint32_t val, mach_t *mach)

    cycles -= svga->monitor->mon_video_timing_write_l;

-    addr &= svga->decode_mask;
-    if (addr >= dev->vram_size)
-        return;
    addr &= dev->vram_mask;
    dev->changedvram[addr >> 12] = svga->monitor->mon_changeframecount;
    *(uint32_t *) &dev->vram[addr] = val;
@@ -4862,12 +4840,9 @@ mach32_read_common(uint32_t addr, int linear, mach_t *mach, svga_t *svga)
    cycles -= svga->monitor->mon_video_timing_read_b;

    if (linear) {
-        addr &= svga->decode_mask;
-        if (addr >= dev->vram_size)
-            return 0xff;
-
        return dev->vram[addr & dev->vram_mask];
    } else {
+        (void) xga_read_test(addr, svga);
        addr = mach32_decode_addr(svga, addr, 0);
        if (addr == 0xffffffff)
            return 0xff;
@@ -5022,10 +4997,6 @@ mach32_readw_linear(uint32_t addr, mach_t *mach)

    cycles -= svga->monitor->mon_video_timing_read_w;

-    addr &= svga->decode_mask;
-    if (addr >= dev->vram_size)
-        return 0xffff;
-
    return *(uint16_t *) &dev->vram[addr & dev->vram_mask];
 }

@@ -5037,10 +5008,6 @@ mach32_readl_linear(uint32_t addr, mach_t *mach)

    cycles -= svga->monitor->mon_video_timing_read_l;

-    addr &= svga->decode_mask;
-    if (addr >= dev->vram_size)
-        return 0xffffffff;
-
    return *(uint32_t *) &dev->vram[addr & dev->vram_mask];
 }

@@ -5294,7 +5261,7 @@ mach32_hwcursor_draw(svga_t *svga, int displine)
    int           x_pos;
    int           y_pos;

-    mach_log("BPP=%d.\n", dev->accel_bpp);
+    mach_log("BPP=%d, displine=%d.\n", dev->accel_bpp, displine);
    switch (dev->accel_bpp) {
        default:
        case 8:
@@ -5888,7 +5855,7 @@ mach8_init(const device_t *info)
            else
                mach->config1 |= 0x0c;
            mach->config1 |= 0x0400;
-            svga->clock_gen = device_add(&ati18811_0_device);
+            svga->clock_gen = device_add(&ati18811_1_device);
        } else if (mach->mca_bus) {
            video_inform(VIDEO_FLAG_TYPE_8514, &timing_mach32_mca);
            if (is286 && !is386)
@@ -5905,11 +5872,11 @@ mach8_init(const device_t *info)
            else
                mach->config1 |= 0x0a00;
            mach->config2 |= 0x2000;
-            svga->clock_gen = device_add(&ati18811_0_device);
+            svga->clock_gen = device_add(&ati18811_1_device);
        } else {
            video_inform(VIDEO_FLAG_TYPE_8514, &timing_gfxultra_isa);
            mach->config1 |= 0x0400;
-            svga->clock_gen = device_add(&ati18811_0_device);
+            svga->clock_gen = device_add(&ati18811_1_device);
        }
        mem_mapping_add(&mach->mmio_linear_mapping, 0, 0, mach32_ap_readb, mach32_ap_readw, mach32_ap_readl, mach32_ap_writeb, mach32_ap_writew, mach32_ap_writel, NULL, MEM_MAPPING_EXTERNAL, mach);
        mem_mapping_disable(&mach->mmio_linear_mapping);
@@ -5926,7 +5893,7 @@ mach8_init(const device_t *info)
        video_inform(VIDEO_FLAG_TYPE_8514, &timing_gfxultra_isa);
        mach->config1 = 0x01 | 0x02 | 0x20 | 0x08 | 0x80;
        mach->config2 = 0x02;
-        svga->clock_gen = device_add(&ati18810_device);
+        svga->clock_gen = device_add(&ati18811_0_device);
    }
    dev->bpp            = 0;
    svga->getclock      = ics2494_getclock;
--- a/src/video/vid_cga.c
+++ b/src/video/vid_cga.c
@@ -70,6 +70,15 @@ static video_timings_t timing_cga = { .type = VIDEO_ISA, .write_b = 8, .write_w

 void cga_recalctimings(cga_t *cga);

+static void
+cga_update_latch(cga_t *cga)
+{
+    uint32_t lp_latch = cga->displine * cga->crtc[1];
+
+    cga->crtc[0x10] = (lp_latch >> 8) & 0x3f;
+    cga->crtc[0x11] = lp_latch & 0xff;
+}
+
 void
 cga_out(uint16_t addr, uint8_t val, void *priv)
 {
@@ -87,7 +96,7 @@ cga_out(uint16_t addr, uint8_t val, void *priv)
            old                     = cga->crtc[cga->crtcreg];
            cga->crtc[cga->crtcreg] = val & crtcmask[cga->crtcreg];
            if (old != val) {
-                if ((cga->crtcreg < 0xe) || (cga->crtcreg > 0x10)) {
+                if ((cga->crtcreg < 0xe) || (cga->crtcreg > 0x11)) {
                    cga->fullchange = changeframecount;
                    cga_recalctimings(cga);
                }
@@ -111,6 +120,17 @@ cga_out(uint16_t addr, uint8_t val, void *priv)
                cga_recalctimings(cga);
            return;

+        case 0x3DB:
+            if (cga->lp_strobe == 1)
+                cga->lp_strobe = 0;
+            return;
+        case 0x3DC:
+            if (cga->lp_strobe == 0) {
+                cga->lp_strobe = 1;
+                cga_update_latch(cga);
+            }
+            return;
+
        default:
            break;
    }
@@ -119,8 +139,7 @@ cga_out(uint16_t addr, uint8_t val, void *priv)
 uint8_t
 cga_in(uint16_t addr, void *priv)
 {
-    const cga_t *cga = (cga_t *) priv;
-
+    cga_t  *cga = (cga_t *) priv;
    uint8_t ret = 0xff;

    if ((addr >= 0x3d0) && (addr <= 0x3d7))
@@ -137,6 +156,17 @@ cga_in(uint16_t addr, void *priv)
            ret = cga->cgastat;
            break;

+        case 0x3DB:
+            if (cga->lp_strobe == 1)
+                cga->lp_strobe = 0;
+            break;
+        case 0x3DC:
+            if (cga->lp_strobe == 0) {
+                cga->lp_strobe = 1;
+                cga_update_latch(cga);
+            }
+            break;
+
        default:
            break;
    }
--- a/src/video/vid_cl54xx.c
+++ b/src/video/vid_cl54xx.c
@@ -37,6 +37,7 @@
 #include <86box/video.h>
 #include <86box/i2c.h>
 #include <86box/vid_ddc.h>
+#include <86box/vid_xga.h>
 #include <86box/vid_svga.h>
 #include <86box/vid_svga_render.h>
 #include <86box/plat_fallthrough.h>
@@ -2195,6 +2196,8 @@ gd54xx_write(uint32_t addr, uint8_t val, void *priv)
        return;
    }

+    xga_write_test(addr, val, svga);
+
    addr &= svga->banked_mask;
    addr = (addr & 0x7fff) + svga->extra_banks[(addr >> 15) & 1];
    svga_write_linear(addr, val, svga);
@@ -2212,6 +2215,9 @@ gd54xx_writew(uint32_t addr, uint16_t val, void *priv)
        return;
    }

+    xga_write_test(addr, val, svga);
+    xga_write_test(addr + 1, val >> 8, svga);
+
    addr &= svga->banked_mask;
    addr = (addr & 0x7fff) + svga->extra_banks[(addr >> 15) & 1];

@@ -2237,6 +2243,11 @@ gd54xx_writel(uint32_t addr, uint32_t val, void *priv)
        return;
    }

+    xga_write_test(addr, val, svga);
+    xga_write_test(addr + 1, val >> 8, svga);
+    xga_write_test(addr + 2, val >> 16, svga);
+    xga_write_test(addr + 3, val >> 24, svga);
+
    addr &= svga->banked_mask;
    addr = (addr & 0x7fff) + svga->extra_banks[(addr >> 15) & 1];

@@ -2762,6 +2773,8 @@ gd54xx_read(uint32_t addr, void *priv)
    if (gd54xx->countminusone && gd54xx->blt.ms_is_dest && !(gd54xx->blt.status & CIRRUS_BLT_PAUSED))
        return gd54xx_mem_sys_dest_read(gd54xx, 0);

+    (void) xga_read_test(addr, svga);
+
    addr &= svga->banked_mask;
    addr = (addr & 0x7fff) + svga->extra_banks[(addr >> 15) & 1];
    return svga_read_linear(addr, svga);
@@ -2780,6 +2793,9 @@ gd54xx_readw(uint32_t addr, void *priv)
        return ret;
    }

+    (void) xga_read_test(addr, svga);
+    (void) xga_read_test(addr + 1, svga);
+
    addr &= svga->banked_mask;
    addr = (addr & 0x7fff) + svga->extra_banks[(addr >> 15) & 1];
    return svga_readw_linear(addr, svga);
@@ -2800,6 +2816,11 @@ gd54xx_readl(uint32_t addr, void *priv)
        return ret;
    }

+    (void) xga_read_test(addr, svga);
+    (void) xga_read_test(addr + 1, svga);
+    (void) xga_read_test(addr + 2, svga);
+    (void) xga_read_test(addr + 3, svga);
+
    addr &= svga->banked_mask;
    addr = (addr & 0x7fff) + svga->extra_banks[(addr >> 15) & 1];
    return svga_readl_linear(addr, svga);
@@ -3826,6 +3847,16 @@ cl_pci_read(UNUSED(int func), int addr, void *priv)
                ret = (svga->crtc[0x27] == CIRRUS_ID_CLGD5480) ? ((gd54xx->vgablt_base >> 24) & 0xff) : 0x00;
                break;

+            case 0x2c:
+                ret = (svga->crtc[0x27] == CIRRUS_ID_CLGD5480) ? gd54xx->bios_rom.rom[0x7ffc] : 0x00;
+                break;
+            case 0x2d:
+                ret = (svga->crtc[0x27] == CIRRUS_ID_CLGD5480) ? gd54xx->bios_rom.rom[0x7ffd] : 0x00;
+                break;
+            case 0x2e:
+                ret = (svga->crtc[0x27] == CIRRUS_ID_CLGD5480) ? gd54xx->bios_rom.rom[0x7ffe] : 0x00;
+                break;
+
            case 0x30:
                ret = (gd54xx->pci_regs[0x30] & 0x01); /*BIOS ROM address*/
                break;
--- a/src/video/vid_et4000.c
+++ b/src/video/vid_et4000.c
@@ -125,15 +125,6 @@ et4000_in(uint16_t addr, void *priv)
        addr ^= 0x60;

    switch (addr) {
-        case 0x3c2:
-            if (dev->type == ET4000_TYPE_MCA) {
-                if ((svga->vgapal[0].r + svga->vgapal[0].g + svga->vgapal[0].b) >= 0x4e)
-                    return 0;
-                else
-                    return 0x10;
-            }
-            break;
-
        case 0x3c5:
            if ((svga->seqaddr & 0xf) == 7)
                return svga->seqregs[svga->seqaddr & 0xf] | 4;
@@ -770,12 +761,16 @@ et4000_mca_write(int port, uint8_t val, void *priv)

    /* Save the MCA register value. */
    et4000->pos_regs[port & 7] = val;
+    mem_mapping_disable(&et4000->bios_rom.mapping);
+    if (et4000->pos_regs[2] & 1)
+        mem_mapping_enable(&et4000->bios_rom.mapping);
 }

 static uint8_t
 et4000_mca_feedb(UNUSED(void *priv))
 {
-    return 1;
+    et4000_t *et4000 = (et4000_t *) priv;
+    return et4000->pos_regs[2] & 1;
 }

 static void *
@@ -889,7 +884,10 @@ et4000_init(const device_t *info)
    dev->vram_mask = dev->vram_size - 1;

    rom_init(&dev->bios_rom, fn,
-             0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
+        0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
+
+    if (dev->type == ET4000_TYPE_MCA)
+        mem_mapping_disable(&dev->bios_rom.mapping);

    dev->svga.translate_address = get_et4000_addr;

--- a/src/video/vid_ht216.c
+++ b/src/video/vid_ht216.c
@@ -33,6 +33,7 @@
 #include <86box/rom.h>
 #include <86box/device.h>
 #include <86box/video.h>
+#include <86box/vid_xga.h>
 #include <86box/vid_svga.h>
 #include <86box/vid_svga_render.h>
 #include <86box/plat_fallthrough.h>
@@ -1217,6 +1218,8 @@ ht216_write(uint32_t addr, uint8_t val, void *priv)
    svga_t  *svga      = &ht216->svga;
    uint32_t prev_addr = addr;

+    xga_write_test(addr, val, svga);
+
    addr &= svga->banked_mask;
    addr = (addr & 0x7fff) + ht216->write_banks[(addr >> 15) & 1];

@@ -1238,6 +1241,9 @@ ht216_writew(uint32_t addr, uint16_t val, void *priv)
    svga_t  *svga      = &ht216->svga;
    uint32_t prev_addr = addr;

+    xga_write_test(addr, val, svga);
+    xga_write_test(addr + 1, val >> 8, svga);
+
    addr &= svga->banked_mask;
    addr = (addr & 0x7fff) + ht216->write_banks[(addr >> 15) & 1];

@@ -1261,6 +1267,11 @@ ht216_writel(uint32_t addr, uint32_t val, void *priv)
    svga_t  *svga      = &ht216->svga;
    uint32_t prev_addr = addr;

+    xga_write_test(addr, val, svga);
+    xga_write_test(addr + 1, val >> 8, svga);
+    xga_write_test(addr + 2, val >> 16, svga);
+    xga_write_test(addr + 3, val >> 24, svga);
+
    addr &= svga->banked_mask;
    addr = (addr & 0x7fff) + ht216->write_banks[(addr >> 15) & 1];

@@ -1422,9 +1433,11 @@ static uint8_t
 ht216_read(uint32_t addr, void *priv)
 {
    ht216_t      *ht216     = (ht216_t *) priv;
-    const svga_t *svga      = &ht216->svga;
+    svga_t       *svga      = &ht216->svga;
    uint32_t      prev_addr = addr;

+    (void) xga_read_test(addr, svga);
+
    addr &= svga->banked_mask;
    addr = (addr & 0x7fff) + ht216->read_banks[(addr >> 15) & 1];

--- a/src/video/vid_paradise.c
+++ b/src/video/vid_paradise.c
@@ -204,6 +204,14 @@ paradise_out(uint16_t addr, uint8_t val, void *priv)
                    return;
                case 0x0b:
                    svga->gdcreg[0x0b] = val;
+                    svga->gdcreg[0x0b] &= ~0xc0;
+                    if (paradise->memory == 1024)
+                        svga->gdcreg[0x0b] |= 0xc0;
+                    else if (paradise->memory == 512)
+                        svga->gdcreg[0x0b] |= 0x80;
+                    else
+                        svga->gdcreg[0x0b] |= 0x40;
+
                    paradise_remap(paradise);
                    return;
                case 0x0e:
@@ -282,6 +290,7 @@ paradise_remap(paradise_t *paradise)
        paradise->write_bank[1] = paradise->write_bank[3] = (svga->gdcreg[9] << 12) + ((svga->gdcreg[6] & 0x08) ? 0 : 0x8000);
    }

+    /*There are separate drivers for 1M and 512K/256K versions of the PVGA chips.*/
    if ((svga->gdcreg[0x0b] & 0xc0) < 0xc0) {
        paradise->read_bank[1] &= 0x7ffff;
        paradise->write_bank[1] &= 0x7ffff;
@@ -482,7 +491,7 @@ paradise_readw(uint32_t addr, void *priv)
 }

 void *
-paradise_init(const device_t *info, uint32_t memsize)
+paradise_init(const device_t *info, uint32_t memory)
 {
    paradise_t *paradise = malloc(sizeof(paradise_t));
    svga_t     *svga     = &paradise->svga;
@@ -493,35 +502,35 @@ paradise_init(const device_t *info, uint32_t memsize)
    else
        video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_paradise_wd90c);

-    paradise->memory = memsize >> 10;
+    paradise->memory = memory;

    switch (info->local) {
        case PVGA1A:
-            svga_init(info, svga, paradise, memsize, /*256kb*/
+            svga_init(info, svga, paradise, (memory << 10), /*256kb default*/
                      paradise_recalctimings,
                      paradise_in, paradise_out,
                      NULL,
                      NULL);
-            paradise->vram_mask = memsize - 1;
-            svga->decode_mask   = memsize - 1;
+            paradise->vram_mask = (memory << 10) - 1;
+            svga->decode_mask   = (memory << 10) - 1;
            break;
        case WD90C11:
-            svga_init(info, svga, paradise, 1 << 19, /*512kb*/
+            svga_init(info, svga, paradise, (memory << 10), /*512kb default*/
                      paradise_recalctimings,
                      paradise_in, paradise_out,
                      NULL,
                      NULL);
-            paradise->vram_mask = (1 << 19) - 1;
-            svga->decode_mask   = (1 << 19) - 1;
+            paradise->vram_mask = (memory << 10) - 1;
+            svga->decode_mask   = (memory << 10) - 1;
            break;
        case WD90C30:
-            svga_init(info, svga, paradise, memsize,
+            svga_init(info, svga, paradise, (memory << 10),
                      paradise_recalctimings,
                      paradise_in, paradise_out,
                      NULL,
                      NULL);
-            paradise->vram_mask = memsize - 1;
-            svga->decode_mask   = memsize - 1;
+            paradise->vram_mask = (memory << 10) - 1;
+            svga->decode_mask   = (memory << 10) - 1;
            svga->ramdac        = device_add(&sc11487_ramdac_device); /*Actually a Winbond W82c487-80, probably a clone.*/
            break;

@@ -566,7 +575,7 @@ paradise_init(const device_t *info, uint32_t memsize)
 static void *
 paradise_pvga1a_ncr3302_init(const device_t *info)
 {
-    paradise_t *paradise = paradise_init(info, 1 << 18);
+    paradise_t *paradise = paradise_init(info, 256);

    if (paradise)
        rom_init(&paradise->bios_rom, "roms/machines/3302/c000-wd_1987-1989-740011-003058-019c.bin", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
@@ -577,7 +586,7 @@ paradise_pvga1a_ncr3302_init(const device_t *info)
 static void *
 paradise_pvga1a_pc2086_init(const device_t *info)
 {
-    paradise_t *paradise = paradise_init(info, 1 << 18);
+    paradise_t *paradise = paradise_init(info, 256);

    if (paradise)
        rom_init(&paradise->bios_rom, "roms/machines/pc2086/40186.ic171", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
@@ -588,7 +597,7 @@ paradise_pvga1a_pc2086_init(const device_t *info)
 static void *
 paradise_pvga1a_pc3086_init(const device_t *info)
 {
-    paradise_t *paradise = paradise_init(info, 1 << 18);
+    paradise_t *paradise = paradise_init(info, 256);

    if (paradise)
        rom_init(&paradise->bios_rom, "roms/machines/pc3086/c000.bin", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
@@ -600,12 +609,9 @@ static void *
 paradise_pvga1a_standalone_init(const device_t *info)
 {
    paradise_t *paradise;
-    uint32_t    memory = 512;
+    uint32_t memsize = device_get_config_int("memory");

-    memory = device_get_config_int("memory");
-    memory <<= 10;
-
-    paradise = paradise_init(info, memory);
+    paradise = paradise_init(info, memsize);

    if (paradise)
        rom_init(&paradise->bios_rom, "roms/video/pvga1a/BIOS.BIN", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
@@ -622,7 +628,7 @@ paradise_pvga1a_standalone_available(void)
 static void *
 paradise_wd90c11_megapc_init(const device_t *info)
 {
-    paradise_t *paradise = paradise_init(info, 0);
+    paradise_t *paradise = paradise_init(info, 512);

    if (paradise)
        rom_init_interleaved(&paradise->bios_rom,
@@ -636,7 +642,7 @@ paradise_wd90c11_megapc_init(const device_t *info)
 static void *
 paradise_wd90c11_standalone_init(const device_t *info)
 {
-    paradise_t *paradise = paradise_init(info, 0);
+    paradise_t *paradise = paradise_init(info, 512);

    if (paradise)
        rom_init(&paradise->bios_rom, "roms/video/wd90c11/WD90C11.VBI", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
@@ -654,12 +660,9 @@ static void *
 paradise_wd90c30_standalone_init(const device_t *info)
 {
    paradise_t *paradise;
-    uint32_t    memory = 512;
+    uint32_t memsize = device_get_config_int("memory");

-    memory = device_get_config_int("memory");
-    memory <<= 10;
-
-    paradise = paradise_init(info, memory);
+    paradise = paradise_init(info, memsize);

    if (paradise)
        rom_init(&paradise->bios_rom, "roms/video/wd90c30/90C30-LR.VBI", 0xc0000, 0x8000, 0x7fff, 0, MEM_MAPPING_EXTERNAL);
@@ -818,6 +821,10 @@ static const device_config_t paradise_wd90c30_config[] = {
        .type = CONFIG_SELECTION,
        .default_int = 1024,
        .selection = {
+            {
+                .description = "256 kB",
+                .value = 256
+            },
            {
                .description = "512 kB",
                .value = 512
--- a/src/video/vid_s3.c
+++ b/src/video/vid_s3.c
--- a/src/video/vid_svga.c
+++ b/src/video/vid_svga.c
@@ -559,11 +559,12 @@ svga_set_ramdac_type(svga_t *svga, int type)
            }
            if (xga_active && xga) {
                if (svga->ramdac_type == RAMDAC_8BIT)
-                    xga->pallook[c] = makecol32(svga->vgapal[c].r, svga->vgapal[c].g, svga->vgapal[c].b);
-                else
-                    xga->pallook[c] = makecol32((svga->vgapal[c].r & 0x3f) * 4,
-                                                 (svga->vgapal[c].g & 0x3f) * 4,
-                                                 (svga->vgapal[c].b & 0x3f) * 4);
+                    xga->pallook[c] = makecol32(xga->xgapal[c].r, xga->xgapal[c].g, xga->xgapal[c].b);
+                else {
+                    xga->pallook[c] = makecol32((xga->xgapal[c].r & 0x3f) * 4,
+                                                 (xga->xgapal[c].g & 0x3f) * 4,
+                                                 (xga->xgapal[c].b & 0x3f) * 4);
+                }
            }
            if (svga->ramdac_type == RAMDAC_8BIT)
                svga->pallook[c] = makecol32(svga->vgapal[c].r, svga->vgapal[c].g, svga->vgapal[c].b);
@@ -669,11 +670,11 @@ svga_recalctimings(svga_t *svga)
        }

        if (!(svga->gdcreg[6] & 1) && !(svga->attrregs[0x10] & 1)) { /*Text mode*/
-            if (svga->seqregs[1] & 8) {                              /*40 column*/
+            if (svga->seqregs[1] & 8) {                             /*40 column*/
                svga->render = svga_render_text_40;
-            } else {
+            } else
                svga->render = svga_render_text_80;
-            }
+
            svga->hdisp_old = svga->hdisp;
        } else {
            svga->hdisp_old = svga->hdisp;
@@ -1036,7 +1037,7 @@ svga_poll(void *priv)
    if (!svga->override) {
        if (xga_active && xga && xga->on) {
            if ((xga->disp_cntl_2 & 7) >= 2) {
-                xga_poll(xga, svga);
+                xga_poll(svga);
                return;
            }
        }
@@ -1407,7 +1408,7 @@ svga_close(svga_t *svga)
    svga_pri = NULL;
 }

-static uint32_t
+uint32_t
 svga_decode_addr(svga_t *svga, uint32_t addr, int write)
 {
    int memory_map_mode = (svga->gdcreg[6] >> 2) & 3;
@@ -1448,7 +1449,6 @@ static __inline void
 svga_write_common(uint32_t addr, uint8_t val, uint8_t linear, void *priv)
 {
    svga_t *svga       = (svga_t *) priv;
-    xga_t  *xga        = (xga_t *) svga->xga;
    int     writemask2 = svga->writemask;
    int     reset_wm   = 0;
    latch_t vall;
@@ -1462,40 +1462,7 @@ svga_write_common(uint32_t addr, uint8_t val, uint8_t linear, void *priv)
    cycles -= svga->monitor->mon_video_timing_write_b;

    if (!linear) {
-        if (xga_active && xga) {
-            if (((xga->op_mode & 7) >= 4) && (xga->aperture_cntl >= 1)) {
-                if (val == 0xa5) { /*Memory size test of XGA*/
-                    xga->test    = val;
-                    if (addr == 0xa0001)
-                        xga->a5_test = 1;
-                    else if (addr == 0xafffe)
-                        xga->a5_test = 2;
-
-                    xga->on = 0;
-                    vga_on = 1;
-                    xga->disp_cntl_2 = 0;
-                    svga_log("XGA test1 addr = %05x.\n", addr);
-                    return;
-                } else if (val == 0x5a) {
-                    xga->test = val;
-                    xga->on = 0;
-                    vga_on = 1;
-                    xga->disp_cntl_2 = 0;
-                    svga_log("XGA test2 addr = %05x.\n", addr);
-                    return;
-                } else if ((addr == 0xa0000) || (addr == 0xa0010)) {
-                    addr += xga->write_bank;
-                    xga->vram[addr & xga->vram_mask] = val;
-                    svga_log("XGA Linear endian reverse write, val = %02x, addr = %05x, banked mask = %04x.\n", val, addr, svga->banked_mask);
-                    if (!xga->a5_test)
-                        xga->linear_endian_reverse = 1;
-                    return;
-                }
-            } else {
-                xga->on = 0;
-                vga_on = 1;
-            }
-        }
+        xga_write_test(addr, val, svga);
        addr = svga_decode_addr(svga, addr, 1);

        if (addr == 0xffffffff)
@@ -1670,12 +1637,11 @@ static __inline uint8_t
 svga_read_common(uint32_t addr, uint8_t linear, void *priv)
 {
    svga_t  *svga       = (svga_t *) priv;
-    xga_t   *xga        = (xga_t *) svga->xga;
    uint32_t latch_addr = 0;
    int      readplane  = svga->readplane;
    uint8_t  count;
    uint8_t  temp;
-    uint8_t  ret;
+    uint8_t  ret = 0x00;

    if (svga->adv_flags & FLAG_ADDR_BY8)
        readplane = svga->gdcreg[4] & 7;
@@ -1683,39 +1649,7 @@ svga_read_common(uint32_t addr, uint8_t linear, void *priv)
    cycles -= svga->monitor->mon_video_timing_read_b;

    if (!linear) {
-        if (xga_active && xga) {
-            if (((xga->op_mode & 7) >= 4) && (xga->aperture_cntl >= 1)) {
-                if (xga->test == 0xa5) { /*Memory size test of XGA*/
-                    if (addr == 0xa0001) {
-                        ret = xga->test;
-                        xga->on = 1;
-                        vga_on = 0;
-                    } else if ((addr == 0xa0000) && (xga->a5_test == 1)) { /*This is required by XGAKIT to pass the memory test*/
-                        svga_log("A5 test bank = %x.\n", addr);
-                        addr += xga->read_bank;
-                        ret = xga->vram[addr & xga->vram_mask];
-                    } else {
-                        ret = xga->test;
-                        xga->on = 1;
-                        vga_on = 0;
-                    }
-                    svga_log("A5 read: XGA ON = %d, addr = %05x, ret = %02x, test1 = %x.\n", xga->on, addr, ret, xga->a5_test);
-                    return ret;
-                } else if (xga->test == 0x5a) {
-                    ret = xga->test;
-                    xga->on = 1;
-                    vga_on = 0;
-                    svga_log("5A read: XGA ON = %d.\n", xga->on);
-                    return ret;
-                } else if ((addr == 0xa0000) || (addr == 0xa0010)) {
-                    addr += xga->read_bank;
-                    return xga->vram[addr & xga->vram_mask];
-                }
-            } else {
-                xga->on = 0;
-                vga_on = 1;
-            }
-        }
+        (void) xga_read_test(addr, svga);
        addr = svga_decode_addr(svga, addr, 0);

        if (addr == 0xffffffff)
--- a/src/video/vid_vga.c
+++ b/src/video/vid_vga.c
@@ -31,6 +31,7 @@
 #include <86box/vid_svga.h>
 #include <86box/vid_vga.h>

+static video_timings_t timing_vga = { .type = VIDEO_ISA, .write_b = 8, .write_w = 16, .write_l = 32, .read_b = 8, .read_w = 16, .read_l = 32 };
 static video_timings_t timing_ps1_svga_isa = { .type = VIDEO_ISA, .write_b = 6, .write_w = 8, .write_l = 16, .read_b = 6, .read_w = 8, .read_l = 16 };
 static video_timings_t timing_ps1_svga_mca = { .type = VIDEO_MCA, .write_b = 6, .write_w = 8, .write_l = 16, .read_b = 6, .read_w = 8, .read_l = 16 };

@@ -207,7 +208,7 @@ const device_t ps1vga_device = {
    .init          = ps1vga_init,
    .close         = vga_close,
    .reset         = NULL,
-    { .available = vga_available },
+    { .available = NULL },
    .speed_changed = vga_speed_changed,
    .force_redraw  = vga_force_redraw,
    .config        = NULL
@@ -221,7 +222,7 @@ const device_t ps1vga_mca_device = {
    .init          = ps1vga_init,
    .close         = vga_close,
    .reset         = NULL,
-    { .available = vga_available },
+    { .available = NULL },
    .speed_changed = vga_speed_changed,
    .force_redraw  = vga_force_redraw,
    .config        = NULL
--- a/src/video/vid_voodoo_fb.c
+++ b/src/video/vid_voodoo_fb.c
@@ -373,6 +373,26 @@ voodoo_fb_writel(uint32_t addr, uint32_t val, void *priv)
            addr >>= 1;
            break;

+        case LFB_FORMAT_DEPTH_RGB565:
+            colour_data[0] = rgb565[val & 0xffff];
+            depth_data[0]  = val >> 16;
+            write_mask     = LFB_WRITE_BOTH;
+            count          = 1;
+            break;
+        case LFB_FORMAT_DEPTH_RGB555:
+            colour_data[0] = argb1555[val & 0xffff];
+            depth_data[0]  = val >> 16;
+            write_mask     = LFB_WRITE_BOTH;
+            count          = 1;
+            break;
+        case LFB_FORMAT_DEPTH_ARGB1555:
+            colour_data[0] = argb1555[val & 0xffff];
+            alpha_data[0]  = colour_data[0].a;
+            depth_data[0]  = val >> 16;
+            write_mask     = LFB_WRITE_BOTH;
+            count          = 1;
+            break;
+
        case LFB_FORMAT_DEPTH:
            depth_data[0] = val;
            depth_data[1] = val >> 16;
@@ -469,9 +489,15 @@ skip_pixel:
    } else {
        for (int c = 0; c < count; c++) {
            if (write_mask & LFB_WRITE_COLOUR)
-                *(uint16_t *) (&voodoo->fb_mem[write_addr & voodoo->fb_mask]) = do_dither(&voodoo->params, colour_data[c], (x >> 1) + c, y);
+                *(uint16_t *) (&voodoo->fb_mem[write_addr & voodoo->fb_mask]) =
+                              do_dither(&voodoo->params, colour_data[c], (x >> 1) + c, y);
            if (write_mask & LFB_WRITE_DEPTH)
                *(uint16_t *) (&voodoo->fb_mem[write_addr_aux & voodoo->fb_mask]) = depth_data[c];
+            if (write_mask & LFB_WRITE_BOTH) {
+                *(uint16_t *) (&voodoo->fb_mem[write_addr & voodoo->fb_mask]) =
+                              do_dither(&voodoo->params, colour_data[c], (x >> 1) + c, y);
+                *(uint16_t *) (&voodoo->fb_mem[write_addr_aux & voodoo->fb_mask]) = depth_data[c];
+            }

            write_addr += 2;
            write_addr_aux += 2;
--- a/src/video/vid_xga.c
+++ b/src/video/vid_xga.c
--- a/vcpkg.json
+++ b/vcpkg.json
@@ -1,6 +1,6 @@
 {
    "name": "86box",
-    "version-string": "4.3",
+    "version-string": "4.2.2",
    "homepage": "https://86box.net/",
    "documentation": "https://86box.readthedocs.io/",
    "license": "GPL-2.0-or-later",