mirror of
https://github.com/86Box/86Box.git
synced 2026-02-24 02:18:20 -07:00
clang format 82815/ICH2 related things
This commit is contained in:
@@ -111,7 +111,7 @@ extern int acpi_rtc_status;
|
||||
|
||||
extern const device_t acpi_ali_device;
|
||||
extern const device_t acpi_intel_device;
|
||||
extern const device_t acpi_intel_ich2_device;
|
||||
extern const device_t acpi_intel_ich2_device;
|
||||
extern const device_t acpi_smc_device;
|
||||
extern const device_t acpi_via_device;
|
||||
extern const device_t acpi_via_596b_device;
|
||||
@@ -131,7 +131,7 @@ extern void acpi_set_irq_line(acpi_t *dev, int irq_line);
|
||||
extern void acpi_set_mirq_is_level(acpi_t *dev, int mirq_is_level);
|
||||
extern void acpi_set_gpireg2_default(acpi_t *dev, uint8_t gpireg2_default);
|
||||
extern void acpi_set_nvr(acpi_t *dev, nvr_t *nvr);
|
||||
extern void acpi_set_tco(acpi_t *dev, tco_t *tco);
|
||||
extern void acpi_set_tco(acpi_t *dev, tco_t *tco);
|
||||
extern void acpi_set_trap_update(acpi_t *dev, void (*update)(void *priv), void *priv);
|
||||
extern uint8_t acpi_ali_soft_smi_status_read(acpi_t *dev);
|
||||
extern void acpi_ali_soft_smi_status_write(acpi_t *dev, uint8_t soft_smi);
|
||||
|
||||
@@ -88,6 +88,7 @@ extern const device_t i440gx_device;
|
||||
extern const device_t i440zx_device;
|
||||
extern const device_t i450kx_device;
|
||||
|
||||
|
||||
extern const device_t sio_device;
|
||||
extern const device_t sio_zb_device;
|
||||
|
||||
@@ -102,6 +103,10 @@ extern const device_t slc90e66_device;
|
||||
|
||||
extern const device_t ioapic_device;
|
||||
|
||||
/* Intel ICH2 */
|
||||
extern const device_t intel_815ep_device;
|
||||
extern const device_t intel_ich2_device;
|
||||
|
||||
/* OPTi */
|
||||
extern const device_t opti283_device;
|
||||
extern const device_t opti291_device;
|
||||
@@ -125,10 +130,6 @@ extern const device_t sis_85c50x_device;
|
||||
extern const device_t sis_5511_device;
|
||||
extern const device_t sis_5571_device;
|
||||
|
||||
/* Intel ICH2 */
|
||||
extern const device_t intel_815ep_device;
|
||||
extern const device_t intel_ich2_device;
|
||||
|
||||
/* ST */
|
||||
extern const device_t stpc_client_device;
|
||||
extern const device_t stpc_consumer2_device;
|
||||
|
||||
@@ -93,7 +93,7 @@ extern void dma_alias_set_piix(void);
|
||||
extern void dma_alias_remove(void);
|
||||
extern void dma_alias_remove_piix(void);
|
||||
|
||||
extern void dma_lpc_init(void);
|
||||
extern void dma_lpc_init(void);
|
||||
|
||||
extern void dma_bm_read(uint32_t PhysAddress, uint8_t *DataRead, uint32_t TotalSize, int TransferSize);
|
||||
extern void dma_bm_write(uint32_t PhysAddress, const uint8_t *DataWrite, uint32_t TotalSize, int TransferSize);
|
||||
|
||||
@@ -17,24 +17,23 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_INTEL_ICH2_GPIO_H
|
||||
# define EMU_INTEL_ICH2_GPIO_H
|
||||
#define EMU_INTEL_ICH2_GPIO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef struct intel_ich2_gpio_t
|
||||
{
|
||||
typedef struct intel_ich2_gpio_t {
|
||||
uint16_t gpio_addr;
|
||||
uint8_t gpio_regs[48];
|
||||
uint8_t gpio_regs[48];
|
||||
} intel_ich2_gpio_t;
|
||||
|
||||
void intel_ich2_gpio_base(int enable, uint16_t addr, intel_ich2_gpio_t *dev);
|
||||
|
||||
extern const device_t intel_ich2_gpio_device;
|
||||
extern const device_t intel_ich2_gpio_device;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*EMU_INTEL_ICH2_GPIO_H*/
|
||||
#endif /*EMU_INTEL_ICH2_GPIO_H*/
|
||||
|
||||
@@ -17,25 +17,24 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_INTEL_ICH2_TRAP_H
|
||||
# define EMU_INTEL_ICH2_TRAP_H
|
||||
#define EMU_INTEL_ICH2_TRAP_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef struct intel_ich2_trap_t
|
||||
{
|
||||
acpi_t *acpi;
|
||||
void *trap;
|
||||
typedef struct intel_ich2_trap_t {
|
||||
acpi_t *acpi;
|
||||
void *trap;
|
||||
} intel_ich2_trap_t;
|
||||
|
||||
extern void intel_ich2_trap_set_acpi(intel_ich2_trap_t *trap, acpi_t *acpi);
|
||||
extern void intel_ich2_device_trap_setup(uint8_t acpi_reg, uint8_t acpi_reg_val, uint16_t addr, uint16_t size, intel_ich2_trap_t *dev);
|
||||
|
||||
extern const device_t intel_ich2_trap_device;
|
||||
extern const device_t intel_ich2_trap_device;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*EMU_INTEL_ICH2_TRAP_H*/
|
||||
#endif /*EMU_INTEL_ICH2_TRAP_H*/
|
||||
|
||||
@@ -161,7 +161,6 @@ enum {
|
||||
MACHINE_TYPE_SLOT1_370,
|
||||
MACHINE_TYPE_SLOT2,
|
||||
MACHINE_TYPE_SOCKET370,
|
||||
MACHINE_TYPE_ICH2,
|
||||
MACHINE_TYPE_MISC,
|
||||
MACHINE_TYPE_MAX
|
||||
};
|
||||
|
||||
@@ -17,7 +17,7 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_NSC_366_H
|
||||
# define EMU_NSC_366_H
|
||||
#define EMU_NSC_366_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
@@ -27,17 +27,17 @@ typedef struct
|
||||
{
|
||||
hwm_values_t *values;
|
||||
|
||||
uint8_t fscm_enable;
|
||||
uint8_t fscm_enable;
|
||||
uint16_t fscm_addr;
|
||||
uint8_t fscm_config[15];
|
||||
uint8_t fscm_config[15];
|
||||
|
||||
uint16_t vlm_addr;
|
||||
uint8_t vlm_config_global[10];
|
||||
uint8_t vlm_config_bank[13][5];
|
||||
uint8_t vlm_config_global[10];
|
||||
uint8_t vlm_config_bank[13][5];
|
||||
|
||||
uint16_t tms_addr;
|
||||
uint8_t tms_config_global[10];
|
||||
uint8_t tms_config_bank[4][5];
|
||||
uint8_t tms_config_global[10];
|
||||
uint8_t tms_config_bank[4][5];
|
||||
} nsc366_hwm_t;
|
||||
|
||||
extern void nsc366_update_fscm_io(int enable, uint16_t addr, nsc366_hwm_t *dev);
|
||||
@@ -45,10 +45,10 @@ extern void nsc366_update_vlm_io(int enable, uint16_t addr, nsc366_hwm_t *dev);
|
||||
extern void nsc366_update_tms_io(int enable, uint16_t addr, nsc366_hwm_t *dev);
|
||||
|
||||
/* The Hardware Monitor */
|
||||
extern const device_t nsc366_hwm_device;
|
||||
extern const device_t nsc366_hwm_device;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*EMU_NSC_366_H*/
|
||||
#endif /*EMU_NSC_366_H*/
|
||||
|
||||
@@ -79,8 +79,8 @@ extern const device_t sio_detect_device;
|
||||
#endif
|
||||
extern const device_t um8669f_device;
|
||||
extern const device_t via_vt82c686_sio_device;
|
||||
extern const device_t w83627hf_device;
|
||||
extern const device_t w83627hf_no_hwm_device;
|
||||
extern const device_t w83627hf_device;
|
||||
extern const device_t w83627hf_no_hwm_device;
|
||||
extern const device_t w83787f_device;
|
||||
extern const device_t w83787f_ide_device;
|
||||
extern const device_t w83787f_ide_en_device;
|
||||
|
||||
@@ -16,36 +16,34 @@
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
/*
|
||||
* Note: The Intel AC'97 code is divided into three parts
|
||||
*
|
||||
* 1. intel_ac97.c The main AC'97 code handling configuration.
|
||||
* 3. intel_ac97_buffer.c The AC'97 buffer
|
||||
*
|
||||
*
|
||||
*
|
||||
*
|
||||
* The general AC'97 configures the buffer base address and capabilities like channels, reset, interrupts etc.
|
||||
* The AC'97 buffer is where all playback happens.
|
||||
*/
|
||||
*/
|
||||
|
||||
#ifndef EMU_INTEL_AC97_H
|
||||
# define EMU_INTEL_AC97_H
|
||||
#define EMU_INTEL_AC97_H
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
#include <86box/mem.h>
|
||||
#include <86box/snd_ac97.h>
|
||||
|
||||
typedef struct intel_ac97_t
|
||||
{
|
||||
typedef struct intel_ac97_t {
|
||||
uint16_t ac97_base;
|
||||
uint16_t mixer_base;
|
||||
uint32_t buffer_base;
|
||||
|
||||
uint8_t regs[256];
|
||||
int irq;
|
||||
int irq;
|
||||
|
||||
ac97_codec_t *mixer;
|
||||
ac97_codec_t *mixer;
|
||||
mem_mapping_t *buffer_location;
|
||||
} intel_ac97_t;
|
||||
|
||||
@@ -54,11 +52,11 @@ extern void intel_ac97_base(int enable, uint16_t addr, intel_ac97_t *dev);
|
||||
extern void intel_ac97_mixer_base(int enable, uint16_t addr, intel_ac97_t *dev);
|
||||
extern void intel_ac97_set_irq(int irq, intel_ac97_t *dev);
|
||||
|
||||
extern const device_t intel_ac97_device;
|
||||
extern const device_t intel_ac97_mixer_device;
|
||||
extern const device_t intel_ac97_device;
|
||||
extern const device_t intel_ac97_mixer_device;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*EMU_INTEL_AC97_H*/
|
||||
#endif /*EMU_INTEL_AC97_H*/
|
||||
|
||||
@@ -92,26 +92,26 @@ typedef struct {
|
||||
} spd_sdram_t;
|
||||
|
||||
typedef struct {
|
||||
uint8_t bytes_used, spd_size, mem_type,
|
||||
row_bits, col_bits, rows,
|
||||
data_width_lsb, data_width_msb,
|
||||
signal_level, tclk, tac,
|
||||
config, refresh_rate,
|
||||
sdram_width, ecc_width,
|
||||
tccd, burst, banks, cas, cslat, we,
|
||||
mod_attr, dev_attr,
|
||||
tclk2, tac2, tclk3, tac3,
|
||||
trp, trrd, trcd, tras,
|
||||
bank_density,
|
||||
ca_setup, ca_hold, data_setup, data_hold,
|
||||
reserved[26],
|
||||
spd_rev, checksum,
|
||||
mfg_jedec[8], mfg_loc;
|
||||
char part_no[18];
|
||||
uint8_t rev_code[2],
|
||||
mfg_year, mfg_week, serial[4], mfg_specific[27],
|
||||
other_data[127],
|
||||
checksum2;
|
||||
uint8_t bytes_used, spd_size, mem_type,
|
||||
row_bits, col_bits, rows,
|
||||
data_width_lsb, data_width_msb,
|
||||
signal_level, tclk, tac,
|
||||
config, refresh_rate,
|
||||
sdram_width, ecc_width,
|
||||
tccd, burst, banks, cas, cslat, we,
|
||||
mod_attr, dev_attr,
|
||||
tclk2, tac2, tclk3, tac3,
|
||||
trp, trrd, trcd, tras,
|
||||
bank_density,
|
||||
ca_setup, ca_hold, data_setup, data_hold,
|
||||
reserved[26],
|
||||
spd_rev, checksum,
|
||||
mfg_jedec[8], mfg_loc;
|
||||
char part_no[18];
|
||||
uint8_t rev_code[2],
|
||||
mfg_year, mfg_week, serial[4], mfg_specific[27],
|
||||
other_data[127],
|
||||
checksum2;
|
||||
} spd_ddr_t;
|
||||
|
||||
typedef struct {
|
||||
@@ -124,7 +124,7 @@ typedef struct {
|
||||
uint8_t data[SPD_DATA_SIZE];
|
||||
spd_edo_t edo_data;
|
||||
spd_sdram_t sdram_data;
|
||||
spd_ddr_t ddr_data;
|
||||
spd_ddr_t ddr_data;
|
||||
};
|
||||
void *eeprom;
|
||||
} spd_t;
|
||||
|
||||
@@ -17,7 +17,7 @@
|
||||
*/
|
||||
|
||||
#ifndef EMU_TCO_H
|
||||
# define EMU_TCO_H
|
||||
#define EMU_TCO_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
@@ -25,14 +25,14 @@ extern "C" {
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8_t regs[17];
|
||||
uint8_t regs[17];
|
||||
uint16_t tco_irq;
|
||||
} tco_t;
|
||||
|
||||
extern const device_t tco_device;
|
||||
extern const device_t tco_device;
|
||||
|
||||
extern void tco_irq_update(tco_t *dev, uint16_t new_irq);
|
||||
extern void tco_write(uint16_t addr, uint8_t val, tco_t *dev);
|
||||
extern void tco_irq_update(tco_t *dev, uint16_t new_irq);
|
||||
extern void tco_write(uint16_t addr, uint8_t val, tco_t *dev);
|
||||
extern uint8_t tco_read(uint16_t addr, tco_t *dev);
|
||||
|
||||
#ifdef __cplusplus
|
||||
|
||||
Reference in New Issue
Block a user