mirror of
https://github.com/86Box/86Box.git
synced 2026-02-23 09:58:19 -07:00
Merge branch '86Box:master' into master
This commit is contained in:
starfrost
GitHub
@@ -168,7 +168,6 @@ endif()
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cmake_dependent_option(AMD_K5 "AMD K5" ON "DEV_BRANCH" OFF)
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cmake_dependent_option(AN430TX "Intel AN430TX" ON "DEV_BRANCH" OFF)
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cmake_dependent_option(CDROM_MITSUMI "Mitsumi CDROM" ON "DEV_BRANCH" OFF)
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cmake_dependent_option(CYRIX_6X86 "Cyrix 6x86" ON "DEV_BRANCH" OFF)
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cmake_dependent_option(G100 "Matrox Productiva G100" ON "DEV_BRANCH" OFF)
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cmake_dependent_option(GUSMAX "Gravis UltraSound MAX" ON "DEV_BRANCH" OFF)
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cmake_dependent_option(ISAMEM_RAMPAGE "AST Rampage" ON "DEV_BRANCH" OFF)
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@@ -213,6 +213,7 @@ int do_auto_pause = 0; /* (C) Auto-pa
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int hook_enabled = 1; /* (C) Keyboard hook is enabled */
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int test_mode = 0; /* (C) Test mode */
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char uuid[MAX_UUID_LEN] = { '\0' }; /* (C) UUID or machine identifier */
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int sound_muted = 0; /* (C) Is sound muted? */
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int other_ide_present = 0; /* IDE controllers from non-IDE cards are
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present */
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@@ -22,6 +22,7 @@
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include "cpu.h"
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#include <86box/timer.h>
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#include <86box/device.h>
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@@ -22,6 +22,7 @@
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include "cpu.h"
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#include <86box/timer.h>
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#include <86box/device.h>
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@@ -22,6 +22,7 @@
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#include <wchar.h>
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include "cpu.h"
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#include <86box/timer.h>
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#include <86box/device.h>
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#include <86box/io.h>
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@@ -26,6 +26,7 @@
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#include <86box/io.h>
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#include <86box/pci.h>
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#include <86box/pic.h>
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#include "cpu.h"
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#include <86box/timer.h>
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#include <86box/pit.h>
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#include <86box/device.h>
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@@ -27,6 +27,7 @@
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#define HAVE_STDARG_H
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#include <86box/86box.h>
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#include <86box/nmi.h>
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#include "cpu.h"
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#include <86box/timer.h>
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#include <86box/pit.h>
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#include <86box/mem.h>
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@@ -22,6 +22,7 @@
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#include <86box/86box.h>
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#include <86box/device.h>
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#include <86box/io.h>
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#include "cpu.h"
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#include <86box/timer.h>
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#include <86box/dma.h>
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#include <86box/mem.h>
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@@ -22,6 +22,7 @@
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#include <86box/86box.h>
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#include <86box/device.h>
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#include <86box/io.h>
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#include "cpu.h"
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#include <86box/timer.h>
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#include <86box/dma.h>
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@@ -22,6 +22,7 @@
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#include <86box/86box.h>
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#include <86box/device.h>
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#include <86box/io.h>
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#include "cpu.h"
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#include <86box/timer.h>
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#include <86box/dma.h>
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#include <86box/mem.h>
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@@ -22,6 +22,7 @@
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#include <86box/86box.h>
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#include <86box/device.h>
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#include <86box/io.h>
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#include "cpu.h"
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#include <86box/timer.h>
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#include <86box/dma.h>
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#include <86box/mem.h>
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@@ -22,6 +22,7 @@
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#include <86box/86box.h>
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#include <86box/device.h>
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#include <86box/io.h>
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#include "cpu.h"
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#include <86box/timer.h>
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#include <86box/dma.h>
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#include <86box/mem.h>
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@@ -22,6 +22,7 @@
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#include <86box/86box.h>
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#include <86box/device.h>
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#include <86box/io.h>
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#include "cpu.h"
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#include <86box/timer.h>
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#include <86box/dma.h>
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#include <86box/mem.h>
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@@ -24,6 +24,7 @@
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#include <86box/86box.h>
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#include <86box/device.h>
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#include <86box/io.h>
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#include "cpu.h"
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#include <86box/timer.h>
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#include <86box/apm.h>
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#include <86box/machine.h>
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@@ -168,6 +168,7 @@ load_general(void)
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kbd_req_capture = ini_section_get_int(cat, "kbd_req_capture", 0);
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hide_status_bar = ini_section_get_int(cat, "hide_status_bar", 0);
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hide_tool_bar = ini_section_get_int(cat, "hide_tool_bar", 0);
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sound_muted = ini_section_get_int(cat, "sound_muted", 0);
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confirm_reset = ini_section_get_int(cat, "confirm_reset", 1);
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confirm_exit = ini_section_get_int(cat, "confirm_exit", 1);
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@@ -1846,6 +1847,10 @@ save_general(void)
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const char *va_name;
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ini_section_set_int(cat, "sound_muted", sound_muted);
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if (sound_muted == 0)
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ini_section_delete_var(cat, "sound_muted");
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ini_section_set_int(cat, "vid_resize", vid_resize);
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if (vid_resize == 0)
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ini_section_delete_var(cat, "vid_resize");
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@@ -1,6 +1,7 @@
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#include <stdarg.h>
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#include <stdio.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <wchar.h>
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#include <math.h>
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@@ -206,6 +206,7 @@ extern void x386_dynarec_log(const char *fmt, ...);
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# include "x86_ops_mmx_mov.h"
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# include "x86_ops_mmx_pack.h"
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# include "x86_ops_mmx_shift.h"
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# include "x86_ops_mmx_emmi.h"
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#endif
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#include "x86_ops_mov.h"
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#ifdef OPS_286_386
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@@ -859,12 +860,12 @@ const OpFn OP_TABLE(c486_0f)[1024] = {
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/*00*/ op0F00_a16, op0F01_l_a16, opLAR_l_a16, opLSL_l_a16, ILLEGAL, ILLEGAL, opCLTS, opLOADALL386, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*30*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opRDSHR_a16, opWRSHR_a16, opSVDC_a16, opRSDC_a16, opSVLDT_a16, opRSLDT_a16, opSVTS_a16, opRSTS_a16, opSMINT, ILLEGAL,
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/*30*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opRDSHR_a16, opWRSHR_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*60*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*70*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*70*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opSVDC_a16, opRSDC_a16, opSVLDT_a16, opRSLDT_a16, opSVTS_a16, opRSTS_a16, opSMINT, ILLEGAL,
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/*80*/ opJO_l, opJNO_l, opJB_l, opJNB_l, opJE_l, opJNE_l, opJBE_l, opJNBE_l, opJS_l, opJNS_l, opJP_l, opJNP_l, opJL_l, opJNL_l, opJLE_l, opJNLE_l,
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/*90*/ opSETO_a16, opSETNO_a16, opSETB_a16, opSETNB_a16, opSETE_a16, opSETNE_a16, opSETBE_a16, opSETNBE_a16, opSETS_a16, opSETNS_a16, opSETP_a16, opSETNP_a16, opSETL_a16, opSETNL_a16, opSETLE_a16, opSETNLE_a16,
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@@ -1384,7 +1385,6 @@ const OpFn OP_TABLE(pentium_0f)[1024] = {
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// clang-format on
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};
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# ifdef USE_CYRIX_6X86
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const OpFn OP_TABLE(c6x86_0f)[1024] = {
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// clang-format off
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/*16-bit data, 16-bit addr*/
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@@ -1392,7 +1392,7 @@ const OpFn OP_TABLE(c6x86_0f)[1024] = {
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/*00*/ op0F00_a16, op0F01_w_a16, opLAR_w_a16, opLSL_w_a16, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, opRDSHR_a16, opWRSHR_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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@@ -1414,7 +1414,7 @@ const OpFn OP_TABLE(c6x86_0f)[1024] = {
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/*00*/ op0F00_a16, op0F01_l_a16, opLAR_l_a16, opLSL_l_a16, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, opRDSHR_a16, opWRSHR_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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@@ -1436,7 +1436,7 @@ const OpFn OP_TABLE(c6x86_0f)[1024] = {
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/*00*/ op0F00_a32, op0F01_w_a32, opLAR_w_a32, opLSL_w_a32, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
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||||
/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, opRDSHR_a32, opWRSHR_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
|
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/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
@@ -1458,7 +1458,99 @@ const OpFn OP_TABLE(c6x86_0f)[1024] = {
|
||||
/*00*/ op0F00_a32, op0F01_l_a32, opLAR_l_a32, opLSL_l_a32, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*10*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, opRDSHR_a32, opWRSHR_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
|
||||
/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*60*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*70*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opSVDC_a32, opRSDC_a32, opSVLDT_a32, opRSLDT_a32, opSVTS_a32, opRSTS_a32, opSMINT, ILLEGAL,
|
||||
|
||||
/*80*/ opJO_l, opJNO_l, opJB_l, opJNB_l, opJE_l, opJNE_l, opJBE_l, opJNBE_l, opJS_l, opJNS_l, opJP_l, opJNP_l, opJL_l, opJNL_l, opJLE_l, opJNLE_l,
|
||||
/*90*/ opSETO_a32, opSETNO_a32, opSETB_a32, opSETNB_a32, opSETE_a32, opSETNE_a32, opSETBE_a32, opSETNBE_a32, opSETS_a32, opSETNS_a32, opSETP_a32, opSETNP_a32, opSETL_a32, opSETNL_a32, opSETLE_a32, opSETNLE_a32,
|
||||
/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a32, opSHLD_l_i_a32, opSHLD_l_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, opRSM, opBTS_l_r_a32, opSHRD_l_i_a32, opSHRD_l_CL_a32,ILLEGAL, opIMUL_l_l_a32,
|
||||
/*b0*/ opCMPXCHG_b_a32,opCMPXCHG_l_a32,opLSS_l_a32, opBTR_l_r_a32, opLFS_l_a32, opLGS_l_a32, opMOVZX_l_b_a32,opMOVZX_l_w_a32,ILLEGAL, ILLEGAL, opBA_l_a32, opBTC_l_r_a32, opBSF_l_a32, opBSR_l_a32, opMOVSX_l_b_a32,opMOVSX_l_w_a32,
|
||||
|
||||
/*c0*/ opXADD_b_a32, opXADD_l_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a32,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
|
||||
/*d0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*e0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
const OpFn OP_TABLE(c6x86l_0f)[1024] = {
|
||||
// clang-format off
|
||||
/*16-bit data, 16-bit addr*/
|
||||
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
|
||||
/*00*/ op0F00_a16, op0F01_w_a16, opLAR_w_a16, opLSL_w_a16, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*10*/ opMOV_b_r_a16, opMOV_w_r_a16, opMOV_r_b_a16, opMOV_r_w_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, opRDSHR_a16, opWRSHR_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
|
||||
/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*60*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*70*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opSVDC_a16, opRSDC_a16, opSVLDT_a16, opRSLDT_a16, opSVTS_a16, opRSTS_a16, opSMINT, ILLEGAL,
|
||||
|
||||
/*80*/ opJO_w, opJNO_w, opJB_w, opJNB_w, opJE_w, opJNE_w, opJBE_w, opJNBE_w, opJS_w, opJNS_w, opJP_w, opJNP_w, opJL_w, opJNL_w, opJLE_w, opJNLE_w,
|
||||
/*90*/ opSETO_a16, opSETNO_a16, opSETB_a16, opSETNB_a16, opSETE_a16, opSETNE_a16, opSETBE_a16, opSETNBE_a16, opSETS_a16, opSETNS_a16, opSETP_a16, opSETNP_a16, opSETL_a16, opSETNL_a16, opSETLE_a16, opSETNLE_a16,
|
||||
/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a16, opSHLD_w_i_a16, opSHLD_w_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, opRSM, opBTS_w_r_a16, opSHRD_w_i_a16, opSHRD_w_CL_a16,ILLEGAL, opIMUL_w_w_a16,
|
||||
/*b0*/ opCMPXCHG_b_a16,opCMPXCHG_w_a16,opLSS_w_a16, opBTR_w_r_a16, opLFS_w_a16, opLGS_w_a16, opMOVZX_w_b_a16,opMOVZX_w_w_a16,ILLEGAL, ILLEGAL, opBA_w_a16, opBTC_w_r_a16, opBSF_w_a16, opBSR_w_a16, opMOVSX_w_b_a16,ILLEGAL,
|
||||
|
||||
/*c0*/ opXADD_b_a16, opXADD_w_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a16,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
|
||||
/*d0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*e0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opSVDC_a16, opRSDC_a16, opSVLDT_a16, opRSLDT_a16, opSVTS_a16, opRSTS_a16, opSMINT, ILLEGAL,
|
||||
|
||||
/*32-bit data, 16-bit addr*/
|
||||
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
|
||||
/*00*/ op0F00_a16, op0F01_l_a16, opLAR_l_a16, opLSL_l_a16, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*10*/ opMOV_b_r_a16, opMOV_l_r_a16, opMOV_r_b_a16, opMOV_r_l_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*20*/ opMOV_r_CRx_a16,opMOV_r_DRx_a16,opMOV_CRx_r_a16,opMOV_DRx_r_a16,opMOV_r_TRx_a16,ILLEGAL, opMOV_TRx_r_a16,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, opRDSHR_a16, opWRSHR_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
|
||||
/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*60*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*70*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
|
||||
/*80*/ opJO_l, opJNO_l, opJB_l, opJNB_l, opJE_l, opJNE_l, opJBE_l, opJNBE_l, opJS_l, opJNS_l, opJP_l, opJNP_l, opJL_l, opJNL_l, opJLE_l, opJNLE_l,
|
||||
/*90*/ opSETO_a16, opSETNO_a16, opSETB_a16, opSETNB_a16, opSETE_a16, opSETNE_a16, opSETBE_a16, opSETNBE_a16, opSETS_a16, opSETNS_a16, opSETP_a16, opSETNP_a16, opSETL_a16, opSETNL_a16, opSETLE_a16, opSETNLE_a16,
|
||||
/*a0*/ opPUSH_FS_l, opPOP_FS_l, opCPUID, opBT_l_r_a16, opSHLD_l_i_a16, opSHLD_l_CL_a16,ILLEGAL, ILLEGAL, opPUSH_GS_l, opPOP_GS_l, opRSM, opBTS_l_r_a16, opSHRD_l_i_a16, opSHRD_l_CL_a16,ILLEGAL, opIMUL_l_l_a16,
|
||||
/*b0*/ opCMPXCHG_b_a16,opCMPXCHG_l_a16,opLSS_l_a16, opBTR_l_r_a16, opLFS_l_a16, opLGS_l_a16, opMOVZX_l_b_a16,opMOVZX_l_w_a16,ILLEGAL, ILLEGAL, opBA_l_a16, opBTC_l_r_a16, opBSF_l_a16, opBSR_l_a16, opMOVSX_l_b_a16,opMOVSX_l_w_a16,
|
||||
|
||||
/*c0*/ opXADD_b_a16, opXADD_l_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a16,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
|
||||
/*d0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*e0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
|
||||
/*16-bit data, 32-bit addr*/
|
||||
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
|
||||
/*00*/ op0F00_a32, op0F01_w_a32, opLAR_w_a32, opLSL_w_a32, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*10*/ opMOV_b_r_a32, opMOV_w_r_a32, opMOV_r_b_a32, opMOV_r_w_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, opRDSHR_a32, opWRSHR_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
|
||||
/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*60*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*70*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opSVDC_a32, opRSDC_a32, opSVLDT_a32, opRSLDT_a32, opSVTS_a32, opRSTS_a32, opSMINT, ILLEGAL,
|
||||
|
||||
/*80*/ opJO_w, opJNO_w, opJB_w, opJNB_w, opJE_w, opJNE_w, opJBE_w, opJNBE_w, opJS_w, opJNS_w, opJP_w, opJNP_w, opJL_w, opJNL_w, opJLE_w, opJNLE_w,
|
||||
/*90*/ opSETO_a32, opSETNO_a32, opSETB_a32, opSETNB_a32, opSETE_a32, opSETNE_a32, opSETBE_a32, opSETNBE_a32, opSETS_a32, opSETNS_a32, opSETP_a32, opSETNP_a32, opSETL_a32, opSETNL_a32, opSETLE_a32, opSETNLE_a32,
|
||||
/*a0*/ opPUSH_FS_w, opPOP_FS_w, opCPUID, opBT_w_r_a32, opSHLD_w_i_a32, opSHLD_w_CL_a32,ILLEGAL, ILLEGAL, opPUSH_GS_w, opPOP_GS_w, opRSM, opBTS_w_r_a32, opSHRD_w_i_a32, opSHRD_w_CL_a32,ILLEGAL, opIMUL_w_w_a32,
|
||||
/*b0*/ opCMPXCHG_b_a32,opCMPXCHG_w_a32,opLSS_w_a32, opBTR_w_r_a32, opLFS_w_a32, opLGS_w_a32, opMOVZX_w_b_a32,opMOVZX_w_w_a32,ILLEGAL, ILLEGAL, opBA_w_a32, opBTC_w_r_a32, opBSF_w_a32, opBSR_w_a32, opMOVSX_w_b_a32,ILLEGAL,
|
||||
|
||||
/*c0*/ opXADD_b_a32, opXADD_w_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, opCMPXCHG8B_a32,opBSWAP_EAX, opBSWAP_ECX, opBSWAP_EDX, opBSWAP_EBX, opBSWAP_ESP, opBSWAP_EBP, opBSWAP_ESI, opBSWAP_EDI,
|
||||
/*d0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*e0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
|
||||
/*32-bit data, 32-bit addr*/
|
||||
/* 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f*/
|
||||
/*00*/ op0F00_a32, op0F01_l_a32, opLAR_l_a32, opLSL_l_a32, ILLEGAL, ILLEGAL, opCLTS, ILLEGAL, opINVD, opWBINVD, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*10*/ opMOV_b_r_a32, opMOV_l_r_a32, opMOV_r_b_a32, opMOV_r_l_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*20*/ opMOV_r_CRx_a32,opMOV_r_DRx_a32,opMOV_CRx_r_a32,opMOV_DRx_r_a32,opMOV_r_TRx_a32,ILLEGAL, opMOV_TRx_r_a32,ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*30*/ opWRMSR, opRDTSC, opRDMSR, ILLEGAL, ILLEGAL, ILLEGAL, opRDSHR_a32, opWRSHR_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
|
||||
/*40*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
@@ -1476,7 +1568,6 @@ const OpFn OP_TABLE(c6x86_0f)[1024] = {
|
||||
/*f0*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
// clang-format on
|
||||
};
|
||||
# endif /* USE_CYRIX_6X86 */
|
||||
|
||||
const OpFn OP_TABLE(pentiummmx_0f)[1024] = {
|
||||
// clang-format off
|
||||
@@ -1754,7 +1845,6 @@ const OpFn OP_TABLE(k62_0f)[1024] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
# ifdef USE_CYRIX_6X86
|
||||
const OpFn OP_TABLE(c6x86mx_0f)[1024] = {
|
||||
// clang-format off
|
||||
/*16-bit data, 16-bit addr*/
|
||||
@@ -1765,7 +1855,7 @@ const OpFn OP_TABLE(c6x86mx_0f)[1024] = {
|
||||
/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, ILLEGAL, ILLEGAL, opRDSHR_a16, opWRSHR_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
|
||||
/*40*/ opCMOVO_w_a16, opCMOVNO_w_a16, opCMOVB_w_a16, opCMOVNB_w_a16, opCMOVE_w_a16, opCMOVNE_w_a16, opCMOVBE_w_a16, opCMOVNBE_w_a16,opCMOVS_w_a16, opCMOVNS_w_a16, opCMOVP_w_a16, opCMOVNP_w_a16, opCMOVL_w_a16, opCMOVNL_w_a16, opCMOVLE_w_a16, opCMOVNLE_w_a16,
|
||||
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*50*/ opPAVEB_a16, opPADDSIW_a16, opPMAGW_a16, ILLEGAL, opPDISTIB_a16, opPSUBSIW_a16, ILLEGAL, ILLEGAL, opPMVZB_a16, opPMULHRWC_a16, opPMVNZB_a16, opPMVLZB_a16, opPMVGEZB_a16, opPMULHRIW_a16, opPMACHRIW_a16, ILLEGAL,
|
||||
/*60*/ opPUNPCKLBW_a16,opPUNPCKLWD_a16,opPUNPCKLDQ_a16,opPACKSSWB_a16, opPCMPGTB_a16, opPCMPGTW_a16, opPCMPGTD_a16, opPACKUSWB_a16, opPUNPCKHBW_a16,opPUNPCKHWD_a16,opPUNPCKHDQ_a16,opPACKSSDW_a16, ILLEGAL, ILLEGAL, opMOVD_l_mm_a16,opMOVQ_q_mm_a16,
|
||||
/*70*/ ILLEGAL, opPSxxW_imm, opPSxxD_imm, opPSxxQ_imm, opPCMPEQB_a16, opPCMPEQW_a16, opPCMPEQD_a16, opEMMS, opSVDC_a16, opRSDC_a16, opSVLDT_a16, opRSLDT_a16, opSVTS_a16, opRSTS_a16, opMOVD_mm_l_a16_cx,opMOVQ_mm_q_a16,
|
||||
|
||||
@@ -1787,7 +1877,7 @@ const OpFn OP_TABLE(c6x86mx_0f)[1024] = {
|
||||
/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, ILLEGAL, ILLEGAL, opRDSHR_a16, opWRSHR_a16, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
|
||||
/*40*/ opCMOVO_l_a16, opCMOVNO_l_a16, opCMOVB_l_a16, opCMOVNB_l_a16, opCMOVE_l_a16, opCMOVNE_l_a16, opCMOVBE_l_a16, opCMOVNBE_l_a16,opCMOVS_l_a16, opCMOVNS_l_a16, opCMOVP_l_a16, opCMOVNP_l_a16, opCMOVL_l_a16, opCMOVNL_l_a16, opCMOVLE_l_a16, opCMOVNLE_l_a16,
|
||||
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*50*/ opPAVEB_a16, opPADDSIW_a16, opPMAGW_a16, ILLEGAL, opPDISTIB_a16, opPSUBSIW_a16, ILLEGAL, ILLEGAL, opPMVZB_a16, opPMULHRWC_a16, opPMVNZB_a16, opPMVLZB_a16, opPMVGEZB_a16, opPMULHRIW_a16, opPMACHRIW_a16, ILLEGAL,
|
||||
/*60*/ opPUNPCKLBW_a16,opPUNPCKLWD_a16,opPUNPCKLDQ_a16,opPACKSSWB_a16, opPCMPGTB_a16, opPCMPGTW_a16, opPCMPGTD_a16, opPACKUSWB_a16, opPUNPCKHBW_a16,opPUNPCKHWD_a16,opPUNPCKHDQ_a16,opPACKSSDW_a16, ILLEGAL, ILLEGAL, opMOVD_l_mm_a16,opMOVQ_q_mm_a16,
|
||||
/*70*/ ILLEGAL, opPSxxW_imm, opPSxxD_imm, opPSxxQ_imm, opPCMPEQB_a16, opPCMPEQW_a16, opPCMPEQD_a16, opEMMS, opSVDC_a16, opRSDC_a16, opSVLDT_a16, opRSLDT_a16, opSVTS_a16, opRSTS_a16, opMOVD_mm_l_a16_cx,opMOVQ_mm_q_a16,
|
||||
|
||||
@@ -1809,7 +1899,7 @@ const OpFn OP_TABLE(c6x86mx_0f)[1024] = {
|
||||
/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, ILLEGAL, ILLEGAL, opRDSHR_a32, opWRSHR_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
|
||||
/*40*/ opCMOVO_w_a32, opCMOVNO_w_a32, opCMOVB_w_a32, opCMOVNB_w_a32, opCMOVE_w_a32, opCMOVNE_w_a32, opCMOVBE_w_a32, opCMOVNBE_w_a32,opCMOVS_w_a32, opCMOVNS_w_a32, opCMOVP_w_a32, opCMOVNP_w_a32, opCMOVL_w_a32, opCMOVNL_w_a32, opCMOVLE_w_a32, opCMOVNLE_w_a32,
|
||||
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*50*/ opPAVEB_a32, opPADDSIW_a32, opPMAGW_a32, ILLEGAL, opPDISTIB_a32, opPSUBSIW_a32, ILLEGAL, ILLEGAL, opPMVZB_a32, opPMULHRWC_a32, opPMVNZB_a32, opPMVLZB_a32, opPMVGEZB_a32, opPMULHRIW_a32, opPMACHRIW_a32, ILLEGAL,
|
||||
/*60*/ opPUNPCKLBW_a32,opPUNPCKLWD_a32,opPUNPCKLDQ_a32,opPACKSSWB_a32, opPCMPGTB_a32, opPCMPGTW_a32, opPCMPGTD_a32, opPACKUSWB_a32, opPUNPCKHBW_a32,opPUNPCKHWD_a32,opPUNPCKHDQ_a32,opPACKSSDW_a32, ILLEGAL, ILLEGAL, opMOVD_l_mm_a32,opMOVQ_q_mm_a32,
|
||||
/*70*/ ILLEGAL, opPSxxW_imm, opPSxxD_imm, opPSxxQ_imm, opPCMPEQB_a32, opPCMPEQW_a32, opPCMPEQD_a32, opEMMS, opSVDC_a32, opRSDC_a32, opSVLDT_a32, opRSLDT_a32, opSVTS_a32, opRSTS_a32, opMOVD_mm_l_a32_cx,opMOVQ_mm_q_a32,
|
||||
|
||||
@@ -1831,7 +1921,7 @@ const OpFn OP_TABLE(c6x86mx_0f)[1024] = {
|
||||
/*30*/ opWRMSR, opRDTSC, opRDMSR, opRDPMC, ILLEGAL, ILLEGAL, opRDSHR_a32, opWRSHR_a32, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
|
||||
/*40*/ opCMOVO_l_a32, opCMOVNO_l_a32, opCMOVB_l_a32, opCMOVNB_l_a32, opCMOVE_l_a32, opCMOVNE_l_a32, opCMOVBE_l_a32, opCMOVNBE_l_a32,opCMOVS_l_a32, opCMOVNS_l_a32, opCMOVP_l_a32, opCMOVNP_l_a32, opCMOVL_l_a32, opCMOVNL_l_a32, opCMOVLE_l_a32, opCMOVNLE_l_a32,
|
||||
/*50*/ ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL, ILLEGAL,
|
||||
/*50*/ opPAVEB_a32, opPADDSIW_a32, opPMAGW_a32, ILLEGAL, opPDISTIB_a32, opPSUBSIW_a32, ILLEGAL, ILLEGAL, opPMVZB_a32, opPMULHRWC_a32, opPMVNZB_a32, opPMVLZB_a32, opPMVGEZB_a32, opPMULHRIW_a32, opPMACHRIW_a32, ILLEGAL,
|
||||
/*60*/ opPUNPCKLBW_a32,opPUNPCKLWD_a32,opPUNPCKLDQ_a32,opPACKSSWB_a32, opPCMPGTB_a32, opPCMPGTW_a32, opPCMPGTD_a32, opPACKUSWB_a32, opPUNPCKHBW_a32,opPUNPCKHWD_a32,opPUNPCKHDQ_a32,opPACKSSDW_a32, ILLEGAL, ILLEGAL, opMOVD_l_mm_a32,opMOVQ_q_mm_a32,
|
||||
/*70*/ ILLEGAL, opPSxxW_imm, opPSxxD_imm, opPSxxQ_imm, opPCMPEQB_a32, opPCMPEQW_a32, opPCMPEQD_a32, opEMMS, opSVDC_a16, opRSDC_a16, opSVLDT_a16, opRSLDT_a16, opSVTS_a16, opRSTS_a16, opMOVD_mm_l_a32_cx,opMOVQ_mm_q_a32,
|
||||
|
||||
@@ -1846,7 +1936,6 @@ const OpFn OP_TABLE(c6x86mx_0f)[1024] = {
|
||||
/*f0*/ ILLEGAL, opPSLLW_a32, opPSLLD_a32, opPSLLQ_a32, ILLEGAL, opPMADDWD_a32, ILLEGAL, ILLEGAL, opPSUBB_a32, opPSUBW_a32, opPSUBD_a32, ILLEGAL, opPADDB_a32, opPADDW_a32, opPADDD_a32, ILLEGAL,
|
||||
// clang-format on
|
||||
};
|
||||
# endif /* USE_CYRIX_6X86 */
|
||||
|
||||
const OpFn OP_TABLE(pentiumpro_0f)[1024] = {
|
||||
// clang-format off
|
||||
|
||||
@@ -42,20 +42,12 @@ endif()
|
||||
|
||||
endif()
|
||||
|
||||
if(CYRIX_6X86)
|
||||
target_compile_definitions(cpu PRIVATE USE_CYRIX_6X86)
|
||||
|
||||
if(DYNAREC)
|
||||
add_library(ct686 OBJECT codegen_timing_686.c)
|
||||
target_link_libraries(86Box ct686)
|
||||
endif()
|
||||
endif()
|
||||
|
||||
if(DYNAREC)
|
||||
target_sources(cpu PRIVATE 386_dynarec_ops.c)
|
||||
|
||||
add_library(cgt OBJECT
|
||||
codegen_timing_486.c
|
||||
codegen_timing_686.c
|
||||
codegen_timing_common.c
|
||||
codegen_timing_k6.c
|
||||
codegen_timing_pentium.c
|
||||
|
||||
@@ -279,13 +279,14 @@ uint8_t do_translate2 = 0;
|
||||
|
||||
void (*cpu_exec)(int32_t cycs);
|
||||
|
||||
static uint8_t ccr0;
|
||||
static uint8_t ccr1;
|
||||
static uint8_t ccr2;
|
||||
static uint8_t ccr3;
|
||||
static uint8_t ccr4;
|
||||
static uint8_t ccr5;
|
||||
static uint8_t ccr6;
|
||||
uint8_t ccr0;
|
||||
uint8_t ccr1;
|
||||
uint8_t ccr2;
|
||||
uint8_t ccr3;
|
||||
uint8_t ccr4;
|
||||
uint8_t ccr5;
|
||||
uint8_t ccr6;
|
||||
uint8_t ccr7;
|
||||
|
||||
static int cyrix_addr;
|
||||
|
||||
@@ -557,7 +558,8 @@ cpu_set(void)
|
||||
cpu_busspeed = cpu_s->rspeed;
|
||||
cpu_multi = (int) ceil(cpu_s->multi);
|
||||
cpu_dmulti = cpu_s->multi;
|
||||
ccr0 = ccr1 = ccr2 = ccr3 = ccr4 = ccr5 = ccr6 = 0;
|
||||
ccr0 = ccr1 = ccr2 = ccr3 = ccr4 = ccr5 = ccr6 = ccr7 = 0;
|
||||
ccr4 = 0x85;
|
||||
|
||||
cpu_update_waitstates();
|
||||
|
||||
@@ -1418,7 +1420,6 @@ cpu_set(void)
|
||||
#endif /* USE_DYNAREC */
|
||||
break;
|
||||
|
||||
#ifdef USE_CYRIX_6X86
|
||||
case CPU_Cx6x86:
|
||||
case CPU_Cx6x86L:
|
||||
case CPU_CxGX1:
|
||||
@@ -1442,19 +1443,27 @@ cpu_set(void)
|
||||
}
|
||||
# endif /* USE_DYNAREC */
|
||||
if (fpu_softfloat) {
|
||||
x86_opcodes_d9_a16 = ops_sf_fpu_cyrix_d9_a16;
|
||||
x86_opcodes_d9_a32 = ops_sf_fpu_cyrix_d9_a32;
|
||||
x86_opcodes_da_a16 = ops_sf_fpu_686_da_a16;
|
||||
x86_opcodes_da_a32 = ops_sf_fpu_686_da_a32;
|
||||
x86_opcodes_db_a16 = ops_sf_fpu_686_db_a16;
|
||||
x86_opcodes_db_a32 = ops_sf_fpu_686_db_a32;
|
||||
x86_opcodes_df_a16 = ops_sf_fpu_686_df_a16;
|
||||
x86_opcodes_df_a32 = ops_sf_fpu_686_df_a32;
|
||||
x86_opcodes_db_a16 = ops_sf_fpu_cyrix_686_db_a16;
|
||||
x86_opcodes_db_a32 = ops_sf_fpu_cyrix_686_db_a32;
|
||||
x86_opcodes_dd_a16 = ops_sf_fpu_cyrix_dd_a16;
|
||||
x86_opcodes_dd_a32 = ops_sf_fpu_cyrix_dd_a32;
|
||||
x86_opcodes_df_a16 = ops_sf_fpu_cyrix_686_df_a16;
|
||||
x86_opcodes_df_a32 = ops_sf_fpu_cyrix_686_df_a32;
|
||||
} else {
|
||||
x86_opcodes_d9_a16 = ops_fpu_cyrix_d9_a16;
|
||||
x86_opcodes_d9_a32 = ops_fpu_cyrix_d9_a32;
|
||||
x86_opcodes_da_a16 = ops_fpu_686_da_a16;
|
||||
x86_opcodes_da_a32 = ops_fpu_686_da_a32;
|
||||
x86_opcodes_db_a16 = ops_fpu_686_db_a16;
|
||||
x86_opcodes_db_a32 = ops_fpu_686_db_a32;
|
||||
x86_opcodes_df_a16 = ops_fpu_686_df_a16;
|
||||
x86_opcodes_df_a32 = ops_fpu_686_df_a32;
|
||||
x86_opcodes_db_a16 = ops_fpu_cyrix_686_db_a16;
|
||||
x86_opcodes_db_a32 = ops_fpu_cyrix_686_db_a32;
|
||||
x86_opcodes_dd_a16 = ops_fpu_cyrix_dd_a16;
|
||||
x86_opcodes_dd_a32 = ops_fpu_cyrix_dd_a32;
|
||||
x86_opcodes_df_a16 = ops_fpu_cyrix_686_df_a16;
|
||||
x86_opcodes_df_a32 = ops_fpu_cyrix_686_df_a32;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1462,22 +1471,16 @@ cpu_set(void)
|
||||
if (cpu_s->cpu_type == CPU_Cx6x86MX)
|
||||
x86_setopcodes(ops_386, ops_c6x86mx_0f, dynarec_ops_386, dynarec_ops_c6x86mx_0f);
|
||||
else if (cpu_s->cpu_type == CPU_Cx6x86L)
|
||||
x86_setopcodes(ops_386, ops_pentium_0f, dynarec_ops_386, dynarec_ops_pentium_0f);
|
||||
x86_setopcodes(ops_386, ops_c6x86l_0f, dynarec_ops_386, dynarec_ops_c6x86l_0f);
|
||||
else
|
||||
x86_setopcodes(ops_386, ops_c6x86mx_0f, dynarec_ops_386, dynarec_ops_c6x86mx_0f);
|
||||
# if 0
|
||||
x86_setopcodes(ops_386, ops_c6x86_0f, dynarec_ops_386, dynarec_ops_c6x86_0f);
|
||||
# endif
|
||||
# else
|
||||
if (cpu_s->cpu_type == CPU_Cx6x86MX)
|
||||
x86_setopcodes(ops_386, ops_c6x86mx_0f);
|
||||
else if (cpu_s->cpu_type == CPU_Cx6x86L)
|
||||
x86_setopcodes(ops_386, ops_pentium_0f);
|
||||
x86_setopcodes(ops_386, ops_c6x86l_0f);
|
||||
else
|
||||
x86_setopcodes(ops_386, ops_c6x86mx_0f);
|
||||
# if 0
|
||||
x86_setopcodes(ops_386, ops_c6x86_0f);
|
||||
# endif
|
||||
# endif /* USE_DYNAREC */
|
||||
|
||||
timing_rr = 1; /* register dest - register src */
|
||||
@@ -1537,7 +1540,6 @@ cpu_set(void)
|
||||
else if (CPU_Cx6x86)
|
||||
CPUID = 0; /* Disabled on powerup by default */
|
||||
break;
|
||||
#endif /* USE_CYRIX_6X86 */
|
||||
|
||||
#ifdef USE_AMD_K5
|
||||
case CPU_K5:
|
||||
@@ -2382,7 +2384,6 @@ cpu_CPUID(void)
|
||||
EAX = EBX = ECX = EDX = 0;
|
||||
break;
|
||||
|
||||
#ifdef USE_CYRIX_6X86
|
||||
case CPU_Cx6x86:
|
||||
if (!EAX) {
|
||||
EAX = 0x00000001;
|
||||
@@ -2443,7 +2444,6 @@ cpu_CPUID(void)
|
||||
} else
|
||||
EAX = EBX = ECX = EDX = 0;
|
||||
break;
|
||||
#endif /* USE_CYRIX_6X86 */
|
||||
|
||||
case CPU_PENTIUMPRO:
|
||||
if (!EAX) {
|
||||
@@ -3120,7 +3120,6 @@ pentium_invalid_rdmsr:
|
||||
cpu_log("RDMSR: ECX = %08X, val = %08X%08X\n", ECX, EDX, EAX);
|
||||
break;
|
||||
|
||||
#ifdef USE_CYRIX_6X86
|
||||
case CPU_Cx6x86:
|
||||
case CPU_Cx6x86L:
|
||||
case CPU_CxGX1:
|
||||
@@ -3160,7 +3159,6 @@ pentium_invalid_rdmsr:
|
||||
}
|
||||
cpu_log("RDMSR: ECX = %08X, val = %08X%08X\n", ECX, EDX, EAX);
|
||||
break;
|
||||
#endif /* USE_CYRIX_6X86 */
|
||||
|
||||
case CPU_PENTIUMPRO:
|
||||
case CPU_PENTIUM2:
|
||||
@@ -3941,7 +3939,6 @@ pentium_invalid_wrmsr:
|
||||
}
|
||||
break;
|
||||
|
||||
#ifdef USE_CYRIX_6X86
|
||||
case CPU_Cx6x86:
|
||||
case CPU_Cx6x86L:
|
||||
case CPU_CxGX1:
|
||||
@@ -3975,7 +3972,6 @@ pentium_invalid_wrmsr:
|
||||
break;
|
||||
}
|
||||
break;
|
||||
#endif /* USE_CYRIX_6X86 */
|
||||
|
||||
case CPU_PENTIUMPRO:
|
||||
case CPU_PENTIUM2:
|
||||
@@ -4279,14 +4275,12 @@ cpu_write(uint16_t addr, uint8_t val, UNUSED(void *priv))
|
||||
case 0xe8: /* CCR4 */
|
||||
if ((ccr3 & 0xf0) == 0x10) {
|
||||
ccr4 = val;
|
||||
#ifdef USE_CYRIX_6X86
|
||||
if (cpu_s->cpu_type >= CPU_Cx6x86) {
|
||||
if (val & 0x80)
|
||||
CPUID = cpu_s->cpuid_model;
|
||||
else
|
||||
CPUID = 0;
|
||||
}
|
||||
#endif /* USE_CYRIX_6X86 */
|
||||
}
|
||||
break;
|
||||
case 0xe9: /* CCR5 */
|
||||
@@ -4297,6 +4291,9 @@ cpu_write(uint16_t addr, uint8_t val, UNUSED(void *priv))
|
||||
if ((ccr3 & 0xf0) == 0x10)
|
||||
ccr6 = val;
|
||||
break;
|
||||
case 0xeb: /* CCR7 */
|
||||
ccr7 = val & 5;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -4325,6 +4322,8 @@ cpu_read(uint16_t addr, UNUSED(void *priv))
|
||||
return ((ccr3 & 0xf0) == 0x10) ? ccr5 : 0xff;
|
||||
case 0xea:
|
||||
return ((ccr3 & 0xf0) == 0x10) ? ccr6 : 0xff;
|
||||
case 0xeb:
|
||||
return ccr7;
|
||||
case 0xfe:
|
||||
return cpu_s->cyrix_id & 0xff;
|
||||
case 0xff:
|
||||
|
||||
@@ -87,30 +87,32 @@ enum {
|
||||
enum {
|
||||
CPU_PKG_8088 = (1 << 0),
|
||||
CPU_PKG_8088_EUROPC = (1 << 1),
|
||||
CPU_PKG_8086 = (1 << 2),
|
||||
CPU_PKG_8086_MAZOVIA = (1 << 3),
|
||||
CPU_PKG_188 = (1 << 4),
|
||||
CPU_PKG_186 = (1 << 5),
|
||||
CPU_PKG_286 = (1 << 6),
|
||||
CPU_PKG_386SX = (1 << 7),
|
||||
CPU_PKG_386DX = (1 << 8),
|
||||
CPU_PKG_386DX_DESKPRO386 = (1 << 9),
|
||||
CPU_PKG_M6117 = (1 << 10),
|
||||
CPU_PKG_386SLC_IBM = (1 << 11),
|
||||
CPU_PKG_486SLC = (1 << 12),
|
||||
CPU_PKG_486SLC_IBM = (1 << 13),
|
||||
CPU_PKG_486BL = (1 << 14),
|
||||
CPU_PKG_486DLC = (1 << 15),
|
||||
CPU_PKG_SOCKET1 = (1 << 16),
|
||||
CPU_PKG_SOCKET3 = (1 << 17),
|
||||
CPU_PKG_SOCKET3_PC330 = (1 << 18),
|
||||
CPU_PKG_STPC = (1 << 19),
|
||||
CPU_PKG_SOCKET4 = (1 << 20),
|
||||
CPU_PKG_SOCKET5_7 = (1 << 21),
|
||||
CPU_PKG_SOCKET8 = (1 << 22),
|
||||
CPU_PKG_SLOT1 = (1 << 23),
|
||||
CPU_PKG_SLOT2 = (1 << 24),
|
||||
CPU_PKG_SOCKET370 = (1 << 25)
|
||||
CPU_PKG_8088_VTECH = (1 << 2),
|
||||
CPU_PKG_8086 = (1 << 3),
|
||||
CPU_PKG_8086_MAZOVIA = (1 << 4),
|
||||
CPU_PKG_8086_VTECH = (1 << 5),
|
||||
CPU_PKG_188 = (1 << 6),
|
||||
CPU_PKG_186 = (1 << 7),
|
||||
CPU_PKG_286 = (1 << 8),
|
||||
CPU_PKG_386SX = (1 << 9),
|
||||
CPU_PKG_386DX = (1 << 10),
|
||||
CPU_PKG_386DX_DESKPRO386 = (1 << 11),
|
||||
CPU_PKG_M6117 = (1 << 12),
|
||||
CPU_PKG_386SLC_IBM = (1 << 13),
|
||||
CPU_PKG_486SLC = (1 << 14),
|
||||
CPU_PKG_486SLC_IBM = (1 << 15),
|
||||
CPU_PKG_486BL = (1 << 16),
|
||||
CPU_PKG_486DLC = (1 << 17),
|
||||
CPU_PKG_SOCKET1 = (1 << 18),
|
||||
CPU_PKG_SOCKET3 = (1 << 19),
|
||||
CPU_PKG_SOCKET3_PC330 = (1 << 20),
|
||||
CPU_PKG_STPC = (1 << 21),
|
||||
CPU_PKG_SOCKET4 = (1 << 22),
|
||||
CPU_PKG_SOCKET5_7 = (1 << 23),
|
||||
CPU_PKG_SOCKET8 = (1 << 24),
|
||||
CPU_PKG_SLOT1 = (1 << 25),
|
||||
CPU_PKG_SLOT2 = (1 << 26),
|
||||
CPU_PKG_SOCKET370 = (1 << 27)
|
||||
};
|
||||
|
||||
#define CPU_SUPPORTS_DYNAREC 1
|
||||
@@ -587,6 +589,16 @@ extern uint32_t _tr[8];
|
||||
extern uint32_t cache_index;
|
||||
extern uint8_t _cache[2048];
|
||||
|
||||
/* For the Cyrix 6x86(MX) */
|
||||
extern uint8_t ccr0;
|
||||
extern uint8_t ccr1;
|
||||
extern uint8_t ccr2;
|
||||
extern uint8_t ccr3;
|
||||
extern uint8_t ccr4;
|
||||
extern uint8_t ccr5;
|
||||
extern uint8_t ccr6;
|
||||
extern uint8_t ccr7;
|
||||
|
||||
/*Segments -
|
||||
_cs,_ds,_es,_ss are the segment structures
|
||||
CS,DS,ES,SS is the 16-bit data
|
||||
|
||||
@@ -262,6 +262,50 @@ const cpu_family_t cpu_families[] = {
|
||||
{ .name = "", 0 }
|
||||
}
|
||||
},
|
||||
{
|
||||
.package = CPU_PKG_8088_VTECH,
|
||||
.manufacturer = "Intel",
|
||||
.name = "8088",
|
||||
.internal_name = "8088_vtech",
|
||||
.cpus = (const CPU[]) {
|
||||
{
|
||||
.name = "4.77",
|
||||
.cpu_type = CPU_8088,
|
||||
.fpus = fpus_8088,
|
||||
.rspeed = 4772728,
|
||||
.multi = 1,
|
||||
.voltage = 5000,
|
||||
.edx_reset = 0,
|
||||
.cpuid_model = 0,
|
||||
.cyrix_id = 0,
|
||||
.cpu_flags = 0,
|
||||
.mem_read_cycles = 0,
|
||||
.mem_write_cycles = 0,
|
||||
.cache_read_cycles = 0,
|
||||
.cache_write_cycles = 0,
|
||||
.atclk_div = 1
|
||||
},
|
||||
|
||||
{
|
||||
.name = "10",
|
||||
.cpu_type = CPU_8088,
|
||||
.fpus = fpus_8088,
|
||||
.rspeed = 10000000,
|
||||
.multi = 1,
|
||||
.voltage = 5000,
|
||||
.edx_reset = 0,
|
||||
.cpuid_model = 0,
|
||||
.cyrix_id = 0,
|
||||
.cpu_flags = 0,
|
||||
.mem_read_cycles = 0,
|
||||
.mem_write_cycles = 0,
|
||||
.cache_read_cycles = 0,
|
||||
.cache_write_cycles = 0,
|
||||
.atclk_div = 1
|
||||
},
|
||||
{ .name = "", 0 }
|
||||
}
|
||||
},
|
||||
{
|
||||
.package = CPU_PKG_8086,
|
||||
.manufacturer = "Intel",
|
||||
@@ -399,6 +443,49 @@ const cpu_family_t cpu_families[] = {
|
||||
{ .name = "", 0 }
|
||||
}
|
||||
},
|
||||
{
|
||||
.package = CPU_PKG_8086_VTECH,
|
||||
.manufacturer = "Intel",
|
||||
.name = "8086",
|
||||
.internal_name = "8086_vtech",
|
||||
.cpus = (const CPU[]) {
|
||||
{
|
||||
.name = "4.77",
|
||||
.cpu_type = CPU_8086,
|
||||
.fpus = fpus_8088,
|
||||
.rspeed = 4772728,
|
||||
.multi = 1,
|
||||
.voltage = 5000,
|
||||
.edx_reset = 0,
|
||||
.cpuid_model = 0,
|
||||
.cyrix_id = 0,
|
||||
.cpu_flags = 0,
|
||||
.mem_read_cycles = 0,
|
||||
.mem_write_cycles = 0,
|
||||
.cache_read_cycles = 0,
|
||||
.cache_write_cycles = 0,
|
||||
.atclk_div = 1
|
||||
},
|
||||
{
|
||||
.name = "10",
|
||||
.cpu_type = CPU_8086,
|
||||
.fpus = fpus_8088,
|
||||
.rspeed = 10000000,
|
||||
.multi = 1,
|
||||
.voltage = 5000,
|
||||
.edx_reset = 0,
|
||||
.cpuid_model = 0,
|
||||
.cyrix_id = 0,
|
||||
.cpu_flags = 0,
|
||||
.mem_read_cycles = 0,
|
||||
.mem_write_cycles = 0,
|
||||
.cache_read_cycles = 0,
|
||||
.cache_write_cycles = 0,
|
||||
.atclk_div = 1
|
||||
},
|
||||
{ .name = "", 0 }
|
||||
}
|
||||
},
|
||||
{
|
||||
.package = CPU_PKG_188,
|
||||
.manufacturer = "Intel",
|
||||
@@ -6008,7 +6095,6 @@ const cpu_family_t cpu_families[] = {
|
||||
{ .name = "", 0 }
|
||||
}
|
||||
},
|
||||
#ifdef USE_CYRIX_6X86
|
||||
{
|
||||
.package = CPU_PKG_SOCKET5_7,
|
||||
.manufacturer = "Cyrix",
|
||||
@@ -6368,7 +6454,6 @@ const cpu_family_t cpu_families[] = {
|
||||
{ .name = "", 0 }
|
||||
}
|
||||
},
|
||||
#endif /* USE_CYRIX_6X86 */
|
||||
{
|
||||
.package = CPU_PKG_SOCKET8,
|
||||
.manufacturer = "Intel",
|
||||
|
||||
@@ -272,6 +272,12 @@ reset_common(int hard)
|
||||
msr.fcr = (1 << 8) | (1 << 9) | (1 << 12) | (1 << 16) | (1 << 19) | (1 << 21);
|
||||
msw = 0;
|
||||
new_ne = 0;
|
||||
|
||||
ccr0 = ccr1 = ccr2 = ccr3 = ccr4 = ccr5 = ccr6 = ccr7 = 0;
|
||||
ccr4 = 0x85;
|
||||
cyrix.arr[3].base = 0x30000;
|
||||
cyrix.arr[3].size = 65536;
|
||||
|
||||
if (hascache)
|
||||
cr0 = 1 << 30;
|
||||
else
|
||||
|
||||
@@ -90,10 +90,9 @@ extern const OpFn dynarec_ops_winchip2_0f[1024];
|
||||
extern const OpFn dynarec_ops_pentium_0f[1024];
|
||||
extern const OpFn dynarec_ops_pentiummmx_0f[1024];
|
||||
|
||||
# ifdef USE_CYRIX_6X86
|
||||
extern const OpFn dynarec_ops_c6x86_0f[1024];
|
||||
extern const OpFn dynarec_ops_c6x86l_0f[1024];
|
||||
extern const OpFn dynarec_ops_c6x86mx_0f[1024];
|
||||
# endif /* USE_CYRIX_6X86 */
|
||||
|
||||
extern const OpFn dynarec_ops_k6_0f[1024];
|
||||
extern const OpFn dynarec_ops_k62_0f[1024];
|
||||
@@ -232,10 +231,9 @@ extern const OpFn ops_winchip2_0f[1024];
|
||||
extern const OpFn ops_pentium_0f[1024];
|
||||
extern const OpFn ops_pentiummmx_0f[1024];
|
||||
|
||||
#ifdef USE_CYRIX_6X86
|
||||
extern const OpFn ops_c6x86_0f[1024];
|
||||
extern const OpFn ops_c6x86l_0f[1024];
|
||||
extern const OpFn ops_c6x86mx_0f[1024];
|
||||
#endif /* USE_CYRIX_6X86 */
|
||||
|
||||
extern const OpFn ops_k6_0f[1024];
|
||||
extern const OpFn ops_k62_0f[1024];
|
||||
@@ -263,14 +261,20 @@ extern const OpFn ops_sf_fpu_d8_a16[32];
|
||||
extern const OpFn ops_sf_fpu_d8_a32[32];
|
||||
extern const OpFn ops_sf_fpu_d9_a16[256];
|
||||
extern const OpFn ops_sf_fpu_d9_a32[256];
|
||||
extern const OpFn ops_sf_fpu_cyrix_d9_a16[256];
|
||||
extern const OpFn ops_sf_fpu_cyrix_d9_a32[256];
|
||||
extern const OpFn ops_sf_fpu_da_a16[256];
|
||||
extern const OpFn ops_sf_fpu_da_a32[256];
|
||||
extern const OpFn ops_sf_fpu_db_a16[256];
|
||||
extern const OpFn ops_sf_fpu_db_a32[256];
|
||||
extern const OpFn ops_sf_fpu_cyrix_686_db_a16[256];
|
||||
extern const OpFn ops_sf_fpu_cyrix_686_db_a32[256];
|
||||
extern const OpFn ops_sf_fpu_dc_a16[32];
|
||||
extern const OpFn ops_sf_fpu_dc_a32[32];
|
||||
extern const OpFn ops_sf_fpu_dd_a16[256];
|
||||
extern const OpFn ops_sf_fpu_dd_a32[256];
|
||||
extern const OpFn ops_sf_fpu_cyrix_dd_a16[256];
|
||||
extern const OpFn ops_sf_fpu_cyrix_dd_a32[256];
|
||||
extern const OpFn ops_sf_fpu_de_a16[256];
|
||||
extern const OpFn ops_sf_fpu_de_a32[256];
|
||||
extern const OpFn ops_sf_fpu_df_a16[256];
|
||||
@@ -295,6 +299,8 @@ extern const OpFn ops_fpu_d8_a16[32];
|
||||
extern const OpFn ops_fpu_d8_a32[32];
|
||||
extern const OpFn ops_fpu_d9_a16[256];
|
||||
extern const OpFn ops_fpu_d9_a32[256];
|
||||
extern const OpFn ops_fpu_cyrix_d9_a16[256];
|
||||
extern const OpFn ops_fpu_cyrix_d9_a32[256];
|
||||
extern const OpFn ops_fpu_da_a16[256];
|
||||
extern const OpFn ops_fpu_da_a32[256];
|
||||
extern const OpFn ops_fpu_db_a16[256];
|
||||
@@ -303,6 +309,8 @@ extern const OpFn ops_fpu_dc_a16[32];
|
||||
extern const OpFn ops_fpu_dc_a32[32];
|
||||
extern const OpFn ops_fpu_dd_a16[256];
|
||||
extern const OpFn ops_fpu_dd_a32[256];
|
||||
extern const OpFn ops_fpu_cyrix_dd_a16[256];
|
||||
extern const OpFn ops_fpu_cyrix_dd_a32[256];
|
||||
extern const OpFn ops_fpu_de_a16[256];
|
||||
extern const OpFn ops_fpu_de_a32[256];
|
||||
extern const OpFn ops_fpu_df_a16[256];
|
||||
@@ -314,15 +322,23 @@ extern const OpFn ops_sf_fpu_686_da_a16[256];
|
||||
extern const OpFn ops_sf_fpu_686_da_a32[256];
|
||||
extern const OpFn ops_sf_fpu_686_db_a16[256];
|
||||
extern const OpFn ops_sf_fpu_686_db_a32[256];
|
||||
extern const OpFn ops_sf_fpu_cyrix_686_db_a16[256];
|
||||
extern const OpFn ops_sf_fpu_cyrix_686_db_a32[256];
|
||||
extern const OpFn ops_sf_fpu_686_df_a16[256];
|
||||
extern const OpFn ops_sf_fpu_686_df_a32[256];
|
||||
extern const OpFn ops_sf_fpu_cyrix_686_df_a16[256];
|
||||
extern const OpFn ops_sf_fpu_cyrix_686_df_a32[256];
|
||||
|
||||
extern const OpFn ops_fpu_686_da_a16[256];
|
||||
extern const OpFn ops_fpu_686_da_a32[256];
|
||||
extern const OpFn ops_fpu_686_db_a16[256];
|
||||
extern const OpFn ops_fpu_686_db_a32[256];
|
||||
extern const OpFn ops_fpu_cyrix_686_db_a16[256];
|
||||
extern const OpFn ops_fpu_cyrix_686_db_a32[256];
|
||||
extern const OpFn ops_fpu_686_df_a16[256];
|
||||
extern const OpFn ops_fpu_686_df_a32[256];
|
||||
extern const OpFn ops_fpu_cyrix_686_df_a16[256];
|
||||
extern const OpFn ops_fpu_cyrix_686_df_a32[256];
|
||||
|
||||
extern const OpFn ops_REPE[1024];
|
||||
extern const OpFn ops_REPNE[1024];
|
||||
|
||||
807
src/cpu/x86_ops_mmx_emmi.h
Normal file
807
src/cpu/x86_ops_mmx_emmi.h
Normal file
@@ -0,0 +1,807 @@
|
||||
/* Notes: "src2" means "first operand" */
|
||||
|
||||
static int
|
||||
opPMULHRWC_a16(UNUSED(uint32_t fetchdat))
|
||||
{
|
||||
MMX_REG src;
|
||||
MMX_REG *dst;
|
||||
|
||||
if (!(ccr7 & 1)) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
MMX_ENTER();
|
||||
|
||||
fetch_ea_16(fetchdat);
|
||||
|
||||
dst = MMX_GETREGP(cpu_reg);
|
||||
|
||||
MMX_GETSRC();
|
||||
|
||||
dst->w[0] = ((int32_t) (dst->sw[0] * (int32_t) src.sw[0]) + 0x4000) >> 15;
|
||||
dst->w[1] = ((int32_t) (dst->sw[1] * (int32_t) src.sw[1]) + 0x4000) >> 15;
|
||||
dst->w[2] = ((int32_t) (dst->sw[2] * (int32_t) src.sw[2]) + 0x4000) >> 15;
|
||||
dst->w[3] = ((int32_t) (dst->sw[3] * (int32_t) src.sw[3]) + 0x4000) >> 15;
|
||||
|
||||
MMX_SETEXP(cpu_reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
opPMULHRWC_a32(UNUSED(uint32_t fetchdat))
|
||||
{
|
||||
MMX_REG src;
|
||||
MMX_REG *dst;
|
||||
|
||||
if (!(ccr7 & 1)) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
MMX_ENTER();
|
||||
|
||||
fetch_ea_32(fetchdat);
|
||||
|
||||
dst = MMX_GETREGP(cpu_reg);
|
||||
|
||||
MMX_GETSRC();
|
||||
|
||||
dst->w[0] = ((int32_t) (dst->sw[0] * (int32_t) src.sw[0]) + 0x4000) >> 15;
|
||||
dst->w[1] = ((int32_t) (dst->sw[1] * (int32_t) src.sw[1]) + 0x4000) >> 15;
|
||||
dst->w[2] = ((int32_t) (dst->sw[2] * (int32_t) src.sw[2]) + 0x4000) >> 15;
|
||||
dst->w[3] = ((int32_t) (dst->sw[3] * (int32_t) src.sw[3]) + 0x4000) >> 15;
|
||||
|
||||
MMX_SETEXP(cpu_reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
opPMULHRIW_a16(uint32_t fetchdat)
|
||||
{
|
||||
MMX_REG src, src2;
|
||||
MMX_REG *dst;
|
||||
|
||||
if (!(ccr7 & 1)) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
MMX_ENTER();
|
||||
|
||||
fetch_ea_16(fetchdat);
|
||||
|
||||
src2 = MMX_GETREG(cpu_reg);
|
||||
dst = MMX_GETREGP(cpu_reg ^ 1);
|
||||
|
||||
MMX_GETSRC();
|
||||
|
||||
dst->w[0] = (((int32_t) src2.sw[0] * (int32_t) src.sw[0]) + 0x4000) >> 15;
|
||||
dst->w[1] = (((int32_t) src2.sw[1] * (int32_t) src.sw[1]) + 0x4000) >> 15;
|
||||
dst->w[2] = (((int32_t) src2.sw[2] * (int32_t) src.sw[2]) + 0x4000) >> 15;
|
||||
dst->w[3] = (((int32_t) src2.sw[3] * (int32_t) src.sw[3]) + 0x4000) >> 15;
|
||||
|
||||
MMX_SETEXP(cpu_reg ^ 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
opPMULHRIW_a32(uint32_t fetchdat)
|
||||
{
|
||||
MMX_REG src, src2;
|
||||
MMX_REG *dst;
|
||||
|
||||
if (!(ccr7 & 1)) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
MMX_ENTER();
|
||||
|
||||
fetch_ea_32(fetchdat);
|
||||
|
||||
src2 = MMX_GETREG(cpu_reg);
|
||||
dst = MMX_GETREGP(cpu_reg ^ 1);
|
||||
|
||||
MMX_GETSRC();
|
||||
|
||||
dst->w[0] = (((int32_t) src2.sw[0] * (int32_t) src.sw[0]) + 0x4000) >> 15;
|
||||
dst->w[1] = (((int32_t) src2.sw[1] * (int32_t) src.sw[1]) + 0x4000) >> 15;
|
||||
dst->w[2] = (((int32_t) src2.sw[2] * (int32_t) src.sw[2]) + 0x4000) >> 15;
|
||||
dst->w[3] = (((int32_t) src2.sw[3] * (int32_t) src.sw[3]) + 0x4000) >> 15;
|
||||
|
||||
MMX_SETEXP(cpu_reg ^ 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
opPDISTIB_a16(uint32_t fetchdat)
|
||||
{
|
||||
MMX_REG src, src2;
|
||||
MMX_REG *dst;
|
||||
|
||||
if (!(ccr7 & 1)) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
MMX_ENTER();
|
||||
|
||||
fetch_ea_16(fetchdat);
|
||||
|
||||
if (cpu_mod == 3) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
src2 = MMX_GETREG(cpu_reg);
|
||||
dst = MMX_GETREGP(cpu_reg ^ 1);
|
||||
|
||||
MMX_GETSRC();
|
||||
|
||||
dst->b[0] = USATB(dst->b[0] + abs(src2.b[0] - src.b[0]));
|
||||
dst->b[1] = USATB(dst->b[1] + abs(src2.b[1] - src.b[1]));
|
||||
dst->b[2] = USATB(dst->b[2] + abs(src2.b[2] - src.b[2]));
|
||||
dst->b[3] = USATB(dst->b[3] + abs(src2.b[3] - src.b[3]));
|
||||
dst->b[4] = USATB(dst->b[4] + abs(src2.b[4] - src.b[4]));
|
||||
dst->b[5] = USATB(dst->b[5] + abs(src2.b[5] - src.b[5]));
|
||||
dst->b[6] = USATB(dst->b[6] + abs(src2.b[6] - src.b[6]));
|
||||
dst->b[7] = USATB(dst->b[7] + abs(src2.b[7] - src.b[7]));
|
||||
|
||||
MMX_SETEXP(cpu_reg ^ 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
opPDISTIB_a32(uint32_t fetchdat)
|
||||
{
|
||||
MMX_REG src, src2;
|
||||
MMX_REG *dst;
|
||||
|
||||
if (!(ccr7 & 1)) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
MMX_ENTER();
|
||||
|
||||
fetch_ea_32(fetchdat);
|
||||
|
||||
if (cpu_mod == 3) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
src2 = MMX_GETREG(cpu_reg);
|
||||
dst = MMX_GETREGP(cpu_reg ^ 1);
|
||||
|
||||
MMX_GETSRC();
|
||||
|
||||
dst->b[0] = USATB(dst->b[0] + abs(src2.b[0] - src.b[0]));
|
||||
dst->b[1] = USATB(dst->b[1] + abs(src2.b[1] - src.b[1]));
|
||||
dst->b[2] = USATB(dst->b[2] + abs(src2.b[2] - src.b[2]));
|
||||
dst->b[3] = USATB(dst->b[3] + abs(src2.b[3] - src.b[3]));
|
||||
dst->b[4] = USATB(dst->b[4] + abs(src2.b[4] - src.b[4]));
|
||||
dst->b[5] = USATB(dst->b[5] + abs(src2.b[5] - src.b[5]));
|
||||
dst->b[6] = USATB(dst->b[6] + abs(src2.b[6] - src.b[6]));
|
||||
dst->b[7] = USATB(dst->b[7] + abs(src2.b[7] - src.b[7]));
|
||||
|
||||
MMX_SETEXP(cpu_reg ^ 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
opPMACHRIW_a16(uint32_t fetchdat)
|
||||
{
|
||||
MMX_REG src, src2;
|
||||
MMX_REG *dst;
|
||||
|
||||
if (!(ccr7 & 1)) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
MMX_ENTER();
|
||||
|
||||
fetch_ea_16(fetchdat);
|
||||
|
||||
if (cpu_mod == 3) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
src2 = MMX_GETREG(cpu_reg);
|
||||
dst = MMX_GETREGP(cpu_reg ^ 1);
|
||||
|
||||
MMX_GETSRC();
|
||||
|
||||
dst->w[0] += (((int32_t) src2.sw[0] * (int32_t) src.sw[0]) + 0x4000) >> 15;
|
||||
dst->w[1] += (((int32_t) src2.sw[1] * (int32_t) src.sw[1]) + 0x4000) >> 15;
|
||||
dst->w[2] += (((int32_t) src2.sw[2] * (int32_t) src.sw[2]) + 0x4000) >> 15;
|
||||
dst->w[3] += (((int32_t) src2.sw[3] * (int32_t) src.sw[3]) + 0x4000) >> 15;
|
||||
|
||||
MMX_SETEXP(cpu_reg ^ 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
opPMACHRIW_a32(uint32_t fetchdat)
|
||||
{
|
||||
MMX_REG src, src2;
|
||||
MMX_REG *dst;
|
||||
|
||||
if (!(ccr7 & 1)) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
MMX_ENTER();
|
||||
|
||||
fetch_ea_32(fetchdat);
|
||||
|
||||
if (cpu_mod == 3) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
src2 = MMX_GETREG(cpu_reg);
|
||||
dst = MMX_GETREGP(cpu_reg ^ 1);
|
||||
|
||||
MMX_GETSRC();
|
||||
|
||||
dst->w[0] += (((int32_t) src2.sw[0] * (int32_t) src.sw[0]) + 0x4000) >> 15;
|
||||
dst->w[1] += (((int32_t) src2.sw[1] * (int32_t) src.sw[1]) + 0x4000) >> 15;
|
||||
dst->w[2] += (((int32_t) src2.sw[2] * (int32_t) src.sw[2]) + 0x4000) >> 15;
|
||||
dst->w[3] += (((int32_t) src2.sw[3] * (int32_t) src.sw[3]) + 0x4000) >> 15;
|
||||
|
||||
MMX_SETEXP(cpu_reg ^ 1);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
opPADDSIW_a16(uint32_t fetchdat)
|
||||
{
|
||||
MMX_REG src, src2;
|
||||
MMX_REG *dst;
|
||||
|
||||
if (!(ccr7 & 1)) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
MMX_ENTER();
|
||||
|
||||
fetch_ea_16(fetchdat);
|
||||
|
||||
src2 = MMX_GETREG(cpu_reg);
|
||||
dst = MMX_GETREGP(cpu_reg ^ 1);
|
||||
|
||||
MMX_GETSRC();
|
||||
|
||||
dst->sw[0] = SSATW(src2.sw[0] + src.sw[0]);
|
||||
dst->sw[1] = SSATW(src2.sw[1] + src.sw[1]);
|
||||
dst->sw[2] = SSATW(src2.sw[2] + src.sw[2]);
|
||||
dst->sw[3] = SSATW(src2.sw[3] + src.sw[3]);
|
||||
|
||||
MMX_SETEXP(cpu_reg ^ 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
opPADDSIW_a32(uint32_t fetchdat)
|
||||
{
|
||||
MMX_REG src, src2;
|
||||
MMX_REG *dst;
|
||||
|
||||
if (!(ccr7 & 1)) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
MMX_ENTER();
|
||||
|
||||
fetch_ea_32(fetchdat);
|
||||
|
||||
src2 = MMX_GETREG(cpu_reg);
|
||||
dst = MMX_GETREGP(cpu_reg ^ 1);
|
||||
|
||||
MMX_GETSRC();
|
||||
|
||||
dst->sw[0] = SSATW(src2.sw[0] + src.sw[0]);
|
||||
dst->sw[1] = SSATW(src2.sw[1] + src.sw[1]);
|
||||
dst->sw[2] = SSATW(src2.sw[2] + src.sw[2]);
|
||||
dst->sw[3] = SSATW(src2.sw[3] + src.sw[3]);
|
||||
|
||||
MMX_SETEXP(cpu_reg ^ 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
opPSUBSIW_a16(uint32_t fetchdat)
|
||||
{
|
||||
MMX_REG src, src2;
|
||||
MMX_REG *dst;
|
||||
|
||||
if (!(ccr7 & 1)) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
MMX_ENTER();
|
||||
|
||||
fetch_ea_16(fetchdat);
|
||||
|
||||
src2 = MMX_GETREG(cpu_reg);
|
||||
dst = MMX_GETREGP(cpu_reg ^ 1);
|
||||
|
||||
MMX_GETSRC();
|
||||
|
||||
dst->sw[0] = SSATW(src2.sw[0] - src.sw[0]);
|
||||
dst->sw[1] = SSATW(src2.sw[1] - src.sw[1]);
|
||||
dst->sw[2] = SSATW(src2.sw[2] - src.sw[2]);
|
||||
dst->sw[3] = SSATW(src2.sw[3] - src.sw[3]);
|
||||
|
||||
MMX_SETEXP(cpu_reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
opPSUBSIW_a32(uint32_t fetchdat)
|
||||
{
|
||||
MMX_REG src, src2;
|
||||
MMX_REG *dst;
|
||||
|
||||
if (!(ccr7 & 1)) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
MMX_ENTER();
|
||||
|
||||
fetch_ea_32(fetchdat);
|
||||
|
||||
src2 = MMX_GETREG(cpu_reg);
|
||||
dst = MMX_GETREGP(cpu_reg ^ 1);
|
||||
|
||||
MMX_GETSRC();
|
||||
|
||||
dst->sw[0] = SSATW(src2.sw[0] - src.sw[0]);
|
||||
dst->sw[1] = SSATW(src2.sw[1] - src.sw[1]);
|
||||
dst->sw[2] = SSATW(src2.sw[2] - src.sw[2]);
|
||||
dst->sw[3] = SSATW(src2.sw[3] - src.sw[3]);
|
||||
|
||||
MMX_SETEXP(cpu_reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
opPAVEB_a16(uint32_t fetchdat)
|
||||
{
|
||||
MMX_REG src;
|
||||
MMX_REG *dst;
|
||||
|
||||
if (!(ccr7 & 1)) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
MMX_ENTER();
|
||||
|
||||
fetch_ea_16(fetchdat);
|
||||
|
||||
dst = MMX_GETREGP(cpu_reg);
|
||||
|
||||
MMX_GETSRC();
|
||||
|
||||
dst->b[0] = (dst->b[0] + src.b[0]) >> 1;
|
||||
dst->b[1] = (dst->b[1] + src.b[1]) >> 1;
|
||||
dst->b[2] = (dst->b[2] + src.b[2]) >> 1;
|
||||
dst->b[3] = (dst->b[3] + src.b[3]) >> 1;
|
||||
dst->b[4] = (dst->b[4] + src.b[4]) >> 1;
|
||||
dst->b[5] = (dst->b[5] + src.b[5]) >> 1;
|
||||
dst->b[6] = (dst->b[6] + src.b[6]) >> 1;
|
||||
dst->b[7] = (dst->b[7] + src.b[7]) >> 1;
|
||||
|
||||
MMX_SETEXP(cpu_reg);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
opPAVEB_a32(uint32_t fetchdat)
|
||||
{
|
||||
MMX_REG src;
|
||||
MMX_REG *dst;
|
||||
|
||||
if (!(ccr7 & 1)) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
MMX_ENTER();
|
||||
|
||||
fetch_ea_32(fetchdat);
|
||||
|
||||
dst = MMX_GETREGP(cpu_reg);
|
||||
|
||||
MMX_GETSRC();
|
||||
|
||||
dst->b[0] = (dst->b[0] + src.b[0]) >> 1;
|
||||
dst->b[1] = (dst->b[1] + src.b[1]) >> 1;
|
||||
dst->b[2] = (dst->b[2] + src.b[2]) >> 1;
|
||||
dst->b[3] = (dst->b[3] + src.b[3]) >> 1;
|
||||
dst->b[4] = (dst->b[4] + src.b[4]) >> 1;
|
||||
dst->b[5] = (dst->b[5] + src.b[5]) >> 1;
|
||||
dst->b[6] = (dst->b[6] + src.b[6]) >> 1;
|
||||
dst->b[7] = (dst->b[7] + src.b[7]) >> 1;
|
||||
|
||||
MMX_SETEXP(cpu_reg);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
opPMAGW_a16(uint32_t fetchdat)
|
||||
{
|
||||
MMX_REG src;
|
||||
MMX_REG *dst;
|
||||
|
||||
if (!(ccr7 & 1)) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
MMX_ENTER();
|
||||
|
||||
fetch_ea_16(fetchdat);
|
||||
|
||||
dst = MMX_GETREGP(cpu_reg);
|
||||
|
||||
MMX_GETSRC();
|
||||
|
||||
if (abs(src.sw[0]) > abs(dst->sw[0])) dst->sw[0] = src.sw[0];
|
||||
if (abs(src.sw[1]) > abs(dst->sw[1])) dst->sw[1] = src.sw[1];
|
||||
if (abs(src.sw[2]) > abs(dst->sw[2])) dst->sw[2] = src.sw[2];
|
||||
if (abs(src.sw[3]) > abs(dst->sw[3])) dst->sw[3] = src.sw[3];
|
||||
|
||||
MMX_SETEXP(cpu_reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
opPMAGW_a32(uint32_t fetchdat)
|
||||
{
|
||||
MMX_REG src;
|
||||
MMX_REG *dst;
|
||||
|
||||
if (!(ccr7 & 1)) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
MMX_ENTER();
|
||||
|
||||
fetch_ea_32(fetchdat);
|
||||
|
||||
dst = MMX_GETREGP(cpu_reg);
|
||||
|
||||
MMX_GETSRC();
|
||||
|
||||
if (abs(src.sw[0]) > abs(dst->sw[0])) dst->sw[0] = src.sw[0];
|
||||
if (abs(src.sw[1]) > abs(dst->sw[1])) dst->sw[1] = src.sw[1];
|
||||
if (abs(src.sw[2]) > abs(dst->sw[2])) dst->sw[2] = src.sw[2];
|
||||
if (abs(src.sw[3]) > abs(dst->sw[3])) dst->sw[3] = src.sw[3];
|
||||
|
||||
MMX_SETEXP(cpu_reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
opPMVZB_a16(uint32_t fetchdat)
|
||||
{
|
||||
MMX_REG src, src2;
|
||||
MMX_REG *dst;
|
||||
|
||||
if (!(ccr7 & 1)) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
MMX_ENTER();
|
||||
|
||||
fetch_ea_16(fetchdat);
|
||||
|
||||
if (cpu_mod == 3) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
dst = MMX_GETREGP(cpu_reg);
|
||||
src2 = MMX_GETREG(cpu_reg ^ 1);
|
||||
|
||||
MMX_GETSRC();
|
||||
|
||||
if (src2.b[0] == 0) dst->b[0] = src.b[0];
|
||||
if (src2.b[1] == 0) dst->b[1] = src.b[1];
|
||||
if (src2.b[2] == 0) dst->b[2] = src.b[2];
|
||||
if (src2.b[3] == 0) dst->b[3] = src.b[3];
|
||||
if (src2.b[4] == 0) dst->b[4] = src.b[4];
|
||||
if (src2.b[5] == 0) dst->b[5] = src.b[5];
|
||||
if (src2.b[6] == 0) dst->b[6] = src.b[6];
|
||||
if (src2.b[7] == 0) dst->b[7] = src.b[7];
|
||||
|
||||
MMX_SETEXP(cpu_reg);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
opPMVZB_a32(uint32_t fetchdat)
|
||||
{
|
||||
MMX_REG src, src2;
|
||||
MMX_REG *dst;
|
||||
|
||||
if (!(ccr7 & 1)) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
MMX_ENTER();
|
||||
|
||||
fetch_ea_32(fetchdat);
|
||||
|
||||
if (cpu_mod == 3) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
dst = MMX_GETREGP(cpu_reg);
|
||||
src2 = MMX_GETREG(cpu_reg ^ 1);
|
||||
|
||||
MMX_GETSRC();
|
||||
|
||||
if (src2.b[0] == 0) dst->b[0] = src.b[0];
|
||||
if (src2.b[1] == 0) dst->b[1] = src.b[1];
|
||||
if (src2.b[2] == 0) dst->b[2] = src.b[2];
|
||||
if (src2.b[3] == 0) dst->b[3] = src.b[3];
|
||||
if (src2.b[4] == 0) dst->b[4] = src.b[4];
|
||||
if (src2.b[5] == 0) dst->b[5] = src.b[5];
|
||||
if (src2.b[6] == 0) dst->b[6] = src.b[6];
|
||||
if (src2.b[7] == 0) dst->b[7] = src.b[7];
|
||||
|
||||
MMX_SETEXP(cpu_reg);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
opPMVNZB_a16(uint32_t fetchdat)
|
||||
{
|
||||
MMX_REG src, src2;
|
||||
MMX_REG *dst;
|
||||
|
||||
if (!(ccr7 & 1)) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
MMX_ENTER();
|
||||
|
||||
fetch_ea_16(fetchdat);
|
||||
|
||||
if (cpu_mod == 3) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
dst = MMX_GETREGP(cpu_reg);
|
||||
src2 = MMX_GETREG(cpu_reg ^ 1);
|
||||
|
||||
MMX_GETSRC();
|
||||
|
||||
if (src2.b[0] != 0) dst->b[0] = src.b[0];
|
||||
if (src2.b[1] != 0) dst->b[1] = src.b[1];
|
||||
if (src2.b[2] != 0) dst->b[2] = src.b[2];
|
||||
if (src2.b[3] != 0) dst->b[3] = src.b[3];
|
||||
if (src2.b[4] != 0) dst->b[4] = src.b[4];
|
||||
if (src2.b[5] != 0) dst->b[5] = src.b[5];
|
||||
if (src2.b[6] != 0) dst->b[6] = src.b[6];
|
||||
if (src2.b[7] != 0) dst->b[7] = src.b[7];
|
||||
|
||||
MMX_SETEXP(cpu_reg);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
opPMVNZB_a32(uint32_t fetchdat)
|
||||
{
|
||||
MMX_REG src, src2;
|
||||
MMX_REG *dst;
|
||||
|
||||
if (!(ccr7 & 1)) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
MMX_ENTER();
|
||||
|
||||
fetch_ea_32(fetchdat);
|
||||
|
||||
if (cpu_mod == 3) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
dst = MMX_GETREGP(cpu_reg);
|
||||
src2 = MMX_GETREG(cpu_reg ^ 1);
|
||||
|
||||
MMX_GETSRC();
|
||||
|
||||
if (src2.b[0] != 0) dst->b[0] = src.b[0];
|
||||
if (src2.b[1] != 0) dst->b[1] = src.b[1];
|
||||
if (src2.b[2] != 0) dst->b[2] = src.b[2];
|
||||
if (src2.b[3] != 0) dst->b[3] = src.b[3];
|
||||
if (src2.b[4] != 0) dst->b[4] = src.b[4];
|
||||
if (src2.b[5] != 0) dst->b[5] = src.b[5];
|
||||
if (src2.b[6] != 0) dst->b[6] = src.b[6];
|
||||
if (src2.b[7] != 0) dst->b[7] = src.b[7];
|
||||
|
||||
MMX_SETEXP(cpu_reg);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
opPMVLZB_a16(uint32_t fetchdat)
|
||||
{
|
||||
MMX_REG src, src2;
|
||||
MMX_REG *dst;
|
||||
|
||||
if (!(ccr7 & 1)) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
MMX_ENTER();
|
||||
|
||||
fetch_ea_16(fetchdat);
|
||||
|
||||
if (cpu_mod == 3) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
dst = MMX_GETREGP(cpu_reg);
|
||||
src2 = MMX_GETREG(cpu_reg ^ 1);
|
||||
|
||||
MMX_GETSRC();
|
||||
|
||||
if (src2.sb[0] < 0) dst->b[0] = src.b[0];
|
||||
if (src2.sb[1] < 0) dst->b[1] = src.b[1];
|
||||
if (src2.sb[2] < 0) dst->b[2] = src.b[2];
|
||||
if (src2.sb[3] < 0) dst->b[3] = src.b[3];
|
||||
if (src2.sb[4] < 0) dst->b[4] = src.b[4];
|
||||
if (src2.sb[5] < 0) dst->b[5] = src.b[5];
|
||||
if (src2.sb[6] < 0) dst->b[6] = src.b[6];
|
||||
if (src2.sb[7] < 0) dst->b[7] = src.b[7];
|
||||
|
||||
MMX_SETEXP(cpu_reg);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
opPMVLZB_a32(uint32_t fetchdat)
|
||||
{
|
||||
MMX_REG src, src2;
|
||||
MMX_REG *dst;
|
||||
|
||||
if (!(ccr7 & 1)) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
MMX_ENTER();
|
||||
|
||||
fetch_ea_32(fetchdat);
|
||||
|
||||
if (cpu_mod == 3) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
dst = MMX_GETREGP(cpu_reg);
|
||||
src2 = MMX_GETREG(cpu_reg ^ 1);
|
||||
|
||||
MMX_GETSRC();
|
||||
|
||||
if (src2.sb[0] < 0) dst->b[0] = src.b[0];
|
||||
if (src2.sb[1] < 0) dst->b[1] = src.b[1];
|
||||
if (src2.sb[2] < 0) dst->b[2] = src.b[2];
|
||||
if (src2.sb[3] < 0) dst->b[3] = src.b[3];
|
||||
if (src2.sb[4] < 0) dst->b[4] = src.b[4];
|
||||
if (src2.sb[5] < 0) dst->b[5] = src.b[5];
|
||||
if (src2.sb[6] < 0) dst->b[6] = src.b[6];
|
||||
if (src2.sb[7] < 0) dst->b[7] = src.b[7];
|
||||
|
||||
MMX_SETEXP(cpu_reg);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
opPMVGEZB_a16(uint32_t fetchdat)
|
||||
{
|
||||
MMX_REG src, src2;
|
||||
MMX_REG *dst;
|
||||
|
||||
if (!(ccr7 & 1)) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
MMX_ENTER();
|
||||
|
||||
fetch_ea_16(fetchdat);
|
||||
|
||||
if (cpu_mod == 3) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
dst = MMX_GETREGP(cpu_reg);
|
||||
src2 = MMX_GETREG(cpu_reg ^ 1);
|
||||
|
||||
MMX_GETSRC();
|
||||
|
||||
if (src2.sb[0] >= 0) dst->b[0] = src.b[0];
|
||||
if (src2.sb[1] >= 0) dst->b[1] = src.b[1];
|
||||
if (src2.sb[2] >= 0) dst->b[2] = src.b[2];
|
||||
if (src2.sb[3] >= 0) dst->b[3] = src.b[3];
|
||||
if (src2.sb[4] >= 0) dst->b[4] = src.b[4];
|
||||
if (src2.sb[5] >= 0) dst->b[5] = src.b[5];
|
||||
if (src2.sb[6] >= 0) dst->b[6] = src.b[6];
|
||||
if (src2.sb[7] >= 0) dst->b[7] = src.b[7];
|
||||
|
||||
MMX_SETEXP(cpu_reg);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
opPMVGEZB_a32(uint32_t fetchdat)
|
||||
{
|
||||
MMX_REG src, src2;
|
||||
MMX_REG *dst;
|
||||
|
||||
if (!(ccr7 & 1)) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
MMX_ENTER();
|
||||
|
||||
fetch_ea_32(fetchdat);
|
||||
|
||||
if (cpu_mod == 3) {
|
||||
x86illegal();
|
||||
return 1;
|
||||
}
|
||||
|
||||
dst = MMX_GETREGP(cpu_reg);
|
||||
src2 = MMX_GETREG(cpu_reg ^ 1);
|
||||
|
||||
MMX_GETSRC();
|
||||
|
||||
if (src2.sb[0] >= 0) dst->b[0] = src.b[0];
|
||||
if (src2.sb[1] >= 0) dst->b[1] = src.b[1];
|
||||
if (src2.sb[2] >= 0) dst->b[2] = src.b[2];
|
||||
if (src2.sb[3] >= 0) dst->b[3] = src.b[3];
|
||||
if (src2.sb[4] >= 0) dst->b[4] = src.b[4];
|
||||
if (src2.sb[5] >= 0) dst->b[5] = src.b[5];
|
||||
if (src2.sb[6] >= 0) dst->b[6] = src.b[6];
|
||||
if (src2.sb[7] >= 0) dst->b[7] = src.b[7];
|
||||
|
||||
MMX_SETEXP(cpu_reg);
|
||||
return 0;
|
||||
}
|
||||
@@ -110,7 +110,6 @@ opMOVD_mm_l_a32(uint32_t fetchdat)
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef USE_CYRIX_6X86
|
||||
/*Cyrix maps both MOVD and SMINT to the same opcode*/
|
||||
static int
|
||||
opMOVD_mm_l_a16_cx(uint32_t fetchdat)
|
||||
@@ -170,7 +169,6 @@ opMOVD_mm_l_a32_cx(uint32_t fetchdat)
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif /* USE_CYRIX_6X86 */
|
||||
|
||||
static int
|
||||
opMOVQ_q_mm_a16(uint32_t fetchdat)
|
||||
|
||||
@@ -241,6 +241,24 @@ x87_fround32_64(double b)
|
||||
return (int64_t) x87_fround32(b);
|
||||
}
|
||||
|
||||
static __inline int64_t
|
||||
x87_fround_nearest(double b)
|
||||
{
|
||||
double da, dc;
|
||||
int64_t a, c;
|
||||
|
||||
da = floor(b);
|
||||
dc = floor(b + 1.0);
|
||||
a = (int64_t) da;
|
||||
c = (int64_t) dc;
|
||||
if ((b - a) < (c - b))
|
||||
return a;
|
||||
else if ((b - a) > (c - b))
|
||||
return c;
|
||||
else
|
||||
return (a & 1) ? c : a;
|
||||
}
|
||||
|
||||
static __inline int64_t
|
||||
x87_fround(double b)
|
||||
{
|
||||
@@ -1267,6 +1285,86 @@ const OpFn OP_TABLE(sf_fpu_d9_a32)[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
const OpFn OP_TABLE(sf_fpu_cyrix_d9_a16)[256] = {
|
||||
// clang-format off
|
||||
/*0x00*/ sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16,
|
||||
/*0x08*/ ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
/*0x10*/ sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16,
|
||||
/*0x18*/ sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16,
|
||||
/*0x20*/ sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16,
|
||||
/*0x28*/ sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16,
|
||||
/*0x30*/ sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16,
|
||||
/*0x38*/ sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16,
|
||||
|
||||
/*0x40*/ sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16,
|
||||
/*0x48*/ ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
/*0x50*/ sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16,
|
||||
/*0x58*/ sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16,
|
||||
/*0x60*/ sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16,
|
||||
/*0x68*/ sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16,
|
||||
/*0x70*/ sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16,
|
||||
/*0x78*/ sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16,
|
||||
|
||||
/*0x80*/ sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16, sf_FLDs_a16,
|
||||
/*0x88*/ ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
/*0x90*/ sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16, sf_FSTs_a16,
|
||||
/*0x98*/ sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16, sf_FSTPs_a16,
|
||||
/*0xa0*/ sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16, sf_FLDENV_a16,
|
||||
/*0xa8*/ sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16, sf_FLDCW_a16,
|
||||
/*0xb0*/ sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16, sf_FNSTENV_a16,
|
||||
/*0xb8*/ sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16, sf_FNSTCW_a16,
|
||||
|
||||
/*0xc0*/ sf_FLD_sti, sf_FLD_sti, sf_FLD_sti, sf_FLD_sti, sf_FLD_sti, sf_FLD_sti, sf_FLD_sti, sf_FLD_sti,
|
||||
/*0xc8*/ sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti,
|
||||
/*0xd0*/ sf_FNOP, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
/*0xd8*/ sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, /*Invalid*/
|
||||
/*0xe0*/ sf_FCHS, sf_FABS, ILLEGAL_a16, ILLEGAL_a16, sf_FTST, sf_FXAM, sf_FTSTP, ILLEGAL_a16,
|
||||
/*0xe8*/ sf_FLD1, sf_FLDL2T, sf_FLDL2E, sf_FLDPI, sf_FLDEG2, sf_FLDLN2, sf_FLDZ, ILLEGAL_a16,
|
||||
/*0xf0*/ sf_F2XM1, sf_FYL2X, sf_FPTAN, sf_FPATAN, sf_FXTRACT, sf_FPREM1, sf_FDECSTP, sf_FINCSTP,
|
||||
/*0xf8*/ sf_FPREM, sf_FYL2XP1, sf_FSQRT, sf_FSINCOS, sf_FRNDINT, sf_FSCALE, sf_FSIN, sf_FCOS,
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
const OpFn OP_TABLE(sf_fpu_cyrix_d9_a32)[256] = {
|
||||
// clang-format off
|
||||
sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32,
|
||||
sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32,
|
||||
sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32,
|
||||
sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32,
|
||||
sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32,
|
||||
sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32,
|
||||
|
||||
sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32,
|
||||
sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32,
|
||||
sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32,
|
||||
sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32,
|
||||
sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32,
|
||||
sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32,
|
||||
|
||||
sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32, sf_FLDs_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32, sf_FSTs_a32,
|
||||
sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32, sf_FSTPs_a32,
|
||||
sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32, sf_FLDENV_a32,
|
||||
sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32, sf_FLDCW_a32,
|
||||
sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32, sf_FNSTENV_a32,
|
||||
sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32, sf_FNSTCW_a32,
|
||||
|
||||
sf_FLD_sti, sf_FLD_sti, sf_FLD_sti, sf_FLD_sti, sf_FLD_sti, sf_FLD_sti, sf_FLD_sti, sf_FLD_sti,
|
||||
sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti,
|
||||
sf_FNOP, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, /*Invalid*/
|
||||
sf_FCHS, sf_FABS, ILLEGAL_a32, ILLEGAL_a32, sf_FTST, sf_FXAM, sf_FTSTP, ILLEGAL_a32,
|
||||
sf_FLD1, sf_FLDL2T, sf_FLDL2E, sf_FLDPI, sf_FLDEG2, sf_FLDLN2, sf_FLDZ, ILLEGAL_a32,
|
||||
sf_F2XM1, sf_FYL2X, sf_FPTAN, sf_FPATAN, sf_FXTRACT, sf_FPREM1, sf_FDECSTP, sf_FINCSTP,
|
||||
sf_FPREM, sf_FYL2XP1, sf_FSQRT, sf_FSINCOS, sf_FRNDINT, sf_FSCALE, sf_FSIN, sf_FCOS,
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
const OpFn OP_TABLE(sf_fpu_287_da_a16)[256] = {
|
||||
// clang-format off
|
||||
sf_FADDil_a16, sf_FADDil_a16, sf_FADDil_a16, sf_FADDil_a16, sf_FADDil_a16, sf_FADDil_a16, sf_FADDil_a16, sf_FADDil_a16,
|
||||
@@ -1750,6 +1848,87 @@ const OpFn OP_TABLE(sf_fpu_686_db_a32)[256] = {
|
||||
};
|
||||
# endif
|
||||
|
||||
# ifndef OPS_286_386
|
||||
const OpFn OP_TABLE(sf_fpu_cyrix_686_db_a16)[256] = {
|
||||
// clang-format off
|
||||
sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16,
|
||||
sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16,
|
||||
|
||||
sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16,
|
||||
sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16,
|
||||
|
||||
sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16, sf_FILDil_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16, sf_FISTil_a16,
|
||||
sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16, sf_FISTPil_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16, sf_FLDe_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16, sf_FSTPe_a16,
|
||||
|
||||
sf_FCMOVNB, sf_FCMOVNB, sf_FCMOVNB, sf_FCMOVNB, sf_FCMOVNB, sf_FCMOVNB, sf_FCMOVNB, sf_FCMOVNB,
|
||||
sf_FCMOVNE, sf_FCMOVNE, sf_FCMOVNE, sf_FCMOVNE, sf_FCMOVNE, sf_FCMOVNE, sf_FCMOVNE, sf_FCMOVNE,
|
||||
sf_FCMOVNBE, sf_FCMOVNBE, sf_FCMOVNBE, sf_FCMOVNBE, sf_FCMOVNBE, sf_FCMOVNBE, sf_FCMOVNBE, sf_FCMOVNBE,
|
||||
sf_FCMOVNU, sf_FCMOVNU, sf_FCMOVNU, sf_FCMOVNU, sf_FCMOVNU, sf_FCMOVNU, sf_FCMOVNU, sf_FCMOVNU,
|
||||
sf_FNOP, sf_FNOP, sf_FNCLEX, sf_FNINIT, sf_FNOP, sf_FNOP, ILLEGAL_a16, ILLEGAL_a16,
|
||||
sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj,
|
||||
sf_FCOMI_st0_stj, sf_FCOMI_st0_stj, sf_FCOMI_st0_stj, sf_FCOMI_st0_stj, sf_FCOMI_st0_stj, sf_FCOMI_st0_stj, sf_FCOMI_st0_stj, sf_FCOMI_st0_stj,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, sf_FRINT2, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
// clang-format on
|
||||
};
|
||||
const OpFn OP_TABLE(sf_fpu_cyrix_686_db_a32)[256] = {
|
||||
// clang-format off
|
||||
sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32,
|
||||
sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32,
|
||||
|
||||
sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32,
|
||||
sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32,
|
||||
|
||||
sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32, sf_FILDil_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32, sf_FISTil_a32,
|
||||
sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32, sf_FISTPil_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32, sf_FLDe_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32, sf_FSTPe_a32,
|
||||
|
||||
sf_FCMOVNB, sf_FCMOVNB, sf_FCMOVNB, sf_FCMOVNB, sf_FCMOVNB, sf_FCMOVNB, sf_FCMOVNB, sf_FCMOVNB,
|
||||
sf_FCMOVNE, sf_FCMOVNE, sf_FCMOVNE, sf_FCMOVNE, sf_FCMOVNE, sf_FCMOVNE, sf_FCMOVNE, sf_FCMOVNE,
|
||||
sf_FCMOVNBE, sf_FCMOVNBE, sf_FCMOVNBE, sf_FCMOVNBE, sf_FCMOVNBE, sf_FCMOVNBE, sf_FCMOVNBE, sf_FCMOVNBE,
|
||||
sf_FCMOVNU, sf_FCMOVNU, sf_FCMOVNU, sf_FCMOVNU, sf_FCMOVNU, sf_FCMOVNU, sf_FCMOVNU, sf_FCMOVNU,
|
||||
sf_FNOP, sf_FNOP, sf_FNCLEX, sf_FNINIT, sf_FNOP, sf_FNOP, ILLEGAL_a32, ILLEGAL_a32,
|
||||
sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj, sf_FUCOMI_st0_stj,
|
||||
sf_FCOMI_st0_stj, sf_FCOMI_st0_stj, sf_FCOMI_st0_stj, sf_FCOMI_st0_stj, sf_FCOMI_st0_stj, sf_FCOMI_st0_stj, sf_FCOMI_st0_stj, sf_FCOMI_st0_stj,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, sf_FRINT2, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
// clang-format on
|
||||
};
|
||||
# endif
|
||||
|
||||
const OpFn OP_TABLE(sf_fpu_287_dc_a16)[32] = {
|
||||
// clang-format off
|
||||
sf_FADDd_a16, sf_FMULd_a16, sf_FCOMd_a16, sf_FCOMPd_a16, sf_FSUBd_a16, sf_FSUBRd_a16, sf_FDIVd_a16, sf_FDIVRd_a16,
|
||||
@@ -1946,6 +2125,86 @@ const OpFn OP_TABLE(sf_fpu_dd_a32)[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
const OpFn OP_TABLE(sf_fpu_cyrix_dd_a16)[256] = {
|
||||
// clang-format off
|
||||
/*0x00*/ sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16,
|
||||
/*0x08*/ ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
/*0x10*/ sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16,
|
||||
/*0x18*/ sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16,
|
||||
/*0x20*/ sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16,
|
||||
/*0x28*/ ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
/*0x30*/ sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16,
|
||||
/*0x38*/ sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16,
|
||||
|
||||
/*0x40*/ sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16,
|
||||
/*0x48*/ ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
/*0x50*/ sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16,
|
||||
/*0x58*/ sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16,
|
||||
/*0x60*/ sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16,
|
||||
/*0x68*/ ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
/*0x70*/ sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16,
|
||||
/*0x78*/ sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16,
|
||||
|
||||
/*0x80*/ sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16, sf_FLDd_a16,
|
||||
/*0x88*/ ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
/*0x90*/ sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16, sf_FSTd_a16,
|
||||
/*0x98*/ sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16, sf_FSTPd_a16,
|
||||
/*0xa0*/ sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16, sf_FRSTOR_a16,
|
||||
/*0xa8*/ ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
/*0xb0*/ sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16, sf_FNSAVE_a16,
|
||||
/*0xb8*/ sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16, sf_FNSTSW_a16,
|
||||
|
||||
/*0xc0*/ sf_FFREE_sti, sf_FFREE_sti, sf_FFREE_sti, sf_FFREE_sti, sf_FFREE_sti, sf_FFREE_sti, sf_FFREE_sti, sf_FFREE_sti,
|
||||
/*0xc8*/ sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti,
|
||||
/*0xd0*/ sf_FST_sti, sf_FST_sti, sf_FST_sti, sf_FST_sti, sf_FST_sti, sf_FST_sti, sf_FST_sti, sf_FST_sti,
|
||||
/*0xd8*/ sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti,
|
||||
/*0xe0*/ sf_FUCOM_sti, sf_FUCOM_sti, sf_FUCOM_sti, sf_FUCOM_sti, sf_FUCOM_sti, sf_FUCOM_sti, sf_FUCOM_sti, sf_FUCOM_sti,
|
||||
/*0xe8*/ sf_FUCOMP_sti, sf_FUCOMP_sti, sf_FUCOMP_sti, sf_FUCOMP_sti, sf_FUCOMP_sti, sf_FUCOMP_sti, sf_FUCOMP_sti, sf_FUCOMP_sti,
|
||||
/*0xf0*/ ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
/*0xf8*/ ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, sf_FRICHOP, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
const OpFn OP_TABLE(sf_fpu_cyrix_dd_a32)[256] = {
|
||||
// clang-format off
|
||||
sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32,
|
||||
sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32,
|
||||
sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32,
|
||||
sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32,
|
||||
|
||||
sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32,
|
||||
sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32,
|
||||
sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32,
|
||||
sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32,
|
||||
|
||||
sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32, sf_FLDd_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32, sf_FSTd_a32,
|
||||
sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32, sf_FSTPd_a32,
|
||||
sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32, sf_FRSTOR_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32, sf_FNSAVE_a32,
|
||||
sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32, sf_FNSTSW_a32,
|
||||
|
||||
sf_FFREE_sti, sf_FFREE_sti, sf_FFREE_sti, sf_FFREE_sti, sf_FFREE_sti, sf_FFREE_sti, sf_FFREE_sti, sf_FFREE_sti,
|
||||
sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti,
|
||||
sf_FST_sti, sf_FST_sti, sf_FST_sti, sf_FST_sti, sf_FST_sti, sf_FST_sti, sf_FST_sti, sf_FST_sti,
|
||||
sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti,
|
||||
sf_FUCOM_sti, sf_FUCOM_sti, sf_FUCOM_sti, sf_FUCOM_sti, sf_FUCOM_sti, sf_FUCOM_sti, sf_FUCOM_sti, sf_FUCOM_sti,
|
||||
sf_FUCOMP_sti, sf_FUCOMP_sti, sf_FUCOMP_sti, sf_FUCOMP_sti, sf_FUCOMP_sti, sf_FUCOMP_sti, sf_FUCOMP_sti, sf_FUCOMP_sti,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, sf_FRICHOP, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
const OpFn OP_TABLE(sf_fpu_287_de_a16)[256] = {
|
||||
// clang-format off
|
||||
sf_FADDiw_a16, sf_FADDiw_a16, sf_FADDiw_a16, sf_FADDiw_a16, sf_FADDiw_a16, sf_FADDiw_a16, sf_FADDiw_a16, sf_FADDiw_a16,
|
||||
@@ -2348,6 +2607,88 @@ const OpFn OP_TABLE(sf_fpu_686_df_a32)[256] = {
|
||||
};
|
||||
# endif
|
||||
|
||||
# ifndef OPS_286_386
|
||||
const OpFn OP_TABLE(sf_fpu_cyrix_686_df_a16)[256] = {
|
||||
// clang-format off
|
||||
sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16,
|
||||
sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16,
|
||||
sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16,
|
||||
sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16,
|
||||
sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16,
|
||||
sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16,
|
||||
|
||||
sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16,
|
||||
sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16,
|
||||
sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16,
|
||||
sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16,
|
||||
sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16,
|
||||
sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16,
|
||||
|
||||
sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16, sf_FILDiw_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16, sf_FISTiw_a16,
|
||||
sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16, sf_FISTPiw_a16,
|
||||
sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16, sf_FBLD_PACKED_BCD_a16,
|
||||
sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16, sf_FILDiq_a16,
|
||||
sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16, sf_FBSTP_PACKED_BCD_a16,
|
||||
sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16, sf_FISTPiq_a16,
|
||||
|
||||
sf_FFREEP_sti, sf_FFREEP_sti, sf_FFREEP_sti, sf_FFREEP_sti, sf_FFREEP_sti, sf_FFREEP_sti, sf_FFREEP_sti, sf_FFREEP_sti,
|
||||
sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti,
|
||||
sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti,
|
||||
sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti,
|
||||
sf_FNSTSW_AX, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj,
|
||||
sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, sf_FRINEAR, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
const OpFn OP_TABLE(sf_fpu_cyrix_686_df_a32)[256] = {
|
||||
// clang-format off
|
||||
sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32,
|
||||
sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32,
|
||||
sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32,
|
||||
sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32,
|
||||
sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32,
|
||||
sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32,
|
||||
|
||||
sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32,
|
||||
sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32,
|
||||
sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32,
|
||||
sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32,
|
||||
sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32,
|
||||
sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32,
|
||||
|
||||
sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32, sf_FILDiw_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32, sf_FISTiw_a32,
|
||||
sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32, sf_FISTPiw_a32,
|
||||
sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32, sf_FBLD_PACKED_BCD_a32,
|
||||
sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32, sf_FILDiq_a32,
|
||||
sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32, sf_FBSTP_PACKED_BCD_a32,
|
||||
sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32, sf_FISTPiq_a32,
|
||||
|
||||
sf_FFREEP_sti, sf_FFREEP_sti, sf_FFREEP_sti, sf_FFREEP_sti, sf_FFREEP_sti, sf_FFREEP_sti, sf_FFREEP_sti, sf_FFREEP_sti,
|
||||
sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti, sf_FXCH_sti,
|
||||
sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti,
|
||||
sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti, sf_FSTP_sti,
|
||||
sf_FNSTSW_AX, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj, sf_FUCOMIP_st0_stj,
|
||||
sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj, sf_FCOMIP_st0_stj,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, sf_FRINEAR, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
// clang-format on
|
||||
};
|
||||
# endif
|
||||
|
||||
const OpFn OP_TABLE(fpu_d8_a16)[32] = {
|
||||
// clang-format off
|
||||
opFADDs_a16, opFMULs_a16, opFCOMs_a16, opFCOMPs_a16, opFSUBs_a16, opFSUBRs_a16, opFDIVs_a16, opFDIVRs_a16,
|
||||
@@ -2526,6 +2867,86 @@ const OpFn OP_TABLE(fpu_d9_a32)[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
const OpFn OP_TABLE(fpu_cyrix_d9_a16)[256] = {
|
||||
// clang-format off
|
||||
opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16,
|
||||
opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16,
|
||||
opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16,
|
||||
opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16,
|
||||
opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16,
|
||||
opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16,
|
||||
|
||||
opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16,
|
||||
opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16,
|
||||
opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16,
|
||||
opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16,
|
||||
opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16,
|
||||
opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16,
|
||||
|
||||
opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16, opFLDs_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16, opFSTs_a16,
|
||||
opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16, opFSTPs_a16,
|
||||
opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16, opFLDENV_a16,
|
||||
opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16, opFLDCW_a16,
|
||||
opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16, opFSTENV_a16,
|
||||
opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16, opFSTCW_a16,
|
||||
|
||||
opFLD, opFLD, opFLD, opFLD, opFLD, opFLD, opFLD, opFLD,
|
||||
opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH,
|
||||
opFNOP, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, /*Invalid*/
|
||||
opFCHS, opFABS, ILLEGAL_a16, ILLEGAL_a16, opFTST, opFXAM, opFTSTP, ILLEGAL_a16,
|
||||
opFLD1, opFLDL2T, opFLDL2E, opFLDPI, opFLDEG2, opFLDLN2, opFLDZ, ILLEGAL_a16,
|
||||
opF2XM1, opFYL2X, opFPTAN, opFPATAN, opFXTRACT, opFPREM1, opFDECSTP, opFINCSTP,
|
||||
opFPREM, opFYL2XP1, opFSQRT, opFSINCOS, opFRNDINT, opFSCALE, opFSIN, opFCOS
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
const OpFn OP_TABLE(fpu_cyrix_d9_a32)[256] = {
|
||||
// clang-format off
|
||||
opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32,
|
||||
opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32,
|
||||
opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32,
|
||||
opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32,
|
||||
opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32,
|
||||
opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32,
|
||||
|
||||
opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32,
|
||||
opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32,
|
||||
opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32,
|
||||
opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32,
|
||||
opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32,
|
||||
opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32,
|
||||
|
||||
opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32, opFLDs_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32, opFSTs_a32,
|
||||
opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32, opFSTPs_a32,
|
||||
opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32, opFLDENV_a32,
|
||||
opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32, opFLDCW_a32,
|
||||
opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32, opFSTENV_a32,
|
||||
opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32, opFSTCW_a32,
|
||||
|
||||
opFLD, opFLD, opFLD, opFLD, opFLD, opFLD, opFLD, opFLD,
|
||||
opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH,
|
||||
opFNOP, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, /*Invalid*/
|
||||
opFCHS, opFABS, ILLEGAL_a32, ILLEGAL_a32, opFTST, opFXAM, opFTSTP, ILLEGAL_a32,
|
||||
opFLD1, opFLDL2T, opFLDL2E, opFLDPI, opFLDEG2, opFLDLN2, opFLDZ, ILLEGAL_a32,
|
||||
opF2XM1, opFYL2X, opFPTAN, opFPATAN, opFXTRACT, opFPREM1, opFDECSTP, opFINCSTP,
|
||||
opFPREM, opFYL2XP1, opFSQRT, opFSINCOS, opFRNDINT, opFSCALE, opFSIN, opFCOS
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
const OpFn OP_TABLE(fpu_287_da_a16)[256] = {
|
||||
// clang-format off
|
||||
opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16, opFADDil_a16,
|
||||
@@ -3009,6 +3430,87 @@ const OpFn OP_TABLE(fpu_686_db_a32)[256] = {
|
||||
};
|
||||
# endif
|
||||
|
||||
# ifndef OPS_286_386
|
||||
const OpFn OP_TABLE(fpu_cyrix_686_db_a16)[256] = {
|
||||
// clang-format off
|
||||
opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16,
|
||||
opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16,
|
||||
|
||||
opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16,
|
||||
opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16,
|
||||
|
||||
opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16, opFILDil_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16, opFISTil_a16,
|
||||
opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16, opFISTPil_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16, opFLDe_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16, opFSTPe_a16,
|
||||
|
||||
opFCMOVNB, opFCMOVNB, opFCMOVNB, opFCMOVNB, opFCMOVNB, opFCMOVNB, opFCMOVNB, opFCMOVNB,
|
||||
opFCMOVNE, opFCMOVNE, opFCMOVNE, opFCMOVNE, opFCMOVNE, opFCMOVNE, opFCMOVNE, opFCMOVNE,
|
||||
opFCMOVNBE, opFCMOVNBE, opFCMOVNBE, opFCMOVNBE, opFCMOVNBE, opFCMOVNBE, opFCMOVNBE, opFCMOVNBE,
|
||||
opFCMOVNU, opFCMOVNU, opFCMOVNU, opFCMOVNU, opFCMOVNU, opFCMOVNU, opFCMOVNU, opFCMOVNU,
|
||||
opFNOP, opFNOP, opFCLEX, opFINIT, opFNOP, opFNOP, ILLEGAL_a16, ILLEGAL_a16,
|
||||
opFUCOMI, opFUCOMI, opFUCOMI, opFUCOMI, opFUCOMI, opFUCOMI, opFUCOMI, opFUCOMI,
|
||||
opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, opFRINT2, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
// clang-format on
|
||||
};
|
||||
const OpFn OP_TABLE(fpu_cyrix_686_db_a32)[256] = {
|
||||
// clang-format off
|
||||
opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32,
|
||||
opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32,
|
||||
|
||||
opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32,
|
||||
opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32,
|
||||
|
||||
opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32, opFILDil_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32, opFISTil_a32,
|
||||
opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32, opFISTPil_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32, opFLDe_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32, opFSTPe_a32,
|
||||
|
||||
opFCMOVNB, opFCMOVNB, opFCMOVNB, opFCMOVNB, opFCMOVNB, opFCMOVNB, opFCMOVNB, opFCMOVNB,
|
||||
opFCMOVNE, opFCMOVNE, opFCMOVNE, opFCMOVNE, opFCMOVNE, opFCMOVNE, opFCMOVNE, opFCMOVNE,
|
||||
opFCMOVNBE, opFCMOVNBE, opFCMOVNBE, opFCMOVNBE, opFCMOVNBE, opFCMOVNBE, opFCMOVNBE, opFCMOVNBE,
|
||||
opFCMOVNU, opFCMOVNU, opFCMOVNU, opFCMOVNU, opFCMOVNU, opFCMOVNU, opFCMOVNU, opFCMOVNU,
|
||||
opFNOP, opFNOP, opFCLEX, opFINIT, opFNOP, opFNOP, ILLEGAL_a32, ILLEGAL_a32,
|
||||
opFUCOMI, opFUCOMI, opFUCOMI, opFUCOMI, opFUCOMI, opFUCOMI, opFUCOMI, opFUCOMI,
|
||||
opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI, opFCOMI,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, opFRINT2, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
// clang-format on
|
||||
};
|
||||
# endif
|
||||
|
||||
const OpFn OP_TABLE(fpu_287_dc_a16)[32] = {
|
||||
// clang-format off
|
||||
opFADDd_a16, opFMULd_a16, opFCOMd_a16, opFCOMPd_a16, opFSUBd_a16, opFSUBRd_a16, opFDIVd_a16, opFDIVRd_a16,
|
||||
@@ -3205,6 +3707,86 @@ const OpFn OP_TABLE(fpu_dd_a32)[256] = {
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
const OpFn OP_TABLE(fpu_cyrix_dd_a16)[256] = {
|
||||
// clang-format off
|
||||
opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16,
|
||||
opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16,
|
||||
opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16,
|
||||
opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16,
|
||||
|
||||
opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16,
|
||||
opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16,
|
||||
opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16,
|
||||
opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16,
|
||||
|
||||
opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16, opFLDd_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16, opFSTd_a16,
|
||||
opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16, opFSTPd_a16,
|
||||
opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16, opFSTOR_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16, opFSAVE_a16,
|
||||
opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16, opFSTSW_a16,
|
||||
|
||||
opFFREE, opFFREE, opFFREE, opFFREE, opFFREE, opFFREE, opFFREE, opFFREE,
|
||||
opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH,
|
||||
opFST, opFST, opFST, opFST, opFST, opFST, opFST, opFST,
|
||||
opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP,
|
||||
opFUCOM, opFUCOM, opFUCOM, opFUCOM, opFUCOM, opFUCOM, opFUCOM, opFUCOM,
|
||||
opFUCOMP, opFUCOMP, opFUCOMP, opFUCOMP, opFUCOMP, opFUCOMP, opFUCOMP, opFUCOMP,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, opFRICHOP, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
const OpFn OP_TABLE(fpu_cyrix_dd_a32)[256] = {
|
||||
// clang-format off
|
||||
opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32,
|
||||
opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32,
|
||||
opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32,
|
||||
opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32,
|
||||
|
||||
opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32,
|
||||
opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32,
|
||||
opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32,
|
||||
opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32,
|
||||
|
||||
opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32, opFLDd_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32, opFSTd_a32,
|
||||
opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32, opFSTPd_a32,
|
||||
opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32, opFSTOR_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32, opFSAVE_a32,
|
||||
opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32, opFSTSW_a32,
|
||||
|
||||
opFFREE, opFFREE, opFFREE, opFFREE, opFFREE, opFFREE, opFFREE, opFFREE,
|
||||
opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH,
|
||||
opFST, opFST, opFST, opFST, opFST, opFST, opFST, opFST,
|
||||
opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP,
|
||||
opFUCOM, opFUCOM, opFUCOM, opFUCOM, opFUCOM, opFUCOM, opFUCOM, opFUCOM,
|
||||
opFUCOMP, opFUCOMP, opFUCOMP, opFUCOMP, opFUCOMP, opFUCOMP, opFUCOMP, opFUCOMP,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, opFRICHOP, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
const OpFn OP_TABLE(fpu_287_de_a16)[256] = {
|
||||
// clang-format off
|
||||
opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16, opFADDiw_a16,
|
||||
@@ -3607,6 +4189,88 @@ const OpFn OP_TABLE(fpu_686_df_a32)[256] = {
|
||||
};
|
||||
# endif
|
||||
|
||||
# ifndef OPS_286_386
|
||||
const OpFn OP_TABLE(fpu_cyrix_686_df_a16)[256] = {
|
||||
// clang-format off
|
||||
opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16,
|
||||
opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16,
|
||||
FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16,
|
||||
opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16,
|
||||
FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16,
|
||||
FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16,
|
||||
|
||||
opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16,
|
||||
opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16,
|
||||
FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16,
|
||||
opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16,
|
||||
FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16,
|
||||
FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16,
|
||||
|
||||
opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16, opFILDiw_a16,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16, opFISTiw_a16,
|
||||
opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16, opFISTPiw_a16,
|
||||
FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16, FBLD_a16,
|
||||
opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16, opFILDiq_a16,
|
||||
FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16, FBSTP_a16,
|
||||
FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16, FISTPiq_a16,
|
||||
|
||||
opFFREEP, opFFREEP, opFFREEP, opFFREEP, opFFREEP, opFFREEP, opFFREEP, opFFREEP,
|
||||
opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH,
|
||||
opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP,
|
||||
opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP,
|
||||
opFSTSW_AX, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
opFUCOMIP, opFUCOMIP, opFUCOMIP, opFUCOMIP, opFUCOMIP, opFUCOMIP, opFUCOMIP, opFUCOMIP,
|
||||
opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP,
|
||||
ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16, opFRINEAR, ILLEGAL_a16, ILLEGAL_a16, ILLEGAL_a16,
|
||||
// clang-format on
|
||||
};
|
||||
|
||||
const OpFn OP_TABLE(fpu_cyrix_686_df_a32)[256] = {
|
||||
// clang-format off
|
||||
opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32,
|
||||
opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32,
|
||||
FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32,
|
||||
opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32,
|
||||
FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32,
|
||||
FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32,
|
||||
|
||||
opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32,
|
||||
opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32,
|
||||
FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32,
|
||||
opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32,
|
||||
FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32,
|
||||
FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32,
|
||||
|
||||
opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32, opFILDiw_a32,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32, opFISTiw_a32,
|
||||
opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32, opFISTPiw_a32,
|
||||
FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32, FBLD_a32,
|
||||
opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32, opFILDiq_a32,
|
||||
FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32, FBSTP_a32,
|
||||
FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32, FISTPiq_a32,
|
||||
|
||||
opFFREEP, opFFREEP, opFFREEP, opFFREEP, opFFREEP, opFFREEP, opFFREEP, opFFREEP,
|
||||
opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH, opFXCH,
|
||||
opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP,
|
||||
opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP, opFSTP,
|
||||
opFSTSW_AX, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
opFUCOMIP, opFUCOMIP, opFUCOMIP, opFUCOMIP, opFUCOMIP, opFUCOMIP, opFUCOMIP, opFUCOMIP,
|
||||
opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP, opFCOMIP,
|
||||
ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32, opFRINEAR, ILLEGAL_a32, ILLEGAL_a32, ILLEGAL_a32,
|
||||
// clang-format on
|
||||
};
|
||||
# endif
|
||||
|
||||
const OpFn OP_TABLE(nofpu_a16)[256] = {
|
||||
// clang-format off
|
||||
op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16, op_nofpu_a16,
|
||||
|
||||
@@ -554,6 +554,24 @@ opFTST(UNUSED(uint32_t fetchdat))
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifndef FPU_8087
|
||||
static int
|
||||
opFTSTP(UNUSED(uint32_t fetchdat))
|
||||
{
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
cpu_state.npxs &= ~(FPU_SW_C0 | FPU_SW_C2 | FPU_SW_C3);
|
||||
if (ST(0) == 0.0)
|
||||
cpu_state.npxs |= FPU_SW_C3;
|
||||
else if (ST(0) < 0.0)
|
||||
cpu_state.npxs |= FPU_SW_C0;
|
||||
x87_pop();
|
||||
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.ftst) : (x87_timings.ftst * cpu_multi));
|
||||
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.ftst) : (x87_concurrency.ftst * cpu_multi));
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int
|
||||
opFXAM(UNUSED(uint32_t fetchdat))
|
||||
{
|
||||
@@ -838,6 +856,69 @@ opFRNDINT(UNUSED(uint32_t fetchdat))
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifndef FPU_8087
|
||||
#ifndef OPS_286_386
|
||||
static int
|
||||
opFRINT2(UNUSED(uint32_t fetchdat))
|
||||
{
|
||||
double dst0, st0, integral, frac;
|
||||
int prevRound;
|
||||
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
prevRound = fegetround();
|
||||
fesetround(FE_TONEAREST);
|
||||
st0 = ST(0);
|
||||
frac = modf(st0, &integral);
|
||||
if (frac == 0.5 || frac == -0.5) {
|
||||
dst0 = (st0 < 0) ? floor(st0) : ceil(st0);
|
||||
} else {
|
||||
dst0 = round(st0);
|
||||
}
|
||||
fesetround(prevRound);
|
||||
ST(0) = (double) dst0;
|
||||
FP_TAG_VALID;
|
||||
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.frndint) : (x87_timings.frndint * cpu_multi));
|
||||
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.frndint) : (x87_concurrency.frndint * cpu_multi));
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
opFRINEAR(UNUSED(uint32_t fetchdat))
|
||||
{
|
||||
int prevRound;
|
||||
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
prevRound = fegetround();
|
||||
fesetround(FE_TONEAREST);
|
||||
ST(0) = (double) x87_fround_nearest(ST(0));
|
||||
fesetround(prevRound);
|
||||
FP_TAG_VALID;
|
||||
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.frndint) : (x87_timings.frndint * cpu_multi));
|
||||
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.frndint) : (x87_concurrency.frndint * cpu_multi));
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int
|
||||
opFRICHOP(UNUSED(uint32_t fetchdat))
|
||||
{
|
||||
int prevRound;
|
||||
|
||||
FP_ENTER();
|
||||
cpu_state.pc++;
|
||||
prevRound = fegetround();
|
||||
fesetround(FE_TONEAREST);
|
||||
ST(0) = (double) ((int64_t)(ST(0)));
|
||||
fesetround(prevRound);
|
||||
FP_TAG_VALID;
|
||||
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.frndint) : (x87_timings.frndint * cpu_multi));
|
||||
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.frndint) : (x87_concurrency.frndint * cpu_multi));
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int
|
||||
opFSCALE(UNUSED(uint32_t fetchdat))
|
||||
{
|
||||
|
||||
@@ -800,3 +800,88 @@ next_ins:
|
||||
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.frndint) : (x87_concurrency.frndint * cpu_multi));
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifndef FPU_8087
|
||||
#ifndef OPS_286_386
|
||||
static int
|
||||
sf_FRINT2(uint32_t fetchdat)
|
||||
{
|
||||
floatx80 result;
|
||||
struct softfloat_status_t status;
|
||||
|
||||
FP_ENTER();
|
||||
FPU_check_pending_exceptions();
|
||||
cpu_state.pc++;
|
||||
clear_C1();
|
||||
if (IS_TAG_EMPTY(0)) {
|
||||
FPU_stack_underflow(fetchdat, 0, 0);
|
||||
goto next_ins;
|
||||
}
|
||||
status = i387cw_to_softfloat_status_word(i387_get_control_word());
|
||||
result = extF80_roundToInt(FPU_read_regi(0), softfloat_round_near_maxMag, true, &status);
|
||||
|
||||
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) {
|
||||
FPU_save_regi(result, 0);
|
||||
}
|
||||
|
||||
next_ins:
|
||||
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.frndint) : (x87_timings.frndint * cpu_multi));
|
||||
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.frndint) : (x87_concurrency.frndint * cpu_multi));
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
sf_FRINEAR(uint32_t fetchdat)
|
||||
{
|
||||
floatx80 result;
|
||||
struct softfloat_status_t status;
|
||||
|
||||
FP_ENTER();
|
||||
FPU_check_pending_exceptions();
|
||||
cpu_state.pc++;
|
||||
clear_C1();
|
||||
if (IS_TAG_EMPTY(0)) {
|
||||
FPU_stack_underflow(fetchdat, 0, 0);
|
||||
goto next_ins;
|
||||
}
|
||||
status = i387cw_to_softfloat_status_word(i387_get_control_word());
|
||||
result = extF80_roundToInt(FPU_read_regi(0), softfloat_round_near_even, true, &status);
|
||||
|
||||
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) {
|
||||
FPU_save_regi(result, 0);
|
||||
}
|
||||
|
||||
next_ins:
|
||||
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.frndint) : (x87_timings.frndint * cpu_multi));
|
||||
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.frndint) : (x87_concurrency.frndint * cpu_multi));
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int
|
||||
sf_FRICHOP(uint32_t fetchdat)
|
||||
{
|
||||
floatx80 result;
|
||||
struct softfloat_status_t status;
|
||||
|
||||
FP_ENTER();
|
||||
FPU_check_pending_exceptions();
|
||||
cpu_state.pc++;
|
||||
clear_C1();
|
||||
if (IS_TAG_EMPTY(0)) {
|
||||
FPU_stack_underflow(fetchdat, 0, 0);
|
||||
goto next_ins;
|
||||
}
|
||||
status = i387cw_to_softfloat_status_word(i387_get_control_word());
|
||||
result = extF80_roundToInt(FPU_read_regi(0), softfloat_round_to_zero, true, &status);
|
||||
|
||||
if (!FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0)) {
|
||||
FPU_save_regi(result, 0);
|
||||
}
|
||||
|
||||
next_ins:
|
||||
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.frndint) : (x87_timings.frndint * cpu_multi));
|
||||
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.frndint) : (x87_concurrency.frndint * cpu_multi));
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -459,6 +459,34 @@ sf_FTST(uint32_t fetchdat)
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifndef FPU_8087
|
||||
static int
|
||||
sf_FTSTP(uint32_t fetchdat)
|
||||
{
|
||||
const floatx80 Const_Z = packFloatx80(0, 0x0000, 0);
|
||||
struct softfloat_status_t status;
|
||||
int rc;
|
||||
|
||||
FP_ENTER();
|
||||
FPU_check_pending_exceptions();
|
||||
cpu_state.pc++;
|
||||
clear_C1();
|
||||
if (IS_TAG_EMPTY(0)) {
|
||||
FPU_exception(fetchdat, FPU_EX_Stack_Underflow, 0);
|
||||
setcc(FPU_SW_C0 | FPU_SW_C2 | FPU_SW_C3);
|
||||
} else {
|
||||
status = i387cw_to_softfloat_status_word(i387_get_control_word());
|
||||
rc = extF80_compare_normal(FPU_read_regi(0), Const_Z, &status);
|
||||
setcc(FPU_status_word_flags_fpu_compare(rc));
|
||||
FPU_exception(fetchdat, status.softfloat_exceptionFlags, 0);
|
||||
FPU_pop();
|
||||
}
|
||||
CLOCK_CYCLES_FPU((fpu_type >= FPU_487SX) ? (x87_timings.ftst) : (x87_timings.ftst * cpu_multi));
|
||||
CONCURRENCY_CYCLES((fpu_type >= FPU_487SX) ? (x87_concurrency.ftst) : (x87_concurrency.ftst * cpu_multi));
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int
|
||||
sf_FXAM(UNUSED(uint32_t fetchdat))
|
||||
{
|
||||
|
||||
@@ -22,6 +22,7 @@
|
||||
#include <wchar.h>
|
||||
#define HAVE_STDARG_H
|
||||
#include <86box/86box.h>
|
||||
#include "cpu.h"
|
||||
#include <86box/timer.h>
|
||||
#include <86box/plat.h>
|
||||
#include <86box/ui.h>
|
||||
|
||||
@@ -29,6 +29,7 @@
|
||||
#include <wchar.h>
|
||||
#include <86box/86box.h>
|
||||
#include <86box/device.h>
|
||||
#include "cpu.h"
|
||||
#include <86box/timer.h>
|
||||
#include <86box/fdd.h>
|
||||
#include <86box/machine.h>
|
||||
|
||||
@@ -27,6 +27,7 @@
|
||||
#define HAVE_STDARG_H
|
||||
#include <86box/86box.h>
|
||||
#include <86box/device.h>
|
||||
#include "cpu.h"
|
||||
#include <86box/timer.h>
|
||||
#include <86box/machine.h>
|
||||
#include <86box/io.h>
|
||||
|
||||
@@ -158,6 +158,7 @@ extern int other_scsi_present; /* SCSI controllers from non-SCSI ca
|
||||
extern int hard_reset_pending;
|
||||
extern int fixed_size_x;
|
||||
extern int fixed_size_y;
|
||||
extern int sound_muted; /* (C) Is sound muted? */
|
||||
extern int do_auto_pause; /* (C) Auto-pause the emulator on focus loss */
|
||||
extern int auto_paused;
|
||||
extern double mouse_sensitivity; /* (C) Mouse sensitivity scale */
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
#ifndef _TIMER_H_
|
||||
#define _TIMER_H_
|
||||
|
||||
#include "cpu.h"
|
||||
extern uint64_t tsc;
|
||||
|
||||
/* Maximum period, currently 1 second. */
|
||||
#define MAX_USEC64 1000000ULL
|
||||
|
||||
@@ -213,7 +213,7 @@ typedef struct ibm8514_t {
|
||||
int vdisp2;
|
||||
int disp_cntl;
|
||||
int interlace;
|
||||
uint8_t subsys_cntl;
|
||||
uint16_t subsys_cntl;
|
||||
uint8_t subsys_stat;
|
||||
|
||||
atomic_int fifo_idx;
|
||||
|
||||
@@ -69,6 +69,8 @@ enum {
|
||||
#define VIDEO_FLAG_TYPE_NONE 5
|
||||
#define VIDEO_FLAG_TYPE_MASK 7
|
||||
|
||||
#define VIDEO_FLAG_TYPE_SECONDARY VIDEO_FLAG_TYPE_SPECIAL
|
||||
|
||||
typedef struct video_timings_t {
|
||||
int type;
|
||||
int write_b;
|
||||
|
||||
@@ -29,6 +29,7 @@
|
||||
#include <86box/fdc_ext.h>
|
||||
#include <86box/hdc.h>
|
||||
#include <86box/hdc_ide.h>
|
||||
#include "cpu.h"
|
||||
#include <86box/timer.h>
|
||||
#include <86box/fdd.h>
|
||||
#include <86box/fdc.h>
|
||||
|
||||
@@ -30,6 +30,7 @@
|
||||
#include <wchar.h>
|
||||
#define HAVE_STDARG_H
|
||||
#include <86box/86box.h>
|
||||
#include "cpu.h"
|
||||
#include <86box/timer.h>
|
||||
#include <86box/io.h>
|
||||
#include <86box/pic.h>
|
||||
|
||||
@@ -23,6 +23,7 @@
|
||||
#define HAVE_STDARG_H
|
||||
#include <86box/86box.h>
|
||||
#include <86box/nmi.h>
|
||||
#include "cpu.h"
|
||||
#include <86box/timer.h>
|
||||
#include <86box/pit.h>
|
||||
#include <86box/mem.h>
|
||||
|
||||
@@ -25,6 +25,7 @@
|
||||
#include <86box/device.h>
|
||||
#include <86box/mem.h>
|
||||
#include <86box/machine.h>
|
||||
#include "cpu.h"
|
||||
#include <86box/timer.h>
|
||||
#include <86box/nvr.h>
|
||||
#include <86box/plat.h>
|
||||
|
||||
BIN
src/qt/icons/sound_mute.ico
Normal file
BIN
src/qt/icons/sound_mute.ico
Normal file
Binary file not shown.
|
After Width: | Height: | Size: 9.4 KiB |
@@ -19,9 +19,6 @@
|
||||
#include "qt_machinestatus.hpp"
|
||||
|
||||
extern "C" {
|
||||
#define EMU_CPU_H // superhack - don't want timer.h to include cpu.h here, and some combo is preventing a compile
|
||||
extern uint64_t tsc;
|
||||
|
||||
#include <86box/hdd.h>
|
||||
#include <86box/timer.h>
|
||||
#include <86box/86box.h>
|
||||
@@ -42,6 +39,7 @@ extern uint64_t tsc;
|
||||
#include <86box/network.h>
|
||||
#include <86box/ui.h>
|
||||
#include <86box/machine_status.h>
|
||||
#include <86box/config.h>
|
||||
};
|
||||
|
||||
#include <QIcon>
|
||||
@@ -92,7 +90,7 @@ struct Pixmaps {
|
||||
PixmapSetEmptyActive mo;
|
||||
PixmapSetActive hd;
|
||||
PixmapSetEmptyActive net;
|
||||
QPixmap sound;
|
||||
QPixmap sound, soundMuted;
|
||||
};
|
||||
|
||||
struct StateActive {
|
||||
@@ -218,6 +216,7 @@ struct MachineStatus::States {
|
||||
pixmaps.hd.load("/hard_disk%1.ico");
|
||||
pixmaps.net.load("/network%1.ico");
|
||||
pixmaps.sound = ProgSettings::loadIcon("/sound.ico").pixmap(pixmap_size);
|
||||
pixmaps.soundMuted = ProgSettings::loadIcon("/sound_mute.ico").pixmap(pixmap_size);
|
||||
|
||||
cartridge[0].pixmaps = &pixmaps.cartridge;
|
||||
cartridge[1].pixmaps = &pixmaps.cartridge;
|
||||
@@ -259,12 +258,20 @@ MachineStatus::MachineStatus(QObject *parent)
|
||||
, refreshTimer(new QTimer(this))
|
||||
{
|
||||
d = std::make_unique<MachineStatus::States>(this);
|
||||
muteUnmuteAction = nullptr;
|
||||
soundMenu = nullptr;
|
||||
connect(refreshTimer, &QTimer::timeout, this, &MachineStatus::refreshIcons);
|
||||
refreshTimer->start(75);
|
||||
}
|
||||
|
||||
MachineStatus::~MachineStatus() = default;
|
||||
|
||||
void
|
||||
MachineStatus::setSoundGainAction(QAction* action)
|
||||
{
|
||||
soundGainAction = action;
|
||||
}
|
||||
|
||||
bool
|
||||
MachineStatus::hasCassette()
|
||||
{
|
||||
@@ -497,6 +504,28 @@ MachineStatus::refresh(QStatusBar *sbar)
|
||||
}
|
||||
sbar->removeWidget(d->sound.get());
|
||||
|
||||
if (!muteUnmuteAction) {
|
||||
muteUnmuteAction = new QAction;
|
||||
connect(muteUnmuteAction, &QAction::triggered, this, [this]() {
|
||||
sound_muted ^= 1;
|
||||
config_save();
|
||||
if (d->sound)
|
||||
d->sound->setPixmap(sound_muted ? d->pixmaps.soundMuted : d->pixmaps.sound);
|
||||
|
||||
muteUnmuteAction->setText(sound_muted ? tr("&Unmute") : tr("&Mute"));
|
||||
});
|
||||
}
|
||||
|
||||
if (!soundMenu) {
|
||||
soundMenu = new QMenu((QWidget*)parent());
|
||||
|
||||
soundMenu->addAction(muteUnmuteAction);
|
||||
soundMenu->addSeparator();
|
||||
soundMenu->addAction(soundGainAction);
|
||||
|
||||
muteUnmuteAction->setParent(soundMenu);
|
||||
}
|
||||
|
||||
if (cassette_enable) {
|
||||
d->cassette.label = std::make_unique<ClickableLabel>();
|
||||
d->cassette.setEmpty(QString(cassette_fname).isEmpty());
|
||||
@@ -665,12 +694,14 @@ MachineStatus::refresh(QStatusBar *sbar)
|
||||
}
|
||||
|
||||
d->sound = std::make_unique<ClickableLabel>();
|
||||
d->sound->setPixmap(d->pixmaps.sound);
|
||||
|
||||
connect(d->sound.get(), &ClickableLabel::doubleClicked, d->sound.get(), [](QPoint pos) {
|
||||
SoundGain gain(main_window);
|
||||
gain.exec();
|
||||
d->sound->setPixmap(sound_muted ? d->pixmaps.soundMuted : d->pixmaps.sound);
|
||||
if (muteUnmuteAction)
|
||||
muteUnmuteAction->setText(sound_muted ? tr("&Unmute") : tr("&Mute"));
|
||||
|
||||
connect(d->sound.get(), &ClickableLabel::clicked, this, [this](QPoint pos) {
|
||||
this->soundMenu->popup(pos - QPoint(0, this->soundMenu->sizeHint().height()));
|
||||
});
|
||||
|
||||
d->sound->setToolTip(tr("Sound"));
|
||||
sbar->addWidget(d->sound.get());
|
||||
d->text = std::make_unique<QLabel>();
|
||||
|
||||
@@ -1,6 +1,8 @@
|
||||
#ifndef QT_MACHINESTATUS_HPP
|
||||
#define QT_MACHINESTATUS_HPP
|
||||
|
||||
#include <QAction>
|
||||
#include <QMenu>
|
||||
#include <QWidget>
|
||||
#include <QLabel>
|
||||
#include <QMouseEvent>
|
||||
@@ -71,6 +73,7 @@ public:
|
||||
|
||||
QString getMessage();
|
||||
void clearActivity();
|
||||
void setSoundGainAction(QAction* action);
|
||||
public slots:
|
||||
void refresh(QStatusBar *sbar);
|
||||
void message(const QString &msg);
|
||||
@@ -82,6 +85,9 @@ private:
|
||||
struct States;
|
||||
std::unique_ptr<States> d;
|
||||
QTimer *refreshTimer;
|
||||
QAction *soundGainAction;
|
||||
QAction *muteUnmuteAction;
|
||||
QMenu *soundMenu;
|
||||
};
|
||||
|
||||
#endif // QT_MACHINESTATUS_HPP
|
||||
|
||||
@@ -86,6 +86,7 @@ extern MainWindow *main_window;
|
||||
|
||||
extern "C" {
|
||||
#include <86box/keyboard.h>
|
||||
#include "cpu.h"
|
||||
#include <86box/timer.h>
|
||||
#include <86box/nvr.h>
|
||||
extern int qt_nvr_save(void);
|
||||
|
||||
@@ -48,11 +48,10 @@ extern "C" {
|
||||
#include <86box/machine.h>
|
||||
#include <86box/vid_ega.h>
|
||||
#include <86box/version.h>
|
||||
#if 0
|
||||
#include <86box/acpi.h> /* Requires timer.h include, which conflicts with Qt headers */
|
||||
#endif
|
||||
extern atomic_int acpi_pwrbut_pressed;
|
||||
extern int acpi_enabled;
|
||||
#include <86box/timer.h>
|
||||
#include <86box/apm.h>
|
||||
#include <86box/nvr.h>
|
||||
#include <86box/acpi.h>
|
||||
|
||||
#ifdef USE_VNC
|
||||
# include <86box/vnc.h>
|
||||
@@ -179,8 +178,12 @@ MainWindow::MainWindow(QWidget *parent)
|
||||
extern MainWindow *main_window;
|
||||
main_window = this;
|
||||
ui->setupUi(this);
|
||||
status->setSoundGainAction(ui->actionSound_gain);
|
||||
ui->stackedWidget->setMouseTracking(true);
|
||||
statusBar()->setVisible(!hide_status_bar);
|
||||
#ifdef Q_OS_WINDOWS
|
||||
util::setWin11RoundedCorners(this->winId(), (hide_status_bar ? false : true));
|
||||
#endif
|
||||
statusBar()->setStyleSheet("QStatusBar::item {border: None; } QStatusBar QLabel { margin-right: 2px; margin-bottom: 1px; }");
|
||||
this->centralWidget()->setStyleSheet("background-color: black;");
|
||||
ui->toolBar->setVisible(!hide_tool_bar);
|
||||
@@ -799,6 +802,9 @@ MainWindow::initRendererMonitorSlot(int monitor_index)
|
||||
if (vid_resize == 2)
|
||||
secondaryRenderer->setFixedSize(fixed_size_x, fixed_size_y);
|
||||
secondaryRenderer->setWindowIcon(this->windowIcon());
|
||||
#ifdef Q_OS_WINDOWS
|
||||
util::setWin11RoundedCorners(secondaryRenderer->winId(), false);
|
||||
#endif
|
||||
if (show_second_monitors) {
|
||||
secondaryRenderer->show();
|
||||
if (window_remember) {
|
||||
@@ -1833,6 +1839,9 @@ MainWindow::on_actionHide_status_bar_triggered()
|
||||
hide_status_bar ^= 1;
|
||||
ui->actionHide_status_bar->setChecked(hide_status_bar);
|
||||
statusBar()->setVisible(!hide_status_bar);
|
||||
#ifdef Q_OS_WINDOWS
|
||||
util::setWin11RoundedCorners(main_window->winId(), (hide_status_bar ? false : true));
|
||||
#endif
|
||||
if (vid_resize >= 2) {
|
||||
setFixedSize(fixed_size_x, fixed_size_y + menuBar()->height() + (hide_status_bar ? 0 : statusBar()->height()) + (hide_tool_bar ? 0 : ui->toolBar->height()));
|
||||
} else {
|
||||
|
||||
@@ -153,6 +153,8 @@ Settings::Settings(QWidget *parent)
|
||||
&SettingsSound::onCurrentMachineChanged);
|
||||
connect(machine, &SettingsMachine::currentMachineChanged, network,
|
||||
&SettingsNetwork::onCurrentMachineChanged);
|
||||
connect(machine, &SettingsMachine::currentMachineChanged, ports,
|
||||
&SettingsPorts::onCurrentMachineChanged);
|
||||
connect(machine, &SettingsMachine::currentMachineChanged, storageControllers,
|
||||
&SettingsStorageControllers::onCurrentMachineChanged);
|
||||
connect(machine, &SettingsMachine::currentMachineChanged, otherPeripherals,
|
||||
|
||||
@@ -220,9 +220,9 @@ SettingsDisplay::on_comboBoxVideo_currentIndexChanged(int index)
|
||||
int secondaryFlags = video_card_get_flags(c);
|
||||
if (video_card_available(c)
|
||||
&& device_is_valid(video_dev, machineId)
|
||||
&& !((secondaryFlags == primaryFlags) && (secondaryFlags != VIDEO_FLAG_TYPE_SPECIAL))
|
||||
&& !(((primaryFlags == VIDEO_FLAG_TYPE_8514) || (primaryFlags == VIDEO_FLAG_TYPE_XGA)) && (secondaryFlags != VIDEO_FLAG_TYPE_MDA) && (secondaryFlags != VIDEO_FLAG_TYPE_SPECIAL))
|
||||
&& !((primaryFlags != VIDEO_FLAG_TYPE_MDA) && (primaryFlags != VIDEO_FLAG_TYPE_SPECIAL) && ((secondaryFlags == VIDEO_FLAG_TYPE_8514) || (secondaryFlags == VIDEO_FLAG_TYPE_XGA)))) {
|
||||
&& !((secondaryFlags == primaryFlags) && (secondaryFlags != VIDEO_FLAG_TYPE_SECONDARY))
|
||||
&& !(((primaryFlags == VIDEO_FLAG_TYPE_8514) || (primaryFlags == VIDEO_FLAG_TYPE_XGA)) && (secondaryFlags != VIDEO_FLAG_TYPE_MDA) && (secondaryFlags != VIDEO_FLAG_TYPE_SECONDARY))
|
||||
&& !((primaryFlags != VIDEO_FLAG_TYPE_MDA) && (primaryFlags != VIDEO_FLAG_TYPE_SECONDARY) && ((secondaryFlags == VIDEO_FLAG_TYPE_8514) || (secondaryFlags == VIDEO_FLAG_TYPE_XGA)))) {
|
||||
ui->comboBoxVideoSecondary->addItem(name, c);
|
||||
if (c == curVideoCard_2)
|
||||
ui->comboBoxVideoSecondary->setCurrentIndex(ui->comboBoxVideoSecondary->count() - 1);
|
||||
|
||||
@@ -32,13 +32,9 @@ extern "C" {
|
||||
#include <86box/config.h>
|
||||
#include <86box/device.h>
|
||||
#include <86box/machine.h>
|
||||
#include <86box/nvr.h>
|
||||
}
|
||||
|
||||
// from nvr.h, which we can't import into CPP code
|
||||
#define TIME_SYNC_DISABLED 0
|
||||
#define TIME_SYNC_ENABLED 1
|
||||
#define TIME_SYNC_UTC 2
|
||||
|
||||
#include "qt_deviceconfig.hpp"
|
||||
#include "qt_models_common.hpp"
|
||||
|
||||
|
||||
@@ -38,51 +38,7 @@ SettingsPorts::SettingsPorts(QWidget *parent)
|
||||
, ui(new Ui::SettingsPorts)
|
||||
{
|
||||
ui->setupUi(this);
|
||||
|
||||
for (int i = 0; i < PARALLEL_MAX; i++) {
|
||||
auto *cbox = findChild<QComboBox *>(QString("comboBoxLpt%1").arg(i + 1));
|
||||
auto *model = cbox->model();
|
||||
int c = 0;
|
||||
int selectedRow = 0;
|
||||
while (true) {
|
||||
const char *lptName = lpt_device_get_name(c);
|
||||
if (lptName == nullptr) {
|
||||
break;
|
||||
}
|
||||
|
||||
Models::AddEntry(model, tr(lptName), c);
|
||||
if (c == lpt_ports[i].device) {
|
||||
selectedRow = c;
|
||||
}
|
||||
c++;
|
||||
}
|
||||
cbox->setCurrentIndex(selectedRow);
|
||||
|
||||
auto *checkBox = findChild<QCheckBox *>(QString("checkBoxParallel%1").arg(i + 1));
|
||||
if (checkBox != NULL)
|
||||
checkBox->setChecked(lpt_ports[i].enabled > 0);
|
||||
if (cbox != NULL)
|
||||
cbox->setEnabled(lpt_ports[i].enabled > 0);
|
||||
}
|
||||
|
||||
for (int i = 0; i < SERIAL_MAX; i++) {
|
||||
auto *checkBox = findChild<QCheckBox *>(QString("checkBoxSerial%1").arg(i + 1));
|
||||
auto *checkBoxPass = findChild<QCheckBox *>(QString("checkBoxSerialPassThru%1").arg(i + 1));
|
||||
if (checkBox != NULL)
|
||||
checkBox->setChecked(com_ports[i].enabled > 0);
|
||||
if (checkBoxPass != NULL)
|
||||
checkBoxPass->setChecked(serial_passthrough_enabled[i]);
|
||||
}
|
||||
|
||||
ui->pushButtonSerialPassThru1->setEnabled(serial_passthrough_enabled[0]);
|
||||
ui->pushButtonSerialPassThru2->setEnabled(serial_passthrough_enabled[1]);
|
||||
ui->pushButtonSerialPassThru3->setEnabled(serial_passthrough_enabled[2]);
|
||||
ui->pushButtonSerialPassThru4->setEnabled(serial_passthrough_enabled[3]);
|
||||
#if 0
|
||||
ui->pushButtonSerialPassThru5->setEnabled(serial_passthrough_enabled[4]);
|
||||
ui->pushButtonSerialPassThru6->setEnabled(serial_passthrough_enabled[5]);
|
||||
ui->pushButtonSerialPassThru7->setEnabled(serial_passthrough_enabled[6]);
|
||||
#endif
|
||||
onCurrentMachineChanged(machine);
|
||||
}
|
||||
|
||||
SettingsPorts::~SettingsPorts()
|
||||
@@ -112,6 +68,51 @@ SettingsPorts::save()
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
SettingsPorts::onCurrentMachineChanged(int machineId)
|
||||
{
|
||||
this->machineId = machineId;
|
||||
|
||||
for (int i = 0; i < PARALLEL_MAX; i++) {
|
||||
auto *cbox = findChild<QComboBox *>(QString("comboBoxLpt%1").arg(i + 1));
|
||||
auto *model = cbox->model();
|
||||
int c = 0;
|
||||
int selectedRow = 0;
|
||||
while (true) {
|
||||
const char *lptName = lpt_device_get_name(c);
|
||||
if (lptName == nullptr) {
|
||||
break;
|
||||
}
|
||||
|
||||
Models::AddEntry(model, tr(lptName), c);
|
||||
if (c == lpt_ports[i].device) {
|
||||
selectedRow = c;
|
||||
}
|
||||
c++;
|
||||
}
|
||||
cbox->setCurrentIndex(selectedRow);
|
||||
|
||||
auto *checkBox = findChild<QCheckBox *>(QString("checkBoxParallel%1").arg(i + 1));
|
||||
if (checkBox != NULL)
|
||||
checkBox->setChecked(lpt_ports[i].enabled > 0);
|
||||
if (cbox != NULL)
|
||||
cbox->setEnabled(lpt_ports[i].enabled > 0);
|
||||
}
|
||||
|
||||
for (int i = 0; i < SERIAL_MAX; i++) {
|
||||
auto *checkBox = findChild<QCheckBox *>(QString("checkBoxSerial%1").arg(i + 1));
|
||||
auto *checkBoxPass = findChild<QCheckBox *>(QString("checkBoxSerialPassThru%1").arg(i + 1));
|
||||
auto *buttonPass = findChild<QPushButton *>(QString("pushButtonSerialPassThru%1").arg(i + 1));
|
||||
if (checkBox != NULL)
|
||||
checkBox->setChecked(com_ports[i].enabled > 0);
|
||||
if (checkBoxPass != NULL) {
|
||||
checkBoxPass->setEnabled(com_ports[i].enabled > 0);
|
||||
checkBoxPass->setChecked(serial_passthrough_enabled[i]);
|
||||
buttonPass->setEnabled((com_ports[i].enabled > 0) && serial_passthrough_enabled[i]);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void
|
||||
SettingsPorts::on_checkBoxParallel1_stateChanged(int state)
|
||||
{
|
||||
@@ -136,6 +137,101 @@ SettingsPorts::on_checkBoxParallel4_stateChanged(int state)
|
||||
ui->comboBoxLpt4->setEnabled(state == Qt::Checked);
|
||||
}
|
||||
|
||||
void
|
||||
SettingsPorts::on_checkBoxSerial1_stateChanged(int state)
|
||||
{
|
||||
ui->checkBoxSerialPassThru1->setEnabled(state == Qt::Checked);
|
||||
ui->pushButtonSerialPassThru1->setEnabled((state == Qt::Checked) && ui->checkBoxSerialPassThru1->isChecked());
|
||||
}
|
||||
|
||||
void
|
||||
SettingsPorts::on_checkBoxSerial2_stateChanged(int state)
|
||||
{
|
||||
ui->checkBoxSerialPassThru2->setEnabled(state == Qt::Checked);
|
||||
ui->pushButtonSerialPassThru2->setEnabled((state == Qt::Checked) && ui->checkBoxSerialPassThru2->isChecked());
|
||||
}
|
||||
|
||||
void
|
||||
SettingsPorts::on_checkBoxSerial3_stateChanged(int state)
|
||||
{
|
||||
ui->checkBoxSerialPassThru3->setEnabled(state == Qt::Checked);
|
||||
ui->pushButtonSerialPassThru3->setEnabled((state == Qt::Checked) && ui->checkBoxSerialPassThru3->isChecked());
|
||||
}
|
||||
|
||||
void
|
||||
SettingsPorts::on_checkBoxSerial4_stateChanged(int state)
|
||||
{
|
||||
ui->checkBoxSerialPassThru4->setEnabled(state == Qt::Checked);
|
||||
ui->pushButtonSerialPassThru4->setEnabled((state == Qt::Checked) && ui->checkBoxSerialPassThru4->isChecked());
|
||||
}
|
||||
|
||||
#if 0
|
||||
void
|
||||
SettingsPorts::on_checkBoxSerial5_stateChanged(int state)
|
||||
{
|
||||
ui->checkBoxSerialPassThru5->setEnabled(state == Qt::Checked);
|
||||
ui->pushButtonSerialPassThru5->setEnabled((state == Qt::Checked) && ui->checkBoxSerialPassThru5->isChecked());
|
||||
}
|
||||
|
||||
void
|
||||
SettingsPorts::on_checkBoxSerial6_stateChanged(int state)
|
||||
{
|
||||
ui->checkBoxSerialPassThru6->setEnabled(state == Qt::Checked);
|
||||
ui->pushButtonSerialPassThru6->setEnabled((state == Qt::Checked) && ui->checkBoxSerialPassThru6->isChecked());
|
||||
}
|
||||
|
||||
void
|
||||
SettingsPorts::on_checkBoxSerial7_stateChanged(int state)
|
||||
{
|
||||
ui->checkBoxSerialPassThru7->setEnabled(state == Qt::Checked);
|
||||
ui->pushButtonSerialPassThru7->setEnabled((state == Qt::Checked) && ui->checkBoxSerialPassThru7->isChecked());
|
||||
}
|
||||
#endif
|
||||
|
||||
void
|
||||
SettingsPorts::on_checkBoxSerialPassThru1_stateChanged(int state)
|
||||
{
|
||||
ui->pushButtonSerialPassThru1->setEnabled(state == Qt::Checked);
|
||||
}
|
||||
|
||||
void
|
||||
SettingsPorts::on_checkBoxSerialPassThru2_stateChanged(int state)
|
||||
{
|
||||
ui->pushButtonSerialPassThru2->setEnabled(state == Qt::Checked);
|
||||
}
|
||||
|
||||
void
|
||||
SettingsPorts::on_checkBoxSerialPassThru3_stateChanged(int state)
|
||||
{
|
||||
ui->pushButtonSerialPassThru3->setEnabled(state == Qt::Checked);
|
||||
}
|
||||
|
||||
void
|
||||
SettingsPorts::on_checkBoxSerialPassThru4_stateChanged(int state)
|
||||
{
|
||||
ui->pushButtonSerialPassThru4->setEnabled(state == Qt::Checked);
|
||||
}
|
||||
|
||||
#if 0
|
||||
void
|
||||
SettingsPorts::on_checkBoxSerialPassThru5_stateChanged(int state)
|
||||
{
|
||||
ui->pushButtonSerialPassThru5->setEnabled(state == Qt::Checked);
|
||||
}
|
||||
|
||||
void
|
||||
SettingsPorts::on_checkBoxSerialPassThru6_stateChanged(int state)
|
||||
{
|
||||
ui->pushButtonSerialPassThru6->setEnabled(state == Qt::Checked);
|
||||
}
|
||||
|
||||
void
|
||||
SettingsPorts::on_checkBoxSerialPassThru7_stateChanged(int state)
|
||||
{
|
||||
ui->pushButtonSerialPassThru7->setEnabled(state == Qt::Checked);
|
||||
}
|
||||
#endif
|
||||
|
||||
void
|
||||
SettingsPorts::on_pushButtonSerialPassThru1_clicked()
|
||||
{
|
||||
@@ -179,47 +275,3 @@ SettingsPorts::on_pushButtonSerialPassThru7_clicked()
|
||||
DeviceConfig::ConfigureDevice(&serial_passthrough_device, 7, qobject_cast<Settings *>(Settings::settings));
|
||||
}
|
||||
#endif
|
||||
|
||||
void
|
||||
SettingsPorts::on_checkBoxSerialPassThru1_clicked(bool checked)
|
||||
{
|
||||
ui->pushButtonSerialPassThru1->setEnabled(checked);
|
||||
}
|
||||
|
||||
void
|
||||
SettingsPorts::on_checkBoxSerialPassThru2_clicked(bool checked)
|
||||
{
|
||||
ui->pushButtonSerialPassThru2->setEnabled(checked);
|
||||
}
|
||||
|
||||
void
|
||||
SettingsPorts::on_checkBoxSerialPassThru3_clicked(bool checked)
|
||||
{
|
||||
ui->pushButtonSerialPassThru3->setEnabled(checked);
|
||||
}
|
||||
|
||||
void
|
||||
SettingsPorts::on_checkBoxSerialPassThru4_clicked(bool checked)
|
||||
{
|
||||
ui->pushButtonSerialPassThru4->setEnabled(checked);
|
||||
}
|
||||
|
||||
#if 0
|
||||
void
|
||||
SettingsPorts::on_checkBoxSerialPassThru5_clicked(bool checked)
|
||||
{
|
||||
ui->pushButtonSerialPassThru5->setEnabled(checked);
|
||||
}
|
||||
|
||||
void
|
||||
SettingsPorts::on_checkBoxSerialPassThru6_clicked(bool checked)
|
||||
{
|
||||
ui->pushButtonSerialPassThru6->setEnabled(checked);
|
||||
}
|
||||
|
||||
void
|
||||
SettingsPorts::on_checkBoxSerialPassThru7_clicked(bool checked)
|
||||
{
|
||||
ui->pushButtonSerialPassThru7->setEnabled(checked);
|
||||
}
|
||||
#endif
|
||||
|
||||
@@ -16,36 +16,47 @@ public:
|
||||
|
||||
void save();
|
||||
|
||||
#if 0
|
||||
private slots:
|
||||
void on_checkBoxSerialPassThru7_clicked(bool checked);
|
||||
void on_checkBoxSerialPassThru6_clicked(bool checked);
|
||||
void on_checkBoxSerialPassThru5_clicked(bool checked);
|
||||
#endif
|
||||
void on_checkBoxSerialPassThru4_clicked(bool checked);
|
||||
void on_checkBoxSerialPassThru3_clicked(bool checked);
|
||||
void on_checkBoxSerialPassThru2_clicked(bool checked);
|
||||
void on_checkBoxSerialPassThru1_clicked(bool checked);
|
||||
public slots:
|
||||
void onCurrentMachineChanged(int machineId);
|
||||
|
||||
private slots:
|
||||
void on_checkBoxParallel1_stateChanged(int state);
|
||||
void on_checkBoxParallel2_stateChanged(int state);
|
||||
void on_checkBoxParallel3_stateChanged(int state);
|
||||
void on_checkBoxParallel4_stateChanged(int state);
|
||||
|
||||
void on_checkBoxSerial1_stateChanged(int state);
|
||||
void on_checkBoxSerial2_stateChanged(int state);
|
||||
void on_checkBoxSerial3_stateChanged(int state);
|
||||
void on_checkBoxSerial4_stateChanged(int state);
|
||||
#if 0
|
||||
void on_pushButtonSerialPassThru7_clicked();
|
||||
void on_pushButtonSerialPassThru6_clicked();
|
||||
void on_pushButtonSerialPassThru5_clicked();
|
||||
void on_checkBoxSerial5_stateChanged(int state);
|
||||
void on_checkBoxSerial6_stateChanged(int state);
|
||||
void on_checkBoxSerial7_stateChanged(int state);
|
||||
#endif
|
||||
void on_pushButtonSerialPassThru4_clicked();
|
||||
void on_pushButtonSerialPassThru3_clicked();
|
||||
void on_pushButtonSerialPassThru2_clicked();
|
||||
void on_checkBoxSerialPassThru1_stateChanged(int state);
|
||||
void on_checkBoxSerialPassThru2_stateChanged(int state);
|
||||
void on_checkBoxSerialPassThru3_stateChanged(int state);
|
||||
void on_checkBoxSerialPassThru4_stateChanged(int state);
|
||||
#if 0
|
||||
void on_checkBoxSerialPassThru5_stateChanged(int state);
|
||||
void on_checkBoxSerialPassThru6_stateChanged(int state);
|
||||
void on_checkBoxSerialPassThru7_stateChanged(int state);
|
||||
#endif
|
||||
|
||||
void on_pushButtonSerialPassThru1_clicked();
|
||||
|
||||
private slots:
|
||||
void on_checkBoxParallel4_stateChanged(int arg1);
|
||||
void on_checkBoxParallel3_stateChanged(int arg1);
|
||||
void on_checkBoxParallel2_stateChanged(int arg1);
|
||||
void on_checkBoxParallel1_stateChanged(int arg1);
|
||||
void on_pushButtonSerialPassThru2_clicked();
|
||||
void on_pushButtonSerialPassThru3_clicked();
|
||||
void on_pushButtonSerialPassThru4_clicked();
|
||||
#if 0
|
||||
void on_pushButtonSerialPassThru5_clicked();
|
||||
void on_pushButtonSerialPassThru6_clicked();
|
||||
void on_pushButtonSerialPassThru7_clicked();
|
||||
#endif
|
||||
|
||||
private:
|
||||
Ui::SettingsPorts *ui;
|
||||
int machineId = 0;
|
||||
};
|
||||
|
||||
#endif // QT_SETTINGSPORTS_HPP
|
||||
|
||||
@@ -26,6 +26,19 @@
|
||||
#include <QUuid>
|
||||
#include "qt_util.hpp"
|
||||
|
||||
#ifdef Q_OS_WINDOWS
|
||||
# include <dwmapi.h>
|
||||
# ifndef DWMWA_WINDOW_CORNER_PREFERENCE
|
||||
# define DWMWA_WINDOW_CORNER_PREFERENCE 33
|
||||
# endif
|
||||
# ifndef DWMWCP_DEFAULT
|
||||
# define DWMWCP_DEFAULT 0
|
||||
# endif
|
||||
# ifndef DWMWCP_DONOTROUND
|
||||
# define DWMWCP_DONOTROUND 1
|
||||
# endif
|
||||
#endif
|
||||
|
||||
extern "C" {
|
||||
#include <86box/86box.h>
|
||||
#include <86box/config.h>
|
||||
@@ -48,6 +61,15 @@ screenOfWidget(QWidget *widget)
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef Q_OS_WINDOWS
|
||||
void
|
||||
setWin11RoundedCorners(WId hwnd, bool enable)
|
||||
{
|
||||
auto cornerPreference = (enable ? DWMWCP_DEFAULT : DWMWCP_DONOTROUND);
|
||||
DwmSetWindowAttribute((HWND) hwnd, DWMWA_WINDOW_CORNER_PREFERENCE, (LPCVOID) &cornerPreference, sizeof(cornerPreference));
|
||||
}
|
||||
#endif
|
||||
|
||||
QString
|
||||
DlgFilter(std::initializer_list<QString> extensions, bool last)
|
||||
{
|
||||
|
||||
@@ -13,6 +13,9 @@ static constexpr auto UUID_MIN_LENGTH = 36;
|
||||
QString DlgFilter(std::initializer_list<QString> extensions, bool last = false);
|
||||
/* Returns screen the widget is on */
|
||||
QScreen *screenOfWidget(QWidget *widget);
|
||||
#ifdef Q_OS_WINDOWS
|
||||
void setWin11RoundedCorners(WId hwnd, bool enable);
|
||||
#endif
|
||||
QString currentUuid();
|
||||
void storeCurrentUuid();
|
||||
bool compareUuid();
|
||||
|
||||
@@ -43,6 +43,7 @@
|
||||
<file>qt/icons/other_removable_devices.ico</file>
|
||||
<file>qt/icons/ports.ico</file>
|
||||
<file>qt/icons/sound.ico</file>
|
||||
<file>qt/icons/sound_mute.ico</file>
|
||||
<file>qt/icons/storage_controllers.ico</file>
|
||||
<file>qt/icons/zip.ico</file>
|
||||
<file>qt/icons/zip_active.ico</file>
|
||||
|
||||
@@ -29,6 +29,7 @@
|
||||
#define HAVE_STDARG_H
|
||||
#include <86box/86box.h>
|
||||
#include <86box/io.h>
|
||||
#include "cpu.h"
|
||||
#include <86box/timer.h>
|
||||
#include <86box/dma.h>
|
||||
#include <86box/pic.h>
|
||||
|
||||
@@ -278,7 +278,7 @@ givealbuffer_common(const void *buf, const uint8_t src, const int size, const in
|
||||
|
||||
alGetSourcei(source[src], AL_BUFFERS_PROCESSED, &processed);
|
||||
if (processed >= 1) {
|
||||
const double gain = pow(10.0, (double) sound_gain / 20.0);
|
||||
const double gain = sound_muted ? 0.0 : pow(10.0, (double) sound_gain / 20.0);
|
||||
alListenerf(AL_GAIN, (float) gain);
|
||||
|
||||
alSourceUnqueueBuffers(source[src], 1, &buffer);
|
||||
|
||||
@@ -39,6 +39,7 @@
|
||||
#include <86box/pci.h>
|
||||
#include <86box/snd_ac97.h>
|
||||
#include <86box/sound.h>
|
||||
#include "cpu.h"
|
||||
#include <86box/timer.h>
|
||||
#include <86box/plat_unused.h>
|
||||
#include <86box/snd_akm4531.h>
|
||||
@@ -489,7 +490,10 @@ es137x_reset(void *priv)
|
||||
|
||||
/* Serial Interface Control Register, Address 20H
|
||||
Addressable as byte, word, longword */
|
||||
dev->si_cr = 0xff800000;
|
||||
if (dev->type == AUDIOPCI_ES1370)
|
||||
dev->si_cr = 0x00000000;
|
||||
else
|
||||
dev->si_cr = 0xff800000;
|
||||
|
||||
/* DAC1 Channel Sample Count Register, Address 24H
|
||||
Addressable as word, longword */
|
||||
|
||||
@@ -15,6 +15,7 @@
|
||||
#include <86box/nmi.h>
|
||||
#include <86box/pic.h>
|
||||
#include <86box/sound.h>
|
||||
#include "cpu.h"
|
||||
#include <86box/timer.h>
|
||||
#ifdef USE_GUSMAX
|
||||
# include <86box/snd_ad1848.h>
|
||||
|
||||
@@ -32,6 +32,7 @@
|
||||
#include <86box/86box.h>
|
||||
#include <86box/sound.h>
|
||||
#include <86box/device.h>
|
||||
#include "cpu.h"
|
||||
#include <86box/timer.h>
|
||||
#include <86box/snd_opl.h>
|
||||
#include <86box/plat_unused.h>
|
||||
|
||||
@@ -46,6 +46,7 @@
|
||||
#define HAVE_STDARG_H
|
||||
#include <86box/86box.h>
|
||||
#include <86box/sound.h>
|
||||
#include "cpu.h"
|
||||
#include <86box/timer.h>
|
||||
#include <86box/device.h>
|
||||
#include <86box/snd_opl.h>
|
||||
|
||||
@@ -39,6 +39,7 @@
|
||||
#include <86box/pic.h>
|
||||
#include <86box/rom.h>
|
||||
#include <86box/sound.h>
|
||||
#include "cpu.h"
|
||||
#include <86box/timer.h>
|
||||
#include <86box/snd_sb.h>
|
||||
#include <86box/plat_unused.h>
|
||||
|
||||
@@ -245,7 +245,7 @@ givealbuffer_common(const void *buf, IXAudio2SourceVoice *sourcevoice, const siz
|
||||
if (!initialized)
|
||||
return;
|
||||
|
||||
(void) IXAudio2MasteringVoice_SetVolume(mastervoice, pow(10.0, (double) sound_gain / 20.0),
|
||||
(void) IXAudio2MasteringVoice_SetVolume(mastervoice, sound_muted ? 0.0 : pow(10.0, (double) sound_gain / 20.0),
|
||||
XAUDIO2_COMMIT_NOW);
|
||||
XAUDIO2_BUFFER buffer = { 0 };
|
||||
buffer.Flags = 0;
|
||||
|
||||
@@ -3,6 +3,7 @@
|
||||
#include <string.h>
|
||||
#include <wchar.h>
|
||||
#include <86box/86box.h>
|
||||
#include "cpu.h"
|
||||
#include <86box/timer.h>
|
||||
#include <86box/nv/vid_nv_rivatimer.h>
|
||||
|
||||
|
||||
@@ -38,6 +38,7 @@
|
||||
#include <86box/device.h>
|
||||
#include <86box/gameport.h>
|
||||
#include <86box/unix_sdl.h>
|
||||
#include "cpu.h"
|
||||
#include <86box/timer.h>
|
||||
#include <86box/nvr.h>
|
||||
#include <86box/version.h>
|
||||
|
||||
@@ -715,27 +715,13 @@ ibm8514_accel_out(uint16_t port, uint32_t val, svga_t *svga, int len)
|
||||
break;
|
||||
|
||||
case 0x42e8:
|
||||
if (val & 0x01)
|
||||
dev->subsys_stat &= ~0x01;
|
||||
if (val & 0x02)
|
||||
dev->subsys_stat &= ~0x02;
|
||||
if (val & 0x04)
|
||||
dev->subsys_stat &= ~0x04;
|
||||
if (val & 0x08)
|
||||
dev->subsys_stat &= ~0x08;
|
||||
ibm8514_log("VBLANK stat=%02x, val=%02x.\n", dev->subsys_stat, val);
|
||||
dev->subsys_cntl = (dev->subsys_cntl & 0xff00) | val;
|
||||
dev->subsys_stat &= ~val;
|
||||
break;
|
||||
case 0x42e9:
|
||||
dev->subsys_cntl = val;
|
||||
if (val & 0x01)
|
||||
dev->subsys_stat |= 0x01;
|
||||
if (val & 0x02)
|
||||
dev->subsys_stat |= 0x02;
|
||||
if (val & 0x04)
|
||||
dev->subsys_stat |= 0x04;
|
||||
if (val & 0x08)
|
||||
dev->subsys_stat |= 0x08;
|
||||
|
||||
if ((val & 0xc0) == 0xc0) {
|
||||
dev->subsys_cntl = (dev->subsys_cntl & 0xff) | (val << 8);
|
||||
if ((val & 0xc0) == 0x80) {
|
||||
dev->fifo_idx = 0;
|
||||
dev->force_busy = 0;
|
||||
dev->force_busy2 = 0;
|
||||
@@ -882,10 +868,10 @@ ibm8514_accel_in(uint16_t port, svga_t *svga)
|
||||
|
||||
switch (port) {
|
||||
case 0x2e8:
|
||||
if (dev->vc == dev->v_syncstart)
|
||||
if (dev->vc == dev->dispend)
|
||||
temp |= 0x02;
|
||||
|
||||
ibm8514_log("0x2E8 read: Display Status=%02x.\n", temp);
|
||||
ibm8514_log("Read: Display Status1=%02x.\n", temp);
|
||||
break;
|
||||
|
||||
case 0x6e8:
|
||||
@@ -910,21 +896,25 @@ ibm8514_accel_in(uint16_t port, svga_t *svga)
|
||||
|
||||
case 0x42e8:
|
||||
case 0x42e9:
|
||||
if (dev->vc == dev->v_syncstart)
|
||||
dev->subsys_stat |= 0x01;
|
||||
if ((dev->subsys_cntl & 0x01) && !(dev->subsys_stat & 0x01) && (dev->vc == dev->dispend))
|
||||
temp |= 0x01;
|
||||
|
||||
if (cmd == 6) {
|
||||
if ((dev->accel.dx >= clip_l) &&
|
||||
if ((dev->subsys_cntl & 0x02) &&
|
||||
!(dev->subsys_stat & 0x02) &&
|
||||
(dev->accel.dx >= clip_l) &&
|
||||
(dev->accel.dx <= clip_r_ibm) &&
|
||||
(dev->accel.dy >= clip_t) &&
|
||||
(dev->accel.dy <= clip_b_ibm))
|
||||
dev->subsys_stat |= 0x02;
|
||||
temp |= 0x02;
|
||||
} else {
|
||||
if ((dev->accel.cx >= clip_l) &&
|
||||
if ((dev->subsys_cntl & 0x02) &&
|
||||
!(dev->subsys_stat & 0x02) &&
|
||||
(dev->accel.cx >= clip_l) &&
|
||||
(dev->accel.cx <= clip_r_ibm) &&
|
||||
(dev->accel.cy >= clip_t) &&
|
||||
(dev->accel.cy <= clip_b_ibm))
|
||||
dev->subsys_stat |= 0x02;
|
||||
temp |= 0x02;
|
||||
}
|
||||
|
||||
if (!dev->fifo_idx) {
|
||||
@@ -932,9 +922,10 @@ ibm8514_accel_in(uint16_t port, svga_t *svga)
|
||||
temp |= 0x08;
|
||||
}
|
||||
|
||||
if (port & 1)
|
||||
if (port & 1) {
|
||||
temp = dev->vram_512k_8514 ? 0x00 : 0x80;
|
||||
else {
|
||||
temp |= (dev->subsys_cntl >> 8);
|
||||
} else {
|
||||
temp |= (dev->subsys_stat | (dev->vram_512k_8514 ? 0x00 : 0x80));
|
||||
temp |= 0x20;
|
||||
}
|
||||
@@ -1155,6 +1146,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
|
||||
(dev->accel.cx <= clip_r) &&
|
||||
(dev->accel.cy >= clip_t) &&
|
||||
(dev->accel.cy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
|
||||
case 0:
|
||||
src_dat = bkgd_color;
|
||||
@@ -1250,6 +1242,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
|
||||
(dev->accel.cx <= clip_r) &&
|
||||
(dev->accel.cy >= clip_t) &&
|
||||
(dev->accel.cy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
|
||||
case 0:
|
||||
src_dat = bkgd_color;
|
||||
@@ -1385,6 +1378,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
|
||||
(dev->accel.cx <= clip_r) &&
|
||||
(dev->accel.cy >= clip_t) &&
|
||||
(dev->accel.cy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
if (ibm8514_cpu_dest(svga) && (pixcntl == 0)) {
|
||||
mix_dat = mix_mask; /* Mix data = forced to foreground register. */
|
||||
} else if (ibm8514_cpu_dest(svga) && (pixcntl == 3)) {
|
||||
@@ -1543,6 +1537,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
|
||||
(dev->accel.cx <= clip_r) &&
|
||||
(dev->accel.cy >= clip_t) &&
|
||||
(dev->accel.cy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
if (ibm8514_cpu_dest(svga)) {
|
||||
READ((dev->accel.cy * dev->pitch) + dev->accel.cx, src_dat);
|
||||
} else
|
||||
@@ -1634,6 +1629,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
|
||||
(dev->accel.cx <= clip_r) &&
|
||||
(dev->accel.cy >= clip_t) &&
|
||||
(dev->accel.cy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
if (ibm8514_cpu_dest(svga) && (pixcntl == 0)) {
|
||||
mix_dat = mix_mask; /* Mix data = forced to foreground register. */
|
||||
} else if (ibm8514_cpu_dest(svga) && (pixcntl == 3)) {
|
||||
@@ -1832,6 +1828,7 @@ ibm8514_accel_start(int count, int cpu_input, uint32_t mix_dat, uint32_t cpu_dat
|
||||
(dev->accel.cx <= clip_r) &&
|
||||
(dev->accel.cy >= clip_t) &&
|
||||
(dev->accel.cy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
|
||||
case 0:
|
||||
src_dat = bkgd_color;
|
||||
@@ -1989,6 +1986,7 @@ skip_vector_rect_write:
|
||||
(dev->accel.cx <= clip_r) &&
|
||||
(dev->accel.cy >= clip_t) &&
|
||||
(dev->accel.cy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
if (ibm8514_cpu_dest(svga) && (pixcntl == 0)) {
|
||||
mix_dat = mix_mask; /* Mix data = forced to foreground register. */
|
||||
} else if (ibm8514_cpu_dest(svga) && (pixcntl == 3)) {
|
||||
@@ -2150,6 +2148,7 @@ skip_nibble_rect_write:
|
||||
(dev->accel.cx <= clip_r) &&
|
||||
(dev->accel.cy >= clip_t) &&
|
||||
(dev->accel.cy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
|
||||
case 0:
|
||||
src_dat = bkgd_color;
|
||||
@@ -2232,6 +2231,7 @@ skip_nibble_rect_write:
|
||||
(dev->accel.cx <= clip_r) &&
|
||||
(dev->accel.cy >= clip_t) &&
|
||||
(dev->accel.cy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
switch ((mix_dat & 0x01) ? frgd_mix : bkgd_mix) {
|
||||
case 0:
|
||||
src_dat = bkgd_color;
|
||||
@@ -2313,6 +2313,7 @@ skip_nibble_rect_write:
|
||||
(dev->accel.cx <= clip_r) &&
|
||||
(dev->accel.cy >= clip_t) &&
|
||||
(dev->accel.cy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
|
||||
case 0:
|
||||
src_dat = bkgd_color;
|
||||
@@ -2424,6 +2425,7 @@ skip_nibble_rect_write:
|
||||
(dev->accel.cx <= clip_r) &&
|
||||
(dev->accel.cy >= clip_t) &&
|
||||
(dev->accel.cy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
|
||||
case 0:
|
||||
src_dat = bkgd_color;
|
||||
@@ -2546,6 +2548,7 @@ skip_nibble_rect_write:
|
||||
(dev->accel.cx <= clip_r) &&
|
||||
(dev->accel.cy >= clip_t) &&
|
||||
(dev->accel.cy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
|
||||
case 0:
|
||||
src_dat = bkgd_color;
|
||||
@@ -2650,9 +2653,10 @@ skip_nibble_rect_write:
|
||||
dev->accel.cx = CLAMP(dev->accel.cx, clip_l, clip_r);
|
||||
|
||||
if ((dev->accel.cx >= clip_l) &&
|
||||
(dev->accel.cx < clip_r) &&
|
||||
(dev->accel.cx <= clip_r) &&
|
||||
(dev->accel.cy >= clip_t) &&
|
||||
(dev->accel.cy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
|
||||
case 0:
|
||||
src_dat = bkgd_color;
|
||||
@@ -2811,6 +2815,7 @@ skip_nibble_rect_write:
|
||||
(dev->accel.dx <= clip_r) &&
|
||||
(dev->accel.dy >= clip_t) &&
|
||||
(dev->accel.dy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
if (pixcntl == 3) {
|
||||
if (!(dev->accel.cmd & 0x10) && ((frgd_mix != 3) || (bkgd_mix != 3))) {
|
||||
READ(dev->accel.src + dev->accel.cx, mix_dat);
|
||||
@@ -2978,6 +2983,7 @@ skip_nibble_bitblt_write:
|
||||
(dev->accel.dx <= clip_r) &&
|
||||
(dev->accel.dy >= clip_t) &&
|
||||
(dev->accel.dy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
switch ((mix_dat & mix_mask) ? frgd_mix : bkgd_mix) {
|
||||
case 0:
|
||||
src_dat = bkgd_color;
|
||||
@@ -3075,6 +3081,7 @@ skip_nibble_bitblt_write:
|
||||
(dev->accel.dx <= clip_r) &&
|
||||
(dev->accel.dy >= clip_t) &&
|
||||
(dev->accel.dy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
switch ((mix_dat & 0x01) ? frgd_mix : bkgd_mix) {
|
||||
case 0:
|
||||
src_dat = bkgd_color;
|
||||
@@ -3174,6 +3181,7 @@ skip_nibble_bitblt_write:
|
||||
(dx <= (((uint64_t)clip_r) * 3)) &&
|
||||
(dev->accel.dy >= (clip_t << 1)) &&
|
||||
(dev->accel.dy <= (clip_b << 1))) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
|
||||
READ(dev->accel.src + cx, src_dat);
|
||||
READ(dev->accel.dest + dx, dest_dat);
|
||||
@@ -3196,6 +3204,7 @@ skip_nibble_bitblt_write:
|
||||
(dev->accel.dx <= clip_r) &&
|
||||
(dev->accel.dy >= clip_t) &&
|
||||
(dev->accel.dy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
if (pixcntl == 3) {
|
||||
if (!(dev->accel.cmd & 0x10) && ((frgd_mix != 3) || (bkgd_mix != 3))) {
|
||||
READ(dev->accel.src + dev->accel.cx, mix_dat);
|
||||
@@ -3704,6 +3713,8 @@ ibm8514_poll(void *priv)
|
||||
dev->vc &= 0xfff;
|
||||
|
||||
if (dev->vc == dev->dispend) {
|
||||
dev->subsys_stat |= 0x01;
|
||||
ibm8514_log("VBLANK irq.\n");
|
||||
dev->dispon = 0;
|
||||
|
||||
for (x = 0; x < ((dev->vram_mask + 1) >> 12); x++) {
|
||||
|
||||
@@ -70,20 +70,19 @@ void
|
||||
ati68860_ramdac_out(uint16_t addr, uint8_t val, void *priv, svga_t *svga)
|
||||
{
|
||||
ati68860_ramdac_t *ramdac = (ati68860_ramdac_t *) priv;
|
||||
const ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
|
||||
|
||||
switch (addr) {
|
||||
case 0:
|
||||
svga_out((dev && dev->on) ? 0x2ec : 0x3c8, val, svga);
|
||||
svga_out(0x3c8, val, svga);
|
||||
break;
|
||||
case 1:
|
||||
svga_out((dev && dev->on) ? 0x2ed : 0x3c9, val, svga);
|
||||
svga_out(0x3c9, val, svga);
|
||||
break;
|
||||
case 2:
|
||||
svga_out((dev && dev->on) ? 0x2ea : 0x3c6, val, svga);
|
||||
svga_out(0x3c6, val, svga);
|
||||
break;
|
||||
case 3:
|
||||
svga_out((dev && dev->on) ? 0x2eb : 0x3c7, val, svga);
|
||||
svga_out(0x3c7, val, svga);
|
||||
break;
|
||||
default:
|
||||
ramdac->regs[addr & 0xf] = val;
|
||||
@@ -176,21 +175,20 @@ uint8_t
|
||||
ati68860_ramdac_in(uint16_t addr, void *priv, svga_t *svga)
|
||||
{
|
||||
const ati68860_ramdac_t *ramdac = (ati68860_ramdac_t *) priv;
|
||||
const ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
|
||||
uint8_t temp = 0;
|
||||
|
||||
switch (addr) {
|
||||
case 0:
|
||||
temp = svga_in((dev && dev->on) ? 0x2ec : 0x3c8, svga);
|
||||
temp = svga_in(0x3c8, svga);
|
||||
break;
|
||||
case 1:
|
||||
temp = svga_in((dev && dev->on) ? 0x2ed : 0x3c9, svga);
|
||||
temp = svga_in(0x3c9, svga);
|
||||
break;
|
||||
case 2:
|
||||
temp = svga_in((dev && dev->on) ? 0x2ea : 0x3c6, svga);
|
||||
temp = svga_in(0x3c6, svga);
|
||||
break;
|
||||
case 3:
|
||||
temp = svga_in((dev && dev->on) ? 0x2eb : 0x3c7, svga);
|
||||
temp = svga_in(0x3c7, svga);
|
||||
break;
|
||||
case 4:
|
||||
case 8:
|
||||
|
||||
@@ -28,6 +28,7 @@
|
||||
#include <86box/device.h>
|
||||
#include <86box/io.h>
|
||||
#include <86box/mem.h>
|
||||
#include "cpu.h"
|
||||
#include <86box/timer.h>
|
||||
#include <86box/pci.h>
|
||||
#include <86box/rom.h>
|
||||
|
||||
@@ -27,6 +27,7 @@
|
||||
#include <86box/device.h>
|
||||
#include <86box/io.h>
|
||||
#include <86box/mem.h>
|
||||
#include "cpu.h"
|
||||
#include <86box/timer.h>
|
||||
#include <86box/mca.h>
|
||||
#include <86box/pci.h>
|
||||
@@ -437,6 +438,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
|
||||
(dev->accel.dx <= clip_r) &&
|
||||
(dev->accel.dy >= clip_t) &&
|
||||
(dev->accel.dy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
switch (mix ? frgd_sel : bkgd_sel) {
|
||||
case 0:
|
||||
src_dat = dev->accel.bkgd_color;
|
||||
@@ -660,6 +662,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
|
||||
(dev->accel.dx <= clip_r) &&
|
||||
(dev->accel.dy >= clip_t) &&
|
||||
(dev->accel.dy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
switch (mix ? frgd_sel : bkgd_sel) {
|
||||
case 0:
|
||||
src_dat = dev->accel.bkgd_color;
|
||||
@@ -1066,6 +1069,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
|
||||
(dev->accel.dx <= clip_r) &&
|
||||
(dev->accel.dy >= clip_t) &&
|
||||
(dev->accel.dy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
if (mach->accel.dp_config & 0x02) {
|
||||
READ(dev->accel.src + dev->accel.cx, poly_src);
|
||||
poly_src = ((poly_src & rd_mask) == rd_mask);
|
||||
@@ -1307,6 +1311,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
|
||||
(dev->accel.cx <= clip_r) &&
|
||||
(dev->accel.cy >= clip_t) &&
|
||||
(dev->accel.cy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
mach->accel.clip_overrun = 0;
|
||||
switch (mix ? frgd_sel : bkgd_sel) {
|
||||
case 0:
|
||||
@@ -1440,6 +1445,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
|
||||
(dev->accel.cx <= clip_r) &&
|
||||
(dev->accel.cy >= clip_t) &&
|
||||
(dev->accel.cy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
mach->accel.clip_overrun = 0;
|
||||
if (mach->accel.linedraw_opt & 0x02) {
|
||||
if (dev->bpp) {
|
||||
@@ -1598,6 +1604,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
|
||||
(dev->accel.cx <= clip_r) &&
|
||||
(dev->accel.cy >= clip_t) &&
|
||||
(dev->accel.cy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
mach->accel.clip_overrun = 0;
|
||||
switch (mix ? frgd_sel : bkgd_sel) {
|
||||
case 0:
|
||||
@@ -1732,6 +1739,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
|
||||
(dev->accel.cx <= clip_r) &&
|
||||
(dev->accel.cy >= clip_t) &&
|
||||
(dev->accel.cy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
mach->accel.clip_overrun = 0;
|
||||
switch (mix ? frgd_sel : bkgd_sel) {
|
||||
case 0:
|
||||
@@ -2027,6 +2035,7 @@ mach_accel_start(int cmd_type, int cpu_input, int count, uint32_t mix_dat, uint3
|
||||
(dev->accel.dx <= clip_r) &&
|
||||
(dev->accel.dy >= clip_t) &&
|
||||
(dev->accel.dy <= clip_b)) {
|
||||
dev->subsys_stat |= 0x02;
|
||||
switch (mix ? frgd_sel : bkgd_sel) {
|
||||
case 0:
|
||||
src_dat = dev->accel.bkgd_color;
|
||||
@@ -2332,6 +2341,7 @@ mach_out(uint16_t addr, uint8_t val, void *priv)
|
||||
case 0x2ed:
|
||||
rs2 = !!(mach->accel.ext_ge_config & 0x1000);
|
||||
rs3 = !!(mach->accel.ext_ge_config & 0x2000);
|
||||
mach_log("8514/A RS2=%d, RS3=%d, addr=%03x.\n", rs2, rs3, addr);
|
||||
if ((dev->local & 0xff) >= 0x02) {
|
||||
if (mach->regs[0xb0] & 0x20) { /*ATI extended 8514/A mode.*/
|
||||
mach_log("Extended 8514/A mode.\n");
|
||||
@@ -2340,10 +2350,14 @@ mach_out(uint16_t addr, uint8_t val, void *priv)
|
||||
svga_recalctimings(svga);
|
||||
mach32_updatemapping(mach, svga);
|
||||
}
|
||||
if (mach->pci_bus && !mach->ramdac_type)
|
||||
ati68860_ramdac_out((addr & 0x03) | (rs2 << 2) | (rs3 << 3), val, svga->ramdac, svga);
|
||||
else
|
||||
ati68875_ramdac_out(addr, rs2, rs3, val, svga->ramdac, svga);
|
||||
if (dev->on)
|
||||
svga_out(addr, val, svga);
|
||||
else {
|
||||
if (mach->pci_bus && !mach->ramdac_type)
|
||||
ati68860_ramdac_out((addr & 0x03) | (rs2 << 2) | (rs3 << 3), val, svga->ramdac, svga);
|
||||
else
|
||||
ati68875_ramdac_out(addr, rs2, rs3, val, svga->ramdac, svga);
|
||||
}
|
||||
} else
|
||||
svga_out(addr, val, svga);
|
||||
return;
|
||||
@@ -2354,6 +2368,7 @@ mach_out(uint16_t addr, uint8_t val, void *priv)
|
||||
case 0x3C9:
|
||||
rs2 = !!(mach->regs[0xa0] & 0x20);
|
||||
rs3 = !!(mach->regs[0xa0] & 0x40);
|
||||
mach_log("VGA RS2=%d, RS3=%d, addr=%03x.\n", rs2, rs3, addr);
|
||||
if ((dev->local & 0xff) >= 0x02) {
|
||||
if (svga->attrregs[0x10] & 0x40) {
|
||||
mach_log("VGA mode.\n");
|
||||
@@ -2362,10 +2377,14 @@ mach_out(uint16_t addr, uint8_t val, void *priv)
|
||||
svga_recalctimings(svga);
|
||||
mach32_updatemapping(mach, svga);
|
||||
}
|
||||
if (mach->pci_bus && !mach->ramdac_type)
|
||||
ati68860_ramdac_out((addr & 0x03) | (rs2 << 2) | (rs3 << 3), val, svga->ramdac, svga);
|
||||
else
|
||||
ati68875_ramdac_out(addr, rs2, rs3, val, svga->ramdac, svga);
|
||||
if (dev->on)
|
||||
svga_out(addr, val, svga);
|
||||
else {
|
||||
if (mach->pci_bus && !mach->ramdac_type)
|
||||
ati68860_ramdac_out((addr & 0x03) | (rs2 << 2) | (rs3 << 3), val, svga->ramdac, svga);
|
||||
else
|
||||
ati68875_ramdac_out(addr, rs2, rs3, val, svga->ramdac, svga);
|
||||
}
|
||||
} else
|
||||
svga_out(addr, val, svga);
|
||||
return;
|
||||
@@ -2480,10 +2499,14 @@ mach_in(uint16_t addr, void *priv)
|
||||
rs2 = !!(mach->accel.ext_ge_config & 0x1000);
|
||||
rs3 = !!(mach->accel.ext_ge_config & 0x2000);
|
||||
if ((dev->local & 0xff) >= 0x02) {
|
||||
if (mach->pci_bus && !mach->ramdac_type)
|
||||
temp = ati68860_ramdac_in((addr & 3) | (rs2 << 2) | (rs3 << 3), svga->ramdac, svga);
|
||||
else
|
||||
temp = ati68875_ramdac_in(addr, rs2, rs3, svga->ramdac, svga);
|
||||
if (dev->on)
|
||||
temp = svga_in(addr, svga);
|
||||
else {
|
||||
if (mach->pci_bus && !mach->ramdac_type)
|
||||
temp = ati68860_ramdac_in((addr & 3) | (rs2 << 2) | (rs3 << 3), svga->ramdac, svga);
|
||||
else
|
||||
temp = ati68875_ramdac_in(addr, rs2, rs3, svga->ramdac, svga);
|
||||
}
|
||||
} else
|
||||
temp = svga_in(addr, svga);
|
||||
break;
|
||||
@@ -3406,7 +3429,7 @@ mach_accel_out_fifo(mach_t *mach, svga_t *svga, ibm8514_t *dev, uint16_t port, u
|
||||
static void
|
||||
mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8514_t *dev)
|
||||
{
|
||||
if (port != 0x42e8 && port != 0x42e9)
|
||||
if (port == 0x42e8 || port == 0x42e9)
|
||||
mach_log("[%04X:%08X]: Port CALL OUT=%04x, val=%02x.\n", CS, cpu_state.pc, port, val);
|
||||
|
||||
switch (port) {
|
||||
@@ -3421,7 +3444,7 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8
|
||||
break;
|
||||
case 0x42e9:
|
||||
ibm8514_accel_out(port, val, svga, 2);
|
||||
if ((val & 0xc0) == 0xc0) {
|
||||
if ((val & 0xc0) == 0x80) {
|
||||
dev->ext_fifo_idx = 0;
|
||||
mach->force_busy = 0;
|
||||
}
|
||||
@@ -3512,6 +3535,11 @@ mach_accel_out_call(uint16_t port, uint8_t val, mach_t *mach, svga_t *svga, ibm8
|
||||
svga_recalctimings(svga);
|
||||
break;
|
||||
|
||||
case 0x46e8:
|
||||
case 0x46e9:
|
||||
mach_log("0x%04x write: VGA subsystem enable add-on=%02x.\n", port, val);
|
||||
break;
|
||||
|
||||
case 0x4ae8:
|
||||
dev->accel.advfunc_cntl = val;
|
||||
dev->on = dev->accel.advfunc_cntl & 0x01;
|
||||
@@ -4200,6 +4228,7 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev)
|
||||
|
||||
switch (port) {
|
||||
case 0x2e8:
|
||||
case 0x2e9:
|
||||
case 0x6e8:
|
||||
case 0x22e8:
|
||||
case 0x26e8:
|
||||
@@ -4211,18 +4240,22 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev)
|
||||
|
||||
case 0x42e8:
|
||||
case 0x42e9:
|
||||
if (dev->vc == dev->v_syncstart)
|
||||
if ((dev->subsys_cntl & 0x01) && !(dev->subsys_stat & 0x01) && (dev->vc == dev->dispend))
|
||||
temp |= 0x01;
|
||||
|
||||
if (mach->accel.cmd_type == -1) {
|
||||
if (cmd == 6) {
|
||||
if ((dev->accel.dx >= clip_l) &&
|
||||
if ((dev->subsys_cntl & 0x02) &&
|
||||
!(dev->subsys_stat & 0x02) &&
|
||||
(dev->accel.dx >= clip_l) &&
|
||||
(dev->accel.dx <= clip_r_ibm) &&
|
||||
(dev->accel.dy >= clip_t) &&
|
||||
(dev->accel.dy <= clip_b_ibm))
|
||||
temp |= 0x02;
|
||||
} else {
|
||||
if ((dev->accel.cx >= clip_l) &&
|
||||
if ((dev->subsys_cntl & 0x02) &&
|
||||
!(dev->subsys_stat & 0x02) &&
|
||||
(dev->accel.cx >= clip_l) &&
|
||||
(dev->accel.cx <= clip_r_ibm) &&
|
||||
(dev->accel.cy >= clip_t) &&
|
||||
(dev->accel.cy <= clip_b_ibm))
|
||||
@@ -4233,7 +4266,9 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev)
|
||||
case 1:
|
||||
case 2:
|
||||
case 5:
|
||||
if ((dev->accel.dx >= clip_l) &&
|
||||
if ((dev->subsys_cntl & 0x02) &&
|
||||
!(dev->subsys_stat & 0x02) &&
|
||||
(dev->accel.dx >= clip_l) &&
|
||||
(dev->accel.dx <= clip_r) &&
|
||||
(dev->accel.dy >= clip_t) &&
|
||||
(dev->accel.dy <= clip_b))
|
||||
@@ -4241,7 +4276,9 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev)
|
||||
break;
|
||||
case 3:
|
||||
case 4:
|
||||
if ((dev->accel.cx >= clip_l) &&
|
||||
if ((dev->subsys_cntl & 0x02) &&
|
||||
!(dev->subsys_stat & 0x02) &&
|
||||
(dev->accel.cx >= clip_l) &&
|
||||
(dev->accel.cx <= clip_r) &&
|
||||
(dev->accel.cy >= clip_t) &&
|
||||
(dev->accel.cy <= clip_b))
|
||||
@@ -4256,16 +4293,17 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev)
|
||||
if ((!dev->force_busy && !dev->force_busy2) || !mach->force_busy)
|
||||
temp |= 0x08;
|
||||
}
|
||||
if (port & 1)
|
||||
if (port & 1) {
|
||||
temp = dev->vram_512k_8514 ? 0x00 : 0x80;
|
||||
else {
|
||||
temp |= (dev->subsys_cntl >> 8);
|
||||
} else {
|
||||
temp |= (dev->subsys_stat | (dev->vram_512k_8514 ? 0x00 : 0x80));
|
||||
if (mach->accel.ext_ge_config & 0x08)
|
||||
temp |= ((mach->accel.ext_ge_config & 0x07) << 4);
|
||||
else
|
||||
temp |= 0x20;
|
||||
}
|
||||
mach_log("0x%04x read: Subsystem Status=%02x.\n", port, temp);
|
||||
mach_log("0x%04x read: Subsystem Status=%02x, monitoralias=%02x.\n", port, temp, mach->accel.ext_ge_config & 0x07);
|
||||
break;
|
||||
|
||||
/*ATI Mach8/32 specific registers*/
|
||||
@@ -4402,7 +4440,8 @@ mach_accel_in_call(uint16_t port, mach_t *mach, svga_t *svga, ibm8514_t *dev)
|
||||
default:
|
||||
break;
|
||||
}
|
||||
mach_log("[%04X:%08X]: Port NORMAL IN=%04x, temp=%04x.\n", CS, cpu_state.pc, port, temp);
|
||||
if (port == 0x2ee8 || port == 0x2ee9 || port == 0x42e8 || port == 0x42e9)
|
||||
mach_log("[%04X:%08X]: Port NORMAL IN=%04x, temp=%04x.\n", CS, cpu_state.pc, port, temp);
|
||||
|
||||
return temp;
|
||||
}
|
||||
@@ -5418,6 +5457,10 @@ mach32_updatemapping(mach_t *mach, svga_t *svga)
|
||||
mem_mapping_set_handler(&svga->mapping, mach32_read, mach32_readw, mach32_readl, mach32_write, mach32_writew, mach32_writel);
|
||||
mem_mapping_set_p(&svga->mapping, mach);
|
||||
} else {
|
||||
if (!dev->on) {
|
||||
memset(dev->vram, 0, dev->vram_size);
|
||||
memset(dev->changedvram, 0, (dev->vram_size >> 12) + 1);
|
||||
}
|
||||
mach_log("IBM compatible banked mapping.\n");
|
||||
mem_mapping_set_handler(&svga->mapping, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel);
|
||||
mem_mapping_set_p(&svga->mapping, svga);
|
||||
|
||||
@@ -27,6 +27,7 @@
|
||||
#include <86box/mem.h>
|
||||
#include <86box/rom.h>
|
||||
#include <86box/device.h>
|
||||
#include "cpu.h"
|
||||
#include <86box/timer.h>
|
||||
#include <86box/video.h>
|
||||
#include <86box/vid_svga.h>
|
||||
|
||||
@@ -23,6 +23,7 @@
|
||||
#include <stdatomic.h>
|
||||
#include <86box/86box.h>
|
||||
#include <86box/io.h>
|
||||
#include "cpu.h"
|
||||
#include <86box/timer.h>
|
||||
#include <86box/mem.h>
|
||||
#include <86box/pci.h>
|
||||
|
||||
@@ -30,6 +30,7 @@
|
||||
#include <86box/io.h>
|
||||
#include <86box/video.h>
|
||||
#include <86box/86box.h>
|
||||
#include "cpu.h"
|
||||
#include <86box/timer.h>
|
||||
#include <86box/mem.h>
|
||||
#include <86box/pit.h>
|
||||
|
||||
@@ -31,6 +31,7 @@
|
||||
#include <86box/io.h>
|
||||
#include <86box/video.h>
|
||||
#include <86box/86box.h>
|
||||
#include "cpu.h"
|
||||
#include <86box/timer.h>
|
||||
#include <86box/mem.h>
|
||||
#include <86box/pit.h>
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -141,10 +141,10 @@ video_cards[] = {
|
||||
{ .device = &chips_69000_device, .flags = VIDEO_FLAG_TYPE_NONE },
|
||||
{ .device = &gd5430_pci_device, .flags = VIDEO_FLAG_TYPE_NONE },
|
||||
{ .device = &gd5434_pci_device, .flags = VIDEO_FLAG_TYPE_NONE },
|
||||
{ .device = &gd5436_pci_device, .flags = VIDEO_FLAG_TYPE_SPECIAL },
|
||||
{ .device = &gd5436_pci_device, .flags = VIDEO_FLAG_TYPE_SECONDARY },
|
||||
{ .device = &gd5440_pci_device, .flags = VIDEO_FLAG_TYPE_NONE },
|
||||
{ .device = &gd5446_pci_device, .flags = VIDEO_FLAG_TYPE_SPECIAL },
|
||||
{ .device = &gd5446_stb_pci_device, .flags = VIDEO_FLAG_TYPE_SPECIAL },
|
||||
{ .device = &gd5446_pci_device, .flags = VIDEO_FLAG_TYPE_SECONDARY },
|
||||
{ .device = &gd5446_stb_pci_device, .flags = VIDEO_FLAG_TYPE_SECONDARY },
|
||||
{ .device = &gd5480_pci_device, .flags = VIDEO_FLAG_TYPE_NONE },
|
||||
{ .device = &et4000w32p_videomagic_revb_pci_device, .flags = VIDEO_FLAG_TYPE_NONE },
|
||||
{ .device = &et4000w32p_revc_pci_device, .flags = VIDEO_FLAG_TYPE_NONE },
|
||||
|
||||
Reference in New Issue
Block a user