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Merge pull request #5817 from 86Box/tc1995

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XGA/SVGA mode changes of the day (July 22nd, 2025)
This commit is contained in:
Miran Grča
2025-07-22 21:07:04 +02:00
committed by GitHub
parent 5453aec740 1a5b4671e8
commit edbd54211e
12 changed files with 226 additions and 69 deletions
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8
src/include/86box/vid_xga.h
View File

@@ -19,8 +19,8 @@
#include <86box/rom.h>
#define INT_START_BLKNK_ENAB (1 << 0)
#define INT_MASK 0xf
#define XGA_INT_START_BLKNK_ENAB (1 << 0)
#define XGA_INT_MASK 0xf
typedef struct xga_hwcursor_t {
int ena;
@@ -152,10 +152,9 @@ typedef struct xga_t {
int cursor_data_on;
int pal_test;
int a5_test;
int test_stage;
int type;
int bus;
int src_reverse_order;
int dst_reverse_order;
uint32_t linear_base;
uint32_t linear_size;
@@ -175,6 +174,7 @@ typedef struct xga_t {
uint32_t px_map_base;
uint32_t pallook[512];
uint32_t bios_diag;
uint32_t mapping_base;
PALETTE xgapal;

4
src/video/vid_ati_mach64.c
View File

@@ -37,6 +37,7 @@
#include <86box/video.h>
#include <86box/i2c.h>
#include <86box/vid_ddc.h>
#include <86box/vid_xga.h>
#include <86box/vid_svga.h>
#include <86box/vid_svga_render.h>
#include <86box/vid_ati_eeprom.h>
@@ -586,6 +587,7 @@ void
mach64_updatemapping(mach64_t *mach64)
{
svga_t *svga = &mach64->svga;
xga_t *xga = (xga_t *) svga->xga;
if (mach64->pci && !(mach64->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM)) {
mach64_log("Update mapping - PCI disabled\n");
@@ -611,6 +613,8 @@ mach64_updatemapping(mach64_t *mach64)
mem_mapping_set_p(&svga->mapping, mach64);
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
svga->banked_mask = 0xffff;
if (xga_active && (svga->xga != NULL))
xga->on = 0;
break;
case 0x8: /*32k at B0000*/
mem_mapping_set_handler(&svga->mapping, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel);

6
src/video/vid_ati_mach8.c
View File

@@ -6218,6 +6218,7 @@ static void
mach32_updatemapping(mach_t *mach, svga_t *svga)
{
ibm8514_t *dev = (ibm8514_t *) svga->dev8514;
xga_t *xga = (xga_t *) svga->xga;
if (mach->pci_bus && (!(mach->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM))) {
mach_log("No Mapping.\n");
@@ -6238,6 +6239,11 @@ mach32_updatemapping(mach_t *mach, svga_t *svga)
case 0x4: /*64k at A0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
svga->banked_mask = 0xffff;
if (xga_active && (svga->xga != NULL)) {
xga->on = 0;
mem_mapping_set_handler(&svga->mapping, svga_read, svga_readw, svga_readl, svga_write, svga_writew, svga_writel);
mem_mapping_set_p(&svga->mapping, svga);
}
break;
case 0x8: /*32k at B0000*/
mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000);

5
src/video/vid_cl54xx.c
View File

@@ -1703,6 +1703,7 @@ static void
gd543x_recalc_mapping(gd54xx_t *gd54xx)
{
svga_t *svga = &gd54xx->svga;
xga_t *xga = (xga_t *) svga->xga;
uint32_t base;
uint32_t size;
@@ -1729,6 +1730,10 @@ gd543x_recalc_mapping(gd54xx_t *gd54xx)
case 0x4: /*64k at A0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
svga->banked_mask = 0xffff;
if (xga_active && (svga->xga != NULL)) {
xga->on = 0;
mem_mapping_set_handler(&svga->mapping, svga->read, svga->readw, svga->readl, svga->write, svga->writew, svga->writel);
}
break;
case 0x8: /*32k at B0000*/
mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000);

12
src/video/vid_mga.c
View File

@@ -35,6 +35,7 @@
#include <86box/video.h>
#include <86box/i2c.h>
#include <86box/vid_ddc.h>
#include <86box/vid_xga.h>
#include <86box/vid_svga.h>
#include <86box/vid_svga_render.h>
@@ -1042,6 +1043,9 @@ mystique_recalctimings(svga_t *svga)
}
} else {
switch (svga->bpp) {
case 4:
svga->render = svga_render_4bpp_highres;
break;
case 8:
svga->render = svga_render_8bpp_highres;
break;
@@ -1061,6 +1065,9 @@ mystique_recalctimings(svga_t *svga)
}
} else {
switch (svga->bpp) {
case 4:
svga->render = svga_render_4bpp_highres;
break;
case 8:
svga->render = svga_render_8bpp_highres;
break;
@@ -1104,6 +1111,7 @@ static void
mystique_recalc_mapping(mystique_t *mystique)
{
svga_t *svga = &mystique->svga;
xga_t *xga = (xga_t *) svga->xga;
io_removehandler(0x03c0, 0x0020, mystique_in, NULL, NULL, mystique_out, NULL, NULL, mystique);
if ((mystique->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_IO) && (mystique->pci_regs[0x41] & 1))
@@ -1141,6 +1149,10 @@ mystique_recalc_mapping(mystique_t *mystique)
case 0x4: /*64k at A0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
svga->banked_mask = 0xffff;
if (xga_active && (svga->xga != NULL)) {
xga->on = 0;
mem_mapping_set_handler(&svga->mapping, svga->read, svga->readw, svga->readl, svga->write, svga->writew, svga->writel);
}
break;
case 0x8: /*32k at B0000*/
mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000);

8
src/video/vid_paradise.c
View File

@@ -30,6 +30,7 @@
#include <86box/rom.h>
#include <86box/device.h>
#include <86box/video.h>
#include <86box/vid_xga.h>
#include <86box/vid_svga.h>
#include <86box/vid_svga_render.h>
@@ -143,6 +144,7 @@ paradise_out(uint16_t addr, uint8_t val, void *priv)
{
paradise_t *paradise = (paradise_t *) priv;
svga_t *svga = &paradise->svga;
xga_t *xga = (xga_t *) svga->xga;
uint8_t old;
if (((addr & 0xfff0) == 0x3d0 || (addr & 0xfff0) == 0x3b0) && !(svga->miscout & 1))
@@ -188,6 +190,10 @@ paradise_out(uint16_t addr, uint8_t val, void *priv)
case 0x4: /*64k at A0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
svga->banked_mask = 0xffff;
if (xga_active && (svga->xga != NULL)) {
xga->on = 0;
mem_mapping_set_handler(&svga->mapping, svga->read, svga->readw, svga->readl, svga->write, svga->writew, svga->writel);
}
break;
case 0x8: /*32k at B0000*/
mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000);
@@ -586,7 +592,7 @@ paradise_decode_addr(paradise_t *paradise, uint32_t addr, int write)
addr = (addr & 0x7fff) + paradise->write_bank[(addr >> 15) & 3];
else
addr = (addr & 0x7fff) + paradise->read_bank[(addr >> 15) & 3];
return addr;
}

18
src/video/vid_s3.c
View File

@@ -37,6 +37,7 @@
#include <86box/video.h>
#include <86box/i2c.h>
#include <86box/vid_ddc.h>
#include <86box/vid_xga.h>
#include <86box/vid_svga.h>
#include <86box/vid_svga_render.h>
#include "cpu.h"
@@ -3069,6 +3070,8 @@ s3_out(uint16_t addr, uint8_t val, void *priv)
svga->hwcursor.x /= 3;
else if ((s3->chip <= S3_86C805) && s3->color_16bit)
svga->hwcursor.x >>= 1;
else if ((s3->chip == S3_TRIO32) && ((svga->bpp == 15) || (svga->bpp == 16)))
svga->hwcursor.x >>= 1;
break;
case 0x4a:
@@ -4488,6 +4491,7 @@ static void
s3_updatemapping(s3_t *s3)
{
svga_t *svga = &s3->svga;
xga_t *xga = (xga_t *) svga->xga;
if (s3->pci && !(s3->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM)) {
mem_mapping_disable(&svga->mapping);
@@ -4504,6 +4508,10 @@ s3_updatemapping(s3_t *s3)
/* Enhanced mode forces 64kb at 0xa0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
svga->banked_mask = 0xffff;
if (xga_active && (svga->xga != NULL)) {
xga->on = 0;
mem_mapping_set_handler(&svga->mapping, svga->read, svga->readw, svga->readl, svga->write, svga->writew, svga->writel);
}
} else
switch (svga->gdcreg[6] & 0xc) { /*VGA mapping*/
case 0x0: /*128k at A0000*/
@@ -4513,6 +4521,10 @@ s3_updatemapping(s3_t *s3)
case 0x4: /*64k at A0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
svga->banked_mask = 0xffff;
if (xga_active && (svga->xga != NULL)) {
xga->on = 0;
mem_mapping_set_handler(&svga->mapping, svga->read, svga->readw, svga->readl, svga->write, svga->writew, svga->writel);
}
break;
case 0x8: /*32k at B0000*/
mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000);
@@ -10143,6 +10155,12 @@ s3_init(const device_t *info)
NULL);
}
}
svga->read = s3_read;
svga->readw = s3_readw;
svga->readl = s3_readl;
svga->write = s3_write;
svga->writew = s3_writew;
svga->writel = s3_writel;
mem_mapping_set_handler(&svga->mapping, s3_read, s3_readw, s3_readl, s3_write, s3_writew, s3_writel);
mem_mapping_set_p(&svga->mapping, s3);

6
src/video/vid_s3_virge.c
View File

@@ -37,6 +37,7 @@
#include <86box/video.h>
#include <86box/i2c.h>
#include <86box/vid_ddc.h>
#include <86box/vid_xga.h>
#include <86box/vid_svga.h>
#include <86box/vid_svga_render.h>
@@ -1036,6 +1037,7 @@ static void
s3_virge_updatemapping(virge_t *virge)
{
svga_t *svga = &virge->svga;
xga_t *xga = (xga_t *) svga->xga;
if (!(virge->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM)) {
mem_mapping_disable(&svga->mapping);
@@ -1053,6 +1055,10 @@ s3_virge_updatemapping(virge_t *virge)
case 0x4: /*64k at A0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
svga->banked_mask = 0xffff;
if (xga_active && (svga->xga != NULL)) {
xga->on = 0;
mem_mapping_set_handler(&svga->mapping, svga->read, svga->readw, svga->readl, svga->write, svga->writew, svga->writel);
}
break;
case 0x8: /*32k at B0000*/
mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000);

18
src/video/vid_svga.c
View File

@@ -404,6 +404,10 @@ svga_out(uint16_t addr, uint8_t val, void *priv)
case 0x4: /*64k at A0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
svga->banked_mask = 0xffff;
if (xga_active && (svga->xga != NULL)) {
xga->on = 0;
mem_mapping_set_handler(&svga->mapping, svga->read, svga->readw, svga->readl, svga->write, svga->writew, svga->writel);
}
break;
case 0x8: /*32k at B0000*/
mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000);
@@ -789,13 +793,6 @@ svga_recalctimings(svga_t *svga)
else
svga->render = svga_render_text_80;
if (xga_active && (svga->xga != NULL)) {
if (xga->on) {
svga_log("XGA on=%d, base=%05x, ap=%x.\n", xga->on, svga->mapping.base, xga->aperture_cntl);
if ((svga->mapping.base == 0xb8000) && (xga->aperture_cntl >= 1)) /*Some operating systems reset themselves with ctrl-alt-del by going into text mode.*/
xga->on = 0;
}
}
svga->hdisp_old = svga->hdisp;
} else {
svga->hdisp_old = svga->hdisp;
@@ -809,14 +806,15 @@ svga_recalctimings(svga_t *svga)
} else if ((svga->gdcreg[5] & 0x60) == 0x20) {
if (svga->seqregs[1] & 8) { /*Low res (320)*/
svga->render = svga_render_2bpp_lowres;
svga_log("2 bpp low res\n");
svga_log("2 bpp low res.\n");
} else
svga->render = svga_render_2bpp_highres;
} else {
svga->map8 = svga->pallook;
if (svga->lowres) /*Low res (320)*/
if (svga->lowres) { /*Low res (320)*/
svga->render = svga_render_8bpp_lowres;
else
svga_log("8 bpp low res.\n");
} else
svga->render = svga_render_8bpp_highres;
}
} else {

10
src/video/vid_tgui9440.c
View File

@@ -72,6 +72,7 @@
#include <86box/video.h>
#include <86box/i2c.h>
#include <86box/vid_ddc.h>
#include <86box/vid_xga.h>
#include <86box/vid_svga.h>
#include <86box/vid_svga_render.h>
@@ -911,6 +912,7 @@ static void
tgui_recalcmapping(tgui_t *tgui)
{
svga_t *svga = &tgui->svga;
xga_t *xga = (xga_t *) svga->xga;
if (tgui->type == TGUI_9400CXI) {
if (svga->gdcreg[0x10] & EXT_CTRL_LATCH_COPY) {
@@ -964,6 +966,10 @@ tgui_recalcmapping(tgui_t *tgui)
case 0x4: /*64k at A0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
svga->banked_mask = 0xffff;
if (xga_active && (svga->xga != NULL)) {
xga->on = 0;
mem_mapping_set_handler(&svga->mapping, svga->read, svga->readw, svga->readl, svga->write, svga->writew, svga->writel);
}
break;
case 0x8: /*32k at B0000*/
mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000);
@@ -988,6 +994,10 @@ tgui_recalcmapping(tgui_t *tgui)
case 0x4: /*64k at A0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
svga->banked_mask = 0xffff;
if (xga_active && (svga->xga != NULL)) {
xga->on = 0;
mem_mapping_set_handler(&svga->mapping, svga->read, svga->readw, svga->readl, svga->write, svga->writew, svga->writel);
}
break;
case 0x8: /*32k at B0000*/
mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000);

12
src/video/vid_voodoo_banshee.c
View File

@@ -41,6 +41,7 @@
#include <86box/video.h>
#include <86box/i2c.h>
#include <86box/vid_ddc.h>
#include <86box/vid_xga.h>
#include <86box/vid_svga.h>
#include <86box/vid_svga_render.h>
#include <86box/vid_voodoo_common.h>
@@ -452,6 +453,7 @@ static void
banshee_updatemapping(banshee_t *banshee)
{
svga_t *svga = &banshee->svga;
xga_t *xga = (xga_t *) svga->xga;
if (!(banshee->pci_regs[PCI_REG_COMMAND] & PCI_COMMAND_MEM)) {
#if 0
@@ -473,6 +475,10 @@ banshee_updatemapping(banshee_t *banshee)
case 0x4: /*64k at A0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
svga->banked_mask = 0xffff;
if (xga_active && (svga->xga != NULL)) {
xga->on = 0;
mem_mapping_set_handler(&svga->mapping, svga->read, svga->readw, svga->readl, svga->write, svga->writew, svga->writel);
}
break;
case 0x8: /*32k at B0000*/
mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000);
@@ -956,7 +962,7 @@ banshee_ext_outl(uint16_t addr, uint32_t val, void *priv)
case Video_vidChromaKeyMin:
banshee->vidChromaKeyMin = val;
break;
case Video_vidChromaKeyMax:
banshee->vidChromaKeyMax = val;
break;
@@ -2760,7 +2766,7 @@ banshee_overlay_draw(svga_t *svga, int displine)
voodoo->overlay.src_y += (1 << 20);
return;
}
chroma_test_passed = banshee_chroma_key(banshee, svga->overlay_latch.x, displine - svga->y_add);
if ((voodoo->overlay.src_y >> 20) < 2048)
@@ -2880,7 +2886,7 @@ banshee_overlay_draw(svga_t *svga, int displine)
fil[x * 3 + 1] = vb_filter_v1_g[fil[x * 3 + 1]][fil3[(x + 1) * 3 + 1]];
fil[x * 3 + 2] = vb_filter_v1_rb[fil[x * 3 + 2]][fil3[(x + 1) * 3 + 2]];
chroma_test_passed = banshee_chroma_key(banshee, svga->overlay_latch.x + x, displine - svga->y_add);
if (chroma_test_passed)
p[x] = (fil[x * 3 + 2] << 16) | (fil[x * 3 + 1] << 8) | fil[x * 3];
}

188
src/video/vid_xga.c
View File

@@ -163,24 +163,76 @@ xga_updatemapping(svga_t *svga)
case 0:
xga_log("XGA: VGA mode address decode disabled.\n");
mem_mapping_disable(&xga->linear_mapping);
xga->test_stage = 0;
xga->mapping_base = svga->mapping.base;
break;
case 1:
xga_log("XGA: VGA mode address decode enabled.\n");
mem_mapping_disable(&xga->linear_mapping);
xga->test_stage = 0;
mem_mapping_set_handler(&svga->mapping, svga->read, svga->readw, svga->readl, svga->write, svga->writew, svga->writel);
switch (svga->gdcreg[6] & 0xc) {
case 0x0: /*128k at A0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000);
svga->banked_mask = 0xffff;
break;
case 0x4: /*64k at A0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
svga->banked_mask = 0xffff;
break;
case 0x8: /*32k at B0000*/
mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000);
svga->banked_mask = 0x7fff;
break;
case 0xC: /*32k at B8000*/
mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000);
svga->banked_mask = 0x7fff;
break;
default:
break;
}
xga->mapping_base = svga->mapping.base;
break;
case 2:
xga_log("XGA: 132-Column mode address decode disabled.\n");
mem_mapping_disable(&xga->linear_mapping);
xga->test_stage = 0;
xga->mapping_base = svga->mapping.base;
break;
case 3:
xga_log("XGA: 132-Column mode address decode enabled.\n");
mem_mapping_disable(&xga->linear_mapping);
xga->test_stage = 0;
mem_mapping_set_handler(&svga->mapping, svga->read, svga->readw, svga->readl, svga->write, svga->writew, svga->writel);
switch (svga->gdcreg[6] & 0xc) {
case 0x0: /*128k at A0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x20000);
svga->banked_mask = 0xffff;
break;
case 0x4: /*64k at A0000*/
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
svga->banked_mask = 0xffff;
break;
case 0x8: /*32k at B0000*/
mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x08000);
svga->banked_mask = 0x7fff;
break;
case 0xC: /*32k at B8000*/
mem_mapping_set_addr(&svga->mapping, 0xb8000, 0x08000);
svga->banked_mask = 0x7fff;
break;
default:
break;
}
xga->mapping_base = svga->mapping.base;
break;
default:
xga_log("XGA: Extended Graphics mode, ap=%d.\n", xga->aperture_cntl);
xga_log("XGA: Extended Graphics mode, ap=%d, mapbits=%x.\n", xga->aperture_cntl, svga->gdcreg[6] & 0xc);
switch (xga->aperture_cntl) {
case 0:
xga_log("XGA: No 64KB aperture: 1MB=%x, 4MB=%x, SVGA Mapping Base=%x.\n", xga->base_addr_1mb, xga->linear_base, svga->mapping.base);
xga_log("XGA: No 64KB aperture: 1MB=%x, 4MB=%x, SVGA Mapping Base=%x, mapbits=%x.\n", xga->base_addr_1mb, xga->linear_base, svga->mapping.base, svga->gdcreg[6] & 0xc);
if (xga->base_addr_1mb) {
mem_mapping_set_addr(&xga->linear_mapping, xga->base_addr_1mb, 0x100000);
mem_mapping_enable(&xga->linear_mapping);
@@ -190,6 +242,7 @@ xga_updatemapping(svga_t *svga)
} else
mem_mapping_disable(&xga->linear_mapping);
xga->test_stage = 0;
mem_mapping_set_handler(&svga->mapping, svga->read, svga->readw, svga->readl, svga->write, svga->writew, svga->writel);
switch (svga->gdcreg[6] & 0xc) {
case 0x0: /*128k at A0000*/
@@ -212,10 +265,13 @@ xga_updatemapping(svga_t *svga)
default:
break;
}
xga->mapping_base = svga->mapping.base;
break;
case 1:
mem_mapping_disable(&xga->linear_mapping);
xga_log("XGA: 64KB aperture at A0000.\n");
xga_log("XGA: 64KB aperture at A0000, on=%d.\n", xga->on);
xga->test_stage = 0;
xga->mapping_base = 0xa0000;
mem_mapping_set_handler(&svga->mapping, xga_read, xga_readw, xga_readl, xga_write, xga_writew, xga_writel);
mem_mapping_set_addr(&svga->mapping, 0xa0000, 0x10000);
xga->banked_mask = 0xffff;
@@ -223,6 +279,8 @@ xga_updatemapping(svga_t *svga)
case 2:
mem_mapping_disable(&xga->linear_mapping);
xga_log("XGA: 64KB aperture at B0000.\n");
xga->test_stage = 0;
xga->mapping_base = 0xb0000;
mem_mapping_set_handler(&svga->mapping, xga_read, xga_readw, xga_readl, xga_write, xga_writew, xga_writel);
mem_mapping_set_addr(&svga->mapping, 0xb0000, 0x10000);
xga->banked_mask = 0xffff;
@@ -258,6 +316,8 @@ void
xga_recalctimings(svga_t *svga)
{
xga_t *xga = (xga_t *) svga->xga;
xga_log("DispCntl2=%d, lowres=%x.\n", xga->disp_cntl_2 & 7, svga->lowres);
if (xga->on) {
xga->h_total = xga->htotal + 1;
xga->v_total = xga->vtotal + 1;
@@ -305,6 +365,7 @@ xga_recalctimings(svga_t *svga)
break;
}
svga->render_xga = xga_render_blank;
switch (xga->disp_cntl_2 & 7) {
case 2:
svga->render_xga = xga_render_4bpp;
@@ -317,7 +378,6 @@ xga_recalctimings(svga_t *svga)
break;
default:
svga->render_xga = xga_render_blank;
break;
}
@@ -602,6 +662,12 @@ xga_ext_outb(uint16_t addr, uint8_t val, void *priv)
xga_log("[%04X:%08X]: EXT OUTB = %02x, val = %02x\n", CS, cpu_state.pc, addr, val);
xga->int_stat = val;
break;
case 6:
xga_log("[%04X:%08X]: EXT OUTB = %02x, val = %02x\n", CS, cpu_state.pc, addr, val);
break;
case 7:
xga_log("[%04X:%08X]: EXT OUTB = %02x, val = %02x\n", CS, cpu_state.pc, addr, val);
break;
case 8:
xga->ap_idx = val;
xga_log("Aperture CNTL = %d, val = %02x, up to bit6 = %02x\n", xga->aperture_cntl,
@@ -2379,8 +2445,6 @@ exec_command:
xga->accel.px_map_format[xga->accel.src_map] & 0x0f,
xga->accel.plane_mask);
xga->src_reverse_order = 0;
xga->dst_reverse_order = 0;
switch ((xga->accel.command >> 24) & 0x0f) {
case 2: /*Short Stroke Vectors Read */
xga_log("Short Stroke Vectors Read.\n");
@@ -2837,31 +2901,39 @@ xga_render_16bpp(svga_t *svga)
void
xga_write_test(uint32_t addr, uint8_t val, void *priv)
{
svga_t *svga = (svga_t *) priv;
xga_t *xga = (xga_t *) svga->xga;
svga_t *svga = (svga_t *) priv;
xga_t *xga = (xga_t *) svga->xga;
if (xga_active && xga) {
if (((xga->op_mode & 7) >= 1) && xga->aperture_cntl && (svga->mapping.base == 0xb8000)) {
xga_log("WriteAddr=%05x.\n", addr);
if (val == 0xa5) { /*Memory size test of XGA*/
xga->test = val;
if (addr == 0xa0001)
xga->a5_test = 1;
else if (addr == 0xafffe)
xga->a5_test = 2;
if ((xga->op_mode & 7) == 4) {
if (xga->aperture_cntl && !xga->test_stage) {
if (val == 0xa5) { /*Memory size test of XGA*/
xga->test = val;
if (addr == (xga->mapping_base + 0x0001))
xga->a5_test = 1;
else if (addr == (xga->mapping_base + xga->banked_mask - 0x0001))
xga->a5_test = 2;
xga->test_stage = 1;
xga->on = 0;
xga_log("XGA test1 addr=%05x, test=%02x.\n", addr, xga->a5_test);
} else if (val == 0x5a) {
xga->test = val;
xga->test_stage = 1;
xga->on = 0;
xga_log("XGA test2 addr = %05x.\n", addr);
} else if ((addr == xga->mapping_base) || (addr == (xga->mapping_base + 0x0010))) {
addr += xga->write_bank;
xga->vram[addr & xga->vram_mask] = val;
xga_log("XGA Linear endian reverse write, val = %02x, addr = %05x, banked mask = %04x, a5test=%d.\n", val, addr, svga->banked_mask, xga->a5_test);
}
} else {
xga->test_stage = 0;
xga->on = 0;
xga_log("XGA test1 addr=%05x, test=%02x.\n", addr, xga->a5_test);
} else if (val == 0x5a) {
xga->test = val;
xga->on = 0;
xga_log("XGA test2 addr = %05x.\n", addr);
} else if ((addr == 0xa0000) || (addr == 0xa0010)) {
addr += xga->write_bank;
xga->vram[addr & xga->vram_mask] = val;
xga_log("XGA Linear endian reverse write, val = %02x, addr = %05x, banked mask = %04x, a5test=%d.\n", val, addr, svga->banked_mask, xga->a5_test);
xga_log("Write: AP=%x, teststage=%x, on=%d.\n", xga->aperture_cntl, xga->test_stage, xga->on);
}
} else if (xga->aperture_cntl || (!xga->aperture_cntl && (svga->mapping.base == 0xa0000))) {
} else {
xga->test_stage = 0;
xga->on = 0;
xga_log("OFF XGA write.\n");
}
@@ -2899,7 +2971,7 @@ xga_write(uint32_t addr, uint8_t val, void *priv)
addr &= xga->banked_mask;
addr += xga->write_bank;
xga_log("WriteBankedB addr=%08x, val=%02x, addrshift1=%08x.\n", addr, val, addr >> 1);
xga_log("WriteBankedB addr=%08x, val=%02x, ison=%d, mapbits=%x.\n", addr, val, xga->on, svga->gdcreg[6] & 0x0c);
if (addr >= xga->vram_size)
return;
@@ -2917,7 +2989,7 @@ xga_writew(uint32_t addr, uint16_t val, void *priv)
addr &= xga->banked_mask;
addr += xga->write_bank;
xga_log("WriteBankedW addr=%08x, val=%04x, addrshift1=%08x.\n", addr, val, addr >> 1);
xga_log("WriteBankedW addr=%08x, val=%04x, ison=%d.\n", addr, val, xga->on);
if (addr >= xga->vram_size)
return;
@@ -2935,7 +3007,7 @@ xga_writel(uint32_t addr, uint32_t val, void *priv)
addr &= xga->banked_mask;
addr += xga->write_bank;
xga_log("WriteBankedL addr=%08x, val=%08x, addrshift1=%08x.\n", addr, val, addr >> 1);
xga_log("WriteBankedL addr=%08x, val=%08x.\n", addr, val);
if (addr >= xga->vram_size)
return;
@@ -2953,31 +3025,41 @@ xga_read_test(uint32_t addr, void *priv)
uint8_t ret = 0x00;
if (xga_active && xga) {
if (((xga->op_mode & 7) >= 1) && xga->aperture_cntl && (svga->mapping.base == 0xb8000)) {
if (xga->test == 0xa5) { /*Memory size test of XGA*/
if (addr == 0xa0001) {
xga_log("Read: OPMODE=%x, APCNTL=%x, base=%05x, test=%x.\n", xga->op_mode & 7, xga->aperture_cntl, svga->mapping.base, xga->test);
if ((xga->op_mode & 7) == 4) {
if (xga->aperture_cntl && (xga->test_stage == 1)) {
if (xga->test == 0xa5) { /*Memory size test of XGA*/
if (addr == (xga->mapping_base + 0x0001)) {
xga_log("A5 test bank = %x, svgabase=%05x.\n", addr, svga->mapping.base);
ret = xga->test;
} else if ((addr == xga->mapping_base) && (xga->a5_test == 1)) { /*This is required by XGAKIT to pass the memory test*/
xga_log("A5 test bank = %x.\n", addr);
addr += xga->read_bank;
ret = xga->vram[addr & xga->vram_mask];
} else
ret = xga->test;
xga->test_stage = 0;
xga->on = 1;
xga_log("A5 read: XGA ON = %d, addr = %05x, ret = %02x, test1 = %x.\n", xga->on, addr, ret, xga->a5_test);
return ret;
} else if (xga->test == 0x5a) {
xga->test_stage = 0;
ret = xga->test;
xga->on = 1;
} else if ((addr == 0xa0000) && (xga->a5_test == 1)) { /*This is required by XGAKIT to pass the memory test*/
xga_log("A5 test bank = %x.\n", addr);
xga_log("5A read: XGA ON = %d.\n", xga->on);
return ret;
} else if ((addr == xga->mapping_base) || (addr == (xga->mapping_base + 0x0010))) {
addr += xga->read_bank;
ret = xga->vram[addr & xga->vram_mask];
} else {
ret = xga->test;
xga->on = 1;
return xga->vram[addr & xga->vram_mask];
}
xga_log("A5 read: XGA ON = %d, addr = %05x, ret = %02x, test1 = %x.\n", xga->on, addr, ret, xga->a5_test);
return ret;
} else if (xga->test == 0x5a) {
ret = xga->test;
xga->on = 1;
xga_log("5A read: XGA ON = %d.\n", xga->on);
return ret;
} else if ((addr == 0xa0000) || (addr == 0xa0010)) {
addr += xga->read_bank;
return xga->vram[addr & xga->vram_mask];
} else {
xga->test_stage = 0;
xga->on = 0;
xga_log("Read: AP=%x, teststage=%x, on=%d.\n", xga->aperture_cntl, xga->test_stage, xga->on);
}
} else if (xga->aperture_cntl || (!xga->aperture_cntl && (svga->mapping.base == 0xa0000))) {
} else {
xga->test_stage = 0;
xga->on = 0;
xga_log("OFF XGA read.\n");
}
@@ -3029,6 +3111,7 @@ xga_read(uint32_t addr, void *priv)
cycles -= svga->monitor->mon_video_timing_read_b;
ret = xga_read_banked(addr, svga);
xga_log("ReadBankedB addr=%08x, ret=%02x, ison=%d.\n", addr, ret, xga->on);
return ret;
}
@@ -3050,6 +3133,7 @@ xga_readw(uint32_t addr, void *priv)
cycles -= svga->monitor->mon_video_timing_read_w;
ret = xga_readw_banked(addr, svga);
xga_log("ReadBankedW addr=%08x, ret=%04x, ison=%d.\n", addr, ret, xga->on);
return ret;
}
@@ -3398,6 +3482,7 @@ xga_mca_write(int port, uint8_t val, void *priv)
mem_mapping_disable(&xga->memio_mapping);
xga->on = 0;
xga->a5_test = 0;
xga->test_stage = 0;
/* Save the MCA register value. */
xga->pos_regs[port & 7] = val;
@@ -3450,11 +3535,11 @@ xga_reset(void *priv)
xga_t *xga = (xga_t *) svga->xga;
xga_log("Normal Reset.\n");
if (xga_standalone_enabled)
mem_mapping_disable(&xga->memio_mapping);
mem_mapping_disable(&xga->memio_mapping);
xga->on = 0;
xga->a5_test = 0;
xga->test_stage = 0;
mem_mapping_set_handler(&svga->mapping, svga->read, svga->readw, svga->readl, svga->write, svga->writew, svga->writel);
svga_set_poll(svga);
}
@@ -3651,6 +3736,7 @@ xga_init(const device_t *info)
xga->hwcursor.cur_xsize = 64;
xga->hwcursor.cur_ysize = 64;
xga->a5_test = 0;
xga->test_stage = 0;
if (info->flags & DEVICE_MCA) {
video_inform(VIDEO_FLAG_TYPE_SPECIAL, &timing_xga_mca);